JP2806366B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an active matrix type liquid crystal display device used for a display, a projector, a television and the like.

[0002]

2. Description of the Related Art In order to reduce the size and cost of a liquid crystal display device, a technique for integrating peripheral driving circuits on the same substrate as a liquid crystal display substrate has been developed. The peripheral driving circuit is divided into a vertical driving circuit that scans the gate of a thin film transistor (hereinafter, referred to as a TFT) forming an active matrix array and a horizontal driving circuit that supplies a video signal to a data bus line. Conventionally, in this type of liquid crystal display device, in order to improve the yield of the peripheral drive circuit and to reduce the delay of the scanning line signal and the data line signal of the liquid crystal display unit, there is a case where drive circuits are redundantly arranged on the upper, lower, left and right sides of the liquid crystal display unit. is there. For example, Japanese Patent Laying-Open No. 2-708 discloses an example in which drive circuits are redundantly arranged vertically, horizontally, and for the purpose of improving the yield. In this type of liquid crystal display device, a configuration is widely adopted in which an input video signal is expanded in multiple phases, the transfer speed is reduced, and the required speed of a peripheral drive circuit is reduced. For example, in May 1994, SID 94
Digest, pp. 79-82 (SID DIGEST,
pp. 79-82) show an example of a liquid crystal display device in which a video signal is expanded into 128 phases and input into the upper and lower 64 signals separately.

FIG. 6 shows an example of the configuration of a conventional liquid crystal display device incorporating a drive circuit. The liquid crystal display device with a built-in drive circuit includes an active matrix type liquid crystal display unit 101 for displaying an image, a vertical drive circuit 102,
And a horizontal drive circuit.

[0004] The horizontal drive circuit includes an analog switch 104.
And a horizontal scanning circuit 103 for sequentially selecting the analog switch 104. In this liquid crystal display device, horizontal driving circuits are arranged above and below the active matrix type liquid crystal display unit 101, and the video signal lines S (1) to S (2K) are expanded into 2 × K (K is a natural number) polyphases. Input video signals. In this case, 2
Since all the gate electrodes of the × K analog switches 104 are commonly connected to the horizontal scanning circuit 103, 2 × K
The video signals are simultaneously selected by the horizontal scanning circuit 103 and simultaneously written to the data bus line through the analog switch 104. By performing this operation while sequentially shifting in the horizontal direction, a video signal for one line is charged in the data bus line.

A data signal for one line is supplied to a vertical drive circuit 1
02 is written to the pixel electrode through the TFT of the pixel selected by 02. Further, by performing this operation while shifting sequentially in the vertical direction, a data signal for one screen can be written to the pixel electrode.

As shown in FIG. 6, the arrangement order of video signal lines S (1) to S (2K) in a conventional liquid crystal display device is line-symmetric between an upper drive circuit and a lower drive circuit. Are located. That is, for both the upper and lower drive circuits, S (1), S (2), S (3),.
., S (2K).

Therefore, the length of the upper vertical wiring made of the second wiring material 107 connecting the upper analog switch 104 and the upper video signal line 105 made of the first wiring material 106, and the same data bus line as the upper analog switch 104 The sum L of the length of the lower vertical line made of the second wiring material 107 connecting the lower analog switch 104 for driving the lower video signal line 105 made of the first wiring material 106 is L (1) <L (2) <L (3) <... <L
It increases in the order of (2K). However, the numbers in parentheses indicate the numbers of the video signal lines connected to the upper and lower vertical wirings. Therefore, the sum of the resistance values of the upper and lower vertical wirings made of the second wiring material 107 also increases in the same order.

FIGS. 7A and 7B are plan views showing an example of a device for connecting the upper and lower video signal lines 105 and the analog switch 104 in FIG. In this figure, the video signal lines are S (1)-
It is expanded to eight phases of S (8). In addition, a planar type is adopted as a TFT structure.

FIGS. 9 (a) and 9 (b) show cross sections taken along lines ab and cd of FIG. 7, respectively.

FIG. 9A shows a sectional structure of a TFT. In this figure, polycrystalline silicon is usually used for the semiconductor thin film 901. The first wiring material 10 connected to the source region 902 and the drain region 903
Aluminum (Al) metal is usually used as 6. Further, the second wiring material 107 forming the gate electrode is usually formed of a polycrystalline silicon thin film whose resistance is reduced by impurity doping. The TFT is formed by providing a semiconductor thin film 901 on an insulating substrate 907.
1, a gate insulating film 904 is formed thereon, and a gate electrode made of the second wiring material 107 is formed thereon.
These members are covered with an interlayer film 905, on which a passivation film 906 is formed.

FIG. 9B shows a video signal line 105 formed of a first wiring material 106 on an insulating substrate 907 and a second wiring material 107 connecting the video signal line 105 and the analog switch 104. The formed wiring is an interlayer film 9
5 shows a cross section of a portion that intersects through 05.

[0012]

As described above, in the conventional liquid crystal display device, the length of the vertical wiring connecting the upper and lower video signal lines 105 for driving the same data bus line and the analog switch 104 is reduced. The sum differs from one block to another as a unit of the writing scan, and accordingly, the resistance also differs. For example, when an impurity-doped polycrystalline silicon thin film is used as a material for a wiring connecting the video signal line 105 and the analog switch 104, the resistance of the wiring is several hundred to several hundred kΩ at the maximum. This value is equal to or higher than the on-resistance value of the analog switch 104 and cannot be ignored. As a result, the signal passing frequency band of the analog switch 104 is greatly affected, and the signal passing frequency band becomes non-uniform in the block, and there is a problem that gradation (shading) occurs for each block.

FIG. 8 is a graph showing a signal passing frequency band of an analog switch at both ends of one block when a video signal is developed into 12 phases. In the figure,
Curves C3 and C4 show the relationship between the frequency of a signal passing through the analog switch 104 driving the data bus lines C and D shown in FIG. 6 and its voltage gain, respectively. From this graph, it can be seen that the signal passing frequency band of the analog switch driving the data bus line D is lower by one digit or more than the signal passing frequency band of the analog switch driving the data bus line C. This difference is due to the difference in the resistance value of the wiring connecting the video signal line 105 and the analog switch 104.

As described above, when the conventional TFT structure as shown in FIG. 9 is employed, gradation occurs for each block. In this regard, if the vertical wiring connecting the video signal line 105 and the analog switch 104 is formed of low-resistance Al metal, the difference in resistance value due to the wiring length is reduced, and the signal passing frequency band of the analog switch becomes uniform. Thus, the gradation can be suppressed.

However, in this case, in order to form the video signal line 105 and the vertical wiring connecting the video signal line 105 to the analog switch 104 with the same material, a process of, for example, forming Al into two layers is required. Another problem is that the manufacturing cost of the liquid crystal display device is increased.

SUMMARY OF THE INVENTION The present invention has been made in view of the conventional problems, and an object of the present invention is to provide a liquid crystal display device with a built-in drive circuit capable of eliminating gradation for each block by an inexpensive manufacturing process. That is.

[0017]

A liquid crystal display device according to the present invention has a built-in driving circuit in which horizontal driving circuits for simultaneously selecting a plurality of analog switches and writing a plurality of video signals to a data bus line are vertically arranged in a redundant manner. In the liquid crystal display device of the type, the sum of the lengths of the upper and lower connection wires made of the second wiring material connecting the upper and lower analog switches driving the same data bus line and the video signal lines made of the first wiring material is calculated. It is characterized in that the signal passing frequency band of the analog switch is made uniform over the entire display screen by making the same regardless of the location.

In the liquid crystal display device according to the present invention, the analog switch comprises a thin film transistor.

In the liquid crystal display device according to the present invention, the first wiring material is made of aluminum.

In the liquid crystal display device according to the present invention, the second wiring material is made of polycrystalline silicon.

[0021]

In the liquid crystal display device according to the present invention, the upper and lower analog switches for driving the same data bus line and the upper and lower vertical wirings of the second wiring material connecting the video signal lines of the first wiring material are connected. Since the sum of the lengths is equal regardless of the location, the sum of the resistance values is equal in each set of the upper and lower analog switches. Therefore, the signal passing frequency bands of the analog switches become equal, and do not differ depending on the position in the block.

[0022]

Next, an embodiment of the present invention will be described in detail with reference to the drawings. In the drawings, the same numbers are used for similar members.

FIG. 1 shows a circuit configuration of a liquid crystal display device with a built-in drive circuit according to a first embodiment of the present invention.

The liquid crystal display device with a built-in drive circuit comprises an active matrix type liquid crystal display section 101 for displaying an image, a vertical drive circuit 102, and a liquid crystal display section 1 as in the prior art.
The horizontal drive circuits are redundantly arranged above and below 01. Each horizontal drive circuit includes an analog switch 104 divided into predetermined blocks, and a horizontal scanning circuit 103 for selecting these analog switches 104 in a block order.
It is composed of

Analog switch 104 of each horizontal drive circuit
Are input with 2 × K (K is a natural number) polyphase expanded video signals S (1) to S (2K). The gate electrodes of the 2 × K analog switches 104 in each block are all connected to the horizontal scanning circuit 103 in common,
Therefore, the 2 × K video signals are supplied to the horizontal scanning circuit 103.
, And are simultaneously written to the data bus lines of the corresponding display block through the analog switch 104 of that block. By performing the operation for each block while sequentially shifting in the horizontal direction, the video signal for one line is charged in the data bus lines of the entire display unit 101.

The data signal for one line is written to the pixel electrode through the TFT of the pixel selected by the vertical drive circuit 102. By performing this writing operation while shifting sequentially in the vertical direction, a data signal for one screen is written to the pixel electrodes of the entire display unit 101.

The liquid crystal display according to the first embodiment described above differs from the conventional liquid crystal display in the arrangement order of the video signal lines 105 arranged vertically. That is, in the first embodiment, as shown in FIG. 1, the video signal lines S (1) to S (2K) of the lower drive circuit are replaced with the video signal lines S (1) to S (1) of the upper drive circuit. 2K) as they are moved downward in parallel, and in the upper drive circuit, S (1), S (2), S (3),.
, S (2K), and S (2K), S (2K−1), S (2K−) from the inside to the outside in the lower drive circuit.
2),..., S (1).

For this reason, the upper and lower analog switches 104 for driving the same data bus line and the first wiring material 10
The sum of the lengths of the vertical wirings made of the second wiring material 107, which connect the video signal lines 105 made of No. 6 with the video signal lines 105, is always the same regardless of the position in the block.

FIGS. 2A and 2B show the connection relationship between the upper and lower video signal lines 105 and the analog switch 104 when the TFT structure of the liquid crystal display device of FIG. 1 is of a planar type. 9A and 9B show cross sections taken along line ab and cd of FIG. 2A, respectively.

In the configurations shown in FIGS. 2A and 2B, the video signal lines 105 are developed in eight phases S (1) to S (8). Here, the connection structure from the upper video signal line 105 to the lower video signal line 105 will be described using the video signal line S (4) as an example.

As shown in FIG. 2A, the upper video signal line S (4) is formed of a first wiring material 106 extending in the horizontal direction, and is formed by a second wiring material 107 by a contact 4a.
Is connected to the upper vertical wiring formed by the above. This vertical wiring is connected to the upper vertical conductor formed of the first wiring material 106 by the contact 4b, and furthermore, the contact 4c
Source region 90 of upper analog switch 104
2 is connected. In the upper analog switch 104, as shown in FIG. 9A, the source region 902 can be switched and connected to the drain region 903 via the channel portion of the semiconductor thin film 901, and the drain region 903 is connected by the contact 4d. First wiring material 106
Is connected to the data bus line formed by. This data bus line passes through the liquid crystal display unit 101 shown in FIG. 1 and is connected to the drain region 903 of the lower analog switch 104 by a contact 4e as shown in FIG. 2B. In the lower analog switch 104, FIG.
As in the case of (a), the drain region 903 can be switched and connected to the source region 902 via the channel portion of the semiconductor thin film 901.
Is connected to the lower vertical conductor formed of the first wiring material 106 by the contact 4f. This conductor is connected to the lower vertical wiring formed of the second wiring material 107 by the contact 4g, and further connected to the lower video signal line S (4) formed of the first wiring material 106 by the contact 4h. The above connection structure is the same for the other video signal lines S (1) to S (3) and S (5) to S (2K).

In the above description, polycrystalline silicon is usually used as the material of the semiconductor thin film 901, but other semiconductor materials such as amorphous silicon and cadmium selenium may be used. Aluminum (Al) metal is usually used for the first wiring material 106 connected to the source region 902 and the drain region 903, but other metal materials such as chromium Cr, tungsten W, molybdenum Mo, and titanium Ti , Tantalum Ta, or the like, or their silicides such as chromium silicide CrSi ₂ , tungsten silicide WSi ₂ ,
Molybdenum silicide MoSi ₂ , titanium silicide T
iSi _2, may be used tantalum silicide TaSi ₂ and the like.

As the gate electrode made of the second wiring material 107, a polycrystalline silicon thin film whose resistance is reduced by impurity doping is usually used, but other metal wiring materials such as Al, Cr, W, and Mo are used. , Ti, Ta or the like, or a two-layer structure of an impurity-doped polycrystalline silicon thin film and a metal thereof, and further, a silicide of the above metal, for example, CrSi ₂ , WSi ₂ , MoSi ₂ , TiSi ₂ , Ta
A thin film such as Si ₂ may be used.

FIG. 3 is a graph showing a signal passing frequency band of an analog switch at both ends of one block of the liquid crystal display device of FIG.

In FIG. 3, curves C1 and C2 are respectively shown in FIG.
5 shows the change in the voltage gain with respect to the frequency of the signal passing through the analog switch 104 that drives the data bus lines A and B shown in FIG.

From the graph of FIG. 3, it can be seen that the signal passing frequency band of the analog switch driving the data bus line A and the signal passing frequency band of the analog switch driving the data bus line B almost match.

In this regard, the length of the wiring connecting the upper analog switch 104 and the video signal line 105 with the second wiring material 107, the lower analog switch 104 driving the same data bus line as the upper analog switch 104, and the video Since the length of the wiring connecting the signal line 105 with the second wiring material 107 is different, the signal passing frequency bands of the upper and lower analog switches 104 that drive the same data bus line are different accordingly. Therefore, in designing, the average of the signal passing frequency band is taken between the upper analog switch 104 and the lower analog switch 104.

The length of the wiring formed of the second wiring material 107 connecting the upper analog switch 104 and the video signal line 105, and the lower analog switch 1 for driving the same data bus line as the upper analog switch 104
Since the sums of the lengths of the wirings formed of the second wiring material 107 connecting the video signal lines 04 and the video signal lines 105 are all equal, the average of the signal passing frequency bands of the respective analog switches is also equal.

As described above, in the liquid crystal display device of the first embodiment, the signal passing frequency band of the analog switch becomes equal at any place, and the gradation for each block, which occurs in the conventional liquid crystal display device, is completely eliminated. be able to.

FIGS. 4A and 4B are plan views of an upper drive circuit and a lower drive circuit of a liquid crystal display device according to a second embodiment of the present invention, respectively.

The liquid crystal display device according to the second embodiment has a forward staggered TFT structure in the first embodiment, and shows a device plan view of a portion connected to the analog switch 104. It is a thing. FIG. 4 (a)
2 (b), similarly to FIG. 2, the video signal lines 105 are developed in eight phases S (1) to S (8), and the upper and lower video signal lines S (1) to S (8) are provided. The order of the parentheses is in a parallel movement relationship. Therefore, the signal passing frequency band of the analog switch becomes equal everywhere.

FIGS. 10A and 10B are cross-sectional views taken along lines ef and gh in FIG. 4, respectively.

In FIGS. 10A and 10B, 904 is a gate insulating film, 906 is a passivation film,
907 is an insulating substrate.

Referring to FIGS. 4 and 10, the connection structure of signal lines from the upper video signal line 105 to the lower video signal line 105 will be described using the video signal line S (4) as an example.

As shown in FIG. 4A, the upper video signal line S (4) is formed of a first wiring material 106 extending in the horizontal direction, and the second wiring material 10 is formed by a contact 4i.
7 and is connected to an upper analog switch 104 having a contact 4j. That is, as shown in FIG. 10A, the vertical wiring is connected to the semiconductor thin film 901, and the semiconductor thin film 901 is connected to the conductor formed of the second wiring material 107 and the contact 4k.
Is connected to the data bus line formed of the first wiring material 106 through the first wiring material 106. This data bus line passes through the liquid crystal display unit 101 shown in FIG. 1 and is connected to the lower analog switch 104 by a contact 41 as shown in FIG. 4B. In the lower analog switch 104, FIG.
As shown in (a), the data bus line is connected to a conductor formed of the second wiring material 107 and a semiconductor thin film 901. The semiconductor thin film 901 has a contact 4m.
The conductor formed of the first wiring material 106 and the second
To the lower vertical wiring formed of the wiring material 107 of FIG. This lower vertical wiring is a lower video signal line S (4) formed of the first wiring material 106 by the contact 4n.
Connected to. The connection structure is different from the other video signal lines S
The same applies to (1) to S (3) and S (5) to S (2K).

In FIG. 10A, a semiconductor thin film 901 is shown.
Polycrystalline silicon is usually used as the material, but other semiconductor materials such as amorphous silicon and cadmium selenium may be used. Further, the first wiring material 106
In general, aluminum (Al) metal is used, but other metal materials such as chromium Cr, tungsten W, molybdenum Mo, titanium Ti, tantalum Ta, or the like can be used, or their silicides such as chromium silicide CrSi ₂ Tungsten silicide WSi
₂ , molybdenum silicide MoSi ₂ , titanium silicide TiSi ₂ , tantalum silicide TaSi ₂ or the like may be used.

As the first wiring material 106 forming the wiring between the gate electrode and the source and drain electrodes, a two-layer structure of an impurity-doped polycrystalline silicon thin film and Al metal is usually employed. Is done. Also, A
Instead of metal, other metal wiring materials, for example, C
r, W, Ti, Ta, etc. can also be used. Further, as the first wiring material 106, a silicide of such a metal, for example, CrSi ₂ , WSi ₂ , MoSi ₂ , T
iSi _2, TaSi ₂ or the like may be used.

The material 107 of the second wiring forming the source electrode and the drain electrode is usually a polycrystalline silicon thin film whose resistance is reduced by impurity doping or a polycrystalline silicon thin film doped with impurity, Al, Cr, W, Mo,
It is also possible to have a two-layer structure with a metal such as Ti or Ta. Further, an impurity-doped polycrystalline silicon thin film, CrSi ₂ , WSi ₂ , MoSi ₂ , TiSi ₂ ,
It is also possible to have a two-layer structure with a metal silicide such as TaSi ₂ .

On the other hand, FIG. 10B shows a video signal line 105 formed of the first wiring material 106 and a second wiring material 107 connecting the video signal line 105 and the analog switch 104. Wiring and the semiconductor thin film 901
And a cross-sectional structure of a portion that intersects with a gate insulating film 904 interposed therebetween.

As shown in FIG. 10B, a metal having a low resistance, that is, Al metal is usually used for the video signal line 105 formed of the first wiring material 106, and the video signal line 105 is connected to the analog switch. For the wiring formed of the second wiring material 107 connecting the second wiring material 104 and the second wiring material 104, the second wiring material 107, that is, a polycrystalline silicon thin film doped with impurities is used.

The signal passing frequency band of the analog switches at both ends of one block in the liquid crystal display device of the second embodiment designed as described above almost coincides with the characteristics shown in FIG.

FIGS. 5A and 5B are plan views of an upper drive circuit and a lower drive circuit of a liquid crystal display device according to the third embodiment of the present invention, respectively.

In the liquid crystal display device according to the third embodiment, the structure of the TFT in the first embodiment is inverted staggered. 5A and 5B, FIG.
Similarly, the video signal lines 105 are developed in eight phases S (1) to S (8), and the upper and lower video signal lines S
The arrangement order of (1) to S (8) has a relation of parallel movement. Therefore, the signal passing frequency band of the analog switch becomes equal everywhere.

FIGS. 11 (a) and 11 (b) show cross sections taken along the line ij and the line KM of FIG. 5, respectively.

In FIGS. 11A and 11B, 904 is a gate insulating film, 906 is a passivation film,
907 is an insulating substrate.

Referring to FIGS. 5 and 11, the connection structure of signal lines from the upper video signal line 105 to the lower video signal line 105 will be described using the video signal line S (4) as an example.

As shown in FIG. 5A, the upper video signal line S (4) is formed of the first wiring material 106 extending in the horizontal direction, and the second wiring material 107 is formed by the contact 4p.
And is connected to the upper analog switch 104. That is, FIG.
As shown in (a), the vertical wiring is connected to the semiconductor thin film 901, and this semiconductor thin film 901 connects to the conductor formed of the second wiring material 107. This conductor is a contact 4q
To connect to the data bus line. This data bus line passes through a liquid crystal display as shown in FIG.
As shown in (b), the contact 4r connects to a conductor formed of the second wiring material 107. This conductor connects to the lower analog switch 104. In the lower analog switch 104, as shown in FIG.
A conductor made of the wiring material 107 is connected to the semiconductor thin film 901, and the semiconductor thin film 901 is connected to the second wiring material 1.
07 is connected to the lower vertical wiring. This lower vertical wiring is formed by the first wiring material 106 by the contact 4s.
Is connected to the lower video signal line S (4) formed by.
The above connection structure is used for other video signal lines S (1) to S (3),
The same applies to S (5) to S (2K).

In FIG. 11A, a semiconductor thin film 901 is shown.
Although polycrystalline silicon is usually used as a material for this, other semiconductor materials, for example, amorphous silicon or cadmium selenium may be used.

As the second wiring material 107 forming the source electrode and the drain electrode, a polycrystalline silicon thin film whose resistance is reduced by impurity doping is usually used, but Al, Cr, W, Mo, Metal materials such as Ti and Ta can be used. Further, a two-layer structure of the polycrystalline silicon thin film and the metal may be used. Further, instead of these metal materials, CrSi ₂ , WSi ₂ , Mo
A metal silicide such as Si ₂ , TiSi ₂ or TaSi ₂ may be used.

On the other hand, the material 106 of the first wiring forming the gate electrode usually includes Al, Cr, W, Mo, Ti,
Metal materials such as Ta, silicides of these metals, Cr
Si ₂ , WSi ₂ , MoSi ₂ , TiSi ₂ , TaSi
₂ etc. can be used.

FIG. 11B shows the first wiring material 1.
The video signal line 105 formed of the gate insulating film 904 and the wiring formed of the second wiring material 107 connecting the video signal line 105 and the analog switch 104 are formed by the gate insulating film 904.
The cross-sectional structure of the portion that intersects through the lines is shown.

As shown in FIG. 11B, the video signal line 105 formed of the first wiring material 106 is usually made of a metal having a low resistance, for example, an Al metal. The second wiring material 1 for forming source / drain electrodes
07, that is, polycrystalline silicon doped with impurities.

With the above design, the signal passing frequency bands of the upper and lower analog switches 104 at both ends of one block have the same characteristics as those in FIG.

[0064]

According to the liquid crystal display device of the present invention, the length of the wiring formed of the second wiring material connecting the upper analog switch and the video signal line and the same data bus line as the upper analog switch are driven. Since the sum of the length of the wiring formed of the second wiring material connecting the lower analog switch and the video signal line is designed to be equal in each block, the signal passing frequency band of each analog switch must be equal. Thus, gradation generated for each block can be eliminated by an inexpensive manufacturing process.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a circuit configuration of a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is an enlarged plan view of a main part of the liquid crystal display device of FIG. 1;

FIG. 3 is a graph showing a signal passing frequency band of the liquid crystal display device of FIG. 1;

FIG. 4 is an enlarged plan view of a main part of a liquid crystal display device according to a second embodiment of the present invention.

FIG. 5 is an enlarged plan view of a main part of a liquid crystal display according to a third embodiment of the present invention.

FIG. 6 is a diagram showing a circuit configuration of a conventional liquid crystal display device.

7 is an enlarged plan view of a main part of the liquid crystal display device of FIG. 6;

FIG. 8 is a diagram illustrating a signal passing frequency band of the liquid crystal display device of FIG. 6;

FIG. 9 is a sectional view taken along line ab and cd of FIGS. 2 and 7;

FIG. 10 is a sectional view taken along line ef and gh in FIG. 4;

FIG. 11 is a sectional view taken along line ij and line km of FIG. 5;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Active matrix liquid crystal display part 102 Vertical drive circuit 103 Horizontal scanning circuit 104 Analog switch 105 Video signal line 106 First wiring material 107 Second wiring material 901 Semiconductor thin film 902 Source region 903 Drain region 904 Gate insulating film 905 Interlayer film 906 Passivation film 907 Insulating substrate 4a-4n contact 4p-4s contact

Claims (4)

(57) [Claims] 1. A liquid crystal display device with a built-in driving circuit in which a plurality of analog switches are simultaneously selected and horizontal driving circuits for writing a plurality of video signals to data bus lines are vertically arranged redundantly. A second connecting the upper and lower analog switches to be driven and the video signal line made of the first wiring material
A signal passing frequency band of the analog switch is made uniform over the entire display screen by making the sum of the lengths of the upper and lower connection wirings made of the wiring material equal regardless of the location. 2. The liquid crystal display device according to claim 1, wherein said analog switch comprises a thin film transistor. 3. The liquid crystal display device according to claim 1, wherein the first wiring material is formed of aluminum. 4. The liquid crystal display device according to claim 1, wherein said second wiring material is formed of impurity-doped polycrystalline silicon.