JP2778432B2 - Dielectric filter - Google Patents
Dielectric filterInfo
- Publication number
- JP2778432B2 JP2778432B2 JP5301565A JP30156593A JP2778432B2 JP 2778432 B2 JP2778432 B2 JP 2778432B2 JP 5301565 A JP5301565 A JP 5301565A JP 30156593 A JP30156593 A JP 30156593A JP 2778432 B2 JP2778432 B2 JP 2778432B2
- Authority
- JP
- Japan
- Prior art keywords
- dielectric
- conductor
- dielectric substrate
- notch
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【０００１】[0001]
【産業上の利用分野】本発明は携帯電話や無線電話の通
信機器等に搭載される誘電体フィルタに関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dielectric filter mounted on a communication device such as a portable telephone or a radio telephone.
【０００２】[0002]
【従来の技術】以下、従来の誘電体フィルタについて説
明する。2. Description of the Related Art A conventional dielectric filter will be described below.
【０００３】図４，図５はそれぞれ従来の誘電体フィル
タを示す斜視図及び分解斜視図である。図４，図５にお
いて、１，２はそれぞれ誘電体共振器、１ａ，２ａはそ
れぞれ誘電体材料で構成された誘電体基体で、誘電体基
体１ａ，２ａには貫通孔１ｂ，２ｂがそれぞれ設けら
れ、誘電体基体１ａ，２ａそれぞれの外周部には外導体
１ｃ，２ｃがそれぞれ設けられており、更に貫通孔１
ｂ，２ｂにはそれぞれ内導体１ｄ，２ｄが設けられてい
る。FIGS. 4 and 5 are a perspective view and an exploded perspective view showing a conventional dielectric filter, respectively. 4 and 5, reference numerals 1 and 2 denote dielectric resonators, and reference numerals 1a and 2a denote dielectric substrates each formed of a dielectric material. Dielectric substrates 1a and 2a are provided with through holes 1b and 2b, respectively. Outer conductors 1c and 2c are provided on the outer peripheral portions of the dielectric substrates 1a and 2a, respectively.
b and 2b are provided with inner conductors 1d and 2d, respectively.
【０００４】又、外導体１ｃ，２ｃと内導体１ｄ，２ｄ
とをそれぞれ電気的に連結する連結導体１ｅ，２ｅをそ
れぞれの誘電体基体１ａ，１ｂの一方の端面に設けられ
ている。また誘電体基体１ａ，２ａのそれぞれの３つの
外側面に他の外導体部分と接触しないように、段間結合
用の電極１ｆ，２ｆ、及び入出力結合用の電極１ｇ，１
ｈ，２ｇ，２ｈを設けている。さらに、段間結合用の電
極１ｆ，２ｆ及び外導体１ｉ，２ｉは、クリーム半田等
の導電性接合材によって互いに電気的、機械的に接合さ
れ、２段のフィルタを構成している。Further, outer conductors 1c and 2c and inner conductors 1d and 2d
Are provided on one end face of each of the dielectric substrates 1a and 1b. Also, the three outer surfaces of the dielectric substrates 1a and 2a do not come into contact with other outer conductors, so that the electrodes 1f and 2f for interstage coupling and the electrodes 1g and 1 for input / output coupling are provided.
h, 2g, and 2h. Further, the inter-stage coupling electrodes 1f, 2f and the outer conductors 1i, 2i are electrically and mechanically joined to each other by a conductive joining material such as cream solder to form a two-stage filter.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、前記従
来の構成では、フィルタの帯域幅は段間結合用導体の面
積の大きさ（結合容量）により決定され、フィルタが小
型化になると前記段間結合用導体の面積を大きくでき
ず、広帯域フィルタを実現することは困難で、また前記
段間結合用導体の面積を大きくすると共振器の共振周波
数が高くなり、フィルタを構成した場合、形状が大きく
なるという問題点があった。However, in the above-mentioned conventional configuration, the bandwidth of the filter is determined by the size (coupling capacitance) of the area of the inter-stage coupling conductor. It is difficult to realize a wide-band filter because the area of the conductor for connection cannot be increased, and if the area of the inter-stage coupling conductor is increased, the resonance frequency of the resonator increases, and when the filter is formed, the shape increases. There was a problem.
【０００６】本発明は前記従来の課題を解決するもの
で、小型で広帯域化でき、量産性に優れた誘電体フィル
タを提供することを目的としている。An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a dielectric filter which is small in size, can have a wide band, and is excellent in mass productivity.
【０００７】[0007]
【課題を解決するための手段】この目的を達成するため
に、請求項１に係る発明では、角柱状の誘電体基体の外
側面，内側面，一方の端面にそれぞれ外導体，内導体，
連結導体をそれぞれ設け、更に誘電体基体の外側面に第
１の切欠部を設けることによって外導体と非接触となる
ように段間結合用電極を設け、第１の切欠部を誘電体基
体の２つの外側面に渡って設けた。請求項２に係る発明
では、請求項１において、接合用電極を外導体と接触し
ないように第２の切欠部を誘電体基体の２つの外側面に
渡って設けた。請求項３に係る発明では、請求項２にお
いて、接合用電極も誘電体基体の２つの外側面に渡って
設けた。請求項４に係る発明では、請求項１において、
誘電体基体の表面を粗面化した。請求項５に係る発明で
は、請求項４において、更にエッチング処理を施した。 In order to achieve the above object, according to the first aspect of the present invention, the outer surface of the prismatic dielectric substrate is provided.
The outer conductor, inner conductor,
A connecting conductor is provided for each, and a second
Non-contact with outer conductor by providing one notch
And the first cutout is made of a dielectric substrate.
It was provided over the two outer surfaces of the body. Invention according to claim 2
Then, in claim 1, the bonding electrode is brought into contact with the outer conductor.
So that the second notch is not formed on the two outer surfaces of the dielectric substrate.
Provided across. According to the third aspect of the present invention,
And the bonding electrode extends over the two outer surfaces of the dielectric substrate.
Provided. In the invention according to claim 4, in claim 1,
The surface of the dielectric substrate was roughened. In the invention according to claim 5,
Was further subjected to an etching treatment.
【０００８】[0008]
【作用】請求項１に係る発明によって、段間結合用電極
は外導体によって四方を囲まれていないので、外導体と
の間の容量を低減させることができ、広帯域のフィルタ
特性の妨げとなる外導体と段間結合用電極との容量を低
減させることができ、しかも中心導体等を省略すること
ができる。請求項２に係る発明によって、接続用電極と
回路基板に形成された電極をハンダなどの接合材によっ
て接合する際に、その接合材による接続用電極と外導体
との電気的接続を防止できる。請求項３に係る発明によ
って、誘電体フィルタの回路基板との接合面に接続用電
極を延在出来る。請求項４に係る発明では、比較的形成
面積の小さな接続用電極及び段間結合用電極と誘電体基
体の接合強度を向上させることが出来る。請求項５に係
る発明では、誘電体基体表面部位に付着などしている変
質物を取り除くことができる。 According to the first aspect of the present invention, an electrode for interstage coupling is provided.
Is not surrounded on all sides by the outer conductor,
The capacitance between the can be reduced and the broadband filter
Reduce the capacitance between the outer conductor and
Can be reduced and the central conductor, etc., can be omitted.
Can be. According to the invention of claim 2, the connection electrode and
The electrodes formed on the circuit board are
When joining by joining, the connecting electrode and outer conductor by the joining material
Electrical connection with the battery can be prevented. According to the invention of claim 3
The connection surface of the dielectric filter with the circuit board.
The poles can be extended. According to the fourth aspect of the present invention, the relatively formed
Small-area connection and interstage coupling electrodes and dielectric substrate
The joint strength of the body can be improved. Claim 5
In the invention described above, there is no change in the adhesion to the surface of the dielectric substrate.
The substance can be removed.
【０００９】[0009]
【実施例】図１及び図２はそれぞれ本発明の一実施例に
おける誘電体フィルタを示す斜視図及び分解斜視図であ
る。図１，図２において、１１，１２はそれぞれ誘電体
共振器である。以下、誘電体共振器の構造について、誘
電体共振器１１を用いて説明する。ＢａＯ−ＴｉＯ2−
Ｎｄ2Ｏ3，ＢａＯ−ＴｉＯ2，ＺｎＯ2−ＳｎＯ2−Ｔｉ
Ｏ2，ＢａＯ−Ｓｍ2Ｏ3−ＴｉＯ2，Ｌｎ2Ｏ3−ＢａＯ−
ＴｉＯ2系等の誘電体材料で構成された誘電体基体１１
ａに貫通孔１１ｂを設ける。1 and 2 are a perspective view and an exploded perspective view, respectively, showing a dielectric filter according to an embodiment of the present invention. 1 and 2, reference numerals 11 and 12 denote dielectric resonators, respectively. Hereinafter, the structure of the dielectric resonator will be described using the dielectric resonator 11. BaO-TiO 2-
Nd 2 O 3, BaO-TiO 2, ZnO 2 -SnO 2 -Ti
O 2 , BaO—Sm 2 O 3 —TiO 2 , Ln 2 O 3 —BaO—
Dielectric substrate 11 made of a dielectric material such as TiO 2
a is provided with a through hole 11b.
【００１０】この時誘電体基体１１ａの外形形状は方形
であり、貫通孔１１ｂは断面円筒型に形成されている。
誘電体基体１１ａの外側面には外導体１１ｃが設けられ
ており、貫通孔１１ｂを構成する内側面には内導体１１
ｄが設けられている。外導体１１ｃと内導体１１ｄは一
方の端面に設けられた連結導体１１ｅによって連結され
ている。また誘電体基体１１ａの４つの外側面の内、外
側面１１ｉの開放端１１ｊ側に誘電体基体１１ａがむき
出しになるように切欠部１１ｋが設けられている。At this time, the outer shape of the dielectric substrate 11a is rectangular, and the through-hole 11b is formed in a cylindrical cross section.
An outer conductor 11c is provided on an outer surface of the dielectric substrate 11a, and an inner conductor 11c is provided on an inner surface forming the through hole 11b.
d is provided. The outer conductor 11c and the inner conductor 11d are connected by a connecting conductor 11e provided on one end surface. A cutout 11k is provided on the open end 11j side of the outer surface 11i of the four outer surfaces of the dielectric substrate 11a so that the dielectric substrate 11a is exposed.
【００１１】さらに外側面１１ｉに接し、かつその外側
面１１ｉに直行する外側面１１ｌの開放端１１ｊ側には
段間結合用の電極１１ｆが設けられており、しかも電極
１１ｆは外導体１１ｃと接触しない様に外側面１１ｌに
設けられた切欠溝部１１ｏの中に設けられている。Further, an electrode 11f for interstage coupling is provided on the open end 11j side of the outer surface 11l which is in contact with the outer surface 11i and is perpendicular to the outer surface 11i, and the electrode 11f is in contact with the outer conductor 11c. It is provided in a notched groove 11o provided on the outer side surface 11l so as not to be disturbed.
【００１２】さらに、外側面１１ｍ，１１ｎの開放端１
１ｊ側に、しかもそれぞれの面に渡って入出力結合用の
電極１１ｇ，１１ｈが設けられており、更に電極１１
ｇ，１１ｈは外導体１１ｃと接触しないように外側面１
１ｍ，１１ｎに渡って設けられた切欠溝部１１ｐ中に設
けられている。Further, the open ends 1 of the outer surfaces 11m and 11n
On the 1j side, and over the respective surfaces, electrodes 11g and 11h for input / output coupling are provided.
g and 11h are on the outer surface 1 so as not to contact the outer conductor 11c.
It is provided in a cutout groove 11p provided over 1m and 11n.
【００１３】誘電体共振器１２も誘電体共振器１１とほ
ぼ同じ構成を有している。すなわち誘電体基体１２ａ，
貫通孔１２ｂ，外導体１２ｃ，内導体１２ｄ，連結導体
１２ｅ，段間結合用の電極１２ｆ，入出力結合用の電極
１２ｇ，１２ｈ，外側面１２ｉ，１２ｌ，１２ｍ，１２
ｎ，開放端１２ｊ，切欠部１２ｋ，切欠溝部１２ｏ，１
２ｐで構成されている。誘電体共振器１１と誘電体共振
器１２はアルファベットに対応している部分（例えば誘
電体基体１１ａと誘電体基体１２ａ）はほぼ同じ構成と
なっている。ほぼ同じ構成と記述したのは、図２からも
分かるように、誘電体共振器１１と誘電体共振器１２は
互いに鏡面対称の関係になっているからである。従って
電極１１ｆ，１１ｇ，１１ｈの形成位置と電極１２ｆ，
１２ｇ，１２ｈの形成位置を注意しなければならない。The dielectric resonator 12 has substantially the same configuration as the dielectric resonator 11. That is, the dielectric substrate 12a,
Through-hole 12b, outer conductor 12c, inner conductor 12d, connecting conductor 12e, interstage coupling electrode 12f, input / output coupling electrode 12g, 12h, outer surface 12i, 121, 12m, 12
n, open end 12j, notch 12k, notch groove 12o, 1
It is composed of 2p. The portions of the dielectric resonator 11 and the dielectric resonator 12 corresponding to the alphabets (for example, the dielectric base 11a and the dielectric base 12a) have substantially the same configuration. The reason why the dielectric resonators are described as having substantially the same configuration is that the dielectric resonator 11 and the dielectric resonator 12 have a mirror-symmetric relationship with each other, as can be seen from FIG. Therefore, the formation positions of the electrodes 11f, 11g, 11h and the electrodes 12f,
Care must be taken in the formation positions of 12g and 12h.
【００１４】誘電体共振器１１と誘電体共振器１２は段
間結合用の電極１１ｆと電極１２ｆが対向するように突
き合わせてクリーム半田等で互いに接合した際に、電極
１１ｇ，１１ｈ及び電極１２ｇ，１２ｈがそれぞれ同一
面を向くようになっている。When the dielectric resonator 11 and the dielectric resonator 12 are joined to each other with cream solder or the like while the inter-stage coupling electrode 11f and the electrode 12f are opposed to each other, the electrodes 11g, 11h and 12g, 12h face the same plane.
【００１５】これは前述の様にこれら誘電体共振器１
１，１２が互いに鏡面対称の関係になっているからであ
る。This is because these dielectric resonators 1
This is because 1 and 12 have a mirror-symmetrical relationship with each other.
【００１６】また外導体１１ｃ，１２ｃ，内導体１１
ｄ，１２ｄ，連結導体１１ｅ，１２ｅ電極１１ｆ，１２
ｆ，電極１１ｇ，１１ｈ，１２ｆ，１２ｇ，（以下これ
らの膜を導体膜と総称する。）それぞれは、銅や銀等の
導電材料で構成された薄膜で構成されており、その膜厚
は５μｍ程度となるように形成される。本実施例では、
導体膜を１層で構成したが、２層以上の多層にしてもよ
い。さらに膜厚は５μｍ程度としたが、フィルタの使用
条件等によって膜厚は適宜決定しなければならない。The outer conductors 11c, 12c and the inner conductor 11
d, 12d, connecting conductors 11e, 12e electrodes 11f, 12
f, electrodes 11g, 11h, 12f, 12g (hereinafter, these films are collectively referred to as conductive films) are each formed of a thin film made of a conductive material such as copper or silver, and have a thickness of 5 μm. It is formed so that it is about. In this embodiment,
Although the conductor film is composed of one layer, it may be composed of two or more layers. Further, the film thickness was set to about 5 μm, but the film thickness must be appropriately determined depending on the conditions of use of the filter and the like.
【００１７】図３は本発明の一実施例での切欠部１１
ｋ，１２ｋの面積Ｓの大きさ（図ではＺ１×Ｚ２で示さ
れる面積）による段間結合度Ｋとの関係を示すグラフで
ある。FIG. 3 shows a notch 11 according to an embodiment of the present invention.
9 is a graph showing the relationship between the inter-stage coupling degree K according to the size of the area S of k and 12k (the area indicated by Z1 × Z2 in the figure).
【００１８】図３から判るように切欠部１１ｋ，１２ｋ
の面積Ｓが大きくなると、段間結合度Ｋも大きくなる。
また従来例に比べ段間結合度Ｋを大きくでき、広帯域フ
ィルタを構成することができる。As can be seen from FIG. 3, notches 11k and 12k
Increases, the degree of inter-stage coupling K also increases.
Further, the degree of inter-stage coupling K can be increased as compared with the conventional example, and a wideband filter can be configured.
【００１９】以上の様に構成された誘電体フィルタにつ
いて以下その製造方法を説明する。まず原材料（Ｂａ
Ｏ，ＴｉＯ2，Ｎｄ2Ｏ3等）を所定量つづ配合し、この
配合物をミル等を用いて混合する。次にこの混合物をス
プレードライヤー等を用いて粒度の調整及びバインダー
の添加を行い、造粒する。次に造粒物を乾式プレスを用
いて所定の形状に成形し、その成形物を焼成炉で１３０
０℃〜１４００℃の温度で焼結させ、筒型の誘電体基体
１１ａを作製する。次に誘電体基体１１ａ上に導体膜を
形成する。まず導体膜を形成する場合には、さまざまな
形成方法があるので、数例を挙げて説明する。Hereinafter, a method of manufacturing the dielectric filter having the above configuration will be described. First, raw materials (Ba
O, TiO 2 , Nd 2 O 3, etc.) are mixed in a predetermined amount, and this mixture is mixed using a mill or the like. Next, the mixture is granulated by adjusting the particle size and adding a binder using a spray dryer or the like. Next, the granulated product is formed into a predetermined shape by using a dry press, and the formed product is placed in a firing furnace at 130 ° C.
Sintering is performed at a temperature of 0 ° C. to 1400 ° C. to produce a cylindrical dielectric substrate 11a. Next, a conductor film is formed on the dielectric substrate 11a. First, in the case of forming a conductive film, there are various forming methods.
【００２０】まず第１の方法として、導体膜を構成する
材料に銅を用いた時について説明する。誘電体基体１１
ａの表面をバレル研磨機やブラスト装置によって粗面化
し、その後に誘電体基体１１ａにエッチング処理を施し
て、誘電体基体１１ａの表面粗度を５μｍ〜９μｍ程度
に調整する。この時エッチング液としては例えばＨＦ−
ＨＮＯ2系のものを用いる。次に誘電体基体１１ａの全
表面を塩化第１錫等を用いて感受性化処理を行った後
に、全表面に触媒金属となるパラジウムを付着させ、誘
電体基体１１ａの一部にレジスト膜を形成する。First, as a first method, a case where copper is used as a material forming a conductive film will be described. Dielectric substrate 11
The surface of a is roughened by a barrel polisher or a blasting device, and thereafter, the dielectric substrate 11a is subjected to an etching treatment to adjust the surface roughness of the dielectric substrate 11a to about 5 μm to 9 μm. At this time, for example, HF-
HNO 2 type is used. Next, after sensitizing the entire surface of the dielectric substrate 11a using stannous chloride or the like, palladium as a catalytic metal is adhered to the entire surface, and a resist film is formed on a part of the dielectric substrate 11a. I do.
【００２１】すなわち誘電体基体１１ａの導体膜が付着
してはならない部分（将来、切欠部１１ｋ，切欠溝部１
１ｏ，切欠溝部１１ｐとなる部分）にレジスト膜を形成
する。レジスト膜はレジストインクを印刷技術や転写技
術等を用いて誘電体基体１１ａ上に塗布し、その塗布し
たレジストインクを乾燥硬化させる事によって形成され
る。次にこの様に加工された誘電体基体１１ａを無電解
銅鍍金法を用いて、誘電体基体１１ａ上に薄い第１の銅
膜を形成する。この時第１の銅膜はレジスト膜が形成さ
れていない部分のみに選択的に形成される。That is, the portion of the dielectric substrate 11a to which the conductor film must not adhere (the notch 11k, the notch 1
1o, a part to be the notch groove 11p). The resist film is formed by applying a resist ink on the dielectric substrate 11a using a printing technique, a transfer technique, or the like, and drying and curing the applied resist ink. Next, a thin first copper film is formed on the dielectric substrate 11a thus processed by using an electroless copper plating method. At this time, the first copper film is selectively formed only on the portion where the resist film is not formed.
【００２２】次に電解銅鍍金にて第１の銅膜の上に第２
の銅膜を積層し、導体膜を形成する。この時導体膜は５
μｍ程度になるように形成する。そして最後にレジスト
膜を溶剤等で溶かしだして、電極を形成する。なおこの
製造方法ではレジスト膜を印刷で誘電体基体１１ａの所
定の位置にレジストインクを塗布した後に乾燥硬化させ
る方法で形成したけれども、レジストとして感光性レジ
ストを用いる方法もある。すなはちパラジウム等の触媒
金属を誘電体基体１１ａに付着させた後に、誘電体基体
１１ａ全表面に感光性レジストを塗布し、露光させて所
定の部分の感光性レジストのみを硬化させる。そして現
像剤によって、感光性レジストが硬化していない部分を
洗い流し、所定の電極を形成する。Next, a second copper film is formed on the first copper film by electrolytic copper plating.
Are laminated to form a conductor film. At this time, the conductor film is 5
It is formed to have a thickness of about μm. Finally, the resist film is dissolved with a solvent or the like to form an electrode. In this manufacturing method, the resist film is formed by applying a resist ink to a predetermined position of the dielectric substrate 11a by printing and then drying and curing the resist ink, but there is also a method of using a photosensitive resist as the resist. That is, after a catalytic metal such as palladium is adhered to the dielectric substrate 11a, a photosensitive resist is applied to the entire surface of the dielectric substrate 11a and is exposed to light to cure only a predetermined portion of the photosensitive resist. Then, a portion where the photosensitive resist has not been cured is washed away with a developer to form a predetermined electrode.
【００２３】他の方法としては、Ａｇペーストを誘電体
基体１１ａ全表面に印刷またはデップ法でと塗布し、乾
燥した後に８００℃〜９００℃の温度で熱処理を行う事
によって、導体膜を誘電体基体１１ａの全表面に形成し
てもよい。さらに全表面導体膜形成後、ケミカルエッチ
ング、ドライエッチング等のエッチング技術を用いて不
要部分の導体膜を削除し、所定の電極を形成してもよ
い。As another method, an Ag paste is applied to the entire surface of the dielectric substrate 11a by printing or dipping, dried, and then subjected to a heat treatment at a temperature of 800 ° C. to 900 ° C. so that the conductive film is made of a dielectric material. It may be formed on the entire surface of the base 11a. Further, after the formation of the entire surface conductor film, unnecessary portions of the conductor film may be removed by using an etching technique such as chemical etching or dry etching to form a predetermined electrode.
【００２４】また別の方法として、誘電体基体１１ａ全
表面に導体膜を形成した後に、切削加工やレーザー加工
等を施して、物理的に除去して、所定の電極を形成す
る。As another method, after a conductive film is formed on the entire surface of the dielectric substrate 11a, a cutting process, a laser process, or the like is performed to physically remove the conductive film, thereby forming a predetermined electrode.
【００２５】上述の様に構成した誘電体共振器１１と誘
電体共振器１２を電極１１ｆと電極１２ｆが対向するよ
うに突合せ、クリーム半田等で外導体１１ｃ，と外導体
１２ｃを接合するとともに、電極１１ｆと電極１２ｆを
それぞれクリーム半田等の接合材によって接合する。The dielectric resonator 11 and the dielectric resonator 12 constructed as described above are joined so that the electrodes 11f and 12f face each other, and the outer conductors 11c and 12c are joined by cream solder or the like. The electrode 11f and the electrode 12f are respectively bonded by a bonding material such as cream solder.
【００２６】なお本実施例では、切欠部１１ｋ，１２ｋ
を図１に示す様に設けたけれども、切欠部１１ｋ，１２
ｋは少なくとも開放端ｍに達する様に形成すればよい。
更に本実施例では、誘電体共振器１１，１２それぞれに
切欠部１１ｋ，１２ｋを設けたけれども、少なくとも一
方の誘電体共振器に設けてもよい。In this embodiment, the notches 11k, 12k
Although notches are provided as shown in FIG.
k may be formed so as to reach at least the open end m.
Further, in the present embodiment, the notch portions 11k and 12k are provided in the dielectric resonators 11 and 12, respectively, but may be provided in at least one of the dielectric resonators.
【００２７】[0027]
【発明の効果】請求項１に係る発明では、角柱状の誘電
体基体の外側面，内側面，一方の端面にそれぞれ外導
体，内導体，連結導体をそれぞれ設け、更に誘電体基体
の外側面に第１の切欠部を設けることによって外導体と
非接触となるように段間結合用電極を設け、第１の切欠
部を誘電体基体の２つの外側面に渡って設けたことによ
って、段間結合用電極と外導体間の容量を低減させるこ
とができるので、段間結合度を大きくすることができ、
広帯域のフィルタが製造できる。しかも中心導体等を省
略することができるので、フィルタの小型化を行うこと
ができ、しかも部品点数が減るので、生産性が向上し、
しかもコスト的に有利になる。請求項２に係る発明で
は、請求項１において、接合用電極を外導体と接触しな
いように第２の切欠部を誘電体基体の２つの外側面に渡
って設けたことによって、接続用電極と回路基板に形成
された電極をハンダなどの接合材によって接合する際
に、その接合材による接続用電極と外導体との電気的接
続を防止できるので、特性劣化やフィルタ自体が全く機
能しないなどの不具合を低減させることができる。請求
項３に係る発明では、請求項２において、接合用電極も
誘電体基体の２つの外側面に渡って設けたことによっ
て、誘電体フィルタの回路基板との接合面に接続用電極
を延在出来るので、回路基板上の電極と接続用電極を確
実に当接できるので、実装性を向上させることが出来
る。請求項４に係る発明では、請求項１において、誘電
体基体の表面を粗面化したことによって、比較的形成面
積の小さな接続用電極及び段間結合用電極と誘電体基体
の接合強度を向上させることが出来るので、接続用電極
などの剥がれを防止でき、特性劣化を防止できるととも
に段間結合用電極の形成面積が非常に小さくなっても、
十分な接合強度を得ることができ、フィルタの小型化を
実現できる。請求項５に係る発明では、請求項４におい
て、更にエッチング処理を施したことによって、誘電体
基体表面部位に付着などしている変質物を取り除くこと
ができるので、フィルタのＱ値劣化を防止できる。 According to the first aspect of the present invention, a prismatic dielectric is provided.
Outer conductors on the outer surface, inner surface, and one end surface of the body
Body, inner conductor, connecting conductor, and a dielectric substrate
By providing a first notch on the outer surface of the
An interstage coupling electrode is provided so as to be in non-contact, and the first notch
Part is provided over the two outer surfaces of the dielectric substrate.
Therefore, the capacitance between the inter-stage coupling electrode and the outer conductor can be reduced.
Can increase the degree of coupling between stages,
Broadband filters can be manufactured. Moreover, the central conductor etc. are omitted
It is possible to reduce the size of the filter because it can be omitted
And the number of parts is reduced, improving productivity,
Moreover, it is advantageous in cost. With the invention according to claim 2
Does not contact the bonding electrode with the outer conductor in claim 1.
The second notch to the two outer surfaces of the dielectric substrate
Formed on the connection electrode and the circuit board
The joined electrodes with a joining material such as solder
The electrical connection between the connection electrode and the outer conductor
Characteristics, and the filter itself is completely functional.
Inconveniences such as inoperability can be reduced. Claim
In the invention according to claim 3, in claim 2, the bonding electrode is also provided.
The provision over the two outer surfaces of the dielectric substrate
Connection electrode on the joint surface of the dielectric filter with the circuit board.
The electrodes on the circuit board and the connection electrodes can be
Because it can actually contact, it is possible to improve the mountability
You. According to a fourth aspect of the present invention, in the first aspect, the dielectric
Due to the roughened surface of the body substrate, a relatively formed surface
Connecting electrode and interstage coupling electrode with small product and dielectric substrate
Connection electrode because the bonding strength of
Can be prevented from peeling off, and characteristic deterioration can be prevented.
Even if the formation area of the inter-step coupling electrode becomes very small,
Sufficient bonding strength can be obtained, and filter size can be reduced.
realizable. In the invention according to claim 5, the invention according to claim 4
In addition, by performing further etching treatment,
Removal of alterations adhering to the surface of the substrate
Therefore, deterioration of the Q value of the filter can be prevented.
【図１】本発明の一実施例における誘電体フィルタの全
体斜視図FIG. 1 is an overall perspective view of a dielectric filter according to an embodiment of the present invention.
【図２】本発明の一実施例における誘電体フィルタを示
す分解斜視図FIG. 2 is an exploded perspective view showing a dielectric filter according to one embodiment of the present invention.
【図３】本発明の一実施例における切欠部の面積Ｓと段
間結合度Ｋとの関係を示すグラフFIG. 3 is a graph showing a relationship between the area S of a notch and the degree of inter-step coupling K in one embodiment of the present invention.
【図４】従来の誘電体フィルタを示す斜視図FIG. 4 is a perspective view showing a conventional dielectric filter.
【図５】従来の誘電体フィルタを示す分解斜視図FIG. 5 is an exploded perspective view showing a conventional dielectric filter.
１１，１２ 誘電体共振器 １１ａ，１２ａ 誘電体基体 １１ｂ，１２ｂ 貫通孔 １１ｃ，１２ｃ 外導体 １１ｄ，１２ｄ 内導体 １１ｅ，１２ｅ 連結導体 １１ｆ，１１ｇ，１１ｈ，１２ｆ，１２ｇ，１２ｈ 電
極 １１ｉ，１１ｌ，１１ｍ，１１ｎ，１２ｉ，１２ｌ，１
２ｍ，１２ｎ 外側面 １１ｊ，１２ｊ 開放端 １１ｋ，１２ｋ 切欠部 １１ｏ，１１ｐ，１２ｏ，１２ｐ 切欠溝部11, 12 Dielectric resonator 11a, 12a Dielectric substrate 11b, 12b Through hole 11c, 12c Outer conductor 11d, 12d Inner conductor 11e, 12e Connecting conductor 11f, 11g, 11h, 12f, 12g, 12h Electrode 11i, 11l, 11m , 11n, 12i, 121, 1
2m, 12n Outer surface 11j, 12j Open end 11k, 12k Notch 11o, 11p, 12o, 12p Notch groove
フロントページの続き (56)参考文献 特開 昭64−37101（ＪＰ，Ａ) 特開 平４−150101（ＪＰ，Ａ) 特開 平４−126404（ＪＰ，Ａ) (58)調査した分野(Int.Cl.6，ＤＢ名) H01P 1/20 - 1/219 H01P 7/00 - 7/10 H01P 5/08Continuation of front page (56) References JP-A-64-37101 (JP, A) JP-A-4-150101 (JP, A) JP-A-4-126404 (JP, A) (58) Fields investigated (Int .Cl. 6 , DB name) H01P 1/20-1/219 H01P 7/00-7/10 H01P 5/08
Claims (5)
誘電体基体の外側面に設けられた外導体と、前記誘電体
基体の内側面に設けられた内導体と、前記誘電体基体の
一方の端面に設けられ、前記外導体と前記内導体を連結
する連結導体と、前記誘電体基体の他方の端面に設けら
れた開放端と、前記誘電体基体の第１の外側面上に第１
の切欠部を設けることによって前記外導体と非接触に設
けられた段間結合用電極と、前記第１の外側面と反対側
の第２の外側面上に第２の切欠部を設けることによって
前記外導体と非接触に設けられた接続用電極とを有し、
前記第１の切欠部と前記第２の切欠部は連続しておら
ず、しかも前記第１の切欠部が前記開放端まで達してお
り、しかも前記第１の切欠部は前記第１の外側面と前記
第２の外側面それぞれに隣接する第３の外側面まで延在
させた誘電体共振器を一対備え、前記一対の誘電体共振
器それぞれの段間結合用電極同士を電気的に接続した事
を特徴とする誘電体フィルタ。A cylindrical prismatic dielectric substrate; an outer conductor provided on an outer surface of the dielectric substrate; an inner conductor provided on an inner surface of the dielectric substrate; A connecting conductor provided on one end face of the body base for connecting the outer conductor and the inner conductor, an open end provided on the other end face of the dielectric base body, and a first outer face of the dielectric base body First on
By providing the interstage coupling electrode provided in a non-contact manner with the outer conductor by providing the notch portion, and providing the second notch portion on the second outer surface opposite to the first outer surface. Having a connection electrode provided in a non-contact manner with the outer conductor,
The first notch and the second notch are not continuous, and the first notch reaches the open end, and the first notch is the first outer surface. a pair of third dielectric resonators extended to an outer surface adjacent to each of the second outer surface and said pair of dielectric resonator
Dielectric filter according to claim <br/> that electrically connecting the vessel respective interstage coupling electrodes to each other.
側面それぞれと隣接した第４の外側面上の外導体まで達
していることを特徴とする請求項１記載の誘電体フィル
タ。2. The second cutout has a first outer surface and a second outer surface.
To the outer conductor on the fourth outer side adjacent to each side
Dielectric filter according to claim 1, characterized in that it.
用電極を設けたことを特徴とする請求項２記載の誘電体
フィルタ。3. A connection across the first outer surface and the fourth outer surface.
3. The dielectric filter according to claim 2, further comprising an electrode for use .
徴とする請求項１記載の誘電体フィルタ。4. A dielectric filter according to claim 1, characterized in that facilities the roughening treatment to the dielectric substrate.
チング処理を施したことを特徴とする請求項４記載の誘
電体フィルタ。5. The method according to claim 1, wherein the surface of the dielectric substrate is roughened.
The dielectric filter according to claim 4 , wherein a ching process is performed .
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5301565A JP2778432B2 (en) | 1993-12-01 | 1993-12-01 | Dielectric filter |
| US08/202,073 US5499004A (en) | 1993-03-12 | 1994-02-25 | Dielectric filter having interstage coupling using adjacent electrodes |
| GB9404402A GB2276041B (en) | 1993-03-12 | 1994-03-07 | Dielectric filter |
| DE4408333A DE4408333C2 (en) | 1993-03-12 | 1994-03-11 | Dielectric filter |
| US08/511,238 US5818312A (en) | 1993-03-12 | 1995-08-04 | Dielectric filter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5301565A JP2778432B2 (en) | 1993-12-01 | 1993-12-01 | Dielectric filter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07154105A JPH07154105A (en) | 1995-06-16 |
| JP2778432B2 true JP2778432B2 (en) | 1998-07-23 |
Family
ID=17898474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5301565A Expired - Fee Related JP2778432B2 (en) | 1993-03-12 | 1993-12-01 | Dielectric filter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2778432B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5721520A (en) * | 1995-08-14 | 1998-02-24 | Motorola, Inc. | Ceramic filter with ground plane features which provide transmission zero and coupling adjustment |
| KR100340405B1 (en) * | 1999-08-25 | 2002-06-12 | 이형도 | A duplexer dielectric filter |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH063842B2 (en) * | 1987-07-31 | 1994-01-12 | 株式会社村田製作所 | Microwave filter |
| JPH04150101A (en) * | 1990-10-08 | 1992-05-22 | Murata Mfg Co Ltd | Dielectric resonator |
| JPH04126404U (en) * | 1991-04-30 | 1992-11-18 | 株式会社村田製作所 | Integrated dielectric resonator |
-
1993
- 1993-12-01 JP JP5301565A patent/JP2778432B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH07154105A (en) | 1995-06-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6516503B1 (en) | Method of making surface acoustic wave device | |
| US20010029648A1 (en) | Method of manufacturing surface acoustic wave apparatuses | |
| JPH098506A (en) | Band stop filter | |
| JP2004180032A (en) | Dielectric filter | |
| JP2778432B2 (en) | Dielectric filter | |
| JP2851966B2 (en) | Multilayer dielectric filter | |
| JP2907010B2 (en) | Dielectric filter | |
| JP2780591B2 (en) | Dielectric filter | |
| JPH0472804A (en) | Strip line filter | |
| JP3522097B2 (en) | Stacked stripline resonator | |
| JP3176859B2 (en) | Dielectric filter | |
| JPH0760962B2 (en) | Planar dielectric filter | |
| JP2011217357A (en) | Bias circuit | |
| JP2869258B2 (en) | Method for manufacturing dielectric resonator and filter | |
| JP3306331B2 (en) | Dielectric filter | |
| JP2002261507A (en) | Dielectric filter and antenna shared apparatus using the same, and communications equipment | |
| JP2912751B2 (en) | Dielectric coaxial resonator | |
| JP2810621B2 (en) | Multilayer dielectric filter | |
| JP2000306763A (en) | Laminated ceramic capacitor and manufacture thereof | |
| JP2002141715A (en) | Multilayered strip line resonator | |
| JPH11195554A (en) | Multilayered ceramic electronic device and production of the same | |
| JP2003224405A (en) | Dielectric filter | |
| JP3286847B2 (en) | Dielectric resonator, dielectric filter, dielectric duplexer, and method of manufacturing dielectric resonator | |
| JPH11274813A (en) | Dielectric filter and its manufacture | |
| JPH0817673A (en) | Mica capacitor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090508 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100508 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100508 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110508 Year of fee payment: 13 |
|
| LAPS | Cancellation because of no payment of annual fees |