JP2689476B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

A semiconductor device in which at least a part of a channel region of an insulated gate field effect transistor is formed of a non-single crystal of amorphous, microcrystalline, or polycrystalline, for example, a-Si
(Amorphous silicon) TFT (thin film transistor), poly-S
i (polycrystalline silicon) TFTs and the like have been developed, applied to liquid crystal display panels and the like, and commercialized.

The a-Si TFT is formed by a plasma CVD method. plasma
A-Si formed by the CVD method contains several percent to several tens of percent in the film.
, Which terminates dangling bonds. Therefore, hydrogenation (that is, termination of dangling voids) of a-Si formed by the plasma CVD method is almost completed at the time of film formation. Therefore, even if hydrogenation is performed after film formation, there is no remarkable effect.

On the other hand, poly-Si TFT is a poly-Si TFT formed by CVD method.
Although Si is used as the element material, in this case, polo-Si is hardly hydrogenated at the time of film formation, and many traps exist at the crystal grain boundary portion. Therefore, poly-Si TF
As a method of greatly improving the characteristics of T, various hydrogenation methods such as hydrogen plasma treatment, hydrogen ion shower treatment, and hydrogen ion implantation have been studied. Among them, the plasma treatment with hydrogen or the like can be used as a device, which is a plasma CVD device that is widely used for a-Si film formation.
In addition, there are merits such as high mass productivity, and they are particularly attracting attention.

[Problems to be solved by the invention]

However, with conventional plasma treatment using hydrogen, etc.
The gate withstand voltage defect and the defect due to plasma damage such as Vth (threshold voltage) shift frequently occurred, which made practical application difficult.

Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor device, which secures the effect of plasma treatment with hydrogen or the like and eliminates the above-mentioned defects due to plasma damage.

[Means for solving the problem]

In order to solve the above problems, a method for manufacturing a semiconductor device of the present invention includes a step of forming an island-shaped non-single-crystal semiconductor layer on a substrate, and a step of forming an insulating film on the non-single-crystal semiconductor layer. A step of forming a conductive film on the insulating film, wherein the non-single crystal semiconductor layer is covered with the conductive film on the insulating film and the non-single crystal semiconductor layer, and the non-single crystal semiconductor layer is exposed to hydrogen or a halogen element in a plasma atmosphere. It is characterized by soaking in.

〔Example〕

FIG. 1 shows an example of a manufacturing process diagram of a semiconductor device in an embodiment of the present invention. Incidentally, FIG. 1 shows an example of a poly-Si TFT manufacturing process diagram.

In FIG. 1, (a) shows a method in which a polycrystalline silicon layer is formed on an insulating substrate 101 such as glass or quartz by a low pressure CVD method or the like.
This is a step of patterning the polycrystalline silicon layer and subsequently forming the gate insulating film 102. The gate insulating film 102
Is a method of forming by thermal oxidation method (high temperature process) and CV
There is a method (low temperature process) of forming at a low temperature of about 600 ° C. or lower (preferably 500 ° C. or lower) by the D method or the plasma CVD method. In a low-temperature process, an inexpensive glass substrate can be used as a substrate, so that a semiconductor device such as a large liquid crystal display panel or a contact image sensor can be manufactured at low cost. Further, even when a three-dimensional IC or the like is formed, a semiconductor element can be formed in the upper layer portion without adversely affecting the element in the lower layer portion (for example, diffusion of impurities).
(B) is a step of forming the conductive film 103 forming the gate electrode and subsequently immersing it in a plasma atmosphere of a halogen element such as hydrogen and chlorine. Plasma CVD, which is widely used for a-Si film formation, is an apparatus for performing plasma processing.
The device can be used. The substrate is heated to about 150 ℃ ~ 300 ℃, hydrogen, chlorine and other halogen elements are introduced into the reaction chamber, and the above gas is chemically activated by high frequency energy or microwave energy, and the gas is placed in its plasma atmosphere. By immersing the semiconductor device for about 30 minutes to 2 hours, the trap existing in the crystal grain boundary portion can be terminated by the above-mentioned active element.

It should be noted that the present embodiment is characterized in that the above-mentioned plasma treatment is performed in the state where the surface is covered with the conductive film 103 forming the gate electrode. However, if this method is adopted, the gate withstand voltage defect of the TFT due to the plasma treatment, Vth Almost no defects such as shifts are seen. Furthermore, if the conductive film 103 and the conductive substrate holder are electrically connected by a conductive jig and the substrate holder is sufficiently grounded, the above-mentioned defects will be eliminated. The reason is considered as follows. First of all, the mechanism of defect generation by plasma treatment is a kind of BT (Bias-Te
mperature) A model in which stress is added to cause a failure well explains the actual phenomenon. If an N-channel TFT is taken as an example, the plasma-damaged TFT has Vth greatly shifted to the negative voltage side, which is similar to the failure mode of the Nch TFT in the BT stress test in which a positive voltage is applied to the gate electrode. Show a similar tendency.

Even in plasma processing, the immersion in the plasma atmosphere causes charge-up, which causes a voltage to be applied to the gate film. Furthermore, by heating the substrate to approximately 150 ° C to 300 ° C, temperature stress also increases. However, as a result, a kind of BT stress is added, and it seems that defects will occur. Therefore, it is considered that by performing the plasma treatment in the state of being covered with the conductive film 103, the above-mentioned church rise is greatly reduced, and as a result, the BT stress is alleviated and the defects are eliminated.

As the conductive film 103 forming the gate electrode, Al, Mo, T
When a metal material such as i or Cr is used, if the film thickness is increased, the above-mentioned chemically active elements such as hydrogen cannot sufficiently reach the channel region, and the effect of plasma treatment is reduced. Therefore, the film thickness is preferably less than 1000Å. On the other hand, when polycrystalline silicon doped with impurities at a high concentration is used as the conductive film, the plasma treatment effect is sufficient even if the film thickness is increased to at least about 5000 Å.

In (c), the conductive film 103 is patterned to form the gate electrode 1.
04 is formed, and the gate insulating film 102 is removed by etching except under the gate electrode, and then the source / drain regions 105 are formed. As a method for forming the source / drain regions, there are an ion implantation method, a thermal diffusion method, a plasma doping method, and the like. However, the plasma doping method is suitable in the present manufacturing process because the temperature can be lowered. An example of the plasma doping method is shown below. The apparatus may be a plasma CVD apparatus that is widely used for a-Si film formation. Substrate 200-300
Doping gas (eg B ₂ H ₆ , PH ₃
Etc.) and a diluent gas (Ar, He, H ₂ , N _2, etc.) are introduced into the reaction chamber and maintained at a predetermined pressure of about 0.1 to 10 Torr. Subsequently, the above gas is chemically activated by high frequency energy or microwave energy, and the substrate is immersed in the plasma atmosphere for about 1 to 15 minutes to perform doping. In plasma doping, since the activation concentration of impurities is low, it is necessary to perform some processing to increase the activation concentration after performing plasma doping. As one method, there is a method of heat treatment at a high temperature of about 800 ° C to 900 ° C, but if such a high temperature treatment is performed, the process (b)
This is not preferable in the present manufacturing process, because the element that terminates the trap formed by the plasma treatment is released. As a method of activating at low temperature, it is effective to anneal at a low temperature of about 200 ° C to 350 ° C in a plasma atmosphere of Ar, He, N _2, etc. The apparatus can be continuously processed in the same apparatus as the plasma doping. The substrate is heated, the above-mentioned gas is introduced into the reaction chamber, and the pressure is maintained at a predetermined pressure of about 0.05 to 1 Torr. Subsequently, the above-mentioned gas is brought into a plasma state by high-frequency energy or microwave energy, and the substrate 10
The impurities are activated by immersing them in a plasma atmosphere for about 30 minutes to 30 minutes. The method of activating the impurities by plasma is also effective when activating the impurities implanted by the ion implantation method, and the ion implantation method can also be used in this manufacturing process.

(D) shows the interlayer insulating film 106 by sputtering, plasma CVD
By a method at a low temperature of about 350 ° C. or less, a contact hole 107 is opened in the interlayer insulating film, and the wiring 108 is made of a metal material such as Al.
Is a step of forming

In the step (c) of doping and activating with plasma, a TFT failure due to plasma damage, which is a problem when performing the plasma treatment of hydrogen or the like in step (b), is hardly seen. This is because the plasma treatment time is as long as 30 minutes to 2 hours in the step (b), while it is as short as 1 minute to 15 minutes and 10 minutes to 30 minutes in the step (c). It is believed that.

Next, FIG. 2 shows an example of a manufacturing process diagram of a semiconductor device in an embodiment of the present invention. The difference from FIG. 1 is that the source / drain regions are formed before the gate electrode is formed.

In FIG. 2, as in FIG. 1, (a) shows that a polycrystalline silicon layer is formed on the insulating substrate 201 such as glass or quartz by a low pressure CVD method or the like, and the polycrystalline silicon layer is patterned. Next is a step of forming the gate insulating film 202.

(B) is a step of forming a mask 203 with a resist or the like and forming a source / drain region 204 by a method such as an ion implantation method. Since the plasma treatment with hydrogen or the like is not performed, the impurities can be easily activated by performing a high temperature heat treatment at 800 ° C. to 1000 ° C. after the ion implantation.

(C) is a step of forming a conductive film 205 forming a gate electrode and subsequently immersing it in a plasma atmosphere of a halogen element such as hydrogen and chlorine. The details of the plasma processing conditions are based on the processing conditions of the embodiment shown in FIG.

In (d), the conductive film 205 is patterned to form a gate electrode 206, and the interlayer insulating film 207 is formed by a sputtering method or plasma.
This is a step of forming a contact hole 208 in the interlayer insulating film 207 and forming a wiring 209 with a metal material such as Al after forming by a CVD method at a low temperature of about 350 ° C. or lower.

Next, characteristics of a TFT manufactured by the method for manufacturing a semiconductor device according to the present invention will be described. Taking N-channel TFT as an example, TF without plasma treatment such as hydrogen
The field effect mobility of T is at most 10 cm ² /V.sec,
The field effect mobility of the TFT manufactured by the manufacturing method of the present invention is 3
Improves to about 0-40 cm ² /V.sec. In addition, TFT defects due to plasma damage are completely eliminated, and uniform characteristics can be realized over the entire wafer surface with good reproducibility. As a result, large-scale liquid crystal display panels, adhesive image sensors, etc. can be manufactured with good reproducibility and high yield.

As described above, according to the present invention, TFT defects caused by plasma treatment with hydrogen or the like can be greatly reduced, and a high-performance TFT can be manufactured with good reproducibility. The technical point is that the plasma treatment is performed before the conductive film forming the gate electrode is patterned (that is, in the state where the surface is covered with the conductive film). Furthermore, the electrically conductive jig is used to electrically connect the conductive film to the conductive substrate holder, and the substrate holder is grounded sufficiently to prevent the charge-up due to plasma processing. It was especially effective for reduction.

The present invention is effective not only for poly-Si TFTs but also for all insulating gate type field effect transistors in which at least a part of the channel region is polycrystalline. The present invention is also effective in a transistor in which at least a part of a channel region is microcrystalline or a transistor in which an amorphous portion formed by sputtering or vapor deposition and having insufficient hydrogenation forms part of the channel region. .

Even if the channel region is a single crystal, when a device is formed in a recrystallized or solid-phase grown silicon layer like a three-dimensional IC, defects such as sub-grain boundaries may occur in the crystal. is there. In that case, the method of manufacturing a semiconductor device according to the present invention is a very effective means for improving the characteristics.

〔The invention's effect〕

As described above, in the present invention, plasma treatment is performed in a state where the conductive film covers the non-single-crystal semiconductor layer; thus, charge-up due to plasma treatment is significantly reduced, gate breakdown voltage failure, threshold voltage shift, and the like. Can be prevented.

[Brief description of the drawings]

1 (a) to (d) and FIGS. 2 (a) to (d) are manufacturing process diagrams of a semiconductor device according to an embodiment of the present invention. 101, 201 ... Insulating substrate 102, 202 ... Gate insulating film 103, 205 ... Conductive film 104, 206 ... Gate electrode 105, 204 ... Source / drain region 106, 207 ... Interlayer insulating film 107, 208 ... … Contact holes 108, 209… Wiring 203… Mask

Claims (1)

(57) [Claims] 1. A step of forming a non-single-crystal semiconductor layer in an island shape on a substrate, a step of forming an insulating film on the non-single-crystal semiconductor layer, and a step of forming a conductive film on the insulating film. A method of manufacturing a semiconductor device, which comprises immersing the non-single crystal semiconductor layer in a plasma atmosphere of hydrogen or a halogen element while the insulating film and the non-single crystal semiconductor layer are covered with the conductive film.