JP2682015B2 - Gate turn-off thyristor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a gate turn-off thyristor, and more particularly to a gate turn-off thyristor having a bevel structure.

B. Summary of the Invention The present invention is a gate turn-off thyristor having a bevel structure, in which the P base layer or the N ⁺ layer of the anode part is selectively diffused so as not to be exposed on the bevel surface, so that the on-voltage is small and the steady loss is small. Get the gate turn-off thyristor.

C. Prior art In a PN junction, the electron avalanche breakdown voltage at the surface of the PN junction is lower than the internal avalanche breakdown voltage. Therefore, a bevel structure is generally used to increase the reverse breakdown voltage up to the reverse breakdown voltage determined by the material.

3 to 5 show a conventional bevel structure gate turn-off thyristor (hereinafter abbreviated as GTO), and FIG. 3 is an asymmetric type anode anode short circuit type GTO.
Fig. 4 shows an asymmetric type PIN type GTO, and Fig. 5 shows a reverse conduction type GTO.

1 N ⁺ layer in FIG. 3-FIG. 5, 2 N base layer (N _B), 3 is P base layer (P _B), 4 is N emitter layer (N _E), 5 is P emitter layer ( P _E ). Metal layers 6, 7 and 8 respectively form an anode portion A, a cathode portion K and a gate portion G. Further, each GTO has a beveled surface 9 formed on the side surface thereof. Asymmetric GTO
Unlike the reverse blocking GTO, the reverse conduction type GTO has only one junction that supports the voltage, and mainly uses a positive bevel as shown in the figure.
To obtain the breakdown voltage between _B N _B.

The N ⁺ portion of the asymmetric type short-circuited anode-emitter type GTO suppresses the carriers accumulated in the N _B portion immediately before the end of the turn-off of the GTO by suppressing the injection of holes from the P _E portion. The N ⁺ portion of the reverse conduction type GTO is formed to improve the N _B ohmic contact of the P _B N _B diode.

6 to 9 show a conventional semiconductor device using a bevel structure. 6 to 9, 1 is N
^{The +} layer, 2 is the N ⁻ layer, 3 is the P ⁺ layer, and 9 is the bevel surface of the semiconductor element.

D. Problem to be Solved by the Invention As shown in FIG. 6, in a positive bevel structure having a P ⁺ N ⁻ junction, the bevel angle θ is usually 30 ° to 60 °. Due to this bevel structure, the depletion layer at the time of reverse bias is bent near the surface inside the depletion layer as shown by the dotted line in the figure. Therefore, the electric field on the surface of the P ⁺ N ^- junction is weaker than that on the inside, and the electron avalanche breakdown occurs uniformly not in the P ⁺ N ^- junction surface but in the entire inside.

Also, when considering an actual diode, etc., as shown in FIG. 7, N ^- said to improve the ohmic contact layer 2 N ^-
The N ⁺ layer 1 is formed on the layer 2. In this case, the surface electric field with respect to the surface distance becomes like the curve l ₁ . On the other hand, considering the forward characteristics of the P ⁺ N ⁻ junction, it is desirable to make the N ⁻ layer having the largest voltage drop as thin as possible.

However, as shown in FIG. 8, when the N ⁻ layer is thinned,
When the depletion layer enters the N ⁺ layer, the electric field is locally concentrated as shown by the characteristic curve l ₂ , causing deterioration and destruction of the element.

When the beveled surface 9 is also on the P _E layer 5, punch-through occurs at the N _B P _E junction as shown in FIG. 9, a desired breakdown voltage cannot be obtained, and the element is deteriorated due to local current. And cause destruction.

Therefore, as a gate turn-off thyristor,
The on-voltage increases and the steady loss increases.

The present invention has been made in view of the above problems, and an object thereof is to provide a highly reliable gate turn-off thyristor capable of reducing the on-voltage and having a small steady loss.

E. Means and Actions for Solving the Problems In order to achieve the above-mentioned object, the present invention provides a PNPN type 4
In a gate turn-off thyristor in which a beveled surface is formed on an outer surface of a semiconductor device including layers and the anode part includes a P emitter layer or an N ⁺ layer, the P of the anode part is formed.
By forming the emitter layer or the N ⁺ layer so as not to be exposed on the bevel surface, the on-voltage and the steady loss are reduced.

F. Examples The present invention will be described below with reference to FIGS. 1 and 2.

FIG. 1 shows the anode P emitter layer (P _E layer) 5 of the gate turn-off thyristor (GTO) short-circuited with the anode-emitter.
Are located on the outer surface side of the device, and in this embodiment, the P-emitter layer 5a located on the outermost side is formed by diffusion so as not to be exposed on the bevel surface 9. Therefore, according to the GTO shown in FIG. 1, the problem as shown in FIG. 9 does not occur.

FIG. 2 shows the anode-emitter short-circuit GTO formed by diffusion so that the N ⁺ layer 1a of the anode N ⁺ layer 1 located on the outermost side of the device is not exposed to the bevel surface 9. The GTO in FIG. 2 can prevent the problems described in FIGS. 7 to 8 from occurring.

In FIGS. 1 and 2, 10 is an encap. Further, although the asymmetric type and the anode-emitter short-circuit type GTO are described in the above embodiments, the present invention can be applied to the asymmetric type PIN structure GTO and the reverse conduction type GTO.

G. Effect of the Invention A beveled surface is formed on the outer surface of a PNPN-type four-layer semiconductor device, and the anode portion is a P emitter layer or N ^+.
In a gate turn-off thyristor including a layer, since the P emitter layer or the N ⁺ layer of the anode part is formed so as not to be exposed on the bevel surface, the ON voltage can be lowered,
Moreover, it is possible to obtain a gate turn-off thyristor with a high performance and a small steady loss and high reliability.

[Brief description of the drawings]

1 is a partial sectional view of a gate turn-off thyristor according to an embodiment of the present invention, FIG. 2 is a partial sectional view of another gate turn-off thyristor according to an embodiment of the present invention, and FIGS. 3 to 5 are general gate turn-offs. A thyristor, the third
Figure is a cross-sectional view of a conventional asymmetric type gate turn-off thyristor with shorted anode-emitter type. Figure 4 shows a conventional asymmetric type.
FIG. 5 is a cross-sectional view of a PIN type gate turn-off thyristor, FIG. 5 is a cross-sectional view of a conventional reverse conduction type gate turn-off thyristor, and FIGS. 6 to 9 are partial cross-sectional views showing examples of conventional bevel structure semiconductor devices. Is. 1 ... N ⁺ layer, 2 ... N base layer, 3 ... P base layer,
4 ... N emitter layer, 5 ... P emitter layer, A ... anode part, K ... cathode part, G ... gate part.

Claims (1)

(57) [Claims] 1. A gate turn-off thyristor in which a beveled surface is formed on the outer surface of a PNPN type four-layer semiconductor device and the anode part includes a P emitter layer or an N ⁺ layer, and the P emitter layer or N of the anode part is formed. A gate turn-off thyristor, wherein a ⁺ layer is formed so as not to be exposed on the bevel surface.