JP2638963B2 - Film chip capacitors - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a film chip capacitor.

Conventional technology Conventional film chip capacitors are manufactured by welding a film capacitor element to a comb lead, using a thermosetting resin to mold the package, cutting the comb lead, and bending a part of the lead to form an external electrode. By doing, it was produced.

In recent years, there has been an increasing demand for miniaturization of electronic devices, and therefore, studies have been made to further reduce the size of film chip capacitors.

As one of the proposals, it has been widely studied to omit the comb lead welding and the mold exterior and use the film capacitor element as it is as a film chip capacitor.

FIG. 4 is a partially cutaway perspective view of a conventional film chip capacitor embodying the same.

As shown in the figure, this capacitor is a dielectric film
Electrodes 12 and 13 are formed on both surfaces of 11 by vacuum evaporation method, respectively.
Furthermore, after a dielectric material is applied thereon to form the dielectric layers 14 and 15, the dielectric layers are cut into predetermined dimensions, and tens to thousands of layers are further laminated. At this time, at the beginning and end of the lamination, a protective film 16 of the same dimensions, which was coated with an adhesive, was used.
As a protective layer. After laminating, for electrode extraction, spray spray zinc on each of the two laminated end faces to form a sprayed layer 17, and on the remaining surface where spraying is not formed,
An exterior body 18 is formed by bonding a polyimide sheet coated with an epoxy resin to form a film chip capacitor.

Problems to be Solved by the Invention A film chip capacitor having such a structure can be reduced in size by reducing the volume by 20% or more with the same capacitance as compared with a conventional film chip capacitor provided with a mold. However, since the zinc sprayed layer is composed of fine particles, its surface is oxidized in a very short time depending on the atmosphere, and it is oxidized over time even under normal use conditions. Variations occur, and soldering defects increase when mounting on a printed wiring board or the like.

In order to improve solderability, L-shaped external electrodes are welded from the metallicon portion of the film chip capacitor to two adjacent surfaces adjacent to each other, or solder is used as a spray material. It is thought that.

However, in the case of the former method of providing an L-shaped external electrode, it is very difficult to connect and integrate the external electrodes without distortion, and the external electrodes are attached at an angle, or a flash at the time of connection is formed. For this reason, many defects occur when soldering to a printed wiring board. In the case of the latter method, since the solder melts and flows during soldering, the connection with the electrode on the dielectric film is often impaired and the capacitance is reduced. .

An object of the present invention is to solve such a problem in the conventional technology and to provide a film chip capacitor having good solderability.

Means for Solving the Problems The film chip capacitor of the present invention comprises an external electrode comprising a high melting point metal sprayed layer and a low melting point metal layer formed thereon, and the low melting point metal layer does not exceed 0.1 mm. The high melting point metal sprayed layer is a brass sprayed layer, and the low melting point metal layer is a metal layer having a melting point of 300 ° C. or less containing at least one of tin and lead as a main component.

Function As described above, since the external electrode is composed of the high melting point metal sprayed layer and the thin low melting point metal layer having a thickness of 0.1 mm or less formed thereon, the low melting point metal layer is formed of the high melting point metal sprayed layer. To prevent oxidation.

Embodiment An embodiment of the present invention will be described below with reference to FIG.

Aluminum is vacuum-deposited on both sides of a 1.5 μm-thick dielectric film 1 made of polyphenylene sulfide to form electrodes 2 and 3, and then polyphenylene oxide is coated thereon to a thickness of 0.9 μm. The dielectric layers 4 and 5 are formed. Then, the sheet is cut to a predetermined size, 400 sheets of the sheet are laminated, and a protective film 6 made of polyphenylene sulfide coated with an adhesive is stacked on both surfaces thereof and pressed. Next, brass is sprayed to a thickness of 0.3 mm to lead the electrodes to form a high-melting metal sprayed layer 7 to obtain a film capacitor element. Then, after the surface of the high melting point metal sprayed layer 7 is polished and smoothed, a eutectic solder containing 63% tin is hot-dipped to form a low melting point metal layer 8 having a thickness of 50 μm.
In order to insulate the element end faces, a rectangular polyimide film is adhered to each of these element end faces with an epoxy resin to form an outer package 9, thereby forming a film chip capacitor.

For comparison, an external electrode was formed of a 0.35 mm thick zinc sprayed layer to obtain a film chip capacitor.

After leaving 1000 pieces each of the film chip capacitors of Examples and Comparative Examples produced as described above for about half a year, they were adhered to a 1.6 mm thick printed wiring board and immersed in a solder layer at a temperature of 250 ° C. for 5 seconds. The defective mounting rate on the printed wiring board and the defective soldering strength at that time were examined.

The results are shown in the table below. In the table, those having a soldering strength of 500 g or less were regarded as having poor soldering strength.

From this table, it can be seen that in this example, the soldering reliability was significantly improved, and excellent solderability was obtained.

In place of the eutectic solder, a solder having another composition having a melting point of 300 ° C. or less, or even a single tin, provided excellent results equivalent to those of the present example.

Even when the method of this example was applied to a wound film capacitor element, the same excellent results were obtained.

Further, when the thickness of the low melting point metal layer of the external electrode was examined, it was found that when the thickness exceeded 0.1 mm, troubles were likely to occur when mounting the printed wiring board.

As a method of soldering and mounting the chip capacitor on a printed wiring board, a reflow method is usually used. For example, when using the most widely used solder as a low melting point metal, when soldering to a printed wiring board by the reflow method, a large amount of molten solder adheres to the conductor layer side of the board, and other solder There is a possibility that a short circuit may occur with a layer or the like.

Specifically, as shown in FIG. 2A, when soldering is performed on the conductor layer 102 of the printed wiring board 101 by a reflow method, a solder layer 104 is formed on the conductor layer 102 by being regulated by the solder resist layer 103. Is done. The thickness of the central portion is defined as t.

On the other hand, when the chip film capacitor 104 is soldered to the printed wiring board 101, FIG.
As shown in (2), the solder connection portion 105 adheres to the conductor layer 102 side. The relationship between the thickness of the solder layer of the external electrode of the chip film capacitor and T / t was examined when the thickness at the inflection point of the curve of the cross section of the solder connection portion 106 was T. As shown in FIG. It was as follows. As is clear from this, when the thickness of the solder layer of the external electrode is 0.1 mm or less, the value of T / t is almost 1, and when the thickness exceeds 0.1 mm, the value of T / t sharply increases. It is getting bigger. From this, if the thickness of the solder layer of the external electrode exceeds 0.1 mm,
The solder connection part 106 is the conductor layer 102 of the printed wiring board 101
It can be seen that it is formed very offset to the side.

If the solder connection portion 106 is formed so as to be very deviated on the conductor layer 102 side, a short circuit will occur with an electrode of another adjacent conductor layer or component in a high-density printed wiring board. Therefore, the thickness of the solder layer of the external electrode is 0.1 mm
It is desirable to be less than.

In this way, the external electrode is composed of the high-melting metal sprayed layer and the thin low-melting metal layer with a thickness of 0.1 mm or less formed on it, so that the external electrode may melt during soldering. And the capacitance is prevented from lowering. Further, since oxidation of the high melting point metal sprayed layer is prevented by the thin low melting point metal layer, there is almost no change with time as an electrode, and solderability is improved.

Generally, since the heat resistance of the dielectric film constituting the film capacitor is low, a brass which is easy to obtain a low melting point is most practical.

As the metal material for the low melting point metal layer, use a material containing tin, lead, or a tin-lead alloy as a main component to prevent impurities from diffusing into the solder bath when soldering to the printed wiring board. Is preferred. As a method for forming the low melting point metal layer, a vacuum deposition method, a hot-dip plating method, and a chemical plating method are used.

Effects of the Invention According to the present invention, a small and inexpensive film chip capacitor having high soldering reliability and significantly improved solderability and soldering strength can be obtained.

[Brief description of the drawings]

FIG. 1 is a partially cutaway perspective view of a multilayer film chip capacitor according to an embodiment of the present invention, and FIG. 2 (a) is a state in which a solder layer is adhered to a conductor layer of a printed wiring board by reflow soldering. FIG. 2 (b) is a view showing a state of attachment of a solder connection portion when a chip film capacitor is soldered to a printed wiring board, and FIG. 3 is a view showing a low melting point metal layer of an external electrode of the chip film capacitor. FIG. 4 is a partially broken perspective view of a conventional multilayer film chip capacitor, showing the relationship between the thickness and the state of attachment of the solder connection portion. DESCRIPTION OF SYMBOLS 1 ... Dielectric film, 2,3 ... Electrode, 3,4 ... Dielectric layer, 6 ... Protective film, 7 ... High melting point metal sprayed layer, 8
... Low melting point metal layer, 9.

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Kenji Kuwata 1006 Kazuma Kadoma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. (72) Inventor Masashi Moriwaki 1006 Kadoma, Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A-1-287913 (JP, A)

Claims (1)

(57) [Claims] An external electrode comprising a high melting point metal sprayed layer and a low melting point metal layer formed on the high melting point metal sprayed layer, wherein the thickness of the low melting point metal layer does not exceed 0.1 mm. A chip capacitor, wherein the high-melting metal sprayed layer is a brass sprayed layer and the low-melting metal layer is a metal layer having a melting point of 300 ° C. or less containing at least one of tin and lead as a main component.