JP2625913B2 - Thin film transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a thin film transistor, and more particularly to a structure of a self-aligned thin film transistor using a back exposure method, which aims at providing a TFT structure capable of shortening a time required for back exposure to a minimum time. A non-light-transmitting gate electrode, a gate insulating film, and an operating semiconductor layer are laminated on a light-transmitting insulating substrate, and the light-transmitting gate is formed on the operating semiconductor layer by a position matching method using the gate electrode as a mask; In a transistor configuration having a protective film made of an optical insulating film and a source electrode and a drain electrode opposed to each other with the protective film interposed therebetween, the product of the film thickness of the protective film and the refractive index is used for exposure in the position matching method. The configuration is selected so as to be substantially equal to an integral multiple of a half wavelength of light.

[Industrial applications]

The present invention relates to a thin film transistor, and more particularly to a structure capable of minimizing a back exposure time when manufacturing a self-aligned thin film transistor using a back exposure method.

[Conventional technology]

Overlap of the gate electrode and the source and drain electrodes of a thin film transistor (TFT) used for driving a liquid crystal cell of an active matrix type liquid crystal display device causes a parasitic capacitance and a leak current. In order to make these as small as possible, the overlap between the end of the gate electrode and the ends of the source and drain electrodes must be made as small as possible.

Therefore, in manufacturing a TFT, a gate electrode, a source electrode, and a drain electrode are formed by a self-alignment method by using a backside exposure method to eliminate overlap between electrode ends.

FIG. 3 shows a process of forming a source electrode and a drain electrode of a conventional inverted staggered TFT. As shown in the figure, the back exposure is performed by using a non-light-transmitting gate electrode 2 formed on a glass substrate 1 as a mask, and a gate insulating film 3, a-Si (amorphous) such as a SiN (silicon nitride) film.・
A resist film 6 applied on an active semiconductor layer such as a silicon (Si) layer 4 or a polycrystalline Si layer and a protective film 5 such as an SiO ₂ film is exposed to ultraviolet light 9 irradiated from the back of the glass substrate 1. .

Therefore, the transmitted light 8 for exposing the resist film 6 is light transmitted through the a-Si layer 4 or the polycrystalline Si layer. The a-Si layer 4 and the polycrystalline Si layer have a large absorption coefficient for ultraviolet rays, and the ultraviolet rays emitted from the mercury lamp are considerably attenuated when passing through these films.

Furthermore, since the light transmitted through the a-Si layer 4 causes multiple reflections in the protective film 5, the phase of the transmitted light 8 is generally not constant. The intensity of the transmitted light 8 incident on 6 is significantly attenuated.

[Problems to be solved by the invention]

For these reasons, a long exposure time has conventionally been required for backside exposure.

An object of the present invention is to provide a TFT structure that can reduce the time required for backside exposure to a minimum time.

[Means for solving the problem]

 FIG. 1 is a diagram illustrating the principle of the present invention.

The present invention sets the thickness d of the protective film 5 to [m / 2] of the effective wavelength [λ / n] of the light 7 contributing to the exposure of the resist film 6 formed on the protective film 5. ] Equal to double.
Here, m is a positive integer.

That is, the thickness d is selected so that the product of the thickness d of the protective film 5 and the refractive index n thereof is substantially equal to an integer m times the half wavelength λ / 2 of the exposure light 7.

(Operation)

Since a material having a small absorption coefficient causes multiple reflection in the film, the transmitted light intensity is controlled by interference.

Therefore, if the film thickness d is selected as described above, the effective wavelength (λ / n) of the incident light 7 in the film becomes equal to an integral multiple of the optical path difference 2d of the transmitted light 8 incident on the resist film 6, and the transmitted light Since the phases of the light beams 8 are aligned, no interference occurs, and the intensity of the transmitted light 8 can be maximized.

Therefore, according to the present invention, the exposure time for backside exposure can be reduced to the shortest time.

If the thickness of the a-Si layer 4 can be reduced,
Although the exposure time can be made shorter, the thickness cannot be arbitrarily selected because it is regulated by other factors such as element characteristics. Further, the thickness of the gate insulating film 3 is also regulated by factors such as dielectric strength, and cannot be arbitrarily selected. Therefore, it is a factor to avoid the useless attenuation of the exposure light by selecting the thickness of the protective film 5 that is less restricted by the design factors of these elements as described above, whereby the intensity of the transmitted light 8 is maximized. Thus, the back exposure time can be minimized.

〔Example〕

Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 2 (a) and 2 (b).

As shown in FIG. 2A, a glass substrate 1 on which a gate electrode 2 made of a non-translucent material such as Ti (titanium) is formed.
On top of this, a SiN film 3 having a thickness of about 300 nm as a gate insulating film, an a-Si layer 4 having a thickness of about 100 nm as an active semiconductor layer, and a thickness as a protective film are formed by chemical vapor deposition (P-CVD). About 145nm
An SiO ₂ film 5 is formed.

Next, as shown in FIG. 2 (b), a positive resist film 6 is formed by a coating method, a back exposure is performed using the gate electrode 2 as a mask, and the non-photosensitive portion 11 aligned with the gate electrode 2 and the photo resist are exposed. The part 12 is obtained.

The UV light emitted from the exposure light source, a mercury lamp, is approximately 350,375,435n
It has an emission spectrum at a wavelength of m. 400nm of these
Since the following wavelengths are almost absorbed by the a-Si layer 4, 435 nm
Only contributes to the exposure of the resist film 6. Therefore, the thickness of the SiO ₂ film 5 serving as the protective film may be selected so that light of this wavelength does not cause interference.

That is, since the refractive index of SiO ₂ is n ≒ 1.5, the thickness d satisfying 2d = (435 / 1.5) × m and d = 145 × m (where m is a positive integer) is the resonance condition for light having a wavelength of 435 nm. It is.

If m = 1, the film thickness d will be 145 nm. In this embodiment, S
It is for this reason that the thickness of the iO ₂ film 5 is selected to be 145 nm.

A protective film for which such conditions can be selected can also be formed using SiN, SiO, or the like. In short, as a material for the protective film,
Any insulating film that is transparent to ultraviolet light used for exposure may be used.

The protective film is not limited to a single layer but may be a laminated film.
In that case, use a combination of films as described above,
It suffices that the product of the refractive index and the film thickness of each film is an integral multiple of a half wavelength of the exposure ultraviolet light.

By configuring the protective film 5 as described above,
The time required for back exposure can be minimized.

After performing the exposure in this manner, a developing process is performed to remove the photosensitive portion 12, and the remaining non-photosensitive portion 10 is used as a mask.
The exposed portion of the SiO ₂ film 5 is removed by etching.

Next, as shown in FIG. 2 (c), after the Al film 10 is formed, the unnecessary portion of the Al film 10 deposited on the photosensitive portion 11 of the resist film 6 used as a mask by the lift-off method is formed. Is removed to form a source electrode S and a drain electrode D, thereby completing the TFT of this embodiment.

In the present embodiment, as described above,
The thickness d of the SiO ₂ film 5 is set at the wavelength of the incident ultraviolet light of 435 nm.
Is selected as an integral multiple of a half wavelength (m = 1 in this embodiment) of the effective wavelength in the film, the phase of the transmitted light 8 is aligned, and the maximum value that can realize the intensity of the transmitted light 8 is obtained. ,
The time required for back exposure was minimized.

〔The invention's effect〕

As described above, according to the present invention, the exposure time at the time of back exposure can be shortened, and the manufacturing process becomes easy.

[Brief description of the drawings]

FIG. 1 is an explanatory view of the principle of the present invention, FIGS. 2 (a) to (c) are explanatory views of an embodiment of the present invention, and FIG. 3 is an explanatory view of a conventional back exposure method. In the figure, 1 is an insulating substrate (glass substrate), 2 is a gate electrode, 3 is a gate insulating film (SiN film), 4 is an a-Si layer,
5 is a protective film (SiO ₂ film), 6 is a resist film, 7 is exposure light,
8 is transmitted light, 9 is ultraviolet light, 10 is Al film, 11 is unexposed part, 12
Indicates a photosensitive unit.

Claims (1)

(57) [Claims] A non-light-transmitting gate electrode, a gate insulating film, and an operating semiconductor layer are laminated on a light-transmitting insulating substrate. A protective film (5) made of a translucent insulating film formed by a position matching method using the gate electrode as a mask, and a source electrode (S) and a drain electrode (D) opposed to each other with the protective film interposed therebetween. In the transistor configuration, a product of a film thickness of the protective film (5) and a refractive index is selected to be substantially equal to an integral multiple of a half wavelength of light (7) used for exposure by the position matching method. Thin film transistor.