JP2577347B2 - Image sensor - Google Patents

Image sensor

Info

Publication number
JP2577347B2
JP2577347B2 JP61021990A JP2199086A JP2577347B2 JP 2577347 B2 JP2577347 B2 JP 2577347B2 JP 61021990 A JP61021990 A JP 61021990A JP 2199086 A JP2199086 A JP 2199086A JP 2577347 B2 JP2577347 B2 JP 2577347B2
Authority
JP
Japan
Prior art keywords
amorphous silicon
layer
image sensor
hydrogenated amorphous
heterojunction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61021990A
Other languages
Japanese (ja)
Other versions
JPS62181476A (en
Inventor
秀俊 野崎
伊東  宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
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Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP61021990A priority Critical patent/JP2577347B2/en
Publication of JPS62181476A publication Critical patent/JPS62181476A/en
Application granted granted Critical
Publication of JP2577347B2 publication Critical patent/JP2577347B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Photovoltaic Devices (AREA)
  • Light Receiving Elements (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は、光学的禁止帯幅の異なる2種の半導体層に
より構成されるヘテロ接合を含むイメージセンサに関す
る。
Description: TECHNICAL FIELD [0001] The present invention relates to an image sensor including a heterojunction composed of two types of semiconductor layers having different optical band gaps.

〔発明の技術的背景とその問題点〕 非晶質シリコン(以下a−Siと記す)は優れた光導電
性を有し、太陽電池、光センサ、感光体、イメージセン
サなどの光電変換素子そして光導電膜積層型固体撮像素
子に応用されている。
[Technical background of the invention and its problems] Amorphous silicon (hereinafter referred to as a-Si) has excellent photoconductivity, and is used for photoelectric conversion elements such as solar cells, optical sensors, photoconductors, and image sensors. It is applied to a photoconductive film stacked type solid-state imaging device.

これらの光電変換素子においては、短波長光に対する
感度(青感度)を向上させる目的で、入射光側に水素化
非晶質シリコンカーバイド(以下a−SiC:Hと記す)と
水素化非晶質シリコン(以下a−SiHと記す)のヘテロ
接合a−SiC:H/a−Si:Hが設けられている場合が多い。
In these photoelectric conversion elements, hydrogenated amorphous silicon carbide (hereinafter referred to as a-SiC: H) and hydrogenated amorphous silicon are provided on the incident light side for the purpose of improving the sensitivity to short wavelength light (blue sensitivity). In many cases, a heterojunction a-SiC: H / a-Si: H of silicon (hereinafter referred to as a-SiH) is provided.

しかしながら、炭素の共有結合半径は0.77Å、シリコ
ンのそれは1.17Åであるために、上記ヘテロ接合界面に
は格子不整合に起因する欠陥準位が多数発生し、光励起
キャリアの再結合による青感度の低下を招いていた。
However, since the covalent bond radius of carbon is 0.77Å and that of silicon is 1.17Å, a number of defect levels are generated at the heterojunction interface due to lattice mismatch. Had led to a decline.

この問題を解決するために、上記ヘテロ接合界面に、
両半導体層の化学的組成の中間にある半導体層を介在さ
せる方法が考案された(特開昭60−50973)。第3図
に、この構造の一例を示す、導電性基板11の上にa−S
i:Hのn層12、a−Si:Hのi層13を積層し、その上にヘ
テロ接合を形成するp型のa−SiC:Hの窓層14を積層す
る前に、i層の原料ガスであるモノシランおよびその誘
導体ガス中にa−Sie:Hの炭素原となる炭化水素を短時
間導入することによりa−SiC:Hとa−Si:Hの中間層15
が形成される。16は透明導電膜、17は金属集電電極であ
る。中間層15を設けることにより、格子不整合により歪
は緩和され、光電変換素子のリーク電流防止と青感度向
上が実現される。
To solve this problem, at the heterojunction interface,
A method has been devised in which a semiconductor layer intermediate between the chemical compositions of the two semiconductor layers is interposed (JP-A-60-50973). FIG. 3 shows an example of this structure.
Before laminating an n-layer 12 of i: H and an i-layer 13 of a-Si: H, and laminating a window layer 14 of p-type a-SiC: H for forming a heterojunction thereon, By introducing a hydrocarbon serving as a carbon source of a-Sie: H into the monosilane and its derivative gas as a raw material gas for a short time, the intermediate layer 15 of a-SiC: H and a-Si: H is formed.
Is formed. 16 is a transparent conductive film, and 17 is a metal current collecting electrode. By providing the intermediate layer 15, distortion is reduced due to lattice mismatch, thereby preventing leakage current and improving blue sensitivity of the photoelectric conversion element.

しかしながら、化学的組成の中間層15をヘテロ接合に
介在させた光電変換素子は光応答速度が中間層15を設け
ない場合よりは遅くなるという問題が発生していた。こ
れは、中間層15が比較的高抵抗層であり、また光導電性
が劣るために、光励起キャリアの中間層15における走行
性が悪いということに起因すると考えられる。ここで走
行性とは、モビリティーとライフタイムの積を意味す
る。光応答速度が遅いと、イメージセンサや固体撮像素
子のような高速光応答性能を要求されるデバイスでは致
命的な問題となる。特に、a−Siを光導電層に用いた光
導電膜積層型固体撮像素子の残像特性を劣らせる一因に
なっていた。
However, the photoelectric conversion element in which the intermediate layer 15 of the chemical composition is interposed in the hetero junction has a problem that the light response speed becomes slower than the case where the intermediate layer 15 is not provided. This is considered to be due to the fact that the intermediate layer 15 is a relatively high-resistance layer and has poor photoconductivity, so that the photoexcited carriers have poor running properties in the intermediate layer 15. Here, the traveling property means the product of mobility and lifetime. If the light response speed is low, it becomes a fatal problem in a device that requires high-speed light response performance, such as an image sensor or a solid-state image sensor. In particular, this has been one of the causes of deteriorating the afterimage characteristics of the photoconductive film-stacked solid-state imaging device using a-Si for the photoconductive layer.

従って、ヘテロ接合の格子不整合性を緩和しかつ光励
起キャリアの十分な走行性を満足し光応答速度を遅くし
ないような中間層の構造が、イメージセンサや光導電膜
積層型固体撮像素子において求められている。
Therefore, the structure of the intermediate layer that alleviates the lattice mismatch of the heterojunction, satisfies the sufficient traveling property of the photoexcited carriers, and does not slow down the optical response speed is required in the image sensor and the photoconductive film stacked solid-state imaging device. Have been.

〔発明の目的〕[Object of the invention]

この発明は上述した従来装置の欠点を改良したもの
で、ヘテロ接合界面の格子不整合性を緩和しかつヘテロ
接合界面層での光励起キャリアの走行性を改善すること
により、青感度を向上させると同時に光応答速度を速く
することのできるイメージセンサを提供することを目的
とする。
The present invention is an improvement over the above-described drawbacks of the conventional device, in which the blue sensitivity is improved by alleviating the lattice mismatch at the heterojunction interface and improving the mobility of photoexcited carriers at the heterojunction interface layer. It is another object of the present invention to provide an image sensor capable of increasing a light response speed.

〔発明の概要〕 本発明は、光学的禁止帯幅の異なる2種の半導体層よ
り構成されるヘテロ接合界面に、夫々電子、正孔の走行
性が優れている互いに光学的禁止帯幅の異なる半導体層
を交互に積層させた超薄膜積層型半導体層を介在させる
ように構成したものである。
[Summary of the Invention] The present invention relates to a heterojunction interface composed of two semiconductor layers having different optical band gaps, each having an excellent electron and hole traveling property and having a different optical band gap. The semiconductor device is configured so as to interpose an ultra-thin stacked semiconductor layer in which semiconductor layers are alternately stacked.

〔発明の効果〕〔The invention's effect〕

本発明によれば、ヘテロ接合の格子不整合性が緩和さ
れるとともに接合界面層における光励起キャリアの走行
性が改善される効果がある。
According to the present invention, there is an effect that the lattice mismatch of the hetero junction is alleviated and the traveling property of the photoexcited carriers in the junction interface layer is improved.

〔発明の実施例〕(Example of the invention)

本発明を光導電膜積層型固体撮像素子の光電変換素子
部に応用した実施例を図面を用いて詳細に説明する。
An embodiment in which the present invention is applied to a photoelectric conversion element portion of a photoconductive film stacked solid-state imaging device will be described in detail with reference to the drawings.

第1図に、本発明による光電変換素子部の構造断面模
式図を示す。21は、金属の第2電極であり、電荷結合素
子(CCD)の蓄積ダイオードとコンタクトする金属の第
1電極と電気的に接続される。上記21の上に、i型a−
SiC:Hあるいはn型のa−SiC:Hの22を積層し、その上に
主たる光電流の生成部であるi型のa−Si:H層の23が積
層される。
FIG. 1 is a schematic structural cross-sectional view of a photoelectric conversion element according to the present invention. Reference numeral 21 denotes a second metal electrode, which is electrically connected to the first metal electrode that contacts the storage diode of the charge-coupled device (CCD). On top of the above 21, i-type a-
A layer 22 of SiC: H or n-type a-SiC: H is laminated, and a layer 23 of i-type a-Si: H, which is a main photocurrent generator, is laminated thereon.

更にその上に、i型a−SiC:Hの241とi型a−Si:Hの
242により構成される単位積層膜が2周期以上積層され
た超薄膜積層型半導体層24が形成されている。その後p
型のa−SiC:H25、透明導電膜26そして端子電極27が形
成される。
Further thereon, an i-type a-SiC: H of 24 1 and the i-type a-Si: H-
Ultra-thin film laminate type semiconductor layer 24 is formed which consists unit lamination films are stacked 2 or more cycles by 24 2. Then p
A type a-SiC: H25, a transparent conductive film 26 and a terminal electrode 27 are formed.

a−Siは、モノシランおよび高次シランを原料ガスと
したグロー放電分解により形成され、a−SiC:Hを形成
する場合はメタン,アセチレンおよびエチレンなどの炭
化水素をグロー放電中に導入すれば良い。p型およびn
型a−Siは、グロー放電中に、夫々、ジボランおよびホ
スフィンなどのドーピングガスを添加すれば良い。な
お、a−Siはグロー放電分解に依らなくとも、光励起プ
ロセスによる分解過程を利用して成膜することもでき
る。
a-Si is formed by glow discharge decomposition using monosilane and higher silane as a source gas. When a-SiC: H is formed, hydrocarbons such as methane, acetylene and ethylene may be introduced into the glow discharge. . p-type and n
For the type a-Si, doping gas such as diborane and phosphine may be added during glow discharge. Note that a-Si can be formed into a film using a decomposition process by a photoexcitation process without depending on glow discharge decomposition.

25のpa−SiC:Hと23のia−Si:Hのヘテロ接合界面にお
ける格子不整合性が燥和される程度は、241のia−SiC:H
層膜厚d1と242のia−Si:H層膜厚d2に依存し、また単位
積層膜の周期数mに依存する。格子不整合性を緩和する
のに必要なd1,d2そしてmの最適値は241層と242層の形
成条件により異なるが、およそd1とd2は5Å〜100Åの
範囲内、mは2〜20の範囲内にあれば有効であり、格子
不整合性の緩和に伴う光励起キャリアの界面再結合抑制
と再結合電流抑制による暗電流低下が認められた。その
結果、従来構造(第3図)に劣らない青感度などの特性
向上が達成できた。上記のd1とd2は、薄すぎると格子不
整合を緩和するに至らず、一方厚くなりすぎると逆に24
1層と242層のヘテロ接合性が強くなり、歪による欠陥準
位を増加させる結果になる。同様に周期数mが大きくな
りすぎると、界面欠陥準位の増加による特性の劣化が認
められた。d1,d2そしてmが上記範囲内の適正値にある
場合に限って、pa−SiC:Hヘテロ接合界面の歪は、24の
超薄膜積層型半導体層に吸収され、緩和される効果があ
る。勿論、超薄膜積層型半導体層24の膜厚が厚くなりす
ぎると高抵抗層を形成するることになり、特性を落すこ
とになるので、24の膜厚は全体として4000Å以内に設定
する必要がある。
25 pa-SiC of: ia-Si of H and 23: the extent of lattice mismatch at the heterojunction interface of H is燥和is of 24 1 ia-SiC: H
Layer thickness d 1 and 24 2 of the ia-Si: depending on the H layer thickness d 2, also depends on the cycle number m of unit multilayer films. Optimal value of d 1, d 2 and m required to alleviate the lattice mismatch varies with the conditions for forming the 24 first layer and 24 a two-layer, approximately d 1 and d 2 in the range of 5A~100A, m is effective as long as it is in the range of 2 to 20, and a reduction in dark current due to suppression of interfacial recombination of photoexcited carriers and suppression of recombination current accompanying relaxation of lattice mismatch was observed. As a result, improvements in characteristics such as blue sensitivity, which were not inferior to those of the conventional structure (FIG. 3), were achieved. If d 1 and d 2 are too thin, lattice mismatch will not be reduced, while if too thick, 24
Heterozygous one layer and 24 second layer becomes strong, resulting in increasing the defect level due to strain. Similarly, when the number m of periods became too large, deterioration of characteristics due to an increase in interface defect levels was observed. Only when d 1 , d 2 and m are at appropriate values within the above range, the strain at the pa-SiC: H heterojunction interface is absorbed by the 24 ultra-thin stacked semiconductor layers, and the effect of relaxation is reduced. is there. Of course, if the thickness of the ultra-thin stacked semiconductor layer 24 is too large, a high resistance layer will be formed, and the characteristics will be deteriorated. Therefore, it is necessary to set the total thickness of the 24 to 4000 mm or less. is there.

次に、光応答性の改善に関して説明する。 Next, the improvement of the optical response will be described.

第3図の従来構造では、中間層が15がa−SiC:H層の
みにより形成されていたため、電子と正孔のうち、特に
正孔の中間層15における走行性が悪くなり光応答速度の
低下を招いていた。
In the conventional structure shown in FIG. 3, since the intermediate layer 15 is formed only of the a-SiC: H layer, of the electrons and holes, particularly, the traveling property of the holes in the intermediate layer 15 is deteriorated, and the light response speed is reduced. Had led to a decline.

本発明においては電子と正孔の走行性に優れているia
−Si:H層242と正孔よりも電子の走行性に優れているia
−SiC:H層241の超薄膜積層構造により中間層24が形成さ
れているので、両層の特長が相乗されて、中間層24にお
いて、電子の走行性を劣化させることなく正孔の走行性
を従来より改善することができ、光応答時間を短くする
ことができる。
In the present invention, ia is excellent in traveling properties of electrons and holes.
-Si: than H layer 24 2 and the hole has excellent electron runnability ia
-SiC: the intermediate layer 24 is formed by ultra-thin film laminate structure of the H layer 24 1, and the features of both layers are synergistic, in the intermediate layer 24, the hole without deteriorating the electron runnability travel Performance can be improved as compared with the prior art, and the light response time can be shortened.

第2図に光電変換素子部における周期数mをパラメー
タにした光応答時間を示す。この測定においては、中間
層24の膜厚を50Å〜400Åの範囲内にある値に固定し、d
1とd2の膜厚値を等しくした。光電変換膜には−1Vの逆
バイアス電圧を印加した状態で、緑色LEDをパルス状に
照射し、光を遮断した場合の立ち下がり信号電流が光照
射時の信号電流の10%に達するのに要する時間を光応答
時間として測定した。
FIG. 2 shows an optical response time in which the number m of cycles in the photoelectric conversion element unit is used as a parameter. In this measurement, the thickness of the intermediate layer 24 was fixed at a value in the range of 50 ° to 400 °, and d
1 and the film thickness value of d 2 and equal. When a reverse bias voltage of -1 V is applied to the photoelectric conversion film, the green LED is irradiated in a pulsed manner, and when the light is cut off, the falling signal current reaches 10% of the signal current at the time of light irradiation. The required time was measured as the light response time.

第2図に示されるように、本実施例に従えば従来構造
(第3図)mは光応答時間を短くし得ることが確認され
た。実際に、本実施例を用いた光導電膜積層型固体撮像
素子の残像特性は、従来構造の場合に比較して大きく改
善された。
As shown in FIG. 2, it was confirmed that the conventional structure (FIG. 3) m can shorten the optical response time according to the present embodiment. Actually, the afterimage characteristics of the photoconductive film-stacked solid-state imaging device using this embodiment are greatly improved as compared with the conventional structure.

超薄膜積層型半導体層の中間層24において、光励起キ
ャリアの走行性が改善される理由のひとつに、光学的禁
止帯幅が異なる241層と242層の接合界面において局所電
界が発生し、光励起キャリアがその電界により加速さ
れ、キャリア平均速度が増加する点も挙げられる。
In the intermediate layer 24 of ultra-thin film laminate type semiconductor layer, one of the reasons that the travel of the photo-excited carriers is improved, the local electric field is generated at the bonding interface between the optical band gap is different from 24 one layer and 24 second layer, Another point is that the photoexcited carriers are accelerated by the electric field, and the average carrier speed is increased.

本実施例の中間層24における光学的禁止帯幅は、ia−
SiC:H層241が1.9eV〜2.8eV(Eg1と記す)であるように
形成したが、上記のキャリア平均速度を増加させる意味
からも、Eg1とEg2を異ならせる必要がある。
The optical band gap in the intermediate layer 24 of this embodiment is ia−
SiC: Although H layer 24 1 is formed so as to be 1.9EV~2.8EV (referred to as Eg 1), from the means of increasing the carrier average velocity of the, it is necessary to differentiate the Eg 1 and Eg 2.

超薄膜積層型半導体層24を構成するEg1とEg2の異なっ
た241層と242層の組み合わせには、本実施例の他、第1
表に示す組み合わせも特性向上に有効である。
The combination of Eg 1 and Eg 2 different 24 one layer and 24 two layers constituting the ultra-thin film laminate type semiconductor layer 24, another embodiment, the first
The combinations shown in the table are also effective for improving the characteristics.

第1表において、241層と242層がa−SiC:Hで形成さ
れる場合には、ブロー放電中に導入する炭化水素の量を
調節して、光学的禁止帯幅Eg1とEg2を異ならせることが
できる。
In Table 1, 24 1-layer and 24 2 layers a-SiC: when formed by H is to regulate the amount of hydrocarbon introduced into the blow discharge, optical band gap Eg 1 and Eg The two can be different.

なお、超薄膜積層型半導体層24の単位積層膜である24
1層と242層の膜厚d1およびd2、光学的禁止帯幅Eg1およ
びEg2はすべての周期で同一である必要はなく、各周期
で異なった値を有しても良いことは言うまでもない。
It should be noted that a unit laminated film of the ultra-thin laminated semiconductor layer 24
The film thicknesses d 1 and d 2 and the optical bandgap Eg 1 and Eg 2 of the one layer and the two layers need not be the same in all periods, and may have different values in each period. Needless to say.

また、本発明では、ドーパントの不純物濃度が1×10
18(cm-3)以下の場合には、i型層とみなすことができ
る。
Further, according to the present invention, the impurity concentration of the dopant is 1 × 10
If it is 18 (cm −3 ) or less, it can be regarded as an i-type layer.

以上、a−SiC:H/a−Si:Hヘテロ接合の場合について
説明してきたが、他のヘテロ接合すなわち窒化膜を用い
たヘテロ接合例えばa−SiN:H/a−Si:Hあるいはシリコ
ン・ゲルマニウム合金膜を用いたヘテロ接合、例えばa
−SiC:/a−Si:Hに本発明を適用しても同様な効果が得ら
れる。a−SiN:H/a−Si:Hヘテロ接合の場合には、241
と242の少くとも1層がa−SiN:Hで形成され、a−SiC:
H/a−Si:Ge:Hヘテロ接合の場合には、241層と242層の少
くとも1層がa−SiC:Hで形成されていれば良い。
In the above, the case of the a-SiC: H / a-Si: H heterojunction has been described. However, another heterojunction, that is, a heterojunction using a nitride film, such as a-SiN: H / a-Si: H or silicon. Heterojunction using germanium alloy film, for example, a
Similar effects can be obtained by applying the present invention to -SiC: / a-Si: H. a-SiN: H / a- Si: in the case of H heterojunctions one layer at least 24 one layer and 24 2 a-SiN: formed by H, a-SiC:
H / a-Si: Ge: in the case of H heterojunctions 24 one layer and 24 of the two layers at least one layer a-SiC: may be formed with H.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明により光電変換素子部の構造断面模式
図、第2図は単位積層膜の周期数mをパラメータとした
光応答時間の図、第3図は従来の光電変換素子部の断面
図である。 25,23……ヘテロ接合形成層 24……超薄膜積層型半導体層
FIG. 1 is a schematic cross-sectional view of the structure of a photoelectric conversion element according to the present invention, FIG. 2 is a view of light response time with the number of periods m of a unit laminated film as a parameter, and FIG. FIG. 25,23: Heterojunction forming layer 24: Ultra-thin stacked semiconductor layer

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭62−159475(JP,A) 特開 昭61−144833(JP,A) 特開 昭60−100485(JP,A) ────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-62-159475 (JP, A) JP-A-61-144833 (JP, A) JP-A-60-100485 (JP, A)

Claims (5)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】i型水素化非晶質シリコンと、このi型水
素化非晶質シリコンと光学的禁止帯幅の異なる半導体層
とで構成されるヘテロ接合において、該ヘテロ接合を形
成する2種類の半導体層間に、互いに光学的禁止帯幅の
異なる半導体層が交互に積層されて形成された超薄膜積
層型半導体層が介在されていることを特徴とするイメー
ジセンサ。
1. A heterojunction comprising an i-type hydrogenated amorphous silicon and a semiconductor layer having a different optical band gap from the i-type hydrogenated amorphous silicon. An image sensor comprising an ultra-thin laminated semiconductor layer formed by alternately laminating semiconductor layers having different optical band gaps from each other between semiconductor layers of different types.
【請求項2】前記超薄膜積層型半導体層が非晶質シリコ
ンを母体とする半導体より成っていることを特徴とする
特許請求の範囲第1項記載のイメージセンサ。
2. The image sensor according to claim 1, wherein said ultra-thin stacked semiconductor layer is made of a semiconductor having amorphous silicon as a base.
【請求項3】前記ヘテロ接合が、i型水素化非晶質シリ
コンと、p型水素化非晶質シリコンカーバイドまたはi
型水素化非晶質シリコンカーバイドまたはn型水素化非
晶質シリコンカーバイドより構成されていることを特徴
とする特許請求の範囲第1項あるいは第2項記載のイメ
ージセンサ。
3. The method according to claim 1, wherein the heterojunction is made of i-type hydrogenated amorphous silicon and p-type hydrogenated amorphous silicon carbide or i-type hydrogenated amorphous silicon.
3. The image sensor according to claim 1, wherein the image sensor is made of hydrogenated amorphous silicon carbide or n-type hydrogenated amorphous silicon carbide.
【請求項4】前記超薄膜積層型半導体層が、水素化非晶
質シリコンと水素化非晶質シリコンカーバイドより構成
されていることを特徴とする特許請求の範囲第1項、第
2項、或いは第3項記載のイメージセンサ。
4. The semiconductor device according to claim 1, wherein said ultra-thin stacked semiconductor layer comprises hydrogenated amorphous silicon and hydrogenated amorphous silicon carbide. Alternatively, the image sensor according to claim 3.
【請求項5】光導電膜積層型個体撮像素子であることを
特徴とする特許請求の範囲第1項、第2項、第3項或い
は第4項記載のイメージセンサ。
5. The image sensor according to claim 1, wherein the image sensor is a photoconductive film-stacked solid-state imaging device.
JP61021990A 1986-02-05 1986-02-05 Image sensor Expired - Fee Related JP2577347B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61021990A JP2577347B2 (en) 1986-02-05 1986-02-05 Image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61021990A JP2577347B2 (en) 1986-02-05 1986-02-05 Image sensor

Publications (2)

Publication Number Publication Date
JPS62181476A JPS62181476A (en) 1987-08-08
JP2577347B2 true JP2577347B2 (en) 1997-01-29

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004335734A (en) * 2003-05-07 2004-11-25 National Institute Of Advanced Industrial & Technology Thin film solar cell
JP2004335733A (en) * 2003-05-07 2004-11-25 National Institute Of Advanced Industrial & Technology Thin film solar cell
JP2009026887A (en) * 2007-07-18 2009-02-05 Omron Corp Solar cell
JP2017022175A (en) * 2015-07-07 2017-01-26 ルネサスエレクトロニクス株式会社 Semiconductor device and manufacturing method of the same

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4598164A (en) * 1983-10-06 1986-07-01 Exxon Research And Engineering Co. Solar cell made from amorphous superlattice material
JPS62159475A (en) * 1986-01-08 1987-07-15 Hitachi Ltd Amorphous silicon solar cell

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