JP2526566Y2 - 半導体装置の実装基板 - Google Patents
半導体装置の実装基板Info
- Publication number
- JP2526566Y2 JP2526566Y2 JP1990076378U JP7637890U JP2526566Y2 JP 2526566 Y2 JP2526566 Y2 JP 2526566Y2 JP 1990076378 U JP1990076378 U JP 1990076378U JP 7637890 U JP7637890 U JP 7637890U JP 2526566 Y2 JP2526566 Y2 JP 2526566Y2
- Authority
- JP
- Japan
- Prior art keywords
- mounting
- semiconductor element
- bonding wire
- metallized
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Structure Of Printed Boards (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990076378U JP2526566Y2 (ja) | 1990-07-18 | 1990-07-18 | 半導体装置の実装基板 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990076378U JP2526566Y2 (ja) | 1990-07-18 | 1990-07-18 | 半導体装置の実装基板 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0434741U JPH0434741U (https=) | 1992-03-23 |
| JP2526566Y2 true JP2526566Y2 (ja) | 1997-02-19 |
Family
ID=31617794
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990076378U Expired - Lifetime JP2526566Y2 (ja) | 1990-07-18 | 1990-07-18 | 半導体装置の実装基板 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2526566Y2 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007329502A (ja) * | 2007-08-16 | 2007-12-20 | Toshiba Corp | 発光装置 |
| JP4403199B2 (ja) * | 2008-11-17 | 2010-01-20 | 株式会社東芝 | 発光装置 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63198341A (ja) * | 1987-02-13 | 1988-08-17 | Nec Corp | 半導体装置 |
| JPH0648874Y2 (ja) * | 1988-10-26 | 1994-12-12 | 富士電機株式会社 | 半導体装置 |
-
1990
- 1990-07-18 JP JP1990076378U patent/JP2526566Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0434741U (https=) | 1992-03-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |