JP2024045493A - Game machine - Google Patents

Abstract

To provide a game machine capable of making suitable a configuration regarding a setting value for determining a degree of advantage of the game machine.SOLUTION: A main-side CPU 63 executes setting value update processing by execution of setting change operation when operating power starts to be supplied, and executes the setting confirmation processing by execution of the setting confirmation processing. When supply of operating power to the main-side CPU 63 is stopped in a situation in which the setting update processing is under execution, a start of processing for proceeding with a game is regulated as far as the setting change operation or the setting confirmation operation is not executed in the subsequent resumption of supply of operating power. An OFF confirmation flag is set to "1" when the setting value update processing is started in a configuration in which a reset button 68c needs to be pressed so as to start the setting value update processing and a setting value of a selection object is changed each time when the reset button 68c is pressed in the setting value update processing.SELECTED DRAWING: Figure 6

Description

The present invention relates to a gaming machine.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are ejected. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section (for example, see Patent Document 1).

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

JP 2009-261415 A

Here, in gaming machines such as those exemplified above, it is necessary to have an optimal configuration for the setting values that determine the advantageous degree of the gaming machine, and there is still room for improvement in this regard.

The present invention has been made in view of the circumstances exemplified above, and an object of the present invention is to provide a gaming machine that can have a suitable configuration regarding setting values that determine the advantage of the gaming machine. It is something.

In order to solve the above problem, the present invention provides a method for executing a profit awarding process in a manner corresponding to a set value set as a use target from among a plurality of set values corresponding to the advantage level of a player;
a setting-related execution means for executing a predetermined setting-related process related to the setting value based on a specific related operation being performed when the supply of operating power is started;
a separate related execution means for executing a predetermined separate related process related to the setting value based on a predetermined related operation being performed when the supply of operating power is started;
a restricting means for restricting the execution of a predetermined progress process for progressing a game when the supply of operating power is stopped before the completion of the predetermined setting-related process and the supply of operating power is started thereafter;
Equipped with
The regulating means is characterized in that even if the supply of operating power is stopped before completing the specified setting-related processing, the regulating state is not established based on the fact that the specific related operation has been performed when the supply of operating power is started thereafter, and even if the supply of operating power is stopped before completing the specified setting-related processing, the regulating means is characterized in that it is not established based on the fact that the specific related operation has been performed when the supply of operating power is started thereafter.

The present invention makes it possible to optimally configure the settings that determine the advantageous degree of a gaming machine.

1 is a perspective view showing a pachinko machine according to a first embodiment. FIG. 1 is an exploded perspective view showing the main structure of a pachinko machine. FIG. 2 is a front view showing the configuration of the game board. An explanatory diagram to explain the configuration regarding the discharge of game balls that have flowed down the game area. FIG. It is a block diagram showing the electrical configuration of a pachinko machine. FIG. 3 is an explanatory diagram for explaining the contents of various counters used for winning/losing lottery and the like. FIG. 4 is an explanatory diagram for explaining various tables stored in the main ROM. 4 is a flowchart showing a main process executed by a main CPU. 3 is a flowchart showing a setting value update process executed by the main CPU. 11 is a flowchart showing a timer interrupt process executed by a main CPU. It is a flowchart which shows the special figure special electric control process performed by main side CPU. It is a flowchart showing special symbol fluctuation start processing executed by the main side CPU. FIG. 3 is an explanatory diagram for explaining a configuration in which a detection result of a ball entry detection sensor is input to a main CPU. It is a flowchart which shows the ball entry detection process performed by main side CPU. A block diagram to explain the electrical configuration of a dispensing control device and various devices that communicate with the dispensing control device. 13 is a flowchart showing a timer interrupt process executed by the dispensing CPU. 4 is a block diagram for explaining an electrical configuration of a management IC. FIG. FIG. 2 is an explanatory diagram for explaining the configuration of an input port of a management side I/F. FIG. 3 is an explanatory diagram for explaining the configuration of a correspondence memory. FIG. 2 is an explanatory diagram for explaining a configuration of a history memory; It is a flowchart which shows the recognition process performed by main side CPU. 3 is a flowchart showing management processing executed by a management CPU. (a) to (d) are time charts showing how information on the correspondence between the first to fifteenth buffers and the types of signals is stored in the correspondence memory; 13 is a flowchart showing a management output process executed by a main CPU. 3 is a flowchart showing history setting processing executed by a management CPU. 4A to 4E are time charts showing how history information is stored in a history memory. 3 is a flowchart showing output processing of a setting value update signal executed by the main CPU. 3 is a flowchart illustrating a setting update recognition process executed by a management CPU. 3 is a flowchart showing display output processing executed by a management CPU. 3 is a flowchart showing display processing executed by a management CPU. (a) It is a flowchart which shows the process for data output performed by main side CPU, (b) It is a flowchart which shows the process for external output performed by management side CPU. 13 is an explanatory diagram for explaining various tables stored in a main ROM in the second embodiment. FIG. FIG. 13 is an explanatory diagram for explaining the configuration of a separate storage memory in the third embodiment. 13 is a flowchart showing a setting update recognition process executed by a management CPU. 12 is a flowchart showing repeated change monitoring processing executed by the management CPU. 13 is a flowchart showing a repeated change monitoring process executed by a main CPU in the fourth embodiment; 13 is a flowchart showing a setting update recognition process executed by a management CPU in the fifth embodiment. It is an explanatory view for explaining the composition of history memory in a 6th embodiment. 13 is a flowchart showing a history setting process executed by a management CPU. 13 is a flowchart showing a setting update recognition process executed by a management CPU. It is an explanatory view for explaining the composition of memory for history in a 7th embodiment. 3 is a flowchart illustrating a setting update recognition process executed by a management CPU. It is an explanatory view for explaining the composition of history memory in an 8th embodiment. 3 is a flowchart illustrating a setting update recognition process executed by a management CPU. 3 is a flowchart showing history setting processing executed by a management CPU. 13 is a flowchart showing a display output process executed by a management CPU. FIG. 23 is an explanatory diagram for explaining the configuration of an input port of a management side I/F in the ninth embodiment. It is a flowchart which shows the recognition process performed by main side CPU. 13 is a flowchart showing a management process executed by a management side CPU. 5A to 5H are time charts showing how information on the correspondence between the first to twelfth buffers and signal types is stored in the correspondence memory; It is a block diagram for explaining the structure of the signal path which transmits the detection result of each ball entry detection sensor to the main side CPU and management IC in a 10th embodiment. A front view of the main control device in the eleventh embodiment. 10 is a block diagram for explaining the electrical configuration for performing various displays in the first to fourth notification display devices based on the control of an MPU. FIG. 13 is a flowchart showing a display process executed by a management CPU. 13 is a flowchart showing a setting value update process executed by a main CPU. (a) An explanatory diagram for explaining the display mode of the first to fourth notification display devices when the game history management results are displayed, and (b) an explanatory diagram for explaining the display mode of the first to fourth notification display devices when the setting state of the pachinko machine is changed. 6A to 6H are time charts showing how the first to fourth notification display devices are put into display states. 23A is an explanatory diagram for explaining the configuration of a first notification display device in the twelfth embodiment, and FIG. 23B is an explanatory diagram for explaining the configuration of a second notification display device. This is an explanatory diagram for explaining the display contents of the first alert display device and the second alert display device when the first to fourth alert display devices display the results of game history management and when they display that the setting state of the pachinko machine is in a changeable state in which it is possible to change the setting state. 13 is a flowchart showing a setting value update process executed by a main CPU. FIG. 23 is an explanatory diagram for explaining the configuration of an abnormality display area in the thirteenth embodiment. 13 is a flowchart showing an abnormality setting process executed by a main CPU. 3 is a flowchart showing an abnormality display process executed by the main CPU. 12 is a flowchart showing management output processing executed by the main CPU in the fourteenth embodiment. It is a flowchart which shows the main processing performed by the main side CPU in another form. FIG. 23 is an explanatory diagram for explaining the setting mode of programs and data in the main ROM in the fifteenth embodiment. FIG. 11 is an explanatory diagram for explaining a setting mode of each area in the main RAM. 11 is a flowchart showing a timer interrupt process executed by a main CPU. 3 is a flowchart showing management processing executed by the main CPU. 13 is a flowchart showing a management execution process executed by a main CPU. 11 is an explanatory diagram for explaining various areas of a work area for non-specific control used for managing game history. FIG. 3 is a flowchart showing a check process executed by the main CPU. It is a flowchart which shows the normal ball entry management process performed by main side CPU. 13 is a flowchart showing a result calculation process executed by a main CPU. 3 is a flowchart showing display processing executed by the main CPU. 23 is a flowchart showing a management process executed by a main CPU in the sixteenth embodiment. 12 is a flowchart showing management execution processing executed by the main CPU in the seventeenth embodiment. 23 is a flowchart showing the management execution process executed by the main CPU in the eighteenth embodiment. 23 is a flowchart showing a management execution process executed by a main CPU in the nineteenth embodiment. 12 is a flowchart showing management processing executed by the main CPU in the twentieth embodiment. 13 is a flowchart showing a management execution process executed by a main CPU. FIG. 7 is an explanatory diagram for explaining the electrical configuration in the twenty-first embodiment. 12 is a flowchart showing main processing executed by a main CPU in the twenty-second embodiment. 13 is a flowchart showing a setting value update process executed by a main CPU. 11 is a flowchart showing a timer interrupt process executed by a main CPU. 3 is a flowchart showing a setting confirmation process executed by the main CPU. 13 is a flowchart showing a RAM monitoring process executed by a main CPU. It is a flowchart which shows the main processing performed by the main side CPU in another form. 13 is a flowchart showing a setting value update process executed by a main CPU in another embodiment. A flowchart showing main processing executed by a main CPU in the 23rd embodiment. A flowchart showing a RAM monitoring process executed by the main CPU in the 24th embodiment. 13 is a flowchart showing RAM monitoring processing executed by the main CPU in the twenty-fifth embodiment. 13 is a flowchart showing a management execution process executed by a main CPU. 13 is a flowchart showing another monitoring process executed by a main CPU. 12 is a flowchart showing management processing executed by the main CPU in the twenty-sixth embodiment. 23 is a flowchart showing a management process executed by a main CPU in the twenty-seventh embodiment. A flowchart showing the management processing executed by the main CPU in the 28th embodiment. 13 is a flowchart showing management processing executed by the main CPU in the twenty-ninth embodiment. 30 is a flowchart showing a main process executed by a main CPU in the 30th embodiment. 3 is a flowchart showing a power outage information storage process executed by the main CPU. (a) It is a block diagram for explaining the configuration of the MPU, and (b) is a time chart showing how the reset signal is output by the reset signal output section. 3 is a flowchart showing timer interrupt processing executed by the main CPU. 13 is a flowchart showing a setting monitoring process executed by a main CPU. 13 is a flowchart showing a management process executed by a main CPU. 13 is a flowchart showing a management execution process executed by a main CPU. 13 is a flowchart showing another monitoring process executed by a main CPU. 31 is a flowchart showing a main process executed by a main CPU in the thirty-first embodiment. 13 is a flowchart showing a clearing process executed by a main CPU when an abnormality occurs. 13 is a flowchart showing a clearing process for non-specific control executed by a main CPU. 32 is a flowchart showing a power outage information storage process executed by a main CPU in the 32nd embodiment. 3 is a flowchart showing checksum monitoring processing executed by the main CPU. 13 is a flowchart showing a clearing process for non-specific control executed by a main CPU. 13 is a flowchart showing main processing executed by the main CPU in the 33rd embodiment. 13 is a flowchart showing a setting confirmation process executed by a main CPU. 13 is a flowchart showing a setting value update process executed by a main CPU. 11 is a flowchart showing a first timer interrupt process executed by a main CPU. 13 is a flowchart showing a setting monitoring process executed by a main CPU. FIG. 2 is a block diagram for explaining a configuration for controlling the display of various display circuits by a main CPU. FIG. 1A is an explanatory diagram for explaining various buffers provided in a work area for specific control, and FIG. 1B is an explanatory diagram for explaining various memory areas provided in a work area for non-specific control. FIG. 2 is an explanatory diagram for explaining the electrical configuration of a display IC. (a) to (g) are time charts showing how type data and display data are transmitted from the main CPU to the display IC and how the display data transmitted from the display IC is received by the first display circuit or the second display circuit. 3 is a flowchart showing second timer interrupt processing executed by the main CPU. (a) It is an explanatory diagram for explaining the display contents of the first to fourth notification display devices in a situation where a setting value is updated, and (b) the first to fourth notifications in a situation where a setting value is confirmed. FIG. 3 is an explanatory diagram for explaining display contents of a display device for use in a computer. A flowchart showing a setting value update process executed by the main CPU in the thirty-fourth embodiment. FIG. 23 is an explanatory diagram for explaining the electrical configuration of a calculation result storage area in the thirty-fifth embodiment. (a) to (d) are explanatory diagrams for explaining the display contents of the first to fourth notification display devices. 5A to 5C are explanatory diagrams for explaining the display contents of the first to fourth notification display devices. (a) to (e) are time charts showing how the base values of various areas are notified on the first to fourth notification display devices; 3 is a flowchart showing result calculation processing executed by the main CPU. 3 is a flowchart showing display processing executed by the main CPU. 3 is a flowchart showing main processing executed by a main CPU. 11 is a flowchart showing a first timer interrupt process executed by a main CPU. 13 is a flowchart showing a second timer interrupt process executed by a main CPU. 3 is a flowchart showing normal setting processing executed by the main CPU. 13 is a flowchart showing a setting confirmation process executed by a main CPU. 3 is a flowchart showing a setting value update process executed by the main CPU. (a) to (f) are time charts for explaining the display contents of the first to fourth notification display devices when the supply of operating power to the main CPU is started; 12 is a flowchart showing main processing executed by the main CPU in the 36th embodiment. 12 is a flowchart showing main processing executed by the main CPU in the thirty-seventh embodiment. A flowchart showing the normal setting process executed by the main CPU in the thirty-eighth embodiment. (a) to (d) are explanatory diagrams for explaining a setting corresponding storage area provided in the main side ROM in the thirty-ninth embodiment; 12 is a flowchart showing a process of reading a validity table executed by the main CPU. 12 is a flowchart showing a setting process for a fifth display data buffer during a setting update executed by the main CPU. 13A to 13C are explanatory diagrams for explaining a setting corresponding storage area provided in a main ROM in the fortieth embodiment. (a) It is an explanatory view for explaining various display parts provided in the area which becomes visible from the front of the pachinko machine through the window panel in the 41st embodiment, and (b) It is an explanatory diagram for explaining the display contents of the round display part. FIG. 12 is a flowchart showing main processing executed by the main CPU in the 42nd embodiment. 3 is a flowchart showing a first timer interrupt process executed by the main CPU. A flowchart showing the result calculation processing executed by the main CPU in the 43rd embodiment. 13 is a flowchart showing a display process executed by a main CPU. (a) to (g) are time charts showing how the base values of various areas are notified on the first to fourth notification display devices. (a) to (g) are time charts showing how the base values of various areas are notified by the first to fourth notification display devices in the 44th embodiment; 12 is a flowchart showing main processing executed by the main CPU in the 45th embodiment. 11 is an explanatory diagram for explaining the contents of a storage area related to setting values provided in a work area for specific control. FIG. 13 is a flowchart showing a setting confirmation process executed by a main CPU. 12 is a flowchart showing a setting process for a fifth display data buffer during setting confirmation executed by the main CPU. 13 is a flowchart showing a setting value update process executed by a main CPU. 12 is a flowchart showing a setting process for a fifth display data buffer during a setting update executed by the main CPU. Explanation to explain the contents of the process executed in the main process when the supply of operating power is resumed after the power outage process is executed in a situation where the setting value update process or the setting confirmation process is being executed. It is a diagram. 5A to 5E are time charts showing end timings of setting value update processing and setting confirmation processing in relation to the operating state of the setting key insertion section. A flowchart showing the main processing executed by the main CPU in the 46th embodiment. Explanation to explain the contents of the process executed in the main process when the supply of operating power is resumed after the power outage process is executed in a situation where the setting value update process or the setting confirmation process is being executed. It is a diagram. This is an explanatory diagram for explaining the contents of the processing executed in the main processing when the supply of operating power is resumed after a power outage processing is executed in a situation where a setting value update processing or a setting confirmation processing is being executed in the 47th embodiment. This is an explanatory diagram for explaining the contents of the processing executed in the main processing when the supply of operating power is resumed after a power outage processing is executed in a situation where a setting value update processing or a setting confirmation processing is being executed in the 48th embodiment. A flowchart showing the main processing executed by the main CPU in the forty-ninth embodiment. 13 is a flowchart showing a setting confirmation process executed by a main CPU. 13 is a flowchart showing a setting value update process executed by a main CPU. 13A to 13H are time charts showing how first timer interrupt processing and second timer interrupt processing are permitted in a situation in which processing is being executed at the start of the supply of operating power. 13A to 13G are time charts showing the progress of processing when an abnormality occurs in relation to the power outage flag, the checksum, or a setting value. (a) to (g) are time charts showing the display contents of the first to fourth notification display devices when the supply of operating power to the main CPU is started; Explanation to explain the contents of the process executed in the main process when the supply of operating power is resumed after the power outage process is executed in a situation where the setting value update process or the setting confirmation process is being executed. It is a diagram. FIG. 2 is an explanatory diagram for explaining the electrical configuration of the audio and light emission control device. 13 is a flowchart showing a performance control process executed by the sound/light side CPU. FIG. 6 is an explanatory diagram for explaining the action corresponding to the content of the process executed in the process at the start of supply of operating power in the main CPU. It is a flow chart which shows production control processing performed by sound and light side CPU in a 50th embodiment. FIG. 6 is an explanatory diagram for explaining the action corresponding to the content of the process executed in the process at the start of supply of operating power in the main CPU. 12 is a flowchart showing main processing executed by the main CPU in the 51st embodiment. A flowchart showing the main processing executed by the main CPU in the 52nd embodiment. A flowchart showing the main processing executed by the main CPU in the 53rd embodiment. 7(a) to (g) are time charts showing subsequent processing when the supply of operating power to the main CPU is stopped while the setting value update processing is being executed. FIG. 13 is a flowchart showing a setting value update process executed by a main CPU. 11 is an explanatory diagram for explaining the contents of a memory area provided in a work area for specific control. FIG. (a) to (f) are time charts showing how setting values to be updated are updated. A flowchart showing the main processing executed by the main CPU in the 54th embodiment.

<First embodiment>
Hereinafter, a first embodiment of a pachinko game machine (hereinafter referred to as a "pachinko machine"), which is a type of gaming machine, will be described in detail based on the drawings. FIG. 1 is a perspective view of a pachinko machine 10, and FIG. 2 is an exploded perspective view showing the main components of the pachinko machine 10. In addition, in FIG. 2, the structure within the gaming area PA of the pachinko machine 10 is omitted for convenience.

As shown in FIG. 1, a pachinko machine 10 has an outer frame 11 that forms the outer shell of the pachinko machine 10, and a gaming machine main body 12 that is attached to the outer frame 11 so that it can rotate forward. The outer frame 11 is made of wooden boards connected to its four sides and has a rectangular frame shape. The pachinko machine 10 is installed in an amusement hall by attaching and fixing the outer frame 11 to an island facility. Note that the outer frame 11 is not a required component of the pachinko machine 10, and the outer frame 11 may be attached to the island facility of the amusement hall.

As shown in FIG. 2, the gaming machine main body 12 includes an inner frame 13, a front door frame 14 disposed in front of the inner frame 13, and a back pack unit 15 disposed behind the inner frame 13. ing. An inner frame 13 of the gaming machine main body 12 is rotatably supported by the outer frame 11. Specifically, when viewed from the front, the inner frame 13 is rotatable forward with the left side being the rotation base end side and the right side being the rotation tip side.

The front door frame 14 is rotatably supported by the inner frame 13, and can be rotated forward with the left side as the base end and the right side as the tip end when viewed from the front. The back pack unit 15 is rotatably supported by the inner frame 13, and can be rotated backward with the left side as the base end and the right side as the tip end when viewed from the front.

The gaming machine main body 12 is provided with a locking device at its rotating tip, and has a function of locking the gaming machine main body 12 against the outer frame 11 so that it cannot be opened. It has a function of locking the door frame 14 with respect to the inner frame 13 so that it cannot be opened. Each of these locked states is released by performing an unlocking operation using an unlocking key on the cylinder lock 17 provided in an exposed manner on the front surface of the pachinko machine 10.

Next, we will explain the configuration of the front side of the gaming machine main body 12.

The inner frame 13 is mainly composed of a resin base 21 whose outer shape is substantially the same as that of the outer frame 11. A substantially elliptical window hole 23 is formed in the center of the resin base 21 . A game board 24 is detachably attached to the resin base 21. The game board 24 is made of plywood, and the game area PA formed on the front surface of the game board 24 is exposed to the front side of the inner frame 13 through the window hole 23 of the resin base 21.

Here, the configuration of the game board 24 will be explained based on Figure 3. Figure 3 is a front view of the game board 24.

An inner rail section 25 and an outer rail section 26 are attached to the game board 24 so as to define a part of the outer edge of the game area PA, and the inner rail section 25 and the outer rail section 26 form a guide rail as a guide means. Game balls launched from a game ball launching mechanism 27 (see Figure 2) attached below the window hole 23 in the resin base 21 are guided to the upper part of the game area PA by the guide rail.

Incidentally, the game ball firing mechanism 27 includes a firing rail 27a that extends toward the guide rail, a ball feeding device 27b that supplies game balls stored in an upper tray 55a (described later) onto the firing rail 27a, and a ball feeding device 27b that supplies game balls stored in an upper tray 55a (described later) onto the firing rail 27a. The solenoid 27c is an electric actuator that fires the game balls supplied to the guide rail toward the guide rail. When the firing operation device (or operation handle) 28 provided on the front door frame 14 is rotated, the solenoid 27c is driven and controlled, and the game ball is fired.

The game board 24 is formed with a plurality of large and small openings passing through it in the front and back direction. Each opening is provided with a general winning opening 31, a special winning winning device 32, a first operating opening 33, a second operating opening 34, a through gate 35, a variable display unit 36, a special drawing unit 37, a general drawing unit 38, etc. ing. A total of four general winning holes 31 are provided, and one each is provided for the others.

Even if a ball enters the through gate 35, no game balls are dispensed. On the other hand, when balls enter the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34, a predetermined number of game balls are dispensed. Specifically, when one game ball enters the first operating opening 33 or when one game ball enters the second operating opening 34, one prize ball is dispensed, when one game ball enters the general winning opening 31, ten prize balls are dispensed, and when one game ball enters the special electric winning device 32, fifteen prize balls are dispensed.

Note that the number of prize balls is arbitrary, and for example, the second operating port 34 may have a smaller number of prize balls than the first operating port 33, and the second operating port 34 may have a smaller number of winning balls than the first operating port 33. It is also possible to have a configuration in which the number of prize balls is greater than 33.

In addition, an out port 24a is provided at the bottom of the game board 24, and game balls that have not entered various winning ports are discharged from the gaming area PA through the out port 24a. Further, the game board 24 has a large number of nails 24b planted therein in order to appropriately disperse and adjust the falling direction of the game balls, and various members such as a windmill are also arranged.

Here, "ball entry" means that the game ball passes through a specified opening, and includes not only the case where the game ball passes through an opening and is discharged from the game area PA, but also the case where the game ball continues to flow down the game area PA without being discharged from the game area PA after passing through an opening. However, in the following explanation, in order to clearly distinguish from the game ball entering the outlet 24a, the game ball entering the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the through gate 35 will also be referred to as "winning."

The first operating port 33 and the second operating port 34 are installed in the game board 24 as a unit as an operating port device. Both the first operating port 33 and the second operating port 34 are open upward. Further, both the operating ports 33 and 34 are arranged in the vertical direction with the first operating port 33 facing upward. The second actuating port 34 is provided with a general electric accessory 34a as a guide piece consisting of a pair of left and right movable pieces. When the electric utility object 34a is in the closed state, the game ball cannot enter the second operating port 34, and when the general electric accessory 34a is in the open state, it is possible to enter the second operating hole 34.

A through gate 35 is provided upstream of the second operating port 34 in the flow direction of the game ball. The through gate 35 has a through hole (not shown) that penetrates vertically, and a game ball that enters the through gate 35 flows down the game area PA after entering. This makes it possible for a game ball that enters the through gate 35 to enter the second operating port 34.

Based on the winning in the through gate 35, the general electric accessory 34a of the second operating port 34 is switched from the closed state to the open state. Specifically, an internal lottery is held triggered by winning in the through gate 35, and a general figure display of the normal figure unit 38 provided in the lower right corner, which is an area where the game ball does not pass through in the gaming area PA. A changing display of the picture is performed in the section 38a. Then, when the result of the internal lottery is a power open winning, a stop result corresponding to the result is displayed, and the fluctuating display of the general figure display section 38a is ended, the state shifts to the general electric power open state. In the general power open state, the general power accessory 34a is in the open state in a predetermined manner.

The map display unit 38a is configured with a segment display in which a number of LED display segments are arranged in a predetermined manner, but is not limited to this and may be configured with other types of display devices such as a liquid crystal display device, an organic EL display device, a CRT or a dot matrix display. The pattern displayed on the map display unit 38a may be a number of different characters, a number of symbols, a number of characters, or a number of colors that are switched between.

In the general drawing unit 38, a general drawing holding display section 38b is provided at a position adjacent to the general drawing display section 38a. The number of game balls that have entered the through gate 35 is reserved up to a maximum of four, and the number of reserved balls is displayed by lighting the regular game reservation display section 38b.

A winning lottery is held using the win at the first operating port 33 or the second operating port 34 as a trigger. Then, the lottery result is clearly displayed through the display effect on the symbol display device 41 of the special symbol unit 37 and the variable display unit 36.

Regarding the special chart unit 37 in detail, the special chart unit 37 is provided with a special chart display section 37a. The display area of the special chart display section 37a is narrower than the display surface 41a of the pattern display device 41. In the special chart display section 37a, a winning lottery is held by triggering the winning of the first operating port 33 or the winning of the second operating port 34, and a variable display of the pattern or a predetermined display is performed. Then, the result corresponding to the lottery result is displayed. The special chart display section 37a is configured with a segment display in which a plurality of display segments using LEDs are arranged in a predetermined manner, but is not limited to this, and may be configured with other types of display devices such as a liquid crystal display device, an organic EL display device, a CRT or a dot matrix display device. In addition, the pattern displayed on the special chart display section 37a may be configured to display multiple types of letters, multiple types of symbols, multiple types of characters, or multiple types of colors.

In the special figure unit 37, a special figure pending display section 37b is provided at a position adjacent to the special figure display section 37a. The number of game balls entered into the first operating port 33 or the second operating port 34 is reserved up to a maximum of four, and the number of reserved balls is displayed by lighting the special symbol reservation display section 37b.

Regarding the pattern display device 41 in detail, the pattern display device 41 is configured as a liquid crystal display device equipped with a liquid crystal display, and the display content is controlled by a display control device described later. Note that the pattern display device 41 is not limited to a liquid crystal display device, and may be other display devices having a display screen such as a plasma display device, an organic EL display device, or a CRT, or may be a dot matrix display device.

In the symbol display device 41, when a variable display of a symbol or a predetermined display is performed on the special symbol display section 37a based on a winning at the first operating port 33 or a winning at the second operating port 34, the symbol is changed accordingly. A variable display or a predetermined display is performed. For example, on the display surface 41a of the symbol display device 41, three symbol rows of an upper row, a middle row, and a lower row are set as a plurality of display areas, and in each symbol row, a main character numbered from "1" to "9" is set. The symbols are scrolled and displayed in ascending or descending order. In this scroll display, scrolling display for all symbol rows is first started, and then the scroll display is switched to standby display in the order of upper symbol row → lower symbol row → middle symbol row, and finally a predetermined display is displayed in each symbol row. The process ends with the symbol displayed statically. In a game round in which the game result is a jackpot, a combination of predetermined symbols is stopped and displayed on the active line set in advance on the display surface 41a of the symbol display device 41. Specifically, in the case of the most profitable jackpot result, which will be described later, the same odd-numbered symbol combination will be stopped and displayed, and in the case of a low-probability jackpot result, which will be described later, the same even-numbered symbol combination will be stopped and displayed. If the result is a low win/high probability jackpot result, the combination of symbols is not the same symbol combination, but the combination of symbols that would not be stopped and displayed if the result is not a low win/high probability jackpot result is stopped and displayed.

In addition, in the symbol display device 41, not only the display effect triggered by winning to the first operating port 33 or the second operating port 34, but also the display effect during the opening/closing execution mode that shifts after winning is performed. be exposed. In addition, based on winning to either of the actuating ports 33, 34, the display starts on the special symbol display section 37a and the symbol display device 41, and the period from displaying a predetermined result to ending is one game round. equivalent to times. Further, the manner in which the symbols are displayed in a variable manner in the symbol display device 41 is not limited to the above-mentioned one, and may be arbitrary, such as the number of symbol rows, the direction of the variable display of symbols in the symbol rows, the number of symbols in each symbol row, etc. can be changed as appropriate. Further, the symbols displayed in a variable manner on the symbol display device 41 are not limited to the above-mentioned symbols, and for example, only numbers may be displayed in a variable manner as the symbols.

When a big jackpot is won in a lottery based on winning the first operating port 33 or the second operating port 34, the mode transitions to an open/close execution mode in which winning is possible in the special electric winning device 32. The special electric winning device 32 has a large winning port (not shown) that leads to the back side of the game board 24, and an open/close door 32a that opens and closes the large winning port. The open/close door 32a is arranged in either a closed state or an open state. Specifically, the open/close door 32a is normally in a closed state in which game balls cannot win, and is switched to an open state in which game balls can win if an internal lottery is selected to transition to the open/close execution mode. Incidentally, the open/close execution mode is a mode to which the mode transitions when a winning result is obtained. Note that while winning is not impossible in the closed state, it may be configured to be in a state in which winning is more difficult than in the open state.

FIG. 4 is an explanatory diagram for explaining the configuration regarding the discharge of game balls that have flown down the game area PA.

As already explained, the game ball that enters any of the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a is ejected from the gaming area PA. In other words, the game ball ejected from the game ball launch mechanism 27 and flowing into the game area PA is either the general winning port 31, the special electric winning device 32, the first operating port 33, the second operating port 34, or the out port 24a. By entering the ball, the ball will be ejected from the gaming area PA. A game ball that enters any of the general winning opening 31, special electric winning device 32, first operating opening 33, second operating opening 34, and out opening 24a is guided to the back side of the gaming board 24.

On the back side of the game board 24, discharge passages 42 to 48 are formed in correspondence with the general winning opening 31, the special winning winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a, respectively. . The game balls that have flowed into the discharge passages 42 to 48 flow down the discharge passages 42 to 48 into which they have flowed, and are guided to the lower end of the game board 24 on the back side of the game board 24, and then to the discharge ball collection part (not shown). will be collected. Then, the game balls collected by the discharged ball collection section are discharged to a ball circulation device of the island equipment in which the pachinko machine 10 is installed in the game hall.

Each of the discharge passages 42 to 48 is provided with various detection sensors 42a to 48a for detecting game balls. The discharge passage sections 42 to 48 and the detection sensors 42a to 48a will be explained below. As described above, there are four general winning openings 31, so there are discharge passages 42 to 44 corresponding to each of the four openings. In this case, one detection sensor 42a, 43a is provided. Specifically, the first winning a prize opening detection sensor 42a is provided so that the detection range exists in the middle of the first discharge passage part 42, and the detection range exists in the middle of the second discharge passage part 43. A second winning opening detection sensor 43a is provided so as to exist. The game ball that entered the leftmost general winning hole 31 is detected by the first winning hole detection sensor 42a while passing through the first discharge passage section 42, and the game ball that entered the general winning hole 31 on the right side The ball is detected by the second prize opening detection sensor 43a while passing through the second discharge passage section 43. In addition, a third discharge passage portion 44 is provided for the two right-side general winning ports 31 so as to merge at an intermediate position. The third discharge passage section 44 has an inlet side area corresponding to each of the two general winning ports 31, and has one outlet side area by merging the inlet side areas in the middle. are doing. The third winning a prize opening detection sensor 44a is provided so that a detection range exists in the middle of the exit side area of the third discharge passage section 44. A game ball that enters one of the two general winning holes 31 on the right side is detected by the third winning hole detection sensor 44a while passing through the third discharge passage section 44.

A fourth discharge passage section 45 is provided corresponding to the special electric prize winning device 32. A special electric detection sensor 45a is provided so that a detection range exists in the middle of the fourth discharge passage part 45, and the game ball that enters the special electric winning device 32 is on the way to pass through the fourth discharge passage part 45. It is detected by the special electric detection sensor 45a. A fifth discharge passage portion 46 is provided corresponding to the first operating port 33 . A first operation port detection sensor 46a is provided so that a detection range exists in the middle of the fifth discharge passage section 46, and the game ball that enters the first operation port 33 passes through the fifth discharge passage section 46. While passing, it is detected by the first operating port detection sensor 46a. A sixth discharge passage portion 47 is provided corresponding to the second operating port 34 . A second operating port detection sensor 47a is provided so that a detection range exists in the middle of the sixth discharge passage portion 47, and the game ball that enters the second operating port 34 passes through the sixth discharge passage portion 47. While passing, it is detected by the second operating port detection sensor 47a. A seventh discharge passage portion 48 is provided corresponding to the out port 24a. An out-port detection sensor 48a is provided so that a detection range exists in the middle of the seventh discharge passage section 48, and the game ball that enters the out-port 24a is on the way to pass through the seventh discharge passage section 48. It is detected by the outlet detection sensor 48a.

A gaming ball that is detected by any one of the various detection sensors 42a-48a will not be detected by the other detection sensors 42a-48a. A gate detection sensor 49a is also provided for the through gate 35, and a gaming ball that passes through the through gate 35 on its way down the play area PA is detected by the gate detection sensor 49a.

The various detection sensors 42a-49a are all electromagnetic induction type proximity sensors, but any sensor can be used as long as it can detect game balls individually. The various detection sensors 42a-49a are electrically connected to the main control device 60, which will be described later, and the detection results of the various detection sensors 42a-49a are output to the main control device 60. Specifically, the various detection sensors 42a-49a output a LOW level signal when they are not detecting a game ball, and output a HI level signal when they are detecting a game ball. However, this is not limited to the above, and the relationship between HI and LOW may be reversed.

As shown in FIG. 2, a front door frame 14 is provided so as to cover the entire front side of the inner frame 13 in which the game board 24 of the above configuration is attached to the resin base 21. As shown in FIG. 1, the front door frame 14 is formed with a window portion 51 that allows almost the entire area of the game area PA to be viewed from the front. The window portion 51 has a substantially elliptical shape, and a window panel 52 is fitted into it. The window panel 52 is formed of glass and is colorless and transparent, but is not limited to this and may be formed of synthetic resin and is colorless and transparent, or may be formed of color and transparency as long as the game area PA can be viewed through the window panel 52 from the front of the pachinko machine 10.

A display light emitting section 53 is provided above the window section 51. Further, a pair of left and right speaker sections 54 are provided to output sound effects and the like according to the gaming state. Further, below the window portion 51, an upper bulging portion 55 and a lower bulging portion 56, which bulge toward the front side, are arranged vertically in parallel. An upper plate 55a that opens upward is provided inside the upper bulging portion 55, and a lower plate 56a that similarly opens upward is provided inside the lower bulging portion 56. The upper tray 55a has a function of temporarily storing game balls put out from a payout device described later and guiding them to the game ball firing mechanism 27 side while arranging them in a line. Further, the lower tray 56a has a function of storing surplus game balls in the upper tray 55a.

Next, the configuration of the back side of the gaming machine main body 12 will be explained.

As shown in FIG. 2, a main control device 60 that controls the main control of the game is mounted on the back side of the inner frame 13 (specifically, the game board 24). FIG. 5 is a front view of the main controller 60.

As shown in FIG. 5, the main control device 60 includes a main control board 61 housed in a board box 60a. An MPU 62 is mounted on an element mounting surface, which is one board surface of the main control board 61. The board box 60a is formed transparent so that the MPU 62 housed in the board box 60a can be visually observed from the outside of the board box 60a. Note that although the board box 60a is formed to be colorless and transparent, it may be formed to be colored and transparent as long as it is possible to visually observe the MPU 62 housed in the board box 60a from outside the board box 60a. The main control device 60 is mounted on the back surface of the resin base 21 in a board box 60a such that an opposing wall portion 60b facing the element mounting surface of the main control board 61 faces the rear of the pachinko machine 10. Therefore, by opening the gaming machine main body 12 forward of the pachinko machine 10 with respect to the outer frame 11 and exposing the back surface of the resin base 21, it becomes possible to visually see the opposing wall 60b of the board box 60a, and It becomes possible to visually observe the MPU 62 through the opposing wall portion 60b.

The board box 60a is formed by combining a plurality of case bodies 60c back and forth, and these plurality of case bodies 60c prevent separation of these case bodies 60c and leave traces when these case bodies 60c are separated. A connecting portion 60e is provided for leaving a . A plurality of coupling portions 60e are arranged in parallel on one side of the substantially rectangular parallelepiped substrate box 60a. As a result, even if some of the joints 60e are destroyed and the case body 60c is separated in a state in which separation of the case body 60c is prevented using some joints 60e, another joint By bringing the portion 60e into the connected state, it becomes possible to prevent the case body 60c from being separated again. Furthermore, since the joint 60e is destroyed when the case body 60c is separated and traces thereof remain, it is possible to visually check the joint 60e to determine whether or not the case body 60c has been illegally separated. It becomes possible. Furthermore, a seal 60f is pasted on one side of the board box 60a opposite to the side on which the joint portions 60e are arranged so as to straddle the boundary between the case bodies 60c. When the sealing seal 60f is peeled off, an adhesive layer remains on the case body 60c. Thereby, when the seal 60f is peeled off when the case body 60c is separated, it is possible to leave a trace of the seal 60f.

In the main control device 60 having the above configuration, the main control board 61 includes a board owned by the game hall manager in order to generate an opportunity to change the setting state of the pachinko machine 10 in the range of "setting 1" to "setting 6". A setting key insertion section 68a into which a setting key is inserted and turned ON, an update button 68b operated to sequentially change the setting state of the pachinko machine 10 after the setting key insertion section 68a is turned ON, and a main controller. A reset button 68c that is operated to clear data in a main side RAM 65, which will be described later, is provided in the MPU 62 of 60, and first to third notification display devices 69a to 69c to notify the management results of game history. , is provided. In addition, a connection terminal of an external device is connected to the MPU 62 mounted on the main control board 61 in order to read the management results of game history or the information (programs and data) stored in the main side ROM 64 with the external device. A reading terminal 68d is provided for reading. Note that the setting state of the pachinko machine 10 is not limited to the six stages of "Setting 1" to "Setting 6", but can be any number of stages.

These setting key insertion section 68a, update button 68b, reset button 68c, reading terminal 68d (that is, MPU 62), and first to third notification display devices 69a to 69c are all provided on the element mounting surface of the main control board 61. ing. Furthermore, as described above, the element mounting surface of the main control board 61 faces the opposing wall 60b of the board box 60a, but the setting key insertion part 68a, update button 68b, reset button 68c, and reading terminal 68d face each other. It is not covered by the wall portion 60b. That is, the opposing wall portion 60b has separate openings in areas facing each of the setting key insertion portion 68a, the update button 68b, the reset button 68c, and the reading terminal 68d. Thereby, it is possible to insert a setting key into the setting key insertion part 68a without having to open the board box 60a, it is possible to press the update button 68b, and it is possible to press the reset button 68c. It is possible to connect a connection terminal of an external device to the reading terminal 68d.

By inserting a setting key into the setting key insertion section 68a and rotating it in a predetermined direction, the setting key insertion section 68a is turned ON. In this state, the supply of operating power to the pachinko machine 10 is started (i.e., the supply of operating power to the MPU 62 of the main control device 60 is started), and the setting state of the pachinko machine 10 is changed to a changeable state in which it is possible to change the setting state of the pachinko machine 10. In this state, the setting state of the pachinko machine 10 is changed by one step in ascending order in the range of "Setting 1" to "Setting 6" each time the update button 68b is pressed once. Note that if the update button 68b is operated in the "Setting 6" state, it is updated to "Setting 1". In addition, by rotating the setting key inserted in the setting key insertion section 68a from the ON operation position in the opposite direction to the predetermined direction and returning it to the initial position, the setting key insertion section 68a is turned OFF. When the setting key insertion section 68a is turned OFF, the changeable state ends, and the game is able to be played with the setting value at that time. In other words, even if you operate the update button 68b after the changeable state has ended, the setting value cannot be changed.

The ON operation of the setting key insertion section 68a is only valid when the supply of operating power to the pachinko machine 10 starts (i.e., when the supply of operating power to the MPU 62 of the main control device 60 starts). Therefore, even if the ON operation of the setting key insertion section 68a is performed after the processing at the start of the supply of operating power in the MPU 62 of the main control device 60 has ended, the setting value cannot be changed.

The setting state of the pachinko machine 10 determines the degree of advantage per unit time in the pachinko machine 10, and the larger the value of "setting n" (n is an integer from "1" to "6") (i.e., the higher the setting value), the higher the degree of advantage. As will be described in more detail later, there are two winning/losing lottery modes that determine the probability of winning a jackpot result: a low probability mode with a relatively low probability of winning and a high probability mode with a relatively high probability of winning, and the higher the setting value, the higher the probability of winning a jackpot result in the low probability mode. On the other hand, regardless of the setting value, the probability of winning a jackpot result in the high probability mode is constant.

As described above, the reset button 68c is operated to clear the data in the main RAM 65, but in order to clear the data, it is necessary to start the supply of operating power to the pachinko machine 10 while the reset button 68c is pressed (i.e., it is necessary to start the supply of operating power to the MPU 62 of the main control device 60). The ON operation of the reset button 68c is only valid when the supply of operating power to the pachinko machine 10 starts (i.e., when the supply of operating power to the MPU 62 of the main control device 60 starts). Therefore, even if the reset button 68c is pressed after the processing at the start of the supply of operating power in the MPU 62 of the main control device 60 has finished, the data in the main RAM 65 cannot be cleared.

As already explained, the read terminal 68d is connected to a connection terminal of an external device to read the results of game history management or the information (programs and data) stored in the main ROM 64 by the external device, but in order to output to the external device, it is necessary to start the supply of operating power to the pachinko machine 10 with the connection terminal of the external device connected to the read terminal 68d (i.e., it is necessary to start the supply of operating power to the MPU 62 of the main control device 60). The connection of the external device to the read terminal 68d is only valid when the supply of operating power to the pachinko machine 10 starts (i.e., when the supply of operating power to the MPU 62 of the main control device 60 starts). Therefore, even if an external device is connected to the read terminal 68d after the processing at the start of the supply of operating power in the MPU 62 of the main control device 60 is completed, no external output to the external device is performed.

Each of the first to third notification display devices 69a to 69c is a segment display device in which seven LED display segments are arranged, but the present invention is not limited to this. It may be a light emitting body, a liquid crystal display device, or an organic EL display. The first to third notification display devices 69a to 69c are all installed so that their display surfaces face the direction in which the element mounting surface of the main control board 61 faces, and are mounted on the opposing wall 60b of the board box 60a. covered. In this case, since the board box 60a is transparent, the display surfaces of the first to third notification display devices 69a to 69c housed in the board box 60a can be visually observed from the outside of the board box 60a. becomes possible. Further, as already explained, the main control device 60 is mounted on the back surface of the resin base 21 in the board box 60a so that the opposing wall portion 60b facing the element mounting surface of the main control board 61 faces toward the rear of the pachinko machine 10. Therefore, when the gaming machine main body 12 is opened to the front of the pachinko machine 10 relative to the outer frame 11 and the back surface of the resin base 21 is exposed to the front of the pachinko machine 10, the first to third notifications are transmitted through the opposing wall portion 60b. It becomes possible to visually check the display surfaces of the display devices 69a to 69c.

On the display surface of the first notification display device 69a, not only numbers "0" to "9" but also various characters including alphabetical characters are displayed. On the other hand, numbers "0" to "9" are displayed on the second notification display device 69b and the third notification display device 69c. The game history management results are notified using the first to third notification display devices 69a to 69c, and the contents of this notification will be explained in detail later. Further, in a changeable state in which the setting state of the pachinko machine 10 can be changed, a value corresponding to the current setting value is displayed on the third notification display device 69c. Note that the value corresponding to the set value may be displayed on the first notification display device 69a, or may be displayed on the second notification display device 69b. In addition, the setting value before the changeable state is displayed on one of the first to third notification display devices 69a to 69c, and the current setting value is displayed on the first to third notification display device. The information may be displayed on another one of the notification display devices 69a to 69c.

As shown in FIG. 2, the back pack unit 15 is installed so as to cover the back side of the inner frame 13, including the main control device 60. The back pack unit 15 has a back pack 72 formed of a transparent synthetic resin, to which a dispensing mechanism 73 and a control device assembly unit 74 are attached.

The payout mechanism section 73 includes a tank 75 to which game balls supplied from the island equipment of the game hall are sequentially replenished, and a payout device 76 for paying out the game balls stored in the tank 75. The game balls put out by the payout device 76 are delivered to the upper tray 55a or the lower tray 56a through a payout passage provided on the downstream side of the payout device 76. The dispensing mechanism section 73 is supplied with a main power source of, for example, 24 volts AC, and is equipped with a back pack board having a power switch for turning the power on and off.

The control device assembly unit 74 is equipped with a payout control device 77 that has the function of controlling the payout device 76, and a power supply and launch control device 78 that generates and outputs the predetermined power required by various control devices, etc., and controls the launch of game balls in response to the player's operation of the launch operation device 28. The payout control device 77 and the power supply and launch control device 78 are stacked one behind the other, with the payout control device 77 at the rear of the pachinko machine 10.

<Electrical configuration of the pachinko machine 10>
FIG. 6 is a block diagram showing the electrical configuration of the pachinko machine 10.

The main control device 60 includes a main control board 61 that controls the main control of the game, and a power outage monitoring board 67 that monitors the power supply. An MPU 62 is mounted on the main control board 61. The MPU 62 includes a main CPU 63, which is an arithmetic processing device including a control section and a calculation section, as well as a main ROM 64, a main RAM 65, and a management IC 66. In addition to the above elements, the MPU 62 includes an interrupt circuit, a timer circuit, a data input/output circuit, various counter circuits as a random number generator, and the like.

The main ROM 64 is a memory (i.e., a non-volatile memory means) that does not require an external power supply to retain memory, such as a NOR flash memory or a NAND flash memory, and is used for read-only purposes. The main ROM 64 stores various control programs and fixed value data executed by the main CPU 63.

The main RAM 65 is a memory (i.e., a volatile memory means) that requires an external power supply to retain memory, such as SRAM and DRAM, and is used for both reading and writing. The main RAM 65 allows random access, and when compared for the same data capacity, requires less time to read data than the main ROM 64. The main RAM 65 temporarily stores various data for the execution of the control programs stored in the main ROM 64.

The management IC 66 is a management device that manages the game history based on information supplied from the main CPU 63. Details will be described later, but the management IC 66 keeps track of the ball entry history of the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the outlet 24a, and keeps track of the ball entry frequency of the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34 based on the ball entry history that has been kept track of. The management IC 66 also keeps track of the frequency of the opening/closing execution mode and the high frequency support mode, which will be described later.

The MPU 62 has an input port and an output port. The input side of the MPU 62 is connected to a power outage monitoring board 67 and a payout control device 77 provided in the main control device 60. The power outage monitoring board 67 is connected to a power supply and launch control device 78 that has the function of supplying operating power, and the MPU 62 is supplied with operating power via the power outage monitoring board 67.

The input side of the MPU 62 is connected to various sensors such as the ball entry detection sensors 42a to 49a. As already explained, the ball entry detection sensors 42a to 49a include the first winning hole detection sensor 42a, the second winning hole detection sensor 43a, the third winning hole detection sensor 44a, the special electric detection sensor 45a, the first operating hole detection sensor 46a, the second operating hole detection sensor 47a, the out hole detection sensor 48a, and the gate detection sensor 49a. Based on the detection results of these ball entry detection sensors 42a to 49a, the main CPU 63 judges whether a ball has entered each entry section. In addition, the main CPU 63 executes various lotteries based on the entry into the first operating hole 33, and executes various lotteries based on the entry into the second operating hole 34.

On the input side of the MPU 62, a setting key insertion section 68a, an update button 68b, and a reset button 68c provided on the main control board 61 are provided. The setting key insertion portion 68a is provided with a sensor (not shown), and the sensor detects whether the setting key insertion portion 68a is placed in an ON operation position or an OFF operation position. Then, the main CPU 63 specifies whether the setting key insertion portion 68a is located at the ON operation position or the OFF operation position based on the detection result from the sensor. The update button 68b is provided with a sensor (not shown), and the sensor detects whether or not the update button 68b is pressed. Then, the main CPU 63 determines whether or not the update button 68b is pressed based on the detection result from the sensor. The reset button 68c is provided with a sensor (not shown), and the sensor detects whether or not the reset button 68c is pressed. Then, the main CPU 63 determines whether or not the reset button 68c is pressed based on the detection result from the sensor.

The output side of the MPU 62 is connected to a power outage monitoring board 67, a payout control device 77, and an audio/light emitting control device 81. A prize ball command is output to the payout control device 77, for example, when a game ball enters a prize ball entry section among the above-mentioned entry sections, where the occurrence of the ball entry corresponds to the payout of the game ball. Various commands such as a variation command, a type command, and an opening command are output to the audio/light emitting control device 81.

The output side of the MPU 62 is connected to the special electric drive unit 32b that opens and closes the opening and closing door 32a of the special electric winning device 32, the normal electric drive unit 34b that opens and closes the normal electric device 34a of the second operating port 34, the special chart unit 37, and the normal chart unit 38. Incidentally, the special chart unit 37 is provided with a special chart display unit 37a and a special chart reserved display unit 37b, all of which are connected to the output side of the MPU 62. Similarly, the normal chart unit 38 is provided with a normal chart display unit 38a and a normal chart reserved display unit 38b, all of which are connected to the output side of the MPU 62. Various driver circuits are provided on the main control board 61, and the MPU 62 controls the drive of the various drive units and various display units through the driver circuits.

That is, in the opening/closing execution mode, drive control of the special electric drive unit 32b is executed in the main side CPU 63 so that the special electric prize winning device 32 is opened and closed. Further, when the open state of the general electric utility object 34a is won, the drive control of the general electric drive unit 34b is executed in the main CPU 63 so that the general electric utility object 34a is opened and closed. Furthermore, in each game round, display control of the special figure display section 37a is executed by the main CPU 63. In addition, when displaying the lottery result as to whether or not to open the general utility object 34a, the main side CPU 63 executes display control of the general public figure display section 38a. In addition, when a winning occurs in the first operating port 33 or the second operating port 34, or when a variable display starts in the special symbol display section 37a, the main CPU 63 controls the display of the special symbol pending display section 37b. is executed, and when a winning occurs in the through gate 35, or when variable display is started on the common picture display section 38a, display control of the common picture pending display section 38b is executed in the main CPU 63.

First to third notification display devices 69a to 69c are connected to the output side of the MPU 62. Furthermore, the management results of the game history in the management IC 66 are notified through the display on the first to third notification display devices 69a to 69c. Further, when changing the setting state of the pachinko machine 10, the current setting value is displayed on the third notification display device 69c. In this case, the display of the first notification display device 69a and the second notification display device 69b is controlled by the management IC 66 and not by the main CPU 63, whereas the third notification display device 69c is controlled by the main CPU 63. The display is controlled by the management IC 66. Regarding the display on the third notification display device 69c, display control by the main CPU 63 is given priority over display control by the management IC 66.

However, the present invention is not limited to this, and the third notification display device 69c may also have a configuration in which the display is controlled by the management IC 66 and the display is not controlled by the main CPU 63. In this case, if the current setting value is to be displayed on the third notification display device 69c when changing the setting state of the pachinko machine 10, the main CPU 63 instructs the management IC 66 to display the setting value. good.

The MPU 62 is provided with a reading terminal 68d. The reading terminal 68d is provided with a sensor (not shown), and the sensor detects whether or not the reading terminal 68d is connected to a connection terminal of an external device. Then, the main CPU 63 specifies whether or not a connection terminal of an external device is connected to the reading terminal 68d based on the detection result from the sensor. Further, when an external device is connected to the reading terminal 68d, the management results of the game history in the management IC 66 or the information (programs and data) stored in the main ROM 64 are outputted to the external device.

The power outage monitoring board 67 relays between the main control board 61 and the power source/launch control device 78, and monitors the stable DC voltage of 24 volts, which is the maximum voltage output from the power source/launch control device 78. The payout control device 77 controls the payout of prize balls and rental balls by the payout device 76 based on the prize ball command received from the main control device 60.

The power source/launch control device 78 is connected to a commercial power source (external power source) in, for example, an amusement hall or the like. Then, based on the external power supplied from the commercial power source, necessary operating power is generated for the main control board 61, payout control device 77, etc., and the generated operating power is supplied. Incidentally, the power supply/launch control device 78 is provided with a power supply unit for power outages such as a backup capacitor, and even when the power of the pachinko machine 10 is OFF, the power supply unit for power outages supplies power from the main power supply unit. Power for memory retention is supplied to the main side RAM 65 of the control device 60 and the payout control device 77. Further, the power source/launch control device 78 is responsible for controlling the launch of the game ball launch mechanism 27, and the game ball launch mechanism 27 is driven when predetermined launch conditions are met. Further, as already explained, the payout mechanism section 73 is provided with a power switch, and when the power switch is turned ON, the supply of operating power to the Pachinko machine 10 is started, and when the power switch is turned OFF, operation power is started to be supplied to the Pachinko machine 10. As a result, the supply of operating power to the pachinko machine 10 is stopped.

The audio and light emission control device 81 drives and controls the display light emitting unit 53 and speaker unit 54 provided on the front door frame 14 based on various commands received from the main control device 60, and also controls the display control device 82. The display control device 82 executes display control of the pattern display device 41 based on commands received from the audio and light emission control device 81.

<Electrical configuration for performing various lottery drawings on the main CPU 63>
Next, the electrical configuration for performing various lottery drawings in the main CPU 63 will be described using FIG. 7.

When playing a game, the main CPU 63 uses various types of counter information to perform jackpot occurrence lottery, settings for display on the special pattern display section 37a, settings for displaying symbols on the pattern display device 41, settings for displaying on the general pattern display section 38a, etc. Specifically, as shown in FIG. 7, the winning random number counter C1 used in the lottery when a winning occurs, the jackpot type counter C2 used when determining the jackpot type, and the symbol display device 41 are changed when the winning occurs. Determine the reach random number counter C3 used for the reach occurrence lottery when playing, the random number initial value counter CINI used for initial value setting of the hit random number counter C1, and the display duration time on the special symbol display section 37a and the symbol display device 41. A variation type counter CS is used. Furthermore, a general electric utility object release counter C4 is used to determine whether or not the general electric utility object 34a of the second operating port 34 is to be brought into the general electric power open state. The counters C1 to C3, CINI, CS, and C4 are provided in various counter areas 65b of the main RAM 65.

Each of the counters C1 to C3, CINI, CS, and C4 is a loop counter in which 1 is added to the previous value each time the counter is updated, and returns to "0" after reaching the maximum value. Each counter is updated at short intervals. Information corresponding to the winning random number counter C1, the jackpot type counter C2, and the reach random number counter C3 is provided in the main side RAM 65 as an acquisition information storage means when a winning occurs in the first operating port 33 or the second operating port 34. The data is stored in the reserved storage area 65a.

The reserved storage area 65a comprises a reserved area RE and an execution area AE. The reserved area RE comprises a first reserved area RE1, a second reserved area RE2, a third reserved area RE3 and a fourth reserved area RE4, and a combination of the numerical information of the winning random number counter C1, the big win type counter C2 and the reach random number counter C3 is stored as reserved information in one of the reserved areas RE1 to RE4 according to the winning history of the first actuation port 33 or the second actuation port 34.

In this case, if winnings to the first operating port 33 or the second operating port 34 occur multiple times in a row, the first holding area RE1 to the fourth holding area RE4 are Each piece of numerical information is stored in chronological order in the order of reservation area RE2 → third reservation area RE3 → fourth reservation area RE4. By providing the four holding areas RE1 to RE4 in this way, the winning history of game balls entered into the first operating port 33 or the second operating port 34 can be held and stored up to a maximum of four. .

The number of items that can be stored on hold is not limited to four, but is arbitrary, and may be any other multiple, such as two, three, or five or more, or may be singular.

The execution area AE is an area for moving the various numerical information stored in the first reserve area RE1 of the reserve area RE when the variable display of the special chart display section 37a begins, and when one game round begins, a win/loss determination is made based on the various numerical information stored in the execution area AE.

Each of the above counters will be explained in detail.

First, the general utility utility release counter C4 will be explained. The general utility utility release counter C4 is configured such that, for example, it is incremented by 1 in sequence within the range of 0 to 250, and returns to "0" after reaching the maximum value. The general electric utility object release counter C4 is updated regularly and is stored in the general electric power holding area 65c of the main side RAM 65 at the timing when a game ball enters the through gate 35. Then, at a predetermined timing, a lottery is performed to determine whether or not to control the general electric utility object 34a to an open state based on the stored value of the general electric utility object opening counter C4.

In this pachinko machine 10, a plurality of types of support modes are set so that the modes of support provided by the common electric accessory 34a are different from each other. In detail, in the support mode, when compared with the situation where the game ball continues to be launched in the same manner into the game area PA, the general electrical accessory 34a of the second actuation port 34 opens per unit time. A high-frequency support mode and a low-frequency support mode are set so that the frequency of the state is relatively high or low.

In the high-frequency support mode and the low-frequency support mode, the probability of winning the normal power opening state in the normal power opening lottery using the normal power role opening counter C4 is the same (for example, both are 4/5). However, in the high-frequency support mode, the number of times that the normal power role 34a will be in the open state when the normal power opening state is won is set to be greater than in the low-frequency support mode, and the opening time for each time is set to be longer. In this case, when the normal power opening state is won in the high-frequency support mode and the open state of the normal power role 34a occurs multiple times, the closing time from the end of one opening state to the start of the next opening state is set to be shorter than the opening time for each time. Furthermore, in the high-frequency support mode, the minimum time to be secured between one normal power opening lottery and the next normal power opening lottery (i.e., the duration of one display on the normal power display unit 38a) is set to be shorter than in the low-frequency support mode.

As described above, in the high-frequency support mode, the probability of winning the second operating port 34 is higher than in the low-frequency support mode. In other words, in the low-frequency support mode, the probability of winning a prize in the first operating port 33 is higher than that in the second operating port 34, but in the high-frequency support mode, the probability of winning a prize is higher in the first operating port 33 than in the second operating port 34. The probability of winning a prize in the mouth 34 increases. When a winning occurs in the second operation port 34, a predetermined number of game balls are paid out, so in the high-frequency support mode, the player can play the game without reducing the number of balls he has too much. It can be carried out.

Note that the configuration for making the high-frequency support mode more frequently open to the power grid per unit time than the low-frequency support mode is not limited to the above, and for example, in the power grid release lottery. It may be configured to increase the probability of winning the general power open state. In addition, the secured time that is secured between the time when one general electricity opening lottery is held and the next general electricity opening lottery is held (for example, the period of time that is executed on the general electricity drawing display section 38a based on winnings in the through gate 35) is In configurations where multiple types of variable display times are available, it is easier to select a shorter securing time in the high-frequency support mode than in the low-frequency support mode, or the average securing time is set to be shorter. Good too. Furthermore, the number of times the power is released, the length of the time it is open, the amount of time secured between one general power generation lottery and the next power generation lottery, and the related secured time. The advantage of the high-frequency support mode over the low-frequency support mode may be increased by applying any one condition or any combination of shortening the average time and increasing the probability of winning.

Here, as already explained, the pachinko machine 10 has the setting states "Setting 1" to "Setting 6", but the opening frequency and opening mode of the general electric accessory 34a in the low frequency support mode are different from each other. The setting values are the same, and the opening frequency and opening mode of the utility power accessory 34a in the high-frequency support mode are also the same regardless of the setting values. However, the present invention is not limited to this, and at least one of the opening frequency and opening mode of the general electric accessory 34a varies depending on the setting state of the pachinko machine 10 in at least one of the low-frequency support mode and the high-frequency support mode. It may also be a configuration. For example, the higher the setting value is, the higher the frequency of opening of the general electric accessory 34a in the low frequency support mode may be configured, and the second operation when the general electric accessory 34a is opened once in the low frequency support mode. A configuration may be adopted in which the probability of a game ball entering the mouth 34 is increased. Further, the higher the set value, the higher the frequency of opening of the general electric accessory 34a in the high-frequency support mode. A configuration may be adopted in which the probability of the game ball entering the operating port 34 is increased.

Next, the winning random number counter C1 will be explained. The winning random number counter C1 is configured to be incremented by 1 in sequence within the range of 0 to 599, for example, and return to "0" after reaching the maximum value. In particular, when the winning random number counter C1 completes one round, the value of the random number initial value counter CINI at that time is read as the initial value of the winning random number counter C1. Note that the random number initial value counter CINI is a loop counter similar to the winning random number counter C1 (value=0 to 599). The winning random number counter C1 is updated regularly and is stored in the holding storage area 65a of the main side RAM 65 at the timing when a game ball enters the first operating port 33 or the second operating port 34.

The random number value that results in a jackpot is stored in the main ROM 64 as a win/fail table. FIG. 8 is an explanatory diagram for explaining various tables stored in the main side ROM 64. As the accuracy tables, low probability accuracy tables 64a to 64f for low probability mode and high probability accuracy table 64g for high probability mode are stored.

The low certainty propriety tables 64a to 64f are provided in one-to-one correspondence with the setting states of "Setting 1" to "Setting 6". In other words, the low probability table 64a for setting 1 is referred to when the setting state of the pachinko machine 10 is "setting 1", and the setting is referenced when the setting state of the pachinko machine 10 is "setting 2". 2 low probability correctness table 64b, low probability correctness table 64c for setting 3 which is referred to when the setting state of pachinko machine 10 is "setting 3", and low probability correctness table 64c for setting 3 when the setting state of pachinko machine 10 is "setting 4". , a low probability correctness table 64d for setting 4 that is referred to when the setting state of the pachinko machine 10 is "setting 5", a low probability correctness table 64e for setting 5 that is referred to when the setting state of the pachinko machine 10 is "setting 5", and the pachinko machine 10 There exists a low certainty validity table 64f for setting 6 that is referred to when the setting state of is "setting 6".

These low probability success/failure tables 64a to 64f are set such that the higher the set value, the higher the probability of winning a jackpot result. Specifically, when the low probability table 64a for setting 1 is referred to, the jackpot result is approximately 1/320, and when the low probability table 64b for setting 2 is referred to, the result is approximately 1/310. When the low probability table 64c for setting 3 is referred to, the result is a jackpot at approximately 1/300, and when the low probability table 64d for setting 4 is referred to, it is approximately 1/290. If the low probability success/failure table 64e for setting 5 is referred to, it will be a jackpot result at approximately 1/280, and if the low probability success/failure table 64f for setting 6 is referred to, it will be a jackpot result at approximately 1/270. This results in a jackpot. As a result, when the setting state of the pachinko machine 10 is set to a high setting value, a jackpot result is more likely to occur in the low probability mode, which is advantageous for the player.

On the other hand, only one type of high certainty validity table 64g is provided so that it is common to any setting state from "Setting 1" to "Setting 6". The high probability success/failure table 64g is set so that the probability of winning a jackpot result is higher than the low probability success/failure tables 64a to 64f in any setting state from "Setting 1" to "Setting 6". Specifically, when the high probability success/failure table 64g is referred to, a jackpot result is obtained at approximately 1/30. This makes it possible to make the high probability mode more advantageous than the low probability mode regardless of the setting state of the pachinko machine 10. In addition, even the lowest setting state, "Setting 1", becomes a high probability mode, making it possible to make the probability of a jackpot result higher than the low probability mode of "Setting 6", the highest setting state. becomes. In addition, in the high probability mode, it is possible to prevent the occurrence of advantages or disadvantages depending on the setting state of the pachinko machine 10, and to suppress the storage capacity for storing the high probability probability table 64g in the main side ROM 64 in advance. becomes possible.

The jackpot type counter C2 is configured to be incremented by 1 within the range of 0 to 29, and return to "0" after reaching the maximum value. The jackpot type counter C2 is updated regularly, and is stored in the holding storage area 65a at the timing when the game ball enters the first operating port 33 or the second operating port 34.

In this pachinko machine 10, a plurality of jackpot results are set. These plurality of jackpot results include (1) the mode of opening/closing control of the special electric prize winning device 32 in the opening/closing execution mode, (2) the lottery mode in the win/fail lottery means after the opening/closing execution mode ends, and (3) the opening/closing mode after the opening/closing execution mode ends. A plurality of jackpot results are set by differentiating three conditions, namely, the support mode in the general electric accessory 34a of the second operation port 34.

As the manner of opening and closing control of the special electric winning device 32 in the opening and closing execution mode, a high frequency winning mode and a low frequency winning mode are set so that the frequency of winning in the special electric winning device 32 from the start to the end of the opening and closing execution mode is relatively high and low. Specifically, in either the high frequency winning mode or the low frequency winning mode, a predetermined number of rounds are played up to the upper limit.

A round play is a play that continues until one of the following conditions is met: a predetermined upper limit duration has elapsed, or a predetermined upper limit number of game balls have entered the special electric winning device 32. In addition, the number of round plays in the open/close execution mode triggered by a jackpot result is the same fixed number of rounds regardless of the type of jackpot result that triggered the transition. Specifically, the upper limit number of round plays is set to 15 rounds regardless of the jackpot result.

In addition, in this pachinko machine 10, a plurality of types are set for one opening mode of the special electric winning device 32, with different opening durations from when the special electric winning device 32 is opened until it is closed. Specifically, a long time mode in which the open duration is set to a long time of 29 seconds, and a short time mode in which the open duration is set to 0.06 seconds, which is a short time shorter than the above long time, is set.

In this pachinko machine 10, when the launch operation device 28 is operated by the player, the game ball launch mechanism 27 is driven and controlled so that one game ball is launched toward the game area PA every 0.6 seconds. In addition, the upper limit number of balls for the end condition of the round game is set to nine. In this case, in the long-time mode among the above-mentioned opening modes, the opening duration is set to a time longer than the product of the game ball launch cycle and one round game. On the other hand, in the short-time mode, the opening duration is set to a time shorter than the product of the game ball launch cycle and one round game, more specifically, shorter than the game ball launch cycle. Therefore, when one opening is performed in the long-time mode, it is expected that the special electric winning device 32 will win the maximum number of balls in one round game, and when one opening is performed in the short-time mode, it is expected that no prize will be won in the special electric winning device 32, or that if a prize is won, it will be about one ball.

In the high frequency winning mode, the special electric winning device 32 is opened once in each round of play in a long time mode. On the other hand, in the low frequency winning mode, the special electric winning device 32 is opened once in each round of play in a short time mode.

The number of times the special electric winning device 32 is opened and closed, the number of rounds of play, the duration of opening for one opening, and the upper limit number of times per round of play in the high frequency winning mode and low frequency winning mode are not limited to the above values and are arbitrary, so long as the frequency of winning in the special electric winning device 32 from the start to the end of the opening and closing execution mode is higher in the high frequency winning mode than in the low frequency winning mode.

As shown in FIG. 8, the allocation destination of the jackpot result for the jackpot type counter C2 is stored in the main ROM 64 as an allocation table 64h. In addition, in the allocation table 64h, a low probability jackpot result, a low prize high probability jackpot result, and a most favorable jackpot result are set as the allocation destination of the jackpot result in the event of a jackpot result.

The low-probability jackpot result is a jackpot result in which the opening/closing execution mode becomes the high-frequency winning mode, and after the opening/closing execution mode ends, the win/fail lottery mode becomes the low-probability mode and the support mode becomes the high-frequency support mode. However, this high-frequency support mode shifts to the low-frequency support mode when the number of games has reached the end standard number of times (specifically, 100 times) after the shift.

A low-winning, high-probability jackpot result is one in which the open/close execution mode becomes a low-frequency winning mode, and after the open/close execution mode ends, the win/lose selection mode becomes a high-probability mode, and the support mode becomes a high-frequency support mode. These high-probability and high-frequency support modes continue until the result of the win/lose selection becomes a jackpot state win, and the jackpot state is entered.

The most advantageous jackpot result is a jackpot result in which the opening/closing execution mode becomes a high-frequency winning mode, and furthermore, after the opening/closing execution mode ends, the win/fail lottery mode becomes a high probability mode and the support mode becomes a high-frequency support mode. These high-probability mode and high-frequency support mode continue until the lottery result in the win/fail lottery becomes a jackpot state win and the state shifts to a jackpot state accordingly.

In relation to the above game states, the normal game state refers to a state in which the win/lose selection mode is a low probability mode and the support mode is a low frequency support mode, rather than the open/close execution mode. Also, a configuration may be adopted in which a low prize-winning, high probability jackpot result is not set as a game result. Also, in the open/close execution mode in a low prize-winning, high probability jackpot result, the number of rounds of play may be fewer than in the case of a low probability jackpot result and a most favorable jackpot result.

In the distribution table 64h, among the values of the jackpot type counter C2 of "0 to 29", "0 to 9" correspond to low probability jackpot results, and "10 to 14" correspond to low probability jackpot results. "15-29" corresponds to the most profitable jackpot result.

Only one type of distribution table 64h is provided so that the distribution table 64h is common to any of the setting states "Setting 1" to "Setting 6". This makes it possible to prevent advantage or disadvantage from occurring depending on the setting state of the pachinko machine 10 with respect to the distribution mode of jackpot results, and also allows the storage capacity for storing the distribution table 64h in advance in the main side ROM 64. It becomes possible to suppress the

It should be noted that a configuration may be adopted in which the manner in which the jackpot results are distributed differs depending on the setting state of the pachinko machine 10. For example, the higher the setting value, the higher the probability of being allocated to the most profitable jackpot result, or the higher the setting value, the higher the probability of being allocated to the most profitable jackpot result or the low winning, high probability jackpot result. In this case, the higher the set value, the higher the probability that the game will enter the high probability mode after a jackpot result. In addition, the higher the setting value, the lower the probability of being assigned to a low winning/high probability jackpot result.If the setting value is high, it will not be assigned to a low winning/high probability jackpot result, whereas if the setting value is low, the probability of being assigned to a low winning/high probability jackpot result will be lower. It may also be configured such that it can be distributed to jackpot results. In this case, the higher the set value, the higher the probability that the opening/closing execution mode of the high frequency winning mode will occur.

Next, the reach random number counter C3 will be described. The reach random number counter C3 is configured to be incremented by one within a range of, for example, 0 to 238, and to return to "0" after reaching a maximum value. In this pachinko machine 10, an expectation effect is set as one type of display effect in the pattern display device 41. The expectation effect refers to a display state that makes the player think that the change display state is likely to result in the award corresponding result from the start of the change display of the patterns in the pattern display device 41 and before the stop result is derived and displayed in a gaming machine equipped with a pattern display device 41 capable of performing a change display of the patterns, in which the final stop result in a game round resulting in a predetermined jackpot result is a grant corresponding result. Specifically, the grant corresponding result is displayed as a combination of patterns with the same number on one of the pay lines.

Two types of expected effects are set: a ready-to-reach display and a preview display for making the user expect the ready-to-reach display or the grant response result at a stage before the ready-to-reach display occurs.

The reach display includes a display state in which the reach pattern combination is displayed by stopping the display of the patterns for some of the multiple pattern rows displayed on the display surface 41a of the pattern display device 41, and in this state, the remaining pattern rows display a changing pattern. In addition, it includes a state in which the reach pattern combination is displayed as described above, the remaining pattern rows display a changing pattern, and a reach performance is performed by displaying a predetermined character or the like as a video on the background screen, and a reach performance is performed by displaying a reduced or hidden display of the reach pattern combination and displaying a predetermined character or the like as a video on almost the entire display surface 41a.

The preview display may be performed in a situation where the symbols are being displayed in a variable manner in all symbol rows after the variable display of the symbols has started on the display surface 41a of the symbol display device 41, or in a situation where the symbols are being displayed in a variable manner in all the symbol rows, or in some symbol rows but in a plurality of symbol rows. In a situation where symbols are displayed in a variable manner in a symbol column, a mode is included in which a character is displayed separately from the symbols on the symbol column. It also includes a case in which the background screen is set in a predetermined form different from the previous form, and a case in which the symbols on the symbol row are set in a predetermined form different from the previous form. Such a preview display can occur in any game round when a reach display is displayed or when a reach display is not performed, but it is higher when a reach display is performed than when a reach display is not performed. It is set to occur with probability.

The reach display is executed regardless of the value of the reach random number counter C3 in the game round in which the same combination of symbols is finally stopped and displayed. In addition, in a game round corresponding to a jackpot result in which the same symbol combination is not displayed in a stopped state, the game is not executed regardless of the value of the reach random number counter C3. In addition, in the game round corresponding to the winning result, this is executed when the reach random number counter C3 obtained at a predetermined timing by referring to the reach table stored in the main side ROM 64 corresponds to the occurrence of the reach display. .

On the other hand, the decision as to whether or not to display a preview is not made by the main control device 60 but by the sound emission control device 81. In this case, the sound emission control device 81 recognizes that a preview display is more likely to occur in a game round corresponding to a jackpot result than in a game round corresponding to a losing result, and that a preview display with a low appearance rate is A lottery process for displaying a preview is executed so as to satisfy at least one condition that the occurrence is likely to occur. Incidentally, this lottery result is reflected when the symbol display device 41 performs a game repeat effect.

Here, the probability that a reach display will occur in a game round with a losing result is the same regardless of the setting state from "Setting 1" to "Setting 6". This makes it possible to prevent the setting state of the pachinko machine 10 from having an advantage or disadvantage with respect to the probability that a reach display will occur in a game round that results in a losing result. However, the present invention is not limited to this, and a configuration may be adopted in which the higher the set value is, the higher the probability that the reach display will occur in a game round that results in a losing result.

Next, the variation type counter CS will be explained. The variation type counter CS is configured to be incremented by 1 in sequence within the range of 0 to 198, for example, and return to "0" after reaching the maximum value. The variation type counter CS is used by the main CPU 63 to determine the display duration time on the special symbol display section 37a and the display duration time of symbols on the symbol display device 41. The fluctuation type counter CS is updated once every time a timer interrupt process, which will be described later, is executed once, and is repeatedly updated within the remaining time until the next timer interrupt process is executed. Then, the buffer value of the variation type counter CS is acquired when determining the variation pattern at the start of the variation display on the special symbol display section 37a and at the time the symbol display device 41 starts the variation of the symbol.

<About the processing configuration of the main CPU 63>
Next, each process executed by the main CPU 63 to advance the game will be explained. The processing of the main CPU 63 can be roughly divided into main processing that is started upon power-on, and timer interrupt processing that is started periodically (in this embodiment, every 4 milliseconds).

<Main processing>
First, the main processing will be explained with reference to the flowchart in FIG.

First, a power-on wait process is executed (step S101). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process was started. The operation start and initial setting of the symbol display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S102).

Thereafter, it is determined whether the setting key insertion section 68a has been turned on (step S103). If the setting key insertion section 68a has not been turned on (step S103: NO), it is determined whether the reset button 68c has been pressed (step S104). When the reset button 68c is pressed (step S104: YES), each area of the main side RAM 65 is " 0" is cleared, and initial settings are made for the area cleared to "0" (step S105). In other words, if the supply of operating power to the pachinko machine 10 is started while pressing the reset button 68c without turning on the setting key insertion part 68a, the operation to the pachinko machine 10 will be performed with respect to the setting value information. Clearing of the main RAM 65 is performed while maintaining the state before power supply was stopped, and initial settings are performed for the storage area where the clearing has been performed. This makes it possible to initialize other areas of the main RAM 65 without changing set values. In addition, in step S105, initial settings are performed after various registers of the main CPU 63 are also cleared to "0".

If the reset button 68c is not pressed (step S104: NO), it is determined whether the power outage flag is set to "1" (step S106). A power outage flag is provided in the main side RAM 65, and when the supply of operating power to the main side CPU 63 is stopped and a predetermined power outage process is normally executed, the power outage flag is set to "1". will be set. If the power outage flag is set to "1", it is determined whether the checksum calculation result matches the checksum saved when the power was cut off, that is, the validity of the stored data is determined (step S107). . When the process of step S105 is executed, or when an affirmative determination is made in step S107, it is determined whether the set values of the pachinko machine 10 are normal by checking the main side RAM 65 (step S108). Specifically, the setting value is determined to be normal if it is one of "setting 1" to "setting 6", and it is determined to be abnormal if it is "0" or 7 or more.

If a negative determination is made in any of steps S106 to S108, an operation prohibition process is executed. In the operation prohibition process, after executing an error notification process to notify the hall manager and the like of the occurrence of an error (step S109), an infinite loop occurs. The operation prohibition process is canceled by executing the all clear process (step S117), which will be described later.

If the determination is affirmative in all of steps S106 to S108, a power-on setting process is executed (step S110). In the power-on setting process, a predetermined area of the main RAM 65 is set to an initial value, such as initializing the power outage flag, and a command corresponding to the current game state is sent to the sound and light emission control device 81. After executing the process of step S110, a recognition process (step S111) is executed to cause the management IC 66 to recognize various information, and a data output process is executed to output various data to an external device connected to the read terminal 68d of the MPU 62 (step S112). The details of the recognition process and the data output process will be explained later.

The main CPU 63 is configured to periodically execute timer interrupt processing, but timer interrupt processing is prohibited from occurring when main processing is started. This state in which timer interrupt processing is prohibited is released when step S112 is completed and before step S113 is executed, and timer interrupt processing is permitted to be executed. As a result, when the supply of operating power to the main CPU 63 is started, the data output processing of step S112 ends, and timer interrupt processing is not executed until the stage before step S113 is started. Therefore, processing to progress the game in the main CPU 63 is not started until this situation is reached.

Thereafter, the process proceeds to the remaining processing of steps S113 to S116. In other words, although the main CPU 63 is configured to periodically execute timer interrupt processing, there is a remaining time between one timer interrupt processing and the next timer interrupt processing. Although this remaining time will vary depending on the processing completion time of each timer interrupt process, the remaining process from step S113 to step S116 is repeatedly executed using such irregular time. In this respect, it can be said that the remaining processing of steps S113 to S116 is non-regular processing that is executed non-regularly.

In the remaining processing, first, in step S113, interrupt prohibition is set to prohibit generation of timer interrupt processing. In the subsequent step S114, a random number initial value update process is executed to update the random number initial value counter CINI, and in step S115, a variation counter update process is executed to update the variation type counter CS. In these update processes, the current numerical information is read from the corresponding counter in the main side RAM 65, the read numerical information is incremented by 1, and then the process of overwriting the counter from which it was read is executed. In this case, each counter value is cleared to "0" when it exceeds the maximum value. Thereafter, in step S116, interrupt permission is set to switch from a state in which generation of timer interrupt processing is prohibited to a state in which it is permitted. When the process of step S116 is executed, the process returns to step S113 and the processes of steps S113 to S116 are repeated.

On the other hand, if the setting key insertion part 68a is turned on (step S103: YES), the main side RAM 65 includes the area where setting value information indicating the setting state of the pachinko machine 10 is set. All areas are cleared to "0" and initial settings are made to the areas cleared to "0" (step S117). In other words, if an operation is being performed to change the setting state of the pachinko machine 10, all areas of the main RAM 65 are cleared to "0" even if the reset button 68c is not pressed. Initial settings are performed for the storage area where the process was executed. Further, in step S117, initial settings are performed after various registers of the main CPU 63 are also cleared to "0". Note that this is not limited to this, and even if an operation is being performed to change the setting state of the pachinko machine 10, if the reset button 68c is not pressed, all of the main side RAM 65 is A configuration may be adopted in which the clearing process is not executed and the all clearing process is executed when an operation for changing the setting state of the pachinko machine 10 is performed and the reset button 68c is pressed.

Then, in step S118, a setting value update process is executed, and in step S119, a setting value update signal output process is executed, and then the process proceeds to step S110. The setting value update process is described below. The setting value update signal output process will be described in detail later. Figure 10 is a flowchart showing the setting value update process.

First, a set value counter provided in the main side RAM 65 is set to "1" (step S201). The setting value counter is a counter for the main CPU 63 to specify which setting value the setting state of the pachinko machine 10 is at. By setting "1" in the setting value counter, when the setting value update process is executed, the setting value becomes "setting 1" regardless of the previous setting value.

Then, a process to start displaying the setting value is executed (step S202). In the process to start displaying the setting value, the display of the third notification display device 69c is controlled so that the number "1" corresponding to "Setting 1" is displayed. When changing the setting value, the manager of the gaming hall can grasp the current setting state of the pachinko machine 10 by checking the third notification display device 69c.

Thereafter, on the condition that the setting key insertion section 68a has not been turned off (step S203: NO), it is determined whether the update button 68b has been pressed once (step S204). Specifically, it is determined whether the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S204, the process returns to step S203, and it is determined whether or not the setting key insertion section 68a is turned off.

If the update button 68b has been pressed once (step S204: YES), the value of the set value counter in the main side RAM 65 is incremented by 1 (step S205). Further, if the value of the set value counter after adding 1 exceeds "6" (step S206: YES), the set value counter is set to "1" (step S207). As a result, each time the update button 68b is pressed once, the set value is updated to one step higher, and if the update button 68b is pressed once in the situation of "Setting 6", it is changed to "Setting 1". I will be going back.

If a negative determination is made in step S206, or if the process in step S207 is executed, a setting value display update process is executed (step S208). In the setting value display update process, the display of the third notification display device 69c is controlled so that a number corresponding to the value of the setting value counter of the main side RAM 65 is displayed. By checking the third notification display device 69c, the game hall manager can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S208, the process returns to step S203, and it is determined whether or not the setting key insertion section 68a has been turned off. If the OFF operation has not been performed (step S203: NO), the processes from step S204 onward are executed again. If the OFF operation has been performed (step S203: YES), a setting value display termination process is executed (step S209). In the set value display termination process, the display of the set values on the third notification display device 69c is terminated.

<Timer interrupt processing>
Next, timer interrupt processing will be explained with reference to the flowchart in FIG. The timer interrupt process is executed periodically (for example, every 4 milliseconds).

First, the power outage information storage process is executed (step S301). In the power outage information storage process, it is monitored whether a power outage signal corresponding to the occurrence of a power cut is received from the power outage monitoring board 67, and if a power outage is identified, the power outage process is executed and then an infinite loop is entered. In the power outage process, the power outage flag in the main RAM 65 is set to "1", and a checksum is calculated and the calculated checksum is saved.

Then, a random number update process for selection is executed (step S302). In the random number update process for selection, the winning random number counter C1, the big win type counter C2, the reach random number counter C3, and the normal power feature opening counter C4 are updated. Specifically, the current numerical information is read out sequentially from the winning random number counter C1, the big win type counter C2, the reach random number counter C3, and the normal power feature opening counter C4, and the read numerical information is incremented by 1, and then the counter from which it was read is overwritten. In this case, when the counter value exceeds the maximum value, each is cleared to "0". After that, in step S303, a random number initial value update process is executed as in step S114, and in step S304, a variable counter update process is executed as in step S115.

Thereafter, fraud detection processing is executed to monitor whether a predetermined event set as a monitoring target for fraud has occurred (step S305). In the fraud detection process, the occurrence of a plurality of types of events is monitored, and by confirming that a predetermined event has occurred, the game stop flag provided in the main side RAM 65 is set to "1". In the subsequent step S306, it is determined whether or not the game stop flag is set to "1", thereby determining whether or not the progress of the game is stopped. If a negative determination is made in step S306, the processes from step S307 onwards are executed.

In step S307, port output processing is executed. In the port output processing, when output information has been set in the previous timer interrupt processing, processing is executed to output corresponding to that output information to the various drive units 32b, 34b. For example, when information is set to switch the special power winning device 32 to an open state, the output of a drive signal to the special power drive unit 32b is started, and when information is set to switch to a closed state, the output of the drive signal is stopped. Also, when information is set to switch the normal power device 34a of the second operating port 34 to an open state, the output of a drive signal to the normal power drive unit 34b is started, and when information is set to switch to a closed state, the output of the drive signal is stopped.

Then, a read process is executed (step S308). In the read process, signals other than the power outage signal and the winning signal are read, and the read information is stored for use in future processes.

Then, the ball entry detection process is executed (step S309). In the ball entry detection process, the signals received from each ball entry detection sensor 42a to 49a are read, and based on the read results, it is determined whether or not a ball has entered the out gate 24a, the general winning gate 31, the special electric winning device 32, the first operating gate 33, the second operating gate 34, and the through gate 35. Details of the ball entry detection process will be explained later.

Then, a timer update process is executed to collectively update the numerical information of the multiple types of timer counters provided in the main RAM 65 (step S310). In this case, the timer counters whose stored numerical information is updated by subtraction are handled in a consolidated manner, but it is also possible to configure the system to collectively update both subtractive timer counters and additive timer counters.

Then, a launch control process is executed to control the launch of the gaming balls (step S311). When the launch operation to the launch operation device 28 is continued, one gaming ball is launched every 0.6 seconds, which is the predetermined launch cycle. In the following step S312, as an input status monitoring process, based on the information read in the reading process of step S308, a disconnection check is performed for each ball entry detection sensor 42a to 49a, and the opening of the gaming machine main body 12 and the front door frame 14 is confirmed.

Thereafter, a special figure special electric control process for controlling the execution of the game round and the opening/closing execution mode is executed (step S313). The special figure special electric control process will be explained in detail later.

Then, execute the normal map normal power control process (step S314). In the normal map normal power control process, if a winning entry has occurred in the through gate 35, execute a process to obtain the reserved information on the normal map side, and if reserved information on the normal map side is stored, execute an opening judgment for the reserved information, and execute a process to perform a normal map performance triggered by the opening judgment. Also, execute a process to open and close the normal power role 34a of the second operating port 34 based on the result of the opening judgment. In this case, if the support mode is the low frequency support mode, execute the corresponding process, and if the support mode is the high frequency support mode, execute the corresponding process. Also, if the opening and closing execution mode is selected, the support mode will be the low frequency support mode even if the previous support mode was the high frequency support mode.

In the next step S315, based on the processing results of the previous steps S313 and S314, output information is set to reflect the increase or decrease in the number of reserved information related to the special drawing display unit 37a in the special drawing reserved display unit 37b, and output information is set to reflect the increase or decrease in the number of reserved information related to the ordinary drawing display unit 38a in the ordinary drawing reserved display unit 38b. Also, in step S315, based on the processing results of the previous steps S313 and S314, output information is set to update the display contents of the special drawing display unit 37a, and output information is set to update the display contents of the ordinary drawing display unit 38a.

Thereafter, the content of the command and signal received from the payout control device 77 is confirmed, and a payout state reception process is executed to perform processing corresponding to the confirmation result (step S316). Further, a payout output process for setting the prize ball command as an output target is executed (step S317). Further, an external information setting process is executed to control the start and end of output of an external signal according to the processing results of various processes executed in the current timer interrupt process (step S318). Thereafter, a management output process is executed to output information corresponding to the result of the game ball entering the game area PA to the management IC 66 (step S319). Details of the management output process will be explained later.

Next, the special figure special electric control process in step S313 will be explained with reference to the flowchart of FIG. 12.

First, a reservation information acquisition process is executed (step S401). In the reservation information acquisition process, it is determined whether or not a winning has occurred in the first operating port 33 or the second operating port 34, and if a winning has occurred, the number of pending in the pending storage area 65a is the upper limit. It is determined whether the value is less than the value (“4” in this embodiment). If the number of reservations is less than the upper limit value, the number of reservations is increased by 1, and each numerical information of the hit random number counter C1, jackpot type counter C2, and reach random number counter C3 updated in the previous step S302 is set for reservation. It is stored in the first reservation area among the vacant reservation areas RE1 to RE4 of area RE. In addition, if winnings to the first operating port 33 and the second operating port 34 occur at the same time, the process for acquiring the pending information is executed within the range of executing the pending information obtaining process once. Run multiple times. Furthermore, when new hold information is acquired, a corresponding acquisition command is transmitted to the audio emission control device 81. When the sound emission control device 81 receives the command, it updates the display of the image showing the number of pending information on the symbol display device 41 to the display content corresponding to the increase in the pending information.

Then, the information of the special picture special charge counter provided in the main RAM 65 is read (step S402), and the special picture special charge address table provided in the main ROM 64 is read (step S403). Then, a start address corresponding to the information of the special picture special charge counter is obtained from the special picture special charge address table (step S404), and a jump is made to the process indicated by the obtained start address among the processes of steps S406 to S412 (step S405). The special picture special charge counter is a counter that allows the main CPU 63 to grasp which of the various processes of steps S406 to S412 should be executed, and the special picture special charge address table is set with the start address of the program for executing the processes of steps S406 to S412 corresponding to the numerical information of the special picture special charge counter.

In step S406, the special chart change start process is executed. Figure 13 is a flowchart showing the special chart change start process.

In the special chart change start process, the number of reserved information stored in the reserved area RE is 1 or more (step S501: YES), and the data setting process is executed (step S502). In the data setting process, the reserved number is first subtracted by 1, and the data stored in the first reserved area RE1 of the reserved area RE is moved to the execution area AE. Then, a process is executed to shift the data stored in each reserved area RE1 to RE4 of the reserved area RE. This data shift process is a process to shift the data stored in the first reserved area RE1 to the fourth reserved area RE4 to the lower area side in order, and in detail, the data in each area is shifted from the second reserved area RE2 to the first reserved area RE1, the third reserved area RE3 to the second reserved area RE2, the fourth reserved area RE4 to the third reserved area RE3, and so on, and then the fourth reserved area RE4 is cleared to "0". At this time, a shift command to recognize that the data in the reserved area has been shifted is sent to the voice light emission control device 81. When the audio and light control device 81 receives this command, it updates the image displayed on the pattern display device 41, which indicates the number of pending information items, to a display content that corresponds to a decrease in the number of pending information items.

After executing the data setting process, the win/lose table is read from the main ROM 64 (step S503). Specifically, first, the current win/lose lottery mode is identified by reading information indicating the win/lose lottery mode from the main RAM 65. If it is the high probability mode, the high probability win/lose table 64g is read from the main ROM 64. On the other hand, if it is the low probability mode, the setting state of the pachinko machine 10 is identified by reading the value of the setting value counter in the main RAM 65. Then, the low probability win/lose tables 64a to 64f corresponding to the identified setting value are read from the main ROM 64.

Then, the hit/miss table 64a-64g read in step S503 is referenced to execute a hit/miss determination process (step S504). In the hit/miss determination process, it is determined whether the hit/miss determination information stored in the execution area AE, i.e., the numerical information related to the hit random number counter C1, matches the jackpot numerical information set in the hit/miss table 64a-64g read in step S503.

If the result of the success/failure determination process is a jackpot winning result (step S505: YES), a distribution determination process is executed (step S506). In the distribution determination process, information for distribution determination, that is, numerical information related to the jackpot type counter C2, is read out of the information stored in the execution area AE. Then, referring to the distribution table 64h provided in the main side ROM 64, it is specified to which jackpot result the numerical information related to the read jackpot type counter C2 corresponds. Specifically, it is specified which jackpot result corresponds to a low-probability jackpot result, a low-win high-probability jackpot result, and a most profitable jackpot result.

Thereafter, a stop result setting process for jackpot results is executed (step S507). Specifically, information on the mode of the pattern to be finally stopped and displayed on the special figure display section 37a in the game round related to the start of the current variation is obtained from the stop result table for jackpot results stored in advance in the main side ROM 64. The identified information is written to the main RAM 65. In this stop result table for jackpot results, information on the mode of the picture that is stopped and displayed on the special figure display section 37a is set differently for each type of jackpot result.

Then, a flag set process corresponding to the distribution determination result is executed (step S508). Specifically, flags corresponding to the types of each jackpot result are provided in the main RAM 65, and in step S508, the flag corresponding to the result of the distribution determination process in step S506 is set to "1".

On the other hand, if it is determined in step S505 that the result is not a jackpot winning result, a stop result setting process for a winning result is executed (step S509). Specifically, information on the mode of the picture to be finally stopped and displayed on the special figure display section 37a in the game round related to the start of the current variation is obtained from the stop result table for miss results stored in advance in the main side ROM 64. The identified information is written to the main RAM 65. The information on the pattern mode selected in this case is different from the information on the pattern mode selected in the case of a jackpot result.

After executing either step S508 or step S509, a process for grasping the duration of the game round is executed (step S510). In this process, the numerical information of the fluctuation type counter CS is acquired. Also, it is determined whether or not a reach display will occur on the pattern display device 41 in the current game round. Specifically, if the game round related to the start of the current fluctuation has a low probability jackpot result or a most favorable jackpot result, it is determined that a reach display will occur. Also, if there is no jackpot result and furthermore the numerical information related to the reach random number counter C3 stored in the execution area AE is numerical information corresponding to the occurrence of a reach, it is determined that a reach display will occur.

If it is determined that a reach display will occur, refer to the reach occurrence duration table stored in the main side ROM 64 to obtain the duration of the game round corresponding to the numerical information of the current variation type counter CS. . On the other hand, if it is determined that the reach display does not occur, the continuation of the game round corresponding to the numerical information of the current variation type counter CS is continued by referring to the continuation period table for non-reach occurrence stored in the main side ROM 64. Get the period. Incidentally, the continuation period of a gaming session that can be obtained by referring to the continuation period table for non-reach occurrence is different from the continuation period of a gaming session that can be obtained by referring to the continuation period table for non-reach occurrence.

The duration of the game round when there is no reach is set such that the longer the number of reservation information stored in the reservation area RE, the shorter the duration of the game round. In addition, when the support mode is high-frequency support mode, a shorter game duration is selected than when the support mode is low-frequency support mode, even if the number of pending information is the same. A duration table for reach non-occurrence is set. However, the present invention is not limited to this, and a configuration may be adopted in which the duration of a game round does not vary depending on the number of pending information or the support mode, or the above relationship may be reversed. Furthermore, the above configuration may be applied to the duration of the game round when the reach occurs. Further, in the case of various jackpot results, separate duration tables may be set for each of the case of a losing reach and the case of a losing result with no reach. In this case, the duration of the game round will be allocated according to each game result.

Then, the information on the duration of the game acquired in step S510 is set in the special chart special electricity timer counter provided in the main RAM 65 (step S511). The update of the numerical information set in the special chart special electricity timer counter is executed in the timer update process (step S310). Incidentally, as a performance for a game round, the display of changing patterns in the special chart display section 37a and the display of changing patterns in the pattern display device 41 are performed, and when each of these display of changes is ended, the final stop display is performed for the final stop period (e.g., 0.5 seconds) with the stop result of that game round displayed (a predetermined combination of patterns is waiting on the pay line in the pattern display device 41). In this case, the duration of the game round acquired in step S510 is the total time for one game round.

After that, the variation command and the type command are transmitted to the audio emission control device 81 (step S512). The variation command includes information about the duration of the game. Here, as mentioned above, the duration of the gaming session obtained by referring to the duration table for non-reach occurrence is different from the duration of the gaming session obtained by referring to the duration table for reach occurrence. Even if the variation command does not include information on whether or not a reach has occurred, the audio emission control device 81 can specify whether or not a reach has occurred from the information on the duration of the game round. In this respect, it can be said that the variation command includes information indicating the presence or absence of reach. Note that the variation command may include information that directly indicates the presence or absence of reach. Further, the type command includes information on game results.

When the sound and light emission control device 81 receives a variation command and a type command from the main CPU 63, it causes the display light emitting unit 53, the speaker unit 54 and the pattern display device 41 to execute the presentation for the game round. In this case, the presentation for that game round is executed in a manner corresponding to the contents of the variation command and the type command. In addition, the pattern display device 41 displays a variation of the patterns as the presentation for the game round, and when the presentation for that game round ends, a combination of patterns corresponding to the results of the win/lose determination process and the allocation determination process is displayed frozen.

Then, the display of the changing pattern on the special chart display unit 37a is started (step S513). Then, the special chart special electricity counter is incremented by 1 (step S514). In this case, since the numerical information of the special chart special electricity counter is "0" when the special chart change start process is executed, the numerical information of the special chart special electricity counter becomes "1". Then, the eleventh output flag provided in the main RAM 65 is set to "1" (step S515). The eleventh output flag is a flag for specifying to the main CPU 63 that information output indicating that a game round has started should be executed to the management IC 66.

Returning to the explanation of the special chart special electricity control process (FIG. 52), in step S407, special chart change processing is executed. In the special chart change processing, it is determined whether or not it is during the duration of a game round and before the final stop display, and if it is before the final stop display, processing is executed to regularly change the display mode of the image in the special chart display section 37a. When it is time to display the final stop, the numerical information of the special chart special electricity counter is incremented by 1, thereby updating the numerical information of the counter from that corresponding to the special chart change processing to that corresponding to the special chart determination processing. Note that in this embodiment, a final stop command is not transmitted from the main CPU 63 to the sound and light emission control device 81.

In step S408, a special chart determination process is executed. In the special chart determination process, the display mode of the image on the special chart display unit 37a is changed to a display mode corresponding to the lottery result of the current game round. In addition, in the special chart determination process, it is determined whether the final stop period has elapsed, and if the period has elapsed, it is determined whether a transition to the opening and closing execution mode will occur. If a transition to the opening and closing execution mode does not occur, the numerical information of the special chart special electricity counter is cleared to "0". If a transition to the opening and closing execution mode occurs, the numerical information of the special chart special electricity counter is incremented by 1, thereby updating the numerical information of the counter from that corresponding to the special chart determination process to that corresponding to the special electricity start process.

In step S409, a special call start process is executed. In the special call start process, if the process for starting the opening period in the current opening/closing execution mode has not been executed yet, the opening period setting process is executed. Further, an opening command is transmitted to the audio emission control device 81. The audio light emission control device 81 receives the opening command so that the display light emission section 53, the speaker section 54, and the symbol display device 41 execute the opening effect. If the opening period has elapsed, start processing is executed to start the first round game. In the start process, the special electric winning device 32 is opened and conditions for ending the round game are set. When setting this end condition, the upper limit duration time for keeping the special electric winning device 32 in the open state in the first round game of this time is set, and the maximum duration of the winning period of the special electric winning device 32 in the first round game of this time is set. The upper limit number of game balls is set in a winning number counter provided in the main side RAM 65.

In step S410, the special line open process is executed. In the special line open process, it is determined whether the end condition of the round game is met. If the end condition is met, the special line winning device 32 is closed. Then, if the currently ended round game is not the last round game executed, the numerical information of the special chart special line counter is incremented by 1 to update the numerical information of the counter from that corresponding to the special line open process to that corresponding to the special line closed process, and if the currently ended round game is the last round game executed, the numerical information of the special chart special line counter is incremented by 2 to update the numerical information of the counter from that corresponding to the special line open process to that corresponding to the special line end process.

In step S411, special line closed processing is executed. In the special line closed processing, it is determined whether or not the interval period between rounds of play has elapsed. The interval period is set when the previous round of play ends. When the interval period has elapsed, the special line winning device 32 is opened and the end condition for the round of play is set. Then, the numerical information of the special chart special line counter is subtracted by 1, thereby updating the numerical information of the counter from that corresponding to the special line closed processing to that corresponding to the special line open processing.

In step S412, the special call termination process is executed. In the special call termination process, if the process for starting the ending period in the current opening/closing execution mode has not yet been executed, the ending period (e.g., 5 seconds) is set and an ending command is sent to the sound and light emission control device 81. By receiving the ending command, the sound and light emission control device 81 causes the display light-emitting unit 53, speaker unit 54, and pattern display device 41 to execute an ending performance. When the ending period has elapsed, the win/lose lottery mode and support mode after the end of the opening/closing execution mode are each set to a mode corresponding to the jackpot result that triggered the start of the current opening/closing execution mode.

Next, in the main side CPU 63, based on the detection results of each ball entry detection sensor 42a to 49a, the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the through A configuration for identifying whether or not a game ball has entered the gate 35 will be described. FIG. 14 is an explanatory diagram for explaining a configuration in which the detection results of the ball entry detection sensors 42a to 49a are input to the main CPU 63.

The main CPU 63 is provided with an input port 63a. The input port 63a is configured as an 8-bit parallel interface so that it can handle eight types of signals simultaneously. An area in which information "0" or "1" is stored according to the voltage of each signal is provided in one-to-one correspondence with each terminal. In other words, this area includes the 0th bit D0 to the 7th bit D7. Although more than eight types of signals are input to the input port 63a, in order to limit the types of signals that can be input simultaneously to eight types, the group of signals to be input to the input port 63a is switched through switching control by the driver IC.

In the ball entry detection process (step S309) of the timer interrupt process (FIG. 11), the signal group to be input to the input port 63a is set to the signal group from each of the ball entry detection sensors 42a to 49a. In a situation where such settings are made, the 0th bit D0 stores information corresponding to the detection signal from the first winning opening detection sensor 42a, and the 1st bit D1 corresponds to the detection signal from the second winning opening detection sensor 43a. The second bit D2 stores information corresponding to the detection signal from the third winning opening detection sensor 44a, and the third bit D3 stores information corresponding to the detection signal from the special electric detection sensor 45a. , the fourth bit D4 stores information corresponding to the detection signal from the first working port detection sensor 46a, the fifth bit D5 stores information corresponding to the detection signal from the second working port detection sensor 47a, and the fifth bit D5 stores information corresponding to the detection signal from the second working port detection sensor 47a. The 6th bit D6 stores information corresponding to the detection signal from the exit detection sensor 48a, and the 7th bit D7 stores information corresponding to the detection signal from the gate detection sensor 49a.

When the ball entry detection sensors 42a to 49a do not detect the passage of a game ball, they output a LOW level signal indicating that they are not being detected as a detection signal, and when they detect the passage of a game ball, they output a HI level signal indicating that they are being detected as a detection signal. When the input port 63a receives a LOW level signal, it stores "0" information in the corresponding bit, and when it receives a HI level signal, it stores "1" information in the corresponding bit. In other words, when the ball entry detection sensors 42a to 49a do not detect the passage of a game ball, they store "0" information corresponding to the information indicating that they are not being detected in the corresponding bit, and when they detect the passage of a game ball, they store "1" information corresponding to the information indicating that they are being detected in the corresponding bit.

Figure 15 is a flowchart showing the ball entry detection process executed in step S309 of the timer interrupt process (Figure 11).

When it is confirmed that the situation has changed from the situation where the 0th bit D0 stores the information of "0" to the situation where the information of "1" is stored, the first winning opening detection sensor 42a detects one It is determined that a game ball has been detected (step S601: YES). In this case, the first output flag provided in the main side RAM 65 is set to "1" (step S602), and the value of the 10 prize ball counter provided in the main side RAM 65 is incremented by 1 (step S603). . The first output flag is used to specify by the main CPU 63 that information indicating that one game ball has been detected by the first winning opening detection sensor 42a should be output to the management IC 66. It's a flag. The 10 prize balls counter is a counter for the main CPU 63 to specify the number of times that 10 game balls should be paid out. If the value of the 10 prize balls counter is 1 or more, the 10 prize balls command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and the 10 prize balls are output. When the command is output once, the value of the 10 award balls counter is subtracted by 1. When the payout control device 77 receives the 10 prize balls command, it drives and controls the payout device 76 so that 10 game balls are paid out.

When it is confirmed that the first bit D1 has changed from the state in which the information of "0" is stored to the state in which the information of "1" is stored, the second winning opening detection sensor 43a detects one It is determined that a game ball has been detected (step S604: YES). In this case, the second output flag provided in the main side RAM 65 is set to "1" (step S605), and the value of the 10 prize ball counter provided in the main side RAM 65 is incremented by 1 (step S606). . The second output flag is used to specify by the main CPU 63 that information indicating that one game ball has been detected by the second winning opening detection sensor 43a should be output to the management IC 66. It's a flag.

When it is confirmed that the second bit D2 has changed from the state where the information of "0" is stored to the state where the information of "1" is stored, the third winning opening detection sensor 44a detects one It is determined that a game ball has been detected (step S607: YES). In this case, the third output flag provided in the main side RAM 65 is set to "1" (step S608), and the value of the 10 prize ball counter provided in the main side RAM 65 is incremented by 1 (step S609). . The third output flag is used to specify by the main CPU 63 that information indicating that one game ball has been detected by the third winning opening detection sensor 44a should be output to the management IC 66. It's a flag.

When it is confirmed that the third bit D3 has changed from the state in which "0" information is stored to the state in which "1" information is stored, one game ball is detected by the special electric detection sensor 45a. It is determined that it has been detected (step S610: YES). In this case, the special electric winning flag provided in the main side RAM 65 is set to "1" (step S611), the fourth output flag provided in the main side RAM 65 is set to "1" (step S612), and The value of the 15 award balls counter provided in the main side RAM 65 is incremented by 1 (step S613). The special electric winning flag is a flag used by the main CPU 63 to specify that one game ball has entered the special electric winning device 32 in the round game in the opening/closing execution mode. In the special figure special electric line control process (step S313) of the timer interrupt process (FIG. 11), by confirming that "1" is set in the special electric prize winning flag, it is possible to input one game ball into the special electric prize winning device 32. It is specified that a ball has occurred, and the remaining number of balls that can be entered into a special electric winning device 32 in a round game is subtracted by 1. When the process of subtracting 1 from the number of balls that can be entered is executed, the special electric winning flag is cleared to "0". The fourth output flag is a flag used by the main CPU 63 to specify that information indicating that one game ball has been detected by the special electric detection sensor 45a should be output to the management IC 66. . The 15 prize balls counter is a counter for the main CPU 63 to specify the number of times that 15 game balls should be paid out. If the value of the 15 prize balls counter is 1 or more, the 15 prize balls command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and the 15 prize balls are output. When the command is output once, the value of the 15 prize ball counter is subtracted by 1. When the payout control device 77 receives the 15 prize balls command, it drives and controls the payout device 76 so that 15 game balls are paid out.

When it is confirmed that the fourth bit D4 has changed from the state in which "0" information is stored to the state in which "1" information is stored, the first operating port detection sensor 46a detects one It is determined that a game ball has been detected (step S614: YES). In this case, the first operation winning flag provided in the main side RAM 65 is set to "1" (step S615), and the fifth output flag provided in the main side RAM 65 is set to "1" (step S616). Furthermore, the value of the one prize ball counter provided in the main side RAM 65 is incremented by 1 (step S617). The first operation winning flag is a flag used by the main CPU 63 to specify that one game ball has entered the first operation port 33. In the special figure special electric control process (step S313) of the timer interrupt process (FIG. 11), by confirming that "1" is set in the first operation winning flag, the game is stored in the reservation area RE of the reservation storage area 65a. Processing for newly storing pending information is executed on the condition that the number of pending information that has been stored is less than the upper limit of 4 pieces. In the special electric special electric control process (step S313), it is confirmed that the first operation winning flag is set to "1", and when the process corresponding to the confirmation is executed, the first operation winning flag is cleared to "0". do. The fifth output flag is used to specify in the main CPU 63 that information indicating that one game ball has been detected by the first operating port detection sensor 46a should be output to the management IC 66. It's a flag. The one prize ball counter is a counter for the main CPU 63 to specify the number of times one game ball should be paid out. If the value of the counter for one prize ball is 1 or more, a one prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and one prize ball is output. When the command is output once, the value of the one prize ball counter is decremented by one. When the payout control device 77 receives the one prize ball command, it drives and controls the payout device 76 so that one game ball is paid out.

When it is confirmed that the fifth bit D5 has changed from the state in which "0" information is stored to the state in which "1" information is stored, the second operating port detection sensor 47a detects one It is determined that a game ball has been detected (step S618: YES). In this case, the second operation winning flag provided in the main side RAM 65 is set to "1" (step S619), and the sixth output flag provided in the main side RAM 65 is set to "1" (step S620). Furthermore, the value of the one prize ball counter provided in the main side RAM 65 is incremented by 1 (step S621). The second operation winning flag is a flag used by the main CPU 63 to specify that one game ball has entered the second operation port 34. In the special figure special electric control process (step S313) of the timer interrupt process (FIG. 11), by confirming that "1" is set in the second operation winning flag, the game is stored in the reservation area RE of the reservation storage area 65a. Processing for newly storing pending information is executed on the condition that the number of pending information that has been stored is less than the upper limit of 4 pieces. In the special electric special electric control process (step S313), it is confirmed that the second operation winning flag is set to "1", and when the process corresponding to the confirmation is executed, the second operation winning flag is cleared to "0". do. The sixth output flag is used to specify in the main CPU 63 that information indicating that one game ball has been detected by the second operating port detection sensor 47a should be output to the management IC 66. It's a flag.

If it is confirmed that the sixth bit D6 has switched from a state in which "0" is stored to a state in which "1" is stored, it is determined that one game ball has been detected by the outlet detection sensor 48a (step S622: YES). In this case, the seventh output flag provided in the main RAM 65 is set to "1" (step S623). The seventh output flag is a flag that specifies to the main CPU 63 that information indicating that one game ball has been detected by the outlet detection sensor 48a should be output to the management IC 66.

If it is confirmed that the seventh bit D7 has switched from a state in which "0" information is stored to a state in which "1" information is stored, it is determined that one game ball has been detected by the gate detection sensor 49a (step S624: YES). In this case, the gate winning flag provided in the main RAM 65 is set to "1" (step S625). The gate winning flag is a flag for the main CPU 63 to identify that one game ball has entered the through gate 35. In the normal map normal power control process (step S314) of the timer interrupt process (FIG. 11), by confirming that the gate winning flag is set to "1", the process is executed to store the current numerical information of the normal power role release counter C4 as the normal map side reserved information in the normal power reserve area 65c, provided that the number of reserved information on the normal map side stored in the normal power reserve area 65c is less than the upper limit of four. In the normal map and normal power control process (step S314), it is confirmed that the gate winning flag is set to "1", and when the process corresponding to that confirmation is executed, the gate winning flag is cleared to "0".

As already explained, the timer interrupt process (Figure 11) is started at a 4 millisecond cycle, so when one of the ball entry detection sensors 42a-49a starts to detect one game ball, the main CPU 63 determines that one game ball has been detected by the ball entry detection sensor 42a-49a while the ball entry detection sensor 42a-49a continues to detect that one game ball. Therefore, it is sufficient to provide one each of the first through seventh output flags.

Next, the contents of the processing executed by the payout control device 77 will be explained. First, the electrical configuration of the payout control device 77 and various devices that communicate with the payout control device 77 will be described with reference to the block diagram of FIG. 16.

The payout control device 77 includes an MPU 91. The MPU 91 includes a payout side CPU92 which is an arithmetic processing device including a control section and a calculation section, a payout side ROM93, a payout side RAM94, an interrupt circuit, a timer circuit, a data input/output circuit, etc.

The payout side ROM 93 is a memory such as a NOR type flash memory and a NAND type flash memory that does not require an external power supply to retain memory (ie, a nonvolatile storage means), and is used for reading only. The payout side ROM93 stores various control programs and fixed value data executed by the payout side CPU92.

The payout side RAM 94 is a memory such as SRAM and DRAM (that is, a volatile storage means) that requires an external power supply to maintain memory, and is used for both reading and writing. The payout side RAM 94 can be randomly accessed, and when compared with the same data capacity, the time required for reading is faster than the payout side ROM 93. The payout side RAM 94 temporarily stores various data for execution of the control program stored in the payout side ROM 93.

The payout side CPU 92 is capable of two-way communication with the main CPU 63. By receiving a prize ball command from the main CPU 63, the payout side CPU 92 drives and controls the payout device 76 so that the number of game balls corresponding to the prize ball command is paid out. The payout side CPU 92 also monitors whether or not the game balls can be paid out normally, and when it is determined that the game balls cannot be paid out normally, it stops the payout device 76 even if the payout side RAM 94 stores information on the number of prize balls that have not been paid out. The payout side CPU 92 also transmits a payout limit command to the main CPU 63 indicating that the game balls cannot be paid out normally. When the main CPU 63 receives the payout limit command, it transmits a notification command to the sound and light emission control device 81 so that a notification indicating that the game balls cannot be paid out normally is executed by the pattern display device 41, the display light emission unit 53, and the speaker unit 54. The states in which it is not possible to normally dispense game balls include a full state in which the lower tray 56a is full of game balls, a no-ball state in which the tank 75 has not been refilled with game balls, an abnormal dispense state in which the payout device 76 does not operate normally, a main body open state in which the gaming machine main body 12 is open from the outer frame 11, and a front door open state in which the front door frame 14 is open from the inner frame 13.

A full tank detection sensor (not shown) is provided midway along the game ball passageway leading from the payout device 76 to the lower tray 56a, and the detection result of the full tank detection sensor is input to the payout side CPU 92. The payout side CPU 92 determines that the tank is full when game balls are continuously detected by the full tank detection sensor, and determines that the full tank state has been released when the state in which game balls are continuously detected by the full tank detection sensor is released.

A ball non-detection sensor (not shown) is provided in the middle of the game ball path leading from the tank 75 to the payout device 76, and the detection result of the ball non-detection sensor is input to the payout side CPU92. The payout side CPU 92 identifies the no-ball state when no game balls are continuously detected by the no-ball detection sensor, and determines that there is no ball when the no-ball detection sensor continues to detect no game balls. Specify that the no-ball state has been released.

The payout device 76 is provided with a payout detection sensor (not shown) for detecting game balls paid out from the payout device 76, and the detection result of the payout detection sensor is input to the payout side CPU 92. The payout side CPU 92 specifies that one game ball has been paid out from the payout device 76 when a game ball is detected by the payout detection sensor. In addition, the payout side CPU 92 identifies a payout abnormal state when the payout detection sensor does not continuously detect a game ball even though the payout device 76 is drive-controlled so that the game ball is paid out. , when the state in which the game balls are not continuously detected by the payout detection sensor is canceled, it is determined that the abnormal payout state has been canceled.

A front door open sensor 95 is provided on the front side of the inner frame 13 (see FIG. 2), and the detection result of the front door open sensor 95 is input to the payout side CPU 92. In this case, when the front door frame 14 is in the closed state with respect to the inner frame 13, the front door open sensor 95 transmits a closure detection signal to the payout side CPU 92, and the front door frame 14 is in the open state with respect to the inner frame 13. In this case, the front door open sensor 95 transmits an open detection signal to the payout side CPU 92. The payout side CPU 92 identifies that the front door frame 14 is in the closed state when receiving a closing detection signal from the front door open sensor 95, and specifies that the front door frame 14 is in the closed state when receiving an open detection signal from the front door open sensor 95. It is specified that the front door frame 14 is in an open state. Further, the payout side CPU 92 transmits a front door open command to the main side CPU 63 at the timing when it specifies that the front door frame 14 has changed from the closed state to the open state, and specifies that the front door frame 14 has changed from the open state to the closed state. At this timing, a front door closing command is sent to the main CPU 63. The main side CPU 63 specifies that the front door frame 14 is in the open state when receiving the front door open command, and specifies that the front door frame 14 is in the closed state when receiving the front door close command.

A main body opening sensor 96 is provided on the front side of the back pack unit 15 (see FIG. 2), and the detection result of the main body opening sensor 96 is input to the dispensing side CPU 92. In this case, when the gaming machine main body 12 is in a closed state with respect to the outer frame 11, the main body open sensor 96 transmits a closure detection signal to the payout side CPU 92, and when the gaming machine main body 12 is in an open state with respect to the outer frame 11. In some cases, the main body open sensor 96 transmits an open detection signal to the payout side CPU 92. The payout side CPU 92 specifies that the gaming machine main body 12 is in the closed state when receiving the closing detection signal from the main body opening sensor 96, and determines that the gaming machine main body 12 is in the closed state when receiving the opening detection signal from the main body opening sensor 96. It is determined that the main body 12 is in an open state. Further, the payout side CPU 92 transmits a main body opening command to the main side CPU 63 at the timing when it specifies that the gaming machine main body 12 has changed from the closed state to the open state, and specifies that the gaming machine main body 12 has changed from the open state to the closed state. A main body closing command is sent to the main CPU 63 at the appropriate timing. The main side CPU 63 specifies that the gaming machine main body 12 is in the open state when receiving the main body opening command, and specifies that the gaming machine main body 12 is in the closed state when receiving the main body closing command.

The timer interrupt process executed by the payout side CPU 92 will be described with reference to the flowchart in FIG. 17. The timer interrupt process is activated repeatedly at a predetermined period (for example, 2 milliseconds).

First, the full tank process is executed (step S701). In the full tank process, as already explained, it is determined whether the tank is full based on the detection result of the full tank detection sensor, and if the tank is full, a process is executed to stop the payout of game balls and a command indicating that the tank is full is sent to the main CPU 63. Furthermore, if the full tank state is released, a process is executed to enable the payout of game balls and a command is sent to the main CPU 63 indicating that the full tank state has been released.

After that, the no-ball process is executed (step S702). In the no-ball process, as already explained, it is determined whether or not the no-ball state is present based on the detection result of the no-ball detection sensor, and if the no-ball state is present, a process is executed to stop the payout of game balls, and a command indicating the no-ball state is sent to the main CPU 63. In addition, if the no-ball state is released, a process is executed to enable the payout of game balls, and a command indicating that the no-ball state has been released is sent to the main CPU 63.

Thereafter, a payout abnormality monitoring process is executed (step S703). In the payout abnormality monitoring process, as described above, it is determined whether or not there is an abnormal payout state based on the detection result of the payout detection sensor, and if it is in the abnormal payout state, a process is executed to stop the payout of game balls. At the same time, a command indicating that the payout is in an abnormal state is transmitted to the main CPU 63. Further, when the abnormal payout state is canceled, a process is executed to enable the payout of game balls, and a command indicating that the abnormal payout state is canceled is sent to the main CPU 63.

Thereafter, front door opening monitoring processing is executed (step S704). In the front door open monitoring process, as described above, it is determined whether the front door frame 14 is in the open state based on the detection result of the front door open sensor 95, and if the front door frame 14 is in the open state, It executes a process to stop the payout of game balls, and also sends a front door opening command to the main CPU 63. Further, when the front door frame 14 is closed, a process is executed to enable the payout of game balls, and a front door close command is transmitted to the main CPU 63.

Then, the main body open monitoring process is executed (step S705). As already explained, the main body open monitoring process determines whether the gaming machine main body 12 is open or not based on the detection result of the main body open sensor 96, and if the gaming machine main body 12 is open, a process is executed to stop the payout of gaming balls and a main body open command is sent to the main CPU 63. In addition, if the gaming machine main body 12 is closed, a process is executed to enable the payout of gaming balls and a main body close command is sent to the main CPU 63.

Then, a command read process is executed (step S706). In the command read process, a process for reading the prize ball command sent by the main CPU 63 is executed, and the prize ball command is stored in the payout side RAM 94. Then, after executing a prize ball setting process for adding the number corresponding to the received prize ball command to the unpaid prize ball number information in the payout side RAM 94 (step S707), a payout control process for controlling the execution of the payout of game balls by the payout device 76 is executed (step S708). In the payout control process, when the unpaid prize ball number information stored in the payout side RAM 94 is a value of 1 or more, the payout device 76 is driven and controlled, and when the payout detection sensor detects one game ball, the value of the prize ball number information is subtracted by 1. Then, when the value of the prize ball number information becomes "0", the drive control of the payout device 76 is stopped. Then, an external information setting process is executed for controlling the start and end of the output of an external signal according to the processing results of various processes executed in this timer interrupt process (step S709).

Next, a configuration for externally outputting information from the pachinko machine 10 to the hall computer HC provided in the game hall will be described.

As shown in FIG. 2, the back pack unit 15 is provided with an external terminal board 97. The external terminal board 97 is provided with a large number of external terminals, some of which are electrically connected to the main CPU 63, and some of which are electrically connected to the main CPU 63. A plurality of external terminals are electrically connected to the payout side CPU 92. Since the main side CPU 63 and the payout side CPU 92 are each electrically connected to the external terminal board 97 in this way, as shown in FIG. It is possible to output.

One external terminal of the external terminal board 97 is electrically connected to the front door open sensor 95, and one external terminal of the external terminal board 97 is electrically connected to the main body open sensor 96. Regarding the configuration of this electrical connection in detail, a signal relay board 98 is provided at a midpoint of the signal path from the front door open sensor 95 to the dispensing side CPU 92. The signal relay board 98 is provided with a branch path SL2 that branches from the signal path SL1 from the front door open sensor 95 to the dispensing side CPU 92. The branch path SL2 is connected to the external terminal for opening the front door on the external terminal board 97. Therefore, the electrical signal corresponding to the detection result of the front door open sensor 95 is not only input to the dispensing side CPU 92, but also input to the external terminal for opening the front door on the external terminal board 97. This makes it possible to externally output a signal indicating whether the front door frame 14 is in an open state to the hall computer HC without going through the control of the dispensing side CPU 92.

More specifically, regarding the main body open sensor 96, the signal relay board 98 is provided with a branch path SL4 branching from the signal path SL3 from the main body open sensor 96 toward the payout side CPU 92. The branch path SL4 is connected to an external terminal for opening the main body on the external terminal board 97. Therefore, the electrical signal corresponding to the detection result by the main body opening sensor 96 is not only input to the payout side CPU 92 but also to the external terminal for main body opening on the external terminal board 97. This makes it possible to externally output a signal indicating whether or not the game machine main body 12 is in an open state to the hall computer HC without being controlled by the payout side CPU 92.

Next, the contents of the information externally output from the main side CPU 63 and the payout side CPU 92 to the hall computer HC will be explained. First, the contents of the information externally output from the main CPU 63 to the hall computer HC will be explained.

In the external information setting process (step S318) in the timer interrupt process (FIG. 11), the main CPU 63 sets the output of information to each external terminal assigned to the main CPU 63 on the external terminal board 97. The information output from the main CPU 63 to the external terminal board 97 includes information indicating that the opening/closing execution mode is in progress, information indicating that the support mode is in the high frequency support mode, information indicating that one game round has ended, information indicating that a predetermined number (e.g., 100 balls) of game balls have been discharged from the game area PA through the outlet 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, or the second operating port 34, information indicating that a game ball has entered the first operating port 33, and information indicating that a game ball has entered the second operating port 34.

In the external information setting process (step S709) of the timer interrupt process (FIG. 17), the payout CPU 92 sets the output of information to each external terminal assigned to the payout CPU 92 on the external terminal board 97. The information output from the payout CPU 92 to the external terminal board 97 includes information indicating that 10 game balls have been paid out.

The hall computer HC can grasp the manner in which the game balls are paid out in the pachinko machine 10 in accordance with various information received from the pachinko machine 10 via the external terminal board 97. For example,
・The ball payout rate, which is the ratio of the number of game balls paid out until 100 game balls are discharged from the game area PA of the pachinko machine 10. ・The ball payout rate in a normal game state other than the open/close execution mode and the high frequency support mode (hereinafter, this ball payout rate will be referred to as "B")
・The ball output rate in the open/close execution mode ・The ball output rate in the high frequency support mode ・The number of times the game is executed until 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as "S")
B-S x "number of winning balls for winning the first actuation port 33 and the second actuation port 34"
The number of game balls that enter the first operating port 33 until 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as "S1")
The number of game balls that enter the second operating port 34 until 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as "S2")
B-(S1 x "number of winning balls for winning the first actuation port 33" + S2 x "number of winning balls for winning the second actuation port 34")
The probability of occurrence of the open/close execution mode per unit play time, the probability of occurrence of the high frequency support mode per unit play time, etc. are calculated. This allows the hall computer HC to manage the ball entry patterns of the game balls in the play area PA of the pachinko machine 10. The number of prize balls refers to the number of game balls paid out when one game ball enters the corresponding ball entry section.

<Configuration for managing winning modes of game balls>
Next, a configuration for managing gaming history using the management IC 66 will be described. First, the electrical configuration of the management IC 66 will be described with reference to the block diagram of FIG.

As already explained, the MPU 62 of the main control device 60 includes a main CPU 63, a main ROM 64, a main RAM 65, and a management IC 66. In addition to these, the MPU 62 also includes an I/F 101, and the read terminal 68d already explained.

The I/F 101 is an interface for sending and receiving signals between the MPU 62 and devices external to the MPU 62. The I/F 101 is electrically connected to the main CPU 63 via the internal bus 103. Detection results from sensors such as the ball entry detection sensors 42a to 49a and commands from the payout CPU 92 are input to the MPU 62 through the input port of the I/F 101, and various processes are executed by the main CPU 63 based on the input detection results and command contents as already explained. In addition, when a signal is output to a device such as the special power drive unit 32b as a result of various processes executed by the main CPU 63, the signal output is executed through the output port of the I/F 101, and when a command is output to the payout CPU 92 and the sound and light emission control device 81 as a result of various processes executed by the main CPU 63, the command output is executed through the output port of the I/F 101.

The management IC 66 includes a management I/F 111, a management CPU 112, a management ROM 113, a management RAM 114, an RTC 115, a correspondence memory 116, a history memory 117, and a calculation result memory 131. These devices are connected to each other via an internal bus 66a provided in the management IC 66 so as to enable two-way communication.

The management side I/F 111 receives various signals from the main CPU 63 via a signal path group 118 for unidirectional communication built in the MPU 62, and also receives a signal path group 119 for unidirectional communication built in the MPU 62. This is an interface for transmitting various signals to the reading terminal 68d. Various signals from the main CPU 63 are input to the input port of the management side I/F 111, and various signals to the reading terminal 68d are output from the output port of the management side I/F 111. The main CPU 63 is electrically connected to the reading terminal 68d via a signal path group 120 for bidirectional communication built into the MPU 62.

The management CPU 112 is a processing unit including a control unit and a calculation unit. The management ROM 113 is a memory (i.e., a non-volatile storage means) that does not require an external power supply to retain memory such as a NOR flash memory and a NAND flash memory, and is used for read-only purposes. The management ROM 113 stores various control programs and fixed value data executed by the management CPU 112. The management RAM 114 is a memory (i.e., a volatile storage means) that requires an external power supply to retain memory such as an SRAM and a DRAM, and is used for both reading and writing. The management RAM 114 is randomly accessible, and when compared with the same data capacity, it takes less time to read than the management ROM 113. The management RAM 114 temporarily stores various data and the like for the execution of the control programs stored in the management ROM 113.

The RTC 115 is a real-time clock that constantly measures date and time information and outputs the measured date and time information (hereinafter also referred to as date and time information) according to instructions from the management CPU 112. This is a configuration that allows this. Note that the RTC 115 is provided with a backup power source, so that it is possible to measure date information and time information even when the power to the pachinko machine 10 is cut off.

The correspondence memory 116 is a memory (i.e., a volatile storage means) that requires an external power supply to retain data, such as SRAM and DRAM, and is used for both reading and writing. The correspondence memory 116 is used to store information on the correspondence between each of the buffers 122a to 122p provided in the input port 121 of the management side I/F 111 and the types of signals input to those buffers 122a to 122p. The contents of the correspondence memory 116 will be described in detail later.

The history memory 117 is a memory that does not require an external power supply to retain memory, such as a NOR flash memory or a NAND flash memory (that is, a nonvolatile storage means), and is used for both reading and writing purposes. The history memory 117 is used to store information regarding the game history received from the main CPU 63 through the management I/F 111. Details of the contents of the history memory 117 will be explained later.

The calculation result memory 131 is a memory that does not require an external power supply to retain memory, such as a NOR flash memory or a NAND flash memory (that is, a nonvolatile storage means), and is used for both reading and writing purposes. The calculation result memory 131 is used to sequentially store various parameters calculated by the management CPU 112 using the history information stored in the history memory 117. The contents of the various parameters stored in the calculation result memory 131 are sequentially displayed on the first to third notification display devices 69a to 69c, and are output to an external device connected to the reading terminal 68d.

Next, the configuration of the input port 121 provided in the management side I/F 111 will be described. Figure 19 is an explanatory diagram for explaining the configuration of the input port 121 of the management side I/F 111.

The input port 121 is provided with a number of buffers 122a-122p. Specifically, first to sixteenth buffers 122a-122p are provided. Each of the first to sixteenth buffers 122a-122p can receive one type of signal via signal paths 118a-118p, and each of the first to sixteenth buffers 122a-122p stores "0" as the first data when the input signal is at a LOW level, and stores "1" as the second data when the input signal is at a HI level. Note that the relationship between LOW and HI and the first and second data may be reversed.

A first signal corresponding to the detection result of the first winning opening detection sensor 42a is input to the first buffer 122a. In this case, the main CPU 63 outputs the first signal of LOW level in a situation where no new game ball is detected by the first winning hole detection sensor 42a, and the first winning hole detection sensor 42a outputs one game ball. When a ball is detected, a first signal at HI level is output for a specific period of time. This specific period is a period sufficient for the management side CPU 112 to specify that the first signal at the HI level is input to the first buffer 122a.

A second signal corresponding to the detection result of the second winning hole detection sensor 43a is input to the second buffer 122b. In this case, the main CPU 63 outputs a LOW level second signal when no new game balls are detected by the second winning hole detection sensor 43a, and outputs a HI level second signal for a specific period of time when one game ball is detected by the second winning hole detection sensor 43a. This specific period is sufficient for the management CPU 112 to determine that a HI level second signal has been input to the second buffer 122b.

A third signal corresponding to the detection result of the third winning hole detection sensor 44a is input to the third buffer 122c. In this case, the main CPU 63 outputs a LOW level third signal when no new game balls are detected by the third winning hole detection sensor 44a, and outputs a HI level third signal for a specific period of time when one game ball is detected by the third winning hole detection sensor 44a. This specific period is sufficient for the management CPU 112 to determine that a HI level third signal has been input to the third buffer 122c.

A fourth signal corresponding to the detection result of the special electric detection sensor 45a is input to the fourth buffer 122d. In this case, the main CPU 63 outputs the fourth signal at LOW level when no new game ball is detected by the special electric detection sensor 45a, and when one game ball is detected by the special electric detection sensor 45a. A fourth signal at HI level is output for a specific period. This specific period is a period sufficient for the management side CPU 112 to specify that the fourth signal at HI level is input to the fourth buffer 122d.

A fifth signal corresponding to the detection result of the first operating port detection sensor 46a is input to the fifth buffer 122e. In this case, the main side CPU 63 outputs the fifth signal of LOW level in the situation where no new game ball is detected by the first operating port detection sensor 46a, and the first operating port detection sensor 46a outputs the fifth signal of LOW level. When a ball is detected, a fifth signal at HI level is output for a specific period of time. This specific period is a period sufficient for the management CPU 112 to specify that the fifth signal at the HI level is being input to the fifth buffer 122e.

A sixth signal corresponding to the detection result of the second operating port detection sensor 47a is input to the sixth buffer 122f. In this case, the main side CPU 63 outputs the sixth signal of LOW level in a situation where no new game ball is detected by the second operating port detection sensor 47a, and the second operating port detection sensor 47a outputs the sixth signal of LOW level. When a ball is detected, a sixth signal at HI level is output for a specific period. This specific period is a period sufficient for the management side CPU 112 to specify that the sixth signal at HI level is input to the sixth buffer 122f.

A seventh signal corresponding to the detection result of the outlet detection sensor 48a is input to the seventh buffer 122g. In this case, the main CPU 63 outputs the seventh signal at a LOW level when no new game ball is detected by the exit detection sensor 48a, and when one game ball is detected by the exit detection sensor 48a. In this case, a seventh signal at HI level is output for a specific period. This specific period is a period sufficient for the management side CPU 112 to specify that the seventh signal at HI level is being input to the seventh buffer 122g.

An eighth signal corresponding to whether the opening/closing execution mode is in progress is input to the eighth buffer 122h. In this case, the main CPU 63 continuously outputs the eighth signal at LOW level when the opening/closing execution mode is not present, and continuously outputs the eighth signal at HI level when the opening/closing execution mode is present.

A ninth signal corresponding to whether the high-frequency support mode is in progress is input to the ninth buffer 122i. In this case, the main CPU 63 continuously outputs the ninth signal at LOW level when the mode is not high frequency support mode, and continuously outputs the ninth signal at HI level when the mode is high frequency support mode.

The tenth buffer 122j receives a tenth signal corresponding to whether the front door frame 14 is open or not. In this case, the main CPU 63 continuously outputs a LOW level tenth signal when the front door frame 14 is closed, and continuously outputs a HI level tenth signal when the front door frame 14 is open.

An 11th signal corresponding to whether or not a game round has started is input to the 11th buffer 122k. In this case, the master CPU 63 continues to output a LOW level 11th signal until a game round starts, and outputs a HIGH level 11th signal for a specific period of time when a game round starts. This specific period is sufficient for the management CPU 112 to determine that a HIGH level 11th signal has been input to the 11th buffer 122k.

A setting value update signal is input to the 15th buffer 122o to make the management CPU 112 recognize that the setting state of the pachinko machine 10 has been newly set by the main CPU 63. In this case, the main CPU 63 outputs a LOW level setting value update signal when the setting state of the pachinko machine 10 has not been newly set, and outputs a HI level setting value update signal, a pulse signal that is maintained for a specific period of time, for the number of times corresponding to the newly set setting value, when the setting state of the pachinko machine 10 has been newly set. This specific period is sufficient for the management CPU 112 to determine that a HI level setting value update signal has been input to the 15th buffer 122o.

An output instruction signal is input to the 16th buffer 122p to cause the management CPU 112 to recognize the opportunity to output the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to the read terminal 68d. In this case, the main CPU 63 outputs a LOW level output instruction signal when there is no need to output the history information, and outputs a HI level output instruction signal for a specific period of time when there is a need to output the history information. This specific period is sufficient for the management CPU 112 to identify that a HI level output instruction signal has been input to the 16th buffer 122p.

The twelfth buffer 122l, the thirteenth buffer 122m, and the fourteenth buffer 122n can receive signals from the main CPU 63, but are blank in this pachinko machine 10 and do not receive normal signals. In this way, the number of buffers 122a to 122p is greater than the number of types of signals output from the main CPU 63 to the management IC 66 in this pachinko machine 10 as the input port 121 of the management I/F 111, so that the management IC 66 can be used in models other than this pachinko machine 10. This makes it possible to increase the versatility of the management IC 66. Incidentally, the signal paths 118a to 118p are formed between the main CPU 63 and each of the first to sixteenth buffers 122a to 122p so as to correspond one-to-one to the first to sixteenth buffers 122a to 122p, but this is not limited to this, and the signal paths 118l to 118n may not be formed between the buffers 122l to 122n to be blanked.

The input of a set value update signal to the 15th buffer 122o and the input of an output instruction signal to the 16th buffer 122p are determined in the design stage of the management IC 66, and the management CPU 112 can determine that a set value update signal is input to the 15th buffer 122o and that an output instruction signal is input to the 16th buffer 122p without receiving an instruction from the main CPU 63. On the other hand, the type of signals input to the first to fourteenth buffers 122a to 122n is not determined in the design stage of the management IC 66, and the types of these signals are identified by the management CPU 112 upon receiving an instruction from the main CPU 63. The identification of the types of these signals in the management CPU 112 is performed by transmitting a type identification command from the main CPU 63 to the management CPU 112 when control is started in the main CPU 63 and the management CPU 112 as the supply of operating power to the MPU 62 begins, as will be described in detail later. In this case, the information on the types of various signals provided by the type identification command is stored in the correspondence memory 116, and when the management CPU 112 identifies the types of various signals when operating power is being supplied, the information stored in the correspondence memory 116 is referenced.

FIG. 20 is an explanatory diagram for explaining the configuration of the correspondence memory 116. The correspondence memory 116 has first to fourteenth correspondence areas 123a to 123n in one-to-one correspondence to the first to fourteenth buffers 122a to 122n provided in the input port 121 of the management side I/F 111. It is provided.

The first correspondence area 123a stores information indicating that the general winning port 31 is the general winning port 31, as information for the management CPU 112 to identify the type of signal input to the first buffer 122a. The first correspondence area 123a also stores information indicating that the general winning port 31 is the general winning port 31, as well as information on the number of game balls (10) that will be paid out when one game ball enters the general winning port 31. The second correspondence area 123b stores information indicating that the general winning port 31 is the general winning port 31, as information for the management CPU 112 to identify the type of signal input to the second buffer 122b. The second correspondence area 123b also stores information indicating that the general winning port 31 is the general winning port 31, as well as information on the number of game balls (10) that will be paid out when one game ball enters the general winning port 31. The third correspondence area 123c stores information indicating that the general winning opening 31 is the information for the management CPU 112 to identify the type of signal input to the third buffer 122c. In addition to the information indicating that the general winning opening 31 is the third correspondence area 123c, information on the number of game balls (10) that will be paid out when one game ball enters the general winning opening 31 is also stored.

The fourth correspondence area 123d stores information indicating that it is the special electric winning device 32 as information for the management CPU 112 to specify the type of signal input to the fourth buffer 122d. In addition, in the fourth correspondence area 123d, there is information indicating that it is the special electric winning device 32, as well as information on the number of game balls that will be paid out when one game ball enters the special electric winning device 32 (15 balls). Stored. Information indicating that the signal is the first operating port 33 is stored in the fifth correspondence area 123e as information for the management CPU 112 to specify the type of signal input to the fifth buffer 122e. Further, in the fifth correspondence area 123e, information indicating that it is the first operating port 33 and information on the number of game balls that will be paid out when one game ball enters the first operating port 33 (1 ) are also stored. Information indicating that the signal is the second operating port 34 is stored in the sixth correspondence area 123f as information for the management CPU 112 to specify the type of signal input to the sixth buffer 122f. In addition, the sixth correspondence area 123f contains information indicating that the second operating port 34 is used, as well as information on the number of game balls that will be paid out when one game ball enters the second operating port 34 (1 ) are also stored. Information indicating that the signal is the output port 24a is stored in the seventh correspondence area 123g as information for the management CPU 112 to specify the type of signal input to the seventh buffer 122g.

The eighth correspondence area 123h stores information indicating that the opening/closing execution mode is used as information for the management CPU 112 to specify the type of signal input to the eighth buffer 122h. Information indicating the high frequency support mode is stored in the ninth correspondence area 123i as information for the management CPU 112 to specify the type of signal input to the ninth buffer 122i. Information indicating that it is the front door frame 14 is stored in the tenth correspondence area 123j as information for the management CPU 112 to specify the type of signal input to the tenth buffer 122j. The eleventh correspondence area 123k stores information indicating that a game round has started, as information for the management CPU 112 to specify the type of signal input to the eleventh buffer 122k.

The twelfth correspondence area 123l stores information indicating that it is blank and does not correspond to any of the types of signals input to the twelfth buffer 122l, as information for the management CPU 112 to identify the type of signal input to the twelfth buffer 122l. The thirteenth correspondence area 123m stores information indicating that it is blank and does not correspond to any of the types of signals input to the thirteenth buffer 122m, as information for the management CPU 112 to identify the type of signal input to the fourteenth buffer 122n. The fourteenth correspondence area 123n stores information indicating that it is blank and does not correspond to any of the types of signals input to the fourteenth buffer 122n, as information for the management CPU 112 to identify the type of signal input to the fourteenth buffer 122n.

As described above, the configuration is such that the management CPU 112 specifies what kind of signals are input to the first to fourteenth buffers 122a to 122n by receiving instructions from the main CPU 63. , it becomes possible to use the management IC 66 for a model different from the present pachinko machine 10. This makes it possible to increase the versatility of the management IC 66.

Furthermore, instead of outputting information for recognizing the type of signal each time a signal corresponding to storage of history information is output to the first to fourteenth buffers 122a to 122n, the type of signal is recognized in advance. In addition, information for the management CPU 112 to specify the types of signals input to the first to fourteenth buffers 122a to 122n based on the output information is stored in the correspondence memory 116. The configuration is as follows. As a result, compared to a configuration in which information for recognizing the type of signal is output each time a signal corresponding to storage of history information is output to the first to fourteenth buffers 122a to 122n, the main It becomes possible to suppress the amount of information output from the side CPU 63 to the management side CPU 112.

Additionally, the management CPU 112 outputs information for specifying the types of signals input to the first to fourteenth buffers 122a to 122n when supply of operating power is started. As a result, when a game is started on the pachinko machine 10, the management CPU 112 can specify the types of signals input to the first to fourteenth buffers 122a to 122n.

Further, information setting that a setting value update signal is input to the fifteenth buffer 122o and information setting that an output instruction signal is input to the sixteenth buffer 122p is performed at the design stage of the management IC 66. As a result, the 15th buffer 122o and the 16th buffer 122p can reliably use the setting value update signal and the output instruction signal not only in this pachinko machine 10 but also in other pachinko machines that use the management IC 66. It becomes possible to omit the process for specifying the type of signal input to the input signal. Therefore, it is possible to reduce the processing load of processing for identifying the type of signal.

Next, the history memory 117 of the management IC 66 will be explained. FIG. 21 is an explanatory diagram for explaining the configuration of the history memory 117.

The history memory 117 is provided with a history area 124 for sequentially storing history information. In the history area 124, a plurality of pieces of pointer information are set in serial numbers, and a history information storage area 125 is set in one-to-one correspondence with each piece of pointer information. The history information storage area 125 can store combinations of RTC information and correspondence information. In this case, each history information storage area 125 has a data capacity of 2 bytes, a 1 byte data capacity is allocated as an area for storing RTC information, and an area for storing correspondence information. A data capacity of 1 byte is allocated. When it becomes necessary to store correspondence information according to the signals input to the first to fourteenth buffers 122a to 122n (actually, in the case of this pachinko machine 10, the first to eleventh buffers 122a to 122k) First, the date and time information measured by the current RTC 115 is stored in the area for storing RTC information in the history information storage area 125 corresponding to the pointer information currently being written. After that, the correspondence information corresponding to the buffers 122a to 122n that triggered the current information storage is read from the correspondence areas 123a to 123n corresponding to the buffers 122a to 122n in the correspondence memory 116, and the read correspondence information is is stored in the area for storing correspondence information of the history information storage area 125 corresponding to the pointer information currently being written.

Specifically, the correspondence information stored in the history information storage area 125 is stored in the first to seventh buffers 122a to 122g, as already explained, because signals corresponding to the detection results of the ball entry detection sensors 42a to 48a are input to the first to seventh correspondence areas 123a to 123g in the correspondence memory 116. More specifically, information corresponding to the type of ball entry section corresponding to each of the ball entry detection sensors 42a to 48a is stored in the first to seventh correspondence areas 123a to 123g. As already explained, in this pachinko machine 10, the first to third winning hole detection sensors 42a to 44a all detect game balls that have entered the general winning hole 31, so the first to third correspondence areas 123a to 123c corresponding to these first to third winning hole detection sensors 42a to 44a all store information indicating that it is the general winning hole 31. In addition, the fourth correspondence area 123d stores information indicating that it is the special electric winning device 32, the fifth correspondence area 123e stores information indicating that it is the first operating port 33, the sixth correspondence area 123f stores information indicating that it is the second operating port 34, and the seventh correspondence area 123g stores information indicating that it is the outlet 24a. If the buffer 122a-122n that triggered the current information storage is any of the first to seventh buffers 122a-122g, information on the type of ball entry part corresponding to that buffer 122a-122g is read from any of the first to seventh correspondence areas 123a-123g, and the read information on the type of ball entry part is stored as is in the area for storing correspondence information in the history information storage area 125.

Meanwhile, the eighth buffer 122h receives a signal indicating whether or not it is in the open/close execution mode, the ninth buffer 122i receives a signal indicating whether or not it is in the high frequency support mode, the tenth buffer 122j receives a signal indicating whether or not the front door frame 14 is open, and the eleventh buffer 122k receives a signal indicating whether or not a game round has started. Therefore, the eighth correspondence area 123h stores information indicating the open/close execution mode, the ninth correspondence area 123i stores information indicating the high frequency support mode, the tenth correspondence area 123j stores information indicating the front door frame 14, and the eleventh correspondence area 123k stores information indicating a game round.

As already explained, the main CPU 63 continues to output the 8th signal at a LOW level when the open/close execution mode is not in effect, and continues to output the 8th signal at a HI level when the open/close execution mode is in effect. Therefore, the management CPU 112 can determine that the open/close execution mode has started when the 8th signal changes from a LOW level to a HI level, and that the open/close execution mode has ended when the 8th signal changes from a HI level to a LOW level. In addition, in both cases where the 8th signal changes from a LOW level to a HI level, and where the 8th signal changes from a HI level to a LOW level, the management CPU 112 determines that an opportunity to store the correspondence information in the history information storage area 125 has occurred. In other words, when the 8th signal changes from a LOW level to a HI level, not only the information indicating the open/close execution mode read from the 8th correspondence area 123h but also the start information are stored in the area for storing the correspondence information in the history information storage area 125. In addition, when the eighth signal changes from a high level to a low level, not only the information indicating the opening/closing execution mode read from the eighth correspondence area 123h but also the end information are stored in an area for storing correspondence information in the history information storage area 125.

As already explained, the main CPU 63 continues to output the ninth signal at a LOW level when the high-frequency support mode is not in effect, and continues to output the ninth signal at a HI level when the high-frequency support mode is in effect. Therefore, the management CPU 112 can determine that the high-frequency support mode has started when the ninth signal changes from a LOW level to a HI level, and that the high-frequency support mode has ended when the ninth signal changes from a HI level to a LOW level. In either case of the ninth signal changing from a LOW level to a HI level, or the HI level to a LOW level, the management CPU 112 determines that an opportunity to store the correspondence information in the history information storage area 125 has occurred. In other words, when the ninth signal changes from a LOW level to a HI level, not only the information indicating the high-frequency support mode read from the ninth correspondence area 123i but also the start information are stored in the area for storing the correspondence information in the history information storage area 125. In addition, when the ninth signal changes from a high level to a low level, not only the information indicating the high frequency support mode read from the ninth correspondence area 123i but also the end information are stored in an area for storing correspondence information in the history information storage area 125.

As already explained, the main CPU 63 continuously outputs the LOW level tenth signal when the front door frame 14 is closed, and continuously outputs the HI level tenth signal when the front door frame 14 is open. Therefore, the management CPU 112 can determine that the front door frame 14 is open when the tenth signal changes from LOW to HI, and that the front door frame 14 is closed when the tenth signal changes from HI to LOW. In either case, when the tenth signal changes from LOW to HI, or from HI to LOW, the management CPU 112 determines that an opportunity to store the correspondence information in the history information storage area 125 has occurred. In other words, when the tenth signal changes from LOW to HI, not only the information indicating that it is the front door frame 14 read from the tenth correspondence area 123j but also the opening start information are stored in the area for storing the correspondence information in the history information storage area 125. In addition, when the 10th signal changes from HI to LOW level, not only the information indicating that it is the front door frame 14 read from the 10th correspondence area 123j but also the opening completion information are stored in an area for storing correspondence information in the history information storage area 125.

As already explained, the main CPU 63 continuously outputs the 11th signal at LOW level until the start timing of the game round, and when the start timing of the game round comes, the 11th signal at HI level continues for a specific period. Output a signal. Therefore, the management side CPU 112 specifies that a game round has started when the eleventh signal changes from LOW level to HI level. In other words, when the 11th signal changes from LOW level to HI level, information indicating that it is a game time read from the 11th correspondence area 123k is stored in the correspondence relationship information of the history information storage area 125. Store it in the area.

The history information storage area 125 is provided for a sufficient number of times to store all the history information generated during ten consecutive business days during which the pachinko machine 10 continues to fire game balls from opening to closing. For example, if history information is generated 60,000 times a day, more than 600,000 history information storage areas 125 are provided. This makes it possible to store and hold all history information in the history memory 117 for at least ten days.

The history memory 117 is provided with a pointer area 126 in addition to the history area 124. The pointer area 126 stores information for the management CPU 112 to identify the pointer information currently being written in the history memory 117. Specifically, at the time of shipping the pachinko machine 10, information is set in the pointer area 126 specifying pointer information of "0" as the writing target. Then, every time a piece of history information is newly stored in the history information storage area 125, the information in the pointer area 126 is updated so that the value of the pointer information to be written is incremented by 1. When the last pointer information is the writing target and history information is stored in the history information storage area 125 corresponding to the last pointer information, the information in the pointer area 126 is updated so that the pointer information of "0" is the writing target. As a result, when a storage trigger occurs that exceeds the number of history information that can be stored, the history information is overwritten with new history information in order starting from the history information storage area 125 in which the oldest history information is stored.

In addition, when an external device reads history information from the history memory 117, the history information storage area 125 is cleared to all "0"s, and the information in the pointer area 126 is updated so that pointer information of "0" becomes the write target. This makes it possible to prevent history information that has once been read from becoming the target for reading again.

Next, a specific processing configuration for managing game history using the management IC 66 will be described. First, a processing configuration for storing information on the correspondence between the first to fourteenth buffers 122a to 122n provided in the input port 121 of the management I/F 111 and the signal types in the correspondence memory 116 will be described. Figure 22 is a flowchart showing the recognition processing executed by the main CPU 63. Note that the recognition processing is executed in step S111 in the main processing (Figure 9).

First, a recognition output counter provided in the main RAM 65 is set to "14" (step S801). The recognition output counter is the remaining information output for making the management CPU 112 recognize which type of signal the first to fourteenth buffers 122a to 122n of the input port 121 in the management side I/F 111 correspond to. This counter is used by the main CPU 63 to specify the required number of times. As already explained, since the 14 first to 14th buffers 122a to 122n are the targets of signal type recognition, "14" is set in the recognition output counter.

Then, the output process of the identification start command is executed (step S802). The main CPU 63 outputs various commands to the management CPU 112 to make the management CPU 112 recognize which type of signal the first to fourteenth buffers 122a to 122n correspond to. When outputting this command, the first to eighth signals input to the first to eighth buffers 122a to 122h are used. In other words, the first to eighth signals (i.e., the first to eighth signal paths 118a to 118h) used to instruct the management CPU 112 to store history information are used to output a command to make the management CPU 112 recognize which type of signal the first to fourteenth buffers 122a to 122n correspond to. This makes it possible to reduce the number of signal paths and simplify the configuration compared to a configuration in which the signal path for outputting the command is provided separately from the signal paths 118a to 118p for outputting signals to the first to sixteenth buffers 122a to 122p. The identification start command has a data capacity of 8 bits, and each bit of data is input to the first to eighth buffers 122a to 122h as the first to eighth signals, respectively. In addition, in the output process of the identification start command, the output state of the ninth signal is switched to HI level at the timing when the output of the identification start command is started so that the management CPU 112 recognizes that a new command has been sent. In addition, the output period of the identification start command and the period during which the output state of the ninth signal is maintained at HI level are set to a period sufficient for the management CPU 112 to recognize the identification start command and the output state of the ninth signal. By receiving the identification start command, the management CPU 112 specifies that it should start processing to store information on the correspondence between the first to fourteenth buffers 122a to 122n and the signal types in the correspondence memory 116.

Then, a type identification command corresponding to the current value of the recognition output counter in the main RAM 65 is read from the main ROM 64 (step S803). In this case, the first buffer 122a is the first to be set as the signal type, and then the n+1 buffer is set as the signal type after the n buffer, so that the signal type recognition setting corresponding to the first to fourteenth buffers 122a to 122n is performed. Therefore, if the recognition output counter is "14" to "12", a type identification command indicating that it is the general winning port 31 and the number of prize balls is read, if the recognition output counter is "11", a type identification command indicating that it is the special winning device 32 and the number of prize balls is read, if the recognition output counter is "10", a type identification command indicating that it is the first operating port 33 and the number of prize balls is read, if the recognition output counter is "9", a type identification command indicating that it is the second operating port 34 and the number of prize balls is read, if the recognition output counter is "8", an out port 2 is set as the signal type recognition setting. If the recognition output counter is "7", it reads a type identification command indicating that it is in the open/close execution mode; if the recognition output counter is "6", it reads a type identification command indicating that it is in the high frequency support mode; if the recognition output counter is "5", it reads a type identification command indicating that it is the front door frame 14; if the recognition output counter is "4", it reads a type identification command indicating that it is a play count; if the recognition output counter is "3" to "1", it reads a type identification command indicating that it is blank.

Then, the output process of the read type identification command is executed (step S804). The type identification command has a data capacity of 8 bits, like the identification start command, and each bit of data is input to the first to eighth buffers 122a to 122h as the first to eighth signals, respectively. In addition, in the output process of the identification type command, the output state of the ninth signal is switched to HI level at the timing when the output of the identification type command is started so that the management CPU 112 recognizes that a new command has been sent. In addition, the output period of the identification type command and the period during which the output state of the ninth signal is maintained at HI level are set to a period sufficient for the management CPU 112 to recognize the output state of these identification type command and the ninth signal. By receiving the identification type command, the management CPU 112 stores information corresponding to the identification type command in the correspondence area 123a to 123n corresponding to the buffer that is the current setting target among the first to fourteenth buffers 122a to 122n.

Thereafter, the value of the recognition output counter in the main side RAM 65 is subtracted by 1 (step S805), and it is determined whether the value of the recognition output counter after the 1 subtraction is "0" (step S806). If the value of the recognition output counter is 1 or more (step S806: NO), a process for outputting a type identification command corresponding to the value of the recognition output counter after being subtracted by 1 is executed (steps S803 and Step S804).

On the other hand, if the value of the recognition output counter is "0" (step S806: YES), output processing of the recognition end command is executed (step S807). The recognition end command has a data capacity of 8 bits, and each bit of data is input to the first to eighth buffers 122a to 122h as the first to eighth signals, respectively. In addition, in the recognition end command output processing, the output state of the ninth signal is switched to HI level at the timing when the recognition end command output is started in order to make the management side CPU 112 recognize that a new command has been sent. In addition, the output period of the recognition end command and the period during which the output state of the ninth signal is maintained at HI level are set to a period sufficient for the management side CPU 112 to recognize the recognition end command and the output state of the ninth signal. By receiving the recognition end command, the management side CPU 112 determines that the process for storing the information on the correspondence between the first to fourteenth buffers 122a to 122n and the signal type in the correspondence memory 116 has been completed.

Next, the management process executed by the management CPU 112 will be described with reference to the flowchart in FIG. 23. The management process is started when the supply of operating power to the management CPU 112 is started. The processing speed of the management CPU 112 is configured to be faster than the processing speed of the main CPU 63, and the combination of processes from step S908 onwards in the management process is executed 16 or more times from the start of one timer interrupt process (FIG. 11) in the main CPU 63 until the start of the next timer interrupt process (FIG. 11).

First, it is determined whether an identification start command has been received from the main CPU 63 (step S901). If the identification start command has not been received (step S901: NO), the process returns to step S901 after executing the setting update recognition process (step S902). In the setting update recognition process, the details will be described later, but when the main CPU 63 performs a new setting of the setting state of the pachinko machine 10, a corresponding process is executed.

When the identification start command is received from the main CPU 63 (step S901: YES), the value of the setting target counter provided in the management side RAM 114 is cleared to "0" (step S903). The setting target counter is a counter used by the management CPU 112 to specify the types of the buffers 122a to 122n whose signal types are to be set. The first buffer 122a is the signal type setting target first, and thereafter the signal type is set to the nth buffer and then the (n+1)th buffer.

After that, on the condition that a type identification command has been received from the main CPU 63 (step S904: YES), a correspondence setting process is executed (step S905). In the correspondence setting process, information on the signal type set in the currently received type identification command is stored in the correspondence area corresponding to the current value of the setting target counter in the management RAM 114, among the first to fourteenth correspondence areas 123a to 123n of the correspondence memory 116. Then, the value of the setting target counter in the management RAM 114 is incremented by 1 (step S906).

If a negative judgment is made in step S904, or if the processing of step S906 is executed, it is judged whether or not an identification end command has been received from the main CPU 63 (step S907). If an identification end command has not been received (step S907: NO), the process returns to step S904, and the processing of steps S905 and S906 is executed again on the condition that a new type identification command is received from the main CPU 63 (step S904: YES).

If an identification end command has been received from the main CPU 63 (step S907: YES), the processes of steps S908 to S910 are repeatedly executed. In step S908, details will be described later, a history setting process is executed to store history information corresponding to the type of signal received from the main CPU 63 in the history memory 117. In step S909, details will be described later, various parameters are calculated using the history information stored in the history memory 117, and a display output process is executed to notify the first to third notification display devices 69a to 69c of the calculation results. In step S910, details will be described later, an external output process is executed to output the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to the reading terminal 68d.

FIG. 24 is a time chart showing how information on the correspondence between the first to fourteenth buffers 122a to 122n and the types of signals input to these buffers 122a to 122n is stored in the correspondence memory 116. FIG. 24(a) shows a period during which commands are output from the main CPU 63 to the management CPU 112 using the first to eighth signals (that is, the first to eighth signal paths 118a to 118h). b) shows the period in which the output state of the ninth signal is at HI level, and FIG. 24(d) shows the execution period of the identification state in which the process for identifying the correspondence is executed, and FIG. 24(d) shows the timing at which the correspondence setting process (step S905) is executed by the management CPU 112.

When the supply of operating power to the main CPU 63 and the management CPU 112 is started, the output of the identification start command using the first to eighth signals is started at the timing of t1 as shown in FIG. 24(a). Also, at the timing of t1, the output state of the ninth signal is changed from LOW level to HI level as shown in FIG. 24(b). Then, at the timing of t2, when the output of the identification start command is continuing, the output state of the ninth signal is changed from HI level to LOW level as shown in FIG. 24(b). The management CPU 112 identifies that a command has been sent from the main CPU 63 by confirming that the output state of the ninth signal has been changed from HI level to LOW level, and grasps the contents of the command received from the main CPU 63 by confirming the information of the first to eighth buffers 122a to 122h. In this case, since the identification start command has been received, the management CPU 112 enters the identification state by making a positive determination at step S901 of the management process (FIG. 23). After that, at timing t3, the output of the identification start command is stopped as shown in FIG. 24(a).

After that, at the timing of t4, the output of the first type identification command using the first to eighth signals is started as shown in FIG. 24(a). Also, at the timing of t4, the output state of the ninth signal is changed from LOW level to HI level as shown in FIG. 24(b). After that, at the timing of t5, when the output of the type identification command is continuing, the output state of the ninth signal is changed from HI level to LOW level as shown in FIG. 24(b). The control side CPU 112 identifies that a command has been sent from the main side CPU 63 by confirming that the output state of the ninth signal has been changed from HI level to LOW level, and grasps the contents of the command received from the main side CPU 63 by confirming the information of the first to eighth buffers 122a to 122h. In this case, since the first type identification command has been received, the control side CPU 112 executes the correspondence setting process as shown in FIG. 24(d) at the timing of t5. In this correspondence setting process, information indicating that it is a general winning port 31 and information on the number of winning balls are stored in the first correspondence area 123a of the correspondence memory 116. After that, at timing t6, the output of the type identification command is stopped as shown in FIG. 24(a).

After that, from t7 to t9, from t10 to t12, from t13 to t15, and from t16 to t18, the management CPU 112 executes the correspondence setting process corresponding to the type identification command output from the master CPU 63, similar to the process from t4 to t6. In this case, the correspondence setting process corresponding to the 14th type identification command is completed from t16 to t18.

Thereafter, at timing t19, output of the identification end command using the first to eighth signals is started as shown in FIG. 24(a). Further, at the timing t19, the output state of the ninth signal is changed from the LOW level to the HI level as shown in FIG. 24(b). Thereafter, at timing t20 when the identification end command continues to be output, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. 24(b). The management side CPU 112 identifies that the command has been sent from the main side CPU 63 by confirming that the output state of the ninth signal has changed from the HI level to the LOW level, and updates the first to eighth buffers 122a to 122h. By checking the information, the content of the command received from the main CPU 63 can be grasped. In this case, since the identification end command has been received, the identification state of the management CPU 112 ends at timing t20 as shown in FIG. 24(c). Thereafter, at timing t21, the output of the identification end command is stopped as shown in FIG. 24(a).

As described above, by using the ninth signal to make the management CPU 112 recognize whether or not a command is being output, it is possible to instruct the management CPU 112 as to when to store history information. Even in a configuration where command output is performed using the first to eighth signals (that is, the first to eighth signal paths), it is clearly made clear to the management CPU 112 that the command is being output. It becomes possible to make it recognized.

Next, a processing configuration for storing history information in the history memory 117 will be described. FIG. 25 is a flowchart showing management output processing executed by the main CPU 63. Note that the management output process is executed in step S319 in the timer interrupt process (FIG. 11).

First, the managed object counter provided in the main RAM 65 is set to "11" (step S1001). The managed object counter is a counter for the main CPU 63 to determine whether there is a managed object that has not been specified as a target for whether or not the signal output state to the management CPU 112 should be changed in the current management output process, and for which managed object the signal output state to the management CPU 112 should be changed. In one management output process, the managed objects for which the main CPU 63 specifies whether or not the signal output state to the management CPU 112 should be changed are the seven ball entry detection sensors 42a to 48a, whether or not the opening and closing execution mode is being executed, whether or not the high frequency support mode is being executed, whether or not the front door frame 14 is being opened and closed, and whether or not a game round has started, for a total of 11 objects. Therefore, the managed object counter is initially set to "11".

Then, it is determined whether the signal output state to the management side CPU 112 for the managed object corresponding to the current value of the managed object counter is at HI level (step S1002). If it is not at HI level (step S1002: NO), it is determined whether the value of the managed object counter is 5 or more, thereby identifying which of the seven ball entry detection sensors 42a to 48a is the managed object corresponding to the value of the managed object counter (step S1003).

If an affirmative determination is made in step S1003, it is determined whether the output flag of the main side RAM 65 corresponding to the value of the managed counter is set to "1" (step S1004). Specifically, when the value of the managed counter is "11" and corresponds to the first winning opening detection sensor 42a, it is determined whether the first output flag is set to "1", If the value of the counter to be managed is "10" and corresponds to the second winning opening detection sensor 43a, it is determined whether the second output flag is set to "1", and the value of the counter to be managed is determined. is "9" and corresponds to the third winning a prize opening detection sensor 44a, it is determined whether or not the third output flag is set to "1", and the value of the managed counter is "8". Yes, if it corresponds to the special electric detection sensor 45a, it is determined whether the fourth output flag is set to "1", and if the value of the managed counter is "7", the first operating port detection sensor 46a is determined. If it is compatible with the second operating port detection sensor 47a, it is determined whether the fifth output flag is set to "1" or not, and the value of the managed counter is "6", which corresponds to the second operating port detection sensor 47a. In this case, it is determined whether or not the sixth output flag is set to "1", and if the value of the managed counter is "5" and corresponds to the output port 24a, the seventh output flag is set to "1". 1" is set. As already explained, these first to seventh output flags are set to "1" in the ball entry detection process (FIG. 15).

If the output flag corresponding to the value of the counter to be managed is set to "1" (step S1004: YES), the output state of the signal corresponding to the value of the counter to be managed among the first to seventh signals is set to HI level. (step S1005). Thereafter, the output flag corresponding to the value of the managed counter is cleared to "0" (step S1006).

If a negative determination is made in step S1003, it is determined whether an opportunity to switch the output state of the signal corresponding to the value of the managed counter to the HI level has occurred (step S1007). Specifically, if the value of the managed counter is "4", it is determined whether a transition to the opening/closing execution mode has occurred, and if the value of the managed counter is "3", the high It is determined whether a transition to the frequency support mode has occurred, and if the value of the managed counter is "2", it is determined whether the front door frame 14 has become open, and the managed counter is If the value is "1", it is determined whether the game round has started by determining whether or not the eleventh output flag is set to "1". If an affirmative determination is made in step S1007, the output state of the signal corresponding to the value of the managed counter is set to HI level (step S1008). Note that when the process of step S1008 is executed when the value of the managed counter is "1", the eleventh output flag is cleared to "0".

If an affirmative determination is made in step S1002, it is determined whether an opportunity has occurred to switch the output state of the signal corresponding to the value of the managed counter to the LOW level (step S1009). Specifically, if the value of the management target counter is 5 or more or "1" and the current management target is any of the ball entry detection sensors 42a to 48a or the start of a game round, the first to seventh signals and determines whether a HI output continuation period (specifically 10 milliseconds) has elapsed since the output state of the signal corresponding to the value of the managed counter among the 11th signals was switched from the LOW level to the HI level. . This HI output continuation period is set to a period longer than the longest processing interval of the history setting process (step S908) of the management process (FIG. 23) in the management side CPU 112, and the output of the signal that has switched from the LOW level to the HI level. This is a period during which the management CPU 112 can reliably identify the state. In addition, if the value of the managed target counter is "4" and the current managed target is in the open/close execution mode, it is determined whether the open/close execution mode has ended, and if the value of the managed target counter is "3" and the current managed target is in the open/close execution mode. If the current management target is the high-frequency support mode, it is determined whether the high-frequency support mode has ended or not, and the value of the management target counter is "2" and the current management target is the front door frame 14. If so, it is determined whether the front door frame 14 is in a closed state. If an opportunity to switch the output state of the signal corresponding to the value of the managed counter to the LOW level has occurred (step S1009: YES), the output state of the signal corresponding to the value of the managed counter is set to the LOW level ( Step S1010).

If a negative judgment is made in step S1004, if the processing of step S1006 is executed, if a negative judgment is made in step S1007, if the processing of step S1008 is executed, if a negative judgment is made in step S1009, or if the processing of step S1010 is executed, the value of the managed object counter in the main RAM 65 is decremented by 1 (step S1011). Then, it is determined whether the value of the managed object counter after the decrement is "0" (step S1012). If the value of the managed object counter is 1 or greater (step S1012: NO), the processing from step S1002 onwards is executed for the managed object corresponding to the new managed object counter value.

Next, the history setting process executed by the management CPU 112 will be described with reference to the flowchart of FIG. 26. The history setting process is executed in step S908 of the management process (FIG. 23).

First, the number of buffers to be checked by the management CPU 112 among the first to fourteenth buffers 122a to 122n is set in a check target counter provided in the management RAM 114 (step S1101). Specifically, among the first to fourteenth correspondence areas 123a to 123n in the correspondence memory 116, the number of correspondence areas in which information other than information indicating blankness is stored is identified, and the number of correspondence areas is identified. Set the information of the number in the confirmation target counter. In this pachinko machine 10, as already explained, information other than the information indicating blankness is stored in the first to eleventh correspondence areas 123a to 123k, so in step S1101, the counter to be checked is set to "11". do.

Then, by checking whether the numerical information stored in the buffer corresponding to the current value of the counter to be checked among the first to fourteenth buffers 122a to 122n has changed from "0" to "1", it is determined whether the output state of the input signal from the main CPU 63 to that buffer has been switched from LOW level to HIGH level (step S1102). Note that when the value of the counter to be checked is "n", the nth buffers 122a to 122n are the targets for checking the numerical information. For example, if the value of the counter to be checked is "11", the eleventh buffer 122k is the target for checking the numerical information, and if the value of the counter to be checked is "5", the fifth buffer 122e is the target for checking the numerical information.

If an affirmative determination is made in step S1102, RTC information, which is date information and time information, is read from the RTC 115 (step S1103). Then, writing processing to the history memory 117 is executed (step S1104). In the writing process, the pointer information of the history area 124 that is currently the writing target is identified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the writing target is specified. The RTC information read in step S1103 is written in the history information storage area 125 of the history area 124. Further, the correspondence information is read from the correspondence areas 123a to 123n corresponding to the current check target counter value, and written into the history information storage area 125 corresponding to the pointer information to be written. Furthermore, if the correspondence relationship information is any of the information indicating that the opening/closing execution mode is in effect, the information indicating that it is in high-frequency support mode, and the information indicating that it is the front door frame 14, the above-mentioned Not only correspondence information but also start information is written in the history information storage area 125 corresponding to the pointer information to be written. Note that when the value of the confirmation target counter is "n", the n-th correspondence areas 123a to 123n are the targets for reading the correspondence information. For example, if the value of the counter to be checked is "11", the 11th correspondence area 123k becomes the correspondence relation information read target, and if the value of the counter to be checked is "5", the fifth correspondence area 123e is the correspondence relation. The information is to be read.

By executing the writing process as described above, the value of the counter to be checked is set to one of the out opening 24a, the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the game round. In this case, the history information storage area 125 corresponding to the pointer information to be written contains the RTC information, the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 33. The combination of the operating port 34 and the correspondence information indicating that it is one of the game times is stored as history information. In addition, if the value of the counter to be checked is one of the opening/closing execution mode, high-frequency support mode, and front door frame 14, RTC information is stored in the history information storage area 125 corresponding to the pointer information to be written. A combination of the start information and the correspondence information indicating that the mode is one of the opening/closing execution mode, the high-frequency support mode, and the front door frame 14 is stored as history information.

After that, the target pointer is updated (step S1105). In this update, the numerical information stored in the pointer area 126 of the history memory 117 is read and incremented by one. It is determined whether the pointer information after the increment of one has exceeded the maximum value of the pointer information in the history area 124. If the maximum value has not been exceeded, the pointer information after the increment of one is overwritten in the pointer area 126 as the new pointer information to be written. If the maximum value has been exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

If a negative judgment is made in step S1102, or if the processing of step S1105 is executed, it is judged whether or not the correspondence information for checking whether the signal output has been switched to a LOW level is stored in the correspondence area 123a to 123n corresponding to the current value of the counter to be checked (step S1106). Specifically, if the current value of the counter to be checked is "8" to "10", the corresponding correspondence area 123h to 123j stores any of information indicating the opening/closing execution mode, information indicating the high frequency support mode, and information indicating the front door frame 14, so a positive judgment is made in step S1106.

If an affirmative determination is made in step S1106, the numerical information stored in the buffer corresponding to the current check target counter value among the first to fourteenth buffers 122a to 122n is changed from "1" to "0". By checking whether the input signal from the main CPU 63 has been input to the buffer, it is determined whether the output state of the input signal from the main CPU 63 to the buffer has been switched from the HI level to the LOW level (step S1107). If an affirmative determination is made in step S1107, the RTC information is read out in the same manner as in step S1103 (step S1108), and the writing process to the history memory 117 is further executed (step S1109). In the writing process, the RTC information read in step S1108 is written in the history information storage area 125 of the history area 124 corresponding to the pointer information to be written. Further, the correspondence information is read from the correspondence areas 123a to 123n corresponding to the current check target counter value, and written into the history information storage area 125 corresponding to the pointer information to be written. Furthermore, not only the correspondence information but also the end information is written in the history information storage area 125 corresponding to the pointer information to be written. By executing the writing process in this way, if the value of the counter to be checked is in the opening/closing execution mode, high-frequency support mode, or front door frame 14, it corresponds to the pointer information to be written. A combination of RTC information, correspondence information indicating that the mode is one of opening/closing execution mode, high-frequency support mode, and front door frame 14, and termination information is stored as history information in the history information storage area 125. The state will be as follows. Thereafter, the target pointer update process is executed in the same manner as step S1105 (step S1110).

If a negative determination is made in step S1106, if a negative determination is made in step S1107, or if the process of step S1110 is executed, the value of the confirmation target counter in the management side RAM 114 is subtracted by 1 (step S1111). Then, it is determined whether the value of the check target counter after subtraction by 1 is "0" (step S1112). If the value of the check target counter is 1 or more (step S1112: NO), the process from step S1102 onward is executed for the check target corresponding to the new check target counter value.

Next, the manner in which history information is stored in the history memory 117 will be described with reference to the time chart of FIG. 27. 27(a) shows a period in which a HI level signal is input to any of the first to seventh and eleventh buffers 122a to 122g, 122k, and FIG. 27(b) shows a period when a HI level signal is input to the eighth buffer 122h. 27(c) shows a period when a HI level signal is input to the ninth buffer 122i, and FIG. 27(d) shows a period when a HI level signal is input to the tenth buffer 122j. FIG. 27E shows the timing of writing history information into the history memory 117.

At the timing of t1, the output state of the signal input to any one of the first to seventh and eleventh buffers 122a to 122g, 122k is switched from LOW to HIGH as shown in FIG. 27(a). Therefore, at the timing of t1, history information is written to the history memory 117 as shown in FIG. 27(e). After that, at the timing of t2, the signal that was switched to HIGH at the timing of t1 is switched to LOW as shown in FIG. 27(a). However, since the signal is input to any one of the first to seventh and eleventh buffers 122a to 122g, 122k and the switching to LOW is not a target for storing history information, writing of history information is not executed at the timing of t2 as shown in FIG. 27(e).

After that, at times t3, t5, t6, t9, t10, t13, and t14, the output state of the signal input to any of the first to seventh and eleventh buffers 122a to 122g, 122k is switched from LOW level to HIGH level, as shown in FIG. 27(a). Therefore, at each of these times, history information is written, as shown in FIG. 27(e).

As shown in FIG. 27(b), the output state of the signal input to the eighth buffer 122h is at HI level from t4 to t7. This eighth buffer 122h corresponds to the occurrence or non-occurrence of the open/close execution mode. Therefore, as shown in FIG. 27(e), history information is written at t4, when the output state of the signal input to the eighth buffer 122h switches to HI level, and at t7, when the output state of the signal switches to LOW level. In this case, the history information written at t4 includes start information, and the history information written at t7 includes end information. This makes it possible to ascertain the execution period of the open/close execution mode by checking the history information in the history memory 117.

Furthermore, history information is written into the history memory 117 in the order of time. Therefore, whether the history information indicating that a ball has entered any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is in the opening/closing execution mode. It becomes possible to distinguish whether or not. In addition, since the history information includes RTC information, by comparing the RTC information, it is possible to determine which of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. It becomes possible to distinguish whether or not the history information indicating that the ball has entered the ball is in the opening/closing execution mode.

As shown in FIG. 27(c), the output state of the signal input to the ninth buffer 122i is at the HI level from timing t8 to timing t11. This ninth buffer 122i corresponds to whether or not the high-frequency support mode occurs. Therefore, as shown in FIG. 27(e), the timing t8 is the timing at which the output state of the signal input to the ninth buffer 122i switches to the HI level, and the timing at which the output state of the signal changes to the LOW level. History information is written at each timing t11. In this case, the history information written at timing t8 includes start information, and the history information written at timing t11 includes end information. Thereby, by checking the history information in the history memory 117, it becomes possible to grasp the execution period of the high-frequency support mode.

Furthermore, history information is written in the history memory 117 in the order of time. Therefore, the history information indicating that a ball has entered any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is also included in the high-frequency support mode. It becomes possible to distinguish whether or not. In addition, since the history information includes RTC information, by comparing the RTC information, it is possible to determine which of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. It becomes possible to distinguish whether or not the history information indicating that the ball has hit the field is in the high-frequency support mode.

As shown in FIG. 27(d), the output state of the signal input to the tenth buffer 122j is at HI level from t12 to t15. This tenth buffer 122j corresponds to whether the front door frame 14 is open or not. Therefore, as shown in FIG. 27(e), history information is written at t12, when the output state of the signal input to the tenth buffer 122j switches to HI level, and at t15, when the output state of the signal switches to LOW level. In this case, the history information written at t12 includes start information, and the history information written at t15 includes end information. This makes it possible to know the period during which the front door frame 14 is open by checking the history information in the history memory 117.

In addition, the history information is written in chronological order to the history memory 117. Therefore, it is possible to distinguish whether the history information indicating that a ball has entered any of the outlet 24a, the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34 was recorded while the front door frame 14 was open. In addition, since the history information includes RTC information, it is also possible to distinguish whether the history information indicating that a ball has entered any of the outlet 24a, the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34 was recorded while the front door frame 14 was open by comparing the RTC information.

Next, a process for outputting a setting value update signal that is executed when the setting state of the pachinko machine 10 is set by the main CPU 63 will be described. FIG. 28 is a flowchart showing the output process of the setting value update signal executed by the main CPU 63. Note that the output process of the setting value update signal is executed in step S119 in the main process (FIG. 9).

A value corresponding to the currently set value of the pachinko machine 10 is set in the pulse number counter provided in the main RAM 65 (step S1201). Specifically, the value of the setting value counter in the main RAM 65 is set in the pulse number counter. Then, it is determined whether the setting value update signal directed to the management CPU 112 is at HI level (step S1202). As already explained, the setting value update signal is input to the 15th buffer 122o of the input port 121 in the management IC 66. Here, the output process of the setting value update signal is executed at a timing prior to the recognition process, which is a process for making the management CPU 112 identify the type of signal input to the 1st to 14th buffers 122a to 122n of the input port 121 in the main process (FIG. 9). In contrast, since the setting value update signal is set in the management IC 66 during the design stage of the pachinko machine 10 to be input to the 15th buffer 122o, even if the setting value update signal output process is executed before the recognition process, it is possible for the management CPU 112 to identify that the signal input to the 15th buffer 122o is a setting value update signal.

If the result of step S1202 is negative, the value of the LOW level counter provided in the main RAM 65 is decremented by 1 (step S1203), and it is determined whether the value of the LOW level counter after decrement is "0" (step S1204). The LOW level counter is a counter that allows the main CPU 63 to determine whether the set value update signal has been maintained at a LOW level for a predetermined period while multiple pulses that make the set value update signal a HI level are output. If the value of the LOW level counter is "0" (step S1204: YES), this means that it is time to set the set value update signal to a HI level, so the set value update signal is set to a HI level (step S1205).

Thereafter, "20" is set in the HI level counter provided in the main side RAM 65 (step S1206). The HI level counter is a counter used by the main CPU 63 to specify the period during which the set value update signal is maintained at the HI level. Since the value set in the HI level counter is subtracted by 1 at a cycle of approximately 10 microseconds, the set value update signal is maintained at the HI level for 200 microseconds when one pulse is output. This HI level maintenance period is a period sufficient for the management side CPU 112 to identify that the setting value update signal has been changed from the LOW level to the HI level.

If the set value update signal is at the HI level (step S1202: YES), the value of the HI level counter in the main side RAM 65 is subtracted by 1 (step S1207), and the value of the HI level counter after the 1 subtraction is "0". It is determined whether or not (step S1208). If the value of the HI level counter is "0" (step S1208: YES), it means that it is time to set the set value update signal to the LOW level, so the set value update signal is set to the LOW level. settings (step S1209).

Thereafter, the value of the pulse number counter in the main side RAM 65 is subtracted by 1 (step S1210), and it is determined whether the value of the pulse number counter after the 1 subtraction is "0" (step S1211). If the value of the pulse number counter is not "0" (step S1211: NO), the output of pulse signals by the set value update signal corresponding to the set value of the pachinko machine 10 set this time has been completed. Since this means that there is no data, "20" is set in the LOW level counter of the main side RAM 65 (step S1212). Since the value set in the LOW level counter is subtracted by 1 at a cycle of about 10 microseconds, it is maintained at the LOW level for 200 microseconds between the output of a plurality of pulses by the set value update signal. This LOW level maintenance period is sufficient for the management CPU 112 to identify that the setting value update signal has been changed from the HI level to the LOW level.

If the value of the pulse number counter is "0" (step S1211: YES), this means that the output of the pulse signal by the setting value update signal for the number of times corresponding to the currently set setting value of the pachinko machine 10 has been completed, so the output process of the setting value identification end command is executed (step S1213). The setting value identification end command is a command for making the management CPU 112 recognize that the output of the setting value update signal for making the management CPU 112 recognize the currently set setting value of the pachinko machine 10 has been completed. When outputting the setting value identification end command, the first to eighth signals input to the first to eighth buffers 122a to 122h are used in the same way as the identification start command, type identification command, and identification end command. However, the signal pattern of the setting value identification end command is different from that of the identification start command, type identification command, and identification end command.

As described above, in the process of outputting the setting value update signal, a pulse signal is output to the management IC 66 by the setting value update signal for a number of minutes corresponding to the value of the setting value of the pachinko machine 10 that was set at the start of the current supply of operating power. do. By executing the setting update recognition process, the management side CPU 112 grasps the number of pulse signals generated by the setting value update signal, and grasps the currently set setting value of the pachinko machine 10 based on the number of pulse signals.

FIG. 29 is a flowchart showing the setting update recognition process executed by the management CPU 112. Note that the setting update recognition process is executed in step S902 of the management process (FIG. 23).

It is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from a LOW level to a HIGH level (step S1301). If a positive determination is made in step S1301, the value of the setting value grasp counter provided in the management RAM 114 is set to "1" (step S1302). The setting value grasp counter is a counter for identifying the setting value of the pachinko machine 10 by the management CPU 112; for example, a setting value grasp counter value of "1" means "setting 1," and a setting value grasp counter value of "6" means "setting 6."

Thereafter, it is determined whether the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S1303). When an affirmative determination is made in step S1303, the value of the setting value grasping counter of the management side RAM 114 is incremented by 1 (step S1304). As a result, the setting value of the pachinko machine 10 specified by the management CPU 112 is increased by one level.

If a negative determination is made in step S1303 or if the process in step S1304 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , it is determined whether a setting value identification end command has been received from the main CPU 63 (step S1305). If a negative determination is made in step S1305, the process returns to step S1303.

If the determination in step S1305 is affirmative, RTC information, which is date information and time information, is read from the RTC 115 (step S1306). Then, a write process to the history memory 117 is executed (step S1307). In the write process, the pointer information in the history area 124 that is currently being written is identified by referring to the pointer area 126 of the history memory 117, and the RTC information read in step S1306 is written to the history information storage area 125 of the history area 124 that corresponds to the pointer information that is being written. In addition, both information for identifying that it is a setting value and information on the value of the setting value grasp counter are written to the history information storage area 125 that corresponds to the pointer information that is being written. As a result, a combination of information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made is stored as history information.

Thereafter, target pointer update processing is executed (step S1308). In the update process, the numerical information stored in the pointer area 126 of the history memory 117 is read out and incremented by one. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

By executing the setting update recognition process as described above, when the setting state of the pachinko machine 10 is newly set, the fact that the setting was made, the date and time when the setting was made, and the combination of setting values when the setting was made are stored as history information in the history area 124. As a result, by reading and analyzing the information stored in the history memory 117 using an external device connected to the reading terminal 68d, it is possible to know the date and time when the setting state of the pachinko machine 10 was newly set and the contents of the setting values when the setting was made.

Here, even if the setting state of the pachinko machine 10 is newly set, the information stored in the history memory 117 is maintained as is. This makes it possible to prevent the history information in the history memory 117 from being erased even if the setting state of the pachinko machine 10 is newly set, and various parameters described below are calculated using history information that exists across the timing of the change in the setting state of the pachinko machine 10. In this case, since the date and time when the setting state of the pachinko machine 10 is newly set as described above is stored in the history memory 117, by connecting an external device to the reading terminal 68d and reading the information stored in the history memory 117, it becomes possible to calculate various parameters for the period after the timing when the setting state of the pachinko machine 10 is newly set and during which the setting state is maintained.

Next, the display output processing executed by the management side CPU 112 will be explained with reference to the flowchart of FIG. 30. Note that the display output process is executed in step S909 of the management process (FIG. 23).

First, it is determined whether it is the calculation timing (step S1401). If 51 seconds have passed since the supply of operating power to the management CPU 112 started, or if 51 seconds have passed since the previous positive judgment in step S1401, a positive judgment is made in step S1401. If a positive judgment is made in step S1401, the number of balls entering during normal times is calculated (step S1402). Specifically, the number of balls entering the out hole 24a is calculated by first counting the number of history information storage areas 125 in which correspondence information indicating that the ball is the out hole 24a is stored in the history area 124 of the history memory 117. In addition, the number of balls entering the general winning hole 31 is calculated by counting the number of history information storage areas 125 in which correspondence information indicating that the ball is the general winning hole 31 is stored in the history area 124 of the history memory 117. In addition, the number of balls that enter the special electric winning device 32 is calculated by counting the number of history information storage areas 125 in which correspondence information indicating that the special electric winning device 32 is stored in the history area 124 of the history memory 117. In addition, the number of balls that enter the first operating port 33 is calculated by counting the number of history information storage areas 125 in which correspondence information indicating that the special electric winning device 32 is stored in the history area 124 of the history memory 117. In addition, the number of balls that enter the second operating port 34 is calculated by counting the number of history information storage areas 125 in which correspondence information indicating that the special electric winning device 32 is stored in the history area 124 of the history memory 117.

After that, in the history area 124 of the history memory 117, the history information storage area 125 where the correspondence information indicating that it is the front door frame 14 and the start information are stored, and the correspondence relationship indicating that it is the front door frame 14 are stored. By referring to the history information storage area 125 that exists during the period between the history information storage area 125 where the information and the end information are stored, the exit that occurred when the front door frame 14 is in an open state can be detected. 24a, the number of balls entering each of the general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 is calculated (step S1403). In the history area 124 of the history memory 117, there is a history information storage area 125 in which correspondence information indicating that the front door frame is the front door frame 14 and start information are stored; The period between the history information storage area 125 in which the termination information is stored is calculated from the RTC information stored in the history information storage area 125. In addition, in the entire pointer information that is a serial number, there is a history information storage area 125 in which correspondence information indicating that it is the front door frame 14 and start information are stored, and a correspondence relationship that indicates that it is the front door frame 14. If there are multiple sections with the history information storage area 125 in which information and end information are stored, the total number of balls entered for each section is calculated. Although there is a history information storage area 125 in which correspondence information indicating that the front door frame 14 and start information are stored, RTC information corresponding to a time after the history information storage area 125 exists. If the correspondence relationship information indicating that it is the front door frame 14 and the end information are not stored in the history information storage area 125 where is stored, the correspondence relationship information and start information indicating that it is the front door frame 14 are stored. All history information in the history information storage area 125 in which RTC information corresponding to a time later than the history information storage area 125 in which the front door frame 14 is stored is treated as that in which the front door frame 14 is in an open state.

Thereafter, various parameters are calculated using the calculation results of steps S1402 and S1403 (step S1404). Specifically, first, the number of entering balls that occurred while the front door frame 14 was open, calculated in step S1403, is subtracted from the number of entering balls calculated in step S1402. Then, the following first to eighth parameters are calculated using each number of balls entered after the subtraction. Note that the difference between the number of balls entering the out port 24a calculated in step S1403 and the number of balls entering the out port 24a calculated in step S1402 is defined as the number of balls entering K1, and the number of balls entering the general winning hole 31 calculated in step S1402 is The difference between the number of balls entered in the general winning slot 31 calculated in step S1403 with respect to the number of balls is defined as the number of entered balls K2, and the difference between the number of balls entered in the special wire winning device 32 calculated in step S1402 and the number of balls entered in the special wire winning device 32 calculated in step S1403. The difference between the number of balls entering the first operating port 33 calculated in step S1403 is defined as the number K3 of entering balls, and the difference between the number of balls entering the first operating port 33 calculated in step S1403 with respect to the number of balls entering the first operating port 33 calculated in step S1402. The number of balls entered is K4, and the difference between the number of balls entered into the second operating port 34 calculated in step S1403 and the number of balls entered into the second operating port 34 calculated in step S1402 is set as the number K5 of balls entered.
・First parameter: Total number of game balls paid out (K2 x "Number of prize balls for winning in the general winning opening 31" + K3 x "Number of winning balls for winning in the special electric winning device 32" + K4 x "First operating opening 33 The ratio of the total number of game balls ejected from the gaming area PA (K1+K2+K3+K4+K5) (hereinafter, this ratio is referred to as "Number of prize balls for winning in the second operating port 34")/"Number of prize balls for winning in the second operating port 34") D1”)
・Second parameter: Ratio of total number of game balls entering the general prize opening 31 K2/total number of game balls ejected from the game area PA (K1+K2+K3+K4+K5)・Third parameter: Game balls entering the special electric prize winning device 32 Ratio of total number of game balls entering K3/total number of game balls discharged from gaming area PA (K1+K2+K3+K4+K5) 4th parameter: Total number of game balls entering first operating port 33 K4/discharging from gaming area PA The ratio of the total number of game balls (K1+K2+K3+K4+K5) (hereinafter, this ratio will be referred to as "D2")
- Fifth parameter: ratio of total number of game balls entering the second operating port 34 K5/total number of game balls ejected from the game area PA (K1+K2+K3+K4+K5) (hereinafter, this ratio will be referred to as "D3")
・Sixth parameter: D1 - (D2 x "Number of prize balls for winning in the first operating port 33" + D3 x "Number of prize balls for winning in the second operating port 34")
- Seventh parameter: (K3 x "Number of prize balls for winning into the special electric winning device 32" + K5 x "Number of prize balls for winning into the second operating port 34") / Total number of game balls paid out (K2 x "General "Number of prize balls for winning into the winning opening 31" + K3 x "Number of winning balls for winning into the special electric winning device 32" + K4 x "Number of winning balls for winning into the first operating port 33" + K5 x "Second operating port 34 8th parameter: K3 × "Number of prize balls received in the special electric winning device 32" / Total number of game balls paid out (K2 × "Number of prize balls received in the general winning slot 31") Number of prize balls" + K3 x "Number of prize balls for winning into the special electric winning device 32" + K4 x "Number of prize balls for winning into the first actuation port 33" + K5 x "Number of prize balls for winning into the second actuation port 34 '') In step S1404, the first to eighth parameters, which are the calculation results, are stored in the normal storage area of the calculation result memory 131. The first to eighth parameters stored in the normal storage area are stored and held until the next step S1404 is executed. In other words, when step S1404 is executed next time and the first to eighth parameters are calculated, the newly calculated first to eighth parameters are stored in the normal storage area. The previous calculation results of the first to eighth parameters that were previously stored in the normal storage area are overwritten.

After that, in the history area 124 of the history memory 117, the history information storage area 125 stores correspondence information indicating that the opening/closing execution mode is in effect and start information, and the correspondence relationship information and start information indicating that the opening/closing execution mode exists. By referring to the history information storage area 125 that exists during the period between the history information storage area 125 where the end information is stored, the out exit 24a and the general winning opening 31 that have occurred in the opening/closing execution mode are , the number of balls entering each of the special electric winning device 32, the first operating port 33, and the second operating port 34 is calculated (step S1405). In the history area 124 of the history memory 117, there is a history information storage area 125 in which correspondence information indicating that the opening/closing execution mode is in effect and start information are stored, and correspondence relationship information and end information indicating that the opening/closing execution mode is being stored. is calculated from the RTC information stored in the history information storage area 125. In addition, in the entire pointer information that is a serial number, there is a history information storage area 125 in which correspondence information and start information indicating that the opening/closing execution mode is stored, and correspondence information and start information indicating that the opening/closing execution mode is stored. If there are multiple sections with the history information storage area 125 in which the end information is stored, the total number of balls entered for each section is calculated. Furthermore, although there is a history information storage area 125 in which correspondence information and start information indicating that the opening/closing execution mode is stored, RTC information corresponding to a time later than the history information storage area 125 is present. If correspondence relationship information and end information indicating that the opening/closing execution mode is not stored in the stored history information storage area 125, correspondence relationship information and start information indicating that the opening/closing execution mode is being stored are stored. Any history information in the history information storage area 125 in which RTC information corresponding to a time later than the history information storage area 125 is stored is handled as being in the opening/closing execution mode.

Then, the number of balls that entered each of the outlet 24a, the general winning port 31, the special winning device 32, the first operating port 33, and the second operating port 34 while the front door frame 14 was in the open state during the period in the opening and closing execution mode identified in step S1405 is calculated (step S1406). The method for calculating the number of balls is the same as in step S1403, except that it is based on the period in the opening and closing execution mode identified in step S1405.

Thereafter, various parameters are calculated using the calculation results of steps S1405 and S1406 (step S1407). Specifically, first, the number of entering balls that occurred while the front door frame 14 was open, calculated in step S1406, is subtracted from the number of entering balls calculated in step S1405. Then, the following 11th to 18th parameters are calculated using each number of balls entered after the subtraction. Note that the difference between the number of balls entering the out port 24a calculated in step S1406 and the number of balls entering the out port 24a calculated in step S1406 is defined as the number of balls entering K11, and the number of balls entering the general winning hole 31 calculated in step S1405 is The difference between the number of balls entered into the general winning slot 31 calculated in step S1406 with respect to the number of balls is defined as the number of entered balls K12, and the difference between the number of balls entered into the special wire winning device 32 calculated in step S1405 and the number of balls entered into the special wire winning device 32 calculated in step S1406. The difference between the number of balls entering the first operating port 33 calculated in step S1406 is defined as the number K13 of entering balls, and the difference between the number of balls entering the first operating port 33 calculated in step S1406 with respect to the number of balls entering the first operating port 33 calculated in step S1405. The number of balls entered is K14, and the difference between the number of balls entering the second operating port 34 calculated in step S1406 and the number of balls entering the second operating port 34 calculated in step S1406 is set as the number of balls entering K15.
- 11th parameter: Total number of game balls paid out (K12 x "Number of prize balls for winning into the general winning opening 31" + K13 x "Number of winning balls for winning into the special electric winning device 32" + K14 x "First operating opening 33 Ratio of the total number of game balls ejected from the gaming area PA (K11+K12+K13+K14+K15) (hereinafter, this ratio is referred to as "Number of prize balls for winning in the second operating port 34")/(Number of prize balls for winning in the second operating port 34) D11”)
- 12th parameter: Ratio of total number of game balls entering the general winning slot 31 K12/total number of game balls discharged from the gaming area PA (K11 + K12 + K13 + K14 + K15) - 13th parameter: Game balls entering the special electric winning device 32 Ratio of total number of game balls entering K13/total number of game balls ejected from gaming area PA (K11+K12+K13+K14+K15) ・14th parameter: Total number of game balls entering first operating port 33 K14/ejecting from gaming area PA The ratio of the total number of game balls (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio will be referred to as "D12")
・Fifteenth parameter: Ratio of total number of game balls entering the second operating port 34 K15/total number of game balls ejected from the game area PA (K11+K12+K13+K14+K15) (hereinafter, this ratio will be referred to as "D13")
- 16th parameter: D11 - (D12 x "Number of prize balls for winning in the first operating port 33" + D13 x "Number of prize balls for winning in the second operating port 34")
- 17th parameter: (K13 x "Number of prize balls for winning into the special electric winning device 32" + K15 x "Number of winning balls for winning into the second operating port 34") / Total number of game balls paid out (K12 x "General "Number of prize balls for winning in the winning opening 31" + K13 x "Number of prize balls for winning in the special electric winning device 32" + K14 x "Number of winning balls for winning in the first operating port 33" + K15 x "Second operating port 34 18th parameter: K13 x "Number of prize balls for winning in the special electric winning device 32" / Total number of game balls paid out (K12 x "Number of prize balls for winning in the general winning slot 31") "Number of prize balls" + K13 x "Number of prize balls for winning into the special electric winning device 32" + K14 x "Number of prize balls for winning into the first actuation port 33" + K15 x "Number of prize balls for winning into the second actuation port 34"'') In step S1407, the 11th to 18th parameters, which are the calculation results, are stored in the storage area for opening/closing execution mode in the calculation result memory 131. The 11th to 18th parameters stored in the storage area for the opening/closing execution mode are stored and held until the next step S1407 is executed. In other words, when step S1407 is executed next time and the 11th to 18th parameters are calculated, the newly calculated 11th to 18th parameters are stored in the storage area for opening/closing execution mode. , the previous calculation results of the 11th to 18th parameters previously stored in the storage area for opening/closing execution mode are overwritten.

After that, in the history area 124 of the history memory 117, a history information storage area 125 where correspondence information indicating that the mode is high frequency support mode and start information are stored, and a correspondence relationship indicating that the mode is high frequency support mode are stored. By referring to the history information storage area 125 that exists during the period between the history information storage area 125 where the information and termination information are stored, the output 24a, general The number of balls entering each of the winning hole 31, the special electric winning device 32, the first operating hole 33, and the second operating hole 34 is calculated (step S1408). In the history area 124 of the history memory 117, there is a history information storage area 125 in which correspondence information indicating that the mode is high frequency support mode and start information are stored, and a history information storage area 125 in which correspondence information indicating that the mode is high frequency support mode and start information are stored. The period between the history information storage area 125 in which the termination information is stored is calculated from the RTC information stored in the history information storage area 125. In addition, in the entire pointer information that is a serial number, there is a history information storage area 125 in which correspondence information indicating that the mode is high frequency support mode and start information are stored, and a correspondence relationship indicating that the mode is high frequency support mode. If there are multiple sections with the history information storage area 125 in which information and end information are stored, the total number of balls entered for each section is calculated. Furthermore, although there is a history information storage area 125 in which correspondence information and start information indicating that the mode is high-frequency support mode is stored, RTC information corresponding to a time after the history information storage area 125 exists. If the correspondence relationship information and end information indicating that the mode is high-frequency support mode are not stored in the history information storage area 125 where , the correspondence relationship information and start information indicating that the mode is high-frequency support mode are stored. All the history information in the history information storage area 125 in which RTC information corresponding to a time later than the history information storage area 125 in which the RTC information is stored is treated as that in the high-frequency support mode.

Then, during the period of the high-frequency support mode identified in step S1408, the number of balls that entered each of the outlet 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 while the front door frame 14 was in the open state is calculated (step S1409). The method of calculating these numbers of balls is the same as in step S1403, except that it is based on the period of the high-frequency support mode identified in step S1408.

Thereafter, various parameters are calculated using the calculation results of steps S1408 and S1409 (step S1410). Specifically, first, the number of entering balls that occurred while the front door frame 14 was open, calculated in step S1409, is subtracted from the number of entering balls calculated in step S1408. Then, the following 21st to 26th parameters are calculated using each number of balls entered after the subtraction. Note that the difference between the number of balls entering the out port 24a calculated in step S1409 and the number of balls entering the out port 24a calculated in step S1409 is defined as the number of balls entering K21, and the number of balls entering the general winning hole 31 calculated in step S1408 is The difference between the number of balls entered into the general winning slot 31 calculated in step S1409 with respect to the number of balls is defined as the number of entered balls K22, and the difference between the number of balls entered into the special wire winning device 32 calculated in step S1408 and the number of balls entered into the special wire winning device 32 calculated in step S1409. The difference between the number of balls entering the first operating port 33 calculated in step S1409 is defined as the number K23 of entering balls, and the difference between the number of balls entering the first operating port 33 calculated in step S1409 with respect to the number of balls entering the first operating port 33 calculated in step S1408. The number of balls entered is K24, and the difference between the number of balls entered into the second operating port 34 calculated in step S1409 and the number of balls entered into the second operating port 34 calculated in step S1409 is set as the number K25 of balls entered.
- 21st parameter: Total number of game balls paid out (K22 x "Number of prize balls for winning into the general winning opening 31" + K23 x "Number of winning balls for winning into the special electric winning device 32" + K24 x "First operating opening 33 The ratio of the total number of game balls discharged from the gaming area PA (K21+K22+K23+K24+K25) (hereinafter, this ratio is referred to as "Number of prize balls for winning in the second operating port 34")/(Number of prize balls for winning in the second operating port 34) D11”)
・22nd parameter: Ratio of total number of game balls entering the general winning slot 31 K22/total number of game balls ejected from the gaming area PA (K21+K22+K23+K24+K25) ・23rd parameter: Game balls entering the special electric winning device 32 Ratio of total number of game balls entering K23/total number of game balls discharged from gaming area PA (K21+K22+K23+K24+K25) ・24th parameter: Total number of game balls entering first operating port 33 K24/ejecting from gaming area PA The ratio of the total number of game balls (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio will be referred to as "D22")
・25th parameter: Ratio of total number of game balls entering the second operating port 34 K25/total number of game balls ejected from the game area PA (K21+K22+K23+K24+K25) (hereinafter, this ratio will be referred to as "D23")
・26th parameter: D21 - (D22 x "Number of prize balls for winning in the first operating port 33" + D23 x "Number of prize balls for winning in the second operating port 34")
In step S1410, the 21st to 26th parameters, which are the calculation results, are stored in the storage area for high frequency support mode in the calculation result memory 131. The 21st to 26th parameters stored in the high-frequency support mode storage area are stored and held until the next step S1410 is executed. In other words, when step S1410 is executed next time and the 21st to 26th parameters are calculated, the newly calculated 21st to 26th parameters are stored in the storage area for high frequency support mode. Then, the previous calculation results of the 21st to 26th parameters that were previously stored in the storage area for high frequency support mode are overwritten.

Then, the frequency of occurrence of the opening and closing execution mode is calculated and stored (step S1411). Specifically, the number of occurrences of the opening and closing execution mode is calculated by counting the number of history information storage areas 125 in which the correspondence relationship information and start information indicating the opening and closing execution mode are stored in the history area 124 of the history memory 117. Also, the number of occurrences of game times is calculated by counting the number of history information storage areas 125 in which the correspondence relationship information indicating the start of a game time is stored in the history area 124 of the history memory 117. Then, the number of occurrences of the opening and closing execution mode per unit game time is calculated. The number of occurrences of the opening and closing execution mode is set as the number of occurrences K31, and the number of occurrences of a game time is set as the number of occurrences K32.
・31st parameter: K31/K32
In step S1411, the 31st parameter, which is the calculation result, is stored in an opening/closing execution mode frequency storage area in the calculation result memory 131. The 31st parameter stored in the opening/closing execution mode frequency storage area is stored and held until the next time step S1411 is executed. In other words, when the next time step S1411 is executed and the 31st parameter is calculated, the newly calculated 31st parameter is stored in the opening/closing execution mode frequency storage area, overwriting the previous calculation result of the 31st parameter that was stored in the opening/closing execution mode frequency storage area.

Thereafter, the frequency of occurrence of the high-frequency support mode is calculated and stored (step S1412). Specifically, in the history area 124 of the history memory 117, by counting the number of history information storage areas 125 that store correspondence information and start information indicating that the high frequency support mode Calculate the number of occurrences of support mode. Furthermore, by counting the number of history information storage areas 125 in which correspondence information indicating the start of a game session is stored in the history area 124 of the history memory 117, the number of occurrences of a game session is calculated. . Then, the number of occurrences of the high-frequency support mode per unit game and the ratio of the number of occurrences of the high-frequency support mode to the number of occurrences of the opening/closing execution mode are calculated. The number of occurrences of the high-frequency support mode is set as the number of occurrences K41, the number of occurrences of the game game is set as the number of occurrences K42, and the number of occurrences of the opening/closing execution mode calculated in step S1411 is set as the number of occurrences K43.
・41st parameter: K41/K42
・42nd parameter: K41/K43
In step S1412, the forty-first and forty-second parameters, which are the calculation results, are stored in the high-frequency support mode frequency storage area in the calculation result memory 131. The 41st and 42nd parameters stored in the high frequency support mode frequency storage area are stored and held until the next step S1412 is executed. In other words, when step S1412 is executed next time and the 41st to 42nd parameters are calculated, the newly calculated 41st to 42nd parameters are stored in the high frequency support mode frequency storage area. Then, the previous calculation results of the 41st and 42nd parameters that were previously stored in the high frequency support mode frequency storage area are overwritten.

If a negative determination is made in step S1401, or if the process in step S1412 is executed, display processing is executed (step S1413). FIG. 31 is a flowchart showing display processing.

First, the value of the update timing counter provided in the management RAM 114 is decremented by 1 (step S1501). The update timing counter is a counter for the management CPU 112 to identify that it is time to update the display contents of the management results of the game history in the first to third notification display devices 69a to 69c. The management CPU 112 notifies the calculation results of the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters by controlling the display of the first to third notification display devices 69a to 69c. In this case, the first notification display device 69a displays information corresponding to the type of the parameter to be notified. In addition, the number corresponding to the tens digit of the value obtained by multiplying the parameter to be notified by 100 is displayed on the second notification display device 69b, and the number corresponding to the ones digit is displayed on the third notification display device 69c. In the first to third notification display devices 69a to 69c, the displays corresponding to the calculation results of the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters are switched in sequence in a predetermined order, and after the calculation result of the forty-second parameter, which is the last parameter to be displayed, is displayed, the calculation result of the first parameter, which is the first parameter to be displayed, is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is two seconds.

The calculation period for the various parameters in the management CPU 112 is 51 seconds. In contrast, the number of various parameters is 25, and the period during which the calculation result for one parameter is continuously displayed is 2 seconds. Therefore, the various parameters calculated by the management CPU 112 are displayed at least once on the first to third notification display devices 69a to 69c.

When the process of step S1501 is executed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether the value of the update timing counter after subtraction by 1 is "0". It is determined whether the timing has come to do so (step S1502). When an affirmative determination is made in step S1502, the value of the display target counter provided in the management side RAM 114 is incremented by 1 (step S1503). If the value of the display target counter after adding 1 exceeds the maximum value "24" (step S1504: YES), the value of the display target counter is cleared to "0" (step S1505).

The display object counter is a counter that allows the management CPU 112 to identify the type of parameter that is the display object on the first to third notification display devices 69a to 69c. There is a one-to-one correspondence between the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters and the possible values of the display object counter, "0" to "24." For example, when the value of the display object counter is "0," the first parameter, which is the first display object, becomes the display object on the first to third notification display devices 69a to 69c, and when the value of the display object counter is "24," the forty-second parameter, which is the last display object, becomes the display object on the first to third notification display devices 69a to 69c.

When a negative judgment is made in step S1504, or when the process of step S1505 is executed, the display of the first notification display device 69a is controlled so that information corresponding to the type of parameter corresponding to the value of the counter to be displayed is displayed (step S1506). In addition, the parameter corresponding to the value of the counter to be displayed is read from the calculation result memory 131, and the read parameter is multiplied by 100 so that the number corresponding to the tens digit is displayed on the second notification display device 69b and the number corresponding to the ones digit is displayed on the third notification display device 69c (step S1507). The contents displayed on the first to third notification display devices 69a to 69c in steps S1506 and S1507 continue until the next update timing occurs or until the supply of operating power to the management side CPU 112 is stopped. After that, a value corresponding to 2 seconds is set to the update timing counter of the management side RAM 114 as the value corresponding to the next update timing (step S1508).

By executing the display process as described above, when the supply of operating power to the management CPU 112 has begun, the game history management results are displayed on the first to third notification display devices 69a to 69c. The game history management results are displayed regardless of whether or not play is continuing, and regardless of whether or not the gaming machine main body 12 has been opened relative to the outer frame 11 and the main control device 60 is visible from the front of the pachinko machine 10. By executing display control of the first to third notification display devices 69a to 69c in this way regardless of the game situation or the state of the pachinko machine 10, it is possible to simplify the processing configuration for display control of the first to third notification display devices 69a to 69c.

The display of the game history management results on the first to third notification display devices 69a to 69c starts after the supply of operating power to the management side CPU 112 is started and after the identification end command is received from the main side CPU 63. be done. In this case, the information stored in the calculation result memory 131 is retained even when the supply of operating power to the pachinko machine 10 is stopped, similar to the information stored in the history memory 117. Therefore, when the supply of operating power to the management CPU 112 is started, the gaming history management results calculated before the supply of operating power to the management CPU 112 is stopped are displayed.

When the setting state of the pachinko machine 10 is set when the supply of operating power to the main CPU 63 is started, information corresponding to the setting value that is being changed is displayed on the third notification display device 69c. However, while the information corresponding to the set value is displayed before the identification end command is sent from the main CPU 63, the game history on the first to third notification display devices 69a to 69c is displayed. The display of the management results starts after the identification end command is sent from the main CPU 63. As a result, even if the third notification display device 69c is configured to double as a display device for displaying information corresponding to set values and displaying game history management results, the display of these displays is It is possible to prevent periods from overlapping.

In addition, when information corresponding to the set value is displayed, the first notification display device 69a and the second notification display device 69b are hidden. In contrast, when the game history management results are displayed, the first notification display device 69a and the second notification display device 69b are not hidden. This makes it possible to distinguish whether the third notification display device 69c is displaying information corresponding to the set value or displaying the game history management results.

Next, we will discuss the processing configuration for outputting the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to an external device electrically connected to the reading terminal 68d of the MPU 62. explain. FIG. 32(a) is a flowchart showing data output processing executed by the main CPU 63. Note that the data output process is executed in step S112 in the main process (FIG. 9).

In the data output process, first, it is determined whether or not a connection signal indicating that an external device is electrically connected to the read terminal 68d is received from the read terminal 68d (step S1601). If a negative determination is made in step S1601, the data output process is terminated as is. In this case, in order to execute the data output process, it is necessary to restart the supply of operating power to the main CPU 63. In order to perform the external output of the history information and various parameters, it is necessary to start the supply of operating power to the main CPU 63 with the external device electrically connected to the read terminal 68d. The power switch for stopping and starting the supply of operating power to the main CPU 63 is provided in the payout mechanism 73 mounted on the back of the back pack unit 15, so that in order to perform these stopping and starting operations, it is necessary to open the gaming machine main body 12 relative to the outer frame 11 to expose the back of the back pack unit 15. Under these circumstances, in order to output the history information and various parameters to the outside, it is necessary to electrically connect an external device to the reading terminal 68d and start supplying operating power to the main CPU 63. This makes it difficult for anyone other than the manager of the amusement hall to read the history information and various parameters.

If the positive determination is made in step S1601, it is determined whether or not a signal for confirming control information is received from the read terminal 68d, and whether or not the current connection of the external device to the read terminal 68d corresponds to confirmation of the control information (programs and data) of the main ROM 64 (step S1602). The external device is configured to be able to perform both confirmation of control information and confirmation of history information and various parameters, and when confirmation of control information is selected by manual operation of the external device, a signal for confirming control information is transmitted from the external device, and when confirmation of history information and various parameters is selected by manual operation of the external device, a signal for confirming history is transmitted from the external device. Note that this is not limited to this, and a configuration in which the external device for confirming control information and the external device for confirming history may be separate. In this case, when an external device for confirming control information is electrically connected to the read terminal 68d, a signal for confirming control information is transmitted from the external device, and when an external device for confirming history is electrically connected to the read terminal 68d, a signal for confirming history is transmitted from the external device.

If an affirmative determination is made in step S1602, output processing for confirming control information is executed (step S1603). In the output processing, the program and data are read as control information from the main ROM 64, and the read control information is output to the reading terminal 68d. This makes it possible to read the control information with an external device electrically connected to the reading terminal 68d, and confirm whether the control information is genuine or normal. It becomes possible to do this.

If a negative determination is made in step S1602, an output instruction signal is transmitted to the management CPU 112 (step S1604). Specifically, the output state of the output instruction signal is switched from LOW level to HI level. This HI level output state continues for a specific period of time. This specific period is a period sufficient for the management side CPU 112 to specify that the HI level output instruction signal is input to the 16th buffer 122p. By switching the output state of the output instruction signal to the HI level, the management CPU 112 executes processing for outputting history information.

Specifically, as shown in the flowchart of FIG. 32(b), when the output state of the output instruction signal input to the 16th buffer 122p of the input port 121 switches from LOW level to HIGH level (step S1701: YES), the management CPU 112 reads out the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131, and outputs the read history information and various parameters to the read terminal 68d (step S1702). This makes it possible to read the history information and various parameters in an external device electrically connected to the read terminal 68d, and to analyze the information on the management results of the game history. In addition, when the management CPU 112 outputs the history information to the read terminal 68d, it clears the history memory 117 to "0" (step S1703). The history information in the history memory 117 is erased only when the history information is read by an external device.

Returning to the explanation of the data output process (FIG. 32(a)), when the process of step S1603 is executed or the process of step S1604 is executed, the electrical connection of the external device to the reading terminal 68d continues. It is determined whether or not (step S1605). If it is being continued (step S1605: YES), the process remains on standby in step S1605. This makes it possible to prevent the processing set to be executed after the data output processing from being executed until the external device is disconnected from the reading terminal 68d. If the external device is disconnected from the reading terminal 68d (step S1605: NO), this data output process ends.

According to this embodiment described in detail above, the following excellent effects are achieved.

When a game ball enters any of the general winning port 31, special electric winning device 32, first operating port 33, and second operating port 34, the game ball is paid out, so the player can choose either of these ball entry ports. The player plays the game while hoping that the game ball will land in the ball. In this configuration, the game ball enters any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 (hereinafter also referred to as the history target ball entering section). If this occurs, the corresponding history information will be stored in the history memory 117 of the management IC 66. This makes it possible for the pachinko machine 10 to store and hold information for managing the number of game balls entering each history target ball entry section or the frequency of ball entry, and this managed information can be used. This makes it possible to appropriately manage the manner in which the game ball enters each history target ball entry section. Furthermore, since the history information is stored and held in the pachinko machine 10 itself, it becomes possible to prevent unauthorized access to or unauthorized modification of the history information.

All the ball entry units that eject game balls from the gaming area PA are subject to storage processing of historical information and are subject to management using historical information. This makes it possible to manage the frequency of ball entry for any history target ball entry section using history information. Furthermore, it is possible to manage the ratio of the number of game balls entering each history target ball entry section to the number of game balls discharged from the game area PA using the history information.

The history information includes RTC information, which is information corresponding to the timing at which the game ball entered the history target entry part that triggered the storage of the history information. This makes it possible to use the history information to obtain a detailed understanding of the game ball entry history at the history target entry part.

The history memory 117 contains not only history information corresponding to the entry of a game ball into the history target ball entry section, but also history information indicating whether or not the opening/closing execution mode is in progress, and whether the game ball is in the high-frequency support mode. History information indicating whether the front door frame 14 is open or not, and history information indicating whether the front door frame 14 is open or not are stored. This makes it possible to distinguish between these situations and manage the manner in which the game ball enters the history target ball entry section.

It is possible to output the history information stored in the history memory 117 to an external device that is a device outside the pachinko machine 10. This makes it possible to read the history information with the external device and use the read history information to analyze how the game ball enters the history target ball entry section.

The MPU 62 is provided with a read terminal 68d, and an external device electrically connected to the read terminal 68d can read the program from the main ROM 64. This makes it possible to check whether the program is normal or not. In this configuration, the read terminal 68d for externally outputting the program is used to externally output the history information stored in the history memory 117. This makes it possible to externally output the history information while preventing the configuration from becoming too complicated.

It is specified whether the information to be outputted from the reading terminal 68d is a program or history information, and the information corresponding to the identification result is outputted to the outside through the reading terminal 68d. As a result, in a configuration in which historical information is externally output using the reading terminal 68d for externally outputting a program, the pachinko machine 10 determines whether the information to be externally output is the program or the historical information. The specified information is output externally. Therefore, even in a configuration in which the reading terminal 68d is used also, it is possible to read only necessary information.

Based on information received from an external device electrically connected to the read terminal 68d, it is determined whether the information to be output from the read terminal 68d is program information or history information. This makes it possible to prevent the configuration for selecting the information to be output to the outside from becoming complicated.

The MPU 62, which has a main ROM 64 that stores programs in advance, has a management IC 66 and a read terminal 68d. This makes it possible to consolidate the signal path to the read terminal 68d within the MPU 62. This makes it possible to achieve the excellent effects already described while making it difficult to gain unauthorized access to the signal path to the read terminal 68d.

A management CPU 112 is provided in addition to the main CPU 63, which executes the process to have game balls paid out based on the game balls entering either the general winning port 31, the special winning device 32, the first operating port 33, or the second operating port 34, and the management CPU 112 executes the process to have history information stored in the history memory 117. This makes it possible to manage the entry patterns of game balls into each history target entry port while preventing the processing load of the main CPU 63 from increasing excessively.

The main CPU 63 and the management CPU 112 are provided on the same chip as the MPU 62. This makes it possible to prevent unauthorized access to the communication path between the main CPU 63 and the management CPU 112.

The main CPU 63 transmits information corresponding to the detection results of each of the ball entry detection sensors 42a to 48a to each of the buffers 122a to 122g of the input port 121 of the management IC 66, using the signal paths corresponding to each of the ball entry detection sensors 42a to 48a. This allows the type of information transmitted from the main CPU 63 to correspond to each of the buffers 122a to 122g (i.e., each signal path), simplifying the configuration for distinguishing each type of information in the management CPU 112.

The main CPU 63 includes information corresponding to whether it is in the opening/closing execution mode, information corresponding to whether it is in the high-frequency support mode, information corresponding to whether the front door frame 14 is being opened, Information corresponding to the start of the game round is transmitted to each of the buffers 122h to 122k of the input port 121 of the management IC 66 using signal paths corresponding to each of these situations. As a result, the type of information corresponding to each of these situations corresponds to each buffer 122h to 122k (that is, each signal path), simplifying the configuration for distinguishing each type of information in the management CPU 112. becomes possible.

The main CPU 63 transmits correspondence relationship information indicating which type of information each buffer 122a to 122k (that is, each signal path 118a to 118k) corresponds to to the management CPU 112. This eliminates the need to store the correspondence information in advance in the management IC 66. Therefore, it becomes possible to increase the versatility of the management IC 66.

When the supply of operating power to the main CPU 63 is started, correspondence information is transmitted from the main CPU 63 to the management IC 66 . This allows the management IC 66 to specify the correspondence between the information transmitted from the main CPU 63 and the history target ball entry area in a situation where a game ball may enter the history target ball entry area. It becomes possible to do so.

Correspondence information is transmitted from the main side CPU 63 to the management IC 66 using the signal paths 118a to 118g for transmitting information indicating whether or not a game ball has entered the history target ball entry section. This makes it possible to simplify the configuration related to communication compared to a configuration in which a dedicated signal path for transmitting correspondence information is provided.

The management IC 66 is provided with a correspondence memory 116, and the correspondence information transmitted from the main CPU 63 to the management IC 66 is stored in the correspondence memory 116. As a result, each time the main CPU 63 transmits information on the detection results of each of the ball entry detection sensors 42a to 48a, information that enables the management IC 66 to specify the history target ball entry portion corresponding to the information to be transmitted. There is no need to provide it. Therefore, it is possible to suppress the amount of information on the detection results of each of the ball entry detection sensors 42a to 48a transmitted from the main CPU 63.

When the output state of the output instruction signal output from the main CPU 63 to the management IC 66 switches from LOW level to HIGH level, information is output from the management IC 66 to the read terminal 68d. In this case, the management CPU 112 can identify that the signal path corresponding to the 16th buffer 122p corresponds to the output instruction signal without receiving the correspondence information from the main CPU 63. This makes it possible to prevent the configuration for transmitting the correspondence information from becoming extremely complicated.

The management IC 66 is provided with buffers 122a to 122p capable of receiving information from the main CPU 63, the number of which is greater than the number of types of information that needs to be transmitted from the main CPU 63 to the management IC 66. It is being Thereby, even if the number of types of information increases or decreases depending on the model of the pachinko machine 10, it is possible to cope with this without changing the configuration regarding the buffers 122a to 122p. Therefore, it becomes possible to increase the versatility of the management IC 66.

When history information is sent from the management IC 66 to the read terminal 68d, the history information includes correspondence information indicating the type of history target ball entry section that corresponds to the history information. This makes it possible to use the read history information to identify the manner in which the game ball entered each history target ball entry section.

By using the history information stored in the history memory 117, the management IC 66 calculates various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameter, 41st to 42nd parameters) corresponding to the ball entry state of the game ball in the game area PA during a specified period. The various parameters resulting from these calculations are then displayed in sequence on the first to third notification display devices 69a to 69c. This makes it possible to notify the pachinko machine 10 of the various parameters that are the results of calculations using the history information.

Various parameters are calculated while excluding history information corresponding to a situation where the front door frame 14 is open. This makes it possible to derive various parameters in a normal situation where the front door frame 14 is in a closed state. In addition, various parameters are calculated corresponding to each of the opening/closing execution mode situation and the high frequency support mode situation. This allows the manager of the game hall and the like to understand the manner in which game balls enter the game according to each situation.

When history information in history memory 117 is output to an external device, a process for clearing history memory 117 is executed to initialize history memory 117. This makes it possible to prevent the occurrence of an event in which history information that would normally be stored is erased by overwriting, as a result of history information being stored in history memory 117 to the extent that it exceeds the storage capacity of history memory 117.

In a configuration in which an external output corresponding to the entry of a game ball into the first actuation port 33 or the second actuation port 34 is sent via the external terminal board 97, history information is stored in the history memory 117. This makes it possible to easily determine the number and frequency of game balls that have entered the first actuation port 33 or the second actuation port 34 by using the information outputted externally via the external terminal board 97, while accurately determining the number and frequency of game balls that have entered the history target entry portion by using the history information stored in the history memory 117.

The probability of a jackpot result in low probability mode varies depending on the setting state of the pachinko machine 10, from "Setting 1" to "Setting 6." This makes it possible to create favorable or unfavorable conditions for the probability of a jackpot result in low probability mode even with a single pachinko machine 10. This makes it possible to increase the interest of the game.

The probability of a jackpot result in the low probability mode varies depending on the settings of the pachinko machine 10 from "Setting 1" to "Setting 6", while the probability of a jackpot result in the high probability mode varies depending on the settings of the pachinko machine 10. It does not change depending on the state. This makes it possible to limit the influence of the setting state of the pachinko machine 10 on the probability of a jackpot result to the situation in the low probability mode. In addition, since it is possible to make the high probability correctness table 64g referred to in the high probability mode common regardless of the setting state of the pachinko machine 10, the accuracy tables 64a to 64g can be prepared in advance in the main side ROM 64. It becomes possible to suppress an increase in storage capacity for storage.

While the probability of a jackpot result in low probability mode varies depending on the setting state of the pachinko machine 10 from "Setting 1" to "Setting 6," the allocation manner of the types of jackpot results does not vary depending on the setting state of the pachinko machine 10. This makes it possible to limit the influence of the setting state of the pachinko machine 10 to the situation in low probability mode. In addition, since the allocation table 64h that is referenced when allocating the types of jackpot results can be made common regardless of the setting state of the pachinko machine 10, it is possible to suppress an increase in the storage capacity for storing the allocation table 64h in advance in the main ROM 64.

Even if a new setting is made to the setting state of the pachinko machine 10, the history information stored in the history memory 117 is not erased but is retained. This makes it possible to continue storing the previous history information in the history memory 117 even if a new setting is made to the setting state of the pachinko machine 10, and makes it possible to identify the results of management of the game history by using the history information accumulated in the history memory 117 over a long period of time.

In a configuration in which the history information stored in the history memory 117 is not erased but is retained even when a new setting is made to the setting state of the pachinko machine 10, when a new setting is made to the setting state of the pachinko machine 10, the corresponding history information is stored in the history memory 117. This makes it possible to distinguish between the history information before the new setting of the setting state of the pachinko machine 10 is made and the history information after the new setting is made.

When a new setting of the setting state of the pachinko machine 10 is performed and corresponding history information is stored in the history memory 117, information corresponding to the setting value is included in the history information. This makes it possible to specify the contents of setting values set in the past by referring to the history information.

When the setting value update process (FIG. 10) is started, the setting value is changed from a predetermined start-corresponding setting value. This makes it possible to change the setting value from a certain start-corresponding setting value in the setting value update process (FIG. 10), regardless of the setting value to be used before the setting value update process (FIG. 10) is started. This makes it easy for the operator to understand the work content of the setting value change operation.

Specifically, the setting value corresponding to the start is "Setting 1", which has the lowest advantage. Therefore, when the setting value update process (FIG. 10) is started, the setting values are changed starting from "Setting 1" which has the lowest advantage. As a result, even if the administrator of the game hall unintentionally terminates the setting value update process (Fig. 10) immediately after the start of the setting value update process (Fig. 10), the setting value with the lowest degree of advantage will be used. Therefore, it is possible to prevent unintended disadvantages from occurring in the game hall in such a situation.

Note that when calculating various parameters at the calculation timing, history information stored after the history information corresponding to the new setting of the pachinko machine 10 in the history memory 117 is used as a reference. It is also possible to use a configuration in which various parameters are calculated. In this case, it is possible to derive the game history management results as various parameters at a timing after a new setting of the setting state of the pachinko machine 10 is performed.

In addition, when calculating various parameters at the calculation timing, history information corresponding to a new setting of the setting state of the pachinko machine 10 in the history memory 117 and corresponding to a change in setting value is used as a reference. The configuration may be such that various parameters are calculated using history information stored later than that. In this case, it becomes possible to derive the gaming history management results at the timing after the setting state of the pachinko machine 10 is changed as various parameters.

Further, although the circuit board box 60a of the main controller 60 is provided with an opening for exposing the reading terminal 68d, the opening is not provided and the reading terminal 69d is exposed on the opposing wall 60b. It may also be covered by. In this case, it is necessary to open the board box 60a in order to connect an external device to the reading terminal 68d.

Second Embodiment
In this embodiment, the contents of the winning/losing table corresponding to the setting state of the pachinko machine 10 are different from those of the first embodiment. The following describes the configurations that are different from the first embodiment. Note that the description of the same configurations as the first embodiment will basically be omitted.

Figure 33 is an explanatory diagram for explaining the various tables stored in the main ROM 64 in this embodiment.

As shown in FIG. 33, the main ROM 64 includes an area 161 for setting 1, an area 162 for setting 2, an area 163 for setting 3, an area 164 for setting 4, an area 165 for setting 5, and an area for setting 6. 166 are provided. The setting 1 area 161 includes a low probability win/fail table 161a for setting 1 that is referred to when the setting state of the pachinko machine 10 is "setting 1" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 161b for setting 1 that is referred to when the setting state of is "setting 1" and the win/fail lottery mode is high probability mode is stored. The setting 2 area 162 includes a low probability win/fail table 162a for setting 2 that is referred to when the setting state of the pachinko machine 10 is "setting 2" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 162b for setting 2 that is referred to when the setting state is "setting 2" and the win/fail lottery mode is the high probability mode is stored. The setting 3 area 163 includes a low probability win/fail table 163a for setting 3 that is referred to when the setting state of the pachinko machine 10 is "setting 3" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 163b for setting 3 that is referred to when the setting state is "setting 3" and the win/fail lottery mode is the high probability mode is stored.

The setting 4 area 164 includes a low probability win/fail table 164a for setting 4 that is referred to when the setting state of the pachinko machine 10 is "setting 4" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 164b for setting 4 that is referred to when the setting state is "setting 4" and the win/fail lottery mode is the high probability mode is stored. The setting 5 area 165 includes a low probability win/fail table 165a for setting 5 that is referred to when the setting state of the pachinko machine 10 is "setting 5" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 165b for setting 5 that is referred to when the setting state is "setting 5" and the win/fail lottery mode is the high probability mode is stored. The setting 6 area 166 includes a low probability win/fail table 166a for setting 6 that is referred to when the setting state of the pachinko machine 10 is "setting 6" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 166b for setting 6 that is referred to when the setting state is "setting 6" and the win/fail lottery mode is the high probability mode is stored.

The probability of winning the jackpot set in each of the low probability tables 161a to 166a is different from each other. Specifically, when the low probability table 161a for setting 1 is referenced, the probability of a jackpot result is about 1/320, when the low probability table 162a for setting 2 is referenced, the probability of a jackpot result is about 1/310, when the low probability table 163a for setting 3 is referenced, the probability of a jackpot result is about 1/300, when the low probability table 164a for setting 4 is referenced, the probability of a jackpot result is about 1/290, when the low probability table 165a for setting 5 is referenced, the probability of a jackpot result is about 1/280, and when the low probability table 166a for setting 6 is referenced, the probability of a jackpot result is about 1/270. As a result, when the setting state of the pachinko machine 10 is a high setting value, the probability of a jackpot result is more likely to occur in the low probability mode, which is advantageous for the player.

The probability of winning the jackpot set in each of the high probability tables 161b to 166b is different from each other. Specifically, when the high probability table 161b for setting 1 is referenced, the probability of winning the jackpot is about 1/45, when the high probability table 162b for setting 2 is referenced, the probability of winning the jackpot is about 1/40, when the high probability table 163b for setting 3 is referenced, the probability of winning the jackpot is about 1/35, when the high probability table 164b for setting 4 is referenced, the probability of winning the jackpot is about 1/30, when the high probability table 165b for setting 5 is referenced, the probability of winning the jackpot is about 1/25, and when the high probability table 166b for setting 6 is referenced, the probability of winning the jackpot is about 1/20. As a result, when the setting state of the pachinko machine 10 is a high setting value, the probability of winning the jackpot is higher in the high probability mode, which is advantageous for the player.

In other words, in the first embodiment, the higher the setting value of the pachinko machine 10 is, the higher the winning probability of a jackpot result in the low probability mode is, while the winning probability of a jackpot result in the high probability mode is "setting 1". ~ "Setting 6" The configuration is the same regardless of the setting state, but in this embodiment, both the winning probability of the jackpot result in the low probability mode and the winning probability of the jackpot result in the high probability mode are The configuration is such that the higher the setting value of the machine 10, the higher the setting value. This makes it possible to increase the player's advantage of having a high set value set.

In addition, even if the jackpot result in the low probability mode has a winning probability in the case of "Setting 6" which is the highest setting state, the winning probability in the jackpot result in the high probability mode in the case of "Setting 1" which is the lowest setting state. It is set lower than the probability. As a result, it is possible to prevent the player's advantage from becoming extremely low when the setting state of the pachinko machine 10 is "setting 1", and it is also possible to prevent the player's advantage from becoming extremely low when the setting state of the pachinko machine 10 is "setting 1". 6'', it is possible to prevent the player's advantage from becoming extremely high.

On the other hand, as in the first embodiment, only one type of distribution table 64h is provided so that the distribution table 64h is common to any of the setting states "Setting 1" to "Setting 6". This makes it possible to prevent advantage or disadvantage from occurring depending on the setting state of the pachinko machine 10 regarding the distribution mode of jackpot results, and also allows the storage capacity for storing the distribution table 64h in advance in the main side ROM 64. It becomes possible to suppress the

Note that the probability of winning a jackpot result in the low probability mode is higher when the setting state of the pachinko machine 10 is set to a higher value, while the probability of winning a jackpot result in the high probability mode is higher when the setting state of the pachinko machine 10 is higher. A configuration may be adopted in which the set value is lower. In this case, in the low probability mode, the higher the setting value of the pachinko machine 10, the more advantageous it is to the player, and in the high probability mode, the lower the setting value of the pachinko machine 10, the more advantageous it is to the player. becomes possible.

In addition, the probability of winning a jackpot in the high probability mode is higher when the setting state of the pachinko machine 10 is a higher setting value, while the probability of winning a jackpot in the low probability mode may be constant for the setting states of "Setting 1" to "Setting 6." In this case, the higher the setting state of the pachinko machine 10 is in the high probability mode, the more advantageous it is for the player, and in the low probability mode, it is possible to prevent any advantage or disadvantage due to the setting state of the pachinko machine 10.

<Third embodiment>
This embodiment differs from the first embodiment in how the game history management results are handled when the setting state of the pachinko machine 10 is newly set. Hereinafter, configurations that are different from the first embodiment will be described. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

The management IC 66 is provided with a separate storage memory 171 in addition to each memory in the first embodiment as a memory for storing information. FIG. 34 is an explanatory diagram for explaining the separate storage memory 171. The separate storage memory 171 is a memory that does not require an external power supply to retain memory, such as a NOR flash memory or a NAND flash memory (that is, a nonvolatile storage means), and is used for both reading and writing purposes.

The separate storage memory 171 is provided with a first separate storage area 172, a second separate storage area 173, a third separate storage area 174, a fourth separate storage area 175, and a fifth separate storage area 176. These first to fifth separate storage areas 172 to 176 contain information on the management results of game history calculated when the setting state of the pachinko machine 10 is newly set, more specifically, information on the management results of the game history according to the first embodiment described above. The various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameter, and 41st to 42nd parameters) described in 1. In this case, when the setting state of the pachinko machine 10 is newly set, various parameters are first stored in the first separate storage area 172, and thereafter, each time the setting state of the pachinko machine 10 is newly set, the various parameters are stored in the nth separate storage area 172. The areas to be stored are switched so that the storage areas 172 to 176→n+1 separate storage areas 172 to 176. If the setting state of the pachinko machine 10 is newly set after the various parameters have been stored in the fifth separate storage area 176, the various parameters are stored again in the first separate storage area 172. At this time, various parameters already stored in the first separate storage area 172 are deleted. As a result, various parameters for the pachinko machine 10 until new settings are executed five times are stored in the separate storage memory 171, and the oldest various parameters are erased for more than five times. be remembered for that.

The various parameters stored in the first to fifth separate storage areas 172 to 176 can be read by an external device by connecting the external device to the reading terminal 68d. This makes it possible to grasp the results of game history management before new settings are made to the pachinko machine 10.

Next, the setting update recognition process in this embodiment executed by the management CPU 112 will be explained with reference to the flowchart in FIG. 35.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from a LOW level to a HIGH level (step S1801: YES), the value of the setting value grasp counter in the management RAM 114 is set to "1" (step S1802). The setting value grasp counter is a counter for identifying the setting value of the pachinko machine 10 by the management CPU 112; for example, a setting value grasp counter value of "1" means "setting 1," and a setting value grasp counter value of "6" means "setting 6."

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S1803). If a positive determination is made in step S1803, the value of the setting value grasp counter in the management RAM 114 is incremented by 1 (step S1804). This causes the setting value of the pachinko machine 10 identified by the management CPU 112 to increase by one level.

If a negative determination is made in step S1803 or if the process in step S1804 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , it is determined whether a setting value identification end command has been received from the main CPU 63 (step S1805). If a negative determination is made in step S1805, the process returns to step S1803.

If a positive judgment is made in step S1805, a process for monitoring repeated changes is executed (step S1806). The process for monitoring repeated changes is described in detail below, but executes a process for notifying the user when new settings of the setting state of the pachinko machine 10 are repeatedly made in a short period of time. In a configuration in which various parameters are stored in the separate storage memory 171 each time a new setting of the setting state of the pachinko machine 10 is made, it is expected that new settings of the setting state of the pachinko machine 10 will be repeatedly made in a short period of time in order to intentionally erase the management results of the game history when play has been performed over a predetermined period of time. In response to this, the process for monitoring repeated changes is executed, and a corresponding notification is executed when such an action is taken.

After that, various calculation processes are executed (step S1807). In the various calculation processes, the processes of steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed. As a result, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameter, and 41st to 42nd parameters) are calculated using the history information stored in the history memory 117 at that time.

Thereafter, the various parameters calculated in step S1807 are stored in the area to be stored this time among the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 (step S1808). A pointer information area is set in the separate storage memory 171 to enable the management CPU 112 to specify an area to be stored among the first to fifth separate storage areas 172 to 176. The information in the pointer information area is such that when various parameters are stored in the area to be stored among the first to fifth separate storage areas 172 to 176, the storage target is changed to the area in the next order. will be updated. By executing the process of step S1808, various parameters at that time point are stored in the separate storage memory 171 for the current new settings of the pachinko machine 10.

Then, the history memory 117 is cleared to "0" (step S1809). In other words, in this embodiment, the history information in the history memory 117 is erased not only when the history information is read by an external device connected to the reading terminal 68d, but also when the setting state of the pachinko machine 10 is newly set.

Then, RTC information, which is date information and time information, is read from the RTC 115 (step S1810). Then, a write process to the history memory 117 is executed (step S1811). In the write process, the pointer information of the history area 124 currently being written is identified by referring to the pointer area 126 of the history memory 117, and the RTC information read in step S1810 is written to the history information storage area 125 of the history area 124 corresponding to the pointer information being written. In addition, both information for identifying the setting value and information on the value of the setting value grasp counter are written to the history information storage area 125 corresponding to the pointer information being written. As a result, a combination of information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made is stored as history information.

After that, the target pointer is updated (step S1812). In this update, the numerical information stored in the pointer area 126 of the history memory 117 is read and incremented by one. It is determined whether the pointer information after the increment of one has exceeded the maximum value of the pointer information in the history area 124. If the maximum value has not been exceeded, the pointer information after the increment of one is overwritten in the pointer area 126 as the new pointer information to be written. If the maximum value has been exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

Next, the repeated change monitoring process executed in step S1806 will be explained with reference to the flowchart in FIG. 36.

First, it is determined whether the number of times a game has been played since the setting state of the pachinko machine 10 was last set is within a reference number (specifically, 100 times) (step S1901). Specifically, by counting the number of history information storage areas 125 in which correspondence information indicating the start of a game is stored in the history area 124 of the history memory 117, the number of times a game has been played since the setting state of the pachinko machine 10 was last set is determined, and it is further determined whether the determined number of times a game has been played is within a reference number (specifically, 100 times).

If the determination in step S1901 is positive, the value of the repeat change counter provided in the separate storage memory 171 is incremented by 1 (step S1902). As already explained, the separate storage memory 171 is a memory that does not require an external power supply to store and retain the value of the repeat change counter, so no external power supply is required to store and retain the value of the repeat change counter.

Thereafter, it is determined whether the value of the repeat change counter after adding 1 exceeds the notification reference value "5" (step S1903). The notification reference value corresponds to the number of first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171. Therefore, in step S1903, the number of times the new setting of the setting state of the pachinko machine 10 is repeated without intervening the execution of game times exceeding the reference number of times is determined to be the number of the first to fifth separate storage areas 172 to 176. It is determined whether the limit has been exceeded or not.

If the determination in step S1903 is affirmative, a repeat change display process is executed (step S1904). In the repeat change display process, the display contents of the first to third notification display devices 69a to 69c are set to the repeat change display contents corresponding to the number of times that the new setting of the setting state of the pachinko machine 10 has been repeated in a short period of time that exceeds the notification reference value. The repeat change display contents are display contents that display "E" in all of the first to third notification display devices 69a to 69c, and this display content does not occur in other situations. In addition, the state in which the repeat change display contents are displayed in the first to third notification display devices 69a to 69c continues until the repeat change flag provided in the separate storage memory 171 is cleared to "0". The repeat change flag is a flag for the management side CPU 112 to identify that it is a situation in which the repeat change display contents should be displayed in the first to third notification display devices 69a to 69c. Also, if the repeat change flag is set to "1" and the repeat change display content is being displayed on the first to third notification display devices 69a to 69c, the display process (FIG. 31) in the first embodiment is not executed. After that, the repeat change flag in the separate storage memory 171 is set to "1" (step S1905).

If the determination in step S1901 is negative, the value of the repeat change counter in the separate storage memory 171 is cleared to "0" (step S1906). Then, on condition that the repeat change flag in the separate storage memory 171 is set to "1" (step S1907: YES), the display of the repeat change display contents on the first to third notification display devices 69a to 69c is terminated (step S1908), and the repeat change flag is cleared to "0" (step S1909).

According to this embodiment described in detail above, the following excellent effects are achieved.

When a new setting of the setting state of the pachinko machine 10 is performed, the history information stored in the history memory 117 is deleted. Thereby, it becomes possible to leave in the history memory 117 the history information of the games executed after the new settings of the pachinko machine 10 have been made.

When a new setting of the setting state of the pachinko machine 10 is performed, various parameters are calculated as a gaming history management result using the history information in the history memory 117 at that time. This makes it possible to grasp the management results of the game history in the situation before a new setting is made in the pachinko machine 10. Furthermore, even if the history information in the history memory 117 is deleted when a new setting is made to the setting state of the pachinko machine 10, it is not possible to grasp the management results of the gaming history based on the history information to be deleted. It becomes possible.

In a configuration in which various parameters are calculated using the history information in the history memory 117 at that time when a new setting state is set in the pachinko machine 10, the various calculated parameters are stored in a separate storage memory. 171. As a result, even if a new setting is made in the pachinko machine 10, it is possible to grasp the management result of the gaming history in the situation before the setting is made at any subsequent timing.

By providing a plurality of separate storage areas 172 to 176 in the separate storage memory 171, it is possible to store various parameters corresponding to the setting timing of a plurality of setting states. This makes it possible to grasp the management results of game history over a plurality of periods based on the timing when a new setting state is set. Furthermore, even if new settings for the pachinko machine 10 are repeated under conditions in which no games are being played, various parameters calculated using historical information of the conditions in which games are actually being played will remain unchanged. It is possible to increase the possibility that the data remains in the separate storage memory 171.

The various parameters stored in the first to fifth separate storage areas 172 to 176 can be read by an external device by connecting it to the reading terminal 68d. Thereby, it becomes possible to grasp the management result of the gaming history before a new setting of the setting state is performed in the pachinko machine 10.

In the configuration in which various parameters are stored in the separate storage memory 171 each time a new setting of the pachinko machine 10 is made, the management results of the game history are intended to be used when games are played over a predetermined period of time. It is assumed that a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time in order to erase the setting state. On the other hand, by repeatedly executing the change monitoring process, if such an act is performed, a corresponding notification will be issued. This makes it possible to notify the administrator and the like that new settings for the setting state of the pachinko machine 10 have been repeatedly made in a short period of time.

The fact that new settings of the pachinko machine 10 have been repeatedly made in a short period of time is notified by the first to third notification display devices 69a to 69c. This makes it possible to notify that new settings of the pachinko machine 10 have been repeatedly made in a short period of time by using the first to third notification display devices 69a to 69c for notifying the results of game history management.

In a situation where it is necessary to notify that a new setting of the setting state of the pachinko machine 10 has been repeatedly made in a short period of time, the display contents of the repeated change will continue to be displayed on the first to third notification display devices 69a to 69c. , the notification of the game history management results during normal times is not performed on the first to third notification display devices 69a to 69c. This makes it possible to emphasize the notification that a new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time.

In the above, a notification corresponding to the event where the number of times the game is played after the new setting of the setting state of the pachinko machine 10 is within a reference number of times exceeds a notification reference value and the event where the new setting is performed continues beyond the notification reference value, but the present invention is not limited to this. A notification corresponding to the event where the total number of game balls discharged from the play area PA after the new setting of the setting state of the pachinko machine 10 is within a reference number and the event where the new setting is performed continues beyond the notification reference value may be configured to be executed. Also, a notification corresponding to the event where the total number of game balls discharged into a predetermined ball entry section (e.g., any one of the outlet 24a, the general winning port 31, the first operating port 33, and the second operating port 34, or a predetermined combination) after the new setting of the setting state of the pachinko machine 10 is within a reference number and the event where the new setting is performed continues beyond the notification reference value may be configured to be executed. In addition, the system may be configured such that, when the total number of pieces of history information newly stored in the history memory 117 after a new setting of the setting state of the pachinko machine 10 is within a reference number, if the number of consecutive events for which the new setting is performed exceeds a notification reference value, a corresponding notification is issued.

Furthermore, when a new setting of the setting state of the pachinko machine 10 is executed exceeding the notification reference value within the monitoring reference period (for example, 600 seconds), a corresponding notification may be executed.

In addition, if the number of games played after the new setting of the pachinko machine 10 is set is within the standard number of times, and the event in which the new setting is performed exceeds the notification standard value and continues. However, the setting value was changed in a situation where the number of games played after the new setting of the pachinko machine 10 was set was within the standard number of times. It may also be configured such that when an event continues to exceed a notification reference value, a corresponding notification is executed.

In addition, in a situation where the number of times a game has been played since a new setting of the setting state of the pachinko machine 10 is made is within a reference number of times, and the event in which the new setting is made exceeds a notification reference value and continues to occur, a corresponding notification is executed. However, it may also be configured so that in a situation where the number of times a game has been played since a new setting of the setting state of the pachinko machine 10 is made is within a reference number of times, and the event in which various parameters are calculated due to the new setting is exceeded, and continues to occur, a corresponding notification is executed.

In addition, if the number of games played after the new setting of the pachinko machine 10 is set is within the standard number of times, and the event in which the new setting is performed exceeds the notification standard value and continues. Although the configuration has been described in which a corresponding notification is executed, in addition to or in place of this, a configuration may also be adopted in which the progress of the game is restricted for a predetermined period (for example, one hour).

<Fourth embodiment>
This embodiment differs from the third embodiment in that the repeat change monitoring process is executed by the main CPU 63. Hereinafter, configurations that are different from the third embodiment described above will be explained. Note that descriptions of the same configurations as in the third embodiment will be basically omitted.

Figure 37 is a flowchart showing the repeat change monitoring process executed by the main CPU 63. The repeat change monitoring process is executed when the setting value update process (step S118) is executed in the main process ( Figure 9 ). In other words, the repeat change monitoring process is executed when the setting state of the pachinko machine 10 is newly set. However, this is not limited to this, and the repeat change monitoring process may be configured to be executed when the setting value is changed.

First, it is determined whether the number of games played since the setting state of the pachinko machine 10 was last set is within a reference number (specifically, 100 times) (step S2001). The main side RAM 65 is provided with a game counter for counting the number of games played after the setting state of the pachinko machine 10 is newly set. Each time the number of games is played, the value of the number of games counter is incremented by one. The game count counter is excluded from being cleared to "0" even when the main side RAM 65 clearing process (steps S105 and S117) is executed.

When an affirmative determination is made in step S2001, the value of the repetition change counter provided in the main side RAM 65 is incremented by 1 (step S2002). The repeated change counter is excluded from being cleared to "0" even when the main side RAM 65 clearing process (steps S105 and S117) is executed.

Thereafter, it is determined whether the value of the repeat change counter after adding 1 exceeds the notification reference value "5" (step S2003). The notification reference value corresponds to the number of first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171. Therefore, in step S2003, the number of times that the setting state of the pachinko machine 10 has been newly set without intervening the execution of the game number exceeding the reference number of times is determined to be the number of the first to fifth separate storage areas 172 to 176. It is determined whether the limit has been exceeded or not.

If a positive judgment is made in step S2003, the repeat change flag stored in the main RAM 65 is set to "1" (step S2004). The repeat change flag is a flag for the main CPU 63 to identify a situation in which a repeat change notification should be made. The repeat change flag is excluded from being cleared to "0" even when the clear process of the main RAM 65 (steps S105, S117) is executed.

If a negative determination is made in step S2001, the value of the repeat change counter in the main side RAM 65 is cleared to "0" (step S2005). Thereafter, on the condition that the repeat change flag in the main side RAM 65 is set to "1" (step S2006: YES), the repeat change flag is cleared to "0" (step S2007).

In the repeat change monitoring process, if the repeat change flag in the main side RAM 65 is set to "1" (step S2008: YES), a repeat change notification command is sent to the audio emission control device 81 (step S2009). When the audio light emission control device 81 receives a repeat change notification command, it causes the symbol display device 41, the display light emitting section 53, and the speaker section 54 to notify the repeat change. The notification of the repeated change continues until the supply of operating power to the audio emission control device 81 is stopped.

The above configuration makes it possible to notify the user that new settings of the pachinko machine 10 have been repeatedly made in a short period of time based on control by the main CPU 63. In addition, since the notification is made by the pattern display device 41, the display light-emitting unit 53, and the speaker unit 54, it is possible to make the administrator aware that new settings of the pachinko machine 10 have been repeatedly made in a short period of time without having to open the gaming machine main body 12 forward relative to the outer frame 11.

Additionally, in addition to or in place of the configuration in which, when new settings of the pachinko machine 10 are repeatedly made in a short period of time, a notification command for repeated changes is sent from the main CPU 63 to the sound emission control device 81. A configuration may also be adopted in which external output corresponding to this is performed.

Further, a configuration may be adopted in which the main side CPU 63 executes the repeated change monitoring process in this embodiment, and the management side CPU 112 executes the repeated change monitoring process in the third embodiment. This makes it possible to strictly monitor whether new settings of the setting state of the pachinko machine 10 are repeatedly performed in a short period of time.

Fifth embodiment
In this embodiment, the processing configuration of the setting update recognition process in the management CPU 112 is different from that of the third embodiment. The configuration that differs from the third embodiment will be described below. Note that the description of the same configuration as the third embodiment will basically be omitted.

Figure 38 is a flowchart showing the setting update recognition process in this embodiment executed by the management CPU 112.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from LOW level to HI level (step S2101: YES), the value of the setting value grasping counter of the management side RAM 114 is set to "1". settings (step S2102). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means that the setting is "setting 6".

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S2103). If a positive determination is made in step S2103, the value of the setting value grasp counter in the management RAM 114 is incremented by 1 (step S2104). This causes the setting value of the pachinko machine 10 identified by the management CPU 112 to increase by one level.

If a negative determination is made in step S2103, or if the processing of step S2104 is executed, it is determined whether or not a set value identification end command has been received from the main CPU 63 based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121 (step S2105). If a negative determination is made in step S2105, the processing returns to step S2103.

If a positive judgment is made in step S2105, it is judged whether or not a predetermined number of predetermined history information pieces exist in the history memory 117 (step S2106). Specifically, by counting the number of history information storage areas 125 in which correspondence information indicating the start of a game is stored in the history area 124 of the history memory 117, the number of game times executed since the setting state of the pachinko machine 10 was last set is grasped, and further, it is judged whether or not the grasped number of game times exceeds a reference number (specifically, 100 times). However, this is not limited to this, and it may be configured to judge in step S2106 whether or not the number of history information storage areas 125 in which correspondence information indicating that a game ball has been discharged from the game area PA is stored exceeds a reference number (specifically, 1000 balls). Also, in step S2106, it may be determined whether the number of history information storage areas 125 in which correspondence information indicating that a game ball has entered a predetermined ball entry portion (for example, any one of the out port 24a, the general winning port 31, the first actuation port 33, and the second actuation port 34, or a predetermined combination) is stored exceeds a reference number (specifically, 1000). Also, in step S2106, it may be determined whether the total number of pieces of history information stored in the history memory 117 exceeds a reference number (specifically, 1000).

In the above, a notification corresponding to the event where the number of times the game is played after the new setting of the setting state of the pachinko machine 10 is within a reference number of times exceeds a notification reference value and the event where the new setting is performed continues beyond the notification reference value, but the present invention is not limited to this. A notification corresponding to the event where the total number of game balls discharged from the play area PA after the new setting of the setting state of the pachinko machine 10 is within a reference number and the event where the new setting is performed continues beyond the notification reference value may be configured to be executed. Also, a notification corresponding to the event where the total number of game balls discharged into a predetermined ball entry section (e.g., any one of the outlet 24a, the general winning port 31, the first operating port 33, and the second operating port 34, or a predetermined combination) after the new setting of the setting state of the pachinko machine 10 is within a reference number and the event where the new setting is performed continues beyond the notification reference value may be configured to be executed. In addition, the system may be configured such that, when the total number of pieces of history information newly stored in the history memory 117 after a new setting of the setting state of the pachinko machine 10 is within a reference number, if the number of consecutive events for which the new setting is performed exceeds a notification reference value, a corresponding notification is issued.

If an affirmative determination is made in step S2106, various calculation processes are executed (step S2107). In the various arithmetic operations, steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed. As a result, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, and 41st parameters) are ~42nd parameter) are calculated.

Then, the various parameters calculated in step S2107 are stored in the area currently being stored among the first to fifth separate storage areas 172-176 in the separate storage memory 171 (step S2108). A pointer information area is set in the separate storage memory 171 to enable the management CPU 112 to identify the area currently being stored among the first to fifth separate storage areas 172-176. The information in the pointer information area is updated so that when various parameters are stored in the area currently being stored among the first to fifth separate storage areas 172-176, the storage target is changed to the next area in the order. By executing the process of step S2108, the various parameters at that time are stored in the separate storage memory 171 for the new setting of the current setting state of the pachinko machine 10.

If a negative determination is made in step S2106, or if the processing of step S2108 is executed, the history memory 117 is cleared to "0" (step S2109). In other words, in this embodiment, the history information in the history memory 117 is erased not only when the history information is read by an external device connected to the reading terminal 68d, but also when the setting state of the pachinko machine 10 is newly set.

Then, RTC information, which is date information and time information, is read from the RTC 115 (step S2110). Then, a write process to the history memory 117 is executed (step S2111). In the write process, the pointer information of the history area 124 currently being written is identified by referring to the pointer area 126 of the history memory 117, and the RTC information read in step S2110 is written to the history information storage area 125 of the history area 124 corresponding to the pointer information being written. In addition, both information for identifying the setting value and information on the value of the setting value grasp counter are written to the history information storage area 125 corresponding to the pointer information being written. As a result, a combination of information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made is stored as history information.

After that, the target pointer is updated (step S2112). In this update, the numerical information stored in the pointer area 126 of the history memory 117 is read and incremented by one. It is determined whether the pointer information after the increment of one has exceeded the maximum value of the pointer information in the history area 124. If the maximum value has not been exceeded, the pointer information after the increment of one is overwritten in the pointer area 126 as the new pointer information to be written. If the maximum value has been exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

According to the above configuration, when the setting state of the pachinko machine 10 is newly set, on the condition that a predetermined number or more of history information is stored in the history memory 117, the history information is stored in the history memory 117. Various parameters are calculated using the history information and are stored in the separate storage memory 171. As a result, even if new settings for the pachinko machine 10 are repeatedly made in a short period of time, the separate storage memory 171 will essentially retain information on the management results of game history as a result of games being played. It becomes possible to store the information.

Note that the process in step S2109 may be executed on the condition that the processes in step S2107 and step S2108 have been executed. That is, the history information stored in the history memory 117 is erased on condition that a predetermined number or more of history information is stored in the history memory 117. This makes it possible to prevent the history information in the history memory 117 from being erased even if new settings of the pachinko machine 10 are repeatedly made in a short period of time.

<Sixth embodiment>
This embodiment is different from the first embodiment in the configuration of the history memory 117. Hereinafter, configurations that are different from the first embodiment will be explained. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 39 is an explanatory diagram for explaining the configuration of the history memory 117 in this embodiment.

The history memory 117 is provided with a total area 141, a first state area 142, a second state area 143, and a third state area 144. First to fourteenth counters 141a to 141n, 142a to 142n, 143a to 143n, and 144a to 144n are provided in each of these areas 141 to 144, respectively. The first counters 141a to 144a of each area 141 to 144 store information on the number of times the output state of the first signal input to the first buffer 122a is changed from LOW level to HI level. The second counters 141b to 144b of each of the areas 141 to 144 store information on the number of times the output state of the second signal input to the second buffer 122b is changed from LOW level to HI level. The third counters 141c to 144c of each area 141 to 144 store information on the number of times the output state of the third signal input to the third buffer 122c is changed from LOW level to HI level. The fourth counters 141d to 144d of each of the areas 141 to 144 store information on the number of times the output state of the fourth signal input to the fourth buffer 122d is changed from LOW level to HI level. The fifth counters 141e to 144e of each area 141 to 144 store information on the number of times the output state of the fifth signal input to the fifth buffer 122e is changed from LOW level to HI level. The sixth counters 141f to 144f of each area 141 to 144 store information on the number of times the output state of the sixth signal input to the sixth buffer 122f has changed from LOW level to HI level. The seventh counters 141g to 144g of each area 141 to 144 store information on the number of times the output state of the seventh signal input to the seventh buffer 122g is changed from LOW level to HI level. The eighth counters 141h to 144h of each area 141 to 144 store information on the number of times the output state of the eighth signal input to the eighth buffer 122h is changed from LOW level to HI level. The ninth counters 141i to 144i of each area 141 to 144 store information on the number of times the output state of the ninth signal input to the ninth buffer 122i is changed from LOW level to HI level. The tenth counters 141j to 144j of each of the areas 141 to 144 store information on the number of times the output state of the tenth signal input to the tenth buffer 122j is changed from LOW level to HI level. The eleventh counters 141k to 144k of each area 141 to 144 store information on the number of times the output state of the eleventh signal input to the eleventh buffer 122k has changed from LOW level to HI level. The twelfth counters 141l to 144l of each area 141 to 144 store information on the number of times the output state of the twelfth signal input to the twelfth buffer 122l is changed from LOW level to HI level. The thirteenth counters 141m to 144m of the respective areas 141 to 144 store information on the number of times the output state of the thirteenth signal input to the thirteenth buffer 122m is changed from the LOW level to the HI level. The fourteenth counters 141n to 144n of each of the areas 141 to 144 store information on the number of times the output state of the fourteenth signal input to the fourteenth buffer 122n is changed from LOW level to HI level.

FIG. 40 is a flowchart showing the history setting process in this embodiment executed by the management CPU 112.

First, the number of buffers to be checked by the management CPU 112 among the first to fourteenth buffers 122a to 122n is set in the check target counter of the management side RAM 114 (step S2201). Specifically, among the first to fourteenth correspondence areas 123a to 123n in the correspondence memory 116, the number of correspondence areas in which information other than information indicating blankness is stored is identified, and the number of correspondence areas is identified. Set the information of the number in the confirmation target counter. In this pachinko machine 10, since information other than information indicating blankness is stored in the first to eleventh correspondence areas 123a to 123k, "11" is set in the check target counter in step S2201.

Thereafter, it is determined whether the buffers 122a to 122n corresponding to the current counters to be checked are buffers to which state information signals are input (step S2202). Specifically, in the correspondence areas 123a to 123n corresponding to the current value of the counter to be checked, information indicating that the opening/closing execution mode is in effect, information indicating that it is in the high-frequency support mode, and It is determined whether any of the information indicating that it is the front door frame 14 is stored.

If the determination in step S2202 is affirmative, a setting process for state information is executed (step S2203). In this setting process, when the output state of the eighth signal indicating whether or not the opening/closing execution mode is in progress is switched from LOW level to HI level, first state information indicating that the opening/closing execution mode is in progress is stored in the management RAM 114, and when the output state of the eighth signal is switched from HI level to LOW level, the first state information is erased from the management RAM 114. In addition, when the output state of the ninth signal indicating whether or not the high frequency support mode is in progress is switched from LOW level to HI level, second state information indicating that the high frequency support mode is in progress is stored in the management RAM 114, and when the output state of the ninth signal is switched from HI level to LOW level, the second state information is erased from the management RAM 114. In addition, when the output state of the 10th signal, which indicates whether the front door frame 14 is open or not, switches from a LOW level to a HIGH level, information on the third state, which indicates that the front door frame 14 is open, is stored in the management RAM 114, and when the output state of the 10th signal switches from a HIGH level to a LOW level, information on the third state is erased from the management RAM 114.

If a negative determination is made in step S2202 or if the process in step S2203 is executed, the numerical information stored in the buffer corresponding to the current check target counter value among the first to fourteenth buffers 122a to 122n is , it is determined whether the output state of the input signal from the main CPU 63 to the buffer has been switched from LOW level to HI level by checking whether it has been changed from "0" to "1" ( Step S2204). Note that if the numerical information stored in the eighth buffer 122h is changed from "0" to "1" in a situation where the current value of the counter to be checked is the value corresponding to the eighth buffer 122h, the process proceeds to step S2203. The first state information is stored in the management side RAM 114, and an affirmative determination is made in step S2204. Further, if the numerical information stored in the ninth buffer 122i is changed from "0" to "1" in a situation where the current value of the counter to be checked is a value corresponding to the ninth buffer 122i, the process proceeds to step S2203. The second state information is stored in the management side RAM 114, and an affirmative determination is made in step S2204. Furthermore, if the numerical information stored in the tenth buffer 122j is changed from "0" to "1" in a situation where the current value of the counter to be checked is the value corresponding to the tenth buffer 122j, the process proceeds to step S2203. Information on the third state is stored in the management side RAM 114, and an affirmative determination is made in step S2204.

If the determination in step S2204 is positive, an addition process is performed on the corresponding total counter (step S2205). In this addition process, one is added to the value of the counter that corresponds to the current value of the counter to be checked, among the first to fourteenth total counters 141a to 141n in the total area 141 of the history memory 117. For example, if the value of the counter to be checked is "11", the eleventh total counter 141k is added, if the value of the counter to be checked is "5", the fifth total counter 141e is added, and if the value of the counter to be checked is "1", the first total counter 141a is added.

Then, by referring to the state information of the management RAM 114, it is determined whether or not the state is the first state, i.e., whether or not the state is in the open/close execution mode (step S2206). If the state is the first state (step S2206: YES), an increment process is performed on the corresponding counter for the first state (step S2207). In this increment process, one is incremented from the value of the counter corresponding to the current value of the counter to be checked among the first to fourteenth counters 142a to 142n for the first state in the first state area 142 of the history memory 117. For example, if the value of the counter to be checked is "11", the eleventh counter 142k for the first state is the increment target, if the value of the counter to be checked is "5", the fifth counter 142e for the first state is the increment target, and if the value of the counter to be checked is "1", the first counter 142a for the first state is the increment target.

Then, by referring to the state information of the management RAM 114, it is determined whether or not the state is the second state, i.e., whether or not the state is in the high frequency support mode (step S2208). If the state is the second state (step S2208: YES), an increment process is performed on the corresponding counter for the second state (step S2209). In this increment process, one is incremented from the value of the counter corresponding to the current value of the counter to be checked among the first to fourteenth counters 143a to 143n for the second state in the second state area 143 of the history memory 117. For example, if the value of the counter to be checked is "11", the eleventh counter 143k for the second state is the increment target, if the value of the counter to be checked is "5", the fifth counter 143e for the second state is the increment target, and if the value of the counter to be checked is "1", the first counter 143a for the second state is the increment target.

Then, by referring to the state information of the management RAM 114, it is determined whether or not the state is the third state, that is, whether or not the front door frame 14 is open (step S2210). If the state is the third state (step S2210: YES), an increment process is performed on the corresponding counter for the third state (step S2211). In this increment process, one is incremented from the value of the counter corresponding to the current value of the counter to be checked among the first to fourteenth counters 144a to 144n for the third state in the third state area 144 of the history memory 117. For example, if the value of the counter to be checked is "11", the eleventh counter 144k for the third state is the increment target, if the value of the counter to be checked is "5", the fifth counter 144e for the third state is the increment target, and if the value of the counter to be checked is "1", the first counter 144a for the third state is the increment target.

If a negative judgment is made in step S2204, if a negative judgment is made in step S2210, or if the processing of step S2211 is executed, the value of the confirmation target counter in the management RAM 114 is decremented by 1 (step S2212). Then, it is determined whether the value of the confirmation target counter after the decrement is "0" (step S2213). If the value of the confirmation target counter is 1 or greater (step S2213: NO), the processing from step S2202 onwards is executed for the confirmation target corresponding to the new confirmation target counter value.

By executing the history setting process as described above, the number of times game balls enter the outlet 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34, the number of times the open/close execution mode has occurred, the number of times the high frequency support mode has occurred, and the number of times a game has occurred are stored as number information, rather than as history information as in the first embodiment above. This makes it possible to reduce the storage capacity required in the history memory 117, compared to a configuration in which each piece of history information is stored individually.

By storing the number of times information instead of history information in this way, there is no need to execute a process to derive the number of times information from the history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

Next, the setting update recognition process in this embodiment executed by the management CPU 112 will be explained with reference to the flowchart in FIG. 41.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from a LOW level to a HIGH level (step S2301: YES), the value of the setting value grasp counter in the management RAM 114 is set to "1" (step S2302). The setting value grasp counter is a counter for identifying the setting value of the pachinko machine 10 by the management CPU 112; for example, a setting value grasp counter value of "1" means "setting 1," and a setting value grasp counter value of "6" means "setting 6."

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S2303). If a positive determination is made in step S2303, the value of the setting value grasp counter in the management RAM 114 is incremented by 1 (step S2304). This causes the setting value of the pachinko machine 10 identified by the management CPU 112 to increase by one level.

If a negative judgment is made in step S2303, or if the processing of step S2304 is executed, it is judged whether or not a set value identification end command has been received from the main CPU 63 based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121 (step S2305). If a negative judgment is made in step S2305, the processing returns to step S2303.

If a positive judgment is made in step S2305, the eleventh total counter 141k, which measures the number of times a game has been played in the total area 141 in the history memory 117, the eighth total counter 141h, which measures the number of times the open/close execution mode has occurred in the total area 141 in the history memory 117, and the ninth total counter 141i, which measures the number of times the high frequency support mode has occurred in the total area 141 in the history memory 117, are each cleared to "0" (steps S2306 to S2308). As a result, the number of times a game has been played, the number of times the open/close execution mode has occurred, and the number of times the high frequency support mode has occurred are cleared to "0" in response to the new setting of the setting state of the pachinko machine 10. Therefore, the calculation results of the 31st parameter indicating the number of times the open/close execution mode occurs per unit game, the 41st parameter indicating the number of times the high-frequency support mode occurs per unit game, and the 42nd parameter indicating the ratio of the number of times the high-frequency support mode occurs to the number of times the open/close execution mode occurs correspond to the game content after the setting state of the pachinko machine 10 is newly set. In a configuration in which the probability of winning the jackpot result changes when the setting value of the pachinko machine 10 is changed, by making the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter correspond to the game content after the setting state of the pachinko machine 10 is newly set as described above, it becomes possible to determine whether the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are appropriate based on the current setting value.

On the other hand, even if a new setting is made to the setting state of the pachinko machine 10, counters other than the eighth counter 141h for the total, the ninth counter 141i for the total, and the eleventh counter 141k for the total are not cleared to "0" in the history memory 117. This makes it possible to manage the number of balls entering each history target ball entry section or the frequency of balls entering each section based on the long-term game history, without being affected by the new setting of the setting state of the pachinko machine 10.

According to the above configuration, the number of times a game ball enters the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34, the number of times the opening/closing execution mode occurs, and the high frequency support The number of times a mode has occurred and the number of times a game has occurred are not stored as history information as in the first embodiment, but are stored as number information. This makes it possible to reduce the storage capacity required in the history memory 117 compared to a configuration in which each piece of history information is stored individually.

In addition, because the information is stored as frequency information rather than history information, there is no need to execute a process to derive frequency information from history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

The information on the number of times the game is played, the number of times the open/close execution mode occurs, and the number of times the high-frequency support mode occurs is cleared to "0" when the setting state of the pachinko machine 10 is newly set. Therefore, the calculation results of the 31st parameter indicating the number of times the open/close execution mode occurs per unit game, the 41st parameter indicating the number of times the high-frequency support mode occurs per unit game, and the 42nd parameter indicating the ratio of the number of times the high-frequency support mode occurs to the number of times the open/close execution mode occurs correspond to the game content after the setting state of the pachinko machine 10 is newly set. In a configuration in which the probability of winning the jackpot is changed when the setting value of the pachinko machine 10 is changed, by making the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter correspond to the game content after the setting state of the pachinko machine 10 is newly set as described above, it becomes possible to determine whether the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are appropriate based on the current setting value.

On the other hand, even if a new setting is made to the setting state of the pachinko machine 10, counters other than the eighth counter 141h for the total, the ninth counter 141i for the total, and the eleventh counter 141k for the total are not cleared to "0" in the history memory 117. This makes it possible to manage the number of balls entering each history target ball entry section or the frequency of balls entering each section based on the long-term game history, without being affected by the new setting of the setting state of the pachinko machine 10.

Note that the configuration of the history memory 117 as in this embodiment may be applied to the first to fifth embodiments and the embodiments described after this embodiment. For example, when applied to the first embodiment described above, even if a new setting is made to the setting state of the pachinko machine 10, the information in the history memory 117 is maintained as is. Further, when applied to the third embodiment, when a new setting of the setting state of the pachinko machine 10 is performed, the entire history memory 117 is cleared to "0".

In addition, the process of steps S2306 to S2308 may be executed in the setting update recognition process (FIG. 41) when the setting value of the pachinko machine 10 is changed. This makes it possible to clear to "0" the information on the number of times play has been performed, the information on the number of times the open/close execution mode has occurred, and the information on the number of times the high frequency support mode has occurred, even if a new setting has been made to the setting state of the pachinko machine 10, if the setting value has not been changed before and after the setting has been made, and to clear to "0" the information on the number of times play has been performed, the information on the number of times the open/close execution mode has occurred, and the information on the number of times the high frequency support mode has occurred, if the setting value of the pachinko machine 10 has been changed.

In addition, in the setting update recognition process (FIG. 41), various parameters are calculated using the counters 141 to 144 of the history memory 117 before the processes of steps S2306 to S2308 are executed. Various parameters may be stored in the calculation result memory 131.

<Seventh embodiment>
This embodiment is different from the first embodiment in the configuration of the history memory 117. Hereinafter, configurations that are different from the first embodiment will be described. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

Figure 42 is an explanatory diagram for explaining the configuration of the history memory 117 in this embodiment.

The history memory 117 includes history memories 181 to 186 corresponding to the setting states of the pachinko machine 10, "setting 1" to "setting 6." Specifically, a history memory 181 for setting 1 is provided in correspondence with "setting 1," a history memory 182 for setting 2 is provided in correspondence with "setting 2," a history memory 183 for setting 3 is provided in correspondence with "setting 3," a history memory 184 for setting 4 is provided in correspondence with "setting 4," a history memory 185 for setting 5 is provided in correspondence with "setting 5," and a history memory 186 for setting 6 is provided in correspondence with "setting 6."

Each of the history memories 181 to 186 for settings 1 to 6 is provided with a combination of the history area 124 and the pointer area 126 of the history memory 117 in the first embodiment. This makes it possible to store history information in correspondence with each of the setting states of the pachinko machine 10 from "setting 1" to "setting 6." In this case, when a new setting is made for the setting state of the pachinko machine 10, the history memories 181 to 186 corresponding to the setting value for which the new setting is made are stored as history information. , it becomes possible to store history information separately for each setting value without erasing the history information when setting a new setting state of the pachinko machine 10. Further, since various parameters are calculated using history information corresponding to the currently set setting state of the pachinko machine 10, it is possible to appropriately derive various parameters corresponding to each set value.

Note that the history memories 181-186 for settings 1-6 may each be configured to contain a combination of the total area 141, first state area 142, second state area 143, and third state area 144 in the sixth embodiment.

Next, the setting update recognition process in this embodiment executed by the management CPU 112 will be explained with reference to the flowchart in FIG. 43.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from LOW level to HIGH level (step S2401: YES), the value of the setting value grasp counter provided in the calculation result memory 131 is set to "1" (step S2402). The setting value grasp counter is a counter for identifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, a setting value grasp counter value of "1" means "setting 1", and a setting value grasp counter value of "6" means "setting 6". In this embodiment, the setting value grasp counter is provided in the calculation result memory 131, which is a memory that does not require an external power supply to retain memory, so the value stored in the setting value grasp counter is retained even if the supply of operating power to the management IC 66 is stopped.

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S2403). If a positive determination is made in step S2403, the value of the setting value grasp counter in the calculation result memory 131 is incremented by 1 (step S2404). This causes the setting value of the pachinko machine 10 identified by the management CPU 112 to increase by one level.

If a negative determination is made in step S2403, or if the processing of step S2404 is executed, it is determined whether or not a set value identification end command has been received from the main CPU 63 based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121 (step S2405). If a negative determination is made in step S2405, the processing returns to step S2403.

If an affirmative determination is made in step S2405, the history memories 181 to 186 corresponding to the value of the setting value understanding counter of the calculation result memory 131 are set as the storage target of history information and the reference target when calculating various parameters ( Step S2406). Specifically, if the value of the setting value grasp counter is "1", it means that "setting 1" has been set, so the history memory 181 for setting 1 is used as a storage target for history information and for various parameters. Set as a reference target during calculation. In addition, if the value of the setting value understanding counter is "2", it means that "setting 2" has been set, so the history memory 182 for setting 2 is used as a storage target for history information and when calculating various parameters. Set as a reference target. In addition, if the value of the setting value understanding counter is "3", it means that "setting 3" has been set, so the history memory 183 for setting 3 is used as a storage target for history information and when calculating various parameters. Set as a reference target. Furthermore, if the value of the setting value understanding counter is "4", it means that "setting 4" has been set. Set as a reference target. In addition, if the value of the setting value grasp counter is "5", it means that "setting 5" has been set, so the history memory 185 for setting 5 is used as a storage target for history information and when calculating various parameters. Set as a reference target. In addition, if the value of the setting value understanding counter is "6", it means that "setting 6" has been set, so the history memory 186 for setting 6 is used as a storage target for history information and when calculating various parameters. Set as a reference target.

Then, RTC information, which is date information and time information, is read from the RTC 115 (step S2407). Then, a write process to the history memory 117 is executed (step S2408). In this write process, the history memory 181-186 set as the storage target of the history information in step S2406 is selected from the history memories 181-186 for settings 1-6. Then, by referring to the pointer area 126 in the history memory 181-186 that is the storage target, the pointer information of the history area 124 that is the current writing target is identified, and the RTC information read in step S2407 is written to the history information storage area 125 of the history area 124 that corresponds to the pointer information that is the writing target. In addition, information for identifying that it is a setting value is written to the history information storage area 125 that corresponds to the pointer information that is the writing target. As a result, a combination of information indicating that the setting state of the pachinko machine 10 has been newly set and the RTC information corresponding to the date and time when the setting was performed is stored as history information.

After that, the target pointer is updated (step S2409). In this update, the history memory 181-186 set as the target for storing history information in step S2406 is selected from the history memories 181-186 for settings 1-6, and the numerical information stored in the pointer area 126 of the history memory 181-186 is read and incremented by one. It is determined whether the pointer information after the increment of one has exceeded the maximum value of the pointer information in the history area 124. If the maximum value has not been exceeded, the pointer information after the increment of one is overwritten in the pointer area 126 as the new pointer information to be written. If the maximum value has been exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

According to the above configuration, the history memory 117 is provided with history memories 181-186 for settings 1-6 corresponding to "setting 1"-"setting 6", respectively. This makes it possible to store game history corresponding to each of the setting states of the pachinko machine 10, "setting 1"-"setting 6". In this case, when a new setting is made to the setting state of the pachinko machine 10, the history memories 181-186 corresponding to the setting value for the new setting are set as the storage target for history information, so that it is possible to store history information by setting value without erasing history information when a new setting state of the pachinko machine 10 is made. In addition, various parameters are calculated using history information corresponding to the currently set setting state of the pachinko machine 10, so it is possible to appropriately derive various parameters corresponding to each setting value.

Note that the history memory 117 is not limited to the configuration in which six memories 181 to 186 for settings 1 to 6 are provided; An area corresponding to the history memory 181 for setting 2, an area corresponding to the history memory 182 for setting 2, an area corresponding to the history memory 183 for setting 3, and an area corresponding to the history memory 184 for setting 4. An area corresponding to the history memory 185 for setting 5, and an area corresponding to the history memory 186 for setting 6 may be set.

<Eighth embodiment>
This embodiment is different from the first embodiment in the configuration of the history memory 117. Hereinafter, configurations that are different from the first embodiment will be explained. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 44 is an explanatory diagram for explaining the configuration of the history memory 117 in this embodiment.

The history memory 117 includes a first history memory 191 and a second history memory 192. Each of the first history memory 191 and the second history memory 192 includes a combination of the history area 124 and the pointer area 126 of the history memory 117 in the first embodiment. In this case, when a new setting of the setting state of the pachinko machine 10 is performed in a situation where history information is stored using one of the first history memory 191 and the second history memory 192, the history information in the one history memory 191 and the second history memory 192 can be left without being erased until a predetermined number or more of history information is stored in the other history memory 191 and the second history memory 192, and new history information can be stored in both history memories 191 and the second history memory 192 until a predetermined number or more of history information is stored in the other history memory 191 and the second history memory 192.

Next, the setting update recognition process in this embodiment executed by the management CPU 112 will be explained with reference to the flowchart in FIG. 45.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from LOW level to HI level (step S2501: YES), the value of the setting value grasping counter provided in the management side RAM 114 is changed to " 1" (step S2502). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means that the setting is "setting 6".

Then, it is determined whether the setting value update signal input to the 15th buffer 122o of the input port 121 has switched from LOW level to HIGH level again (step S2503). If a positive determination is made in step S2503, the value of the setting value grasp counter in the management RAM 114 is incremented by 1 (step S2504). This causes the setting value of the pachinko machine 10 identified by the management CPU 112 to increase by one level.

If a negative determination is made in step S2503 or if the process in step S2504 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , it is determined whether a setting value identification end command has been received from the main CPU 63 (step S2505). If a negative determination is made in step S2505, the process returns to step S2503.

If an affirmative determination is made in step S2505, the setting change occurrence flag provided in the calculation result memory 131 is set to "1" (step S2506). The setting change occurrence flag is set to the first history memory 191 and the second history memory 192 that were previously set to store history information after a new setting of the setting state of the pachinko machine 10 is performed. This flag is used by the management CPU 112 to specify whether or not not only the history memories 191 and 192 but also the other history memory 191 and 192 are to be stored as history information. In addition, since a setting change occurrence flag is provided in the calculation result memory 131, which is a memory that does not require an external power supply for memory retention, a setting change will occur even if the supply of operating power to the management IC 66 is stopped. The value stored in the flag is retained.

Thereafter, RTC information, which is date information and time information, is read from the RTC 115 (step S2507). Then, writing processing to each history memory 191, 192 is executed (step S2508). In the writing process, first, the pointer information of the history area 124 that is currently the write target is identified by referring to the pointer area 126 of the first history memory 191, and the pointer information that is the write target is identified. The RTC information read in step S2507 is written in the history information storage area 125 of the history area 124 corresponding to the history area 124. Further, both information for identifying the set value and information on the value of the set value understanding counter are written into the history information storage area 125 corresponding to the pointer information to be written. As a result, information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made. The combination is now stored in the first history memory 191 as history information. In addition, in the writing process, by referring to the pointer area 126 of the second history memory 192, the pointer information of the history area 124 that is currently the writing target is specified, and the pointer information that is the writing target is identified. The RTC information read in step S2507 is written in the history information storage area 125 of the history area 124 corresponding to the information. Further, both information for identifying the set value and information on the value of the set value understanding counter are written into the history information storage area 125 corresponding to the pointer information to be written. As a result, information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made. The combination is now stored in the second history memory 192 as history information.

After that, the update process of each target pointer is executed (step S2509). In this update process, first, the numerical information stored in the pointer area 126 of the first history memory 191 is read and 1 is added. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as the pointer information to be newly written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information. In addition, in this update process, the numerical information stored in the pointer area 126 of the second history memory 192 is read and 1 is added. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as the pointer information to be newly written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the initial pointer information.

Next, the history setting process in this embodiment executed by the management CPU 112 will be explained with reference to the flowchart in FIG. 46.

If the setting change occurrence flag of the calculation result memory 131 is not set to "1" (step S2601: NO), this means that the history information should be stored only in the first history memory 191 or the second history memory 192 that is the storage target. In this case, the history memories 191 and 192 that are currently the storage targets are identified (step S2602). A storage target flag is provided in the calculation result memory 131, and if the value of the storage target flag is "0", the first history memory 191 is the storage target, and if the value of the storage target flag is "1", the second history memory 192 is the storage target. Note that the storage target flag is provided in the calculation result memory 131, which is a memory that does not require an external power supply to store data, so the value of the storage target flag is stored and retained even if the supply of operating power to the management IC 66 is stopped.

Thereafter, a history setting execution process is executed for the history memories 191 and 192 to be stored (step S2603). Specifically, steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed for one of the history memories 191 and 192 to be stored. As a result, the history information is stored in one of the history memories 191 and 192 that is the storage target.

On the other hand, if the setting change occurrence flag of the calculation result memory 131 is set to "1" (step S2601: YES), the storage target out of the first history memory 191 and the second history memory 192 is set to "1" (step S2601: YES). This means that the situation is such that history information should be stored not only on one side but also on the other side. In this case, history setting execution processing is executed for both history memories 191 and 192 (step S2604). Specifically, first, steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed for the first history memory 191. As a result, the history information is stored in the first history memory 191. Thereafter, steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed on the second history memory 192. As a result, the history information is stored in the second history memory 192.

When the process of step S2603 or the process of step S2604 is executed, it is determined whether the setting change occurrence flag in the calculation result memory 131 is set to "1" (step S2605). When an affirmative determination is made in step S2605, it is determined whether or not a predetermined number or more of ball ejection histories exist in the history memories 191 and 192 that are not to be stored (step S2606). Specifically, when the value of the storage target flag of the calculation result memory 131 is "0", the first history memory 191 is the storage target, so the gaming area PA is stored in the second history memory 192. It is determined whether or not a predetermined number (specifically, "1000") or more of history information indicating that game balls have been ejected is stored. In addition, when the value of the storage target flag of the calculation result memory 131 is "1", the second history memory 192 is the storage target, so the game ball is transferred from the game area PA to the first history memory 191. It is determined whether or not a predetermined number (specifically, "1000") or more of history information indicating that a has been discharged is stored. Note that rather than determining whether or not a predetermined number (specifically, "1000") or more of history information indicating that a game ball has been ejected from the gaming area PA is stored, the determination is made based on whether a game round has been executed. It may be configured to determine whether or not a predetermined number (specifically, "100") or more of history information indicating .

If an affirmative determination is made in step S2606, a storage target change process is executed (step S2607). In the process of changing the storage target, the value of the storage target flag of the calculation result memory 131 is set to a value different from the current value between two values, thereby changing the memory for the first history 191 and the second memory 192. Change the side that is to be stored. Specifically, if the value of the storage target flag is "0", the storage target is changed from the first history memory 191 to the second history memory 192 by setting the storage target flag to "1". Further, if the value of the storage target flag is "1", the storage target is changed from the second history memory 192 to the first history memory 191 by clearing the storage target flag to "0". As a result, the history memories 191 and 192, which store only history information from games executed after the new settings of the pachinko machine 10 are set, are set as storage targets. Then, various parameters are calculated using the history information of the history memories 191 and 192 that are newly stored, so that the parameters are executed after the new settings of the pachinko machine 10 are set. It becomes possible to derive various parameters depending on the game.

Thereafter, clearing processing is performed for the first history memory 191 and the second history memory 192 that have been the storage targets up to that point (step S2608). Specifically, if the value of the storage target flag is "0", the second history memory 192 is cleared to "0", and if the value of the storage target flag is "1", the first history memory 191 is cleared to "0". 0" Clear. Thereafter, the setting change occurrence flag in the calculation result memory 131 is cleared to "0" (step S2609).

Next, the display output process in this embodiment executed by the management CPU 112 will be explained with reference to the flowchart in FIG. 47.

If it is the calculation timing (step S2701: YES), the first history memory 191 or the second history memory 192 to be stored is identified (step S2702). Specifically, if the value of the storage target flag of the calculation result memory 131 is "0", the first history memory 191 is identified as the storage target, and if the value of the storage target flag is "1", the second history memory 192 is identified as the storage target. Then, by using the history information stored in the history memories 191 and 192 to be stored identified in step S2702, steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed to calculate various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameter, 41st to 42nd parameters), and the calculated various parameters are stored in the calculation result memory 131 (step S2703). In this case, even if the setting change occurrence flag in the calculation result memory 131 is set to "1" and history information is stored in both the first history memory 191 and the second history memory 192, various parameters are calculated using one of the history memories 191, 192 that is the storage target.

If a negative determination is made in step S2701, or if the process in step S2703 is executed, display processing is executed (step S2704). The contents of the display process are the same as the display process (FIG. 31) in the first embodiment.

According to the above configuration, the first history memory 191 and the second history memory 192 are provided as the history memory 117, and when a new setting is made to the setting state of the pachinko machine 10, the history memories 191 and 192 that had been the storage targets are still the storage targets, while history information is also stored in the history memories 191 and 192 that are not the storage targets. Then, when a predetermined number or more of history information corresponding to the discharge of game balls from the play area PA is stored in the history memories 191 and 192 that are not the storage targets, the history memories 191 and 192 that are not the storage targets are still the storage targets, and the history memories 191 and 192 that were the storage targets are cleared to "0". As a result, when a new setting is made to the setting state of the pachinko machine 10, it is possible to calculate various parameters using only the history information of the games played at the newly set setting values.

On the other hand, according to the above configuration, even if new settings of the setting state of the pachinko machine 10 are repeatedly made in a short period of time in order to prevent various parameters from being calculated appropriately, Memories 191 and 192 are maintained unchanged. Thereby, even if new settings of the setting state of the pachinko machine 10 are repeatedly made in a short period of time, it is possible to appropriately derive the management results of the game history up to that point.

Note that the history memory 117 is not limited to a configuration in which two memories, the first history memory 191 and the second history memory 192, are provided; A configuration may be adopted in which a first history area corresponding to the memory 191 and a second history area corresponding to the second history memory 192 are set.

Also, a configuration may be provided in which only one history memory 117 is provided. In this case, when the total number of game balls discharged from the game area PA after the new setting of the setting state of the pachinko machine 10 is reached or exceeds a predetermined number, the history information before the timing when the new setting of the setting state of the pachinko machine 10 is erased, and the history information after the timing when the setting is made is stored without being erased. This makes it possible to erase the history information before the timing when the new setting of the setting state of the pachinko machine 10 is made at the timing when a predetermined number of history information or more is accumulated after the new setting of the setting state of the pachinko machine 10. Also, by storing the history information corresponding to the new setting of the setting state of the pachinko machine 10 in the history memory 117 at the time when the new setting of the setting state is made, it becomes possible to distinguish the history information before the time when the new setting of the setting state is made from the history information after the new setting in the history memory 117.

Furthermore, the timing of erasing the history information is limited to when the total number of game balls discharged from the gaming area PA reaches a predetermined number or more after a new setting of the setting state of the pachinko machine 10 is performed. Instead, it may be the case that the number of games played after a new setting of the setting state of the pachinko machine 10 is performed is equal to or greater than a predetermined number of times.

In addition, even if a new setting is made to the setting state of the pachinko machine 10, if the setting value has not been changed before and after the setting, the history memories 191, 192 to be stored as described above will not be changed and the history information will not be erased. However, if a new setting is made to the setting state of the pachinko machine 10 and the setting value has been changed before and after the setting, the history memories 191, 192 to be stored as described above will be changed and the history information will be erased.

Ninth embodiment
In this embodiment, the type of buffer, of the first to sixteenth buffers 122a to 122p of the input port 121 in the management I/F 111, for which the type of input signal is determined at the design stage of the management IC 66, is different from that of the first embodiment. Also, the processing configuration executed by the main CPU 63 to cause the management CPU 112 to identify the type of input signal is different from that of the first embodiment. The configurations that differ from the first embodiment will be described below. Note that descriptions of the same configurations as the first embodiment will basically be omitted.

FIG. 48 is an explanatory diagram for explaining the configuration of the input port 121 of the management side I/F 111 in this embodiment.

The first to seventh buffers 122a to 122g and the sixteenth buffer 122p receive the same types of signals as in the first embodiment above. In detail, the first buffer 122a receives a first signal corresponding to the detection result of the first winning opening detection sensor 42a, the second buffer 122b receives a second signal corresponding to the detection result of the second winning opening detection sensor 43a, the third buffer 122c receives a third signal corresponding to the detection result of the third winning opening detection sensor 44a, the fourth buffer 122d receives a fourth signal corresponding to the detection result of the special electric detection sensor 45a, the fifth buffer 122e receives a fifth signal corresponding to the detection result of the first operating opening detection sensor 46a, the sixth buffer 122f receives a sixth signal corresponding to the detection result of the second operating opening detection sensor 47a, the seventh buffer 122g receives a seventh signal corresponding to the detection result of the outlet detection sensor 48a, and the sixteenth buffer 122p receives an output instruction signal.

Meanwhile, in the first embodiment described above, a signal corresponding to the opening/closing execution mode is input as the eighth signal to the eighth buffer 122h, a signal corresponding to the high frequency support mode is input as the ninth signal to the ninth buffer 122i, a signal corresponding to the front door frame 14 is input as the tenth signal to the tenth buffer 122j, a signal corresponding to the start of a game round is input as the eleventh signal to the eleventh buffer 122k, and a setting value update signal is input to the fifteenth buffer 122o, but in this embodiment, the buffers to which these signals are input are different. Specifically, a signal corresponding to the start of a game round is input to the 11th buffer 122k as a game round signal, a setting value update signal is input to the 12th buffer 122l, a signal corresponding to the open/close execution mode is input to the 13th buffer 122m as an open/close execution mode in progress signal, a signal corresponding to the high frequency support mode is input to the 14th buffer 122n as a high frequency support mode in progress signal, and a signal corresponding to the front door frame 14 is input to the 15th buffer 122o as a door open signal.

The input of a game signal to the 11th buffer 122k, the input of a set value update signal to the 12th buffer 122l, the input of an open/close execution mode signal to the 13th buffer 122m, the input of a high frequency support mode signal to the 14th buffer 122n, the input of a door open signal to the 15th buffer 122o, and the input of an output instruction signal to the 16th buffer 122p were determined during the design stage of the management IC 66, and the management CPU 112 can specify that the above-mentioned signals corresponding to the 11th to 16th buffers 122k to 122p are input without receiving instructions from the main CPU 63. On the other hand, the type of signals input to the 1st to 10th buffers 122a to 122j was not determined during the design stage of the management IC 66, and the types of these signals are specified by the management CPU 112 upon receiving instructions from the main CPU 63. The process for identifying the type of signal is executed when the supply of operating power to the main CPU 63 and the management CPU 112 starts, as in the first embodiment.

Figure 49 is a flowchart showing the recognition process of this embodiment executed by the main CPU 63. Note that the recognition process is executed in step S111 of the main process (Figure 9) as in the first embodiment.

First, the recognition output counter of the main side RAM 65 is set to "10", which is the number of the first to tenth buffers 122a to 122j whose signal types are to be recognized (step S2801). After that, output processing of an identification start signal is executed (step S2802). In the output processing, the respective output states of the first signal input to the first buffer 122a, the opening/closing execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n are determined. By setting the signal to HI level, the output of the identification start signal is started. The period during which these signals are maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of these signals.

Thereafter, information on the number of outputs corresponding to the current value of the output counter for recognition in the main side RAM 65 is read from the main side ROM 64, and the read information on the number of outputs is set in the output number counter provided in the main side RAM 65 ( Step S2803). The output number counter is a counter used by the main CPU 63 to specify the number of times the type identification signal is output.

In this embodiment, when the management CPU 112 is made to recognize the type of signal input to the first buffer 122a to the tenth buffer 122j, a type identification signal is output the same number of times as the number of prize balls set for the ball entry section corresponding to that type of signal. The management CPU 112 stores information corresponding to the number of times the type identification signal has been received for each of the first buffer 122a to the tenth buffer 122j in the first to tenth correspondence areas 123a to 123j of the correspondence memory 116. In other words, the type of signal input to the first buffer 122a to the tenth buffer 122j is understood as the number of prize balls set for the ball entry section corresponding to that type of signal.

In step S2803, if the value of the recognition output counter is any of "10", "9" and "8", the output count counter is set to "10" corresponding to the number of prize balls in the general winning port 31. If the value of the recognition output counter is "7", the output count counter is set to "15" corresponding to the number of prize balls in the special winning device 32. If the value of the recognition output counter is "6", the output count counter is set to "1" corresponding to the number of prize balls in the first operating port 33. If the value of the recognition output counter is "5", the output count counter is set to "1" corresponding to the number of prize balls in the second operating port 34. If the value of the recognition output counter is "4", the output count counter is set to "0" since the output counter corresponds to the outlet 24a but the payout of the game balls is not executed even if the game ball enters the outlet 24a. Also, if the value of the recognition output counter is between "3" and "1," there is no corresponding ball entry section and it is blank, so the output count counter is set to "0."

After that, the output process of the start trigger signal is executed (step S2804). In this output process, the output state of the first signal input to the first buffer 122a is set to a HI level, thereby starting the output of the start trigger signal. The period during which the first signal is maintained at a HI level is set to a period sufficient for the management CPU 112 to recognize the output state of the first signal.

Thereafter, on the condition that the value of the output number counter of the main side RAM 65 is not "0" (step S2805: YES), that is, on the condition that a value of 1 or more is set in the output number counter in step S2803, The process advances to step S2806. In step S2806, output processing of the type identification signal is executed. In the output process, output of the type identification signal is started by setting the output state of the second signal input to the second buffer 122b to HI level. The period during which the second signal is maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of the second signal.

Then, the value of the output count counter in the main RAM 65 is decremented by 1 (step S2807), and it is determined whether the value of the output count counter after decrement is "0" (step S2808). If the value of the output count counter is 1 or more (step S2808: NO), the process returns to step S2806.

If a positive judgment is made in step S2805, or if a positive judgment is made in step S2808, output processing of the end trigger signal is executed (step S2809). In this output processing, the output state of the third signal input to the third buffer 122c is set to a HI level, thereby starting output of the end trigger signal. The period during which the third signal is maintained at a HI level is set to a period sufficient for the management CPU 112 to recognize the output state of the third signal.

Thereafter, the value of the recognition output counter in the main side RAM 65 is subtracted by 1 (step S2810), and it is determined whether the value of the recognition output counter after the 1 subtraction is "0" (step S2811). If the value of the recognition output counter is 1 or more (step S2811: NO), the process returns to step S2803 and executes processing to recognize the type of signal corresponding to the value of the recognition output counter after subtraction by 1. do.

On the other hand, if the value of the recognition output counter is "0" (step S2811: YES), output processing of the identification end signal is executed (step S2812). In this output processing, the output states of the third signal input to the third buffer 122c, the open/close execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n are set to a HI level, thereby starting output of the identification end signal. The period during which these signals are maintained at a HI level is set to a period sufficient for the management CPU 112 to recognize the output states of these signals.

Next, the management processing in this embodiment executed by the management side CPU 112 will be described with reference to the flowchart in FIG. 50. The management process is started when the supply of operating power to the management side CPU 112 is started, as in the first embodiment.

First, it is determined whether or not the reception of the identification start signal from the main CPU 63 has been completed (step S2901). If the identification start signal has not been received, the setting update recognition process is executed in step S2902, and then the process in step S2901 is executed again. The contents of the setting update recognition process are the same as those in the first embodiment.

When reception of the identification start signal from the main CPU 63 has ended (step S2901: YES), the value of the setting target counter in the management RAM 114 is cleared to "0" (step S2903). Thereafter, on the condition that a start trigger signal has been received from the main CPU 63 (step S2904: YES), the process proceeds to step S2905. In step S2905, it is determined whether a type identification signal has been received from the main CPU 63. When a type identification signal has been received (step S2905: YES), the value of the reception count counter provided in the management RAM 114 is incremented by 1 (step S2906). The reception count counter is a counter for the management CPU 112 to identify the number of times the type identification signal has been received from the main CPU 63. The value of the reception count counter is cleared to "0" when a positive determination is made in step S2904.

If a negative judgment is made in step S2905, or if the processing of step S2906 is executed, it is judged whether or not a termination trigger signal has been received from the main CPU 63 (step S2907). If a termination trigger signal has not been received (step S2907: NO), the process returns to step S2905. If a termination trigger signal has been received (step S2907: YES), the correspondence setting process is executed (step S2908). In the correspondence setting process, the value set in the reception count counter is stored in the correspondence area corresponding to the current value of the setting target counter in the management RAM 114, among the first to tenth correspondence areas 123a to 123j of the correspondence memory 116. In this case, the first correspondence area 123a, the second correspondence area 123b, and the third correspondence area 123c are set to "10" corresponding to the number of prize balls in the general winning port 31, the fourth correspondence area 123d is set to "15" corresponding to the number of prize balls in the special winning device 32, the fifth correspondence area 123e is set to "1" corresponding to the number of prize balls in the first operating port 33, and the sixth correspondence area 123f is set to "1" corresponding to the number of prize balls in the second operating port 34. In addition, "0" is set in the seventh to twelfth correspondence areas 123g to 123l. After that, the value of the setting target counter in the management side RAM 114 is incremented by 1 (step S2909).

If a negative determination is made in step S2904, or if the process in step S2909 is executed, it is determined whether or not the reception of the identification end signal from the main CPU 63 has been completed (step S2910). If the reception of the identification end signal has not been completed (step S2910: NO), the process returns to step S2904, and on the condition that the start trigger signal is received from the main CPU 63 (step S2904: YES), the processing from step S2905 onward is performed. Execute. If the reception of the identification end signal from the main CPU 63 has been completed (step S2910: YES), the history setting process of step S2911, the display output process of step S2912, and the external output process of step S2913 are repeatedly executed.

Figure 51 is a time chart showing how information on the correspondence between the first to tenth buffers 122a to 122j and the types of signals input to these buffers 122a to 122j is stored in the correspondence memory 116. FIG. 51(a) shows a period during which the output state of the first signal is at a HI level, FIG. 51(b) shows a period during which the output state of the second signal is at a HI level, FIG. 51(c) shows a period during which the output state of the third signal is at a HI level, FIG. 51(d) shows a period during which the output state of the open/close execution mode signal is at a HI level, FIG. 51(e) shows a period during which the output state of the high frequency support mode signal is at a HI level, FIG. 51(f) shows an execution period of an identification state during which a process is executed to identify the correspondence between the first to tenth buffers 122a to 122j and the types of signals input to these buffers 122a to 122j, FIG. 51(g) shows the timing at which the value of the reception counter in the management RAM 114 is incremented by 1, and FIG. 51(h) shows the timing at which the correspondence setting process (step S2908) is executed by the management CPU 112.

When the supply of operating power to the main CPU 63 and the management CPU 112 is started, the output states of the first signal, the open/close execution mode signal, and the high-frequency support mode signal are changed from LOW level to HI level at the timing of t1 as shown in Figures 51(a), 51(d), and 51(e). This starts the output of the identification start signal from the main CPU 63 to the management CPU 112. Then, at the timing of t2, the output states of the first signal, the open/close execution mode signal, and the high-frequency support mode signal are changed from HI level to LOW level. This stops the output of the identification start signal from the main CPU 63 to the management CPU 112. At the timing of t2, the management CPU 112 makes a positive determination in step S2901 of the management process (Figure 50), and enters the identification state as shown in Figure 51(f).

After that, the output state of the first signal is maintained at a HI level from time t3 to time t4 as shown in FIG. 51(a). This results in a state in which a start trigger signal has been output to the management CPU 112. Then, the output state of the second signal is maintained at a HI level from time t5 to time t7 as shown in FIG. 51(b). This results in a state in which a type identification signal has been output once to the management CPU 112. In this case, at time t6, the value of the reception count counter in the management RAM 114 is incremented by 1 as shown in FIG. 51(g).

Thereafter, the output state of the third signal is maintained at the HI level from timing t8 to timing t10, as shown in FIG. 51(c). As a result, the end trigger signal is output to the management CPU 112. In this case, at timing t9, the management CPU 112 executes the correspondence setting process as shown in FIG. 51(h). Since the value of the reception count counter is "1" at the timing when the corresponding relationship setting process is executed, "1" is written as the correspondence relationship information in the correspondence areas 123a to 123j of the current setting target in the correspondence relationship memory 116. ” information is stored.

Thereafter, the output state of the first signal is maintained at the HI level from timing t11 to timing t12, as shown in FIG. 51(a). As a result, a start trigger signal is output to the management CPU 112. Then, as shown in FIG. 51(b), the second The output state of the signal is maintained at HI level. As a result, each type identification signal is output once to the management CPU 112. In this case, the value of the reception count counter in the management side RAM 114 is incremented by 1 at each of timing t14, timing t17, timing t20, and timing t23, as shown in FIG. 51(g).

After that, the output state of the third signal is maintained at HI level from timing t25 to timing t27 as shown in FIG. 51(c). This results in a state in which a termination trigger signal is output to the management CPU 112. In this case, at timing t26, the management CPU 112 executes a correspondence setting process as shown in FIG. 51(h). Since the value of the reception count counter is "10" when the correspondence setting process is executed, the information "10" is stored as the correspondence information in the correspondence areas 123a to 123j of the current setting target in the correspondence memory 116.

After that, at the timing of t28, as shown in FIG. 51(c), FIG. 51(d), and FIG. 51(e), the output states of the third signal, the open/close execution mode signal, and the high-frequency support mode signal are changed from LOW level to HI level. This starts the output of the identification end signal from the main CPU 63 to the management CPU 112. After that, at the timing of t29, the output states of the third signal, the open/close execution mode signal, and the high-frequency support mode signal are changed from HI level to LOW level. This stops the output of the identification end signal from the main CPU 63 to the management CPU 112. At the timing of t29, the management CPU 112 makes a positive determination in step S2910 of the management process (FIG. 50), and the identification state is released as shown in FIG. 51(f).

In addition, in this embodiment, since information on the number of prize balls is stored as correspondence information, the history information stored in the history memory 117 includes the prize ball corresponding to the entered ball part that triggered the storage of the history information. Information on the number of objects is included as correspondence information. In this configuration, if there are multiple types of ball entry parts with the same number of prize balls, it is not possible to distinguish between the ball entry parts in the history information. Specifically, since both the first operating port 33 and the second operating port 34 have one prize ball, it is difficult to distinguish between the first operating port 33 and the second operating port 34 in the history information. Can not. Under such circumstances, the number of prize balls for the first operating port 33 and the second operating port 34 may be made different. This makes it possible to distinguish between the first operating port 33 and the second operating port 34 in the historical information even in a configuration in which historical information is stored as in this embodiment.

According to the embodiment described above in detail, not only the setting value update signal and the output instruction signal, but also the information corresponding to whether a game has started, the information corresponding to whether the opening and closing execution mode is in, the information corresponding to whether the high frequency support mode is in, and the information corresponding to whether the front door frame 14 is open can be identified by the management CPU 112 as the signal path corresponding to these information without receiving the correspondence information from the main CPU 63. In this case, only the information corresponding to the detection results of each ball entry detection sensor 42a to 48a is the information that the main CPU 63 needs to make the management CPU 112 recognize the correspondence between each information and each signal path 118a to 118j. Then, when the correspondence information is made to the management CPU 112, the number of pulse signals equal to the number of winning balls corresponding to each ball entry detection sensor 42a to 48a is output from the main CPU 63 to the management CPU 112 using the second signal. This makes it possible to simplify the configuration for transmitting the correspondence information.

Tenth embodiment
In this embodiment, the configuration for providing the information of each shot result to the management IC 66 is different from that of the first embodiment. The configuration that differs from the first embodiment will be described below. Note that the description of the same configuration as the first embodiment will be basically omitted.

Figure 52 is an explanatory diagram showing the configuration of the signal path for inputting the detection results of each ball entry detection sensor 42a to 48a to the main CPU 63 and the management IC 66.

The detection result of the first winning port detection sensor 42a is input to the main CPU 63 through the first signal path SL11. The detection result of the second winning port detection sensor 43a is input to the main CPU 63 through the second signal path SL12. The detection result of the third winning port detection sensor 44a is input to the main CPU 63 through the third signal path SL13. The detection result of the special electric current detection sensor 45a is input to the main CPU 63 through the fourth signal path SL14. The detection result of the first operating port detection sensor 46a is input to the main CPU 63 through the fifth signal path SL15. The detection result of the second operating port detection sensor 47a is input to the main CPU 63 through the sixth signal path SL16. The detection result of the outlet detection sensor 48a is input to the main CPU 63 through the seventh signal path SL17.

A first branch route SL21 is formed so as to branch from a midway position of the first signal route SL11, and the first branch route SL21 is electrically connected to the management IC 66. Further, a second branch route SL22 is formed so as to branch from a midway position of the second signal route SL12, and the second branch route SL22 is electrically connected to the management IC 66. Further, a third branch route SL23 is formed so as to branch from an intermediate position of the third signal route SL13, and the third branch route SL23 is electrically connected to the management IC 66. Further, a fourth branch route SL24 is formed so as to branch from an intermediate position of the fourth signal route SL14, and the fourth branch route SL24 is electrically connected to the management IC 66. Further, a fifth branch route SL25 is formed so as to branch from an intermediate position of the fifth signal route SL15, and the fifth branch route SL25 is electrically connected to the management IC 66. Further, a sixth branch route SL26 is formed so as to branch from an intermediate position of the sixth signal route SL16, and the sixth branch route SL26 is electrically connected to the management IC 66. Further, a seventh branch route SL27 is formed so as to branch from a midway position of the seventh signal route SL17, and the seventh branch route SL27 is electrically connected to the management IC 66.

With the above configuration, the detection results of each ball entry detection sensor 42a to 48a are input to the management IC 66 without the intervention of processing by the main CPU 63. This eliminates the need for the main CPU 63 to execute processing to make the management CPU 112 recognize the results of each ball entry at the outlet 24a, general winning port 31, special electric winning device 32, first operating port 33, and second operating port 34, making it possible to reduce the processing load on the main CPU 63.

The branching points of the branching paths SL21 to SL27 from the signal paths SL11 to SL17 are located inside the MPU 62. This makes it difficult to access the branching points and the branching paths SL21 to SL27 from outside, and prevents fraudulent behavior such as inputting abnormal ball entry results only to the management IC 66.

<Eleventh embodiment>
The present embodiment is different from the first embodiment in the configuration of a display device for displaying game history management results. Hereinafter, configurations that are different from the first embodiment will be explained. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

Figure 53 is a front view of the main control device 60 in this embodiment.

In the first embodiment, the main control device 60 was provided with a first notification display device 69a, a second notification display device 69b, and a third notification display device 69c, but in this embodiment, the first notification display device 69a, the second notification display device 69b, and the third notification display device 69c were provided. A display device 201, a second notification display device 202, a third notification display device 203, and a fourth notification display device 204 are provided. These first to fourth notification display devices 201 to 204 are arranged side by side on the element mounting surface of the main control board 61.

The first to fourth notification display devices 201 to 204 are all segment displays in which seven LED display segments are arranged; however, the present invention is not limited to this; It may be a light emitting body, a liquid crystal display device, or an organic EL display. The first to fourth notification display devices 201 to 204 are all installed so that their display surfaces face the direction in which the element mounting surface of the main control board 61 faces, and are mounted on the opposing wall 60b of the board box 60a. covered. In this case, since the board box 60a is transparent, the display surfaces of the first to fourth notification display devices 201 to 204 housed in the board box 60a can be visually observed from outside the board box 60a. becomes possible. Furthermore, the main control device 60 is mounted on the back surface of the resin base 21 in such a way that the opposing wall portion 60b facing the element mounting surface of the main control board 61 faces the rear of the pachinko machine 10 in the board box 60a. When the main body 12 is opened to the front of the pachinko machine 10 relative to the outer frame 11 and the back surface of the resin base 21 is exposed to the front of the pachinko machine 10, the first to fourth notification display devices 201 are exposed through the opposing wall portion 60b. It becomes possible to visually check the display screen of 204 to 204.

On the display surface of the first notification display device 201, alphabets such as "A", "E", "H", "L", and "O" are displayed. On the other hand, numbers in the range of "0" to "9" are displayed on the second notification display device 202, the third notification display device 203, and the fourth notification display device 204. The game history management results are notified using the first to fourth notification display devices 201 to 204. In this case, the first notification display device 201 and the second notification display device 202 display the management result of the game history that is the target of notification (the first to eighth parameters in the first embodiment, the eleventh to 18th parameters, Displays corresponding to the types of parameters (21st to 26th parameters, 31st parameters, 41st to 42nd parameters) are performed, and the third notification display device 203 and the fourth notification display device 204 display the notification target. A display corresponding to the content of the management result of the game history of the type being played is displayed.

Specifically, the types of game history management results are the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters in the first embodiment. exists. The first notification display device 201 displays a display corresponding to the type of parameter group to be notified. Specifically, when any of the 1st to 8th parameters is targeted for notification, "A" is displayed on the first notification display device 201, and when any of the 11th to 18th parameters is targeted for notification. When the notification target is set, "E" is displayed on the first notification display device 201, and when any of the 21st to 26th parameters is the notification target, the first notification display device 201 displays 201, if any of the 31st parameters are to be notified, "L" is displayed on the first notification display device 201, and the 41st to 42nd parameters are to be notified. If it is a target, "O" is displayed on the first notification display device 201.

The second notification display device 202 displays the order of the game history management results for the parameter group being notified, in a sequence that corresponds to the type of game history management result being notified. Taking the parameter group of parameters 1 to 8 as an example, when the first parameter is the subject of notification, a "1" is displayed on the second notification display device 202, when the second parameter is the subject of notification, a "2" is displayed on the second notification display device 202, when the third parameter is the subject of notification, a "3" is displayed on the second notification display device 202, when the fourth parameter is the subject of notification, a "4" is displayed on the second notification display device 202, when the fifth parameter is the subject of notification, a "5" is displayed on the second notification display device 202, when the sixth parameter is the subject of notification, a "6" is displayed on the second notification display device 202, when the seventh parameter is the subject of notification, a "7" is displayed on the second notification display device 202, and when the eighth parameter is the subject of notification, an "8" is displayed on the second notification display device 202. In addition, taking the parameter group of parameters 21 to 26 as an example, if the 21st parameter is the subject of notification, the second notification display device 202 displays "1", if the 22nd parameter is the subject of notification, the second notification display device 202 displays "2", if the 23rd parameter is the subject of notification, the second notification display device 202 displays "3", if the 24th parameter is the subject of notification, the second notification display device 202 displays "4", if the 25th parameter is the subject of notification, the second notification display device 202 displays "5", and if the 26th parameter is the subject of notification, the second notification display device 202 displays "6".

In detail, regarding the display contents of the third notification display device 203 and the fourth notification display device 204, the number corresponding to the tens place of the value obtained by multiplying the parameter to be notified by 100 is the third notification display device 203. It is displayed on the display device 203, and the number corresponding to the ones place is displayed on the fourth notification display device 204.

In the first to fourth display devices 201 to 204, the displays corresponding to the calculation results of the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters are switched in sequence in a predetermined order, and after the calculation result of the forty-second parameter, which is the last parameter to be displayed, is displayed, the calculation result of the first parameter, which is the first parameter to be displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is two seconds. In contrast, the calculation cycle of the various parameters in the management CPU 112 is 51 seconds, and the number of various parameters is 25. Therefore, the various parameters calculated by the management CPU 112 become the subject of notification in the first to fourth display devices 201 to 202 at least once.

As in the first embodiment, the first to fourth notification display devices 201 to 204 not only notify the results of the game history management, but also display a value corresponding to the current setting value in a changeable state in which the setting state of the pachinko machine 10 can be changed. Specifically, in the changeable state, the first to third notification display devices 201 to 203 are turned off, while the fourth notification display device 204, which is located at the right end of the first to fourth notification display devices 204 arranged horizontally, displays a value corresponding to the current setting value. In other words, when "Setting 1" is selected in the changeable state, "1" is displayed on the fourth alert display device 204, when "Setting 2" is selected in the changeable state, "2" is displayed on the fourth alert display device 204, when "Setting 3" is selected in the changeable state, "3" is displayed on the fourth alert display device 204, when "Setting 4" is selected in the changeable state, "4" is displayed on the fourth alert display device 204, when "Setting 5" is selected in the changeable state, "5" is displayed on the fourth alert display device 204, and when "Setting 6" is selected in the changeable state, "6" is displayed on the fourth alert display device 204.

Next, the electrical configuration for performing various displays on the first to fourth alarm display devices 201 to 204 based on the control of the MPU 62 will be described. FIG. 54 is a block diagram for explaining the electrical configuration for performing various displays on the first to fourth alarm display devices 201 to 204 based on the control of the MPU 62.

As already explained, the main control board 61 is provided with the MPU 62 and the first to fourth notification display devices 201 to 204. Further, the main control board 61 is provided with a first display IC 205, a second display IC 206, a third display IC 207, and a fourth display IC 208.

The first display IC 205 is provided in correspondence with the first alarm display device 201, and is electrically connected to the MPU 62 via signal path SL31 and to the first alarm display device 201 via signal path SL32. The first display IC 205 is provided with a storage buffer for storing display data received from the MPU 62, and performs display control of the first alarm display device 201, i.e., light emission control of each display segment, according to the display data stored in the storage buffer. When operating power is supplied, the first display IC 205 can store and hold the display data stored in the storage buffer, and causes the first alarm display device 201 to continuously display the display content corresponding to the stored display data. Then, when the display data is changed by the MPU 62, the display of the first alarm display device 201 is changed to the display content corresponding to the changed display data. In addition, after the supply of operating power to the first display IC 205 has started and the display data has not yet been set by the MPU 62, the display data will be all "0" data, in which case the first notification display device 201 will be in a non-display state, i.e., turned off.

However, this is not limited to the above configuration, and the first display IC 205 may be configured to store and hold display data even when the supply of operating power to the pachinko machine 10 is stopped by supplying backup power to the first display IC 205. In this case, when the supply of operating power to the pachinko machine 10 is started, the display that was being performed on the first notification display device 201 immediately before the supply of operating power to the pachinko machine 10 was stopped will be started on the first notification display device 201.

The second display IC 206 is provided corresponding to the second alarm display device 202, and is electrically connected to the MPU 62 by signal path SL33 and to the second alarm display device 202 by signal path SL34. The second display IC 206 is provided with a storage buffer for storing display data received from the MPU 62, and performs display control of the second alarm display device 202, i.e., light emission control of each display segment, according to the display data stored in the storage buffer. When operating power is supplied, the second display IC 206 can store and hold the display data stored in the storage buffer, and causes the second alarm display device 202 to continuously display the display content corresponding to the stored display data. Then, when the display data is changed by the MPU 62, the display of the second alarm display device 202 is changed to the display content corresponding to the changed display data. In addition, after the supply of operating power to the second display IC 206 has started and the display data has not yet been set by the MPU 62, the display data will be all "0" data, in which case the second notification display device 202 will be in a non-display state, i.e., off state.

However, this is not limited to the above configuration, and the second display IC 206 may be configured to store and hold display data even when the supply of operating power to the pachinko machine 10 is stopped by supplying backup power to the second display IC 206. In this case, when the supply of operating power to the pachinko machine 10 is started, the display that was being performed on the second notification display device 202 immediately before the supply of operating power to the pachinko machine 10 was stopped will be started on the second notification display device 202.

The third display IC 207 is provided in correspondence with the third alarm display device 203, and is electrically connected to the MPU 62 via signal path SL35 and to the third alarm display device 203 via signal path SL36. The third display IC 207 is provided with a storage buffer for storing display data received from the MPU 62, and performs display control of the third alarm display device 203, i.e., light emission control of each display segment, according to the display data stored in the storage buffer. When operating power is supplied, the third display IC 207 can store and hold the display data stored in the storage buffer, and causes the third alarm display device 203 to continuously display the display content corresponding to the stored display data. Then, when the display data is changed by the MPU 62, the display of the third alarm display device 203 is changed to the display content corresponding to the changed display data. In addition, after the supply of operating power to the third display IC 207 has started and the display data has not yet been set by the MPU 62, the display data will be all "0" data, in which case the third notification display device 203 will be in a non-display state, i.e., turned off.

However, this is not limited to the above configuration, and the third display IC 207 may be configured to store and hold display data even when the supply of operating power to the pachinko machine 10 is stopped by supplying backup power to the third display IC 207. In this case, when the supply of operating power to the pachinko machine 10 is started, the display that was being performed on the third notification display device 203 immediately before the supply of operating power to the pachinko machine 10 was stopped will be started on the third notification display device 203.

The fourth display IC 208 is provided in correspondence with the fourth alarm display device 204, and is electrically connected to the MPU 62 via signal path SL37 and to the fourth alarm display device 204 via signal path SL38. The fourth display IC 208 is provided with a storage buffer for storing display data received from the MPU 62, and performs display control of the fourth alarm display device 204, i.e., light emission control of each display segment, according to the display data stored in the storage buffer. When operating power is supplied, the fourth display IC 208 can store and hold the display data stored in the storage buffer, and causes the fourth alarm display device 204 to continuously display the display content corresponding to the stored display data. Then, when the display data is changed by the MPU 62, the display of the fourth alarm display device 204 is changed to the display content corresponding to the changed display data. In addition, after the supply of operating power to the fourth display IC 208 has started and the display data has not yet been set by the MPU 62, the display data will be all "0" data, in which case the fourth notification display device 204 will be in a non-display state, i.e., turned off.

However, this is not limited to the above configuration, and the fourth display IC 208 may be configured to store and hold display data even when the supply of operating power to the pachinko machine 10 is stopped by supplying backup power to the fourth display IC 208. In this case, when the supply of operating power to the pachinko machine 10 is started, the display that was being performed on the fourth alert display device 204 immediately before the supply of operating power to the pachinko machine 10 was stopped will be started on the fourth alert display device 204.

The display data is output to the first to fourth display ICs 205 to 208 by the MPU 62, but the output setting of the display data is performed by the main CPU 63 and the management CPU 112, respectively. That is, the main CPU 63 executes display control of the first to fourth notification display devices 201 to 204, and the management CPU 112 executes display control of the first to fourth notification display devices 201 to 204. In this case, the period during which the display data output setting is performed in each of the main CPU 63 and the management CPU 112 is adjusted so that the display data output setting is not performed at the same time in the main CPU 63 and the management CPU 112. Specifically, after the supply of operating power to the MPU 62 is started, in a changeable state in which the setting state of the pachinko machine 10 can be changed, the main CPU 63 performs the output setting of the display data, but the management CPU 112 does not perform the output setting of the display data. On the other hand, in a state in which the setting value is not changeable, the management CPU 112 performs the output setting of the display data, but the main CPU 63 does not perform the output setting of the display data.

Note that, if the display data output setting by the main CPU 63 and the display data output setting by the management CPU 112 are performed at the same time, the display data output setting by the main CPU 63 takes priority. However, the configuration is not limited to this, and a configuration may be adopted in which the display data output settings by the management CPU 112 are prioritized.

Next, the display processing in this embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG. 55.

First, the value of the update timing counter in the management RAM 114 is decremented by 1 (step S3001). The update timing counter is a counter that allows the management CPU 112 to determine whether it is time to update the display contents of the game history management results in the first to fourth notification display devices 201 to 204. After that, it is determined whether the value of the update timing counter after decrementing by 1 is "0" to determine whether it is time to update the display contents of the first to fourth notification display devices 201 to 204 (step S3002).

If a positive judgment is made in step S3002, the value of the display target counter in the management RAM 114 is incremented by 1 (step S3003). Then, if the value of the display target counter after incrementing by 1 exceeds the maximum value of "24" (step S3004: YES), the value of the display target counter is cleared to "0" (step S3005). The display target counter is a counter that allows the management CPU 112 to identify the type of parameter that is to be displayed in the first to fourth notification display devices 201 to 204. There is a one-to-one correspondence between the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters and the possible values of the display target counter, "0" to "24". For example, when the value of the display object counter is "0", the first parameter, which is the first display object, becomes the display object of the first to fourth notification display devices 201 to 204, and when the value of the display object counter is "24", the 42nd parameter, which is the last display object, becomes the display object of the first to fourth notification display devices 201 to 204.

If a negative determination is made in step S3004 or if the process in step S3005 is executed, display data corresponding to the type of parameter corresponding to the value of the display target counter is read from the management side ROM 113 (step S3006). Then, a setting process for display data corresponding to the first notification display device 201 is executed (step S3007), and a setting process for display data corresponding to the second notification display device 202 is executed (step S3008). For example, if the value of the display target counter is "0" and the first parameter is the display target, display data for displaying "A" on the first notification display device 201 is sent to the first display IC 205. At the same time, display data for displaying "1" on the second notification display device 202 is output to the second display IC 206. For example, if the value of the display target counter is "24" and the 42nd parameter is the display target, display data for displaying "O" on the first notification display device 201 is displayed in the first display. At the same time as being output to the IC 205, display data for displaying "2" on the second notification display device 202 is output to the second display IC 206.

Then, a parameter corresponding to the value of the counter to be displayed is read from the calculation result memory 131, and the display data corresponding to the tens digit and the ones digit of the result obtained by multiplying the read parameter by 100 are read from the management side ROM 113 (step S3009). Then, the display of the third alert display device 203 is controlled so that the number corresponding to the tens digit of the result is displayed (step S3010), and the display of the fourth alert display device 204 is controlled so that the number corresponding to the ones digit is displayed (step S3011). For example, if the result of multiplying by 100 is "53", display data for displaying "5" on the third alert display device 203 is output to the third display IC 207, and display data for displaying "3" on the fourth alert display device 204 is output to the fourth display IC 208.

Thereafter, a value corresponding to 2 seconds is set in the update timing counter of the management side RAM 114 as a value corresponding to the next update timing (step S3012).

By executing the display process as described above, the game history management results are displayed on the first to fourth notification display devices 201 to 204. The game history management results are displayed regardless of whether or not play is continuing, and regardless of whether or not the gaming machine main body 12 has been opened relative to the outer frame 11 and the main control device 60 is visible from the front of the pachinko machine 10. By executing display control of the first to fourth notification display devices 201 to 204 in this way regardless of the game situation or the state of the pachinko machine 10, it is possible to simplify the processing configuration for display control of the first to fourth notification display devices 201 to 204.

The display of the game history management results on the first to fourth notification display devices 201 to 204 begins after the supply of operating power to the management CPU 112 has started and after the identification end command has been received from the main CPU 63. In this case, the information stored in the calculation result memory 131, like the information stored in the history memory 117, is stored and retained even when the supply of operating power to the pachinko machine 10 has been stopped, so that when the supply of operating power to the management CPU 112 has started, the game history management results calculated before the supply of operating power to the management CPU 112 was stopped are displayed.

While operating power is being supplied to the first to fourth display ICs 205-208, they store and hold the display data output from the MPU 62, and control the display of the corresponding first to fourth notification display devices 201-204 according to that display data. Therefore, after the display of the game history management results begins, the first to fourth notification display devices 201-204 are never turned off (i.e., not displayed), but are turned on (i.e., displayed) to display some kind of information.

Next, the setting value update process in this embodiment executed by the main CPU 63 will be explained with reference to the flowchart in FIG. 56.

First, the first to third notification display devices 201 to 203 are turned off (step S3101). Specifically, display data that is all "0" is output to the first to third display ICs 205 to 207. As a result, the display segments of the first to third notification display devices 201 to 203 are all turned off, and the first to third notification display devices 201 to 203 are placed in a non-display state. Immediately after the supply of operating power to the pachinko machine 10 is started, all the display segments of the first to fourth notification display devices 201 to 204 are off, and the first to fourth notification display devices 201 204 are in a non-display state. Therefore, step S3101 is a process for maintaining the first to third notification display devices 201 to 203 in a non-display state, and if any of the first to third notification display devices 201 to 203 is If it is in a display state, it is a process of turning it into a non-display state.

Then, the setting value counter in the main RAM 65 is set to "1" (step S3102). The setting value counter is a counter that allows the main CPU 63 to identify which setting value the setting state of the pachinko machine 10 is. By setting the setting value counter to "1", when the setting value update process is executed, the setting value becomes "Setting 1" regardless of the previous setting value.

Thereafter, a process to start displaying the set value in the fourth display notification device 204 is executed (step S3103). In the setting value display start process, display data for displaying "1" is output to the fourth display IC 208. As a result, the number "1" corresponding to "Setting 1" is displayed on the fourth notification display device 204.

After that, on the condition that the setting key insertion section 68a has not been turned OFF (step S3104: NO), it is determined whether the update button 68b has been pressed once (step S3105). Specifically, it is determined whether the signal from the sensor that detects the pressing of the update button 68b has switched from a LOW level to a HIGH level. If a negative determination is made in step S3105, the process returns to step S3104, and it is determined whether the setting key insertion section 68a has been turned OFF.

If the update button 68b has been pressed once (step S3105: YES), the value of the setting value counter in the main RAM 65 is incremented by 1 (step S3106). If the value of the setting value counter after incrementing by 1 exceeds "6" (step S3107: YES), the setting value counter is set to "1" (step S3108). As a result, the setting value is updated to the next higher level each time the update button 68b is pressed, and if the update button 68b is pressed once when the setting is "6", the setting will return to "1".

If a negative determination is made in step S3107, or if the process in step S3108 is executed, a display update process for the setting value on the fourth notification display device 204 is executed (step S3109). In the setting value display update process, display data for displaying a number corresponding to the value of the setting value counter in the main side RAM 65 is output to the fourth display IC 208. Thereby, the number corresponding to the current setting value is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the game hall manager can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S3109, the process returns to step S3104, and it is determined whether the setting key insertion unit 68a has been turned OFF. If it has not been turned OFF (step S3104: NO), the process of steps S3105 and onwards is executed again. If it has been turned OFF (step S3104: YES), the process of starting display of the management results on the first to fourth alarm display devices 201 to 204 is executed (step S3110).

In the display start processing, a management result display start command is sent from the main CPU 63 to the management CPU 112. The management side CPU 112, which has received the management result display start command, executes processing for displaying the first parameter among the various parameters stored in the calculation result memory 131. The processing contents in this case are the same as steps S3006 to S3012 in the display processing (FIG. 55). As a result, a display corresponding to the first parameter calculated immediately before the operating power of the pachinko machine 10 was stopped last time is displayed on the first to fourth notification display devices 201 to 204.

Next, the display modes of the first to fourth notification display devices 201 to 204 in the case where the game history management results are displayed and the setting state of the pachinko machine 10 are updated will be explained. FIG. 57(a) is an explanatory diagram for explaining the display mode of the first to fourth notification display devices 201 to 204 when the game history management results are displayed, and FIG. 10 is an explanatory diagram for explaining the display mode of the first to fourth notification display devices 201 to 204 when the setting state of the notification device 10 is changed. FIG.

When the game history management results are displayed, at least one display segment in each of the first to fourth notification display devices 201 to 204 is in a light-emitting state, as shown in FIG. 57(a). In other words, each of the first to fourth notification display devices 201 to 204 is in a display state. This is the same regardless of which of the 1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, and 41st to 42nd parameters are to be notified. . As a result, the manager of the game hall can visually check that all of the first to fourth notification display devices 201 to 204 are in the display state, and the first to fourth notification display devices 201 to 204. It becomes possible to grasp that the game history management results are displayed.

On the other hand, when the setting state of the pachinko machine 10 is changed, all display segments are turned off in each of the first to third alert display devices 201 to 203 as shown in FIG. 57(b). In other words, each of the first to third alert display devices 201 to 203 is turned off. Also, the fourth alert display device 204 displays one of the numbers "1" to "6." In this way, the fourth alert display device 204 displays one of the numbers "1" to "6" and each of the first to third alert display devices 201 to 203 is turned off, allowing the manager of the amusement hall to know that the first to fourth alert display devices 201 to 204 are displaying values corresponding to the setting values, and to clearly understand the current setting values.

Next, we will explain how the first to fourth alarm display devices 201 to 204 enter a display state, with reference to the time charts in Figures 58 (a) to 58 (h). FIG. 58(a) shows a period during which the setting state of the pachinko machine 10 is changeable, FIG. 58(b) shows the timing of updating the setting display on the first to fourth display devices 201 to 204, FIG. 58(c) shows a period during which the results of game history management are displayed on the first to fourth display devices 201 to 204, FIG. 58(d) shows the timing of updating the display corresponding to the results of game history management on the first to fourth display devices 201 to 204, FIG. 58(e) shows a period during which the first display device 201 is in a display state, FIG. 58(f) shows a period during which the second display device 202 is in a display state, FIG. 58(g) shows a period during which the third display device 203 is in a display state, and FIG. 58(h) shows a period during which the fourth display device 204 is in a display state.

When the setting key insertion section 68a is turned ON and the supply of operating power to the pachinko machine 10 is started, the setting state of the pachinko machine 10 is changed at timing t1 as shown in FIG. 58(a). At timing t1, the setting display is updated as shown in FIG. 58(b), and the fourth notification display device 204 is turned on and continues to be displayed as shown in FIG. 58(h). In this case, since "Setting 1" is selected, the fourth notification display device 204 displays "1". On the other hand, at timing t1, the first to third notification display devices 201 to 203 are kept in a non-display state, that is, all display segments are turned off, as shown in FIG. 58(e) to FIG. 58(g).

Thereafter, by operating the update button 68b to change the set value at each of timing t2, timing t3, timing t4, and timing t5, each of these timings is changed as shown in FIG. 58(b). This is the timing to update the setting value display. In this case, as shown in FIG. 58(h), the display content of the fourth notification display device 204 is switched to the number corresponding to the changed setting value at each of these timings, but this display content switching The fourth notification display device 204 is maintained in the display state including each timing when the notification is performed. On the other hand, as shown in FIGS. 58(e) to 58(g), the first to third notification display devices 201 to 203 are in the non-display state at each of these setting value display update timings, that is, all display devices are in the non-display state. The segment remains unlit.

Thereafter, the setting key insertion section 68a is turned off at timing t6, thereby ending the changeable state as shown in FIG. 58(a). In this case, at the timing t6, the display period of the gaming history management results starts as shown in FIG. 58(c). Specifically, display of the first parameter stored in the calculation result memory 131 is started. Therefore, at the timing t6, as shown in FIGS. 58(e) to 58(g), the first to third notification display devices 201 to 203 are switched from the non-display state to the display state, and the fourth notification display is Although the display contents of the device 204 are changed, the display state is maintained.

After that, at times t7, t8, t9, t10, t11, and t12, the display of the gaming history management results is updated as shown in Fig. 58(d). In this case, as shown in Fig. 58(e) to Fig. 58(h), the first to fourth notification display devices 201 to 204 will switch to the display content corresponding to the updated gaming history management results at each of these times, but all of the first to fourth notification display devices 201 to 204 will be maintained in the display state, including at each time when this display content is switched.

According to this embodiment described in detail above, the following excellent effects are achieved.

In a configuration in which game history management results are displayed on the first to fourth notification display devices 201 to 204, in a changeable state in which the setting state of the pachinko machine 10 can be changed, a corresponding display is displayed. This is performed on the first to fourth notification display devices 201 to 204. This allows the first to fourth notification display devices 201 to 204 to be used not only as display devices for displaying game history management results, but also for displaying the corresponding display in the changeable state. .

A distinction is made between the period during which the first to fourth notification display devices 201-204 display the game history management results and the period during which the first to fourth notification display devices 201-204 display information corresponding to the setting value being in a changeable state. This makes it possible to identify which display is being made on the first to fourth notification display devices 201-204 by understanding the state in which the display is being made on the first to fourth notification display devices 201-204.

When a display corresponding to a changeable state of the setting value is made, the first to fourth notification display devices 201 to 204 are controlled to have a different display mode than the display mode when the gaming history management results are displayed. This makes it possible to identify which display is being made on the first to fourth notification display devices 201 to 204 by grasping the display mode of the first to fourth notification display devices 201 to 204.

Multiple notification display devices 201-204 are provided. This makes it possible to perform a wide variety of displays corresponding to the results of game history management. Furthermore, the presence of multiple notification display devices 201-204 makes it possible to greatly differ the display mode when the results of game history management are displayed from when a display corresponding to the changeable state of the setting value is performed.

When the display corresponding to the setting value changeable state is performed, the first to third notification display devices 201 to 203, which are not in the non-display state when displaying the game history management results, are in the non-display state. As a result, by simply checking whether or not the first to third notification display devices 201 to 203 are in the non-display state, you can display the game history management results and the display corresponding to the changeable setting value state. It becomes possible to clearly specify which of these is being performed on the first to fourth notification display devices 201 to 204.

When a display corresponding to a changeable state of the setting value is made, the fourth notification display device 204 is in a display state, and the display content is the display content that can be displayed on the fourth notification display device 204 when displaying the results of game history management. By allowing the display content on the fourth notification display device 204 to overlap in this way, it is possible to avoid restricting the display content when the results of game history management are displayed and when a display corresponding to a changeable state of the setting value is made. Even if the display content on the fourth notification display device 204 is configured to overlap in this way, when a display corresponding to a changeable state of the setting value is made, the first to third notification display devices 201 to 203 are made non-displayed, so it is possible to identify which display is being made on the first to fourth notification display devices 201 to 204.

When the game history management results are displayed, each of the first to fourth notification display devices 201 to 204 is in a display state. As a result, the display modes of the first to fourth notification display devices 201 to 204 are clearly different between when the game history management results are displayed and when the display corresponding to the changeable state of the setting value is displayed. becomes possible.

When the gaming history management results are displayed, the first to fourth notification display devices 201 to 204 are not maintained in a hidden state even if the type of gaming history management results to be displayed is changed. . This makes it possible to specify the gaming history management results regardless of the timing at which the first to fourth notification display devices 201 to 204 are checked in a situation where the gaming history management results are displayed. In addition, regardless of the timing at which the first to fourth notification display devices 201 to 204 are checked, the game history management results can be displayed and the setting values can be changed on the first to fourth notification display devices 201 to 204. It becomes possible to specify which of the corresponding displays is being performed.

When a display corresponding to the setting value changeable state is performed, only one of the fourth notification display devices 204 is in the display state. This makes it easier to understand whether or not a display corresponding to a setting value changeable state is being displayed.

In a configuration in which the first to fourth notification display devices 201 to 204 are arranged horizontally, only the fourth notification display device 204, which is located at the right end, is used to display the setting value in a changeable state. This makes it easier to know whether a display corresponding to a changeable state of the setting value is being displayed.

When the gaming history management results are displayed, the first notification display device 201 and the second notification display device 202 are used to display a display corresponding to the type of gaming history management results to be displayed. A display corresponding to the content of the game history management result is performed using the third notification display device 203 and the fourth notification display device 204. This makes it easier to understand the management results of game history. In this case, in the setting value changeable state, both the first notification display device 201 and the second notification display device 202, which display the type of game history management result, are in a non-display state. As a result, the state in which the first and second notification display devices 201 and 202 for displaying the type are not displayed corresponds to the state in which the setting value can be changed, and corresponds to the state in which the setting value can be changed. It becomes easier to understand what is being displayed.

In addition, when a display corresponding to the setting value changeable state is displayed, not only the first notification display device 201 and the second notification display device 202 that display the type of management result of the game history, but also the game The third notification display device 203 on which the contents of the history management results are displayed also goes into a non-display state. This makes it easier to understand that the display corresponding to the setting value changeable state is being displayed.

Display data is output from the MPU 62 to the first to fourth display ICs 205 to 208, and the first to fourth display ICs 205 to 208 perform predetermined displays on the first to fourth notification display devices 201 to 204 according to the display data. In this configuration, display data is stored and held in the first to fourth display ICs 205 to 208. As a result, even if execution of the process for advancing the game is stopped in the main CPU 63 due to the occurrence of a radio wave detection abnormality or vibration detection abnormality, for example (if an affirmative determination is made in step S306), It becomes possible to maintain the display of the game history management results on the first to fourth notification display devices 201 to 204.

Note that among the first to fourth notification display devices 201 to 204, the objects that are in a non-display state (all lights out) in a changeable state in which the setting state of the pachinko machine 10 can be changed are the first to fourth notification display devices 201 to 204. The present invention is not limited to the third notification display devices 201 to 203, and may be the first and second notification display devices 201 and 202. In this case, the third notification display device 203 displays a predetermined display (for example, “5”) that is different from the current setting value, and the fourth notification display device 204 displays the current setting value. The configuration may be such that a number corresponding to the number is displayed, and the fourth notification display device 204 displays a predetermined display (for example, "5") that is different from the contents of the current setting value, and the third notification The configuration may be such that the display device 203 displays numbers corresponding to the current setting values. In addition, the first notification display device 201 and the third notification display device 203 are in a non-display state (all lights out), and the second notification display device 202 and the fourth notification display device 204 are in a display state. Alternatively, the first notification display device 201 and the fourth notification display device 204 may be in a non-display state (all lights out), and the second notification display device 202 and third notification display device 203 may be in a display state. It may be configured such that the second notification display device 202 and the third notification display device 203 are in a non-display state (all lights out), and the first notification display device 201 and the fourth notification display device 204 are displayed. The second notification display device 202 and the fourth notification display device 204 may be in a non-display state (all lights out), and the first notification display device 201 and the third notification display device 203 It is also possible to adopt a configuration in which the is displayed.

In addition, in a changeable state in which the setting state of the pachinko machine 10 can be changed, only the first alarm display device 201 may be configured to be in a non-display state (all lights off state), only the second alarm display device 202 may be configured to be in a non-display state (all lights off state), only the third alarm display device 203 may be configured to be in a non-display state (all lights off state), or only the fourth alarm display device 204 may be configured to be in a non-display state (all lights off state).

Further, in the changeable state in which the setting state of the pachinko machine 10 can be changed, only the first notification display device 201 may be in the display state, and only the second notification display device 202 may be in the display state. It is good also as a structure where only the third notification display device 203 is in the display state.

Twelfth embodiment
In this embodiment, the display contents of the first notification display device 201 and the second notification display device 202 in the state in which the setting value can be changed are different from those of the eleventh embodiment. The following describes the configurations that are different from the eleventh embodiment. Note that the description of the same configurations as the eleventh embodiment will basically be omitted.

Figure 59(a) is an explanatory diagram for explaining the configuration of the first notification display device 201, and Figure 59(b) is an explanatory diagram for explaining the configuration of the second notification display device 202.

As shown in FIG. 59(a), the first notification display device 201 includes seven first to seventh display segments 201a to 201g. Each of the first to seventh display segments 201a to 201g is formed into a rod shape and has a light emitting body such as an LED inside. These seven first to seventh display segments 201a to 201g are arranged so that the first notification display device 201 becomes a so-called seven segment display.

As shown in FIG. 59(b), the second alarm display device 202 has seven display segments, numbered 1 to 7, 202a to 202g. Each of the first to seventh display segments 202a to 202g is formed in a rod shape and has an LED or other light emitter inside. These seven display segments, numbered 1 to 7, 202a to 202g, are arranged so that the second alarm display device 202 is a so-called 7-segment display.

FIG. 60 shows a case where the management results of the game history are displayed on the first to fourth notification display devices 201 to 204 and a case where the setting state of the pachinko machine 10 is displayed in a changeable state where the setting state can be changed. FIG. 2 is an explanatory diagram for explaining the display contents of the first notification display device 201 and the second notification display device 202 in FIG.

The display contents of the first notification display device 201 and the second notification display device 202 when displaying the results of game history management are the same as those of the eleventh embodiment. Therefore, the first notification display device 201 displays any of "A", "E", "H", "L" or "O", and the second notification display device 202 displays any of "1" to "8".

In this case, each of the first to seventh display segments 201a to 201g of the first alarm display device 201 becomes an illumination target when at least one of the following displays is displayed on the first alarm display device 201: "A", "E", "H", "L", and "O". In other words, there are no display segments 201a to 201g that do not become illumination targets when the first alarm display device 201 displays any of "A", "E", "H", "L", and "O".

Similarly, regarding the second notification display device 202, each of the first to seventh display segments 202a to 202g of the second notification display device 202 corresponds to “1” to “8” in the second notification display device 202. The light is emitted in at least one type of display among the displays. In other words, even when displaying any of "1" to "8" on the second notification display device 202, there are no display segments 202a to 202g that are not subject to light emission.

In the changeable state in which the setting state of the pachinko machine 10 can be changed, the second display segment 201b and the fifth display segment 201e of the first notification display device 201 are in a light emitting state. As already explained, the second display segment 201b and the fifth display segment 201e can be in a light-emitting state when the first notification display device 201 displays the game history management results. Furthermore, in any case where the game history management results are displayed on the first notification display device 201, the second display segment 201b and the fifth display segment 201e are in a light emitting state. On the other hand, among the first to seventh display segments 201a to 201g, only the second display segment 201b and the fifth display segment 201e are in a light emitting state.The display content of the first notification display device 201 is the management of game history. Does not exist when displaying results. As a result, in the setting value changeable state, display segments 201b and 201e that can be in a light emitting state when displaying the management results of the gaming history are used, but the display is not displayed when displaying the management results of the gaming history. It becomes possible to display the mode on the first notification display device 201. Therefore, it is possible to cause the first notification display device 201 to display a display corresponding to the changeable state of the setting value while also using the display segments 201a to 201g used when displaying the management results of the game history. It becomes possible.

In the setting value changeable state, the third display segment 202c of the second notification display device 202 is in a light emitting state. As already explained, the third display segment 202c can be in a light emitting state when the second notification display device 202 displays the game history management results. On the other hand, the display content of the second notification display device 202 in which only the third display segment 202c among the first to seventh display segments 202a to 202g is in a light emitting state exists when displaying the management results of game history. I haven't. As a result, while the display segment 202c that can be in a light emitting state when displaying the management results of gaming history in the setting value changeable state is used, a display mode that is not displayed when displaying the management results of gaming history can be used. It becomes possible to display it on the second notification display device 202. Therefore, it is possible to cause the second notification display device 202 to display a display corresponding to the changeable state of the setting value while also using the display segments 202a to 202g used when displaying the management results of the game history. It becomes possible.

Next, the setting value update process in this embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. 61.

First, a process to start displaying set values on the first and second notification display devices 201 and 202 is executed (step S3201). Specifically, in the first notification display device 201, the second display segment 201b and the fifth display segment 201e are in a light emitting state, and the other display segments 201a, 201c, 201d, 201f, and 201g are in a light-off state. This display data is output to the first display IC 205. Further, regarding the second notification display device 202, display data is outputted to the second display IC 206 such that the third display segment 202c is in a light-emitting state and the other display segments 202a, 202b, 202d to 202g are in a light-off state. As a result, a display is started on the first notification display device 201 and the second notification display device 202 to notify that the pachinko machine 10 is in a changeable state in which the setting state can be changed.

Then, the third alarm display device 203 is turned off (step S3202). Specifically, display data that is all "0" is output to the third display IC 207. As a result, all display segments of the third alarm display device 203 are turned off, and the third alarm display device 203 is turned off.

Then, the setting value counter in the main RAM 65 is set to "1" (step S3203). The setting value counter is a counter that allows the main CPU 63 to identify which setting value the setting state of the pachinko machine 10 is. By setting the setting value counter to "1", when the setting value update process is executed, the setting value becomes "Setting 1" regardless of the previous setting value.

Thereafter, a process to start displaying the set value on the fourth notification display device 204 is executed (step S3204). In the setting value display start process, display data for displaying "1" is output to the fourth display IC 208. As a result, the number "1" corresponding to "Setting 1" is displayed on the fourth notification display device 204.

Thereafter, on the condition that the setting key insertion section 68a has not been turned off (step S3205: NO), it is determined whether the update button 68b has been pressed once (step S3206). Specifically, it is determined whether the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S3206, the process returns to step S3205, and it is determined whether or not the setting key insertion section 68a is turned off.

If the update button 68b has been pressed once (step S3206: YES), the value of the setting value counter in the main side RAM 65 is incremented by 1 (step S3207). Further, if the value of the set value counter after adding 1 exceeds "6" (step S3208: YES), the set value counter is set to "1" (step S3209). As a result, each time the update button 68b is pressed once, the set value is updated to one step higher, and if the update button 68b is pressed once in the situation of "Setting 6", it is changed to "Setting 1". I will be going back.

If a negative determination is made in step S3208, or if the process in step S3209 is executed, a process for updating the display of the set value on the fourth notification display device 204 is executed (step S3210). In the setting value display update process, display data for displaying a number corresponding to the value of the setting value counter in the main side RAM 65 is output to the fourth display IC 208. Thereby, the number corresponding to the current setting value is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the game hall manager can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process in step S3210, the process returns to step S3205, and it is determined whether or not the setting key insertion section 68a has been turned off. If the OFF operation has not been performed (step S3205: NO), the processes from step S3206 onwards are executed again. If the OFF operation has been performed (step S3205: YES), a process to start displaying the management results on the first to fourth notification display devices 201 to 204 is executed (step S3211).

In the display start processing, a management result display start command is sent from the main CPU 63 to the management CPU 112. The management side CPU 112, which has received the management result display start command, executes processing for displaying the first parameter among the various parameters stored in the calculation result memory 131. The processing contents in this case are the same as steps S3006 to S3012 in the display processing (FIG. 55). As a result, a display corresponding to the first parameter calculated immediately before the operating power of the pachinko machine 10 was stopped last time is displayed on the first to fourth notification display devices 201 to 204.

The present embodiment described above provides the following excellent advantages:

When the game history management result is displayed, the display segments 201a-201g, 202a-202g of the first and second notification display devices 201, 202 that can be in a light-emitting state are turned on to light up, thereby displaying the game history management result in a state where the setting value can be changed. This makes it possible to diversify the display of the game history management result without restricting the content of the display corresponding to the game history management result as much as possible. On the other hand, for each of the first notification display device 201 and the second notification display device 202, the combination of the display segments 201a-201g, 202a-202g that are in a light-emitting state when a display corresponding to the setting value can be changed is a combination that does not exist when the game history management result is displayed. This makes it possible to know which of the display of the game history management result and the display corresponding to the setting value can be changed is being displayed by knowing the combination of the display segments 201a-201g, 202a-202g that are in a light-emitting state for each of the first notification display device 201 and the second notification display device 202.

For each of the first notification display device 201 and the second notification display device 202, there are no display segments 201a-201g, 202a-202g that do not light up even if all patterns of the game history management results are displayed. This makes it possible to diversify the display corresponding to the game history management results without placing any restrictions on the display content of the game history management results.

When the display corresponding to the setting value changeable state is performed, the third notification display device 203, which does not go into the non-display state when displaying the game history management result, becomes the non-display state. As a result, by checking not only the display contents of the first notification display device 201 and the second notification display device 202, but also whether or not the third notification display device 203 is in a non-display state, the game history It becomes possible to clearly specify which of the display of the management result and the display corresponding to the changeable state of the set value is being performed on the first to fourth notification display devices 201 to 204.

The first and second notification display devices 201 and 202 are not limited to a configuration in which only one type of display content is set corresponding to the changeable state in which the setting state of the pachinko machine 10 can be changed, and multiple types may be set. In this case, the display order of the multiple types of display content may be predetermined, and the display content to be displayed may be changed according to the display order each time a new changeable state is executed. Even if there are multiple types of display content corresponding to the changeable state of the setting value, these display contents are displayed using the display segments 201a to 201g and 202a to 202g that are illuminated when the management results of the game history are displayed, and are not displayed when the management results of the game history are displayed.

In addition, when displaying the game history management results or when displaying a display corresponding to a changeable state in which the setting state of the pachinko machine 10 can be changed, the first and second notification display devices 201 and 202 may be configured to flash in one case, and to keep the display on in the other case. In this case, the manager of the game hall can specify whether the display corresponds to the game history management results or the changeable state depending on whether the display is flashing or on, so the combination of the display segments 201a to 201g, 202a to 202g that are in the light-emitting state in the display corresponding to the changeable state may be a combination used when displaying the game history management results, or may be a combination that is not used when displaying the game history management results. In addition, the first notification display device 201 and the second notification display device 202 may be configured to have a configuration in which the light-on period and the light-off period in the flashing display are mutually consistent, may be configured to be completely different, or may be configured to overlap only partially.

<Thirteenth embodiment>
This embodiment differs from the eleventh embodiment in that when an abnormal state occurs in the pachinko machine 10, a corresponding display is made using the first to fourth notification display devices 201 to 204. There is. Hereinafter, configurations that are different from the eleventh embodiment described above will be explained. Note that descriptions of the same configurations as those of the eleventh embodiment will be basically omitted.

FIG. 62 is an explanatory diagram for explaining the configuration of the abnormality display area 211 provided in the main side RAM 65.

The abnormality display area 211 is an area for storing abnormal state information to be displayed on the first to fourth notification display devices 201 to 204. The abnormality display area 211 is provided with a plurality of unit areas 211a to 211d. Specifically, a first unit area 211a, a second unit area 211b, a third unit area 211c, and a fourth unit area 211d are provided. It is possible to store one piece of information about the abnormal state of the pachinko machine 10 in each of the first to fourth unit areas 211a to 211d. That is, the abnormality display area 211 can store and hold a maximum of four pieces of information about abnormal states of the pachinko machine 10.

Here, in this embodiment, all information regarding abnormal conditions occurring in the pachinko machine 10 is specified by the main CPU 63. For example, if an abnormality regarding the payout of game balls (for example, the lower tray 56a is full, there are no balls in the tank 75, or an abnormality in the payout device 76) occurs, a command corresponding to the abnormality that has occurred is sent to the payout side CPU 92. The information is transmitted from the host CPU 63 to the main CPU 63. In addition, the pachinko machine 10 is provided with a radio wave detection sensor and a vibration detection sensor (not shown), and when the radio wave detection sensor detects an unauthorized radio wave, a corresponding abnormality signal is sent to the main CPU 63, and an abnormality signal is sent to the main CPU 63. When the vibration detection sensor detects vibration, a corresponding abnormality signal is transmitted to the main CPU 63. Further, based on identifying that the ball entry detection sensors 42a to 49a no longer transmit normal signals, the occurrence of a disconnection abnormality in the ball entry detection sensors 42a to 49a is determined.

The number of types of abnormal states specified by the main CPU 63 is greater than the maximum number of abnormal state information that can be stored in the abnormal display area 211. Then, when a large number of abnormal states occur simultaneously, it is assumed that new abnormal information will be generated even though the maximum number of abnormal state information has already been stored in the abnormality display area 211. On the other hand, storage priority is set for abnormal state information at the setting stage of the pachinko machine 10, and in a situation where the maximum number of abnormal state information is already stored in the abnormality display area 211, a new If an abnormal state occurs in the abnormal state, information on the abnormal state with a high storage priority is left in the abnormal display area 211. This makes it possible to give priority to notification of an abnormal state with a high storage priority.

Next, the abnormality setting process executed by the main CPU 63 will be described with reference to the flowchart of FIG. 63. Note that the abnormality setting process is executed as the first process of the timer interrupt process (FIG. 11).

First, it is determined whether an abnormality has occurred (step S3301). The types of abnormality that can be displayed include a full lower tray 56a, no balls in the tank 75, a payout error by the payout device 76, an abnormal radio wave detection error, an abnormal vibration detection error, and a disconnection error in each ball entry detection sensor 42a to 49a. The number of types of abnormality that can be displayed is greater than the number of the first to fourth unit areas 211a to 211d provided in the abnormality display area 211.

If a positive judgment is made in step S3301, it is judged whether or not information on the abnormal condition corresponding to the currently occurring abnormal display object has already been stored in any of the first to fourth unit areas 211a to 211d of the abnormality display area 211 (step S3302). If information on the abnormal condition corresponding to the currently occurring abnormal display object has already been stored, it is not stored in the abnormality display area 211. This makes it possible to prevent information on the same type of abnormal condition from being redundantly stored in the abnormality display area 211.

If a negative judgment is made in step S3302, it is judged whether the value of the abnormality target counter provided in the main RAM 65 is the maximum value (specifically, "4") (step S3303). The abnormality target counter is a counter that allows the main CPU 63 to identify the number of areas in which abnormality information is stored among the first to fourth unit areas 211a to 211d in the abnormality display area 211.

If the value of the abnormality target counter is the maximum value (step S3303: YES), a priority comparison process is executed (step S3304). In the priority comparison process, first of all the abnormal state information stored in the first to fourth unit areas 211a to 211d of the abnormality display area 211, the abnormal state information having the lowest storage priority is identified. The memory priority is predetermined at the design stage of the pachinko machine 10, and specifically, the lower tray 56a is full → there are no balls in the tank 75 → abnormality in vibration detection → abnormality in dispensing by the dispensing device 76 → entering ball detection sensor 42a The storage priority increases in the order of ~49a disconnection abnormality → radio wave detection abnormality. In the priority comparison process, which of the abnormal state information with the lowest storage priority stored in the first to fourth unit areas 211a to 211d and the abnormality display target that has occurred this time has a higher storage priority. Compare and judge whether

If the storage priority of the abnormality display target that has occurred this time is lower (step S3305: NO), information on the abnormal state corresponding to the abnormality display target that has occurred this time is not stored in the abnormality display area 211. As a result, in a configuration in which the number of types of abnormality display targets is greater than the number of first to fourth unit areas 211a to 211d provided in the abnormality display area 211, information on abnormal conditions with a high storage priority can be stored. It becomes possible to leave it in the abnormality display area 211.

If the storage priority of the abnormality display target that has occurred this time is higher (step S3305: YES), a setting process for the abnormality display area 211 is executed (step S3306). In the abnormality display area 211 setting process executed when an affirmative determination is made in step S3305, the current occurrence Overwrites the abnormal state information corresponding to the abnormality display target.

On the other hand, if the value of the abnormality target counter in the main side RAM 65 has not reached the maximum value (step S3303: NO), after adding 1 to the value of the abnormality target counter (step S3307), the setting process of the abnormality display area 211 is performed. (Step S3306). In this setting process, one area is selected from among the unit areas 211a to 211d in which abnormal state information is not stored in the abnormal display area 211, and the abnormal state corresponding to the abnormality display target that has occurred this time is displayed in the selected area. Stores information about.

Note that in step S3306, if there is only one piece of abnormal state information stored in the abnormal display area 211, the abnormal state information is stored in the first unit area 211a, and the abnormal state information is stored in the first unit area 211a. If there is a plurality of pieces of abnormal state information stored in the n-th unit area 211a to 211b, the abnormal state information is stored in order from the area with the smallest value of "n".

In the abnormality setting process, it is determined whether a cancellation event of the abnormality display target has occurred (step S3308). For example, it is determined whether a command indicating that the lower tray 56a is no longer full, that the tank 75 is no longer filled with balls, or that the dispensing abnormality caused by the dispensing device 76 has been received from the dispensing side CPU 92 is determined. judge. In addition, whether or not an abnormality release operation was performed in response to the occurrence of a radio wave detection abnormality, whether or not an abnormality release operation was performed in response to the occurrence of a vibration detection abnormality, or whether an abnormality release operation was performed in response to the occurrence of a disconnection abnormality. judge.

If the determination in step S3308 is positive, the process of erasing the abnormality display area 211 is executed (step S3309). In the erasure process, it is determined whether or not the abnormality information corresponding to the abnormality display target that has been released this time is stored in any of the first to fourth unit areas 211a to 211d of the abnormality display area 211, and if it is stored, the abnormality information is erased by clearing the area in which it is stored to "0". In this case, if there is only one abnormality information stored in the abnormality display area 211 after erasure, the abnormality information is stored in the first unit area 211a, and if there are multiple abnormality information stored in the abnormality display area 211 after erasure, the abnormality information is stored in the n-th unit areas 211a to 211b in order from the area with the smallest value of "n". In addition, the value of the abnormality target counter in the main RAM 65 is decremented by 1 (step S3310).

In the abnormality setting process, it is determined whether or not an operation to start an abnormality display has occurred (step S3311). The operation to start an abnormality display is performed by pressing the update button 68b with the gaming machine body 12 open forward relative to the outer frame 11 in a situation in which the setting state of the pachinko machine 10 is not in a changeable state in which it is possible to change the setting state.

When an affirmative determination is made in step S3311, it is determined whether information on one or more abnormal conditions is stored in the abnormality display area 211 (step S3312). If abnormal state information is not stored, abnormality display on the first to fourth notification display devices 201 to 204 is not started. This makes it possible to prevent abnormality display from starting even though there is no abnormality information to be reported.

If a positive determination is made in step S3312, the abnormality display flag provided in the main RAM 65 is set to "1" (step S3313). The abnormality display flag is a flag for the main CPU 63 to identify a situation in which the display corresponding to the game history management results should be stopped and a display corresponding to the abnormal state information stored in the abnormality display area 211 should be performed on the first to fourth notification display devices 201 to 204. Note that even if an operation to start the abnormality display is performed when the abnormality display flag has already been set to "1", a negative determination is made in step S3311.

Thereafter, a setting process for canceling the display of management results is executed (step S3314). In the cancellation setting process, a display cancellation command is sent to the management CPU 112 to temporarily stop updating the display of the game history management results on the first to fourth notification display devices 201 to 204. Upon receiving the display stop command, the management CPU 112 stops execution of the display process (FIG. 55). However, even if the management CPU 112 receives the display stop command, it does not set display data that is all "0" data in the first to fourth display ICs 205 to 208. Therefore, until the display data is sent from the main side CPU 63 to the first to fourth display ICs 205 to 208, the display of the game history management results at that point will continue on the first to fourth notification display devices 201 to 204. Ru.

In the abnormality setting process, it is determined whether an operation to end abnormality display has occurred (step S3315). To terminate the abnormality display, press the reset button 68c with the gaming machine main body 12 opened forward relative to the outer frame 11 in a situation where the pachinko machine 10 is not in a changeable state where the setting state can be changed. This is done by manipulating. When an affirmative determination is made in step S3315, the abnormality display flag in the main side RAM 65 is cleared to "0" (step S3316). Note that even if the abnormal display termination operation is performed in a situation where the value of the abnormal display flag is already "0", a negative determination is made in step S3315.

Thereafter, a process for canceling the display of management results is executed (step S3317). In the cancellation cancellation process, by transmitting a cancellation cancellation command to the management CPU 112, it is possible to confirm that the update of the display of the game history management results on the first to fourth notification display devices 201 to 204 has been canceled. unlock. Upon receiving the cancellation cancellation command, the management CPU 112 resumes execution of the display process (FIG. 55). However, even if the management side CPU 112 receives the cancellation cancellation command, it does not set display data that is all "0" data in the first to fourth display ICs 205 to 208. Therefore, until the display data is transmitted from the management side CPU 112 to the first to fourth display ICs 205 to 208, the abnormality display at that point continues on the first to fourth notification display devices 201 to 204. In addition, the management CPU 112 continues to store history information and calculate various parameters even when updating of the display of game history management results is stopped, and the results of calculating various parameters are It is stored in the result memory 131. Therefore, when the state in which the update of the display of the gaming history management results is canceled is canceled, the display of the most recent gaming history management results will be immediately displayed on the first to fourth notification display devices 201 to 204. It will be restarted.

In the abnormality setting process, if the abnormality display flag in the main side RAM 65 is set to "1" (step S3318: YES), an abnormality display process is executed (step S3319). FIG. 64 is a flowchart showing abnormality display processing.

First, a process of turning off the first and second notification display devices 201 and 202 is executed (step S3401). Specifically, display data that is all "0" is output to the first and second display ICs 205 and 206. As a result, all display segments of the first and second notification display devices 201 and 202 are turned off, and the first and second notification display devices 201 and 202 are in a non-display state.

Then, the value of the update timing counter provided in the main RAM 65 is decremented by 1 (step S3402). The update timing counter is a counter that allows the main CPU 63 to determine whether it is time to update the display contents of the abnormality display on the first to fourth alarm display devices 201 to 204. If the value of the update timing counter is already "0", this state is maintained. Then, by determining whether the value of the update timing counter is "0", it is determined whether it is time to update the display contents of the first to fourth alarm display devices 201 to 204 (step S3403).

When an affirmative determination is made in step S3403, updating processing of a display target counter provided in the main side RAM 65 is executed (step S3404). In the update process, if this is the first abnormality display process after the abnormality display flag in the main RAM 65 is set to "1", the display target counter is set to "0". The value of the display target counter corresponds to the first to fourth unit areas 211a to 211d of the abnormality display area 211. Specifically, the value of "0" of the display target counter corresponds to the first unit area 211a. The value "1" of the display target counter corresponds to the second unit area 211b, the value "2" of the display target counter corresponds to the third unit area 211c, and the value "3" of the display target counter corresponds to the second unit area 211b. ” corresponds to the fourth unit area 211d. In the update process, if this is not the first abnormality display process after the abnormality display flag in the main side RAM 65 is set to "1", the value of the display target counter is incremented by one.

Then, it is determined whether abnormal state information is stored in the area corresponding to the current value of the display target counter among the first to fourth unit areas 211a to 211d (step S3405). Here, as already explained, if only one abnormal state information is stored, the abnormal state information is stored in the first unit area 211a, and if multiple abnormal state information is stored, the abnormal state information is stored in the n-th unit areas 211a to 211b in order from the area with the smallest value of "n". Therefore, if abnormal state information is not stored in the area corresponding to the current value of the display target counter, abnormal state information is not stored in the area corresponding to a value larger than the value of the display target counter. Also, if the value of the display target counter after adding 1 exceeds the maximum value "3", there is no corresponding area in the first place, so it is treated as if no abnormal state information is stored.

If a positive judgment is made in step S3405, the value of the display target counter in the main RAM 65 is cleared to "0" (step S3406). At this point, it is assumed that all abnormal conditions that are the subject of abnormality display in a situation where an abnormality display is being performed are cancelled. In this case, even in a situation where abnormality display processing is being executed, no abnormality information is stored in the abnormality display area 211. In such a situation, a display indicating that no abnormality information is stored is performed on the third and fourth alarm display devices 203, 204.

When a negative determination is made in step S3405, or when the process in step S3406 is executed, display data to be displayed corresponding to the value of the display target counter in the main side RAM 65 is read from the main side ROM 64 (step S3407). Specifically, information stored in the area corresponding to the value of the display target counter of the main side RAM 65 among the first to fourth unit areas 211a to 211d of the abnormality display area 211 is read out. Then, display data corresponding to the information is read from the main ROM 64. The display data is set in one-to-one correspondence with the abnormal state information, and the display contents of the third and fourth notification display devices 203 and 204 based on the display data are set for each type of abnormal state information. They are different. Further, there is also display data corresponding to the absence of abnormal state information, and this display data is different from display data corresponding to abnormal state information. Therefore, when abnormal state information does not exist, the display content of the third and fourth notification display devices 203 and 204 becomes different from the display content when abnormal state information exists.

On the other hand, the display contents of the display corresponding to the abnormal state information on the third and fourth notification display devices 203, 204 and the display contents of the display corresponding to the absence of abnormal state information overlap with the display contents when the game history management results are displayed on the third and fourth notification display devices 203, 204 and the display contents of the setting value on the fourth notification display device 204. In contrast, when the game history management results are displayed, all of the first to fourth notification display devices 201-204 are in a display state, and in a changeable state in which the setting state of the pachinko machine 10 can be changed, the first to third notification display devices 201-203 are in a non-display state and the fourth notification display device 204 is in a display state, and when an abnormality is displayed, the first and second notification display devices 201, 202 are in a non-display state and the third and fourth notification display devices 203, 204 are in a display state, so that even if the display contents overlap as described above, the manager of the game hall can understand which situation the display corresponds to.

Thereafter, the display of the third notification display device 203 is controlled according to the display data read out in step S3407 (step S3408), and the display of the fourth notification display device 204 is controlled (step S3409). In this case, whether the display corresponding to the abnormal state information or the case where the display corresponding to the absence of abnormal state information is performed, the third notification display device 203 and the fourth notification display device 203 None of the display devices 204 are in a non-display state (that is, they are not in a completely off state), but are in some display state.

Then, the update timing counter in the main RAM 65 is set to a value corresponding to 2 seconds as the value corresponding to the next update timing (step S3410).

According to this embodiment described in detail above, the following excellent effects are achieved.

In a configuration in which the results of game history management are displayed on the first to fourth notification display devices 201 to 204, displays corresponding to abnormal conditions of the pachinko machine 10 are made on the first to fourth notification display devices 201 to 204. This makes it possible to use the first to fourth notification display devices 201 to 204 not only for displaying the results of game history management, but also as display devices for making displays corresponding to abnormal conditions.

When causing the first to fourth notification display devices 201 to 204 to display a display corresponding to the abnormal condition when no abnormal condition has occurred in the pachinko machine 10, the first to fourth notification display devices 201 to 204 A display corresponding to the fact that no abnormal condition has occurred is displayed. This makes it possible to clearly identify whether or not an abnormal state has occurred in the pachinko machine 10 by checking the first to fourth notification display devices 201 to 204.

The period during which game history management results are displayed on the first to fourth notification display devices 201 to 204, and the display corresponding to the abnormal state of the pachinko machine 10 is displayed on the first to fourth notification display devices 201 to 204. It is distinguished from the period in which As a result, by understanding the situation in which display is being performed on the first to fourth notification display devices 201 to 204, which display is being performed in the first to fourth notification display devices 201 to 204. It becomes possible to identify whether there is a

When a display corresponding to an abnormal state of the pachinko machine 10 is made, the first to fourth notification display devices 201 to 204 are controlled to display in a different manner than when the results of the game history management are displayed. This makes it possible to identify which display is being made on the first to fourth notification display devices 201 to 204 by grasping the display manner of the first to fourth notification display devices 201 to 204.

A plurality of notification display devices 201 to 204 are provided. This makes it possible to perform a wide variety of displays corresponding to the management results of the game history. In addition, due to the presence of multiple notification display devices 201 to 204, the display mode can be made larger depending on whether the game history management results are displayed or when a display corresponding to an abnormal state of the pachinko machine 10 is displayed. It becomes possible to make the difference.

When a display corresponding to an abnormal state of the pachinko machine 10 is made, the first and second notification display devices 201, 202, which are not in a hidden state when displaying the game history management results, are in a hidden state. This makes it possible to clearly identify which of the display of the game history management results and the display corresponding to the abnormal state of the pachinko machine 10 is being made by the first to fourth notification display devices 201-204, simply by checking whether the first and second notification display devices 201, 202 are in a hidden state.

When a display corresponding to an abnormal state of the pachinko machine 10 is made, the third and fourth notification display devices 203, 204 are in a display state, and the display contents are the display contents that can be displayed on the third and fourth notification display devices 203, 204 when displaying the game history management results. By allowing the display contents on the third and fourth notification display devices 203, 204 to overlap in this way, it is possible to avoid restricting the display contents when the game history management results are displayed and when a display corresponding to an abnormal state of the pachinko machine 10 is made. Even if the display contents on the third and fourth notification display devices 203, 204 are configured to overlap in this way, when a display corresponding to an abnormal state of the pachinko machine 10 is made, the first and second notification display devices 201, 202 are made in a non-display state, so it is possible to identify which display is being made on the first to fourth notification display devices 201 to 204.

In addition, if an operation to start the abnormality display is performed when no abnormality information is stored in the abnormality display area 211, a display corresponding to the fact that no abnormality information is stored at that time may be displayed in the first to fourth alarm display devices 201 to 204.

<Fourteenth embodiment>
In this embodiment, the processing configuration of the management output process executed by the main CPU 63 is different from that of the first embodiment. The configurations different from the first embodiment will be described below. Note that the description of the same configurations as the first embodiment will basically be omitted.

Figure 65 is a flowchart showing the management output process in this embodiment executed by the main CPU 63.

First, it is determined whether the management start flag provided in the main side RAM 65 is set to "1" (step S3501). The management start flag is a flag used by the main CPU 63 to specify whether or not history information should be stored in the history memory 117. In this embodiment, the total number of game balls ejected from the gaming area PA after the supply of operating power to the pachinko machine 10 is started (that is, after the supply of operating power to the MPU 62 is started) is the management start standard. The history information is not stored in the history memory 117 until the number corresponds to the value or more, and when the total number of game balls ejected from the game area PA exceeds the number corresponding to the management start reference value. The storage of history information in the history memory 117 is started. At the stage of shipping the Pachinko machine 10, the operation of the Pachinko machine 10 may be checked before shipping, and at that time, game balls are placed in each ball entry section and subsequent operations are checked. In contrast, the history information is not stored in the history memory 117 until the total number of game balls ejected from the game area PA after the start of supply of operating power to the pachinko machine 10 reaches or exceeds the management start reference value. By doing so, it is possible to prevent the ball entering results and the like during the operation check as described above from being stored as history information.

If a negative judgment is made in step S3501, the start management counter provided in the main RAM 65 is set to "7" (step S3502). The start management counter is a counter that allows the main CPU 63 to determine which of the seven ball entry detection sensors 42a to 48a is in a situation where the ball detection state needs to be determined when the management start flag is not set to "1".

Thereafter, it is determined whether the output flag of the main side RAM 65 corresponding to the value of the start management counter is set to "1" (step S3503). Specifically, if the value of the starting management counter is "7" and corresponds to the first winning opening detection sensor 42a, it is determined whether or not the first output flag is set to "1". If the value of the start management counter is "6" and corresponds to the second winning opening detection sensor 43a, it is determined whether the second output flag is set to "1", and the start management is performed. If the value of the counter is "5" and corresponds to the third winning opening detection sensor 44a, it is determined whether the third output flag is set to "1" and the value of the starting management counter is If the value is "4" and corresponds to the special electric detection sensor 45a, it is determined whether the fourth output flag is set to "1", and if the value of the starting management counter is "3" and the first If it corresponds to the operating port detection sensor 46a, it is determined whether the fifth output flag is set to "1", and if the value of the starting management counter is "2", the second operating port detection sensor 47a, it is determined whether the sixth output flag is set to "1", and if the value of the start management counter is "1" and it corresponds to the output port 24a, determines whether the seventh output flag is set to "1". As already explained, these first to seventh output flags are set to "1" in the ball entry detection process (FIG. 15).

If an affirmative determination is made in step S3503, the output flag corresponding to the value of the start management counter is cleared to "0" (step S3504). Thereafter, the value of the discharge number counter provided in the main side RAM 65 is incremented by 1 (step S3505). The ejected number counter is a counter for the main CPU 63 to specify the total number of game balls ejected from the gaming area PA in a situation where the management start flag of the main RAM 65 is not set to "1".

Thereafter, it is determined whether the value of the discharge number counter is equal to or greater than the management start reference value (step S3506). Although the management start reference value is set to "300", it is not limited to this and may be configured to have a number less than "300" or may be configured to have a number greater than "300". .

If a negative determination is made in step S3503 or if a negative determination is made in step S3506, the value of the start management counter of the main side RAM 65 is subtracted by 1 (step S3507). Then, it is determined whether the value of the start management counter after being subtracted by 1 is "0" (step S3508). If a negative determination is made in step S3508, the process returns to step S3503, and if an affirmative determination is made in step S3508, the present management output process is directly ended.

On the other hand, if the value of the discharged number counter in the main RAM 65 is equal to or greater than the management start reference value (step S3506: YES), the management start flag in the main RAM 65 is set to "1" (step S3509). Then, management processing is executed (step S3510). Also, if the management start flag is set to "1" and a positive judgment is made in step S3501, management processing is executed (step S3510). The processing content of the management processing is the same as steps S1001 to S1012 of the management output processing (Figure 25) in the first embodiment described above.

According to the above configuration, the total number of game balls ejected from the gaming area PA after the supply of operating power to the pachinko machine 10 is started (that is, after the supply of operating power to the MPU 62 is started) is managed. History information is not stored in the history memory 117 until the total number of game balls discharged from the gaming area PA reaches or exceeds the number corresponding to the management start reference value. storage of history information in the history memory 117 is started. At the stage of shipping the Pachinko machine 10, the operation of the Pachinko machine 10 may be checked before shipping, and at that time, game balls are placed in each ball entry section and subsequent operations are checked. In contrast, the history information is not stored in the history memory 117 until the total number of game balls ejected from the game area PA after the start of supply of operating power to the pachinko machine 10 reaches or exceeds the management start reference value. By doing so, it is possible to prevent the ball entering results and the like during the operation check as described above from being stored as history information.

In the configuration in which the history information is not stored in the history memory 117 until the total number of game balls discharged from the play area PA after the supply of operating power to the pachinko machine 10 is started as described above reaches or exceeds the number corresponding to the management start reference value, the management result of the game history during that period cannot be calculated. In such a situation, the first to fourth notification display devices 201 to 204 may be configured to display a message corresponding to the situation. For example, the first to fourth notification display devices 201 to 204 may be configured to have all display segments illuminated. The display content is not displayed in either the case of displaying the game history management result or the case of displaying the changeable state in which the setting state of the pachinko machine 10 can be changed, so that it is possible to identify whether the situation is such that the history information is not stored by checking the first to fourth notification display devices 201 to 204.

Furthermore, after the supply of operating power to the pachinko machine 10 is started, the setting mode of the information of the management start flag in the main side RAM 65 differs depending on whether the setting state of the pachinko machine 10 has become changeable or not. It is also possible to have a configuration in which FIG. 66 is a flowchart showing the main processing in the other embodiment executed by the main CPU 63. Steps S3601 to S3609 execute the same processes as steps S101 to S109 of the main process (FIG. 9) in the first embodiment, and steps S3611 to S3620 execute the main process (FIG. 9) in the first embodiment. The same processing as step S110 to step S119 of 9) is executed. On the other hand, in this alternative embodiment, when an affirmative determination is made in step S3608, the management start flag of the main side RAM 65 is cleared to "0" (step S3610), and after the process of step S3620 is executed, the management start flag of the main side RAM 65 is cleared. is set to "1" (step S3621). According to this configuration, if the process for newly setting the setting state of the pachinko machine 10 is not executed, the total number of game balls ejected from the gaming area PA after the supply of operating power to the pachinko machine 10 is started. The history information is not stored in the history memory 117 until the value exceeds the management start reference value, and when a process for newly setting the setting state of the pachinko machine 10 is executed, the history information is not stored in the history memory 117 until the History information is stored in the history memory 117 regardless of the number of game balls ejected after the supply of operating power is started. This makes it possible to manage the game history immediately after the start of supply of operating power to the Pachinko machine 10 in a situation where there is a high possibility that the operation check at the time of shipping the Pachinko machine 10 does not apply.

Further, history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA reaches or exceeds the management start reference value after the supply of operating power to the pachinko machine 10 is started. Instead of a configuration in which there is no history memory 117, an area may be provided for storing history information until the total number of game balls reaches a management start reference value or more. This makes it possible to specify the gaming history management result in the situation.

Further, history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA reaches or exceeds the management start reference value after the supply of operating power to the pachinko machine 10 is started. A configuration may be adopted in which a condition in which the supply of operating power to the pachinko machine 10 is started in a situation where no history information is stored in the history memory 117 may be added as a condition for a situation where no history information is stored. In this case, if the supply of operating power to the pachinko machine 10 is started in a situation where history information has already been stored in the history memory 117, the total number of game balls ejected from the game area PA is the management start criterion. History information will be stored in the history memory 117 from the beginning regardless of whether the value is greater than or equal to the value.

Further, history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA reaches or exceeds the management start reference value after the supply of operating power to the pachinko machine 10 is started. In addition to or in place of the configuration, if an abnormal state such as a radio wave detection abnormality or a vibration detection abnormality occurs, the history information may not be stored in the history memory 117 until the abnormal state is canceled. This makes it possible to prevent history information from being stored for events that occur in abnormal situations.

In addition to or instead of a configuration in which history information is not stored in the history memory 117 until the total number of game balls discharged from the game area PA after the supply of operating power to the pachinko machine 10 begins reaches or exceeds the management start reference value, history information may not be stored in the history memory 117 when the game machine main body 12 or the front door frame 14 is open. This makes it possible to prevent history information from being stored for events that occur when the game machine main body 12 or the front door frame 14 is open.

<Fifteenth embodiment>
In this embodiment, the entity that executes the process for managing the game history is different from that of the first embodiment. The following describes the configuration that is different from the first embodiment. Note that the description of the same configuration as the first embodiment will basically be omitted.

In the first embodiment, the MPU 62 is provided with the management IC 66, but in this embodiment, the MPU 62 is not provided with the management IC 66. Although the management IC 66 is not provided, in this embodiment, the processing for managing the game history is executed by the main CPU 63. Further, in this embodiment, the main CPU 63 executes various types of control by distinguishing between specific control and non-specific control. Specifically, control related to the management of game history is defined as non-specific control, and control other than non-specific control, including control for advancing the game based on the game operation by the player, is defined as specific control.

In detail, regarding the specific control, all controls by the main process (FIG. 9) that are executed when the supply of operating power to the main CPU 63 is started are included in the specific control. Note that in this embodiment, among the main processes (FIG. 9) in the first embodiment, the recognition process (step S111), the data output process (step S112), and the setting value update signal output process (step S119) are Not executed. Further, even in this embodiment, the timer interrupt processing is periodically executed by interrupting the processing of steps S113 to S116 in the main processing (FIG. 9), and various processing of the timer interrupt processing is performed. All of the processes other than the management process described later are included in the specific control. Further, some of the management processing is also included in the specific control.

Figure 67 is an explanatory diagram for explaining the setting mode of programs and data in the main ROM 64. In accordance with the distinction between specific control and non-specific control in the control executed by the main CPU 63, as shown in Figure 67, the addresses of the areas in the main ROM 64 where programs and data for specific control are stored and programs and data for non-specific control are stored are clearly distinguished.

Specifically, specific control programs are collectively stored in areas of consecutive addresses within the range of addresses X(1) to X(k+2). Furthermore, the addresses X(k+3) to X(k+5) that follow addresses X(1) to X(k+2) are addresses of unused areas where no data is stored, and the addresses X(k+5) that follow addresses X(1) to X(k+2) are addresses of unused areas where no data is stored. Specific control data is collectively stored in areas of consecutive addresses within the range from k+6) to X(m+2). Furthermore, the addresses X(m+3) to X(m+5) that follow addresses X(k+6) to X(m+2) are addresses of unused areas where no data is stored, and the addresses following address X( Non-specific control programs are collectively stored in areas of consecutive addresses within the range from m+6) to X(n+2). Furthermore, the addresses X(n+3) to X(n+5) that follow addresses X(m+6) to X(n+2) are addresses of unused areas where no data is stored, and the addresses X(m+6) to X(n+2) are addresses of unused areas where no data is stored. Non-specific control data is collectively stored in areas of consecutive addresses within the range from n+6) to X(p+2). Note that the relationship between the programs and data and addresses as described above is set in both the physical address in the main side ROM 64 and the logical address on the memory map recognized by the main side CPU 63.

As mentioned above, the program for specific control and the data for specific control, the program for non-specific control and the data for non-specific control, regardless of the execution order of the processing for executing the corresponding control, Because they are stored in areas with addresses in different ranges, for example, when checking only a specific control program and specific control data, the address where these specific control programs and specific control data are stored. It is only necessary to check the area within the range. For example, when checking only non-specific control programs and non-specific control data, the address where these non-specific control programs and non-specific control data are stored. You only need to check the area within the range. Therefore, it is possible to efficiently check programs and data by distinguishing between specific control and non-specific control. Additionally, it becomes possible to efficiently perform work when modifying programs and data by distinguishing between specific control and non-specific control.

By setting an address range for an unused area in which no data is stored between the address range of the area in which the program for specific control and the data for specific control are stored and the address range of the area in which the program for non-specific control and the data for non-specific control are stored, it becomes easier to grasp the boundary between the address range for specific control and the address range for non-specific control when performing a check.

In each of the address range for specific control and the address range for non-specific control, programs and data are stored in areas of different ranges of addresses, regardless of the order of execution of processes for executing the corresponding control. By doing so, it becomes possible to perform the work efficiently when checking programs and data separately. Additionally, by setting the address range of an unused area where no data is stored between the address range of the area where the program is stored and the address range of the area where the data is stored, the program This makes it easier to understand the boundary between the address range and the data address range during checking work.

FIG. 68 is an explanatory diagram for explaining the setting manner of each area in the main side RAM 65. As shown in FIG. Corresponding to the fact that the control executed by the main CPU 63 is divided into specific control and non-specific control, the main RAM 65 also has a work area 221 for specific control and a work area 221 for specific control, as shown in FIG. The address range of the stack area 222 for non-specific control and the address range of the work area 223 for non-specific control and the stack area 224 for non-specific control are clearly distinguished.

Specifically, the area of each successive address within the range of addresses Y(1) to Y(r+2) is set as the work area 221 for specific control. In addition, addresses Y(r+3) to Y(r+5) successive to addresses Y(1) to Y(r+2) are unused area addresses, and the area of each successive address within the range of addresses Y(r+6) to Y(s+2) is set as the stack area 222 for specific control. In addition, addresses Y(s+3) to Y(s+5) successive to addresses Y(r+6) to Y(s+2) are unused area addresses, and the area of each successive address within the range of addresses Y(s+6) to Y(t+2) is set as the work area 223 for non-specific control. Additionally, addresses Y(t+3) to Y(t+5) that are successive to addresses Y(s+6) to Y(t+2) are unused area addresses, and the areas of successive addresses within the range of addresses Y(t+6) to Y(u+2) are set as stack areas 224 for non-specific control. The relationship between each area and address as described above is set in both the physical addresses in the main RAM 65 and the logical addresses on the memory map recognized by the main CPU 63.

As described above, the work area 221 for specific control and the work area 223 for non-specific control are set separately, so that different areas of the main RAM 65 are used when performing various calculations when the main CPU 63 executes specific control and when it executes non-specific control. This makes it possible to prevent an event from occurring in which information in the main RAM 65 required for the execution of one of specific control and non-specific control is erased when the other is executed. Incidentally, a load command is issued by the main CPU 63 when writing information to each work area 221, 223 and reading information from each work area 221, 223.

Since the stack area 222 for specific control and the stack area 224 for non-specific control are set separately, it is possible to Different areas of the main side RAM 65 are used when saving information stored in the register of the side CPU 63 and when storing information on a return address on the program. As a result, when one of the specific control and non-specific control is being executed, when saving the information stored in the register of the main CPU 63 and when storing the information of the return address on the program, it can be used in the other. This makes it possible to make it difficult for events such as information being deleted to occur. Incidentally, when writing information to each stack area 222, 224, the main CPU 63 performs a push command, and when reading information from each stack area 222, 224, the main CPU 63 performs a pop command. Furthermore, when reading information from each stack area 222, 224, the information that is written to the stack area 222, 224 later in the order of writing is read out first.

Here, when the main CPU 63 executes processing corresponding to specific control, the main CPU 63 can write information to the work area 221 for specific control and the stack area 222 for specific control, and Information can be read from the work area 221 for specific control and the stack area 222 for specific control. On the other hand, when the main CPU 63 executes processing corresponding to specific control, the main CPU 63 can read information from the work area 223 for non-specific control and the stack area 224 for non-specific control; , information cannot be written to the work area 223 for non-specific control and the stack area 224 for non-specific control. This makes it possible to prevent information used in processing corresponding to non-specific control from being accidentally deleted in a situation where processing corresponding to specific control is being executed.

In addition, when the main CPU 63 executes processing corresponding to non-specific control, the main CPU 63 can write information to the work area 223 for non-specific control and the stack area 224 for non-specific control, and can read information from the work area 223 for non-specific control and the stack area 224 for non-specific control. On the other hand, when the main CPU 63 executes processing corresponding to non-specific control, the main CPU 63 can read information from the work area 221 for specific control and the stack area 222 for specific control, but cannot write information to the work area 221 for specific control and the stack area 222 for specific control. This makes it possible to prevent information used in processing corresponding to specific control from being accidentally erased when processing corresponding to non-specific control is being executed.

Note that backup power will be supplied to the main side RAM 65 even after the pachinko machine 10 is powered off, but the backup power will be supplied to the work area 221 for specific control, the stack area 222 for specific control, and the non-specific control. It is supplied to all of the work area 223 for use and the stack area 224 for non-specific control. As a result, the information stored in the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control is stored when the power of the pachinko machine 10 is shut off. Even afterward, the data will be retained as long as backup power is supplied.

Next, timer interrupt processing in this embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. 69. As in the first embodiment, the timer interrupt process is executed periodically (for example, every 4 milliseconds) while the processes in steps S113 to S116 are being executed in the main process (FIG. 9). Note that the program corresponding to timer interrupt processing is set as a specific control program.

In steps S3701 to S3718, the same processes as steps S301 to S318 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a specific control program and specific control data. In step S3719 in the timer interrupt processing, management processing is executed. When executing management processing, the subroutine program corresponding to the management processing set in the specific control program will be executed. Information for specifying the return address of the timer interrupt processing in is written to the stack area 222 for specific control by a push instruction. When the management process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process indicated by the return address.

Figure 70 is a flowchart showing the management process. Note that steps S3801 to S3805 in the management process are executed by the main CPU 63 using a program for specific control and data for specific control.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S3801). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and activated in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Thereafter, the information in the flag register of the main CPU 63 is saved to the specific control stack area 222 by a push command as "PUSH PSW" (step S3802). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half-carry flag, and the like, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the subroutine program corresponding to management execution processing is started, the flag register information in the state before it changes after the subroutine is called or the relevant subroutine starts. It becomes possible to save it to the stack area 222 for specific control. Note that the amount of information in the flag register is 1 byte.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the non-specific control program, the management execution process is started (step S3803). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

When returning to the management processing program after the management execution processing is executed, the flag register information saved in the stack area 222 for specific control in step S3802 is restored to the flag register of the main CPU 63 by a pop command as "POP PSW" (step S3804). This causes the flag register information of the main CPU 63 to return to the information at the time step S3802 was executed. In other words, the flag register information of the main CPU 63 returns to the information for executing specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which generation is permitted (step S3805). This enables new execution of timer interrupt processing.

Figure 71 is a flowchart showing the management execution process. Note that steps S3901 to S3915 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as "LD SP, Y(u+2)", Y(u+2) is set as a fixed address at the start of non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S3901). The stack pointer is an area in which address information is set for the main CPU 63 to specify a storage area in the stack areas 222 and 224 to which information is to be written by a push command. Each time a push instruction is executed, the stack pointer information is updated to the address of the storage area to be written in the next order, and each time a pop instruction is executed, the stack pointer information is updated to the address of the storage area to be written in the previous order. The address information of the storage area is updated. Furthermore, when using the stack area 224 for non-specific control, the information to be stored is stored starting from the storage area at the last address in the stack area 224 for non-specific control, and each time information to be stored is added. Then, the storage area of the storage destination is changed toward the first address side in the stack area 224 for non-specific control. Therefore, in step S3901, information on the last address in the stack area 224 for non-specific control is set in the stack pointer. The same holds true for the specific control stack area 222, where information is stored from the storage area at the last address to the storage area at the first address.

By the way, if an additional push command is executed even though information has been set in all storage areas for both the stack area 222 for specific control and the stack area 224 for non-specific control, All areas of the main side RAM 65 are cleared to "0", assuming that an abnormality has occurred in the storage process. This makes it possible to prevent the game from continuing even though an abnormality has occurred in the storage process.

Thereafter, the information in the WA register of the master CPU 63 is saved to the WA buffer set in the work area 223 for non-specific control by a load command as "LD (_WABUF), WA" (step S3902). Also, the information in the BC register of the master CPU 63 is saved to the BC buffer set in the work area 223 for non-specific control by a load command as "LD (_BCBUF), BC" (step S3903). Also,
The load command is "LD (_DEBUF), DE" to save the information in the DE register of the master CPU 63 to the DE buffer set in the work area 223 for non-specific control (step S3904). The load command is "LD (_HLBUF), HL" to save the information in the HL register of the master CPU 63 to the HL buffer set in the work area 223 for non-specific control (step S3905). The load command is "LD (_IXBUF), IX" to save the information in the IX register of the master CPU 63 to the IX buffer set in the work area 223 for non-specific control (step S3906). The load command is "LD (_IYBUF), IY" to save the information in the IY register of the master CPU 63 to the IY buffer set in the work area 223 for non-specific control (step S3907).

In addition to the flag register already described, the main CPU 63 also contains various general-purpose registers, auxiliary registers, and index registers. In this case, in steps S3902 to S3907, the information of some of these general-purpose registers, auxiliary registers, and index registers, namely the WA register, BC register, DE register, HL register, IX register, and IY register, is saved to the corresponding buffer in the non-specific control work area 223. Note that the amount of information in the WA register, BC register, DE register, HL register, IX register, and IY register is all 2 bytes.

These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in the check process (step S3908), which is a process corresponding to non-specific control. By saving the information set in such registers to the work area 223 for non-specific control before executing the check process (step S3908), the information in these registers that was used for specific control can be used for non-specific control. This makes it possible to evacuate the area before it starts. Therefore, even if these registers are overwritten during non-specific control, the status of these registers can be changed by restoring the information saved in the work area 223 for non-specific control to these registers when terminating non-specific control. It becomes possible to restore the state to the state corresponding to the specific control before the non-specific control was executed.

In addition, instead of saving all the information of the various general-purpose registers, auxiliary registers, and index registers to the work area 223 for non-specific control, the information of the WA register, BC register, DE register, HL register, IX register, and IY register to be used in the check process, which is a process corresponding to the non-specific control, is selectively saved to the work area 223 for non-specific control, thereby making it possible to reduce the capacity reserved for saving the register information in the work area 223 for non-specific control. Therefore, it is possible to save the above-mentioned register information while securing a large capacity of the work area 223 for non-specific control that is available during the check process. Of course, for the various general-purpose registers, auxiliary registers, and index registers in the main CPU 63 other than the WA register, BC register, DE register, HL register, IX register, and IY register, the information set before the process corresponding to the non-specific control is started is stored and held until the process corresponding to the non-specific control is completed and the process corresponding to the specific control is resumed.

Furthermore, by saving register information to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, the capacity of the stack area 224 for non-specific control can be kept small. It becomes possible. Furthermore, when using the stack area 224 for non-specific control, as described above, the information is written in the order in which the later information is read out first, so if the order in which the information is read is shifted due to some kind of noise, etc. If this happens, all subsequent reading order information will be restored to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. In contrast, by saving register information to the work area 223 for non-specific control, it is possible to prevent the above-mentioned phenomenon from occurring even when there is a large amount of information to be saved. .

After the processes of steps S3902 to S3907 are executed, a check process is executed (step S3908). When the check process is executed, a subroutine program corresponding to the check process set in the program for non-specific control is executed, and when the program for the subroutine is executed, information for specifying the return address of the management execution process after the execution of the check process is written to the stack area 224 for non-specific control by a push command. Then, when the check process is completed, information for specifying the return address is read by a pop command, and the program returns to the program for the management execution process indicated by the return address. Details of the check process will be explained later.

After executing the check process, Y(r+α) is set as a fixed address at the time of returning to the specific control in the stack pointer of the main CPU 63 by a load instruction as "LD SP, Y(r+α)" (step S3909 ). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

The amount of information stored in the stack area 222 for specific control immediately before the subroutine of the management execution process is executed in step S3803 of the management process (FIG. 70) is always constant, and accordingly, the information of the stack pointer of the main CPU 63 at that timing (i.e., the value of the stack pointer) is constant. In this case, the information stored in the stack area 222 for specific control includes, for example, the return address information of the management process (FIG. 70) after the management execution process (FIG. 71) is completed, and the return address information of the timer interrupt process (FIG. 69) after the management process (FIG. 70) is completed. The above-mentioned fixed information of the stack pointer is Y(r+α). Therefore, when the check process, which is the process corresponding to the non-specific control, is completed and the process corresponding to the specific control is returned to, the fixed information Y(r+α) is set in the stack pointer of the main CPU 63, making it possible to restore the information of the stack pointer to the information immediately before the process corresponding to the non-specific control is started. By setting fixed information in the stack pointer in this way, the stack pointer information is restored to the information immediately before the processing corresponding to the non-specific control is started, eliminating the need to save the stack pointer information of the main CPU 63 corresponding to the specific control in the main RAM 65 before starting the processing corresponding to the non-specific control. This makes it possible to reduce the processing load and eliminates the need to reserve an area in the main RAM 65 for the save.

Thereafter, the information saved in the WA buffer of the work area 223 for non-specific control is overwritten in the WA register of the main CPU 63 by a load instruction as "LD WA, (_WABUF)" (step S3910). Also, as "LD BC, (_BCBUF)", the information saved in the BC buffer of the non-specific control work area 223 is overwritten in the BC register of the main CPU 63 by the load instruction (step S3911). Furthermore, as "LD DE, (_DEBUF)", the information saved in the DE buffer of the work area 223 for non-specific control is overwritten in the DE register of the main CPU 63 by the load instruction (step S3912). Further, as "LD HL, (_HLBUF)", the information saved in the HL buffer of the work area 223 for non-specific control is overwritten in the HL register of the main CPU 63 by the load instruction (step S3913). Further, as "LD IX, (_IXBUF)", the information saved in the IX buffer of the work area 223 for non-specific control is overwritten in the IX register of the main CPU 63 by the load instruction (step S3914). Furthermore, as "LD IY, (_IYBUF)", the information saved in the IY buffer of the work area 223 for non-specific control is overwritten in the IY register of the main CPU 63 by the load instruction (step S3915). By executing the processing from step S3910 to step S3915, processing corresponding to non-specific control is started for each information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63. It becomes possible to restore the information corresponding to the specific control immediately before the control.

Here, when processing corresponding to non-specific control is executed, the information stored in the flag register and various registers of the main CPU 63 is not saved to the main RAM 65 when processing corresponding to specific control is resumed. This eliminates the need to secure a memory area for saving the above information in the work area 221 for specific control and the stack area 222 for specific control.

In addition, the information stored in the flag register and various registers of the main CPU 63 when processing corresponding to non-specific control is executed is information that will not be used when processing corresponding to non-specific control is started again after returning to processing corresponding to specific control. In other words, information required for multiple processing times of processing corresponding to non-specific control executed with processing corresponding to specific control in between is stored in the work area 223 for non-specific control or the stack area 224 for non-specific control, and is not stored in the flag register and various registers of the main CPU 63. Therefore, even if the information stored in the flag register and various registers of the main CPU 63 is not saved to the main RAM 65 when processing corresponding to non-specific control is executed, no problem occurs in executing processing corresponding to non-specific control.

Next, the check process executed by calling a subroutine program in step S3908 will be described. This check process executes a process for collecting information on game history, a process for deriving the results of game history management, and a process for notifying the results of that management. In other words, the process for collecting information on game history, a process for deriving the results of game history management, and a process for notifying the results of that management are executed as processes corresponding to non-specific control.

Before explaining the check process, we will explain the contents of the various areas 231-234 of the work area 223 for non-specific control that are used to manage the game history. Figure 72 is an explanatory diagram for explaining the various areas 231-234 of the work area 223 for non-specific control that are used to manage the game history.

The work area 223 for non-specific control is provided with a normal counter area 231, an opening/closing execution mode counter area 232, and a high frequency support mode counter area 233. Each of these areas 231 to 233 includes general winning counters 231a, 232a, 233a, special electric winning counters 231b, 232b, 233b, first operating counters 231c, 232c, 233c, second operating counters 231d, 232d, 233d, and Out counters 231e, 232e, and 233e are provided. The general prize winning counters 231a, 232a, 233a are counters for counting the number of game balls entering the general prize winning hole 31 from a predetermined measurement start timing. The special electric winning counters 231b, 232b, and 233b are counters for counting the number of game balls entering the special electric winning device 32 from a predetermined measurement start timing. The first operation counters 231c, 232c, and 233c are counters for counting the number of game balls entering the first operation port 33 from a predetermined measurement start timing. The second operation counters 231d, 232d, and 233d are counters for counting the number of game balls entering the second operation port 34 from a predetermined measurement start timing. The out counters 231e, 232e, and 233e are counters for counting the number of game balls entering the out port 24a from a predetermined measurement start timing.

The counters 231a to 231e in the normal counter area 231 are used to count the number of game balls that have entered the target ball entry sections 24a, 31 to 34 when the front door frame 14 is closed and the game is neither in the open/close execution mode nor in the high-frequency support mode. The counters 232a to 232e in the open/close execution mode counter area 232 are used to count the number of game balls that have entered the target ball entry sections 24a, 31 to 34 when the front door frame 14 is closed and the game is in the open/close execution mode. The counters 233a to 233e in the high-frequency support mode counter area 233 are used to count the number of game balls that have entered the target ball entry sections 24a, 31 to 34 when the front door frame 14 is closed and the game is in the high-frequency support mode.

Note that the situation where the front door frame 14 is open is not included in the measurement because a game ball enters the ball entry section 24a, 31 to 34 due to maintenance while the front door frame 14 is open. This is to exclude from the measurement object the number of balls that enter the ball when the ball is thrown. However, the present invention is not limited to this, and the situation where the front door frame 14 is in the open state may be subject to measurement in the same way as the situation where the front door frame 14 is in the closed state.

The work area 223 for non-specific control is provided with a calculation result storage area 234 in addition to a normal counter area 231, an opening/closing execution mode counter area 232, and a high frequency support mode counter area 233. The calculation result storage area 234 is an area for storing information on game history management results calculated using the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233. . The information on the game history management results stored in the calculation result storage area 234 is stored and held until the newly calculated information is overwritten by the new calculation of the information on the game history management results.

FIG. 73 is a flowchart showing the check process executed when the subroutine program is called in step S3908. Note that the processing from step S4001 to step S4008 in the check processing, including the subroutine processing, is executed by the main CPU 63 using a non-specific control program and non-specific control data. In addition, when executing subroutine processing, information on the return address after execution of the subroutine processing is written in the storage area corresponding to the current stack pointer value of the main CPU 63 in the stack area 224 for non-specific control. At the same time, the value of the stack pointer is updated to the address information of the storage area to be stored in the next order. Furthermore, when the processing of the subroutine is completed, the information on the return address is read from the storage area corresponding to the value in the previous order with respect to the current value of the stack pointer of the main CPU 63, and corresponds to the information on the return address. Upon returning to the program, the value of the stack pointer is updated to the address of the storage area from which the information at the return address was read.

In the check process, if the front door frame 14 is in an open state (step S4001: YES), normal ball entry management processing (step S4004), ball entry management processing in opening/closing execution mode (step S4005), and high frequency ball entry management processing are performed. The result calculation process (step S4007) and the display process (step S4008), which will be described later, are executed without executing any of the ball entry management processes (step S4006) in the support mode. Since the gaming area PA is formed by a space divided into the front and back by the back side of the window panel 52 provided on the front door frame 14 and the front side of the game board 24, when the front door frame 14 is in an open state, Even if the game area PA is opened forward and a game ball is launched toward the game area PA in that situation, the game ball cannot normally flow down the game area PA. In addition, if a game ball enters the ball entry portions 24a, 31 to 34 when the front door frame 14 is open, the game hall manager may This is a case where the front door frame 14 is left open and game balls enter the game ball due to maintenance or the like. Since such entering of a game ball is not an entering of a game ball in the execution situation of a regular game, it is not necessary to manage such entering of a game ball. Therefore, in the check process, if the front door frame 14 is in the open state as described above, none of the processes from step S4004 to step S4006 is executed.

If the front door frame 14 is in the closed state and neither the opening/closing execution mode nor the high-frequency support mode is in effect (steps S4001 to S4003: NO), normal ball entry management processing is executed (step S4004). Further, when the front door frame 14 is in the closed state and the opening/closing execution mode is in effect (step S4001: NO, step S4002: YES), ball entry management processing in the opening/closing execution mode is executed (step S4005). Further, when the front door frame 14 is in the closed state and the high-frequency support mode is in effect (step S4001: NO, step S4003: YES), ball entry management processing in the high-frequency support mode is executed (step S4006).

FIG. 74 is a flowchart showing normal ball entry management processing in step S4004.

If it is determined that one game ball is detected by the first winning opening detection sensor 42a (step S4101: YES), that is, the signal received from the first winning opening detection sensor 42a is switched from LOW level to HI level. If it is determined that one game ball has been detected by the second winning hole detection sensor 43a (step S4103: YES), that is, the signal received from the second winning hole detection sensor 43a When it is confirmed that has switched from LOW level to HI level, or when it is determined that one game ball has been detected by the third winning hole detection sensor 44a (step S4105: YES), that is, the third winning hole When it is confirmed that the signal received from the detection sensor 44a has switched from the LOW level to the HI level, the value of the normal general winning counter 231a is incremented by 1 (step S4102, step S4104, step S4106).

If the ball entry management process is performed during the opening and closing execution mode, the value of the general winning counter 232a for the opening and closing execution mode is incremented by 1 as the process corresponding to steps S4102, S4104, and S4106, and if the ball entry management process is performed during the high frequency support mode, the value of the general winning counter 233a for the high frequency support mode is incremented by 1 as the process corresponding to steps S4102, S4104, and S4106. In addition, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, the detection results of the first to third winning hole detection sensors 42a to 44a are also monitored, and if it is determined that one game ball has been detected by any of the first to third winning hole detection sensors 42a to 44a, a process is executed to pay out the number of game balls corresponding to the general winning hole 31.

If it is determined that one game ball is detected by the special electric detection sensor 45a (step S4107: YES), that is, it is confirmed that the signal received from the special electric detection sensor 45a has switched from the LOW level to the HI level. If so, 1 is added to the value of the normal special electric winning counter 231b (step S4108).

Note that if the ball entry management process is in the opening/closing execution mode, the value of the special electric winning counter 232b for the opening/closing execution mode is incremented by 1 as a process corresponding to step S4108, and if the ball entry management process is in the high-frequency support mode, As a process corresponding to step S4108, 1 is added to the value of the special electric prize winning counter 233b for the high frequency support mode. In addition, the detection result of the special electric detection sensor 45a is also monitored in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as a process corresponding to the specific control, and the detection result of the special electric detection sensor 45a is When it is determined that game balls are detected, a process is executed to make the number of game balls corresponding to the special electric winning device 32 paid out, and a process is executed to specify the trigger for ending the round game.

If it is determined that one game ball is detected by the first operating port detection sensor 46a (step S4109: YES), that is, the signal received from the first operating port detection sensor 46a is switched from LOW level to HI level. If it is confirmed that the change has been made, 1 is added to the value of the first normal operation counter 231c (step S4110).

If the ball entry management process is during the opening and closing execution mode, the value of the first operation counter 232c for the opening and closing execution mode is incremented by 1 as the process corresponding to step S4110, and if the ball entry management process is during the high-frequency support mode, the value of the first operation counter 233c for the high-frequency support mode is incremented by 1 as the process corresponding to step S4110. In addition, the detection result of the first operation port detection sensor 46a is also monitored in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, and if it is determined that one game ball has been detected by the first operation port detection sensor 46a, a process is executed to pay out the number of game balls corresponding to the first operation port 33, and a process is executed to identify the trigger for obtaining reserved information for the special chart.

If it is determined that one game ball is detected by the second operating port detection sensor 47a (step S4111: YES), that is, the signal received from the second operating port detection sensor 47a is switched from LOW level to HI level. If it is confirmed that the change has been made, the value of the second normal operation counter 231d is incremented by 1 (step S4112).

If the ball entry management process is during the opening and closing execution mode, the value of the second operation counter 232d for the opening and closing execution mode is incremented by 1 as a process corresponding to step S4112, and if the ball entry management process is during the high-frequency support mode, the value of the second operation counter 233d for the high-frequency support mode is incremented by 1 as a process corresponding to step S4112. In addition, the detection result of the second operation port detection sensor 47a is also monitored in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as a process corresponding to specific control, and if it is determined that one game ball has been detected by the second operation port detection sensor 47a, a process is executed to pay out the number of game balls corresponding to the second operation port 34, and a process is executed to identify the trigger for obtaining reserved information for the special chart.

If it is determined that one game ball has been detected by the exit detection sensor 48a (step S4113: YES), that is, the signal received from the exit detection sensor 48a has switched from the LOW level to the HI level. If confirmed, the value of the normal out counter 231e is incremented by 1 (step S4114).

Note that if the ball entry management process is in the opening/closing execution mode, the value of the out counter 232e for the opening/closing execution mode is incremented by 1 as a process corresponding to step S4114, and if the ball entry management process is in the high-frequency support mode, step S4114 is performed. As a process corresponding to S4114, the value of the out counter 233e for high frequency support mode is incremented by 1. Further, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) that is executed as a process corresponding to the specific control, the detection result of the exit detection sensor 48a is not monitored.

By executing the processing of steps S4004 to S4006 as described above, the number of game balls entering the general winning port 31 is measured using the general winning counters 231a, 232a, and 233a, the number of game balls entering the special winning device 32 is measured using the special winning counters 231b, 232b, and 233b, the number of game balls entering the first operating port 33 is measured using the first operating counters 231c, 232c, and 233c, the number of game balls entering the second operating port 34 is measured using the second operating counters 231d, 232d, and 233d, and the number of game balls entering the out port 24a is measured using the out counters 231e, 232e, and 233e. This makes it possible for the main CPU 63 to grasp the ball entry history for each ball entry section 24a, 31 to 34. In addition, by providing separate counter areas 231 for normal use, 232 for the open/close execution mode, and 233 for the high-frequency support mode, the main CPU 63 can grasp the history of balls entering each of the ball entry sections 24a, 31-34 by distinguishing between a situation that is neither the open/close execution mode nor the high-frequency support mode, a situation that is the open/close execution mode, and a situation that is the high-frequency support mode.

Returning to the explanation of the check process (FIG. 73), if a positive judgment is made in step S4001, if the process of step S4004 is executed, if the process of step S4005 is executed, or if the process of step S4006 is executed, then a result calculation process is executed in step S4007, and a display process is executed in step S4008.

FIG. 75 is a flowchart showing the result calculation process in step S4007.

First, it is determined whether the management start flag provided in the work area 223 for non-specific control is set to "1" (step S4201). The management start flag is a flag used by the main CPU 63 to specify whether or not the situation is such that collection of game history for calculating the game history management results is in order. In this embodiment, when the supply of operating power to the Pachinko machine 10 is started for the first time after the Pachinko machine 10 is manufactured (that is, when the supply of operating power to the MPU 62 is started), the game ejected from the gaming area PA is Until the total number of balls reaches or exceeds the number corresponding to the management start reference value, the total number of game balls ejected from the gaming area PA is not collected to calculate the game history management results. When the number of pieces exceeds the number corresponding to the management start reference value, collection of game history is executed for calculating a game history management result. At the stage of shipping the Pachinko machine 10, the operation of the Pachinko machine 10 may be checked before shipping, and at that time, game balls are placed in each ball entry section and subsequent operations are checked. On the other hand, after the supply of operating power to the pachinko machine 10 starts, until the total number of game balls ejected from the game area PA reaches or exceeds the management start reference value, the game for calculating the management results of the game history By disabling the history collection, it is possible to prevent the ball entry results during the operation check as described above from being collected as the gaming history for calculating the gaming history management results. Become.

Here, when the supply of operating power to the pachinko machine 10 is started for the first time after the manufacture of the pachinko machine 10 (i.e. when the supply of operating power to the MPU 62 is started), the value of the management start flag is "0". In this case, the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the open/close execution mode counter area 232, and the values of the counters 233a to 233e in the high frequency support mode counter area 233 are also "0". On the other hand, when the supply of operating power to the pachinko machine 10 is stopped while the value of the management start flag is "1", and then the supply of operating power to the pachinko machine 10 is started while backup power is being supplied to the main RAM 65, the value of the management start flag remains "1". In this case, the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the open/close execution mode counter area 232, and the values of the counters 233a to 233e in the high-frequency support mode counter area 233 are also maintained in the state before the supply of operating power to the pachinko machine 10 was stopped. Due to the above configuration, when the value of the management start flag is "0", the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the open/close execution mode counter area 232, and the values of the counters 233a to 233e in the high-frequency support mode counter area 233 are also "0".

Incidentally, when the clearing process of the main RAM 65 is executed in step S105 or step S117 in the main processing (Figure 9), the work area 221 for specific control and the stack area 222 for specific control are the targets of the clearing process, and the work area 223 for non-specific control and the stack area 224 for non-specific control are excluded from the targets of the clearing process. This prevents the manager of the amusement hall from intentionally clearing the work area 223 for non-specific control and the stack area 224 for non-specific control to "0".

In addition, the main CPU 63 checks whether an abnormality has occurred in the work area 223 for non-specific control and the stack area 224 for non-specific control in the timer interrupt processing (FIG. 69), which will be described later. If it is confirmed, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". Thereby, if an abnormality occurs in the work area 223 for non-specific control and the stack area 224 for non-specific control, it becomes possible to initialize them. In addition, if an abnormality occurs in the work area 223 for non-specific control in this configuration, the work area 223 for non-specific control is cleared to "0" without clearing the stack area 224 for non-specific control to "0". However, when an abnormality occurs in the stack area 224 for non-specific control, the stack area 224 for non-specific control is cleared to "0" without clearing the work area 223 for non-specific control to "0". Good too. Furthermore, even if an abnormality occurs in the work area 223 for non-specific control and the stack area 224 for non-specific control, the calculation result storage area 234 may be excluded from being cleared to "0".

If a negative determination is made in step S4201, the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the opening/closing execution mode counter area 232, and the values of the counters 232a to 232e in the counter area 233 for high frequency support mode. The total number is calculated by summing all the values of each counter 233a to 233e (step S4202). Then, it is determined whether the calculated total number is greater than the management start reference value "300" (step S4203).

If the result of the positive judgment in step S4203 is positive, the management start flag for the non-specific control work area 223 is set to "1" (step S4204). In addition, the counters 231a to 231e in the normal counter area 231, the counters 232a to 232e in the open/close execution mode counter area 232, and the counters 233a to 233e in the high frequency support mode counter area 233 are all cleared to "0" (step S4205). As a result, all information on the game history collected until the total number of game balls discharged from the game area PA after the supply of operating power to the pachinko machine 10 has started (i.e., after the supply of operating power to the MPU 62 has started) becomes equal to or greater than the number corresponding to the management start reference value is erased. Therefore, it is possible to prevent the collection of game history for calculating the management result of the game history from being executed until the total number of game balls discharged from the game area PA after the supply of operating power to the pachinko machine 10 has started becomes equal to or greater than the management start reference value.

If the determination in step S4201 is positive, the total number is calculated in the same manner as in step S4202 (step S4206). That is, the total number is calculated by adding up the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the open/close execution mode counter area 232, and the values of the counters 233a to 233e in the high frequency support mode counter area 233. Then, it is determined whether the calculated total number is equal to or greater than the calculation reference number of "6000" (step S4207).

If the determination in step S4207 is affirmative, calculation processing of various parameters is executed (step S4208). Specifically, assuming that the values of the various counters 231a to 231e in the normal counter area 231 are K61 to K65, the values of the various counters 232a to 232e in the open/close execution mode counter area 232 are K71 to K75, and the values of the various counters 233a to 233e in the high frequency support mode counter area 233 are K81 to K85, the following 61st to 68th parameters are calculated.
Parameter 61: Total number of game balls dispensed (K61 + K71 + K81 × number of prize balls for winning the general winning port 31 + K62 + K72 + K82 × number of prize balls for winning the special winning device 32 + K63 + K73 + K83 × number of prize balls for winning the first operating port 33 + K64 + K74 + K84 × number of prize balls for winning the second operating port 34) / total number of game balls discharged from the game area PA (K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75 + K81 + K82 + K83 + K84 + K85) ratio 62nd parameter: total number of game balls paid out during normal times (K61 x "number of prize balls for winning at the general winning port 31" + K62 x "number of prize balls for winning at the special electric winning device 32" + K63 x "number of prize balls for winning at the first operating port 33" + K64 x "number of prize balls for winning at the second operating port 34" ) / The ratio of the total number of game balls discharged from the skill area PA during normal times (K61 + K62 + K63 + K64 + K65) ・ 63rd parameter: The total number of game balls paid out during the opening and closing execution mode (K71 × "Number of prize balls for winning the general winning port 31" + K72 × "Number of prize balls for winning the special winning device 32" + K73 × "Number of prize balls for winning the first operating port 33" + K74 × "Number of prize balls for winning the second operating port 34") / The ratio of the total number of game balls discharged from the skill area PA during the opening and closing execution mode (K71 + K72 + K73 + K74 + K75) 64th parameter: The total number of game balls paid out during the high frequency support mode (K81 x "number of prize balls for winning the general winning port 31" + K82 x "number of prize balls for winning the special winning device 32" + K83 x "number of prize balls for winning the first operating port 33" + K84 x "number of prize balls for winning the second operating port 34" 65th parameter: the total number of game balls entering the general winning port 31 (K61 + K71 + K81) / the ratio of the total number of game balls discharged from the game area PA in the high frequency support mode (K81 + K82 + K83 + K84 + K85) 66th parameter: the total number of game balls entering the general winning port 31 (K61 + K71 + K81) / the ratio of the total number of game balls discharged from the game area PA (K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75 + K81 + K82 + K83 + K84 + K85) Parameter 66: The ratio of the total number of game balls entering the first operating port 33 (K63+K73+K83)/the total number of game balls discharged from the game area PA (K61+K62+K63+K64+K65+K71+K72+K73+K74+K75+K81+K82+K83+K84+K85) Parameter 67: ("K62+K72+K82" x "Number of winning balls for winning the special electric winning device 32" + "K64+K74+K84 ... Ratio of "K61 + K71 + K81" x "number of prize balls for winning at the general winning port 31" + "K62 + K72 + K82" x "number of prize balls for winning at the special line winning device 32" + "K63 + K73 + K83" x "number of prize balls for winning at the first operating port 33" + "K64 + K74 + K84" x "number of prize balls for winning at the second operating port 34") to the total number of game balls paid out; 68th parameter: "K6 2+K72+K82" x "number of prize balls for winning the special electric winning device 32" / total number of game balls paid out ("K61+K71+K81" x "number of prize balls for winning the general winning port 31" + "K62+K72+K82" x "number of prize balls for winning the special electric winning device 32" + "K63+K73+K83" x "number of prize balls for winning the first operating port 33" + "K64+K74+K84" x "number of prize balls for winning the second operating port 34") ratio. Then, the 61st to 68th parameters calculated in step S4208 are overwritten in the calculation result storage area 234 (step S4209). In this case, the 61st to 68th parameters of the calculation results in the previous processing round that were already stored in the calculation result storage area 234 are erased. Furthermore, even when the supply of operating power to the pachinko machine 10 is stopped, backup power is supplied to the main RAM 65, so when the backup power is being supplied, even if the supply of operating power to the pachinko machine 10 has just started, information on the 61st to 68th parameters calculated before the supply of operating power to the pachinko machine 10 was stopped is stored in the calculation result memory area 234.

Then, the counters 231a to 231e in the normal counter area 231, the counters 232a to 232e in the open/close execution mode counter area 232, and the counters 233a to 233e in the high frequency support mode counter area 233 are all cleared to "0" (step S4210). This makes it possible to erase the game history information once the 61st to 68th parameters have been calculated.

Immediately after the management start flag is set to "1", if the total number of game balls ejected from the gaming area PA is equal to or greater than the value obtained by subtracting the management start reference value from the calculation reference number, the process starts from step S4208. It may be configured to execute the process of step S4210, and thereafter execute the processes of steps S4208 to S4210 when the total number of game balls discharged from the game area PA becomes equal to or greater than the calculation reference number.

FIG. 76 is a flowchart showing the display processing of step S4008 in the check processing (FIG. 73).

First, the value of the update timing counter provided in the work area 223 for non-specific control is subtracted by 1 (step S4301). The update timing counter is a counter for the main CPU 63 to specify that it is the timing to update the display content of the game history management results on the first to third notification display devices 69a to 69c. The main CPU 63 notifies the calculation results of the 61st to 68th parameters by controlling the display of the first to third notification display devices 69a to 69c. In this case, the first notification display device 69a displays information corresponding to the type of parameter to be notified. Further, of the value obtained by multiplying the parameter to be notified by 100, the number corresponding to the tens place is displayed on the second notification display device 69b, and the number corresponding to the one place is displayed on the third notification display. It is displayed on the device 69c. In the first to third notification display devices 69a to 69c, the displays corresponding to the calculation results of the 61st to 68th parameters are sequentially switched in accordance with a predetermined order, and the display target in the last order is After the calculation result of the 68th parameter is displayed, the calculation result of the 61st parameter, which is the first display target, is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 10 seconds.

The calculation period for the 61st to 68th parameters in the main CPU 63 is 60 minutes at the shortest. In contrast, the number of parameters 61st to 68th is eight, and the period during which the calculation result of one parameter is continuously displayed is 10 seconds. Therefore, the 61st to 68th parameters calculated by the main CPU 63 are displayed at least once on the first to third notification display devices 69a to 69c.

When the process of step S4301 is executed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether the value of the update timing counter after subtraction by 1 is "0". It is determined whether the timing has come to do so (step S4302). When an affirmative determination is made in step S4302, the value of the display target counter provided in the work area 223 for non-specific control is incremented by 1 (step S4303). If the value of the display target counter after adding 1 exceeds the maximum value "7" (step S4304: YES), the value of the display target counter is cleared to "0" (step S4305).

The display target counter is a counter used by the main CPU 63 to specify the type of parameter to be displayed on the first to third notification display devices 69a to 69c. There is a one-to-one correspondence between the 61st to 68th parameters and the possible values of the display target counter "0" to "7". For example, when the value of the display target counter is "0", the 61st parameter that is the first display target becomes the display target of the first to third notification display devices 69a to 69c, and the value of the display target counter is "7". In this case, the last display target, the 68th parameter, becomes the display target of the first to third notification display devices 69a to 69c.

If a negative judgment is made in step S4304, or if the processing of step S4305 is executed, the display of the first notification display device 69a is controlled so that information corresponding to the type of parameter corresponding to the value of the counter to be displayed is displayed (step S4306). In addition, the parameter corresponding to the value of the counter to be displayed is read from the calculation result storage area 234, and the read parameter is multiplied by 100 so that the number corresponding to the tens digit is displayed on the second notification display device 69b and the number corresponding to the ones digit is displayed on the third notification display device 69c (step S4307).

Here, a display IC is provided corresponding to each of the first to third notification display devices 69a to 69c. In step S4306, the main CPU 63 outputs display data to the display IC corresponding to the first notification display device 69a, and in step S4307, the main CPU 63 outputs display data to the display IC corresponding to the second notification display device 69b and the display IC corresponding to the third notification display device 69c. When operating power is supplied to these display ICs, they can store and hold display data, and the display contents corresponding to the stored display data are continuously displayed on the corresponding notification display devices 69a to 69c. Then, when the display data is changed by the main CPU 63, the display of the notification display devices 69a to 69c is changed to the display contents corresponding to the changed display data. As a result, even after the management execution process (FIG. 71), which is the process corresponding to non-specific control, is completed and the process corresponding to specific control is returned to, the display corresponding to the display data set in the execution status of the process corresponding to non-specific control is continued on the first to third notification display devices 69a to 69c.

Then, the update timing counter of the non-specific control work area 223 is set to a value corresponding to 10 seconds as the value corresponding to the next update timing (step S4308).

By executing the display process as described above, when the supply of operating power to the main CPU 63 has begun, the game history management results are displayed on the first to third notification display devices 69a to 69c. The game history management results are displayed regardless of whether or not play is continuing, and regardless of whether or not the gaming machine main body 12 has been opened relative to the outer frame 11 and the main control device 60 is visible from the front of the pachinko machine 10. By executing display control of the first to third notification display devices 69a to 69c in this way regardless of the game situation or the state of the pachinko machine 10, it is possible to simplify the processing configuration for display control of the first to third notification display devices 69a to 69c.

The present embodiment described above provides the following excellent advantages:

The main RAM 65 is provided with a work area 221 for specific control, a stack area 222 for specific control, a work area 223 for non-specific control, and a stack area 224 for non-specific control. A work area 221 for specific control and a stack area 222 for specific control are used when processing corresponding to specific control is executed by the main CPU 63 using a program for specific control and data for specific control. While it is possible to store and read information, the main CPU 63 executes processing corresponding to non-specific control using a program for non-specific control and data for non-specific control. In some cases, it is possible to read information, but it is not possible to store information. Further, the work area 223 for non-specific control and the stack area 224 for non-specific control are capable of storing and reading information when processing corresponding to non-specific control is executed by the main CPU 63. On the other hand, when the process corresponding to the specific control is executed by the main CPU 63, it is possible to read the information, but it is not possible to store the information. As a result, the work area 221 for specific control and the stack area 222 for specific control are treated as storage areas dedicated to processing corresponding to specific control, and the work area 223 for non-specific control and the stack area for non-specific control 224 can be treated as a dedicated storage area for processing corresponding to non-specific control. Therefore, it is possible to clearly differentiate the storage location of information in the main RAM 65 between processing corresponding to specific control and processing corresponding to non-specific control. Therefore, when executing one of the process corresponding to specific control and the process corresponding to non-specific control, it is possible to prevent information used in the other process from being deleted.

The processing corresponding to the specific control includes processing for controlling the progress of the game, and the processing corresponding to the non-specific control includes processing for managing the game history. As described above, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for the processing corresponding to the specific control, and the work area 223 for non-specific control and the stack area 224 for non-specific control are treated as dedicated storage areas for the processing corresponding to the non-specific control. This makes it possible to prevent information used in the processing for managing the game history, such as information stored in the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234, from being overwritten when the processing for controlling the progress of the game is executed.

A normal counter area 231, an open/close execution mode counter area 232, a high frequency support mode counter area 233, and a calculation result storage area 234 are provided in the main RAM 65, in which information for managing the game history is stored. This allows the main CPU 63 to complete the processing for managing the game history. It is also possible to prevent unauthorized access to or unauthorized modification of the game history information and the information of various parameters calculated using the game history information.

When the situation changes from one in which processing corresponding to specific control is being performed to one in which processing corresponding to non-specific control is being performed, or when the situation changes to one in which processing corresponding to non-specific control is being performed, the information in the various registers of the main CPU 63 is saved to the main RAM 65. This makes it possible to prevent information stored in the various registers of the main CPU 63 from being overwritten when processing corresponding to specific control is being performed when processing corresponding to non-specific control is being performed. In addition, when or after processing corresponding to non-specific control is terminated, the information saved in the main RAM 65 is restored to the various registers of the main CPU 63. This makes it possible to execute processing corresponding to specific control from the state of the various registers of the main CPU 63 before the processing corresponding to the non-specific control is executed when processing corresponding to non-specific control is terminated.

When the state where processing corresponding to specific control is being executed changes to a state where processing corresponding to non-specific control is being executed, or when the state where processing corresponding to non-specific control is being executed changes, information in some of the various registers in the main CPU 63 is saved to the main RAM 65. This makes it possible to reduce the storage capacity required in the main RAM 65 to save information in the registers of the main CPU 63.

When the situation changes from one in which processing corresponding to specific control is being performed to one in which processing corresponding to non-specific control is being performed, or when the situation changes to one in which processing corresponding to non-specific control is being performed, information in the various registers of the main CPU 63 that are the target of information storage in the processing corresponding to non-specific control is saved to the main RAM 65. This makes it possible to reduce the storage capacity required in the main RAM 65 to save the information in the registers of the main CPU 63, while making it possible to resume the processing corresponding to specific control from the state of the registers of the main CPU 63 before the processing corresponding to the non-specific control is completed.

When processing corresponding to non-specific control is started, the information in the flag register of the main CPU 63 is saved to the stack area 222 for specific control in the processing corresponding to specific control, and the information in the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 is saved to the work area 223 for non-specific control in the processing corresponding to non-specific control. This makes it possible to save the information at a timing that is favorable for each piece of information stored in the various registers of the main CPU 63, and also makes it possible to distribute the processing for saving information between the processing corresponding to specific control and the processing corresponding to non-specific control.

The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half-carry flag, and the like, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. In this case, the information in the flag register is saved in the stack area 222 for specific control in the process corresponding to specific control before the process corresponding to non-specific control is started. This makes it possible to save information in the flag register in the state before it changes after calling a subroutine corresponding to non-specific control or starting the subroutine in the stack area 222 for specific control.

By saving the information of the WA register, BC register, DE register, HL register, IX register, and IY register to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, the information of the WA register, BC register, DE register, HL register, IX register, and IY register is It is possible to keep the capacity of the stack area 224 for specific control small. In addition, when using the stack area 224 for non-specific control, the later information is read out first, so if the readout order of information is shifted due to some kind of noise, All subsequent readout order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. In contrast, by saving register information to the work area 223 for non-specific control, it is possible to prevent the above-mentioned phenomenon from occurring even when there is a large amount of information to be saved. .

When the state where processing corresponding to specific control is executed changes to a state where processing corresponding to non-specific control is executed or when the state where processing corresponding to non-specific control is executed is reached, the information of the stack pointer of the main CPU 63 becomes fixed information, and the stack pointer information is not saved to the main RAM 65 when processing corresponding to non-specific control is started. This eliminates the need to secure capacity in the main RAM 65 for saving the stack pointer information, making it possible to reduce the storage capacity of the main RAM 65 accordingly. Even in this configuration where the stack pointer information is not saved, when the state where processing corresponding to specific control is executed changes to a state where processing corresponding to non-specific control is executed or when the state where processing corresponding to non-specific control is executed is reached, the stack pointer information of the main CPU 63 becomes fixed information, so that even if the stack pointer information is not saved as described above, when processing corresponding to non-specific control is completed, it is possible to restore the stack pointer information before the processing corresponding to the non-specific control was started.

Although the configuration has been described in which the information in the flag register of the main CPU 63 is saved to the main RAM 65 in the process corresponding to the specific control when the process corresponding to the non-specific control is executed, the present invention is not limited to this. Instead, the information in the flag register may be saved in the main RAM 65 in a process corresponding to non-specific control. Furthermore, although the configuration has been described in which the information is returned to the flag register of the main CPU 63 in the process corresponding to specific control after the process corresponding to non-specific control is completed, the present invention is not limited to this. A configuration may be adopted in which information is returned to the flag register in a process corresponding to non-specific control.

In addition, after the information in the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 is started, the main CPU 63 is used in the process corresponding to the non-specific control. Although the configuration is such that the information is saved in the side RAM 65, the configuration is not limited to this, and the information in these registers may be saved in the main side RAM 65 in a process corresponding to specific control. In addition, when the process corresponding to non-specific control ends, information is returned to each of the above registers in the process corresponding to non-specific control. However, this is not limited to this, and each of the above The information may be returned to the register in a process corresponding to specific control after the process corresponding to non-specific control is completed.

<Sixteenth embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration of management processing. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 77 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S4401 to step S4405 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S4401). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and started in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Then, the load command "LD (_PSWBUF), PSW" is used to save the flag register information of the main CPU 63 to the PSW buffer set in the work area 221 for specific control (step S4402). The flag register includes a carry flag, zero flag, P/V flag, sign flag, and half carry flag, and the flag register information changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the program of the subroutine corresponding to the management execution process is started, it is possible to save the flag register information in the state before it changes after the subroutine is called or started in the work area 221 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the non-specific control program, the management execution process is started (step S4403). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management process indicated by the return address.

When returning to the management processing program after executing the management execution processing, the program is saved as "LD PSW, (_PSWBUF)" to the PSW buffer in the specific control work area 221 in step S4402 by a load command. The information in the flag register is returned to the flag register of the main CPU 63 (step S4404). As a result, the information in the flag register of the main CPU 63 returns to the information at the time when step S4402 was executed last time. In other words, the information in the flag register of the main CPU 63 returns to information for executing specific control.

Then, the interrupt permission is set to switch from a state in which the occurrence of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S4405). This allows a new execution of the timer interrupt processing.

According to the above configuration, the information in the flag register of the main CPU 63 immediately before switching from specific control to non-specific control is saved to the work area 221 for specific control instead of the stack area 222 for specific control. This makes it possible to save the information in the flag register while suppressing the capacity of the stack area 222 for specific control.

The PSW buffer in the work area 221 for specific control is secured as a dedicated area, but is not limited to this, and may be configured as a shared area in which other information can also be written. In other words, since there is no need to save the information in the flag register of the main CPU 63 corresponding to the specific control when the management process is not being executed, a shared area that is also used as a PSW buffer when performing a predetermined arithmetic process in the process corresponding to the specific control when the management process is not being executed may be configured to be used. In this case, since the shared area will be used reliably to save the information in the flag register when the management process is executed, it is necessary to configure the shared area so that information other than the information in the flag register, that is no longer necessary before the management process is executed, is written to the shared area.

<Seventeenth embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration of management execution processing. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 78 is a flowchart showing management execution processing in this embodiment executed by the main CPU 63. Note that the processes from step S4501 to step S4515 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (u+2)" at the start of non-specific control. Y(u+2) is set as a fixed address at (step S4501).

After that, the information in the WA register of the master CPU 63 is saved to a memory area in the non-specific control stack area 224 corresponding to the information of the current stack pointer of the master CPU 63 by a push command "PUSH WA" (step S4502). In this case, the information in the WA register is saved to a memory area corresponding to the fixed address set in the stack pointer of the master CPU 63 in step S4501. In addition, the information in the stack pointer of the master CPU 63 is updated to the information of the address of the memory area to be written to next.

Thereafter, the information in the BC register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by a push command as "PUSH BC" (step S4503). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, the information in the DE register of the main CPU 63 is saved to a memory area in the non-specific control stack area 224 corresponding to the current stack pointer information of the main CPU 63 by a push command "PUSH DE" (step S4504). In addition, the stack pointer information of the main CPU 63 is updated to the address information of the memory area to be written to next.

Thereafter, the information in the HL register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control using a push command as "PUSH HL" (step S4505). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

Thereafter, the information in the IX register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control using a push command as "PUSH IX" (step S4506). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

Then, the information in the IY register of the main CPU 63 is saved to a memory area in the non-specific control stack area 224 corresponding to the current stack pointer information of the main CPU 63 by a push command "PUSH IY" (step S4507). In addition, the stack pointer information of the main CPU 63 is updated to the address information of the memory area to be written to next.

After steps S4502 to S4507 are executed, a check process is executed (step S4508). When the check process is executed, a subroutine program corresponding to the check process set in the program for non-specific control is executed. When the program for the subroutine is executed, information for identifying the return address of the management execution process after the check process is executed is written by a push command to a memory area in the stack area 224 for non-specific control corresponding to the information of the current stack pointer of the main CPU 63. Then, when the check process is completed, information for identifying the return address is read by a pop command, and the program for the management execution process indicated by the return address is returned to. The contents of the check process are the same as those of the fifteenth embodiment.

Thereafter, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (r+α)" when returning to the specific control. Y(r+α) is set as a fixed address at (step S4509). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

Thereafter, as "POP IY", the information saved in the storage area corresponding to the previous order information is transferred to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control by a pop instruction. The IY register of the main CPU 63 is overwritten (step S4510). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP IX", the information saved in the storage area corresponding to the previous order information is transferred to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control by the pop instruction. The IX register of the main CPU 63 is overwritten (step S4511). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP HL", the information saved in the storage area corresponding to the previous order information is sent to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control by the pop instruction. The HL register of the main CPU 63 is overwritten (step S4512). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP DE", the information saved in the storage area corresponding to the previous order information is sent to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control by the pop instruction. The DE register of the main CPU 63 is overwritten (step S4513). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP BC", the information saved in the storage area corresponding to the information in the previous order is transferred to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by the pop instruction. The BC register of the main CPU 63 is overwritten (step S4514). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, the WA register of the main CPU 63 is overwritten with the information saved in the memory area corresponding to the previous order information for the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by a pop command as "POP WA" (step S4515). In addition, the stack pointer information of the main CPU 63 is updated to the address information of the memory area to be written in the previous order.

By executing the processing of steps S4510 to S4515, it is possible to restore the information in the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 to the information corresponding to specific control immediately before the processing corresponding to non-specific control is started.

In addition to the flag register, the main CPU 63 also has various general-purpose registers, auxiliary registers, and index registers. In this case, in steps S4502 to S4507, the information of some of these general-purpose registers, auxiliary registers, and index registers, namely, the WA register, BC register, DE register, HL register, IX register, and IY register, is saved to the stack area 224 for non-specific control. These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in the check process (step S4508), which is a process corresponding to non-specific control. By saving the information set in such registers to the stack area 224 for non-specific control prior to the execution of the check process (step S4508), it is possible to save the information of these registers used during specific control before the non-specific control is started. Therefore, even if these registers are overwritten during non-specific control, when the non-specific control is terminated, the information saved in the stack area 224 for non-specific control is restored to these registers, making it possible to restore the state of these registers to the state corresponding to the specific control before the non-specific control was executed.

In addition, instead of saving all the information of the various general-purpose registers, auxiliary registers, and index registers to the stack area 224 for non-specific control, the information of the WA register, BC register, DE register, HL register, IX register, and IY register to be used in the check process, which is a process corresponding to the non-specific control, is selectively saved to the stack area 224 for non-specific control, thereby making it possible to reduce the capacity reserved for saving the register information in the stack area 224 for non-specific control. Therefore, it is possible to save the above-mentioned register information while securing a large capacity for the stack area 224 for non-specific control that is available during the check process.

<Eighteenth embodiment>
In this embodiment, the processing configuration of the management execution process is different from that of the fifteenth embodiment. The configuration that differs from the fifteenth embodiment will be described below. Note that the description of the same configuration as the fifteenth embodiment will basically be omitted.

FIG. 79 is a flowchart showing the management execution process in this embodiment executed by the main CPU 63. Note that the processes from step S4601 to step S4605 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as in step S3901 of the management execution process (FIG. 71) in the 15th embodiment, a load command is used to set "LD SP, Y(u+2)" to Y(u+2) as a fixed address at the start of non-specific control in the stack pointer of the main CPU 63 (step S4601).

After that, the load command "LD (_ALLBUF), ALL" is used to save the information of all registers of the main CPU 63 to the ALL buffer set in the work area 223 for non-specific control (step S4602). As a result, not only the WA register, BC register, DE register, HL register, IX register, and IY register used in the check process, which is a process corresponding to non-specific control, but also the information of all registers including other registers are saved together in the ALL buffer of the work area 223 for non-specific control. By saving all registers of the main CPU 63 to the work area 223 for non-specific control in this way, there is no need to selectively save the information of the registers of the main CPU 63.

Here, the registers to be saved include flag registers. The information in the flag register is saved in the stack area 222 for specific control in step S3802 of the management process (FIG. 70), but the information in the flag register is saved in the work area 223 for non-specific control in step S4602. be done. This eliminates the need to selectively save the information in the registers of the main CPU 63, including the information in the flag registers. Furthermore, even if the information in the flag registers is saved in duplicate in this way, after the management execution process ends, in step S3804 of the management process (FIG. 70), the information is transferred from the special control stack area 222 to the main CPU 63. Since the information is restored to the flag register of the main CPU 63, when returning to the process corresponding to the specific control, it is possible to restore the information of the flag register of the main CPU 63 to the state immediately before the management execution process was executed. becomes.

After that, a check process is executed (step S4603). When executing the check process, a subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, information for specifying the return address of the management execution process after execution of the check process is transferred to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control using a push command. Write to the storage area corresponding to the information. When the check process is completed, information for specifying the return address is read out using a pop instruction, and the program returns to the management execution process indicated by the return address. The contents of the check process are the same as in the fifteenth embodiment.

After that, as in step S3909 of the management execution process (FIG. 71) in the above fifteenth embodiment, a load command is used to set "LD SP, Y(r+α)" to Y(r+α) as a fixed address at the time of return to specific control in the stack pointer of the main CPU 63 (step S4604). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

Thereafter, as "LD ALL, (_ALLBUF)", the information saved in the ALL buffer of the non-specific control work area 223 is overwritten in the registers corresponding to each of the main CPUs 63 by a load instruction (step S4605). This makes it possible to restore each information in all the registers of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

According to the above configuration, by saving the register information of the main CPU 63 to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, it is possible to reduce the capacity of the stack area 224 for non-specific control. In addition, when using the stack area 224 for non-specific control, the writing order of information is such that later information is read first. Therefore, if the reading order of information is shifted due to some kind of noise or the like, all information in the subsequent read order will be restored to different registers. The probability of such an event occurring increases as the amount of information saved to the stack area 224 for non-specific control increases. In contrast, by saving the register information to the work area 223 for non-specific control, it is possible to prevent such an event from occurring even when there is a lot of information to be saved.

In addition, when saving the information of the registers of the main CPU 63 to the work area 223 for non-specific control, the WA register, BC register, DE register, and HL register used in the check process, which is the process corresponding to the non-specific control. , IX register, and IY register, as well as other registers, the information of all registers is collectively saved in the ALL buffer of the work area 223 for non-specific control. By saving all the registers of the main CPU 63 to the work area 223 for non-specific control in this way, there is no need to selectively save information in the registers of the main CPU 63.

In addition, the information in all registers of the main CPU 63 is saved to the main RAM 65 in the process corresponding to the non-specific control after the process corresponding to the non-specific control is started, but this is not limited to this, and the information in all registers may be saved to the main RAM 65 in the process corresponding to the specific control. Also, when the process corresponding to the non-specific control is terminated, the information is restored to all registers in the process corresponding to the non-specific control, but this is not limited to this, and the information is restored to all registers in the process corresponding to the specific control after the process corresponding to the non-specific control is terminated.

Nineteenth embodiment
In this embodiment, the processing configuration of the management execution process is different from that of the fifteenth embodiment. The following describes the configuration that is different from the fifteenth embodiment. Note that the description of the same configuration as the fifteenth embodiment will basically be omitted.

Figure 80 is a flowchart showing the management execution process in this embodiment, which is executed by the main CPU 63. Note that the processes in steps S4701 to S4706 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, the stack pointer information of the main CPU 63 is saved to the SP buffer set in the work area 223 for non-specific control by a load command "LD (_SPBUF), SP" (step S4701). As a result, the stack pointer information corresponding to the specific control immediately before the processing corresponding to the non-specific control is started is saved to the work area 223 for non-specific control.

Thereafter, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (u+2)" at the start of non-specific control. Y(u+2) is set as a fixed address at (step S4702).

After that, the information of all the registers of the main CPU 63 is evacuated by a push command as "PUSH ALL" to a memory area in the stack area 224 for non-specific control corresponding to the information of the current stack pointer of the main CPU 63 and a memory area continuous from that memory area (step S4703). In this case, since it is not possible to store the information of all the registers of the main CPU 63 in one memory area in the stack area 224 for non-specific control, the memory area in the stack area 224 for non-specific control corresponding to the information of the current stack pointer of the main CPU 63 and a memory area continuous from that memory area are set as the destination for evacuating the register information as described above. In addition, the stack pointer information of the main CPU 63 is updated to the address information of the memory area to be written next in the order in which the last information was stored when evacuating the information of all the registers.

After that, a check process is executed (step S4704). When executing the check process, a subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, information for specifying the return address of the management execution process after execution of the check process is transferred to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control using a push command. Write to the storage area corresponding to the information. When the check process is completed, information for specifying the return address is read out using a pop instruction, and the program returns to the management execution process indicated by the return address. The contents of the check process are the same as in the fifteenth embodiment.

Thereafter, as "POP ALL", information saved to a storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control and a storage area continuous from the storage area by the pop instruction is sent as "POP ALL". are overwritten in the registers corresponding to each of the main CPUs 63 (step S4705). This makes it possible to restore the information in all registers of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

Thereafter, the stack pointer of the main CPU 63 is overwritten with the information saved in the SP buffer of the work area 223 for non-specific control by a load instruction as "LD SP, (_SPBUF)" (step S4706). As a result, the information on the stack pointer of the main CPU 63 returns to the information corresponding to the specific control immediately before the process corresponding to the non-specific control was started.

According to the above configuration, when the register information of the main CPU 63 is saved to the stack area 224 for non-specific control, not only the WA register, BC register, DE register, HL register, IX register, and IY register used in the check process, which is a process corresponding to non-specific control, but also the information of all registers, including other registers, is saved together in the stack area 224 for non-specific control. By saving all registers of the main CPU 63 to the stack area 224 for non-specific control in this way, there is no need to selectively save the register information of the main CPU 63.

Information on the stack pointer corresponding to the specific control immediately before the process corresponding to the non-specific control is started is saved in the work area 223 for non-specific control. As a result, even if the stack pointer information corresponding to the specific control immediately before the process corresponding to the non-specific control is started may change, the process corresponding to the non-specific control ends and the specific control returns. When returning to the corresponding process, it is possible to return the information of the stack pointer of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control was started.

Although the configuration is such that the information in all registers of the main CPU 63 is saved to the main RAM 65 in the process corresponding to the non-specific control after the process corresponding to the non-specific control is started, the present invention is not limited to this. Instead, the information in all the registers may be saved in the main RAM 65 in the process corresponding to the specific control. In addition, when the process corresponding to non-specific control ends, information is returned to all registers in the process corresponding to non-specific control. The information may be returned in a process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<Twentieth embodiment>
In this embodiment, the processing configurations of the management process and the management execution process are different from those of the fifteenth embodiment. The configurations that are different from the fifteenth embodiment will be described below. Note that the description of the same configurations as the fifteenth embodiment will basically be omitted.

FIG. 81 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S4801 to step S4811 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S4801). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and activated in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

After that, the information in the flag register of the main CPU 63 is saved to the stack area 222 for specific control by a push command as "PUSH PSW" (step S4802). The flag register includes a carry flag, zero flag, P/V flag, sign flag, and half carry flag, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the program of the subroutine corresponding to the management execution process is started, it becomes possible to save the information in the flag register in the state before it changes after the subroutine is called or started in the stack area 222 for specific control.

Thereafter, the WA register of the main CPU 63 is cleared to "0" by a load instruction as "LD WA, 0" (step S4803). Further, as "LD BC, 0", the BC register of the main CPU 63 is cleared to "0" by a load instruction (step S4804). Further, as "LD DE, 0", the DE register of the main CPU 63 is cleared to "0" by a load instruction (step S4805). Furthermore, the HL register of the main CPU 63 is cleared to "0" by a load instruction as "LD HL,0" (step S4806). Further, as "LD IX,0", the IX register of the main CPU 63 is cleared to "0" by a load instruction (step S4807). Further, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by a load instruction (step S4808).

In addition to the flag register, the registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers. In this case, in steps S4803 to S4808, the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, are Clear “0”. These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in check processing (step S4902), which is processing corresponding to non-specific control. By clearing such registers to "0" prior to execution of the management execution process (step S4809), which is the process corresponding to non-specific control, the state of these registers can be changed before the process corresponding to non-specific control is started. In addition, it is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

In addition, each information of the WA register, BC register, DE register, HL register, IX register, and IY register before the process corresponding to non-specific control is started is changed after the process corresponding to the non-specific control is finished. This information is unnecessary in the process corresponding to specific control. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem will occur in the process corresponding to the specific control that is returned after the process corresponding to the non-specific control is completed.

After steps S4803 to S4808 have been executed, the subroutine program corresponding to the management execution process set in the program for non-specific control is read out, thereby starting the management execution process (step S4809). In this case, information for specifying the return address of the management process after the management execution process is executed is written into the stack area 222 for specific control by a push command. Then, when the management execution process ends, information for specifying the return address is read out by a pop command, and the program for the management process indicated by the return address is returned to.

When returning to the management processing program after the management execution processing is executed, the flag register information saved in the stack area 222 for specific control in step S4802 is restored to the flag register of the main CPU 63 by a pop command as "POP PSW" (step S4810). This causes the flag register information of the main CPU 63 to return to the information at the time step S4802 was last executed. In other words, the flag register information of the main CPU 63 returns to the information for executing specific control.

Then, the interrupt permission is set to switch from a state in which the occurrence of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S4811). This allows a new execution of the timer interrupt processing.

Figure 82 is a flowchart showing the management execution process in this embodiment, which is executed by the main CPU 63. Note that the processes in steps S4901 to S4909 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (u+2)" at the start of non-specific control. Y(u+2) is set as a fixed address (step S4901).

After that, a check process is executed (step S4902). When executing a check process, a subroutine program corresponding to the check process set in the non-specific control program will be executed, but when executing the subroutine program, management after execution of the check process will be executed. Information for specifying the return address of the execution process is written to the stack area 224 for non-specific control by a push instruction. When the check process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management execution process indicated by the return address. The contents of the check process are the same as in the fifteenth embodiment.

After that, the WA register of the master CPU 63 is cleared to "0" by a load command as "LD WA, 0" (step S4903). The BC register of the master CPU 63 is cleared to "0" by a load command as "LD BC, 0" (step S4904). The DE register of the master CPU 63 is cleared to "0" by a load command as "LD DE, 0" (step S4905). The HL register of the master CPU 63 is cleared to "0" by a load command as "LD HL, 0" (step S4906). The IX register of the master CPU 63 is cleared to "0" by a load command as "LD IX, 0" (step S4907). The IY register of the master CPU 63 is cleared to "0" by a load command as "LD IY, 0" (step S4908).

These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in the check process (step S4902), which is a process corresponding to non-specific control, as described above. By clearing such registers to 0 before returning from processing corresponding to non-specific control to processing corresponding to specific control, the state of these registers can be changed to the main state before returning to processing corresponding to specific control. It is possible to create a state immediately after the supply of operating power to the side CPU 63 is started.

In addition, the information in the WA register, BC register, DE register, HL register, IX register, and IY register before the processing corresponding to the specific control is started is unnecessary for the processing corresponding to the non-specific control after the processing corresponding to the specific control is completed. Therefore, even if the information in these registers is cleared to "0" without being saved, no problems will occur in the processing corresponding to the non-specific control that is restored after the processing corresponding to the specific control is completed.

After that, as in step S3909 of the management execution process (FIG. 71) in the above fifteenth embodiment, a load command is used to set "LD SP, Y(r+α)" to Y(r+α) as a fixed address at the time of return to specific control in the stack pointer of the main CPU 63 (step S4909). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

According to the above configuration, when processing corresponding to non-specific control is started after processing corresponding to specific control is being executed, the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are cleared to "0". This eliminates the need to save the information in each of these registers to the main RAM 65. Therefore, there is no need to secure capacity for saving each of these pieces of information.

Also, when returning to processing corresponding to specific control from a situation where processing corresponding to non-specific control is being executed, the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are The configuration is to clear "0". Thereby, when returning to processing corresponding to specific control, it is possible to return the states of these registers to the states immediately before the processing corresponding to non-specific control was started.

The state where each of the above registers is cleared to "0" is the state when the supply of operating power to the main CPU 63 is started. This makes it possible to simplify the processing configuration for setting each of the above registers to a predetermined state when starting processing corresponding to non-specific control and when returning to processing corresponding to specific control.

When starting processing corresponding to non-specific control and when returning to processing corresponding to specific control, the registers that are to be cleared to "0" are some of the various registers in the main CPU 63. This makes it possible to reduce the processing load for setting each of the above registers to a predetermined state when starting processing corresponding to non-specific control and when returning to processing corresponding to specific control.

In a configuration where the WA register, BC register, DE register, HL register, IX register, and IY register are cleared to "0" when starting the process corresponding to non-specific control and when returning to the process corresponding to specific control, Other registers are not cleared to 0. This makes it possible to prevent information necessary for processing corresponding to specific control from being deleted when starting processing corresponding to non-specific control.

In addition, information in registers other than the WA register, BC register, DE register, HL register, IX register, and IY register is not saved to the main RAM 65 when processing corresponding to non-specific control begins. This eliminates the need to reserve an area in the main RAM 65 for saving this information.

The information in the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 before processing corresponding to non-specific control is started is information that is not used in processing corresponding to specific control after processing corresponding to non-specific control is completed. This makes it possible to prevent the processing corresponding to specific control after processing corresponding to non-specific control is completed from being affected, even if the above registers are configured to be cleared to "0" when processing corresponding to non-specific control is started.

In addition, instead of clearing the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 to "0" in steps S4803 to S4808 in the management process (FIG. 81), these registers may be initialized. In other words, when the supply of operating power to the main CPU 63 is started, each of these registers of the main CPU 63 is once cleared to "0" and then information is set in each register to be in the initial state, but in steps S4803 to S4808, each register may be set to this initial state. In this case, by configuring each register to be set to the above-mentioned initial state in steps S4903 to S4908 as well, when returning to the process corresponding to the specific control, it is possible to return the state of each of these registers to the state immediately before the process corresponding to the non-specific control was started.

Also, instead of the configuration in which the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are cleared to "0" in steps S4803 to S4808 in the management process (FIG. 81), A configuration may be adopted in which all registers are set to "1". In this case, by setting all of the above registers to "1" in steps S4903 to S4908, when returning to the process corresponding to specific control, the state of each of these registers is changed to the process corresponding to non-specific control. It becomes possible to return to the state immediately before the start of the process.

Furthermore, the information in the flag register of the main CPU 63 is saved to the main RAM 65 in the process corresponding to the specific control when the process corresponding to the non-specific control is executed, but this is not limited to this. Instead, the information in the flag register may be saved in the main RAM 65 in a process corresponding to non-specific control. Furthermore, although the configuration is such that information is returned to the flag register of the main CPU 63 in the process corresponding to the specific control after the process corresponding to the non-specific control is completed, the present invention is not limited to this. A configuration may be adopted in which information is returned to the flag register in a process corresponding to non-specific control.

Additionally, the process of clearing the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 to "0" is performed before the process corresponding to the non-specific control starts. However, the present invention is not limited to this, and the process of clearing these registers to "0" may be executed as a process corresponding to non-specific control. In addition, although the configuration is such that when the process corresponding to non-specific control ends, the process of clearing each of the registers to "0" is performed in the process corresponding to non-specific control, the invention is not limited to this. The configuration may be such that the process of clearing each register to "0" is performed in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

In addition, in the management process (FIG. 81), the "PUSH PSW" process in step S4802 is executed before each register is set to "0" in steps S4803 to S4808. Alternatively, the "PUSH PSW" process in step S4802 may be executed after each register is set to "0" in steps S4803 to S4808 and before the subroutine program corresponding to the management execution process is read in step S4809. This makes it possible to save the information in the flag register after it has been changed by the load command in steps S4803 to S4808 to the specific control stack area 222.

<21st embodiment>
The present embodiment differs from the fifteenth embodiment in the configuration for collecting game history information. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 83 is an explanatory diagram for explaining the electrical configuration in this embodiment.

The MPU 62 is provided with a main CPU 63, a main ROM 64, and a main RAM 65, similar to the fifteenth embodiment. Also, unlike the fifteenth embodiment, a management RAM 241 is electrically connected to the MPU 62. In other words, a management RAM 241 is provided in addition to the main RAM 65 built into the MPU 62, and the management RAM 241 is externally attached to the MPU 62.

As in the fifteenth embodiment, the main RAM 65 is provided with a work area 221 for specific control, a stack area 222 for specific control, a work area 223 for non-specific control, and a stack area 224 for non-specific control. Therefore, when the main CPU 63 executes processing corresponding to specific control using the program for specific control and data for specific control in the main ROM 64, the work area 221 for specific control and the stack area 222 for specific control in the main RAM 65 are used, and when the main CPU 63 executes processing corresponding to non-specific control using the program for non-specific control and data for non-specific control in the main ROM 64, the work area 223 for non-specific control and the stack area 224 for non-specific control in the main RAM 65 are used.

The management RAM 241 is provided with a normal counter area 231, an open/close execution mode counter area 232, a high-frequency support mode counter area 233, and a calculation result storage area 234. The contents of each of these areas 231 to 234 are the same as those in the fifteenth embodiment. In this embodiment, management execution processing including a check process is executed as processing corresponding to non-specific control in the main CPU 63. In the check process, the game history is collected through updating the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233, as in the fifteenth embodiment, and the 61st to 68th parameters calculated using the collected game history are written to the calculation result storage area 234. In other words, the management RAM 241 is used when the main CPU 63 executes processing corresponding to non-specific control, and therefore the management RAM 241 is used as a work area for non-specific control.

In addition, when collecting game history and calculating parameters 61 to 68 using the collected history information, the work area 223 for non-specific control and the stack area 224 for non-specific control in the main RAM 65 are used as appropriate.

According to the above configuration, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are provided in the management RAM 241 externally attached to the MPU 62. This makes it possible to store collected game history information while avoiding an increase in the required storage capacity in the non-specific control work area 223 in the main RAM 65, and to store the 61st to 68th parameters calculated using the game history. It is also possible to increase the storage capacity for storing game history information while using a general-purpose MPU 62.

When collecting game history and using the collected history information to calculate parameters 61 to 68, the work area 223 for non-specific control and the stack area 224 for non-specific control in the main RAM 65 are used as appropriate. This makes it possible to prevent an extreme drop in processing speed when processing history information.

In addition to or instead of the configuration in which the management RAM 241 is provided with the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234, a storage area corresponding to the history memory 117 in the first embodiment may be set. In this case, it is necessary to increase the storage capacity required to store the history information, but since the management RAM 241 external to the MPU 62 is used as a storage means for storing the history information, it is possible to flexibly respond to an increase in storage capacity.

<Twenty-second embodiment>
In this embodiment, the processing configuration executed by the main CPU 63 is different from that of the fifteenth embodiment. The configuration that differs from the fifteenth embodiment will be described below. Note that the description of the same configuration as the fifteenth embodiment will basically be omitted.

Figure 84 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing of steps S5001 to S5019 in the main processing is executed by the main CPU 63 using a program for specific control and data for specific control.

First, power-on wait processing is executed (step S5001). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process is started. The operation start and initial setting of the symbol display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S5002).

Thereafter, it is determined whether the reset button 68c is pressed (step S5003), the setting key insertion part 68a is determined to be turned on using the setting key (step S5004), and the inner frame It is determined whether the front door frame 14 is in an open state with respect to 13 (step S5005), and it is determined whether the gaming machine main body 12 is in an open state with respect to the outer frame 11 (step S5006).

In this embodiment, a front door open sensor 95 for detecting whether or not the front door frame 14 is in an open state with respect to the inner frame 13 is electrically connected to the main CPU 63. The detection result of 95 is input to the main CPU 63. In this case, when the front door frame 14 is in the closed state with respect to the inner frame 13, the front door open sensor 95 transmits a closure detection signal to the main CPU 63, and the front door frame 14 is in the open state with respect to the inner frame 13. In this case, the front door open sensor 95 transmits an open detection signal to the main CPU 63. The main side CPU 63 identifies that the front door frame 14 is in the closed state when receiving a closing detection signal from the front door opening sensor 95, and when receiving an opening detection signal from the front door opening sensor 95. It is specified that the front door frame 14 is in an open state.

Further, in this embodiment, a main body open sensor 96 for detecting whether or not the gaming machine main body 12 is in an open state with respect to the outer frame 11 is electrically connected to the main side CPU 63. The detection result of 96 is input to the main CPU 63. In this case, when the gaming machine main body 12 is in the closed state with respect to the outer frame 11, the main body open sensor 96 transmits a closure detection signal to the main side CPU 63, and when the gaming machine main body 12 is in the open state with respect to the outer frame 11. In some cases, the main body open sensor 96 transmits an open detection signal to the main CPU 63. The main CPU 63 specifies that the gaming machine main body 12 is in a closed state when it receives a closing detection signal from the main body opening sensor 96, and specifies that the gaming machine main body 12 is in a closed state when it receives an opening detection signal from the main body opening sensor 96. It is determined that the main body 12 is in an open state.

If the reset button 68c is pressed (step S5003: YES) and a negative judgment is made in any of steps S5004 to S5006, a clear process for non-setting update is executed (step S5007). In the clear process for non-setting update, the specific control work area 221 is cleared to "0" except for the area (specifically, the setting value counter) in which the setting value information indicating the setting state of the pachinko machine 10 is set in the specific control work area 221, and the initial setting is performed for the area cleared to "0". As a result, the area indicating whether the winning/losing lottery mode is the high probability mode or not is cleared to "0", so that the winning/losing lottery mode becomes the low probability mode regardless of the winning/losing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. In addition, the game round is not being executed, and the open/close execution mode is not being executed, and further, the normal map display unit 38a is not displayed in a variable manner and the normal power role 34a is in a closed state. In addition, the reserved storage area 65a and the regular power reserved area 65c provided in the work area 221 for specific control are also cleared to "0", so that the reserved information for the special map display section 37a is erased and the reserved information for the regular map display section 38a is erased. In addition, in the clearing process for non-setting updates, the stack area 222 for specific control is cleared to "0". In addition, in the clearing process for non-setting updates, various registers of the main CPU 63 are also cleared to "0" before being initialized.

In the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if the supply of operating power to the pachinko machine 10 is started while the reset button 68c is pressed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

If the reset button 68c is not pressed (step S5003: NO), it is determined whether the power failure flag is set to "1" (step S5008). The power failure flag is provided in the work area 221 for specific control, and if the supply of operating power to the main CPU 63 is stopped and the predetermined power failure processing is executed normally, the power failure flag is set to "1". If the power failure flag is set to "1", it is determined whether the checksum calculation result matches the checksum saved at the time of power interruption, that is, the validity of the stored data (step S5009). If the clear processing at the time of non-setting update is executed in step S5007, or if the judgment is affirmative in step S5009, it is determined whether the setting value of the pachinko machine 10 is normal by checking the value of the setting value counter in the work area 221 for specific control (step S5010). Specifically, if the setting value set in the setting value counter is any of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal.

If a negative determination is made in any of steps S5008 to S5010, operation prohibition processing is executed. In the operation prohibition process, after executing an error notification process to notify the hall manager and the like of the occurrence of an error (step S5011), an infinite loop occurs. The operation prohibition process is canceled by executing a clear process (step S5018) when updating settings, which will be described later.

If the determination is affirmative in all of steps S5008 to S5010, a power-on setting process is executed (step S5012). In the power-on setting process, a predetermined area of the work area 221 for specific control, such as the initialization of the power outage flag, is set to an initial value, and a command corresponding to the current game state is sent to the sound and light emission control device 81.

The main CPU 63 is configured to periodically execute timer interrupt processing, but timer interrupt processing is prohibited from occurring when main processing is started. This state in which timer interrupt processing is prohibited is released when step S5012 is completed and before step S5013 is executed, and timer interrupt processing is permitted to be executed. As a result, when the supply of operating power to the main CPU 63 is started, the power-on setting process of step S5012 is completed, and timer interrupt processing is not executed until the stage before step S5013 is started. Therefore, processing to progress the game in the main CPU 63 is not started until this situation is reached.

Thereafter, the process proceeds to the remaining processing of steps S5013 to S5016. In other words, although the main CPU 63 is configured to periodically execute timer interrupt processing, there is a remaining time between one timer interrupt processing and the next timer interrupt processing. Although this remaining time will vary depending on the processing completion time of each timer interrupt process, the remaining process from step S5013 to step S5016 is repeatedly executed using such irregular time. In this respect, it can be said that the remaining processing of steps S5013 to S5016 is non-regular processing that is executed non-regularly. In steps S5013 to S5016, the same processes as steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

On the other hand, if the reset button 68c is pressed (step S5003: YES) and all of steps S5004 to S5006 are answered in the affirmative, processing for updating the set value is executed. Specifically, first, a setting value copying process is executed (step S5017). In the copy process, information of a setting value counter used to specify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the setting value counter information is cleared to "0" in the setting value update clearing process (step S5018) to be executed subsequently, the information in the setting value counter before the setting value updating clearing process is executed. It becomes possible to grasp the set value of the pachinko machine 10 (that is, the set value of the pachinko machine 10 before the supply of operating power to the pachinko machine 10 is stopped).

Thereafter, a clearing process when updating settings is executed (step S5018). In the clearing process when updating the settings, the work area 221 for specific control is set to "0", except for the area indicating whether the win/fail lottery mode in the work area 221 for specific control is the high probability mode and the above-mentioned copy area. ” is cleared and initial settings are made for the area cleared to “0”. As a result, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in the closed state. A certain situation arises. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted. Furthermore, in the clearing process when updating the settings, the stack area 222 for specific control is cleared to "0" and initial settings are performed for the area cleared to "0". Furthermore, in the clearing process when updating the settings, a setting value counter used to specify the setting value of the pachinko machine 10 is cleared to "0". Further, in the clearing process when updating settings, initial settings are performed after various registers of the main CPU 63 are also cleared to "0".

On the other hand, in the clearing process when updating the settings, the area indicating whether the winning lottery mode is the high probability mode is not cleared to "0", so even if the setting value updating process (step S5019) is executed, the winning lottery mode will not be cleared. It becomes possible to maintain the pachinko machine 10 in the mode it was in before the supply of operating power to the pachinko machine 10 was stopped. Furthermore, since the copy area is not cleared to "0" in the clearing process when updating the settings, it becomes possible to specify the setting value that was set before the clearing process when updating the settings.

In the clearing process when updating settings, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if a setting value update process that can change the setting values of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

Thereafter, after executing setting value update processing in step S5019, the process moves to step S5012. The setting value update process will be explained below. FIG. 85 is a flowchart showing the setting value update process. Note that the processes from step S5101 to step S5114 in the setting value update process are executed by the main CPU 63 using a specific control program and specific control data.

First, the setting value counter provided in the work area 221 for specific control is set to "1" (step S5101). The setting value counter is a counter that allows the main CPU 63 to identify which setting value the setting state of the pachinko machine 10 is. By setting the setting value counter to "1", when the setting value update process is executed, the setting value becomes "Setting 1" regardless of the previous setting value.

Thereafter, a setting value display start process is executed (step S5102). In the setting value display start process, the display of the third notification display device 69c is controlled so that the number "1" corresponding to "setting 1" is displayed. When changing the setting value, the game hall manager can grasp the current setting state of the pachinko machine 10 by checking the third notification display device 69c.

After that, it is determined whether one game ball is detected by the exit detection sensor 48a (step S5103). Specifically, it is determined whether the signal received from the outlet detection sensor 48a has switched from a LOW level to a HI level. If a negative determination is made in step S5103, it is determined whether the update button 68b has been pressed once (step S5104). Specifically, it is determined whether the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S5104, the process returns to step S5103, and it is determined whether one game ball has been detected by the exit detection sensor 48a.

If the update button 68b has been pressed once (step S5104: YES), the value of the set value counter in the specific control work area 221 is incremented by 1 (step S5105). Further, if the value of the set value counter after adding 1 exceeds "6" (step S5106: YES), the set value counter is set to "1" (step S5107). As a result, each time the update button 68b is pressed once, the set value is updated to one step higher, and if the update button 68b is pressed once in the situation of "Setting 6", it is changed to "Setting 1". I will be going back.

If a negative determination is made in step S5106, or if the process in step S5107 is executed, a setting value display update process is executed (step S5108). In the setting value display update process, the display of the third notification display device 69c is controlled so that a number corresponding to the value of the setting value counter in the work area 221 for specific control is displayed. By checking the third notification display device 69c, the game hall manager can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S5108, the process returns to step S5103, and it is determined whether one game ball is detected by the exit detection sensor 48a. If one game ball is not detected by the exit detection sensor 48a (step S5103: NO), the process from step S5104 onward is executed again. When one game ball is detected by the exit detection sensor 48a (step S5103: YES), it is determined whether the setting key insertion section 68a has been switched from the ON state to the OFF state (step S5109). In this case, instead of specifying whether or not the setting key insertion section 68a is in the OFF state, it is specified whether or not a switch has occurred from the ON state to the OFF state, and it is determined that the switch has occurred. If specified, an affirmative determination is made in step S5109.

If it has not been switched to the OFF state (step S5109: NO), the process of step S5109 is executed again. This causes the process to wait for the progress of the process until the setting key insertion section 68a is turned OFF. If it has been switched to the OFF state (step S5109: YES), a process to end the display of the setting value is executed (step S5110). In the process to end the display of the setting value, the display of the setting value on the third notification display device 69c is ended. In this case, the display of information on various parameters stored in the calculation result storage area 234 provided in the work area 223 for non-specific control is started on the first to third notification display devices 69a to 69c.

Thereafter, a setting value comparison process is executed (step S5111). In the setting value comparison process, it is determined whether the information on the setting value counter in the work area 221 for specific control matches the information stored in the copy area in the work area 221 for specific control. That is, it is determined whether or not the set value that was set before the supply of operating power to the pachinko machine 10 was stopped is the same as the set value that was set in the current set value update process.

If the setting value that was set before the supply of operating power to the pachinko machine 10 was stopped is the same as the setting value set in this setting value update process (step S5112: NO), a process for notifying when no change is performed is executed (step S5113). In the process for notifying when no change is performed, a setting maintain command indicating that the setting value has not been changed is sent to the sound and light emission control device 81. Upon receiving the setting maintain command, the sound and light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to maintaining the setting, and causes the speaker unit 54 to output a sound saying "The setting is maintained." In addition, a text image saying "The setting is maintained" is displayed on the pattern display device 41.

These notifications are maintained until the notification execution period (e.g., 10 seconds) has elapsed since the setting maintenance command was sent, and are terminated when the notification execution period has elapsed. However, this is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. The notification termination operation may be, for example, pressing the update button 68b or the reset button 68c. By checking the notification, the manager of the game hall can understand that the setting value has been maintained. In addition, in the notification process when no change is made, the display content on at least one of the first to third notification display devices 69a to 69c may be set to display content corresponding to the setting maintenance, thereby notifying that the setting value has been maintained, or an external output may be provided indicating that the setting value has been maintained.

If the setting value that was set before the supply of operating power to the pachinko machine 10 was stopped is not the same as the setting value set in this setting value update process (step S5112: YES), a notification process at the time of change is executed (step S5114). In the notification process at the time of change, a setting change command indicating that the setting value has been changed is sent to the sound and light emission control device 81. Upon receiving the setting change command, the sound and light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the setting change, and outputs a sound saying "The setting has been changed" from the speaker unit 54. In addition, a text image saying "The setting has been changed" is displayed on the pattern display device 41.

These notifications are maintained until the notification execution period (e.g., 10 seconds) has elapsed since the setting change command was sent, and are terminated when the notification execution period has elapsed. However, this is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. The notification termination operation may be, for example, pressing the update button 68b or the reset button 68c. By checking the notification, the manager of the game hall can understand that the setting value has been changed. In addition, in the notification process when the setting value is changed, the display content on at least one of the first to third notification display devices 69a to 69c may be changed to display content corresponding to the setting change, so that the setting value has been changed. An external output indicating that the setting value has been changed may be provided.

As described above, in order to execute the setting value update process in this embodiment, not only the setting key insertion part 68a is turned on, but also the reset button 68c is pressed, and the front door frame 14 is in the open state. Therefore, the gaming machine main body 12 must be in an open state. Thereby, even if an attempt is made to illegally execute the setting value update process, it becomes difficult to do so.

Further, in order to execute the setting value update process, the front door frame 14 and the gaming machine main body 12 need to be in an open state. As a result, even if an attempt is made to fraudulently execute the setting value update process, the fraudulent act will be noticeable because the front door frame 14 and the gaming machine main body 12 are open, and the gaming hall manager will It becomes easier to detect fraudulent activities.

In particular, in order to execute the setting value update process, it is necessary not only to open the gaming machine main body 12 to expose the main controller 60, but also to open the front door frame 14. It is possible to make the work of the above-mentioned fraudulent act complicated, and it is also possible to make the above-mentioned fraudulent act noticeable.

In addition, in a configuration in which the process for proceeding with the game does not return if the setting value update process is not completed, in order to finalize the setting value selected in the setting value update process and end the setting value update process, It is necessary to enter the game ball into the out port 24a and have the out port detection sensor 48a detect the game ball, and then turn off the setting key insertion part 68a. This makes it possible to make it difficult to perform an operation to terminate the setting value update process and return to the process for proceeding with the game, even if the setting value update process is executed fraudulently.

Also, the setting value that was set before the supply of operating power to the pachinko machine 10 was stopped and the setting value selected in the setting value update process are compared, and whether or not the two setting values are the same is determined. A corresponding notification is executed. Thereby, the administrator of the game hall can easily understand whether or not the setting value has been changed by the setting value update process.

Figure 86 is a flowchart showing the timer interrupt processing in this embodiment executed by the main CPU 63. The timer interrupt processing is executed periodically (e.g., every 4 milliseconds) when the processing of steps S5013 to S5016 is being executed in the main processing (Figure 84). Note that the program corresponding to the timer interrupt processing is set in the program for specific control.

In steps S5201 to S5205, the same processes as steps S301 to S305 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a specific control program and specific control data.

Then, the setting confirmation process is executed (step S5206). When the setting confirmation process is executed, a subroutine program corresponding to the setting confirmation process set in the program for specific control is executed, and when the subroutine program is executed, information for specifying the return address of the timer interrupt process after the setting confirmation process is executed is written to the stack area 222 for specific control by a push command. Then, when the setting confirmation process is completed, information for specifying the return address is read by a pop command, and the program returns to the timer interrupt process program indicated by the return address.

Figure 87 is a flowchart showing the setting confirmation process. Note that steps S5301 to S5312 in the setting confirmation process are executed by the main CPU 63 using a program for specific control and data for specific control.

First, it is determined whether the third notification display device 69c is displaying a setting value corresponding to the information of the setting value counter in the work area 221 for specific control (step S5301). If a negative determination is made in step S5301, it is determined whether the mode is neither a game time nor an open/close execution mode (step S5302), whether the picture display unit 38a is displaying a variable pattern time, and whether the normal power role 34a is in a normal power open state in which it can be opened (step S5303), whether the front door frame 14 is in an open state relative to the inner frame 13 (step S5304), whether the gaming machine main body 12 is in an open state relative to the outer frame 11 (step S5305), and whether the setting key insertion unit 68a is turned ON (step S5306). Whether the front door frame 14 is open or not is determined based on the detection result of the front door open sensor 95, similar to step S5005 in the main processing (Figure 84), and whether the gaming machine main body 12 is open or not is determined based on the detection result of the main body open sensor 96, similar to step S5006 in the main processing (Figure 84).

If a negative determination is made in any of steps S5302 to S5306, this setting confirmation process ends without executing the processes in steps S5307 to S5309. If a positive determination is made in all of steps S5302 to S5306, a process to start displaying set values is executed (step S5307). In the setting value display start process, the display of the third notification display device 69c is controlled so that the number of the setting value corresponding to the information of the setting value counter in the work area 221 for specific control is displayed. When checking the setting values, the game hall manager can grasp the current setting state of the pachinko machine 10 by visually checking the third notification display device 69c.

After that, the game stop flag provided in the work area 221 for specific control is set to "1" (step S5308). The game stop flag is a flag for the master CPU 63 to identify whether or not a situation exists in which a positive judgment is made in step S5207 in the timer interrupt process (FIG. 86) and the processes of steps S5208 to S5221 are not executed, that is, whether or not the execution of the processes for progressing the game should be stopped. By setting the game stop flag to "1", a positive judgment is made in step S5207 of the timer interrupt process (FIG. 86) and the processes of steps S5208 to S5221 are not executed. This allows the setting value to be checked in a situation in which the execution of the processes for progressing the game is stopped. However, even if the game stop flag is set to "1", steps S5201 to S5205 of the timer interrupt process (Figure 86) are executed, so even if the set value is being checked, power outage monitoring is executed, the winning random number counter C1, the big win type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and further fraud detection is executed.

Thereafter, a confirmation notification start command is transmitted to the audio emission control device 81 (step S5309). By receiving the confirmation notification start command, the audio light emission control device 81 causes the display light emitting unit 53 to emit light in a mode corresponding to the setting confirmation, and causes the speaker unit 54 to output a voice saying “Setting confirmation is in progress.” . In addition, the symbol display device 41 displays a text image saying "Settings are being confirmed." These notifications are continued until a confirmation notification end command is received from the main CPU 63. Note that a configuration may be adopted in which an external output indicating that the set value is being checked is provided.

As mentioned above, on the condition that it is not in either the game cycle or the opening/closing execution mode, and furthermore, it is not in either the cycle of displaying the fluctuation of the symbol in the ordinary figure display section 38a or the ordinary electricity open state in which the ordinary electric accessory 34a can be in the open state. By displaying the display for checking the set value on the third notification display device 69c, it is possible to prevent the work of checking the set value from being performed while a game is being played. It becomes possible.

In addition, in order to display the setting value on the third notification display device 69c, it is necessary not only to turn on the setting key insertion part 68a but also to make the front door frame 14 open. Therefore, the gaming machine main body 12 must be in an open state. Thereby, even if an attempt is made to fraudulently display a setting value confirmation display, it becomes difficult to do so.

In addition, in order for the display for checking the set value to be displayed on the third notification display device 69c, the front door frame 14 and the gaming machine main body 12 must be in an open state. As a result, even if someone tries to fraudulently display the display for checking the set value, the fraudulent behavior will be noticeable because the front door frame 14 and the gaming machine main body 12 are in an open state, making it easier for the manager of the amusement hall to discover the fraudulent behavior.

In particular, in order to have the display for checking the setting value displayed on the third notification display device 69c, it is necessary to open not only the gaming machine main body 12, which is necessary to expose the main control device 60, but also the front door frame 14, which makes it possible to make the above-mentioned fraudulent acts more complicated and makes the above-mentioned fraudulent acts more noticeable.

If a positive judgment is made in step S5301, it is judged whether or not the setting key insertion section 68a has been turned OFF (step S5310). If it has been turned OFF (step S5310: YES), the game stop flag in the work area 221 for specific control is cleared to "0" (step S5311). As a result, a negative judgment is made in step S5207 of the timer interrupt process (Figure 86), resulting in a situation in which the processes of steps S5208 to S5221 are executed. This releases the state in which the execution of processes for progressing the game is stopped.

Then, a confirmation notification end command is sent to the audio and light-emitting control device 81 (step S5312). By receiving the confirmation notification end command, the audio and light-emitting control device 81 ends the notification indicating that the setting values in the pattern display device 41, the display light-emitting unit 53, and the speaker unit 54 are being confirmed.

Returning to the explanation of the timer interrupt process (FIG. 86), after the setting confirmation process of step S5206 is completed, it is determined whether or not play is stopped (step S5207). In this case, if the game stop flag in the work area 221 for specific control is set to "1" in the setting confirmation process of step S5206, a positive determination is made in step S5207 and the processes of steps S5208 to S5221 are not executed. Also, if the occurrence of fraud is detected in the fraud detection process of step S5205, a positive determination is made in step S5207 and the processes of steps S5208 to S5221 are not executed.

Steps S5208 to S5219 execute the same processing as steps S307 to S318 of the timer interrupt processing (FIG. 11) in the first embodiment described above. These processes are executed in the main CPU 63 using a program for specific control and data for specific control. Also, step S5221 executes the same processing as step S3719 of the timer interrupt processing (FIG. 69) in the fifteenth embodiment described above.

On the other hand, in step S5220, RAM monitoring processing is executed. When executing the RAM monitoring process, a subroutine program corresponding to the RAM monitoring process set in the specific control program will be executed. Information for specifying the return address of the timer interrupt processing in is written to the stack area 222 for specific control by a push instruction. Then, when the RAM monitoring process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process indicated by the return address.

FIG. 88 is a flowchart showing RAM monitoring processing. Note that the processing from step S5401 to step S5412 in the RAM monitoring process is executed by the main CPU 63 using a specific control program and specific control data.

First, monitoring processing of the work area 221 for specific control is executed (step S5401). In this monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the specific control work area 221 due to noise or the like. This monitoring method is arbitrary, but for example, in the work area 221 for specific control, check whether the state of the storage area to which information is not written due to various controls in the main CPU 63 is different from the initial state. One method is to monitor the system and determine that an abnormality has occurred when the state is different from the initial state. In this case, if the initial state of the storage area is set to the value "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is set to "1". ”, it is determined that an abnormality has occurred if the storage area has a value of “0”. Furthermore, in addition to the monitoring method described above, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

If it is determined in step S5401 that there is an abnormality (step S5402: YES), the processes of steps S5409 to S5412 are executed. If it is determined in step S5401 that there is no abnormality (step S5402: NO), the process advances to step S5403.

In step S5403, monitoring processing of the stack area 222 for specific control is executed. In this monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the stack area 222 for specific control due to noise or the like. This monitoring method is arbitrary, but for example, in the stack area 222 for specific control, check whether the state of the storage area to which information is not written due to various controls in the main CPU 63 is different from the initial state. One method is to monitor the system and determine that an abnormality has occurred when the state is different from the initial state. In this case, if the initial state of the storage area is set to the value "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is set to "1". ”, it is determined that an abnormality has occurred if the storage area has a value of “0”. Furthermore, in addition to the monitoring method described above, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

If it is determined in step S5403 that there is an abnormality (step S5404: YES), the processes of steps S5409 to S5412 are executed. If it is determined in step S5403 that there is no abnormality (step S5404: NO), the process advances to step S5405.

In step S5405, a monitoring process of the work area 223 for non-specific control is executed. In the monitoring process, whether or not an abnormality occurs in the information stored in the work area 223 for non-specific control due to noise or the like is monitored. This monitoring method is arbitrary, but for example, a method of monitoring whether or not the state of a memory area in the work area 223 for non-specific control in which information is not written by various controls in the main CPU 63 is different from the initial state, and judging that an abnormality has occurred when the state is different from the initial state, can be mentioned. In this case, if the initial state of the memory area is a state where the value of "0" is set, it is judged that an abnormality has occurred when "1" is stored in the memory area, and if the initial state of the memory area is a state where the value of "1" is set, it is judged that an abnormality has occurred when the value of the memory area is "0". In addition to the above monitoring method, a configuration may be used in which an abnormality is judged to have occurred when the value of a specified byte is a value different from the value that can be set in a normal state.

If it is determined in step S5405 that an abnormality exists (step S5406: YES), execute the processes of steps S5409 to S5412. If it is determined in step S5405 that an abnormality does not exist (step S5406: NO), proceed to step S5407.

In step S5407, a monitoring process of the non-specific control stack area 224 is executed. In this monitoring process, whether or not an abnormality has occurred in the information stored in the non-specific control stack area 224 due to noise or the like is monitored. This monitoring method is arbitrary, but for example, a method of monitoring whether or not the state of the memory area in the non-specific control stack area 224 in which information is not written by various controls in the main CPU 63 is different from the initial state, and judging that an abnormality has occurred when the state is different from the initial state, can be mentioned. In this case, if the initial state of the memory area is a state where the value of "0" is set, it is judged that an abnormality has occurred when "1" is stored in the memory area, and if the initial state of the memory area is a state where the value of "1" is set, it is judged that an abnormality has occurred when the value of the memory area is "0". In addition to the above monitoring method, a configuration may be used in which an abnormality is judged to have occurred when the value of a specified byte is a value different from the value that can be set in a normal state.

If it is determined in step S5407 that an abnormality exists (step S5408: YES), the processes of steps S5409 to S5412 are executed. Specifically, a setting value copy process is executed first (step S5409). In this copy process, the setting value counter information used to identify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. As a result, even if the setting value counter information is cleared to "0" in the abnormality clear process (step S5410) executed subsequently, it is possible to know the setting value of the pachinko machine 10 before the abnormality clear process was executed.

Thereafter, a clearing process in the event of an abnormality is executed (step S5410). In the clearing process at the time of abnormality, the work area 221 for specific control is cleared to "0" except for the copy area, and the stack area 222 for specific control, the work area 223 for non-specific control, and the stack for non-specific control are cleared to "0". Clear area 224 to "0". Initial settings are also performed after clearing to "0". In other words, in the RAM monitoring process, an abnormality occurs in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. If it is determined that the work area 221 for specific control is cleared to "0" excluding the copy area, the stack area 222 for specific control, the work area 223 for non-specific control, and the work area 223 for non-specific control are cleared to "0". The stack area 224 of is cleared to "0". As a result, if there is a possibility that some kind of information abnormality has occurred in the main RAM 65, neither the process corresponding to specific control nor the process corresponding to non-specific control will be executed in the same state. It becomes possible to do so.

Note that if the stack area 222 for specific control is cleared to "0", the information on the return address after execution of the RAM monitoring process will also be erased. Therefore, when the stack area 222 for specific control is cleared to "0", after the process of step S5412 is completed, the program is uniquely returned to the predetermined program. Specifically, the configuration is such that the process returns uniquely to the process of step S5013 in the main process (FIG. 22). However, the program that uniquely returns is not limited to step S5013, but may be step S5221 in the timer interrupt process (FIG. 86). Further, when the stack area 222 for specific control is cleared to "0", the stack pointer of the main CPU 63 is also set to the address of the first storage area in the storage order in the stack area 222 for specific control.

Thereafter, an abnormality command indicating that abnormality clear processing has occurred is transmitted to the audio emission control device 81 (step S5411). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emitting section 53 to emit light in a manner corresponding to forced clearing, and causes the speaker section 54 to output a voice saying "Forcibly cleared." Further, the character image "Forcibly cleared" is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above-mentioned notification, the administrator of the game hall can understand that the main side RAM 65 has been forcibly cleared.

Then, the setting value update process is executed (step S5412). In other words, when the abnormality clear process is executed, the setting value counter in the work area 221 for specific control is also cleared to "0", so the setting value update process is executed to reset the setting value of the pachinko machine 10. The processing content of the setting value update process is the same as step S5019 of the main process (Fig. 84). Therefore, each time the update button 68b is pressed once, the setting value is updated by one step, and the selected setting value is confirmed by detecting a game ball with the outlet detection sensor 48a. The setting value being updated and the confirmed setting value are displayed on the third notification display device 69c. After that, when the setting key insertion section 68a switches from the ON state to the OFF state, it is determined that the end condition of the setting value update process is satisfied.

Here, the termination condition is not determined to be met just because the setting key insertion section 68a is in the OFF state; the termination condition is determined to be met when the setting key insertion section 68a switches from the ON state to the OFF state. When the setting value update process is executed in the RAM monitoring process (Figure 88), the setting key insertion section 68a is in the OFF state at the start of the setting value update process, so in order to establish the termination condition of the setting value update process, it is necessary to insert the setting key into the setting key insertion section 68a and turn it ON once, and then turn it OFF. This makes it possible to prevent the setting value update process from terminating even if the correct operation has not been performed by the amusement hall manager.

When the setting key insertion section 68a switches from ON to OFF and the end condition of the setting value update process is satisfied, step S5111 in the setting value update process (FIG. 85) is executed to compare whether the setting value stored in the copy area in the work area 221 for specific control is the same as the setting value currently set in the setting value counter in the work area 221 for specific control. In other words, it is determined whether the setting value that was set before the abnormality clear process (step S5410) was executed is the same as the setting value set in the current setting value update process. If the two setting values are the same (step S5112: NO), the non-change notification process (step S5113) is executed to perform the setting maintenance notification already described. On the other hand, if the two setting values are different (step S5112: YES), the change notification process (step S5114) is executed to perform the setting change notification already described.

The present embodiment described above provides the following excellent advantages:

In order for the setting value update process to be executed when the supply of operating power to the pachinko machine 10 is started, not only must the setting key insertion section 68a be turned ON, but the reset button 68c must also be pressed, the front door frame 14 must be in the open state, and the gaming machine main body 12 must be in the open state. This makes it difficult for someone to fraudulently execute the setting value update process.

In order to execute the setting value update process, the front door frame 14 and the gaming machine main body 12 need to be in an open state. As a result, even if an attempt is made to fraudulently execute the setting value update process, the fraudulent act will be noticeable because the front door frame 14 and the gaming machine main body 12 are open, and the gaming hall manager will It becomes easier to detect fraudulent activity.

In particular, in order to execute the setting value update process, it is necessary not only to open the gaming machine main body 12 to expose the main controller 60, but also to open the front door frame 14. It is possible to make the work of the above-mentioned fraudulent act complicated, and it is also possible to make the above-mentioned fraudulent act noticeable.

In a configuration in which the process for progressing the game is not returned to if the setting value update process is not completed, in order to confirm the setting value selected in the setting value update process and end the setting value update process, it is necessary to insert a game ball into the outlet 24a to have the outlet detection sensor 48a detect the game ball, and then turn off the setting key insertion unit 68a. This makes it possible to make it difficult to perform operations to end the setting value update process and return to the process for progressing the game, even if the setting value update process is executed fraudulently.

The setting value that was set before the supply of operating power to the pachinko machine 10 was stopped is compared with the setting value selected in the setting value update process, and a notification is issued corresponding to whether or not the two setting values are the same. This allows the manager of the amusement hall to easily understand whether or not the setting value was changed by the setting value update process.

By having the third notification display device 69c display a message to check the setting value when the game is not in play or open/close execution mode, and when the game is not in a state where the image on the normal picture display unit 38a is not changing, or when the normal power device 34a is not in a normal power open state in which it can be opened, it is possible to prevent the setting value from being checked while the game is being played.

In order for the display for checking the set value to be displayed on the third notification display device 69c, not only must the setting key insertion section 68a be turned ON, but the front door frame 14 must also be in the open state, and the gaming machine main body 12 must also be in the open state. This makes it difficult to fraudulently display the display for checking the set value.

In order for the display for checking the set value to be displayed on the third notification display device 69c, the front door frame 14 and the gaming machine main body 12 must be in an open state. As a result, even if someone tries to fraudulently display the display for checking the set value, the fraudulent behavior will be noticeable because the front door frame 14 and the gaming machine main body 12 are in an open state, making it easier for the manager of the amusement hall to discover the fraudulent behavior.

In particular, in order to have the display for checking the setting value displayed on the third notification display device 69c, it is necessary to open not only the gaming machine main body 12, which is necessary to expose the main control device 60, but also the front door frame 14, which makes it possible to make the above-mentioned fraudulent acts more complicated and makes the above-mentioned fraudulent acts more noticeable.

When it is determined that an abnormality has occurred in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. clears the work area 221 for specific control to "0" except for the copy area, and also clears the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control to "0". "clear. As a result, if there is a possibility that some kind of information abnormality has occurred in the main RAM 65, both the processing corresponding to specific control and the processing corresponding to non-specific control are executed in the same state. This makes it possible to prevent this from happening.

In the process corresponding to the specific control, not only the work area 221 for specific control and the stack area 222 for specific control, but also the work area 223 for non-specific control and the stack area 224 for non-specific control are monitored for information anomalies. This makes it possible to simplify the processing configuration compared to a configuration in which information anomalies are monitored separately for processes corresponding to specific control and processes corresponding to non-specific control.

If it is determined that an abnormality has occurred in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control, not only the work area 221 for specific control and the stack area 222 for specific control, but also the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0" in the process corresponding to the specific control. This makes it possible to simplify the processing configuration compared to a configuration in which "0" clearing is performed separately for the process corresponding to specific control and the process corresponding to non-specific control.

When an abnormality occurs and the abnormality clear process is executed, the setting value update process is executed. This makes it possible to prevent the game from proceeding even if the setting value has not been set. In this case, if the setting value set before the abnormality clear process is executed and the setting value set in the setting value update process after the abnormality clear process are executed are the same, a setting maintenance notification is issued. As a result, even if the abnormality clear process is executed, the setting value set in the previous situation is reset to be notified, and it is possible to clearly inform the player that the setting value has not changed even if the abnormality clear process is executed. Incidentally, since it is common for the setting values of each pachinko machine 10 installed in amusement halls to be recorded, it is possible to execute the setting value update process after the abnormality clear process is executed so that the recorded setting value is used.

Note that the conditions for executing the setting value update process when the supply of operating power to the pachinko machine 10 is started may be different from those in the above embodiment. FIG. 89 is a flowchart showing another form of main processing. In the main processing, steps S5501 to S5506 and steps S5508 to S5520 are the same as steps S5001 to S5019 of the main processing (FIG. 84) in the above embodiment. On the other hand, in the main processing, it is determined in step S5507 whether the operating handle of the firing operation device 28 operated to launch the game ball into the gaming area PA has been rotated from the initial rotation position. Then, the reset button 68c is pressed (step S5503: YES), the setting key insertion part 68a is turned on (step S5504: YES), and the front door frame 14 is in an open state with respect to the inner frame 13. (Step S5505: YES), the game machine main body 12 is in an open state with respect to the outer frame 11 (Step S5506: YES), and the operation handle of the firing operation device 28 is rotated from the initial rotation position. If so (step S5507: YES), setting value update processing (step S5520) is executed. As a result, in order to execute the setting value update process when the supply of operating power to the pachinko machine 10 is started, it is necessary not only to insert the setting key into the setting key insertion section 68a and perform the ON operation, but also to perform the ON operation. It is necessary to start supplying operating power to the pachinko machine 10 while the operating handle of the operating device 28 is being rotated. Therefore, it is possible to make it difficult to illegally change the setting value. Note that in step S5507, instead of determining whether or not the operating handle of the firing operating device 28 has been rotated from the initial rotation position, it is determined whether the firing operating device 28 is being touched by the player. It may also be a configuration.

In addition, the conditions for executing the setting value update process when the supply of operating power to the pachinko machine 10 is started are that the front door frame 14 is in an open state with respect to the inner frame 13 and that the outer door frame 14 is in an open state with respect to the inner frame 13. Although the configuration is such that both conditions are set, that the gaming machine main body 12 is in an open state with respect to the frame 11, a configuration may be adopted in which only one of these conditions is set.

In addition, the configuration is such that the reset button 68c is pressed as a condition for executing the setting value update process when the supply of operating power to the pachinko machine 10 is started. However, a configuration may be adopted in which this condition is not set.

In addition, a configuration may be adopted in which the condition for executing the setting value update process when the supply of operating power to the pachinko machine 10 is started is that the supply of operating power to the pachinko machine 10 is started in a situation where a gaming ball is detected by the gate detection sensor 49a. As a result, in order for the setting value update process to be executed when the supply of operating power to the pachinko machine 10 is started, it is necessary not only to insert the setting key into the setting key insertion section 68a and turn it ON, but also to start the supply of operating power to the pachinko machine 10 with a gaming ball remaining in the through gate 35. This makes it difficult to perform an act of illegally changing the setting value.

Further, the content of the operation for finalizing the setting value in the setting value update process may be different from that in the above embodiment. FIG. 90 is a flowchart showing another example of setting value update processing. In the setting value update process, steps S5601 to S5602 and steps S5604 to S5614 execute the same processes as steps S5101 to S5102 and steps S5104 to S5114 of the setting value update process (FIG. 85) in the above embodiment. . On the other hand, in step S5603, in the setting value update process, instead of determining whether or not the exit detection sensor 48a has detected a game ball, the ON signal is continuously output from the gate detection sensor 49a. It is determined whether the ON duration period is equal to or longer than the end reference period (specifically, 5 seconds). If an affirmative determination is made in step S5603, the currently selected setting value is determined and the process advances to step S5609. According to this configuration, in order to confirm the selected setting value, it is necessary to intentionally keep the game ball in the through gate 35 for a period longer than the end reference period. Game balls staying in the through gate 35 for longer than the end reference period does not occur in a situation where a normal game is being played. Thereby, it is possible to make the conditions for determining the currently selected setting value not satisfied or difficult to be satisfied in a situation where a normal game is being played. Further, even if the setting value update process is started by fraud, it is possible to make it difficult to perform an operation to confirm the selected setting value in the setting value update process.

Furthermore, in the setting value update process, the selected setting value may be determined when the operating handle of the firing operating device 28 is rotated from the initial rotation position, and the firing operating device 28 may be touched by the player. The configuration may be such that the currently selected setting value is finalized when the selected setting value is selected.

In addition, in the setting value update process, the selected setting value may be determined when the special electric detection sensor 45a detects that a game ball has entered the special electric winning device 32 provided with an opening and closing member, or the selected setting value may be determined when the second operating port detection sensor 47a detects that a game ball has entered the second operating port 34 provided with an opening and closing member. In this case, in order to determine the selected setting value, it is necessary to manually open the target ball entry section and then handle the game ball, making it difficult to fraudulently change the setting value.

In addition, in the setting value update process, the selected setting value may be determined based on the detection of a game ball entering the first ball entry section and then the detection of a game ball entering the second ball entry section. In this case, in order to determine the selected setting value, it is necessary to manually enter game balls into multiple ball entry sections in a specified order, making it difficult to illegally change the setting value. In this case, by making both the first ball entry section and the second ball entry section ball entry sections that are not provided with opening and closing members, it is possible to prevent the ease of performing regular work from being extremely reduced.

In addition, in the setting value update process, the setting key insertion section 68a may be switched from the ON state to the OFF state, so that the selected setting value is confirmed and the end condition for the setting value update process is met.

Further, in the setting value update process, the operation for updating the setting value by one step is not limited to the configuration in which the update button 68b is pressed, and the setting value is changed by one step by pressing the reset button 68c. The configuration may be updated.

In addition, when the reset button 68c is pressed and the setting key insertion section 68a is turned ON by the setting key, the supply of operating power to the pachinko machine 10 is started, and when the front door frame 14 is not open relative to the inner frame 13 or the gaming machine main body 12 is not open relative to the outer frame 11, the configuration is not limited to one in which the clear process at the time of non-setting update (step S5007) is executed, and the clear process at the time of non-setting update may not be executed. This makes it possible to prevent the clear process at the time of non-setting update from being executed against the will of the manager of the gaming hall.

In addition, when the supply of operating power to the pachinko machine 10 is started in a situation where the reset button 68c is pressed and the setting key insertion section 68a is not turned ON by the setting key, and when the front door frame 14 is not open relative to the inner frame 13 or the gaming machine main body 12 is not open relative to the outer frame 11, the configuration is not limited to one in which the clear process at the time of non-setting update (step S5007) is executed, and the clear process at the time of non-setting update may not be executed. This makes it difficult to illegally execute the clear process at the time of non-setting update.

<23rd embodiment>
This embodiment is different from the twenty-second embodiment described above in the processing configuration of the main process. Hereinafter, the configuration that is different from the twenty-second embodiment described above will be explained. Note that descriptions of the same configurations as those in the twenty-second embodiment will be basically omitted.

FIG. 91 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step S5701 to step S5720 in the main processing is executed by the main CPU 63 using a specific control program and specific control data.

First, the power-on wait process is executed (step S5701). In this power-on wait process, for example, the main process is started and a predetermined wait time (specifically, one second) elapses before proceeding to the next process. During the execution period of this power-on wait process, the operation start and initial settings of the pattern display device 41 are completed. After that, access to the main RAM 65 is permitted (step S5702).

Thereafter, it is determined whether the front door frame 14 is in an open state with respect to the inner frame 13 based on the detection result of the front door open sensor 95 (step S5703), and the outer frame 14 is determined based on the detection result of the main body open sensor 96. It is determined whether or not the game machine main body 12 is in an open state (step S5704), and it is determined whether or not the reset button 68c is pressed (step S5705). If a negative determination is made in any of steps S5703 to S5705, the processes of steps S5706 to S5714 are executed. These steps S5706 to S5714 are the same as steps S5008 to S5016 of the main process (FIG. 84) in the twenty-second embodiment.

If all of steps S5703 to S5705 are judged to be positive, a selection process is executed (step S5715). In the selection process, a process is executed to determine whether the situation is one in which a clear process is executed when no settings are updated and the setting value update process is not executed, or one in which a clear process is executed when settings are updated and the setting value update process is executed, based on a selection operation by the manager of the amusement hall. Specifically, each time the update button 68b is pressed once, the situation is switched from one of the above situations being selected to the other situation being selected. Note that the selection operation may be performed by operating the reset button 68c, or may be performed by operating another operating unit. In addition, if a situation in which the clear process is executed when the setting is not updated and the setting value update process is not executed is selected, the first notification display device 69a displays "O" and the second notification display device 69b and the third notification display device 69c are turned off, and if a situation in which the clear process is executed when the setting is updated and the setting value update process is executed is selected, the second notification display device 69b displays "O" and the first notification display device 69a and the third notification display device 69c are turned off. In addition, if the reset button 68c is pressed continuously for a selection period (specifically, 10 seconds) or longer, the selected one of the above situations is confirmed as the current selection.

In addition, if the update button 68b is continuously pressed for more than the confirmation selection period (specifically, 10 seconds), the selected situation among the above situations is confirmed as the current selection target. It may also be configured such that if the other operation part is pressed continuously for more than the fixed selection period (specifically 10 seconds), the selected situation among the above situations is selected as the current selection. It may be configured to be determined as a target. Alternatively, a configuration may be adopted in which the selected situation among the above-mentioned situations is determined as the current selection target by rotating the operating handle of the firing operation device 28.

In the selection process, if the situation in which the clear process for non-setting updates is executed and the setting value update process is not executed is confirmed as the current selection target (step S5716: NO), the clear process for non-setting updates is executed (step S5717). The processing content of the clear process for non-setting updates is the same as that of step S5007 in the main process (FIG. 84) in the above 22nd embodiment.

In the selection process, if the situation in which the clear process at the time of updating the settings and the setting value update process are executed is confirmed as the current selection target (step S5716: YES), the setting value copy process is executed (step S5718), the clear process at the time of updating the settings is executed (step S5719), and the setting value update process is executed (step S5720). The processing content of these steps S5718 to S5720 is the same as steps S5017 to S5019 of the main process (Figure 84) in the above 22nd embodiment.

According to the above configuration, even in a configuration where the setting key insertion section 68a is not provided, the clearing process is executed when the setting is not updated and the setting value updating process is not executed, and the clearing process is executed when the setting is updated. At the same time, it becomes possible for the game hall manager to select which of the situations the setting value update process is to be executed.

In addition, not only when executing the setting value update process but also when executing the clear process when the setting is not updated, operating power is not supplied to the pachinko machine 10 in a situation where the reset button 68c is pressed. In addition to starting the game, it is necessary to open the front door frame 14 to the inner frame 13 and to open the gaming machine main body 12 to the outer frame 11. As a result, even if an unauthorized person tries to execute the clearing process at the time of non-setting update, it becomes difficult to do so.

In addition, the conditions for the selection process to be executed when the supply of operating power to the pachinko machine 10 is started are set to both that the front door frame 14 is open relative to the inner frame 13 and that the gaming machine main body 12 is open relative to the outer frame 11, but it is also possible to set only one of these conditions.

In addition, as a condition for executing the selection process when the supply of operating power to the pachinko machine 10 is started, a condition that the launch handle of the launch operation device 28 is rotated, a condition that the launch operation device 28 is touched, or a condition that a game ball is detected by the gate detection sensor 49a may be added.

<Twenty-fourth embodiment>
In this embodiment, the processing configuration of the RAM monitoring process is different from that of the twenty-second embodiment. The configuration that differs from the twenty-second embodiment will be described below. Note that the description of the same configuration as the twenty-second embodiment will basically be omitted.

Figure 92 is a flowchart showing the RAM monitoring process in this embodiment, which is executed by the main CPU 63. Note that the processes in steps S5801 to S5814 in the RAM monitoring process are executed by the main CPU 63 using a program for specific control and data for specific control.

First, monitoring processing of the work area 221 for specific control is executed (step S5801). The contents of the monitoring process are the same as step S5401 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5801 that there is an abnormality (step S5802: YES), the processes of steps S5805 to S5808 are executed.

If it is determined in step S5801 that no abnormality exists (step S5802: NO), a monitoring process of the specific control stack area 222 is executed (step S5803). The contents of this monitoring process are the same as step S5403 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. If it is determined in step S5803 that an abnormality exists (step S5804: YES), the processes of steps S5805 to S5808 are executed.

Regarding the processing of steps S5805 to S5808 in detail, a copy process of the setting values is first executed (step S5805). In this copy process, the information of the setting value counter used to identify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. As a result, even if the information of the setting value counter is cleared to "0" in the subsequent abnormality clear process (step S5806), it is possible to know the setting value of the pachinko machine 10 before the abnormality clear process was executed.

Then, a clear process is performed when an abnormality occurs (step S5806). In the clear process when an abnormality occurs, the work area 221 for specific control is cleared to "0" except for the copy area, and the stack area 222 for specific control is cleared to "0". After clearing to "0", the initial settings are performed. On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". In other words, in the RAM monitoring process in this embodiment, when it is determined that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the work area 221 for specific control is cleared to "0" except for the copy area, and the stack area 222 for specific control is cleared to "0". This makes it possible to prevent the process corresponding to the specific control from being executed in the current state when there is a possibility that some information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control. Furthermore, even if an information abnormality occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0", so that it is possible to prevent the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to "0" as a result of an information abnormality in the work area 221 for specific control or the stack area 222 for specific control.

Note that if the stack area 222 for specific control is cleared to "0", the information on the return address after execution of the RAM monitoring process will also be erased. Therefore, when the stack area 222 for specific control is cleared to "0", after the process in step S5808 is finished, the process returns to the predetermined program. Specifically, the configuration is such that the process returns uniquely to the process of step S5013 in the main process (FIG. 22). However, the program that uniquely returns is not limited to step S5013, but may be step S5221 in the timer interrupt process (FIG. 86). Further, when the stack area 222 for specific control is cleared to "0", the stack pointer of the main CPU 63 is also set to the address of the first storage area in the storage order in the stack area 222 for specific control.

Then, an abnormal command indicating that the abnormal clear process has occurred is sent to the sound and light emission control device 81 (step S5807). By receiving the abnormal command, the sound and light emission control device 81 causes the display light-emitting unit 53 to emit light in a manner corresponding to the forced clear, and causes the speaker unit 54 to output a voice saying "Forced clear has been performed." In addition, the pattern display device 41 is configured to display a text image saying "Forced clear has been performed." These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, this is not limited to this, and the above notification may be terminated when the notification termination operation is performed by the manager of the game hall. For example, the update button 68b may be pressed as the notification termination operation, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can understand that the work area 221 for specific control and the stack area 222 for specific control have been forced cleared.

Thereafter, setting value update processing is executed (step S5808). The contents of the setting value update process are the same as step S5412 in the RAM monitoring process (FIG. 88) in the twenty-second embodiment.

If it is determined that there is no abnormality in both steps S5801 and S5803 (steps S5802 and S5804: NO), a monitoring process of the work area 223 for non-specific control is executed (step S5809). The contents of the monitoring process are the same as step S5405 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. If it is determined that there is an abnormality in step S5809 (step S5810: YES), the work area 223 for non-specific control is cleared to "0" and initialized (step S5811). In this case, the normal counter area 231, the counter area 232 for the open/close execution mode, the counter area 233 for the high frequency support mode, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to resolve the information abnormality in the work area 223 for non-specific control.

On the other hand, in step S5811, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". This makes it possible to prevent the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control from being cleared to "0" even if an information abnormality occurs in the work area 223 for non-specific control.

In step S5811, the normal counter area 231, the counter area for opening and closing execution mode 232, the counter area for high-frequency support mode 233, and the calculation result storage area 234 may be cleared to "0", but the management start flag may not be cleared to "0". In step S5811, the normal counter area 231, the counter area for opening and closing execution mode 232, the counter area for high-frequency support mode 233, and the management start flag may be cleared to "0", but the calculation result storage area 234 may not be cleared to "0". In step S5811, the normal counter area 231, the counter area for opening and closing execution mode 232, and the counter area for high-frequency support mode 233 may be cleared to "0", but the calculation result storage area 234 and the management start flag may not be cleared to "0".

If a negative determination is made in step S5810 or if the process in step S5811 is executed, a process for monitoring the stack area 224 for non-specific control is executed (step S5812). The contents of the monitoring process are the same as step S5407 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5812 that there is an abnormality (step S5813: YES), the stack area 224 for non-specific control is cleared to "0" and initial settings are performed (step S5814). This makes it possible to eliminate information abnormalities in the stack area 224 for non-specific control.

On the other hand, in step S5814, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". This makes it possible to prevent the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control from being cleared to "0" even if an information anomaly occurs in the stack area 224 for non-specific control.

According to the above configuration, if it is determined that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the work area 221 for specific control is cleared to "0" except for the copy area, and the stack area 222 for specific control is cleared to "0". This makes it possible to prevent the processing corresponding to the specific control from being executed in the current state if there is a possibility that some information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control.

Even if an information abnormality occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". This prevents the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to "0" due to an information error in the work area 221 for specific control or the stack area 222 for specific control. It becomes possible to do so.

Even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". This prevents the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control from being cleared to "0" due to an information abnormality in the work area 223 for non-specific control. becomes possible.

Even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". This makes it possible to prevent the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control from being cleared to "0" as a result of an information abnormality in the stack area 224 for non-specific control.

Note that if an information abnormality has occurred in the work area 221 for specific control, the work area 221 for specific control is cleared to "0" except for the copy area, while the stack area 222 for specific control is cleared to "0". 0" may not be cleared.

Also, if an information anomaly occurs in the stack area 222 for specific control, the stack area 222 for specific control may be cleared to "0", but the work area 221 for specific control may not be cleared to "0". In this case, the process of steps S5805 to S5808 may not be executed even if the stack area 222 for specific control is cleared to "0".

<25th embodiment>
This embodiment differs from the twenty-second embodiment in the processing configuration for monitoring whether an information abnormality has occurred in each of the areas 221 to 224 of the main side RAM 65. Hereinafter, the configuration that is different from the twenty-second embodiment described above will be explained. Note that descriptions of the same configurations as those in the twenty-second embodiment will be basically omitted.

FIG. 93 is a flowchart showing the RAM monitoring process in this embodiment executed by the main CPU 63. Note that the processes from step S5901 to step S5908 in the RAM monitoring process are executed by the main CPU 63 using a specific control program and specific control data.

First, monitoring processing of the work area 221 for specific control is executed (step S5901). The contents of the monitoring process are the same as step S5401 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5901 that there is an abnormality (step S5902: YES), the processes of steps S5905 to S5908 are executed.

If it is determined in step S5901 that no abnormality exists (step S5902: NO), a monitoring process of the specific control stack area 222 is executed (step S5903). The contents of this monitoring process are the same as those of step S5403 in the RAM monitoring process (FIG. 88) in the 22nd embodiment. If it is determined in step S5903 that an abnormality exists (step S5904: YES), the processes of steps S5905 to S5908 are executed.

Regarding the process of steps S5905 to S5908 in detail, a copy process of the setting values is first executed (step S5905). In this copy process, the information of the setting value counter used to identify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. As a result, even if the information of the setting value counter is cleared to "0" in the subsequent abnormality clear process (step S5906), it is possible to know the setting value of the pachinko machine 10 before the abnormality clear process was executed.

Then, a clear process is performed when an abnormality occurs (step S5906). In the clear process when an abnormality occurs, the work area 221 for specific control is cleared to "0" except for the copy area, and the stack area 222 for specific control is cleared to "0". After clearing to "0", the initial settings are performed. On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". In other words, in the RAM monitoring process in this embodiment, when it is determined that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the work area 221 for specific control is cleared to "0" except for the copy area, and the stack area 222 for specific control is cleared to "0". This makes it possible to prevent the process corresponding to the specific control from being executed in the current state when there is a possibility that some information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control. Furthermore, even if an information abnormality occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0", so that it is possible to prevent the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to "0" as a result of an information abnormality in the work area 221 for specific control or the stack area 222 for specific control.

Thereafter, an abnormality command indicating that abnormality clear processing has occurred is transmitted to the audio emission control device 81 (step S5907). By receiving the abnormality command, the audio light emission control device 81 causes the display light emission section 53 to emit light in a manner corresponding to forced clearing of the work area 221 for specific control and the stack area 222 for specific control, and also causes the speaker section 54 to output a voice saying ``Forcible clear has been executed for specific control.'' Further, a character image "Forcible clearing has been executed for specific control" is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the manager of the game hall. The notification termination operation may be, for example, pressing the update button 68b or pressing the reset button 68c. By confirming the above notification, the manager of the gaming hall can understand that the work area 221 for specific control and the stack area 222 for specific control have been forcibly cleared.

Thereafter, setting value update processing is executed (step S5908). The contents of the setting value update process are the same as step S5412 in the RAM monitoring process (FIG. 88) in the twenty-second embodiment.

In the RAM monitoring process executed using the specific control program and specific control data as described above, information abnormality monitoring is executed for the specific control work area 221 and the specific control stack area 222. However, information abnormality monitoring is not executed for the work area 223 for non-specific control and the stack area 224 for non-specific control. Monitoring of information abnormalities in the work area 223 for non-specific control and the stack area 224 for non-specific control is performed by processing corresponding to non-specific control in which programs for non-specific control and data for non-specific control are used. is executed.

Figure 94 is a flowchart showing the management execution process in this embodiment executed by the main CPU 63. Note that the management execution process is executed by reading out a subroutine program in the management process (Figure 70) in the same way as in the 15th embodiment. Also, the processes in steps S6001 to S6016 in the management execution process are executed in the main CPU 63 using a program for non-specific control and data for non-specific control.

In steps S6001 to S6008 and steps S6010 to S6016, the same processes as steps S3901 to S3915 of the management execution process (FIG. 71) in the fifteenth embodiment are executed. Further, in step S6009, another monitoring process is executed. When executing a separate monitoring process, a subroutine program corresponding to the separate monitoring process set in the program for non-specific control will be executed. Information for specifying a return address for later management execution processing is written to the stack area 224 for non-specific control by a push command. When the separate monitoring process ends, information for specifying the return address is read out by the pop command, and the program returns to the management execution process indicated by the return address.

FIG. 95 is a flowchart showing separate monitoring processing. Note that the processes from step S6101 to step S6108 in the separate monitoring process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, monitoring processing of the work area 223 for non-specific control is executed (step S6101). The contents of the monitoring process are the same as step S5405 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S6101 that there is an abnormality (step S6102: YES), the work area 223 for non-specific control is cleared to "0" and initial settings are performed (step S6103). In this case, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control.

On the other hand, in step S6103, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are 0” can be prevented from being cleared.

In step S6103, the normal counter area 231, the counter area for opening and closing execution mode 232, the counter area for high-frequency support mode 233, and the calculation result storage area 234 may be cleared to "0", but the management start flag may not be cleared to "0". In step S6103, the normal counter area 231, the counter area for opening and closing execution mode 232, the counter area for high-frequency support mode 233, and the management start flag may be cleared to "0", but the calculation result storage area 234 may not be cleared to "0". In step S6103, the normal counter area 231, the counter area for opening and closing execution mode 232, and the counter area for high-frequency support mode 233 may be cleared to "0", but the calculation result storage area 234 and the management start flag may not be cleared to "0".

Then, the clear notification process is executed (step S6104). In the clear notification process, a command indicating that the work area 223 for non-specific control has been cleared to "0" is sent to the voice and light emission control device 81. By receiving the command, the voice and light emission control device 81 causes the display light-emitting unit 53 to emit light in a manner corresponding to the forced clearing of the work area 223 for non-specific control, and causes the speaker unit 54 to output a voice saying "The history information has been forcibly cleared." In addition, the pattern display device 41 is made to display a text image saying "The history information has been forcibly cleared." These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, this is not limited to this, and the above notification may be terminated when the notification termination operation is performed by the manager of the game hall. For example, the update button 68b may be pressed as the notification termination operation, or the reset button 68c may be pressed. By checking the above notification, the manager of the amusement hall can understand that the work area 223 for non-specific control has been forcibly cleared.

If a negative determination is made in step S6102 or if the process in step S6104 is executed, a process for monitoring the stack area 224 for non-specific control is executed (step S6105). The contents of the monitoring process are the same as step S5407 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S6105 that there is an abnormality (step S6106: YES), the stack area 224 for non-specific control is cleared to "0" and initial settings are performed (step S6107). This makes it possible to eliminate information abnormalities in the stack area 224 for non-specific control.

On the other hand, in step S6107, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are 0” can be prevented from being cleared.

Thereafter, clear notification processing is executed (step S6108). In the clear notification process, a command indicating that the stack area 224 for non-specific control has been cleared to "0" is transmitted to the audio emission control device 81. By receiving the command, the audio light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to forced clearing of the stack area 224 for non-specific control, and also causes the speaker unit 54 to emit light in a manner that corresponds to the forced clearing of the stack area 224 for non-specific control. "Forcibly cleared." will be output. In addition, a character image is displayed on the symbol display device 41 saying "The stack of non-specific control has been forcibly cleared." These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the manager of the game hall. The notification termination operation may be, for example, pressing the update button 68b or pressing the reset button 68c. By confirming the above notification, the administrator of the gaming hall can understand that the stack area 224 for non-specific control has been forcibly cleared.

When the stack area 224 for non-specific control is forcibly cleared, the address of the program in step S6010 in the management execution process (FIG. 94) is set uniquely as the return address information after execution of another monitoring process. This makes it possible to return to the program that should have been returned to in the management execution process, even if the stack area 224 for non-specific control is forcibly cleared. Furthermore, when the stack area 224 for non-specific control is forcibly cleared, the stack pointer of the main CPU 63 is also set to the address of the first memory area in the storage order in the stack area 224 for non-specific control.

According to the above configuration, monitoring of whether an information abnormality has occurred in the work area 221 for specific control and the stack area 222 for specific control is executed by the process corresponding to specific control in the main CPU 63, Monitoring of whether an information abnormality has occurred in the work area 223 for specific control and the stack area 224 for non-specific control is executed in the process corresponding to non-specific control in the main CPU 63. As a result, not only the areas 221 to 224 of the main RAM 65 to be used are clearly distinguished between the processing corresponding to specific control and the processing corresponding to non-specific control, but also the areas of the main RAM 65 to be monitored 221 to 224 can also be clearly distinguished.

Note that when the work area 223 for non-specific control is cleared to "0", information of various registers of the main CPU 63 used in processing corresponding to specific control is stored in the work area 223 for non-specific control. The saved information is also cleared to "0". In this case, even if the process corresponding to the non-specific control ends and the process corresponding to the specific control returns, there is a possibility that the state before the process corresponding to the non-specific control is started cannot be restored. Therefore, when the work area 223 for non-specific control is cleared to "0", the work area 221 for specific control and the stack area 222 for specific control may also be cleared to "0". In addition, in this configuration, the set value counter in the work area 221 for specific control is also cleared to "0", so when returning from processing corresponding to non-specific control to processing corresponding to specific control, the setting value counter in the work area 221 for specific control is cleared. A configuration may be adopted in which a setting value update process is executed first as a corresponding process.

<26th embodiment>
This embodiment is different from the above-mentioned 20th embodiment in the processing configuration of management processing. Hereinafter, the configuration that is different from the above-mentioned 20th embodiment will be explained. Note that descriptions of the same configurations as those of the 20th embodiment will be basically omitted.

Figure 96 is a flowchart showing the management process in this embodiment, which is executed by the main CPU 63. Note that the processes in steps S6201 to S6219 in the management process are executed by the main CPU 63 using a program for specific control and data for specific control.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S6201). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and activated in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Then, the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by a load command "LD HL, SP" (step S6202). In this case, since the amount of information of the stack pointer is 16 bits and the amount of information of each of the H register and L register is 8 bits, the consecutive 8 bits of information from the upper side of the stack pointer are overwritten in the H register, and the consecutive 8 bits of information from the lower side of the stack pointer are overwritten in the L register.

After that, a 1-byte storage area corresponding to the stack pointer information stored in the HL register of the main CPU 63 in the stack area 222 for specific control is set to "0" by a load instruction as "LD (HL), 0". Clear (step S6203). Note that the HL register of the main CPU 63 has been overwritten with the information of the stack pointer of the main CPU 63 in step S6202, and the information of the stack pointer of the main CPU 63 has not been updated by the time the process of step S6203 is executed. Since this has not been carried out, in step S6203, the 1-byte storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is cleared to "0".

Thereafter, as "LD SP, SP-1", the information of the stack pointer of the main CPU 63 is updated to the address information of the storage area to be written in the next order in the stack area 222 for specific control by a load instruction. (Step S6204). When using the stack area 222 for specific control, information to be stored is stored from the storage area of the last address in the stack area 222 for specific control, and each time information to be stored is added, information for specific control is stored. The storage area of the storage destination is changed toward the first address side in the stack area 222 of . Therefore, in step S6204, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area with the smaller address by one in the stack area 222 for specific control. By executing the process in step S6204, the storage area in the next order for the storage area cleared to "0" in step S6203 is set as the storage target of information by the next push command, and in addition, in step S6203 The storage area cleared to "0" is set as the information read target by the next pop command.

After that, the WA register of the master CPU 63 is cleared to "0" by a load command as "LD WA, 0" (step S6205). The BC register of the master CPU 63 is cleared to "0" by a load command as "LD BC, 0" (step S6206). The DE register of the master CPU 63 is cleared to "0" by a load command as "LD DE, 0" (step S6207). The HL register of the master CPU 63 is cleared to "0" by a load command as "LD HL, 0" (step S6208). The IX register of the master CPU 63 is cleared to "0" by a load command as "LD IX, 0" (step S6209). The IY register of the master CPU 63 is cleared to "0" by a load command as "LD IY, 0" (step S6210).

In addition to the flag register, the main CPU 63 also has various general-purpose registers, auxiliary registers, and index registers. In this case, in steps S6205 to S6210, the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these general-purpose registers, auxiliary registers, and index registers, are cleared to "0". The WA register, BC register, DE register, HL register, IX register, and IY register are used in the management execution process (step S6212), which is a process corresponding to non-specific control. By clearing such registers to "0" prior to the execution of the management execution process (step S6212), which is a process corresponding to non-specific control, it is possible to set the state of these registers to the state immediately after the supply of operating power to the main CPU 63 is started, before the process corresponding to non-specific control is started.

In addition, the information in the WA register, BC register, DE register, HL register, IX register, and IY register before the processing corresponding to the non-specific control is started is unnecessary for the processing corresponding to the specific control after the processing corresponding to the non-specific control is completed. Therefore, even if the information in these registers is cleared to "0" without being saved, no problems will occur in the processing corresponding to the specific control that is restored after the processing corresponding to the non-specific control is completed.

Then, as "POP PSW", information is read from the previous memory area in the write order for the memory area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by a pop command, and the read information is overwritten in the flag register of the main CPU 63 (step S6211). The information of the stack pointer of the main CPU 63 immediately before the pop command of step S6211 is information corresponding to the memory area in the next write order for the memory area in the stack area 222 for specific control cleared to "0" in step S6203. Therefore, the memory area in the previous write order for the memory area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control becomes the memory area cleared to "0" in step S6203. Then, by overwriting the information read from this memory area in the flag register of the main CPU 63, the flag register becomes cleared to "0". In addition, each storage area in the stack area 222 for specific control has an information volume of 8 bits (1 byte), and the flag register of the main CPU 63 also has an information volume of 8 bits (1 byte). By clearing the flag register to "0" prior to execution of the management execution process (step S6212), which is a process corresponding to non-specific control, it is possible to set the state of the flag register to the state immediately after the supply of operating power to the main CPU 63 is started, before the process corresponding to non-specific control is started.

Then, the management execution process is started by reading out a subroutine program corresponding to the management execution process set in the program for non-specific control (step S6212). In this case, information for specifying the return address of the management process after the management execution process is executed is written into the stack area 222 for specific control by a push command. Then, when the management execution process is completed, information for specifying the return address is read out by a pop command, and the process returns to the program for the management process indicated by the return address.

Note that the processing contents of the management execution process are the same as the management execution process (FIG. 82) in the 20th embodiment. Therefore, after the check process is completed in the management execution process, the WA register, BC register, DE register, HL register, IX register, and IY register are cleared to "0". As a result, these registers will be cleared to "0" before returning from processing corresponding to non-specific control to processing corresponding to specific control, and the state of these registers will be cleared before returning to processing corresponding to specific control. It is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

When returning to the program for management processing after execution of the management execution processing, processing for clearing the flag register of the main CPU 63 to "0" is executed. Specifically, first, the information in the HL register of the main CPU 63 is saved to the stack area 222 for specific control using a push command as "PUSH HL" (step S6213). After execution of the push instruction, the information of the stack pointer of the main CPU 63 is changed to the information corresponding to the storage area of the next write order in the storage area where the information of the HL register was saved in the stack area 222 for specific control. Become.

Then, the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by the load command "LD HL, SP" (step S6214). In this case, since the amount of information of the stack pointer is 16 bits and the amount of information of each of the H register and L register is 8 bits, the consecutive 8 bits of information from the upper side of the stack pointer are overwritten in the H register, and the consecutive 8 bits of information from the lower side of the stack pointer are overwritten in the L register.

Then, a load command is issued to clear to "0" a 1-byte storage area corresponding to the stack pointer information stored in the HL register of the master CPU 63 in the stack area 222 for specific control as "LD (HL), 0" (step S6215). Note that the HL register of the master CPU 63 has been overwritten with the stack pointer information of the master CPU 63 in step S6214, and the stack pointer information of the master CPU 63 has not been updated by the time the processing of step S6215 is executed. Therefore, in step S6215, a 1-byte storage area corresponding to the stack pointer information of the master CPU 63 in the stack area 222 for specific control is cleared to "0".

Thereafter, as "LD SP, SP-1", the information of the stack pointer of the main CPU 63 is updated to the address information of the storage area to be written in the next order in the stack area 222 for specific control by a load instruction. (Step S6216). When using the stack area 222 for specific control, information to be stored is stored from the storage area of the last address in the stack area 222 for specific control, and each time information to be stored is added, information for specific control is stored. The storage area of the storage destination is changed toward the first address side in the stack area 222 of . Therefore, in step S6216, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area with the smaller address by one in the stack area 222 for specific control. By executing the process in step S6216, the storage area in the next order with respect to the storage area cleared to "0" in step S6215 is set as the storage target of information by the next push command, and in addition, in step S6215 The storage area cleared to "0" is set as the information read target by the next pop command.

Thereafter, as "POP PSW", information is read from the storage area in the previous writing order with respect to the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by a pop instruction, The read information is overwritten in the flag register of the main CPU 63 (step S6217). The information on the stack pointer of the main CPU 63 immediately before the pop instruction in step S6217 is executed is the storage area in the next writing order with respect to the storage area in the specific control stack area 222 cleared to "0" in step S6215. The information corresponds to Therefore, in the stack area 222 for specific control, the storage area in the writing order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 is the memory area for specific control cleared to "0" in step S6215. This is a storage area in the stack area 222. Then, by overwriting the flag register of the main CPU 63 with the information read from this storage area, the flag register is cleared to "0". Note that one storage area in the stack area 222 for specific control has an information amount of 8 bits (1 byte), and the flag register of the main CPU 63 also has an information amount of 8 bits (1 byte). . By clearing the flag register to "0" after executing the management execution process (step S6212), which is the process corresponding to non-specific control, the state of the flag register is changed to "0" by the main CPU 63 after the process corresponding to non-specific control is completed. It is possible to set the state immediately after the supply of operating power to has started. Furthermore, when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area whose write order in the stack area 222 for specific control is one previous.

After that, the information of the HL register saved in the stack area 222 for specific control in step S6213 is restored to the HL register of the main CPU 63 by the pop command "POP HL" (step S6218). Note that since the HL register is cleared to "0" immediately before the management execution process (step S6212) ends, the information cleared to "0" is saved in the stack area 222 for specific control in step S6213, and the information cleared to "0" is restored to the HL register of the main CPU 63 in step S6218, so that the HL register of the main CPU 63 is cleared to "0". Also, when the pop command is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the memory area two memory areas back in the writing order in the stack area 222 for specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S6219). This enables new execution of timer interrupt processing.

The above configuration can achieve the following effects in addition to those described in the 20th embodiment.

When processing corresponding to non-specific control is started from a situation where processing corresponding to specific control is being executed, the flag register of the main CPU 63 is cleared to "0". This eliminates the need to save the information in the flag register used in the processing corresponding to specific control in the situation where processing corresponding to non-specific control is being executed in the main RAM 65. Therefore, there is no need to secure capacity for saving the information.

The flag register of the main CPU 63 is also cleared to "0" when returning to processing corresponding to specific control from a situation in which processing corresponding to non-specific control is being executed. This makes it possible to return the state of the flag register to the state it was in immediately before processing corresponding to non-specific control was started when returning to processing corresponding to specific control.

The state where the flag register is cleared to "0" is the state when the supply of operating power to the main CPU 63 is started. This makes it possible to simplify the processing configuration for setting the flag register to a predetermined state when starting processing corresponding to non-specific control and when returning to processing corresponding to specific control.

The information in the flag register of the main CPU 63 before the process corresponding to non-specific control is started is information that is not used in the process corresponding to specific control after the process corresponding to non-specific control is finished. As a result, even if the flag register is cleared to "0" when the process corresponding to non-specific control is started, the process corresponding to specific control after the process corresponding to non-specific control is completed. It is possible to avoid any influence.

A predetermined storage area of the stack area 222 for specific control is cleared to "0", and the flag register is cleared to "0" by overwriting the information in the cleared storage area to "0" using a pop instruction. It is the composition. This makes it possible to clear the flag register to "0" even in a configuration where it is prohibited to directly clear the flag register to "0" by a load instruction.

Note that instead of the configuration in which the flag register is cleared to "0", a configuration in which the flag register is initialized may be used. In other words, when the supply of operating power to the main CPU 63 is started, the flag register of the main CPU 63 is once cleared to "0" and then information is set so that it is in the initial state. In S6204 and S6211, the flag register may be set to be in this initial state. In this case, by configuring the flag register to be set to the above-mentioned initial state in steps S6213 to S6218, the state of the flag register can be changed to non-specific control when returning to the process corresponding to specific control. It becomes possible to return to the state immediately before the processing corresponding to the start.

Furthermore, instead of clearing the flag register of the main CPU 63 to "0" in steps S6202 to S6204 and step S6211, a structure may be adopted in which all flag registers are set to "1". In this case, all flag registers are set to "1" in steps S6213 to S6218, and when returning to the process corresponding to specific control, the state of the flag register is changed to start the process corresponding to non-specific control. It is possible to return to the state immediately before the change.

In addition, instead of the processing of steps S6202 to S6204 and step S6211, the flag register of the main CPU 63 may be directly cleared to "0" by a load command as "LD PSW, 0".In addition, instead of the processing of steps S6213 to S6218, the flag register of the main CPU 63 may be directly cleared to "0" by a load command as "LD PSW, 0".

Further, instead of the configuration in which the processes of steps S6213 and S6218 are executed, a configuration may be adopted in which the HL register is cleared to "0" by a load instruction as "LD HL,0". Even in this case, it is possible to restore the state of the HL register to the state immediately before the management execution process, which is a process corresponding to non-specific control, was executed.

In addition, instead of a configuration in which the process of clearing the flag register to "0" is executed by a process corresponding to specific control, a configuration in which the process is executed by a process corresponding to non-specific control may be adopted.

<27th embodiment>
This embodiment is different from the above-mentioned 20th embodiment in the processing configuration of management processing. Hereinafter, the configuration that is different from the above-mentioned 20th embodiment will be explained. Note that descriptions of the same configurations as those of the 20th embodiment will be basically omitted.

FIG. 97 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S6301 to step S6323 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S6301). This makes it possible to prevent the timer interrupt processing (FIG. 69), which is processing corresponding to specific control, from interrupting and being started in the middle of the management execution processing (described later), which is processing corresponding to non-specific control.

After that, the push command "PUSH AF" is used to save the information in the A register and the flag register of the master CPU 63 to the memory area in the stack area 222 for specific control that corresponds to the current stack pointer information of the master CPU 63 and to the memory area in the next write order for that memory area (step S6302). Since the A register and flag register of the master CPU 63 each have an information volume of 8 bits (1 byte), the information in the A register and the information in the flag register are saved separately to two memory areas with consecutive addresses. Note that when the push command is executed, the information in the stack pointer of the master CPU 63 is updated to information corresponding to the memory area two places later in the write order in the stack area 222 for specific control.

After that, the A register information and flag register information saved in the stack area 222 for specific control in step S6302 are overwritten in the HL register of the master CPU 63 by the pop command "POP HL" (step S6303). In this case, the A register information saved in the stack area 222 for specific control is overwritten in the H register of the master CPU 63, and the flag register information saved in the stack area 222 for specific control is overwritten in the L register of the master CPU 63. The H register and L register of the master CPU 63 each have an information volume of 8 bits (1 byte). When the pop command is executed, the stack pointer information of the master CPU 63 is updated to information corresponding to the memory area two memory areas back in the writing order in the stack area 222 for specific control.

Thereafter, the A register of the main CPU 63 is cleared to "0" by a load instruction as "LD A,0" (step S6304). Then, as "LD L, A", the information in the A register of the main side CPU 63 is overwritten in the L register of the main side CPU 63 by a load instruction (step S6305), and as "LD H, A", by the load instruction, The information in the A register of the main CPU 63 is overwritten in the H register of the main CPU 63 (step S6306). Since the A register was cleared to "0" in step S6304, by overwriting the information in the A register to each of the L and H registers, each of the L and H registers is cleared to "0". becomes.

After that, as "PUSH HL", the information in the HL register (i.e., H register and L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push command. The data is saved in each of the storage areas and the storage areas in the next writing order for the storage area (step S6307). Since the H register and L register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information in the H register and the information in the L register are separately stored for two storage areas with consecutive addresses. will be evacuated. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Then, the BC register of the primary CPU 63 is cleared to "0" by a load command as "LD BC, 0" (step S6308). The DE register of the primary CPU 63 is cleared to "0" by a load command as "LD DE, 0" (step S6309). The IX register of the primary CPU 63 is cleared to "0" by a load command as "LD IX, 0" (step S6310). The IY register of the primary CPU 63 is cleared to "0" by a load command as "LD IY, 0" (step S6311).

In addition to the flag register, the registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers. In this case, in steps S6308 to S6311, the BC register, DE register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, are cleared to "0". Furthermore, the HL register is cleared to "0" in steps S6305 and S6306. These BC register, DE register, HL register, IX register, and IY register are registers used in management execution processing (step S6313), which is processing corresponding to non-specific control. By clearing such registers to "0" prior to execution of the management execution process (step S6313), which is the process corresponding to non-specific control, the state of these registers can be changed before the process corresponding to non-specific control is started. In addition, it is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

In addition, each information of the BC register, DE register, HL register, IX register, and IY register before the process corresponding to non-specific control is started is used for specific control after the process corresponding to the non-specific control is finished. This information is unnecessary in the corresponding process. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem will occur in the process corresponding to the specific control that is returned after the process corresponding to the non-specific control is completed.

Thereafter, as "POP AF", the information in the H register and the information in the L register, which were saved in the stack area 222 for specific control in step S6307, are overwritten in the A register and flag register of the main CPU 63 by a pop instruction ( Step S6312). In this case, the information in the H register saved in the stack area 222 for specific control is overwritten in the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control is used as the flag of the main CPU 63. The register will be overwritten. Since the information in the H register and the information in the L register saved in the stack area 222 for specific control are all "0" information, the A register of the main CPU 63 is At the same time, the flag register of the main CPU 63 is cleared to "0". This makes it possible to set the state of the flag register to the state immediately after the supply of operating power to the main CPU 63 is started, before the process corresponding to non-specific control is started. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the non-specific control program, the management execution process is started (step S6313). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

Note that after the check process is completed in the management execution process, the BC register, DE register, HL register, IX register, and IY register are cleared to "0". As a result, these registers will be cleared to "0" before returning from processing corresponding to non-specific control to processing corresponding to specific control, and the state of these registers will be cleared before returning to processing corresponding to specific control. It is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

When returning to the management processing program after the management execution process is executed, a process is executed to clear the flag register of the main CPU 63 to "0". In detail, first, a push command "PUSH HL" is issued to save the information in the HL register of the main CPU 63 to the stack area 222 for specific control (step S6314). After the push command is executed, the information in the stack pointer of the main CPU 63 becomes information corresponding to the next memory area in the write order relative to the memory area in which the information in the HL register was saved in the stack area 222 for specific control.

Thereafter, as "PUSH AF", a push instruction is used to store the information in the A register and the information in the flag register of the main CPU 63 in the stack area 222 for specific control, which corresponds to the current stack pointer information of the main CPU 63. The storage area and the storage area are saved to each storage area in the next writing order (step S6315). Since the A register and flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information in the A register and the information in the flag register are separately stored for two storage areas with consecutive addresses. Evacuated. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

After that, the A register information and flag register information saved in the stack area 222 for specific control in step S6315 are overwritten in the HL register of the master CPU 63 by the pop command "POP HL" (step S6316). In this case, the A register information saved in the stack area 222 for specific control is overwritten in the H register of the master CPU 63, and the flag register information saved in the stack area 222 for specific control is overwritten in the L register of the master CPU 63. The H register and L register of the master CPU 63 each have an information volume of 8 bits (1 byte). When the pop command is executed, the stack pointer information of the master CPU 63 is updated to information corresponding to the memory area two memory areas back in the writing order in the stack area 222 for specific control.

After that, the A register of the master CPU 63 is cleared to "0" by a load command as "LD A,0" (step S6317). Then, the information in the A register of the master CPU 63 is overwritten in the L register of the master CPU 63 by a load command as "LD L,A" (step S6318), and the information in the A register of the master CPU 63 is overwritten in the H register of the master CPU 63 by a load command as "LD H,A" (step S6319). Because the A register was cleared to "0" in step S6317, the information in the A register is overwritten in each of the L register and H register, and the L register and H register are each cleared to "0".

After that, the push command "PUSH HL" is used to save the information in the HL register (i.e., the H register and L register) of the master CPU 63 to the memory area in the stack area 222 for specific control that corresponds to the current stack pointer information of the master CPU 63 and to the memory area in the next write order for that memory area (step S6320). Since the H register and L register of the master CPU 63 each have an information volume of 8 bits (1 byte), the information in the H register and the information in the L register are saved separately to two memory areas with consecutive addresses. Note that when the push command is executed, the information in the stack pointer of the master CPU 63 is updated to information corresponding to the memory area two places later in the write order in the stack area 222 for specific control.

Then, as a "POP AF", the H register information and L register information saved in the stack area 222 for specific control in step S6320 are overwritten in the A register and flag register of the master CPU 63 by a pop command (step S6321). In this case, the H register information saved in the stack area 222 for specific control is overwritten in the A register of the master CPU 63, and the L register information saved in the stack area 222 for specific control is overwritten in the flag register of the master CPU 63. Since the H register information and L register information saved in the stack area 222 for specific control are all "0" information, the A register of the master CPU 63 is cleared to "0" by the processing of step S6321, and the flag register of the master CPU 63 is cleared to "0". By clearing the flag register to "0" after the management execution process (step S6313), which is a process corresponding to non-specific control, is executed, the state of the flag register can be set to the state immediately after the supply of operating power to the main CPU 63 is started after the process corresponding to non-specific control is completed. When the above pop command is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the memory area two places back in the writing order in the stack area 222 for specific control.

Thereafter, the information in the HL register saved in the stack area 222 for specific control in step S6314 is returned to the HL register of the main CPU 63 by a pop instruction as "POP HL" (step S6322). Note that since the HL register is cleared to "0" immediately before the end of the management execution process (step S6313), the information cleared to "0" is saved in the stack area 222 for specific control in step S6314. At the same time, in step S6322, the information cleared to "0" is returned to the HL register of the main CPU 63, resulting in the HL register of the main CPU 63 being cleared to "0". Furthermore, when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Then, the interrupt permission is set to switch from a state in which the occurrence of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S6323). This allows a new execution of the timer interrupt processing.

According to the above configuration, it is possible to clear the flag register of the main CPU 63 to "0" without executing the process of clearing a specific memory area in the stack area 222 for specific control to "0" by a load command. This makes it possible to clear the flag register of the main CPU 63 to "0" even in a configuration in which clearing a specific memory area in the stack area 222 for specific control to "0" by a load command is restricted.

Note that instead of the configuration in which the flag register is cleared to "0", a configuration in which the flag register is initialized may be used. In other words, when the supply of operating power to the main CPU 63 is started, the flag register of the main CPU 63 is once cleared to "0" and then information is set so that it is in the initial state. In S6307 and S6312, the flag register may be set so as to be in this initial state. In this case, by configuring the flag register to be set to the above-mentioned initial state in steps S6314 to S6322, the state of the flag register can be changed to non-specific control when returning to the process corresponding to specific control. It becomes possible to return to the state immediately before the processing corresponding to the start.

In addition, instead of clearing the flag register of the main CPU 63 to "0" in steps S6302 to S6307 and step S6312, all of the flag registers may be set to "1". In this case, by also setting all of the flag registers to "1" in steps S6314 to S6322, when returning to processing corresponding to specific control, it is possible to restore the state of the flag register to the state it was in immediately before processing corresponding to non-specific control was started.

Alternatively, a configuration may be adopted in which the processes in steps S6302 and S6303 are not executed. In this case, it becomes possible to simplify the processing configuration.

The processing of steps S6315 and S6316 may also be omitted. In this case, it is possible to simplify the processing configuration.

Instead of executing the processes of steps S6302 to S6306, a configuration may be used in which the HL register is cleared to "0" by a load command as "LD HL, 0", the HL register that has been cleared to "0" is then saved to the stack area 222 for specific control by a push command, and the saved information is then restored to the AF register by a pop command, thereby clearing the flag register of the main CPU 63 to "0".

Further, instead of the configuration in which the process of clearing the flag register to "0" is executed in the process corresponding to specific control, a configuration may be adopted in which the process to clear the flag register to "0" is executed in the process corresponding to non-specific control.

<Twenty-eighth embodiment>
In this embodiment, the processing configuration of the management process is different from that of the fifteenth embodiment. The following describes the configuration that is different from the fifteenth embodiment. Note that the description of the same configuration as the fifteenth embodiment will basically be omitted.

FIG. 98 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S6401 to step S6416 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S6401). This makes it possible to prevent the timer interrupt processing (FIG. 69), which is processing corresponding to specific control, from interrupting and being started in the middle of the management execution processing (described later), which is processing corresponding to non-specific control.

After that, as "PUSH WA", the information in the WA register (i.e., W register and A register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push command. The data is saved in each of the storage areas and the storage areas in the next writing order for the storage area (step S6402). Since the W register and A register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information in the W register and A register is saved individually to two storage areas with consecutive addresses. Ru. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

After that, the information in the flag register of the master CPU 63 is overwritten in the A register of the master CPU 63 by a load command as "LD A, PSW" (step S6403). In this case, the amount of information in both the flag register and the A register is 8 bits (1 byte). Then, the information in the A register of the master CPU 63 is saved in the FG buffer set in the work area 221 for specific control by a load command as "LD (_FGBUF), A" (step S6404). Since the A register has been overwritten with the information in the flag register in step S6403, the execution of step S6404 results in the information in the flag register being saved in the work area 221 for specific control.

After that, the information of the WA register saved in the stack area 222 for specific control in step S6402 is restored to the WA register of the main CPU 63 by a pop command as "POP WA" (step S6405). As a result, even if the A register is used to save the information of the flag register to the work area 221 for specific control, it is possible to restore the state of the A register to the state before the save. Note that when the pop command is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the memory area two places back in the writing order in the stack area 222 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the non-specific control program, the management execution process is started (step S6406). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

The processing contents of the management execution process are the same as those of the management execution process (FIG. 71) in the fifteenth embodiment. Therefore, before the check process is started in the management execution process, the information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 is saved to the non-specific control work area 223, and after the check process is completed in the management execution process, the information saved to the non-specific control work area 223 is restored to the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63. This makes it possible to make the states of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 the same before and after the check process.

However, this is not limited to the above, and the processing contents of the management execution process may be the same as the management execution process in the 17th embodiment (Figure 78), the same as the management execution process in the 18th embodiment (Figure 79), or the same as the management execution process in the 19th embodiment (Figure 80).

When returning to the management processing program after execution of the management execution processing, processing is executed to return the information in the flag register of the main CPU 63 to the state before the management execution processing was executed. In detail, first, the information in the HL register of the main CPU 63 is saved to the stack area 222 for specific control by a push command as "PUSH HL" (step S6407). After execution of the push instruction, the information of the stack pointer of the main CPU 63 is changed to the information corresponding to the storage area of the next write order in the storage area where the information of the HL register has been saved in the stack area 222 for specific control. Become.

Thereafter, the information in the WA register of the main CPU 63 is saved to the specific control stack area 222 by a push command as "PUSH WA" (step S6408). After execution of the push instruction, the information of the stack pointer of the main CPU 63 is changed to the information corresponding to the storage area of the next write order in the storage area where the information of the WA register has been saved in the stack area 222 for specific control. Become.

Thereafter, the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by a load instruction as "LD HL, SP" (step S6409). In this case, the amount of information in the stack pointer is 16 bits, and the amount of information in each of the H register and L register is 8 bits, so 8 bits of information consecutive from the upper side of the stack pointer are stored in the H register. The L register is overwritten with consecutive 8-bit information from the lower side of the stack pointer.

Thereafter, as "LD A, (_FGBUF)", the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6406 is overwritten in the A register of the main CPU 63 by a load instruction (step S6410). Then, as "LD (HL), A", a 1-byte storage area corresponding to the stack pointer information stored in the HL register of the main CPU 63 in the stack area 222 for specific control is stored on the main side by a load instruction. The information in the A register of the CPU 63 is stored (step S6411). As a result, the information in the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 is saved in the stack area 222 for specific control.

After that, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written next in the stack area 222 for specific control by the load command as "LD SP, SP-1" (step S6412). When the stack area 222 for specific control is used, the information to be stored is stored from the storage area of the last address in the stack area 222 for specific control, and the storage destination storage area is changed toward the first address side in the stack area 222 for specific control each time information to be stored is added. Therefore, in step S6412, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area with one address smaller in the stack area 222 for specific control. By executing the process of step S6412, the next storage area is set as the storage target of information by the next push command with respect to the storage area where the information of the A register was saved in step S6411, and the storage area where the information of the A register was saved in step S6411 is set as the target for reading information by the next pop command.

Then, as "POP PSW", information is read from the previous memory area in the write order for the memory area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by the pop command, and the read information is overwritten in the flag register of the main CPU 63 (step S6413). The information of the stack pointer of the main CPU 63 immediately before the pop command of step S6413 is information corresponding to the memory area in the next write order for the memory area in which the information of the A register was saved in step S6411. Therefore, the memory area in the previous write order for the memory area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is the memory area in which the information of the A register was saved in step S6411. Then, by overwriting the information read from this memory area in the flag register of the main CPU 63, the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 is restored to the flag register of the main CPU 63. When the pop command is executed, the information in the stack pointer of the main CPU 63 is updated to information corresponding to the previous memory area in the specific control stack area 222.

After that, the information of the WA register saved in the stack area 222 for specific control in step S6408 is restored to the WA register of the main CPU 63 by a pop command as "POP WA" (step S6414). When the pop command is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the memory area two places back in the write order in the stack area 222 for specific control. Also, the information of the HL register saved in the stack area 222 for specific control in step S6407 is restored to the HL register of the main CPU 63 by a pop command as "POP HL" (step S6415). When the pop command is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the memory area two places back in the write order in the stack area 222 for specific control.

Then, the interrupt permission is set to switch from a state in which the occurrence of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S6416). This allows a new execution of the timer interrupt processing.

According to the above configuration, when processing corresponding to non-specific control is started from a situation where processing corresponding to specific control is being executed, information in the flag register of the main CPU 63 is stored in the stack area 222 for specific control instead of in the stack area 222 for specific control. It becomes possible to save it to the work area 221 for specific control. When the process corresponding to the specific control is returned from the situation where the process corresponding to the non-specific control is being executed, the information in the flag register saved in the work area 221 for specific control is used as the flag of the main CPU 63. Returned to register. As a result, information can be restored from the storage area of the work area 221 for specific control designated on the program to the flag register of the main CPU 63 without referring to the information of the stack pointer of the main CPU 63. Even if the information in the stack pointer of the side CPU 63 is rewritten due to noise or the like, it is possible to restore the information to the flag register of the main side CPU 63.

Further, instead of the configuration in which the process of saving the information in the flag register to the main side RAM 65 is executed in the process corresponding to specific control, a configuration may be adopted in which the process is executed in the process corresponding to non-specific control. Also, instead of the configuration in which the process of restoring the information in the flag register saved in the main side RAM 65 to the flag register of the main side CPU 63 is executed in the process corresponding to specific control, it is executed in the process corresponding to non-specific control. It may also be configured to be executed.

<Twenty-ninth embodiment>
In this embodiment, the processing configuration of the management process is different from that of the fifteenth embodiment. The following describes the configuration that is different from the fifteenth embodiment. Note that the description of the same configuration as the fifteenth embodiment will basically be omitted.

Figure 99 is a flowchart showing the management process in this embodiment executed by the main CPU 63. Note that the processes in steps S6501 to S6519 in the management process are executed by the main CPU 63 using a program for specific control and data for specific control.

First, to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S6501). This makes it possible to prevent the timer interrupt processing (FIG. 69), which is processing corresponding to specific control, from interrupting and being started in the middle of the management execution processing (described below), which is processing corresponding to non-specific control.

After that, the information in the HL register (i.e., the H register and L register) of the main CPU 63 is saved by a push command "PUSH HL" to the memory area in the stack area 222 for specific control corresponding to the current stack pointer information of the main CPU 63 and to the memory area in the next write order for that memory area (step S6502). Since the H register and L register of the main CPU 63 each have an information volume of 8 bits (1 byte), the information in the H register and L register is saved separately to two memory areas with consecutive addresses. Note that when the above push command is executed, the information in the stack pointer of the main CPU 63 is updated to information corresponding to the memory area two places later in the write order in the stack area 222 for specific control.

After that, the push command "PUSH AF" is used to save the information in the A register and the flag register of the master CPU 63 to the memory area in the stack area 222 for specific control that corresponds to the current stack pointer information of the master CPU 63 and to the memory area in the next write order for that memory area (step S6503). Since the A register and flag register of the master CPU 63 each have an information volume of 8 bits (1 byte), the information in the A register and the information in the flag register are saved separately to two memory areas with consecutive addresses. Note that when the push command is executed, the information in the stack pointer of the master CPU 63 is updated to information corresponding to the memory area two places later in the write order in the stack area 222 for specific control.

Thereafter, as "POP HL", the HL register of the main CPU 63 is overwritten with the information of the A register and the information of the flag register, which were saved in the stack area 222 for specific control in step S6503, by a pop instruction (step S6504). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is overwritten in the L register of the main CPU 63. The register will be overwritten. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, the information in the L register of the master CPU 63 is overwritten in the A register of the master CPU 63 by a load command as "LD A, L" (step S6505). Since the information in the flag register of the master CPU 63 has been overwritten in the L register in step S6504, the information in the L register is overwritten in the A register, and the information in the flag register is overwritten in the A register. Then, the information in the A register of the master CPU 63 is saved in the FG buffer set in the work area 221 for specific control by a load command as "LD (_FGBUF), A" (step S6506). Since the information in the flag register has been overwritten in the A register in step S6505, the information in the flag register is saved in the work area 221 for specific control by executing step S6506.

After that, the push command "PUSH HL" is used to save the information in the HL register (i.e., the H register and L register) of the master CPU 63 to the memory area in the stack area 222 for specific control that corresponds to the current stack pointer information of the master CPU 63 and to the memory area in the next write order for that memory area (step S6507). In this case, since the A register information and flag register information have been overwritten in the HL register in step S6504, in step S6507 the A register information and flag register information are saved in the stack area 222 for specific control. When the push command is executed, the stack pointer information of the master CPU 63 is updated to information corresponding to the memory area two places later in the write order in the stack area 222 for specific control.

Then, as "POP AF", the H register information and L register information saved in the stack area 222 for specific control in step S6507 are overwritten in the A register and flag register of the master CPU 63 by a pop command (step S6508). In this case, the H register information saved in the stack area 222 for specific control is overwritten in the A register of the master CPU 63, and the L register information saved in the stack area 222 for specific control is overwritten in the flag register of the master CPU 63. The H register information saved in the stack area 222 for specific control is the A register information at the time of step S6503, and the L register information saved in the stack area 222 for specific control is the flag register information at the time of step S6503. Therefore, by executing the process of step S6508, the state of the A register and flag register of the master CPU 63 is restored to the state at the time of step S6503. When the above pop command is executed, the information in the stack pointer of the main CPU 63 is updated to information corresponding to the memory area two places back in the writing order in the specific control stack area 222.

Thereafter, as "POP HL", the information in the HL register saved in the stack area 222 for specific control in step S6502 is returned to the HL register of the main CPU 63 by a pop instruction (step S6509). As a result, the state of the HL register of the main CPU 63 returns to the state at step S6502. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the non-specific control program, the management execution process is started (step S6510). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management process indicated by the return address.

In addition, in the management execution process, before the check process is started, the information in the BC register, DE register, HL register, IX register, and IY register of the main CPU 63 is saved to the work area 223 for non-specific control, and after the check process is completed in the management execution process, the information saved in the work area 223 for non-specific control is restored to the BC register, DE register, HL register, IX register, and IY register of the main CPU 63. This makes it possible to keep the states of the BC register, DE register, HL register, IX register, and IY register of the main CPU 63 the same before and after the check process.

However, the present invention is not limited to this, and the processing content of the management execution process may be the same as the management execution process (FIG. 78) in the seventeenth embodiment, and may be the same as the management execution process in the eighteenth embodiment. (FIG. 79), or may be the same configuration as the management execution process (FIG. 80) in the nineteenth embodiment.

When returning to the program for management processing after execution of the management execution processing, processing is executed to return the information in the flag register of the main CPU 63 to the state before the management execution processing was executed. In detail, first, information in the HL register of the main CPU 63 is saved to the stack area 222 for specific control by a push command as "PUSH HL" (step S6511). After execution of the push instruction, the information of the stack pointer of the main CPU 63 is changed to the information corresponding to the storage area of the next write order in the storage area where the information of the HL register was saved in the stack area 222 for specific control. Become.

After that, the push command "PUSH AF" is used to save the information in the A register and the flag register of the master CPU 63 to the memory area in the stack area 222 for specific control that corresponds to the current stack pointer information of the master CPU 63 and to the memory area in the next write order for that memory area (step S6512). Since the A register and flag register of the master CPU 63 each have an information volume of 8 bits (1 byte), the information in the A register and the information in the flag register are saved separately to two memory areas with consecutive addresses. When the push command is executed, the information in the stack pointer of the master CPU 63 is updated to information corresponding to the memory area two places later in the write order in the stack area 222 for specific control.

Thereafter, as "POP HL", the HL register of the main CPU 63 is overwritten with the information of the A register and the information of the flag register, which were saved in the stack area 222 for specific control in step S6512, by a pop instruction (step S6513). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is overwritten in the L register of the main CPU 63. The register will be overwritten. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, the information in the flag register at the time of step S6503, which was saved in step S6506 to the FG buffer in the work area 221 for specific control, is overwritten in the A register of the master CPU 63 by a load command as "LD A, (_FGBUF)" (step S6514). Then, the information in the A register of the master CPU 63 is overwritten in the L register of the master CPU 63 by a load command as "LD L, A" (step S6515). Since the information in the flag register of the master CPU 63 at the time of step S6503 has been restored to the A register in step S6514, overwriting the information in the A register in the L register results in the L register being overwritten with the information in the flag register at the time of step S6503.

After that, as "PUSH HL", the information in the HL register (i.e., H register and L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in each of the storage areas and the storage areas in the next writing order for the storage area (step S6516). In this case, since the information in the A register at the time of step S6512 is overwritten in the H register in step S6513, the information in the A register is saved in the stack area 222 for specific control in step S6516. Become. Furthermore, since the information in the flag register at the time of step S6503 is overwritten in the L register in step S6515, the information in the flag register is saved in the stack area 222 for specific control in step S6516.

Thereafter, as "POP AF", the information in the H register and the information in the L register, which were saved in the stack area 222 for specific control in step S6516, are overwritten in the A register and flag register of the main CPU 63 by a pop instruction ( Step S6517). In this case, the information in the H register saved in the stack area 222 for specific control is overwritten in the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control is used as the flag of the main CPU 63. The register will be overwritten. The information in the H register saved in the stack area 222 for specific control is the information in the A register at the time of step S6512, and the information in the L register saved in the stack area 222 for specific control is the flag at the time in step S6503. This is register information. Therefore, by executing the process in step S6517, the state of the A register of the main CPU 63 returns to the state in step S6512, and the state of the flag register returns to the state at step S6503.

Incidentally, the A register of the main CPU 63 is not used in the management execution process. Therefore, the state of the A register at the time of step S6512 is the state of the A register at the time of step S6508, and the state of the A register at the time of step S6508 is the state of the A register at the time of step S6503. Therefore, by executing the process of step S6517, the states of the A register and flag register of the main CPU 63 are returned to the states at the time of step S6503. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, the HL register information saved in the specific control stack area 222 in step S6511 is restored to the HL register of the main CPU 63 by a pop command as "POP HL" (step S6518). This causes the state of the HL register of the main CPU 63 to return to the state at the time of step S6511. When the pop command is executed, the stack pointer information of the main CPU 63 is updated to information corresponding to the memory area two places back in the writing order in the specific control stack area 222.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S6519). This enables new execution of timer interrupt processing.

According to the above configuration, information in the flag register of the main CPU 63 can be stored without directly overwriting the information of the flag register from the flag register of the main CPU 63 onto other registers of the main CPU 63 by the load instruction. can be saved to the work area 221 for specific control.

Note that the information in the flag register is overwritten by the load instruction as "LD (_FGBUF), L" after executing the process in step S6504 instead of executing the processes in steps S6505 to S6508. By saving the information in the L register to the FG buffer, the information in the flag register may be saved in the work area 221 for specific control.

In addition, instead of executing the processes of steps S6514 and S6515, the process of step S6513 may be executed, and then the information of the flag register saved in the work area 221 for specific control may be overwritten in the L register by a load command as "LD L, (_FGBUF)".

In addition, instead of a configuration in which the process of saving the flag register information to the main RAM 65 is executed by a process corresponding to a specific control, it may be configured to be executed by a process corresponding to a non-specific control.In addition, instead of a configuration in which the process of restoring the flag register information saved to the main RAM 65 to the flag register of the main CPU 63 is executed by a process corresponding to a specific control, it may be configured to be executed by a process corresponding to a non-specific control.

Thirtieth embodiment
In this embodiment, the processing configuration executed by the main CPU 63 is different from that of the fifteenth embodiment. The configuration that differs from the fifteenth embodiment will be described below. Note that the description of the same configuration as the fifteenth embodiment will basically be omitted.

Figure 100 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing of steps S6601 to S6621 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

First, the power-on wait process is executed (step S6601). In this power-on wait process, for example, the main process is started and a predetermined wait time (specifically, one second) elapses before proceeding to the next process. During the execution period of this power-on wait process, the operation start and initial settings of the pattern display device 41 are completed. After that, access to the main RAM 65 is permitted (step S6602).

Thereafter, it is determined whether the power outage flag provided in the work area 221 for specific control in the main side RAM 65 is set to "1" (step S6603). If the power outage flag is set to "1" (step S6603: YES), a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step S6604).

The checksum can be calculated by any method, but one example is to add up all the numerical values in the memory area that is the target of the checksum calculation. This checksum calculation method is the same as the checksum calculation method used in the power outage processing described below. The checksum calculated in the power outage processing described below is stored in the work area 221 for specific control, but the memory area of the work area 221 for specific control in which this checksum is stored is excluded from the memory areas that are the target of the calculation when the checksum is calculated.

In other words, when the checksum is calculated, some of the storage areas in the work area 221 for specific control and the stack area 222 for specific control are used as the objects of calculation. The storage areas used as the objects of calculation are basically not rewritten with information when the supply of backup power to the work area 221 for specific control and the stack area 222 for specific control is continued from the time the checksum is calculated in the power failure processing when the supply of operating power to the MPU 62 is stopped until the supply of operating power to the MPU 62 is resumed and the processing of step S6604 is executed. Therefore, if the information in the work area 221 for specific control and the stack area 222 for specific control has not been changed between the time the supply of operating power to the MPU 62 is stopped and the time the supply of operating power to the MPU 62 is resumed, the checksum for the work area 221 for specific control and the stack area 222 for specific control is the same as that immediately before the supply of operating power to the MPU 62 is stopped. The storage area that is the subject of calculations when calculating this checksum includes an area (specifically, a setting value counter) in which setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control.

After that, the work area 221 for specific control and the stack area for specific control that were calculated in the power outage process executed immediately before the supply of operating power to the MPU 62 was stopped and saved in the work area 221 for specific control. The checksum for 222 is read from the specific control work area 221, and the read checksum is compared with the checksum calculated in step S6604 (step S6605). Then, it is determined whether these checksums match (step S6606).

Here, the power outage information storage process executed by the main CPU 63 will be described with reference to the flowchart in FIG. 101. Note that the power outage information storage process is executed in step S6801 in the timer interrupt process (FIG. 103), which will be described later.

In the power outage information storage process, first, the repetition counter provided in the work area 221 for specific control is set to "10", which is information on the number of repetitions for the power outage signal (step S6701), and the work area 221 for specific control is 221 is cleared to "0" (step S6702).

Thereafter, a process is executed to read information on the power outage signal received at the input port of the MPU 62 (step S6703). In this case, if a power outage signal (LOW level power outage signal) corresponding to the fact that a power outage has not occurred is received, information of "0" is stored in the input port as non-power outage information. If a power outage signal (HI level power outage signal) corresponding to the occurrence of a power outage is being received, information of "1" is stored in the input port as power outage occurrence information. In step S6703, a process is executed to read the information on the power outage signal into the register of the main CPU 63.

If the information on the power outage signal read in step S6703 corresponds to the occurrence of a power outage (occurrence of power outage) (step S6704: YES), 1 is added to the numerical information of the power outage detection counter (step S6705). If a negative determination is made in step S6704 or if the process in step S6705 is executed, the numerical information of the repetition counter is subtracted by 1 (step S6706). Then, it is determined whether the numerical information of the repetition counter after the 1 subtraction is "0" (step S6707). If a negative determination is made in step S6707, the process returns to step S6703 and repeats the processing of steps S6703 to S6706. On the other hand, if an affirmative determination is made in step S6707, the process advances to step S6708.

In step S6708, it is determined whether the current numerical information of the power outage detection counter is equal to or greater than the trigger reference number corresponding to the occurrence of a power outage. If it is less than the trigger reference number, the power outage information storage process is terminated. On the other hand, if it is equal to or greater than the trigger reference number, the power outage process of steps S6709 to S6712 is executed.

Specifically, first, the power failure flag provided in the work area 221 for specific control is set to "1" (step S6709). As a result, if the power failure process is executed normally and the information is stored and maintained normally in the main RAM 65, the power failure flag in the work area 221 for specific control will be set to "1" when the supply of operating power to the main CPU 63 is resumed again.

Then, a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S6710). In this case, the storage areas in the work area 221 for specific control and the stack area 222 for specific control that are the objects of calculation when calculating the checksum are the same as the storage areas in the work area 221 for specific control and the stack area 222 for specific control that are the objects of calculation of the checksum in step S6604 of the main processing (FIG. 100). In addition, the storage areas that are the objects of calculation when calculating this checksum include an area in the work area 221 for specific control where information on a setting value indicating the setting state of the pachinko machine 10 is set (specifically, a setting value counter). Then, the calculated checksum is stored in a storage area in the work area 221 for specific control for storing the checksum, which is excluded from the objects of calculation of the checksum.

Thereafter, all output port information in the register of the main CPU 63 is set to "0" (step S6711), and access to the main RAM 65 is prohibited (step S6712). Then, the infinite loop continues until the power is completely cut off and the process can no longer be executed.

Note that by executing the power outage information storage process as the first process of the timer interrupt process, there is no need to execute the timer interrupt process from the middle after power is restored. This eliminates the need to store the address of the process being executed at the time of a power outage in the main RAM 65 as stack information, making it possible to reduce the processing load of the process at the time of a power outage.

Returning to the explanation of the main process (FIG. 100), if a negative judgment is made in step S6603 or step S6606, a clear process for non-setting update is executed (step S6607). In the clear process for non-setting update, the work area 221 for specific control is cleared to "0" and the initial setting is executed, except for the area (specifically, the setting value counter) in which the setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control. As a result, the area indicating whether the winning/losing lottery mode is the high probability mode or not is cleared to "0", so that the winning/losing lottery mode becomes the low probability mode regardless of the winning/losing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. In addition, the game round is not being executed, and the open/close execution mode is not being executed, and further, the normal map display unit 38a is not displayed in a variable manner and the normal power role 34a is in a closed state. In addition, the reserved storage area 65a and the regular power reserved area 65c provided in the work area 221 for specific control are also cleared to "0", so that the reserved information for the special map display section 37a is erased and the reserved information for the regular map display section 38a is erased. In addition, in the clearing process for non-setting updates, the stack area 222 for specific control is cleared to "0" and initial settings are performed. In addition, in the clearing process for non-setting updates, various registers of the main CPU 63 are also cleared to "0" and then initial settings are performed.

On the other hand, the clearing process during non-setting updates does not clear the work area 223 for non-specific control and the stack area 224 for non-specific control to "0". This makes it possible to prevent the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to "0" even if the power outage processing was not executed normally and the power outage flag was not set to "1". Also, even if an abnormality occurs with the checksum for the work area 221 for specific control and the stack area 222 for specific control, it makes it possible to prevent the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to "0".

If a negative determination is made in step S6603 or step S6606, after executing the clearing process at the time of non-setting update in step S6607, by checking the value of the setting value counter in the work area 221 for specific control, the pachinko machine It is determined whether the set value of 10 is normal (step S6608). Specifically, if the setting value set in the setting value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal. It is determined that there is. If the set value is abnormal (step S6608: NO), processing for newly setting the set value (steps S6619 to S6621), which will be described later, is executed. As a result, it is possible to monitor whether the set value is normal even if a negative determination is made in step S6603 or step S6606 and the clearing process (step S6607) for non-setting update is executed. At the same time, if the set value is abnormal, it becomes possible to reset the set value.

If the set value is normal (step S6608: YES), power-on setting processing is executed (step S6609). In the power-on setting process, a predetermined area of the work area 221 for specific control such as initialization of a power outage flag is set to an initial value, and a command corresponding to the current gaming state is transmitted to the audio emission control device 81.

Although the main CPU 63 is configured to periodically execute timer interrupt processing, generation of timer interrupt processing is prohibited at the stage when main processing is started. This state in which generation of the timer interrupt process is prohibited is canceled at a timing when the process in step S6609 is completed and before the process in step S6610 is executed, and execution of the timer interrupt process is permitted. As a result, when the supply of operating power to the main CPU 63 is started, the power-on setting process in step S6609 is completed and the timer interrupt process is not executed until the stage before the process in step S6610 is started. Therefore, the main CPU 63 will not start the process for advancing the game until the situation is reached.

Then, the process proceeds to the remaining process of steps S6610 to S6613. In other words, the main CPU 63 is configured to periodically execute timer interrupt processing, but there is a remaining time between one timer interrupt processing and the next timer interrupt processing. This remaining time varies depending on the processing completion time of each timer interrupt processing, but this irregular time is used to repeatedly execute the remaining process of steps S6610 to S6613. In this respect, the remaining process of steps S6610 to S6613 can be said to be non-periodic processing that is executed non-periodically. In steps S6610 to S6613, the same processing is executed as steps S113 to S116 of the main processing (FIG. 9) in the first embodiment described above.

As described above, in this embodiment, when the supply of operating power to the main CPU 63 is started, if the power outage flag in the work area 221 for specific control is not set to "1", or the checksums do not match. In this case, after executing the clearing process at the time of non-setting update, if the set value is normal (step S6608: YES), the process moves to a process for advancing the game. As a result, even if the power outage flag is not set to "1" because the power outage processing was not executed normally, the power can be turned on again after the supply of operating power to the main CPU 63 has started. There is no need to perform an OFF operation. Furthermore, even if an abnormality occurs regarding the checksum for the work area 221 for specific control and the stack area 222 for specific control, the power can be turned on and off again after the supply of operating power to the main CPU 63 is started. No operation required.

If an affirmative determination is made in both step S6603 and step S6606, it is determined whether the setting value of the pachinko machine 10 is normal by checking the value of the setting value counter in the work area 221 for specific control (step S6614 ). Specifically, if the setting value set in the setting value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal. It is determined that there is. If the set value is abnormal (step S6614: NO), processing for newly setting the set value (steps S6619 to S6621), which will be described later, is executed.

If the set value is normal (step S6614: YES), it is determined whether the reset button 68c is pressed (step S6615), and whether the setting key insertion part 68a is turned on using the setting key. It is determined whether or not the front door frame 14 is in an open state with respect to the inner frame 13 (step S6617), and it is determined whether the gaming machine main body 12 is in an open state with respect to the outer frame 11. It is determined whether there is one (step S6618).

In this embodiment, a front door open sensor 95 for detecting whether the front door frame 14 is open relative to the inner frame 13 is electrically connected to the main CPU 63, and the detection result of the front door open sensor 95 is input to the main CPU 63. In this case, when the front door frame 14 is closed relative to the inner frame 13, the front door open sensor 95 transmits a closed detection signal to the main CPU 63, and when the front door frame 14 is open relative to the inner frame 13, the front door open sensor 95 transmits an open detection signal to the main CPU 63. When the main CPU 63 receives a closed detection signal from the front door open sensor 95, it determines that the front door frame 14 is closed, and when it receives an open detection signal from the front door open sensor 95, it determines that the front door frame 14 is open.

Further, in this embodiment, a main body open sensor 96 for detecting whether or not the gaming machine main body 12 is in an open state with respect to the outer frame 11 is electrically connected to the main CPU 63. The detection result of 96 is input to the main CPU 63. In this case, when the gaming machine main body 12 is in the closed state with respect to the outer frame 11, the main body open sensor 96 transmits a closure detection signal to the main side CPU 63, and when the gaming machine main body 12 is in the open state with respect to the outer frame 11. In some cases, the main body open sensor 96 transmits an open detection signal to the main CPU 63. The main CPU 63 specifies that the gaming machine main body 12 is in the closed state when it receives a closing detection signal from the main body opening sensor 96, and specifies that the gaming machine main body 12 is in a closed state when it receives an opening detection signal from the main body opening sensor 96. It is determined that the main body 12 is in an open state.

If the reset button 68c is not pressed (step S6615: NO), the power-on setting process is executed in step S6609, and then the remaining processes in steps S6610 to S6613 are repeated. In other words, if the reset button 68c is not pressed, the process shifts to the process for controlling the progress of the game without executing the process of clearing the work area 221 for specific control and the stack area 222 for specific control. .

If the reset button 68c is pressed (step S6615: YES) and a negative determination is made in any of steps S6616 to S6618, after executing the clearing process at the time of non-setting update (step S6607 ), and on the condition that the set value is normal (step S6608: YES), the process moves to the processing for controlling the progress of the game from step S6609 onwards. The contents of the clearing process at the time of non-setting update are as already described.

If the reset button 68c is pressed (step S6615: YES) and all of steps S6616 to S6618 return a positive result, processing is performed to update the setting value. Also, if it is determined in step S6608 or step S6614 that the setting value is abnormal, processing is performed to update the setting value.

Specifically, first, a setting value copying process is executed (step S6619). In the copy process, information of a setting value counter used to specify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the setting value counter information is cleared to "0" in the setting value update clearing process (step S6620) to be executed subsequently, the information in the setting value counter before the setting value updating clearing process is executed. It becomes possible to grasp the set value of the pachinko machine 10 (that is, the set value of the pachinko machine 10 before the supply of operating power to the pachinko machine 10 is stopped).

After that, the clearing process at the time of updating the settings is executed (step S6620). In the clearing process at the time of updating the settings, the work area 221 for specific control is cleared to "0" and the initial setting is executed, except for the area indicating whether the winning/losing lottery mode in the work area 221 for specific control is the high probability mode or not and the copy area. As a result, the game round is not being executed, the open/close execution mode is not being executed, and further, the normal map display section 38a is not displayed in a variable manner and the normal power role 34a is in a closed state. In addition, the reserved storage area 65a and the normal power reserved area 65c provided in the work area 221 for specific control are also cleared to "0", so that the reserved information for the special map display section 37a is erased and the reserved information for the normal map display section 38a is erased. In addition, in the clearing process at the time of updating the settings, the stack area 222 for specific control is cleared to "0" and the initial setting is executed. In addition, in the clearing process at the time of updating the settings, the setting value counter used to specify the setting value of the pachinko machine 10 is cleared to "0". In addition, when the settings are updated, the various registers of the main CPU 63 are cleared to "0" before the initial settings are performed.

On the other hand, in the clearing process when updating the settings, the area indicating whether the winning lottery mode is the high probability mode is not cleared to "0", so even if the setting value updating process (step S6621) is executed, the winning lottery mode It becomes possible to maintain the mode in which the pachinko machine 10 was in the mode before the supply of operating power to the pachinko machine 10 was stopped. Furthermore, since the copy area is not cleared to "0" in the clearing process when updating the settings, it is possible to specify the setting value that was set before the clearing process when updating the settings. Note that the configuration is not limited to the above configuration, and a configuration may be adopted in which the setting value counter used to specify the setting value of the pachinko machine 10 is not cleared to "0" in the clearing process when updating the settings, and In the clearing process, an area indicating whether or not the winning lottery mode is a high probability mode may be cleared to "0".

In the clearing process when updating settings, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if a setting value update process that can change the setting values of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

Thereafter, setting value update processing is executed in step S6621. The contents of the setting value update process are the same as the setting value update process (FIG. 85) in the twenty-second embodiment. After executing the setting value update process, the process moves to the process for controlling the progress of the game starting from step S6609.

According to the above configuration, if the setting value is abnormal, the setting value update process is started without requiring any special operation by the amusement hall manager. Then, when the setting value update process is completed, the process moves to a process for controlling the progress of the game. This makes it possible to play in a situation where the setting value is set to the normal setting. On the other hand, since the setting key insertion section 68a must be turned OFF using the setting key to complete the setting value update process, it is possible to prevent the occurrence of an incident in which the setting value is arbitrarily set by someone other than the amusement hall manager and game play is started.

Next, a configuration for forcibly stopping the progress of the game when the main CPU 63 is unable to perform various processes normally will be described. FIG. 102(a) is a block diagram for explaining the configuration of the MPU 62.

As shown in FIG. 102(a), the MPU 62 is provided with a main CPU 63, a main ROM 64, and a main RAM 65, as well as a reset signal output section 251 and a program monitoring section 252. The reset signal output section 251 has a function of outputting a reset signal to the main CPU 63. Specifically, the reset signal output unit 251 outputs the reset signal to the main side as a HI level signal when operating power is supplied from the power supply/launch control device 78 and the output disabling condition is not satisfied. A reset signal is output to the CPU 63, and a reset signal is output to the main CPU 63 when operating power is not supplied from the power supply/launch control device 78, or when an output disable condition is satisfied even when operating power is supplied. Do not output to . The main CPU 63 executes various processes when operating power is supplied from the power source/launch control device 78 and receives a reset signal from the reset signal output section 251, and Even if operating power is being supplied, various processes are not executed if a reset signal is not received from the reset signal output unit 251. In addition, when the main CPU 63 is supplied with operating power from the power supply/launch control device 78 and switches from not receiving a reset signal from the reset signal output unit 251 to receiving a reset signal, the main CPU 63 The main process (FIG. 100) is started.

The program monitoring unit 252 has a function of monitoring whether the main CPU 63 is in a state in which various processes can be performed normally. Specifically, the program monitoring unit 252 monitors whether the value of a program counter provided in the main CPU 63 is an abnormal value. The program counter is for storing an address at which an instruction to be executed in the main CPU 63 is stored. The program counter has set values that it can take, and the program monitoring unit 252 monitors whether the value of the program counter is a value other than the possible values. In addition, the program monitoring unit 252 monitors whether the address specified as the write destination area when writing information to the work area 221 for specific control by a load command is an abnormal address. The program monitoring unit 252 may be configured to monitor whether the address specified as the read target area when reading information from the work area 221 for specific control by a load command is an abnormal address.

When the program monitoring unit 252 determines that the program counter value is abnormal, or that the address specified when writing information by a load command is abnormal, it outputs a monitoring abnormality signal to the reset signal output unit 251. When the reset signal output unit 251 receives a monitoring abnormality signal from the program monitoring unit 252, it temporarily stops outputting the reset signal even if operating power is being supplied from the power supply/launch control device 78, and after stopping outputting the reset signal for the duration of the stop, it resumes outputting the reset signal. The duration of the stop is a period sufficient for the main CPU 63 to identify that output of the reset signal has been stopped. As a result, when the program counter value becomes abnormal, or when the address specified when writing information by a load command becomes abnormal, the main processing is executed by the main CPU 63 through OFF/ON of the reset signal.

Figure 102(b) is a time chart showing the output of a reset signal by the reset signal output unit 251. Figure 102(b1) shows the period during which operating power is supplied from the power supply and launch control device 78, Figure 102(b2) shows the period during which a reset signal is output from the reset signal output unit 251, and Figure 102(b3) shows the timing at which a monitoring abnormality signal is output from the program monitoring unit 252.

First, to explain the case where a monitoring abnormality signal is not output from the program monitoring unit 252, the supply of operating power from the power source/launch control device 78 to the MPU 62 is started at timing t1 as shown in FIG. 102 (b1). , t2, the reset signal output section 251 starts outputting the reset signal as shown in FIG. 102(b). Thereafter, as shown in FIG. 102(b1) at timing t3, the supply of operating power from the power source/launch control device 78 to the MPU 62 is stopped, and the reset is performed as shown in FIG. 102(b2) at timing t4. The output of the reset signal from the signal output section 251 is stopped.

Next, to explain the case where a monitoring abnormality signal is output from the program monitoring unit 252, the supply of operating power from the power supply/launch control device 78 to the MPU 62 is started at timing t5 as shown in FIG. 102 (b1). As a result, output of the reset signal from the reset signal output section 251 is started at timing t6 as shown in FIG. 102(b). After that, at timing t7, the value of the program counter becomes an abnormal value or the address specified when writing information by a load instruction becomes an abnormal address, so that the program is monitored as shown in FIG. 102 (b3). A monitoring abnormality signal is output from the section 252 to the reset signal output section 251. As a result, as shown in FIG. 102(b2), the output of the reset signal from the reset signal output section 251 is temporarily stopped at timing t7, and resumed at the subsequent timing t8.

In this case, the main CPU 63 stops executing various processes at timing t7, and starts main processing (FIG. 100) at timing t8, which is the timing at which the rise of the reset signal is confirmed. However, since the power outage process is not executed when the execution of various processes of the main CPU 63 is stopped, the main process (FIG. 100) is executed in a situation where the power outage flag in the work area 221 for specific control is not set to "1". At the same time, the main processing (FIG. 100) is started without saving the checksums for the work area 221 for specific control and the stack area 222 for specific control. Therefore, in the main processing (FIG. 100), a negative determination is made in step S6603 or step S6606, and a clearing process (step S6607) at the time of non-setting update is executed. As a result, when a monitoring abnormality signal is output from the program monitoring unit 252 because the value of the program counter becomes an abnormal value or the address specified when writing information by a load command becomes an abnormal address, It becomes possible to perform a clearing process at the time of non-setting update, in which a predetermined storage area of the work area 221 for specific control and the stack area 222 for specific control is cleared to "0". .

However, in the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if a monitoring abnormality signal is output from the program monitoring unit 252 because the value of the program counter becomes an abnormal value or the address specified when writing information by a load instruction becomes an abnormal address, it will not occur. It is possible to prevent the work area 223 for specific control and the stack area 224 for non-specific control from being cleared to "0".

Returning to the explanation of FIG. 102(b), thereafter, as shown in FIG. 102(b1) at timing t9, the supply of operating power from the power source/launch control device 78 to the MPU 62 is stopped, and at timing t10. As shown in FIG. 102(b2), output of the reset signal from the reset signal output section 251 is stopped.

Next, the timer interrupt processing in this embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. 103. The timer interrupt process is executed periodically (for example, every 4 milliseconds) while the processes of steps S6610 to S6613 are being executed in the main process (FIG. 100). Note that the program corresponding to timer interrupt processing is set as a specific control program.

In steps S6801 to S6819, the same processes as steps S5201 to S5219 of the timer interrupt process (FIG. 86) in the twenty-second embodiment are executed. These processes are executed by the main CPU 63 using a specific control program and specific control data. Thereafter, setting monitoring processing is executed (step S6820). FIG. 104 is a flowchart showing the setting monitoring process.

The setting value counter in the work area 221 for specific control is checked to determine whether the setting value of the pachinko machine 10 is normal or not (step S6901). Specifically, if the setting value set in the setting value counter is any of "Setting 1" to "Setting 6," it is determined to be normal, and if it is "0" or 7 or greater, it is determined to be abnormal.

If the set value is abnormal (step S6901: NO), a copy process of the set value is executed (step S6902). In the copy process, information of a setting value counter used to specify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . Thereby, it becomes possible to grasp the setting value of the pachinko machine 10 before execution of the setting value update process to be executed thereafter.

Thereafter, an abnormality command indicating that a setting value abnormality has occurred is transmitted to the audio emission control device 81 (step S6903). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the set value abnormality, and also causes the speaker unit 54 to emit a voice saying "An abnormality in the set value has been detected." Output. Further, the symbol display device 41 displays a text image saying "An abnormality in the set value has been detected." These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the manager of the game hall. The notification termination operation may be, for example, pressing the update button 68b or pressing the reset button 68c. By checking the above-mentioned notification, the manager of the game hall can understand that a set value abnormality has occurred.

Then, the setting value update process is executed (step S6904). That is, each time the timer interrupt process (Fig. 103) is executed, whether or not an abnormality has occurred in the setting value is monitored, and if an abnormality in the setting value is identified, the setting value update process is executed to reset the setting value of the pachinko machine 10. The processing content of the setting value update process is the same as the setting value update process (Fig. 85) in the 22nd embodiment. Therefore, each time the update button 68b is pressed once, the setting value is updated by one step, and the selected setting value is confirmed by detecting a game ball with the outlet detection sensor 48a. The setting value being updated and the confirmed setting value are displayed on the third notification display device 69c. Then, if the setting key insertion section 68a is switched from the ON state to the OFF state, it is determined that the end condition of the setting value update process is satisfied. After the setting value update process is executed, the process returns to the timer interrupt process (Fig. 103).

Here, in the setting value update process, it is not determined that the termination condition is satisfied just because the setting key insertion section 68a is in the OFF state, but when the setting key insertion section 68a is switched from the ON state to the OFF state. If this happens, it is determined that the termination condition has been met. When the setting value update process is executed in the setting monitoring process, since the setting key insertion section 68a is in the OFF state at the start of the setting value update process, in order to satisfy the termination condition of the setting value update process, It is necessary to insert a setting key into the setting key insertion section 68a, turn it on once, and then turn it off. This makes it possible to prevent the setting value update process from ending even though the administrator of the gaming hall has not performed a proper operation.

When the setting key insertion section 68a is switched from the ON state to the OFF state and the termination condition of the setting value update process is satisfied, step S5111 in the setting value update process (FIG. 85) is executed. It is compared whether the set value stored in the copy area in the work area 221 for specific control and the set value currently set in the set value counter in the work area 221 for specific control are the same. That is, it is determined whether or not the setting value that was set before the setting value update process (step S6904) was executed is the same as the setting value that was set in the current setting value update process. If both setting values are the same (step S5112: NO), the setting maintenance notification described above is performed by executing the process for notification when no change is made (step S5113). On the other hand, if the two setting values are different (step S5112: YES), the setting change notification described above is performed by executing the process for notification at the time of change (step S5114).

In a configuration in which a setting value update process is executed when a setting value abnormality occurs, a setting maintenance notification is issued if the setting value set before the setting value update process is executed is the same as the setting value set in the setting value update process. As a result, even if the setting value update process is executed due to a setting value abnormality, the setting maintenance notification is issued by resetting the setting value set in the previous situation, making it possible to clearly inform the player that the setting value has not changed even if the setting value update process is executed due to a setting value abnormality. Incidentally, since it is common for game halls to record the setting values of each pachinko machine 10 installed, it is possible to execute the setting value update process due to a setting value abnormality so that the recorded setting value is used.

Returning to the explanation of the timer interrupt process (FIG. 103), after the setting monitoring process is executed in step S6820, the management process is executed in step S6821. When executing management processing, the subroutine program corresponding to the management processing set in the specific control program will be executed. Information for specifying the return address of the timer interrupt processing in is written to the stack area 222 for specific control by a push instruction. When the management process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process indicated by the return address.

Figure 105 is a flowchart showing the management process in this embodiment, which is executed by the main CPU 63. Note that the processes in steps S7001 to S7005 in the management process are executed by the main CPU 63 using a program for specific control and data for specific control.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 103) (step S7001). This prevents the timer interrupt process (FIG. 103), which is a process that corresponds to specific control, from being interrupted and started in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Then, the load command "LD (_PSWBUF), PSW" is used to save the flag register information of the main CPU 63 to the PSW buffer set in the work area 221 for specific control (step S7002). The flag register includes a carry flag, zero flag, P/V flag, sign flag, and half carry flag, and the flag register information changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the program of the subroutine corresponding to the management execution process is started, it is possible to save the flag register information in the state before it changes after the subroutine is called or started in the work area 221 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the program for non-specific control, the management execution process is started (step S7003). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management process indicated by the return address.

When returning to the management processing program after executing the management execution processing, it is saved as "LD PSW, (_PSWBUF)" to the PSW buffer in the specific control work area 221 in step S7002 by a load instruction. The information in the flag register is returned to the flag register of the main CPU 63 (step S7004). As a result, the information in the flag register of the main CPU 63 returns to the information at the time when step S7002 was executed last time. In other words, the information in the flag register of the main CPU 63 returns to information for executing specific control.

After that, the interrupt permission is set to switch from a state in which the occurrence of timer interrupt processing (FIG. 103) is prohibited to a state in which it is permitted (step S7005). This allows a new execution of the timer interrupt processing.

FIG. 106 is a flowchart showing the management execution process in this embodiment executed by the main CPU 63. Note that the processes from step S7101 to step S7116 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

Steps S7101 to S7108 and steps S7110 to S7116 execute the same processing as steps S4501 to S4515 of the management execution process (FIG. 78) in the 17th embodiment. In addition, step S7109 executes another monitoring process. When the other monitoring process is executed, a subroutine program corresponding to the other monitoring process set in the program for non-specific control is executed, and when the subroutine program is executed, information for specifying the return address of the management execution process after the execution of the other monitoring process is written to the stack area 224 for non-specific control by a push command. Then, when the other monitoring process is completed, information for specifying the return address is read by a pop command, and the program returns to the management execution process program indicated by the return address.

FIG. 107 is a flowchart showing another monitoring process. Note that the processes from step S7201 to step S7206 in the separate monitoring process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

In the separate monitoring process, it is determined whether the value of the pointer indicating the processing position of the process being executed in the non-specific control program exceeds the normal numerical range (step S7201). In addition, the information stored in the normal counter area 231, opening/closing execution mode counter area 232, and high-frequency support mode counter area 233 provided in the work area 223 for non-specific control has clearly become abnormal information. It is determined whether or not (step S7202). For example, if the value of the normal out counter 231e in the normal counter area 231 is "0" but the value of the normal general win counter 231a is 1000 or more, it is determined that there is an abnormality. Furthermore, it is determined whether the information stored in the calculation result storage area 234 provided in the work area 223 for non-specific control is clearly abnormal information (step S7203). For example, if the 61st parameter is "0" but any of the 62nd to 64th parameters are not "0", it is determined to be abnormal.

If an affirmative determination is made in any of steps S7201 to S7203, it is assumed that an information abnormality has occurred in the work area 223 for non-specific control, and a partial clearing process for the work area 223 for non-specific control is executed. (Step S7204). In the partial clearing process, storage areas other than the management start flag in the non-specific control work area 223 are cleared to "0". In this case, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are all cleared to "0". This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control.

Furthermore, by not clearing the management start flag to "0", it is possible to maintain the state in which the management start flag is already set to "1", and the pachinko machine 10 has already been used in the game hall. It is possible to prevent restrictions on the collection of history information from being imposed at the shipping stage of the pachinko machine 10 even though the pachinko machine 10 is in use. However, the present invention is not limited to this, and the entire non-specific control work area 223 including the management start flag may be cleared to "0" in step S7204.

Furthermore, in step S7204, the stack area 224 for non-specific control is not cleared to "0". In the stack area 224 for non-specific control, information on various registers used in the process corresponding to specific control in steps S7102 to S7107 in the management execution process (FIG. 106) is saved. In this case, by not clearing the stack area 224 for non-specific control to "0", information on various registers used in processing corresponding to this specific control can be stored in the stack area 224 for non-specific control. This makes it possible to prevent the information saved in H.224 from being deleted. In addition, the stack area 224 for non-specific control stores information on the return address of the management execution process (FIG. 106) after the end of another monitoring process, but the stack area 224 for non-specific control is ” By not clearing the return address information, it is possible to prevent the return address information from being erased.

Thereafter, initial setting processing is executed (step S7205). In the initial setting process, initial setting is performed for the storage area that was cleared to "0" in step S7204 in the work area 223 for non-specific control.

After that, clear notification processing is executed (step S7206). In the clear notification process, a command indicating that the work area 223 for non-specific control has been cleared to "0" is transmitted to the audio emission control device 81. By receiving the command, the audio light emission control device 81 causes the display light emission section 53 to emit light in a manner corresponding to the forced clearing of the work area 223 for non-specific control, and also issues a message from the speaker section 54 saying "History information has been forcibly cleared." Outputs a voice saying “I have done this.” Further, a character image "History information has been forcibly cleared." is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can understand that the work area 223 for non-specific control has been forcibly cleared.

If a negative determination is made in all steps S7201 to S7203, or if the process in step S7206 is executed, the separate monitoring process is ended and the process returns to the monitoring execution process (FIG. 106).

According to this embodiment described in detail above, the following excellent effects are achieved.

When the program monitoring unit 252 identifies that the address specified when writing information by a load command is an abnormal address, the reset signal output unit 251 turns the reset signal from OFF to ON, and the main CPU 63 executes the main processing (FIG. 100) in the same manner as when the supply of operating power is newly started. When the reset signal is turned from OFF to ON, the power failure flag in the work area 221 for specific control is not set to "1" and the checksum at the time of the power failure is not stored in the work area 221 for specific control, so that the clear processing at the time of non-setting update (step S6607) is forcibly executed. In the clear processing at the time of non-setting update, the memory areas other than the memory area in which the setting value of the pachinko machine 10 is stored in the work area 221 for specific control are cleared to "0", and the stack area 222 for specific control is cleared to "0", and the initial setting processing of these areas is executed. As a result, if there is a possibility that an information abnormality has occurred regarding the work area 221 for specific control or the stack area 222 for specific control, it is possible to resolve the information abnormality by executing a "0" clear process and an initial setting process on the work area 221 for specific control and the stack area 222 for specific control.

When the program monitoring unit 252 identifies that the value of the program counter of the main CPU 63 is an abnormal value, the reset signal output unit 251 turns the reset signal from OFF to ON, so that the main CPU 63 reduces the operating power. The main process (FIG. 100) is executed in the same way as when supply is newly started. When the reset signal is turned from OFF to ON, the power outage flag in the work area 221 for specific control is not set to "1" and the checksum at the time of power outage is stored in the work area 221 for specific control. Since the setting has not been updated, the clearing process for non-setting update (step S6607) is forcibly executed. In the clearing process at the time of non-setting update, the internal storage area of the main CPU 63 including various registers is cleared to "0" and the initial setting process is executed. As a result, if there is a possibility that an information abnormality has occurred in the internal storage area of the main CPU 63, the internal storage area of the main CPU 63 is cleared to "0" and the initial setting process is executed. It becomes possible to eliminate information abnormalities.

On the other hand, in the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, the information abnormality is identified in the program monitoring unit 252 as described above, and the internal storage area of the main CPU 63, the work area 221 for specific control, and the stack area 222 for specific control are cleared to "0". Even when the initial setting process is executed, it is possible to prevent the information on the gaming history from being deleted, and it is also possible to prevent the information on the management results of the gaming history from being deleted. It becomes possible to do so.

If the power outage flag is not set to "1" in the main process (Figure 100) when the supply of operating power to the main CPU 63 is started, or if the checksums do not match, clear at non-setting update. In the configuration in which the process (step S6607) is executed, if the program monitoring unit 252 identifies the occurrence of an information abnormality, the reset signal is turned from OFF to ON to ensure that the power outage flag is not set to "1". At the same time, the main processing (FIG. 100) is executed in a situation where no checksum is stored. This makes it possible to eliminate the information abnormality identified by the program monitoring unit 252 by using the configuration for resolving the information abnormality at the time of starting supply of operating power.

In a configuration in which the main processing (Figure 100) monitors whether the checksum is normal when the supply of operating power to the main CPU 63 is started, the calculation of the checksum includes the work area 221 for specific control and the stack area 222 for specific control, but does not include the work area 223 for non-specific control and the stack area 224 for non-specific control. This makes it possible to determine whether an information abnormality has occurred only in the memory area corresponding to the specific control in the main RAM 65.

When the main processing (FIG. 100) when the supply of operating power to the main CPU 63 is started identifies that the checksum is abnormal, a clear process during non-setting update (step S6607) is executed. In the clear process during non-setting update, the work area 221 for specific control and the stack area 222 for specific control are cleared to "0" and an initial setting process is executed, whereas the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". This makes it possible to prevent the process corresponding to specific control from continuing to be executed in the same state despite the occurrence of an information abnormality in the work area 221 for specific control and the stack area 222 for specific control, and also makes it possible to prevent the memory area corresponding to non-specific control in the main RAM 65 from being cleared to "0" in response to an information abnormality in the work area 221 for specific control and the stack area 222 for specific control.

In the power outage processing (steps S6709 to S6712) of the power outage information storage processing (Figure 101), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control, but a checksum is not calculated for the storage area corresponding to non-specific control in the main RAM 65. This makes it possible to prevent the processing period required to complete the power outage processing from becoming excessively long.

When an abnormality is identified in the information stored in the work area 223 for non-specific control in another monitoring process (FIG. 107) executed in the process corresponding to non-specific control, the work area 223 for non-specific control is cleared to "0" in the other monitoring process (FIG. 107) which is the process corresponding to non-specific control, and an initial setting process is executed. This makes it possible to prevent the process corresponding to non-specific control from being executed in a state where the information in the work area 223 for non-specific control is retained as it is, even if some abnormality has occurred in the work area 223 for non-specific control. In addition, since the process of clearing the work area 223 for non-specific control to "0" and the process of initial setting are executed in the process corresponding to non-specific control, it is possible to prevent the process corresponding to specific control from being involved in updating the information in the work area 223 for non-specific control.

In the separate monitoring process (FIG. 107), which is the process corresponding to non-specific control, monitoring is executed to determine whether an abnormality has occurred in the work area 223 for non-specific control, and if an abnormality has occurred, Then, processing for clearing the non-specific control work area 223 to "0" and initialization processing are executed. As a result, monitoring whether an abnormality has occurred in the work area 223 for non-specific control and executing initialization of the work area 223 for non-specific control can be performed as a series of processes in the process corresponding to non-specific control. It can be executed as

If the occurrence of an abnormality is identified in the information stored in the work area 223 for non-specific control in the separate monitoring process (FIG. 107) executed in the process corresponding to non-specific control, the work area 223 for non-specific control is cleared to "0" and initialized, but the stack area 224 for non-specific control is not cleared to "0" or initialized. This makes it possible to resolve the information abnormality in the work area 223 for non-specific control while preventing the information of various registers used in the process corresponding to specific control that has been saved in the stack area 224 for non-specific control and the return address information after the separate management process is completed from being erased.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and initializing them is executed by the process corresponding to the specific control, and the process of clearing the work area 223 for non-specific control to "0" and initializing them is executed by the process corresponding to the non-specific control. This makes it possible for such initialization processes to be treated as the work area 221 for specific control and the stack area 222 for specific control as dedicated memory areas for the process corresponding to the specific control, and for the work area 223 for non-specific control as dedicated memory areas for the process corresponding to the non-specific control.

Note that the main process (FIG. 100) is configured to monitor whether or not the set values are normal in steps S6608 and S6614, but the process of monitoring whether or not these set values are normal is not necessary. It may also be configured so that it is not executed. This makes it possible to reduce the processing load of the process executed when the supply of operating power to the main CPU 63 is started. Furthermore, even if the set value is not monitored to see if it is normal in the processing at the start of the supply of operating power, the timer interrupt executed after the processing at the start of the supply of operating power is completed. Since the setting monitoring process (step S6820) of the process (FIG. 103) monitors whether the setting value is normal or not, it is possible to deal with it if the setting value is abnormal.

Furthermore, the configuration is not limited to the configuration in which the setting monitoring process (step S6820) is executed each time the timer interrupt process (FIG. 103) is started, but may be configured such that the setting monitoring process (step S6820) is executed each time the timer interrupt process (FIG. 103) is executed a number of times (e.g., 10,000 times) that is set as a number of triggers. In this case, it is possible to periodically monitor whether the setting values are normal, while reducing the frequency with which the monitoring is executed.

The setting monitoring process (step S6820) may also be configured to be executed during the remaining processing (steps S6610 to S6613) in the main processing (Figure 100). In this case, it is possible to monitor whether the setting value is normal by utilizing the free time when the timer interrupt processing is not being executed.

Also, the configuration may be such that the setting monitoring process (step S6820) is executed when a new round of play is started. More specifically, the configuration may be such that the setting monitoring process (step S6820) is executed before the win/loss determination process is executed when a new round of play is started. This makes it possible to prevent the win/loss determination process from being executed in a situation where the setting value is abnormal.

In addition, if it is specified that the setting value is abnormal in the setting monitoring process (step S6820), instead of the configuration that moves to the setting value updating process (step S6904), a It is also possible to set the game stop flag to "1". In this case, if an affirmative determination is made in step S6807 in the timer interrupt process (FIG. 103), the processes in steps S6808 to S6821 will not be executed, so if the set value is abnormal, the progress of the game will be stopped. becomes. However, since the processing from step S6801 to step S6806 is executed, power outage monitoring is executed, and the hit random number counter C1, jackpot type counter C2, reach random number counter C3, and random number initial value counter CINI are updated, and Fraud detection is performed. Further, when the game stop flag is set to "1", a notification indicating that the setting value should be updated may be executed to prompt execution of the setting value updating process. In this case, the gaming hall manager who has confirmed the notification turns off the power and then turns on the power in such a way that the setting value update process is executed, thereby clearing the game stop flag to "0". As a result, the state in which the progress of the game is stopped is released, and the setting value update process is executed to set the normal setting value.

In addition, if it is specified that the setting value is abnormal in the setting monitoring process (step S6820), the setting abnormality flag provided in the work area 221 for specific control is set to "1" and the main processing (step S6820) is performed. Fig. 100) may be configured to start, and the progress of the game is stopped with the setting abnormality flag set to "1", and in order to release the stopped state of the game, turn off the power → A configuration may be adopted in which it is necessary to turn ON. In this case, even if no operation is performed to execute the setting value update process in the main process (Fig. 100), if the setting abnormality flag is set to "1", the setting value will be forcibly set. By executing the value update process, it becomes possible to forcibly set a new setting value using the setting value update process set in the main process (FIG. 100).

Also, when the program monitoring unit 252 identifies the occurrence of an information abnormality and forcibly turns the reset signal from OFF to ON, an initialization process is executed on the work area 221 for specific control, so that the setting value of the pachinko machine 10 becomes "setting 1."Also, when the program monitoring unit 252 identifies the occurrence of an information abnormality and forcibly turns the reset signal from OFF to ON, an initialization process is executed on the work area 221 for specific control, and then a setting value update process is executed.

In addition, if the program monitoring unit 252 identifies the occurrence of an information abnormality, the reset signal is not forcibly turned OFF → ON, and the clearing process (step S6607) at the time of non-setting update is executed. Alternatively, a configuration may be adopted in which clear processing (step S6620) and setting value update processing (step S6621) are executed when updating settings.

In addition, in the clear process when the setting is not updated (step S6607), the setting value of the pachinko machine 10 may be configured to be "Setting 1" by initializing the memory area that stores information on the setting value in the work area 221 for specific control, or may be configured to be a predetermined setting value other than "Setting 1". This makes it possible to set the setting value to a predetermined value when the clear process when the setting is not updated is executed.

In addition, in the clearing process at the time of non-setting update (step S6607), the work area 223 for non-specific control and the stack area 224 for non-specific control are configured not to be cleared to "0", but it is also configured that they are cleared to "0". good.

In addition, in step S7204 in the separate monitoring process (FIG. 107), the management start flag is not cleared to "0", but the management start flag may be cleared to "0". In addition, in step S7204 in the separate monitoring process (FIG. 107), the normal counter area 231, the open/close execution mode counter area 232, and the high frequency support mode counter area 233 may not be cleared to "0", and the calculation result storage area 234 may not be cleared to "0".

Furthermore, in step S7204 in the separate monitoring process (FIG. 107), "0" clearing processing and initial setting processing are executed not only for the work area 223 for non-specific control but also for the stack area 224 for non-specific control. It may also be a configuration. In this case, in the stack area 224 for non-specific control, the return address information of the management execution process after the end of another monitoring process and the process corresponding to the specific control saved in the stack area 224 for non-specific control are used. It is preferable not to erase the information in the various registers.

The separate monitoring process (FIG. 107) may also be configured to monitor whether an abnormality has occurred in the non-specific control stack area 224, and if an abnormality is identified, to execute a process of clearing the non-specific control stack area 224 to "0" and an initial setting process. In this case, it is preferable not to erase the information on the return address of the management execution process in the non-specific control stack area 224 after the separate monitoring process has ended.

Furthermore, the configuration is not limited to a configuration in which both the work area 221 for specific control and the stack area 222 for specific control are subject to checksum calculation, and only the work area 221 for specific control is subject to checksum calculation. Alternatively, only the stack area 222 for specific control may be subject to checksum calculation.

Thirty-first embodiment
In this embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the 30th embodiment. The configuration that differs from the 30th embodiment will be described below. Note that the description of the same configuration as the 30th embodiment will basically be omitted.

FIG. 108 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step S7301 to step S7322 in the main processing is executed using a specific control program and specific control data in the main CPU 63.

First, the power-on wait process is executed (step S7301). In this power-on wait process, for example, the main process is started and a predetermined wait time (specifically, one second) elapses before proceeding to the next process. During the execution period of this power-on wait process, the operation start and initial settings of the pattern display device 41 are completed. After that, access to the main RAM 65 is permitted (step S7302).

Thereafter, it is determined whether the power outage flag provided in the work area 221 for specific control in the main side RAM 65 is set to "1" (step S7303). If the power outage flag is set to "1" (step S7303: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7304). The checksum calculation method is the same as step S6604 of the main processing (FIG. 100) in the thirtieth embodiment.

Thereafter, the work area 221 for specific control and the work area 221 for specific control calculated in the power outage process executed immediately before the supply of operating power to the main CPU 63 is stopped and stored in the work area 221 for specific control. The checksum for the stack area 222 is read from the work area 221 for specific control, and the read checksum is compared with the checksum calculated in step S7304 (step S7305). Then, it is determined whether these checksums match (step S7306).

If a positive determination is made in step S7306, steps S7307 to S7320 are executed. In this case, the processing content of steps S7307 to S7314 is the same as steps S6614 to S6621 in the main processing (FIG. 100) in the 30th embodiment, and steps S7316 to S7320 are the same as steps S6609 to S6613 in the main processing (FIG. 100) in the 30th embodiment.

Furthermore, if the reset button 68c is being pressed (step S7308: YES) and a negative determination is made in any of steps S7309 to S7311, clearing processing for non-setting update is executed (step S7308: YES). S7315). The contents of the clearing process at the time of non-setting update are the same as step S6607 of the main process (FIG. 100) in the thirtieth embodiment. However, in this embodiment, after executing the clearing process at the time of non-setting update, the process proceeds to steps S7316 to S7320 without determining whether the set value is normal. Only if a negative determination is made in any of steps S7309 to S7311, the clearing process at the time of non-setting update (step S7315) will be executed, but before the processes in steps S7309 to S7311 are executed. Since it is determined in step S7307 whether the set value is normal, there is no need to determine whether the set value is normal after executing the clearing process at the time of non-setting update.

If a negative determination is made in step S7303 or step S7306, that is, if the power outage flag in the work area 221 for specific control is not set to "1" or if a checksum abnormality occurs, clear processing at the time of abnormality is executed. (Step S7321). FIG. 109 is a flowchart showing the clearing process in the event of an abnormality. Note that the processing in steps S7401 to S7405 in the abnormality clearing process is executed by the main CPU 63 using a specific control program and specific control data.

First, clearing processing of the work area 221 for specific control is executed (step S7401). In the clearing process, in the work area 221 for specific control, excluding the area in which setting value information indicating the setting state of the pachinko machine 10 is set (specifically, the setting value counter), the work area for the specific control is 221 is cleared to "0" and initial settings are made to the area cleared to "0". As a result, the area indicating whether the win/fail lottery mode is the high probability mode is cleared to "0", so the win/fail lottery is performed regardless of the win/fail lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in a closed state. situation. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted.

Thereafter, clearing processing of the stack area 222 for specific control is executed (step S7402). In the clearing process, the stack area 222 for specific control is cleared to "0" and initial settings are performed.

After that, the information in the flag register of the main CPU 63 is saved to the stack area 222 for specific control by a push command as "PUSH PSW" (step S7403). The flag register includes a carry flag, zero flag, P/V flag, sign flag, and half carry flag, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, and input/output instructions. By saving such flag register information before the program of a subroutine corresponding to a clear process for non-specific control is started, it becomes possible to save the information in the flag register in the state before it changes after the call of the subroutine or the start of the subroutine in the stack area 222 for specific control. The amount of information in the flag register is 1 byte.

Then, the clear processing for non-specific control is started by reading out a subroutine program corresponding to the clear processing for non-specific control set in the program for non-specific control (step S7404). In this case, information for specifying the return address of the clear processing in the event of an abnormality after the clear processing for non-specific control is executed is written into the stack area 222 for specific control by a push command. Then, when the clear processing for non-specific control is completed, information for specifying the return address is read out by a pop command, and the program for the clear processing in the event of an abnormality indicated by the return address is returned to.

When returning to the program for the abnormality clear process after the execution of the non-specific control clear process, the flag register information saved in the specific control stack area 222 in step S7402 is restored to the flag register of the main CPU 63 by a pop command as "POP PSW" (step S7405). This causes the flag register information of the main CPU 63 to return to the information at the time step S7402 was executed. In other words, the flag register information of the main CPU 63 returns to the information for executing specific control.

FIG. 110 is a flowchart showing clear processing for non-specific control. Note that the processing from step S7501 to step S7516 in the clearing process for non-specific control is executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as "LD SP, Y(u+2)", Y(u+2) is set as a fixed address at the start of non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S7501). In this case, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, information on the last address in the stack area 224 for non-specific control is set in the stack pointer.

Thereafter, the information in the WA register of the master CPU 63 is saved to the WA buffer set in the work area 223 for non-specific control by a load command as "LD (_WABUF), WA" (step S7502). Also, the information in the BC register of the master CPU 63 is saved to the BC buffer set in the work area 223 for non-specific control by a load command as "LD (_BCBUF), BC" (step S7503). Also,
The load command is "LD (_DEBUF), DE" to save the information in the DE register of the master CPU 63 to the DE buffer set in the work area 223 for non-specific control (step S7504). The load command is "LD (_HLBUF), HL" to save the information in the HL register of the master CPU 63 to the HL buffer set in the work area 223 for non-specific control (step S7505). The load command is "LD (_IXBUF), IX" to save the information in the IX register of the master CPU 63 to the IX buffer set in the work area 223 for non-specific control (step S7506). The load command is "LD (_IYBUF), IY" to save the information in the IY register of the master CPU 63 to the IY buffer set in the work area 223 for non-specific control (step S7507).

The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag register described above. In this case, in steps S7502 to S7507, each information of the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, is is saved in a corresponding buffer in the work area 223 for non-specific control. Note that the information amount of the WA register, BC register, DE register, HL register, IX register, and IY register is all 2 bytes.

These WA registers, BC registers, DE registers, HL registers, IX registers, and IY registers are used for processing corresponding to non-specific control, such as partial clearing processing of the work area 223 for non-specific control (step S7508) and initial setting processing ( This is a register used in step S7509). The information set in such registers is saved to the work area 223 for non-specific control before executing the partial clearing process (step S7508) and the initial setting process (step S7509) of the work area 223 for non-specific control. By doing so, it becomes possible to save the information in these registers used for specific control before non-specific control is started. Therefore, even if these registers are overwritten during non-specific control, the status of these registers can be changed by restoring the information saved in the work area 223 for non-specific control to these registers when terminating non-specific control. It becomes possible to restore the state to the state corresponding to the specific control before the non-specific control was executed.

In addition, instead of saving all the information of various general-purpose registers, auxiliary registers, and index registers to the work area 223 for non-specific control, the work area 223 for non-specific control, which is a process corresponding to non-specific control, is In the partial clearing process (step S7508) and the initial setting process (step S7509), information on the WA register, BC register, DE register, HL register, IX register, and IY register to be used is selectively set for non-specific control. By saving the information to the work area 223, it is possible to suppress the capacity secured for saving register information in the work area 223 for non-specific control. Therefore, while ensuring a large capacity of the work area 223 for non-specific control that can be used during the partial clearing process (step S7508) and the initial setting process (step S7509) of the work area 223 for non-specific control, the above-mentioned procedure is performed. It becomes possible to save information in such registers. Of course, among the various general-purpose registers, auxiliary registers, and index registers in the main CPU 63, registers other than the WA register, BC register, DE register, HL register, IX register, and IY register support non-specific control. The information set before the start of the process is stored and held until the process corresponding to the non-specific control is finished and the process corresponding to the specific control is restarted.

Furthermore, by saving register information to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, the capacity of the stack area 224 for non-specific control can be kept small. It becomes possible. Furthermore, when using the stack area 224 for non-specific control, as described above, the information is written in the order in which the later information is read out first, so if the order in which the information is read is shifted due to some kind of noise, etc. If this happens, all subsequent reading order information will be restored to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. In contrast, by saving register information to the work area 223 for non-specific control, it is possible to prevent the above-mentioned phenomenon from occurring even when there is a large amount of information to be saved. .

After executing the processes of steps S7502 to S7507, a process of partially clearing the work area 223 for non-specific control is executed (step S7508). In the partial clearing process, among the storage areas of the work area 223 for non-specific control, storage areas other than the storage area where information of various registers of the main CPU 63 used in processing corresponding to specific control are saved Clear to "0". Specifically, among the storage areas of the work area 223 for non-specific control, the WA buffer, BC buffer, DE buffer, HL buffer, IX buffer, and IY buffer are not cleared to "0", while the memory other than these various buffers is Clear the area to "0".

In this case, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control. In addition, by not clearing to "0" the storage area where the information of various registers of the main CPU 63 used in the process corresponding to specific control is saved, the process corresponding to non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to restore information used in the process corresponding to the specific control to various registers of the main CPU 63.

In addition, in step S7508, the stack area 224 for non-specific control is not cleared to "0." The stack area 224 for non-specific control stores return address information for the clearing process (FIG. 109) in the event of an abnormality after the clearing process for non-specific control is completed, but by not clearing the stack area 224 for non-specific control to "0," it is possible to prevent this return address information from being erased.

After that, the initial setting process is executed (step S7509). In the initial setting process, initial settings are made to the storage areas in the non-specific control work area 223 that were cleared to "0" in step S7508.

After that, as in step S3909 of the management execution process (FIG. 71) in the 15th embodiment, a load command is issued to set Y(r+α) as a fixed address at the time of return to specific control in the stack pointer of the main CPU 63 as "LD SP, Y(r+α)" (step S7510). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

Thereafter, the information saved in the WA buffer of the work area 223 for non-specific control is overwritten in the WA register of the main CPU 63 by a load instruction as "LD WA, (_WABUF)" (step S7511). Also, as "LD BC, (_BCBUF)", the information saved in the BC buffer of the non-specific control work area 223 is overwritten in the BC register of the main CPU 63 by the load instruction (step S7512). Further, as "LD DE, (_DEBUF)", the information saved in the DE buffer of the work area 223 for non-specific control is overwritten in the DE register of the main CPU 63 by the load instruction (step S7513). Also, as "LD HL, (_HLBUF)", the information saved in the HL buffer of the work area 223 for non-specific control is overwritten in the HL register of the main CPU 63 by the load instruction (step S7514). Further, as "LD IX, (_IXBUF)", the information saved in the IX buffer of the work area 223 for non-specific control is overwritten in the IX register of the main CPU 63 by the load instruction (step S7515). Also, as "LD IY, (_IYBUF)", the information saved in the IY buffer of the work area 223 for non-specific control is overwritten in the IY register of the main CPU 63 by the load instruction (step S7516). By executing the processing from step S7511 to step S7516, processing corresponding to non-specific control is started for each information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63. It becomes possible to restore the information corresponding to the specific control immediately before the control.

According to the above configuration, in the main process (FIG. 108) that is executed when the supply of operating power to the main CPU 63 is started, if the power outage flag is not set to "1" or the checksum is abnormal. In some cases, the abnormality clearing process (step S7321) is executed, so that not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control is set to "0". ” is cleared and initialized. If an information abnormality has occurred in the work area 221 for specific control, there is a possibility that an information abnormality has also occurred in the work area 223 for non-specific control. The work area 223 for non-specific control is also initialized to prevent processing corresponding to non-specific control from being executed in the same state even though an information error has occurred in the work area 223 for non-specific control. It becomes possible to do so.

Even if the process of clearing the work area 223 for non-specific control to "0" and the process of initializing are executed in the abnormality clearing process (step S7321), the information of various registers used in the process corresponding to the specific control that was saved in the work area 223 for non-specific control is not cleared to "0". This makes it possible to execute the process of clearing the work area 223 for non-specific control to "0" and the process of initializing while not erasing the information used in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

Even if the work area 223 for non-specific control is cleared to "0" and initialized in the abnormality clear process (step S7321), the stack area 224 for non-specific control is not cleared to "0" and initialized. This makes it possible to prevent the return address information from being erased after the clear process for non-specific control (FIG. 110) is completed.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and the process of initializing are executed by the process corresponding to the specific control, and the process of clearing the work area 223 for non-specific control to "0" and the process of initializing are executed by the process corresponding to the non-specific control. This makes it possible for the work area 221 for specific control and the stack area 222 for specific control to be treated as a dedicated memory area for the process corresponding to the specific control, and for the process of clearing to "0" and the process of initializing, too, and for the work area 223 for non-specific control to be treated as a dedicated memory area for the process corresponding to the non-specific control.

Note that the configuration is not limited to one in which both the work area 221 for specific control and the stack area 222 for specific control are the subject of checksum calculation, and it may be a configuration in which only the work area 221 for specific control is the subject of checksum calculation, or a configuration in which only the stack area 222 for specific control is the subject of checksum calculation.

The work area 223 for non-specific control may also be configured to be the target of checksum calculation. In this case, the work area 221 for specific control and the work area 223 for non-specific control may also be configured to be the target of checksum calculation, the stack area 222 for specific control and the work area 223 for non-specific control may also be configured to be the target of checksum calculation, or the work area 221 for specific control, the stack area 222 for specific control and the work area 223 for non-specific control may also be configured to be the target of checksum calculation.

Further, a configuration may be adopted in which the stack area 224 for non-specific control is the target of checksum calculation. In this case, the work area 221 for specific control and the stack area 224 for non-specific control may be configured as checksum calculation targets, and the stack area 222 for specific control and the stack area 224 for non-specific control may be checked. The configuration may be such that the checksum is calculated, or the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control may be subject to checksum calculation.

Further, a configuration may be adopted in which the work area 223 for non-specific control and the stack area 224 for non-specific control are the targets of checksum calculation. In this case, the work area 221 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control may be configured to be checksum calculation targets, and the stack area 222 for specific control, the stack area 224 for non-specific control, and the stack area 224 for non-specific control may be configured. The work area 223 for specific control and the stack area 224 for non-specific control may be configured as checksum calculation targets. The work area 223 and the stack area 224 for non-specific control may be configured to be checksum calculation targets.

In addition, in steps S7508 and S7509 in the non-specific control clear process (FIG. 110), the process of clearing to "0" and the initial setting process may be performed not only on the non-specific control work area 223 but also on the non-specific control stack area 224. In this case, it is preferable not to erase the return address information for the clear process in the event of an abnormality after the non-specific control clear process is completed.

In addition, in step S7508 in the clearing process for non-specific control (FIG. 110), the management start flag is cleared to "0", but the management start flag may not be cleared to "0". In addition, in step S7508 in the clearing process for non-specific control (FIG. 110), the normal counter area 231, the open/close execution mode counter area 232, and the high frequency support mode counter area 233 may not be cleared to "0", and the calculation result storage area 234 may not be cleared to "0".

<Thirty-second embodiment>
This embodiment is different from the above-mentioned 30th embodiment in the processing configuration regarding monitoring of information abnormalities in the main side RAM 65 using a checksum. Hereinafter, the configuration that is different from the above-mentioned 30th embodiment will be explained. Note that descriptions of the same configurations as those of the 30th embodiment will be basically omitted.

Figure 111 is a flowchart showing the power outage information storage process in this embodiment, which is executed by the main CPU 63. The power outage information storage process is executed in step S6801 in the timer interrupt process (Figure 103). The processes in steps S7601 to S7613 in the power outage information storage process are executed in the main CPU 63 using a program for specific control and data for specific control.

Steps S7601 to S7608 in the power outage information storage process are the same as steps S6701 to S6708 in the power outage information storage process (FIG. 101) in the thirtieth embodiment. If the occurrence of a power outage is identified, an affirmative determination is made in step S7608, and the power outage processing in steps S7609 to S7613 is executed.

Specifically, first, a power outage flag provided in the work area 221 for specific control is set to "1" (step S7609). As a result, if power outage processing is executed normally and information is stored and retained in the main side RAM 65 normally, when the supply of operating power to the main side CPU 63 is restarted, the specific control This means that the power outage flag of the work area 221 is set to "1".

Then, the checksums are calculated for the specific control work area 221 and the specific control stack area 222 (step S7610). In this case, the storage areas in the specific control work area 221 and the specific control stack area 222 that are the objects of calculation when calculating the specific control checksum are the same as the storage areas in the specific control work area 221 and the specific control stack area 222 that are the objects of calculation of the specific control checksum in step S7701 of the checksum monitoring process (FIG. 112) described later. In addition, the storage areas that are the objects of calculation when calculating the specific control checksum include an area in the specific control work area 221 where information on the setting value indicating the setting state of the pachinko machine 10 is set (specifically, a setting value counter). Then, the calculated specific control checksum is stored in a storage area for storing the specific control checksum in the specific control work area 221, which is excluded from the objects of calculation of the specific control checksum.

Thereafter, checksums are calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step S7611). In this case, the storage areas in the work area 223 for non-specific control and the stack area 224 for non-specific control, which are the targets of calculation when calculating the checksum for non-specific control, are used for checksum monitoring processing (FIG. 112), which will be described later. This is the same storage area as the work area 223 for non-specific control and the stack area 224 for non-specific control, which are the targets of the calculation of the checksum for non-specific control in step S7706. Then, the calculated checksum for non-specific control is stored in a storage area for storing the checksum for non-specific control in the work area 221 for specific control, and is excluded from the calculation target of the checksum for specific control. The data is stored in the storage area where the data is stored.

Thereafter, all output port information in the register of the main CPU 63 is set to "0" (step S7612), and access to the main RAM 65 is prohibited (step S7613). Then, the infinite loop continues until the power is completely cut off and processing can no longer be executed.

Next, the checksum monitoring process executed by the main CPU 63 will be described with reference to the flowchart in FIG. 112. Note that the checksum monitoring process is executed in place of steps S6604 to S6606 in the main process (FIG. 100). Furthermore, the processes from step S7701 to step S7711 in the checksum monitoring process are executed by the main CPU 63 using a specific control program and specific control data.

First, a checksum for specific control is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7701). The method of calculating the checksum for specific control is the same as step S7610 in the power outage information storage process (FIG. 111). Then, the checksum for specific control calculated and stored in the work area 221 for specific control in step S7610 of the power outage process executed immediately before the supply of operating power to the main CPU 63 was stopped is read from the work area 221 for specific control, and the read checksum for specific control is compared with the checksum for specific control calculated in step S7701 (step S7702). Then, it is determined whether or not the checksums for specific control match (step S7703).

If the checksums for specific control do not match (step S7703: NO), a clear process is performed on the work area 221 for specific control (step S7704). In this clear process, the work area 221 for specific control is cleared to "0" and the initial setting is performed, except for the area in the work area 221 for specific control in which the setting value information indicating the setting state of the pachinko machine 10 is set (specifically, the setting value counter). As a result, the area indicating whether the winning/losing lottery mode is the high probability mode or not is cleared to "0", so that the winning/losing lottery mode becomes the low probability mode regardless of the winning/losing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. In addition, the game round is not being executed, and the open/close execution mode is not being executed, and further, the normal map display unit 38a is not displayed in a variable manner and the normal power role 34a is in a closed state. In addition, the reserved storage area 65a and the regular power reserved area 65c provided in the work area 221 for specific control are also cleared to "0", so that the reserved information for the special map display unit 37a is erased and the reserved information for the regular map display unit 38a is erased. In addition, in this clearing process, various registers of the main CPU 63 are also cleared to "0" and then initial settings are performed. In addition, the stack area 222 for specific control is cleared to "0" and initial settings are performed (step S7705).

If the result of step S7703 is positive, or if the process of step S7705 is executed, a checksum for non-specific control is calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step S7706). The method of calculating the checksum for non-specific control is the same as that of step S7611 in the power failure information storage process (FIG. 111). Then, the checksum for non-specific control calculated and stored in the work area 221 for specific control in step S7611 of the power failure process executed immediately before the supply of operating power to the main CPU 63 was stopped is read from the work area 221 for specific control, and the read checksum for non-specific control is compared with the checksum for non-specific control calculated in step S7706 (step S7707). Then, it is determined whether or not the checksums for non-specific control match (step S7708).

If the checksums for non-specific control do not match (step S7708: NO), the flag register information of the main CPU 63 is saved to the stack area 222 for specific control by a push command as "PUSH PSW" (step S7709). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, and a half carry flag, and the information in the flag register changes depending on the execution results of an arithmetic instruction, a rotate instruction, an input/output instruction, and the like. By saving such flag register information before the program of a subroutine corresponding to the clear process for non-specific control is started, it is possible to save the flag register information in the state before it is changed after the subroutine is called or the subroutine is started to the stack area 222 for specific control. The amount of information in the flag register is 1 byte.

Thereafter, by reading the subroutine program corresponding to the clearing process for non-specific control set in the program for non-specific control, the clearing process for the non-specific control is started (step S7710). In this case, information for specifying the return address of the checksum monitoring process after execution of the non-specific control clearing process is written to the specific control stack area 222 by a push command. When the clearing process for non-specific control is completed, information for specifying the return address is read out by a pop instruction, and the program returns to the checksum monitoring process indicated by the return address.

When returning to the abnormality clear processing program after executing clear processing for non-specific control, the flag register saved to the stack area 222 for specific control in step S7709 by a pop instruction is stored as "POP PSW". information is returned to the flag register of the main CPU 63 (step S7711). As a result, the information in the flag register of the main CPU 63 returns to the information at the time when step S7709 was executed. In other words, the information in the flag register of the main CPU 63 returns to information for executing specific control.

FIG. 113 is a flowchart showing clear processing for non-specific control. Note that the processing from step S7801 to step S7818 in the clearing process for non-specific control is executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

Steps S7801 to S7807 in the clearing process for non-specific control execute the same processing as steps S7501 to S7507 in the clearing process for non-specific control in the 31st embodiment (Figure 110).

After that, a partial clear process of the work area 223 for non-specific control is executed (step S7808). In this partial clear process, the memory areas of the work area 223 for non-specific control are cleared to "0" except for the memory areas in which the information of the various registers of the main CPU 63 used in the process corresponding to the specific control is saved. Specifically, among the memory areas of the work area 223 for non-specific control, the WA buffer, BC buffer, DE buffer, HL buffer, IX buffer, and IY buffer are not cleared to "0", while the memory areas other than these various buffers are cleared to "0".

In this case, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control. In addition, by not clearing to "0" the storage area where the information of various registers of the main CPU 63 used in the process corresponding to specific control is saved, the process corresponding to non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to restore information used in the process corresponding to the specific control to various registers of the main CPU 63.

After that, the initial setting process is executed (step S7809). In the initial setting process, initial settings are made to the storage areas in the non-specific control work area 223 that were cleared to "0" in step S7808.

After that, a partial clear process of the stack area 224 for non-specific control is executed (step S7810). In this partial clear process, among the storage areas of the stack area 224 for non-specific control, the storage areas other than the storage area in which the return address information of the checksum monitoring process (FIG. 112) after the clear process for non-specific control is completed are cleared to "0". This makes it possible to resolve the information anomaly in the stack area 224 for non-specific control while preventing the return address information of the checksum monitoring process (FIG. 112) after the clear process for non-specific control is completed from being erased.

Thereafter, initial setting processing is executed (step S7811). In the initial setting process, initial setting is performed for the storage area that was cleared to "0" in step S7810 in the stack area 224 for non-specific control.

Thereafter, the processes of steps S7812 to S7818 are executed. These steps S7812 to S7818 are the same as steps S7510 to S7516 in the non-specific control clearing process (FIG. 110) in the thirty-first embodiment.

According to the above configuration, the checksum for the work area 221 for specific control and the stack area 222 for specific control and the checksum for the work area 223 for non-specific control and the stack area 224 for non-specific control are Calculated separately. This makes it possible to individually identify information abnormalities in the storage area corresponding to specific control in the main side RAM 65 and the storage area corresponding to non-specific control in the main side RAM 65.

If there is an abnormality in the checksum for specific control, the work area 221 for specific control and the stack area 222 for specific control are cleared to "0" and initialized, and the checksum for non-specific control is If there is an abnormality in the checksum, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to 0 and initialization processing is executed. This makes it possible to narrow down the targets for executing the "0" clearing process and the initial setting process to the area where the checksum abnormality has been identified.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and the process of initializing are executed by the process corresponding to the specific control, and the process of clearing the work area 223 for non-specific control to "0" and the process of initializing are executed by the process corresponding to the non-specific control. This makes it possible to treat the work area 221 for specific control and the stack area 222 for specific control as dedicated memory areas for the process corresponding to the specific control, and to treat the work area 223 for non-specific control as a dedicated memory area for the process corresponding to the non-specific control, even with regard to the process of clearing to "0" and the initial setting process.

Although the management start flag is cleared to "0" in step S7808 in the clearing process for non-specific control (FIG. 113), the management start flag may not be cleared to "0". Further, in step S7808 in the clearing process for non-specific control (FIG. 113), the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 may be configured not to be cleared to "0". A configuration may also be adopted in which the calculation result storage area 234 is not cleared to "0".

<33rd embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration executed by the main CPU 63. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 114 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step S7901 to step S7924 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

First, the power-on initial setting process is executed (step S7901). In the power-on initial setting process, for example, the main process is started and then the process waits until a predetermined waiting time (specifically, one second) has elapsed before proceeding to the next process. During this predetermined waiting period, the operation start and initial setting of the pattern display device 41 are completed. In addition, access to the main RAM 65 is permitted.

Then, the internal function register setting process is executed (step S7902). In the internal function register setting process, the interrupt period of the first timer interrupt process (FIG. 117), which is a process that periodically interrupts the main process and is started, is set to the first interrupt period (specifically, 4 milliseconds), and the interrupt period of the second timer interrupt process (FIG. 123), which is a process that periodically interrupts the main process and is started, is set to the second interrupt period (specifically, 2 milliseconds), which is shorter than the first interrupt period.

That is, in this embodiment, the first timer interrupt process and the second timer interrupt process exist so that the interrupt period is relatively long and short as the timer interrupt process. Both the first timer interrupt process and the second timer interrupt process are started by interrupting the main process. Further, the second timer interrupt process is started by interrupting the first timer interrupt process. On the other hand, the first timer interrupt process interrupts the second timer interrupt process and is not activated. In addition, if both the first and second interrupt cycles have elapsed in a situation where both the first timer interrupt process and the second timer interrupt process are not being executed, the second timer interrupt process The timer interrupt processing is activated first. In this respect, it can be said that the second timer interrupt process is a process that is activated with priority over the first timer interrupt process.

In the internal function register setting process, the first interrupt cycle of the first timer interrupt process is set in a predetermined register of the main CPU 63, and the second interrupt cycle of the second timer interrupt process is set in a specific register of the main CPU 63. do. Further, in the internal function register setting process, in addition to setting the first and second interrupt cycles, for example, setting process of the numerical range of various counters such as the numerical range of the winning random number counter C1 is executed.

Then, the start-up processing flag provided in the work area 221 for specific control is set to "1" (step S7903). The start-up processing flag is a flag for the main CPU 63 to identify a situation in which the first timer interrupt processing should be ended without executing the various processes set in the first timer interrupt processing, even if the first timer interrupt processing is started. By setting the start-up processing flag to "1", even if the first timer interrupt processing is started, the various processes set in the first timer interrupt processing will not be executed, and the first timer interrupt processing will be ended.

Thereafter, interrupt permission is set (step S7904). As a result, the first timer interrupt process (FIG. 117) is interrupted and activated in the first interrupt period, and the second timer interrupt process (FIG. 123) is interrupted and activated in the second interrupt period. However, since the start-up processing flag is set to "1" in step S7903, even if the first timer interrupt processing is started, various processes set for the first timer interrupt processing are executed. The first timer interrupt process is ended without any interruption.

Thereafter, it is determined whether or not the reset button 68c has been pressed (step S7905). That is, it is determined whether or not the pachinko machine 10 is powered on while the reset button 68c is pressed and the supply of operating power to the main CPU 63 is started. Here, in this embodiment, the main controller 60 is provided with a setting key insertion section 68a and a reset button 68c, but is not provided with an update button 68b. Furthermore, the main control device 60 is provided with first to fourth notification display devices 201 to 204, as in the eleventh embodiment, instead of the first to third notification display devices 69a to 69c.

If the reset button 68c is not pressed (step S7905: NO), it is determined whether the power outage flag provided in the work area 221 for specific control is set to "1" (step S7906). The power outage flag is set to "1" when power outage processing is executed in the power outage information storage processing (step S8202) of the first timer interrupt processing (FIG. 117) described later. The power outage flag is a flag that allows the main CPU 63 to determine whether power outage processing was performed appropriately the previous time the power was shut off.

If the power outage flag is set to "1" (step S7906: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7907). The method of calculating the checksum is arbitrary, but the calculation method is the same as the calculation method used when the checksum is calculated in the power outage processing in the power outage information storage processing (step S8202) of the first timer interrupt processing (FIG. 117) described below. The checksum calculated in the power outage processing is stored in the work area 221 for specific control, but the memory area of the work area 221 for specific control in which this checksum is stored is excluded from the memory areas that are the subject of calculation when the checksum is calculated.

In other words, when the checksum is calculated, the storage area to be calculated, which is a part of the storage area in the work area 221 for specific control and the stack area 222 for specific control, is the storage area to be calculated. This storage area to be calculated is a storage area in which information is not basically rewritten if the supply of power such as backup power to the work area 221 for specific control and the stack area 222 for specific control is continued from the time the checksum is calculated in the power failure processing when the supply of operating power to the MPU 62 is stopped until the supply of operating power to the MPU 62 is resumed and the processing of step S7907 is executed. Therefore, if the information in the work area 221 for specific control and the stack area 222 for specific control has not been changed from the time the supply of operating power to the MPU 62 is stopped until the supply of operating power to the MPU 62 is resumed, the checksum for the work area 221 for specific control and the stack area 222 for specific control is the same as that immediately before the supply of operating power to the MPU 62 is stopped. The storage areas that are the objects of calculation when calculating this checksum include an area (specifically, a setting value counter) in which setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control. Note that the work area 223 for non-specific control and the stack area 224 for non-specific control are not included in the calculation of the checksum.

Then, the checksums for the work area 221 for specific control and the stack area 222 for specific control that were calculated and stored in the work area 221 for specific control during the power outage processing executed immediately before the supply of operating power to the main CPU 63 was stopped are read from the work area 221 for specific control, and the read checksums are compared with the checksum calculated in step S7907 (step S7908). Then, it is determined whether the checksums match (step S7909).

If a negative determination is made in step S7906 or step S7909, that is, if the power outage flag is not set to "1" or if the checksums do not match, the game stop flag provided in the work area 221 for specific control is set to "1" (step S7910). The game stop flag is used in a situation where an affirmative determination is made in step S8207 in the first timer interrupt process (FIG. 117) described later and the processes in steps S8208 to S8221 are not executed, that is, the execution of the process for advancing the game is stopped. This flag is used by the main CPU 63 to specify whether or not the situation is such that it should be used. By setting the game stop flag to "1", a positive determination is made in step S8207 of the first timer interrupt process (FIG. 117), which will be described later, resulting in a situation in which the processes in steps S8208 to S8221 are not executed. As a result, if the power outage flag was not set to "1" because the power outage processing was not performed properly during the previous power outage, the progress of the game will be stopped, and the specific control If the checksums do not match due to a change in the storage state of information in at least one of the work area 221 and the stack area 222 for specific control since the last time the power was shut off, the progress of the game will be stopped. The state will be as follows.

In this case, the memory area that is the subject of calculation when calculating the checksum includes an area (specifically, a setting value counter) in which setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control as described above. Therefore, if an abnormality in the setting value occurs after the previous power outage, the checksum will not match, and the progress of the game will be halted.

On the other hand, even if the game stop flag is set to "1", steps S8202 to S8206 in the first timer interrupt process (Fig. 117) are executed. Therefore, even if the game progress is stopped, power outage monitoring is executed, the hit random number counter C1, the big win type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and further, fraud detection is executed.

Thereafter, an abnormality command indicating that an abnormality has occurred regarding the power failure flag or checksum is transmitted to the audio emission control device 81 at the time of starting supply of operating power (step S7911). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emitting section 53 to emit light in a manner corresponding to the information abnormality at the time of starting supply of operating power, and also issues a message from the speaker section 54 saying, ``Please change the settings.'' ” will be output. Further, a character image "Please change the settings" is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, even if the supply of operating power to the pachinko machine 10 is once stopped, the above notification will not be sent when the supply of operating power to the pachinko machine 10 is resumed until the setting value update process (step S7918) is executed. The configuration may be continued.

When the game progress is stopped, the manager of the game parlor who has confirmed the above notification will temporarily stop the supply of operating power to the pachinko machine 10, and then perform an operation to execute the setting value update process (step S7918) when the supply of operating power to the pachinko machine 10 is resumed. This makes it possible to set new setting values in the setting value update process (step S7918) if an abnormality occurs with the power outage flag or checksum when the supply of operating power begins.

In particular, the memory area that is the subject of calculation when calculating the checksum includes an area (specifically, a setting value counter) in which setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control as described above, so if an abnormality occurs in the checksum, there is a possibility that an abnormality has occurred in the setting value. In response to this, if an abnormality occurs with the checksum as described above, execution of a setting value update process (step S7918) is prompted, making it possible to prevent gameplay from being played with the abnormal setting value.

If the power outage flag is set to "1" and the checksum is normal (steps S7906 and S7909: YES), it is determined whether the setting key insertion section 68a is turned on using the setting key. Then, it is determined whether the front door frame 14 is open to the inner frame 13 and the gaming machine main body 12 is open to the outer frame 11 (step S7913). The front door open sensor 95 is used to detect whether or not the front door frame 14 is open with respect to the inner frame 13, as in the thirtieth embodiment. The main body open sensor 96 is used to detect whether or not it is in the open state, as in the above-mentioned 30th embodiment. The setting key insertion part 68a is turned on using the setting key (step S7912: YES), and the front door frame 14 is open with respect to the inner frame 13, and the gaming machine main body is opened with respect to the outer frame 11. 12 is in the open state (step S7913: YES), a setting confirmation process is executed (step S7914). In the setting confirmation process, the current setting values of the pachinko machine 10 are checked on the first to fourth notification display devices 201 to 204, which are used to display various parameters that are the management results of the game history. A process is executed to display a display indicating the current situation and a display indicating the current setting values of the pachinko machine 10.

Figure 115 is a flowchart showing the setting confirmation process. Note that the processing of steps S8001 to S8003 in the setting confirmation process is executed using a program for specific control and data for specific control in the main CPU 63.

First, a setting confirmation display flag provided in the work area 221 for specific control is set to "1" (step S8001). The setting confirmation display flag is a flag used by the main CPU 63 to specify that the current setting values of the pachinko machine 10 are being confirmed. By setting the setting confirmation display flag to "1", the corresponding display control is performed on the first to fourth notification display devices 201 to 204 in the second timer interrupt process (FIG. 123), which will be described later. be exposed. As a result, the first to fourth notification display devices 201 to 204 display a display indicating that the current setting values of the pachinko machine 10 are being checked, and a display indicating the current setting values of the pachinko machine 10. will be held.

Then, it is determined whether the setting key insertion unit 68a has been turned off using the setting key (step S8002). In this case, it may be configured to determine whether the setting key insertion unit 68a has switched from an ON state to an OFF state, or to determine whether the setting key insertion unit 68a is in an OFF state. If the setting key insertion unit 68a has not been turned off (step S8002: NO), the process of step S8002 is repeated.

If the setting key insertion section 68a is turned off (step S8002: YES), the setting confirmation display flag in the work area 221 for specific control is cleared to "0" (step S8003). As a result, the first to fourth notification display devices 201 to 204 display a display indicating that the current setting values of the pachinko machine 10 are being checked, and a display indicating the current setting values of the pachinko machine 10. The state in which this occurs is canceled. In this case, the first to fourth notification display devices 201 to 204 will start displaying the gaming history management results.

As described above, in this embodiment, the power to the pachinko machine 10 is turned on with the setting key insertion section 68a turned on by the setting key without pressing the reset button 68c. When the supply of operating power to the main CPU 63 starts and the main processing starts, the reset button 68c is not pressed and the setting key insertion section 68a is turned on, and the setting confirmation process is executed in a state in which processing is being executed when the supply of operating power starts, which is the state before the processing that enables the game to progress in the main processing is executed. This makes it possible to check the setting values when no game is being played.

Assuming that the setting value is checked while the game is continuing, for example, if the setting value is checked during the execution of a game round, there is a risk that the transition to the open/close execution mode will occur while the setting value is being checked. In this case, even though the open/close execution mode has started, it may not be possible to launch the game ball toward the special electric winning device 32. Also, if the setting value is checked during the execution of the open/close execution mode, the open/close execution mode will proceed while the setting value is being checked, so in this case too, there is a risk that the game ball will not be able to be launched toward the special electric winning device 32.

Assuming that the progress of the game is stopped when checking the set value, if the check of the set value is started while a game is being played, the progress of the game is stopped midway. There is a risk that the processing for this may become complicated. For example, if confirmation of the set value is started in the middle of a game round and the progress of the game is to be stopped midway, a process for stopping the game round midway is required. In this case, when confirmation of the set value is started, the fluctuating display of the symbol on the symbol display device 41 is stopped midway, and when the confirmation of the set value is completed, the fluctuating display of the symbol on the symbol display device 41 is restarted. If you try to do so, it will require more complicated processing. Further, for example, if confirmation of the set value is started in the middle of execution of the opening/closing execution mode and it is attempted to stop the progress of the game midway, processing for stopping the opening/closing execution mode midway is required. Furthermore, if confirmation of the set value is started during the execution of the fluctuating display of the symbol on the ordinary figure display section 38a and an attempt is made to stop the progress of the game, the process for stopping the fluctuating display of the symbol midway is performed. It becomes necessary. In addition, if confirmation of the set value is started in the middle of execution of the open execution state of the general electric accessory 34a and you try to stop the progress of the game halfway, it is necessary to perform a process to stop the opening execution state in the middle. Become. On the other hand, a configuration in which the set values are confirmed after waiting until all games are finished may be considered, but in this case, the game time, opening/closing execution mode, fluctuating display of symbols in the general figure display section 38a, and general electric winnings It becomes necessary to wait until a situation in which none of the open execution states of the object 34a is executed, and there is a possibility that the waiting time until starting confirmation of the set value becomes long.

On the other hand, when the supply of operating power is started, which is the situation before the processing that allows the game to proceed in the main processing that is executed when the supply of operating power to the main CPU 63 is started, Since the setting confirmation process is executed in a situation where the process is being executed, the setting value is confirmed in a situation where the progress of the game has already been stopped. This makes it possible to prevent setting values from being checked while the game is in progress, as well as to stop the game progress midway when checking the setting values, or to stop the game progress. There is no need to wait until the settings are confirmed. Therefore, it becomes possible to appropriately confirm the setting values.

Returning to the explanation of the main process (FIG. 114), if the reset button 68c is pressed (step S7905: YES), a RAM clear process is executed (step S7915). In the RAM clear process, the specific control work area 221 is cleared to "0" and the initial setting is executed, except for the area (specifically, the setting value counter) in which the setting value information indicating the setting state of the pachinko machine 10 is set in the specific control work area 221. As a result, the area indicating whether the winning/losing lottery mode is the high probability mode or not is cleared to "0", so that the winning/losing lottery mode becomes the low probability mode regardless of the winning/losing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. In addition, the game round is not being executed, and the open/close execution mode is not being executed, and further, the normal map display unit 38a is not displayed in a variable manner and the normal power role 34a is in a closed state. In addition, the reserved storage area 65a and the regular power reserved area 65c provided in the work area 221 for specific control are also cleared to "0", so that the reserved information for the special map display unit 37a and the reserved information for the regular map display unit 38a are erased. In addition, in the RAM clear process, the stack area 222 for specific control is cleared to "0" and initial settings are performed. In addition, in the RAM clear process, various registers of the main CPU 63 are also cleared to "0" and then initial settings are performed. In this initial setting, the same process as the internal function register setting process (step S7902) in step S7902 is performed.

On the other hand, the RAM clearing process does not clear the work area 223 for non-specific control and the stack area 224 for non-specific control to "0". This makes it possible to prevent the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to "0" by the clearing operation performed by the manager of the amusement hall.

Then, it is determined whether the setting key insertion unit 68a has been turned on using the setting key (step S7916), and whether the front door frame 14 is open relative to the inner frame 13 and the gaming machine main body 12 is open relative to the outer frame 11 (step S7917). The front door open sensor 95 is used to detect whether the front door frame 14 is open relative to the inner frame 13, as in the 30th embodiment, and the main body open sensor 96 is used to detect whether the gaming machine main body 12 is open relative to the outer frame 11, as in the 30th embodiment. If the setting key insertion unit 68a has been turned on using the setting key (step S7916: YES), and further, the front door frame 14 is open relative to the inner frame 13 and the gaming machine main body 12 is open relative to the outer frame 11 (step S7917: YES), the setting value update process is executed (step S7918).

Figure 116 is a flowchart showing the setting value update process. Note that the processing of steps S8101 to S8107 in the setting value update process is executed using a program for specific control and data for specific control in the main CPU 63.

First, the setting update display flag provided in the work area 221 for specific control is set to "1" (step S8101). The setting update display flag is a flag for the main CPU 63 to identify that the setting values of the pachinko machine 10 are being updated. By setting the setting update display flag to "1", corresponding display control is performed on the first to fourth alert display devices 201 to 204 in the second timer interrupt process (FIG. 123) described below. As a result, the first to fourth alert display devices 201 to 204 display an indication that the setting values of the pachinko machine 10 are being updated and a display showing the current setting values of the pachinko machine 10.

After that, it is determined whether the value of the setting value counter provided in the work area 221 for specific control is greater than or equal to 1, which corresponds to "setting 1", and less than or equal to 6, which corresponds to "setting 6" (step S8102). If the value of the set value counter is "0" or 7 or more, a negative determination is made in step S8102, and the set value counter is set to "1" (step S8103). As a result, the setting value of the pachinko machine 10 becomes "setting 1."

If an affirmative determination is made in step S8102 or if the process in step S8103 is executed, it is determined whether or not the setting key insertion section 68a is turned off using a setting key (step S8104). In this case, a configuration may be adopted in which it is determined whether the setting key insertion section 68a has been switched from an ON state to an OFF state, or a configuration in which it is determined whether or not the setting key insertion section 68a is in an OFF state may be adopted.

If the setting key insertion section 68a is not turned off (step S8104: NO), and on the condition that the reset button 68c is pressed (step S8105: YES), the setting value counter in the work area 221 for specific control is 1 is added to the value of (step S8106). Thereby, each time the reset button 68c is pressed once, the setting value is updated to one level higher. Further, if the reset button 68c is not pressed (step S8105: NO) or if the value of the set value counter is incremented by 1, the process returns to step S8102, but in step S8102 the value of the set value counter is If it is determined that the value is 7 or more, "1" is set in the set value counter in step S8103. As a result, when the reset button 68c is pressed once in the situation of "Setting 6", the state returns to "Setting 1".

If the setting key insertion section 68a is turned off (step S8104: YES), the setting update display flag in the specific control work area 221 is cleared to "0" (step S8107). As a result, the first to fourth notification display devices 201 to 204 display a display indicating that the setting values of the pachinko machine 10 are being updated and a display indicating the current setting values of the pachinko machine 10. The condition that occurs is canceled. In this case, the first to fourth notification display devices 201 to 204 will start displaying the gaming history management results.

As described above, in this embodiment, the power is turned on to the pachinko machine 10 while pressing the reset button 68c, and the reset is performed in a situation where the supply of operating power to the main CPU 63 is started and the main processing is started. The button 68c is pressed, and the RAM clearing process (step S7915) is executed regardless of whether or not the setting key insertion section 68a is turned on. As a result, the operation of turning on the power of the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clearing process (step S7915), and the RAM clearing process (step S7915) is It becomes possible to make the operation contents for generating the game easy to understand for the game hall manager.

Even if the RAM clear process (step S7915) is executed, the setting value counter in the work area 221 for specific control is not cleared to "0" and the information in the setting value counter is not changed. This makes it possible to prevent the setting value from being changed even if the RAM clear process (step S7915) is executed.

Not only is the power to the pachinko machine 10 turned on while pressing the reset button 68c, but also the setting value update process (step S7918) is executed based on the power being turned on while the setting key insertion section 68a is turned on with the setting key. As already explained, the setting confirmation process (step S7914) is executed based on the power being turned on while the setting key insertion section 68a is turned on with the setting key without pressing the reset button 68c. This makes it possible to make the ON operation of the setting key insertion section 68a a common operation for executing processing related to the setting value. This makes it possible to make the operation content for generating processing related to the setting value easy to understand for the manager of the game hall.

In addition, when turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key, and when pressing the reset button 68c is not added, a setting confirmation process is executed and the reset is performed. When adding a press operation to the button 68c, a setting value update process is executed. Thereby, it becomes possible to change the process to be executed among the setting confirmation process and the setting value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make it easy for the game hall manager to understand the operation details for executing a desired process among the setting confirmation process and the setting value update process. Furthermore, by increasing the number of operations required to execute the setting value update process than the setting confirmation process, it is possible to make it particularly difficult to perform the setting value update process illegally.

Returning to the explanation of the main processing (FIG. 114), if the processing of step S7911 is executed, if a negative judgment is made in step S7912 or step S7913, if the processing of step S7914 is executed, if a negative judgment is made in step S7916 or step S7917, or if the processing of step S7918 is executed, the start-up processing in progress flag in the work area 221 for specific control is cleared to "0" (step S7919). By clearing the start-up processing in progress flag to "0", the state in which various processes set in the first timer interrupt processing are not executed even if the first timer interrupt processing is started is released. Note that in step S7919, the power outage flag in the work area 221 for specific control is also cleared to "0".

Then, a return command is sent to the sound and light control device 81 (step S7920). The return command includes information indicating the number of pending information for the special chart display unit 37a, information indicating the current win/lose lottery mode, information indicating the current support mode, information indicating whether the open/close execution mode is in progress, and information indicating whether a game round is in progress. These pieces of information are set based on the information stored in the work area 221 for specific control. By receiving the return command, the sound and light control device 81 sets the display contents of the pattern display device 41, the light emission contents of the display light-emitting unit 53, and the sound output contents of the speaker unit 54 to contents corresponding to the various information set in the return command.

Here, when checking the setting values of the pachinko machine 10, it is necessary to turn on the power of the pachinko machine 10 while turning on the setting key insertion section 68a with the setting key. In this case, if it becomes necessary to check the setting values during the execution of a game round, for example, the power of the pachinko machine 10 is turned off during the execution of the game round, and then the power of the pachinko machine 10 is turned on while turning on the setting key insertion section 68a with the setting key. In this case, since backup power is not supplied to the RAM provided in the sound and light emission control device 81, when the power of the pachinko machine 10 is turned off, the information for controlling the presentation for the game round in the RAM of the sound and light emission control device 81 is erased. In contrast, because backup power is supplied to the main RAM 65 and the clearing process of the main RAM 65 is not executed when the setting value is confirmed, if the power of the pachinko machine 10 is turned OFF during the execution of a game round and then the power of the pachinko machine 10 is turned ON while the setting key insertion section 68a is turned ON with the setting key, the display of the changing patterns will resume on the special pattern display section 37a after the setting confirmation process is executed, so that a situation will occur in which the pattern display device 41 does not display the changing patterns even though the special pattern display section 37a is displaying the changing patterns.

In response to this, a return command is sent to the audio and light emitting control device 81 after the setting confirmation process is completed, and the return command includes information indicating whether or not a game round is in progress. When the audio and light emitting control device 81 receives the return command, it starts displaying the changing patterns on the pattern display device 41. This makes it possible to prevent a situation in which the pattern display device 41 does not display the changing patterns even though the special pattern display unit 37a is displaying the changing patterns. This display of the changing patterns is performed at a relatively fast speed so that each of the patterns being displayed is indistinguishable or difficult to distinguish for the player. In addition, the return command does not include the results of the win/loss determination process and the allocation determination process for the game round to be resumed, and does not include information indicating the end timing of the game round to be resumed. Therefore, when the sound and light emission control device 81 starts the display of changing patterns on the pattern display device 41 based on a return command, if the game turn to be resumed corresponds to a miss result, when a command indicating the start of the next game turn or a command to start a demo display on the pattern display device 41 is received, the sound and light emission control device 81 ends the display of changing patterns based on the return command and starts a display corresponding to the newly received command, and if the game turn to be resumed corresponds to a jackpot result, when an opening command indicating the start of the open/close execution mode is received, the sound and light emission control device 81 ends the display of changing patterns based on the return command and starts an opening performance.

In addition, if the return command includes information indicating that the opening and closing execution mode is currently being executed, the sound and light emission control device 81 causes the pattern display device 41 to start a display effect indicating that the opening and closing execution mode is in progress. This makes it possible for the player to recognize that the opening and closing execution mode is being executed.

Then, the process proceeds to the remaining process of steps S7921 to S7924. In other words, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123), but there is a remaining time between one timer interrupt process and the next timer interrupt process. This remaining time varies depending on the processing completion time of each timer interrupt process, but this irregular time is used to repeatedly execute the remaining process of steps S7921 to S7924. In this respect, the remaining process of steps S7921 to S7924 can be said to be non-periodic processing that is executed non-periodically. In steps S7921 to S7924, the same processing is executed as steps S113 to S116 of the main process (FIG. 9) in the first embodiment.

Next, the first timer interrupt process executed by the main CPU 63 will be described with reference to the flowchart in FIG. 117. As already explained, the first timer interrupt process is periodically started at a 4 millisecond period, which is the first interrupt period. Also, the program corresponding to the first timer interrupt process is set in the program for specific control.

First, it is determined whether the start-up process flag in the specific control work area 221 is set to "1" (step S8201). As already explained, the start-up processing flag is set to "1" in step S7903 of the main processing (FIG. 114). If the start-up process flag is set to "1" (step S8201: YES), the first timer interrupt process is ended without executing the various processes in steps S8202 to S8221. As a result, when the supply of operating power to the pachinko machine 10 is started and the main processing (FIG. 114) is started, the first timer interrupt processing and the second timer interrupt processing are allowed to be executed early. Even if there is, various processes for controlling the progress of the game are executed in the first timer interrupt process until the process for starting the supply of operating power is completed and execution of the process for controlling the progress of the game is permitted. It is possible to prevent it from being executed.

As already explained, the start-up processing flag is cleared to "0" in step S7919 when the processing at the start of supply of operating power is completed in the main processing (FIG. 114). In the first timer interrupt processing, if the start-up processing flag is not set to "1" (step S8201: NO), the processing from step S8202 onward is executed.

Steps S8202 to S8219 and S8221 execute the same processes as steps S3701 to S3719 of the timer interrupt process (FIG. 69) in the fifteenth embodiment. These processes are executed by the main CPU 63 using a specific control program and specific control data. In this case, as already explained, if it is determined in the main process (FIG. 114) that the power outage flag is not set to "1" (step S7906: NO) or if it is determined that the checksums do not match (step S7909: NO), the game stop flag in the work area 221 for specific control is set to "1" (step S7910). If the game stop flag is set to "1", the first timer interrupt process executes steps S8201 to S8206, but if an affirmative determination is made in step S8207, steps S8208 to S8221 are executed. Not executed. As a result, if the power outage flag was not set to "1" because the power outage processing was not performed properly during the previous power outage, the progress of the game will be stopped, and the specific control If the checksums do not match due to a change in the storage state of information in at least one of the work area 221 and the stack area 222 for specific control since the last time the power was shut off, the progress of the game will be stopped. The state will be as follows. For example, firing of game balls is prohibited by not executing the process of step S8212. Further, since the process of step S8214 is not executed, execution of the game round and opening/closing execution mode is prohibited. Further, since the process of step S8218 is not executed, the payout of game balls is prohibited.

On the other hand, even in such a situation where the progress of the game is stopped, power outage monitoring is executed in step S8202, and the winning random number counter C1, jackpot type counter C2, and reach random number counter C3 are executed in steps S8203 and S8204. The random number initial value counter CINI is updated, and fraud detection in step S8206 is performed.

In the first timer interrupt process, a setting monitoring process is executed in step S8220. FIG. 118 is a flowchart showing the setting monitoring process. Note that the processing in steps S8301 to S8303 in the setting monitoring process is executed using a specific control program and specific control data in the main CPU 63.

By checking the value of the setting value counter in the work area 221 for specific control, it is determined whether the setting value of the pachinko machine 10 is normal (step S8301). Specifically, if the setting value set in the setting value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal. It is determined that there is.

If the set value is abnormal (step S8301: NO), the game stop flag in the work area 221 for specific control is set to "1" (step S8302), similar to step S7910 in the main process (Fig. 114). By setting the game stop flag to "1", a positive judgment is made in step S8207 of the first timer interrupt process (Fig. 117), resulting in a situation in which the processing of steps S8208 to S8221 is not executed. As a result, if it is determined that the set value is abnormal, the progress of the game is stopped. On the other hand, even if the game stop flag is set to "1", the processing of steps S8202 to S8206 in the first timer interrupt process (Fig. 117) is executed, so that even if the progress of the game is stopped, power outage monitoring is executed, and the hit random number counter C1, the big win type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and further fraud detection is executed.

Thereafter, an abnormality command indicating that the set value is abnormal is transmitted to the audio emission control device 81 (step S8303). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emission section 53 to emit light in a manner corresponding to the setting value abnormality, and causes the speaker section 54 to output a voice saying "Please change the settings." . Further, a character image "Please change the settings" is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, even if the supply of operating power to the pachinko machine 10 is once stopped, the supply of operating power to the pachinko machine 10 will resume until the setting value update process (step S7918) of the main process (FIG. 114) is executed. The above-mentioned notification may be continued if the notification is made.

When the manager of the gaming hall confirms the above notification while the game progress is stopped, he or she will temporarily stop the supply of operating power to the pachinko machine 10, and then perform an operation to execute the setting value update process (step S7918) when the supply of operating power to the pachinko machine 10 is resumed. This makes it possible to set new setting values in the setting value update process (step S7918) if a setting value abnormality occurs.

Here, the process of monitoring whether the set value is abnormal is executed by the first timer interrupt process (Fig. 117) which is periodically started. This makes it possible to monitor whether the set value is abnormal even when a game is being played. This makes it possible to prevent play from continuing even if the set value is abnormal. Also, monitoring whether the set value is abnormal is executed every time a monitoring trigger occurs. This makes it possible to increase the frequency of monitoring whether the set value is abnormal.

In the main process (FIG. 114), there is no process for monitoring whether the set value is normal. If the process for monitoring whether the set value is normal is set in the process at the start of the supply of operating power in the main process (FIG. 114), it will be necessary to monitor whether the set value is normal or not in addition to monitoring the power failure flag and checksum at the start of the supply of operating power, which will increase the monitoring load. Furthermore, if it is determined that the set value is abnormal at the start of the supply of operating power, the RAM clear process (step S7915) and the set value update process (step S7918) will be executed, which will complicate the processing configuration. In contrast, since the process for monitoring whether the set value is normal is not set in the main process (FIG. 114), it is possible to make the processing configuration of the process at the start of the supply of operating power suitable. Also, even if the process for monitoring whether the set value is normal is not set in the process at the start of the supply of operating power, since the configuration is such that the setting monitoring process (step S8220) is executed in the first timer interrupt process (FIG. 117) as described above, it is possible to deal with the abnormality of the set value.

In the configuration in which the first timer interrupt processing is executed as described above, in this embodiment, as already explained, there is a second timer interrupt processing (FIG. 123) in addition to the first timer interrupt processing (FIG. 117) as a timer interrupt processing, and the second timer interrupt processing is started by interrupting the first timer interrupt processing even if the first timer interrupt processing is being executed. In this case, although not shown in the first timer interrupt processing, the timer interrupt processing is prohibited and permitted before and after each process of steps S8201 to S8221. For example, the timer interrupt processing is prohibited before executing the lottery random number update processing (step S8203), and the timer interrupt processing is permitted after executing the lottery random number update processing (step S8203). This makes it possible to prevent the second timer interrupt processing from interrupting and starting while the lottery random number update processing is being executed. In addition, the timer interrupt process is prohibited before the special chart special power control process (step S8214) is executed, and the timer interrupt process is permitted after the special chart special power control process (step S8214) is executed. This makes it possible to prevent the second timer interrupt process from interrupting and starting while the special chart special power control process is being executed.

Next, we will explain the configuration for controlling the display of various display units by the main CPU 63. Figure 119 is a block diagram for explaining the configuration for controlling the display of various display units by the main CPU 63.

The objects for which display control is performed by the main CPU 63 include the special chart display unit 37a, the special chart reserved display unit 37b, the regular chart display unit 38a, the regular chart reserved display unit 38b, and the first to fourth notification display devices 201 to 204. All of these are provided as segment display units in which multiple display segments made of LEDs are arranged. These segment display units are illuminated when data corresponding to the illuminated state (for example, data "1", which is one of the binary data values) is set, and are turned off when data corresponding to the unlit state (for example, data "0", which is the other of the binary data values) is set.

The main control board 61 is provided with a first display circuit 261 corresponding to the special chart display unit 37a, a second display circuit 262 corresponding to the special chart reserved display unit 37b, a third display circuit 263 corresponding to the normal chart display unit 38a, a fourth display circuit 264 corresponding to the normal chart reserved display unit 38b, and a fifth display circuit 265 corresponding to the first to fourth notification display devices 201 to 204. Note that in the eleventh embodiment, the main control board 61 is provided with the first to fourth display ICs 205 to 208 in one-to-one correspondence with the first to fourth notification display devices 201 to 204, but in this embodiment, these first to fourth display ICs 205 to 208 are not provided.

The first display circuit 261 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure display section 37a. As a result, each display segment of the special figure display section 37a enters a light-emitting state or a light-off state in a manner corresponding to the display data provided to the first display circuit 261. In this case, although the first display circuit 261 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), after the predetermined period elapses, the display data gradually becomes all "0". This will bring us closer to the state of Therefore, the display segment of the special figure display section 37a, which is in a light emitting state due to the display data provided to the first display circuit 261, has passed a predetermined period without new display data being provided to the first display circuit 261. This will gradually turn off the light. Moreover, with such a configuration, not only when the display content of the special figure display section 37a is changed, but also when the display content of the special figure display section 37a is not changed, the output processing of the previous display data The same display data as the first display circuit 261 is supplied to the first display circuit 261.

The number of display segments provided in the special chart display unit 37a is eight. Therefore, eight bits of data are provided to the first display circuit 261 as display data for controlling the display of the special chart display unit 37a.

The second display circuit 262 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure reservation display section 37b. As a result, each display segment of the special figure pending display section 37b enters a light emitting state or a light extinguishing state in a manner corresponding to the display data provided to the second display circuit 262. In this case, although the second display circuit 262 is able to store and hold the provided display data for a predetermined period (for example, 16 milliseconds), after the predetermined period elapses, the display data gradually becomes all "0". This will bring us closer to the state of Therefore, the display segment of the special figure pending display section 37b that is in a light-emitting state due to the display data provided to the second display circuit 262 remains for a predetermined period without new display data being provided to the second display circuit 262. As time passes, the light will gradually turn off. In addition, with this configuration, not only when the display content of the special figure reservation display section 37b is changed, but also when the display content of the special figure reservation display section 37b is not changed, the previous display data is The same display data as in the output processing time is supplied to the second display circuit 262.

The number of display segments provided in the special figure reservation display section 37b is four. Therefore, 4-bit data is provided to the second display circuit 262 as display data for controlling the display of the special figure pending display section 37b. However, since display data is provided in 8-bit units, 8-bit data is provided even when display data is provided to the second display circuit 262, but 4 bits of that are provided to the special figure pending display section. 37b is used as display data for display control.

The third display circuit 263 provides data corresponding to the supplied display data to each of the plurality of display segments of the general figure display section 38a. As a result, each display segment of the ordinary figure display section 38a is brought into a light-emitting state or a light-out state in a manner corresponding to the display data provided to the third display circuit 263. In this case, although the third display circuit 263 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), after the predetermined period elapses, the display data gradually becomes all "0". This will bring us closer to the state of Therefore, the display segment of the general figure display section 38a that is in a light emitting state due to the display data provided to the third display circuit 263 has passed a predetermined period without new display data being provided to the third display circuit 263. This will gradually turn off the light. Moreover, with such a configuration, not only when the display contents of the general figure display section 38a are changed, but also when the display contents of the ordinary figure display section 38a are not changed, the output processing of the previous display data The same display data as the third display circuit 263 is supplied to the third display circuit 263.

The number of display segments provided in the general map display unit 38a is eight. Therefore, eight bits of data are provided to the third display circuit 263 as display data for controlling the display of the general map display unit 38a.

The fourth display circuit 264 provides data corresponding to the supplied display data to each of the plurality of display segments of the ordinary figure reservation display section 38b. As a result, each display segment of the ordinary figure reservation display section 38b is brought into a light-emitting state or a light-out state in a manner corresponding to the display data provided to the fourth display circuit 264. In this case, although the fourth display circuit 264 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), after the predetermined period elapses, the display data gradually becomes all "0". This will bring us closer to the state of Therefore, the display segment of the regular figure reservation display section 38b, which is in a light emitting state due to the display data provided to the fourth display circuit 264, continues for a predetermined period without new display data being provided to the fourth display circuit 264. As time passes, the light will gradually turn off. Moreover, with this configuration, not only when the display content of the general pattern reservation display section 38b is changed, but also when the display content of the general pattern reservation display section 38b is not changed, the previous display data is The same display data as the output processing time is supplied to the fourth display circuit 264.

The number of display segments provided in the ordinary figure reservation display section 38b is four. Therefore, 4-bit data is provided to the fourth display circuit 264 as display data for controlling the display of the ordinary figure reservation display section 38b. However, since display data is provided in 8-bit units, 8-bit data is provided even when display data is provided to the fourth display circuit 264, but 4 bits of that data are provided to the general figure reservation display section. 38b is used as display data for display control.

The fifth display circuit 265 provides data corresponding to the supplied display data to each of the multiple display segments provided on each of the first to fourth alarm display devices 201 to 204. As a result, each display segment of the first to fourth alarm display devices 201 to 204 is illuminated or turned off in a manner corresponding to the display data provided to the fifth display circuit 265. In this case, the fifth display circuit 265 can store and hold the provided display data for a predetermined period (e.g., 16 milliseconds), but after the predetermined period has passed, the display data gradually approaches an all-zero state. Therefore, the display segments of the first to fourth alarm display devices 201 to 204 that are illuminated by the display data provided to the fifth display circuit 265 gradually turn off as the predetermined period has passed without new display data being provided to the fifth display circuit 265. Furthermore, with this configuration, not only when the display contents of the first to fourth notification display devices 201 to 204 are changed, but also when the display contents of the first to fourth notification display devices 201 to 204 are not changed, the same display data as that of the previous display data output process is supplied to the fifth display circuit 265.

Each of the first to fourth alert display devices 201 to 204 has seven display segments. Display data is provided in 8-bit units. When the display data of the first to fourth alert display devices 201 to 204 is provided to the fifth display circuit 265, 7-bit display data corresponding to the first alert display device 201 is provided as 8-bit data, then 7-bit display data corresponding to the second alert display device 202 is provided as 8-bit data, then 7-bit display data corresponding to the third alert display device 203 is provided as 8-bit data, and finally 7-bit display data corresponding to the fourth alert display device 204 is provided as 8-bit data.

In a configuration in which the first to fifth display circuits 261-265 are provided as described above, the main CPU 63 supplies display data to the display IC 266. In other words, the display ICs 266 are not provided one-to-one with the first to fifth display circuits 261-265, but rather one display IC 266 is provided common to all of the first to fifth display circuits 261-265. When the main CPU 63 supplies display data to the display IC 266, it also supplies type data to the display IC 266 indicating which of the first to fifth display circuits 261-265 the display data corresponds to.

In detail, regarding the electrical connection between the main CPU 63 and the display IC 266, the main CPU 63 and the display IC 266 are connected to a type data signal line LN1, a type clock signal line LN2, a display data signal line LN3, and a display clock signal. It is electrically connected using line LN4. These signal lines LN1 to LN4 are all signal lines for transmitting signals from the main CPU 63 to the display IC 266 by one-way communication.

Type data is transmitted from the main CPU 63 to the display IC 266 by serial communication using the type data signal line LN1. In this case, the delimitation of each bit of type data by serial communication is indicated by the type clock signal transmitted from the main side CPU 63 to the display IC 266 using the type clock signal line LN2. The type data is data indicating which of the first to fifth display circuits 261 to 265 the display data to be transmitted corresponds to. The type data is transmitted as 5-bit data consisting of the first bit to the fifth bit. When the display data corresponds to the first display circuit 261, the first bit becomes HI level and the other bits become LOW level. When the display data corresponds to the second display circuit 262, the second bit becomes HI level and the other bits become LOW level. When the display data corresponds to the third display circuit 263, the third bit becomes HI level and the other bits become LOW level. When the display data corresponds to the fourth display circuit 264, the fourth bit becomes HI level and the other bits become LOW level. When the display data corresponds to the fifth display circuit 265, the fifth bit becomes HI level and the other bits become LOW level.

Display data is transmitted from the main CPU 63 to the display IC 266 by serial communication using the display data signal line LN3. In this case, the delimitation of each bit of display data by serial communication is indicated by a display clock signal transmitted from the main CPU 63 to the display IC 266 using the display clock signal line LN4. The display data is transmitted in 8-bit units consisting of the first to eighth bits.

In the second timer interrupt process (FIG. 123) described later, the main CPU 63 transmits display data corresponding to each of the first to fifth display circuits 261-265 to the display IC 266. In this case, in one processing round of the second timer interrupt process, display data is transmitted to one of the first to fifth display circuits 261-265, and the display circuits 261-265 to which the display data is transmitted are changed one by one each time a new processing round of the second timer interrupt process occurs in the order of the nth display circuit → the n+1th display circuit. In addition, in the second timer interrupt process in the processing round following the processing round in which display data corresponding to the fifth display circuit 265, which is the last in the order, is transmitted, display data corresponding to the first display circuit 261, which is the first in the above order, is transmitted. In addition, in the second timer interrupt process in which display data is sent to one of the first to fourth display circuits 261 to 264, only one 8-bit display data is sent, but in the second timer interrupt process in which display data is sent to the fifth display circuit 265, four 8-bit display data are sent corresponding to the number of the first to fourth notification display devices 201 to 204.

In the configuration in which the main CPU 63 transmits display data as described above, the work area 221 for specific control and the work area 223 for non-specific control include various storage areas that are referenced by the main CPU 63 to transmit display data. is set. FIG. 120(a) is an explanatory diagram for explaining various buffers 271 to 275 provided in the work area 221 for specific control, and FIG. 120(b) is an explanatory diagram for explaining the various buffers 271 to 275 provided in the work area 223 for non-specific control. FIG. 3 is an explanatory diagram for explaining various storage areas 234 and 276.

As shown in FIG. 120(a), the work area 221 for specific control includes a first display data buffer 271, a second display data buffer 272, a third display data buffer 273, a fourth display data buffer 274, A fifth display data buffer 275 is provided.

The first display data buffer 271 stores display data to be supplied to the first display circuit 261. As already explained, the first display circuit 261 is provided in correspondence with the special display unit 37a, so the first display data buffer 271 stores display data for causing the special display unit 37a to perform a predetermined display. In this case, the display data is stored in the first display data buffer 271 in the display control process (step S8216) based on the contents of the special display control process (step S8214) in the first timer interrupt process (FIG. 117). In addition, when the second timer interrupt process (FIG. 123) for transmitting display data to the first display circuit 261 is processed, the display data stored in the first display data buffer 271 is transmitted to the display IC 266 not only when the display data stored in the first display data buffer 271 has been changed, but also when the display data has not been changed.

Display data to be supplied to the second display circuit 262 is stored in the second display data buffer 272 . As already explained, the second display circuit 262 is provided corresponding to the special figure pending display section 37b, so the second display data buffer 272 has a display for causing the special figure pending display section 37b to perform a predetermined display. The data will be stored. In this case, storage of the display data in the second display data buffer 272 is performed in the display control process (step S8216) based on the contents of the special figure special electric train control process (step S8214) in the first timer interrupt process (FIG. 117). . Furthermore, when it comes to the second timer interrupt process (FIG. 123) for transmitting display data to the second display circuit 262, only when the display data stored in the second display data buffer 272 has been changed. Instead, even if the display data has not been changed, the display data stored in the second display data buffer 272 is sent to the display IC 266.

The third display data buffer 273 stores display data to be supplied to the third display circuit 263. As already explained, the third display circuit 263 is provided in correspondence with the normal map display unit 38a, so the third display data buffer 273 stores display data for causing the normal map display unit 38a to perform a specified display. In this case, the display data is stored in the third display data buffer 273 in the display control process (step S8216) based on the contents of the normal map normal power control process (step S8215) in the first timer interrupt process (Figure 117). In addition, when the second timer interrupt process (Figure 123) that transmits display data to the third display circuit 263 is processed, the display data stored in the third display data buffer 273 is transmitted to the display IC 266 not only when the display data stored in the third display data buffer 273 has been changed, but also when the display data has not been changed.

The fourth display data buffer 274 stores display data to be supplied to the fourth display circuit 264. As already explained, the fourth display circuit 264 is provided in correspondence with the ordinary figure pending display section 38b, so the fourth display data buffer 274 contains a display for causing the ordinary figure pending display section 38b to perform a predetermined display. The data will be stored. In this case, storage of the display data in the fourth display data buffer 274 is performed in the display control process (step S8216) based on the contents of the general electric power control process (step S8215) in the first timer interrupt process (FIG. 117). be exposed. Furthermore, when the second timer interrupt processing (FIG. 123) for transmitting display data to the fourth display circuit 264 comes, only when the display data stored in the fourth display data buffer 274 has been changed. Instead, even if the display data has not been changed, the display data stored in the fourth display data buffer 274 is sent to the display IC 266.

The fifth display data buffer 275 stores display data to be supplied to the fifth display circuit 265. As already explained, the fifth display circuit 265 is provided corresponding to the first to fourth alarm display devices 201 to 204, and therefore the fifth display data buffer 275 stores display data for causing the first to fourth alarm display devices 201 to 204 to perform a predetermined display. When the second timer interrupt process for transmitting display data to the fifth display circuit 265 is processed, the display data stored in the fifth display data buffer 275 is transmitted to the display IC 266 not only when the display data stored in the fifth display data buffer 275 has been changed, but also when the display data has not been changed.

The first to fourth notification display devices 201 to 204 display the results of the game history management, and when the setting confirmation process (FIG. 115) or the setting value update process (FIG. 116) is executed, a display corresponding to the current setting value is displayed. In this case, since the fifth display data buffer 275 is provided in the work area 221 for specific control, the process of storing display data in the fifth display data buffer 275 is performed as a process corresponding to specific control. On the other hand, the process of deriving the game history management results is performed as a process corresponding to non-specific control, and the 61st to 68th parameters, which are the results of the game history management, are displayed sequentially on the first to fourth notification display devices 201 to 204.

Therefore, as shown in FIG. 120(b), the work area 223 for non-specific control includes not only the calculation result storage area 234 for storing the 61st to 68th parameters, but also the 61st to 68th parameters. A display target setting area 276 is provided for storing parameters to be displayed on the first to fourth notification display devices 201 to 204. Even in this embodiment, as in the fifteenth embodiment, the period during which the calculation result of one parameter is continuously displayed is 10 seconds. Every second, the calculation results of the parameters to be displayed are read out from the calculation result storage area 234 in accordance with a predetermined display order, and the calculation results of the read parameters are stored in the display target setting area 276. Ru. If the game history management results are to be displayed on the first to fourth notification display devices 201 to 204, a second timer interrupt process (FIG. 123), which is a process corresponding to specific control, is performed. , the display data stored in the display target setting area 276 is read, and the read display data is stored in the fifth display data buffer 275.

On the other hand, when the setting confirmation process (FIG. 115) is being executed, the display data is stored in the fifth display data buffer 275 so that the first to fourth notification display devices 201 to 204 display an indication that the current setting value of the pachinko machine 10 is being confirmed and display an indication of the current setting value of the pachinko machine 10 in the second timer interrupt process (FIG. 123), which is a process corresponding to the specific control. Also, when the setting value update process (FIG. 116) is being executed, the display data is stored in the fifth display data buffer 275 so that the first to fourth notification display devices 201 to 204 display an indication that the setting value of the pachinko machine 10 is being updated and display an indication of the current setting value of the pachinko machine 10 in the second timer interrupt process (FIG. 123), which is a process corresponding to the specific control.

In a configuration in which the first to fifth display data buffers 271 to 275 are provided as described above, the main CPU 63 reads display data from the display data buffers 271 to 275 corresponding to each processing round of the second timer interrupt processing (Figure 123) and transmits the read display data to the display IC 266, while also transmitting type data indicating which of the first to fifth display circuits 261 to 265 the display data corresponds to to the display IC 266. Figure 121 is an explanatory diagram for explaining the electrical configuration of the display IC 266.

As shown in FIG. 121, the display IC 266 includes a type data buffer 281, a selection signal output section 282, a display data buffer 283, and a display data output section 284. The display data buffer 283 stores display data received from the main CPU 63. The display data output unit 284 transmits the display data stored in the display data buffer 283 to the first to fifth display circuits 261 to 265. The type data buffer 281 stores type data received from the main CPU 63. The selection signal output unit 282 outputs a selection signal for specifying the display circuits 261 to 265 corresponding to the type data stored in the type data buffer 281 among the first to fifth display circuits 261 to 265 as display data reception destinations. Output.

Specifically, as shown in FIG. 119, the display IC 266 and the first display circuit 261 are electrically connected using a display signal group 291. The display signal group 291 is provided to make it possible to transmit 8-bit display data at once, and the display data in 8-bit units is transmitted from the display IC 266 by parallel communication. Further, a branch signal group 292 is provided branching off from the display signal group 291, and the branch signal group 292 includes a second display circuit 262, a third display circuit 263, a fourth display circuit 264, and a fifth display circuit 265. electrically connected to each of the Like the display signal group 291, the branch signal group 292 is provided to make it possible to transmit 8-bit display data at once, and the display data in 8-bit units is transmitted from the display IC 266 through parallel communication. Ru.

By providing the display signal group 291 and branch signal group 292 as described above, when the display data stored in the display data buffer 283 is transmitted by the display data output unit 284, the display data is supplied to all of the first to fifth display circuits 261 to 265. In this case, the first to fifth selection signal lines 301 to 305 are provided to specify the display circuits 261 to 265 that should receive and use the supplied display data.

The first selection signal line 301 is provided to electrically connect the display IC 266 and the first display circuit 261. When type data corresponding to the first display circuit 261 is stored in the type data buffer 281, the selection signal output unit 282 of the display IC 266 transmits a first selection signal to the first display circuit 261 through the first selection signal line 301 in order to have the first display circuit 261 receive and use the display data supplied from the display data output unit 284. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the first display circuit 261.

The second selection signal line 302 is provided to electrically connect the display IC 266 and the second display circuit 262. When type data corresponding to the second display circuit 262 is stored in the type data buffer 281, in order to cause the second display circuit 262 to receive and use the display data supplied from the display data output unit 284. , the selection signal output section 282 of the display IC 266 transmits a second selection signal to the second display circuit 262 through the second selection signal line 302. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the second display circuit 262.

The third selection signal line 303 is provided to electrically connect the display IC 266 and the third display circuit 263. When type data corresponding to the third display circuit 263 is stored in the type data buffer 281, the selection signal output unit 282 of the display IC 266 transmits a third selection signal to the third display circuit 263 through the third selection signal line 303 so that the third display circuit 263 receives and uses the display data supplied from the display data output unit 284. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the third display circuit 263.

The fourth selection signal line 304 is provided to electrically connect the display IC 266 and the fourth display circuit 264. When type data corresponding to the fourth display circuit 264 is stored in the type data buffer 281, in order to cause the fourth display circuit 264 to receive and use the display data supplied from the display data output section 284. , the selection signal output section 282 of the display IC 266 transmits a fourth selection signal to the fourth display circuit 264 through the fourth selection signal line 304. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the fourth display circuit 264.

The fifth selection signal line 305 is provided to electrically connect the display IC 266 and the fifth display circuit 265. When type data corresponding to the fifth display circuit 265 is stored in the type data buffer 281, the selection signal output unit 282 of the display IC 266 transmits a fifth selection signal to the fifth display circuit 265 through the fifth selection signal line 305 so that the fifth display circuit 265 receives and uses the display data supplied from the display data output unit 284. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the fifth display circuit 265.

FIG. 122 shows how type data and display data are transmitted from the main CPU 63 to the display IC 266, and the display data transmitted from the display IC 266 is received by the first display circuit 261 or the second display circuit 262. This is a time chart. 122(a) shows the transmission period of the type data signal from the main CPU 63 to the display IC 266, FIG. 122(b) shows the transmission period of the type clock signal from the main CPU 63 to the display IC 266, and FIG. ) shows the transmission period of the display data signal from the main CPU 63 to the display IC 266, FIG. 122(d) shows the transmission period of the display clock signal from the main CPU 63 to the display IC 266, and FIG. 122(f) shows the transmission period of the second selection signal from the display IC 266 to the second display circuit 262, and FIG. It shows the transmission period of display data from the display IC 266 to the first to fifth display circuits 261 to 265. The same applies to the case where display data is received by the third to fifth display circuits 263 to 265.

Type data is transferred from the main CPU 63 to the display IC 266 at timing t1 after the supply of operating power to the pachinko machine 10 including the main CPU 63, display IC 266, and first to fifth display circuits 261 to 265 is started. And transmission of display data is started. Specifically, as shown in FIG. 122(b), a pulse type clock signal is transmitted at each of timing t1, timing t2, timing t3, timing t4, and timing t5. As shown in (a), a pulsed type data signal is transmitted in correspondence with the transmission of the pulsed type clock signal at timing t1. As a result, information corresponding to the first display circuit 261 is stored in the type data buffer 281 of the display IC 266.

As shown in FIG. 122(d), a pulsed display clock signal is transmitted at each of t1, t2, t3, t4, t5, t6, t7, and t8, and a pulsed display data signal is transmitted in response to the transmission of the pulsed display clock signal at each of t2, t3, t5, and t7, as shown in FIG. 122(c). As a result, display data corresponding to the above information format is stored in the display data buffer 283 of the display IC 266.

Then, at the timing of t9, as shown in FIG. 122(d), the transmission of the 8th bit of the display clock signal is completed, and at the timing of t9, as shown in FIG. 122(e), the selection signal output unit 282 of the display IC 266 starts transmitting a first selection signal to the first display circuit 261 corresponding to the type data stored in the type data buffer 281, and at the timing of t9, as shown in FIG. 122(g), the display data output unit 284 of the display IC 266 starts transmitting the display data stored in the display data buffer 283. As a result, the display data is received by the first display circuit 261 and used.

After that, at timing t10, as shown in Figures 122(a) to 122(d), the main CPU 63 starts to transmit new type data and display data to the display IC 266. In this case, at timing t10, as shown in Figures 122(e) and 122(g), the transmission of the first selection signal from the display IC 266 to the first display circuit 261 is stopped, and the transmission of display data from the display IC 266 to the first to fifth display circuits 261 to 265 is stopped.

In detail, regarding the new transmission of type data and display data, as shown in FIG. At the same time as the signal is transmitted, as shown in FIG. 122(a), a pulsed type data signal is transmitted in response to the transmission of the pulsed type clock signal at timing t11. As a result, information corresponding to the second display circuit 262 is stored in the type data buffer 281 of the display IC 266.

As shown in FIG. 122(d), a pulsed display clock signal is transmitted at each of t10, t11, t12, t13, t14, t15, t16, and t17, and as shown in FIG. 122(c), a pulsed display data signal is transmitted in response to the transmission of the pulsed display clock signal at each of t10, t11, t12, t15, t16, and t17. As a result, display data corresponding to the above information format is stored in the display data buffer 283 of the display IC 266.

Then, by completing the transmission of the 8th bit display clock signal as shown in FIG. 122(d) at timing t18, data is stored in the type data buffer 281 as shown in FIG. 122(f) at timing t18. The selection signal output unit 282 of the display IC 266 starts transmitting the second selection signal to the second display circuit 262 corresponding to the type data that has been selected, and at the timing t18, as shown in FIG. 122(g), The display data output unit 284 of the display IC 266 starts transmitting the display data stored in the display data buffer 283. Thereby, the display data is received and used by the second display circuit 262.

Note that for the first to fourth display circuits 261 to 264, only one piece of display data is transmitted in the second timer interrupt processing (FIG. 123) to which display data is transmitted, but for the fifth display circuit 265, only one piece of display data is transmitted. In the second timer interrupt process (FIG. 123) to which display data is to be transmitted, four pieces of display data are transmitted corresponding to the number of first to fourth notification display devices 201 to 204. As already explained, the second timer interrupt process (Fig. 123) is activated at the second interrupt cycle (specifically, 2 milliseconds), but even if it is a process for transmitting four pieces of display data, Each processing time is set so that one processing cycle is completed in less than the second interrupt cycle.

With the above configuration, it becomes possible to transmit display data to a plurality of display circuits 261 to 265 using one display IC 266. Here, as already explained, each of the first to fifth display circuits 261 to 265 is capable of storing and retaining the provided display data for a predetermined period (for example, 16 milliseconds); Then, the display data gradually approaches a state of all "0"s. In this case, if the reception of display data in each of the display circuits 261 to 265 exceeds a predetermined period, the special symbol display section 37a, the special symbol reservation display section 37b, the regular symbol display section 38a, the regular symbol reservation display section 38b, and the Even if the display content is not changed in the first to fourth notification display devices 201 to 204, the display segments that are in the light emitting state will temporarily approach the light-off state, and as a result, the light in the display segments will be reduced. There is a risk that flashing may occur. On the other hand, in this embodiment, in addition to the first timer interrupt process (FIG. 117) that is started at the first interrupt cycle (specifically, 4 milliseconds), a second interrupt process that is shorter than the first interrupt cycle is executed. A second timer interrupt process (FIG. 123) that is activated at a cycle (specifically, 2 milliseconds) is set, and display data is collectively transmitted to the display IC 266 in the second timer interrupt process. .

The second timer interrupt process will be described below with reference to the flowchart of FIG. 123. Note that the processes from step S8401 to step S8413 in the second timer interrupt process are executed using a specific control program and specific control data in the main CPU 63.

First, interrupt prohibition is set to prohibit the occurrence of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8401). By disabling the generation of the first timer interrupt process (Figure 117), the first timer interrupt process (Figure 117) will interrupt the second timer interrupt process (Figure 123) even if the first interrupt cycle has elapsed. It is possible to prevent it from being started. Furthermore, by disabling the second timer interrupt processing (Fig. 123), even if the second interrupt period has elapsed during the execution of the second timer interrupt processing (Fig. 123), the second timer interrupt processing (Fig. 123) is prohibited. It becomes possible to prevent the process (FIG. 123) from being activated redundantly.

Then, it is determined whether the setting update display flag in the work area 221 for specific control is set to "1" (step S8402). The setting update display flag is a flag for the main CPU 63 to determine whether the setting value update process (FIG. 116) is being executed by the main CPU 63. As already explained, the setting value update process (FIG. 116) is executed in a situation where the process at the start of the supply of operating power is being executed in the main process (FIG. 114) when the supply of operating power to the main CPU 63 is started, but the second timer interrupt process (FIG. 123) is started by interrupting even when the process at the start of the supply of operating power is being executed. Therefore, even when the setting value update process (FIG. 116) is being executed by the main CPU 63, the second timer interrupt process (FIG. 123) is started by interrupting.

The situation where the setting update display flag is set to "1" means that the current processing time of the second timer interrupt processing (FIG. 123) is executing the setting value update processing (FIG. 116) in the main CPU 63. This means that the process was started by interrupting the situation. If an affirmative determination is made in step S8402, setting processing for the fifth display data buffer 275 during setting update is executed (step S8403). In the setting process, a display indicating that the setting values of the pachinko machine 10 are being updated and a display indicating the current setting values of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. Display data for the display is stored in the fifth display data buffer 275.

When the display data stored in the fifth display data buffer 275 is transmitted to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 are explained in FIG. 124(a). The display shown in the figure is displayed. Specifically, when a display indicating that the setting value is being updated is displayed on the first to fourth notification display devices 201 to 204, the first to fourth notification display devices 201 to 204 At least one display segment in each is illuminated. In other words, each of the first to fourth notification display devices 201 to 204 is in a display state. As a result, even if a display indicating that the setting value is being updated is displayed, the game hall can be informed that the first to fourth notification display devices 201 to 204 are not malfunctioning. This makes it possible for the administrator to understand the information. Note that even when the gaming history management results are displayed, at least one display segment in each of the first to fourth notification display devices 201 to 204 is in a light emitting state, and the first to fourth notification display devices 201 to 204 are in a light emitting state Each of the display devices 201 to 204 enters a display state.

Regarding the display contents of the first to fourth notification display devices 201 to 204 in detail, in the first notification display device 201, one central display segment is illuminated and the remaining display segments are turned off. Even when the gaming history management results are displayed in the first to fourth notification display devices 201 to 204, one central display segment in the first notification display device 201 may be illuminated, but the display contents of the first notification display device 201 when the gaming history management results are displayed do not include display contents in which one central display segment is illuminated and the remaining display segments are turned off. This makes it possible to use display segments that may be illuminated even when the gaming history management results are displayed, while making the display contents of the first notification display device 201 in a situation where the setting value is being updated display contents that are not displayed in the gaming history management results.

In the second notification display device 202, as in the first notification display device 201, one central display segment is illuminated and the remaining display segments are turned off. Even when the gaming history management results are displayed in the first to fourth notification display devices 201 to 204, one central display segment in the second notification display device 202 may be illuminated, but the display content of the second notification display device 202 when the gaming history management results are displayed does not include display content in which one central display segment is illuminated and the remaining display segments are turned off. This makes it possible to use display segments that may be illuminated even when the gaming history management results are displayed, while making the display content of the second notification display device 202 in a situation where the setting value is being updated display content that is not displayed in the gaming history management results.

In the third notification display device 203, some of the display segments are in a light-emitting state and the remaining display segments are in a light-out state so that the letter "H" is displayed. In this case, the display segments that are in a light-emitting state can be in a light-emitting state even when the game history management results are displayed on the first to fourth notification display devices 201 to 204; The display contents of the third notification display device 203 when displayed do not include the display contents in which the character "H" is displayed. As a result, while using the display segment that can be in a light emitting state even when the management results of the game history are displayed, the display contents of the third notification display device 203 in the situation where the setting value is updated can be changed to the game history. This makes it possible to display content that is not displayed in the management results. Moreover, the display content of the third notification display device 203 in the situation where the set value is being checked does not include the display content in which the character "H" is displayed. Thereby, by displaying "H" on the third notification display device 203, it is possible to notify the game hall manager that the setting value is being updated.

In the fourth alert display device 204, some of the display segments are illuminated and the remaining display segments are turned off to display the current setting value. In the case of FIG. 124(a), the current setting value is "Setting 2", so the fourth alert display device 204 displays "2" corresponding to "Setting 2". By checking the fourth alert display device 204, the manager of the amusement hall can understand the current setting value. Note that the display content of the fourth alert display device 204 when the setting value is being updated can be displayed both in the situation where the game history management results are displayed and in the situation where the setting value is being checked.

Returning to the explanation of the second timer interruption process (FIG. 123), if a negative judgment is made in step S8402, it is judged whether or not the setting confirmation display flag in the work area 221 for specific control is set to "1" (step S8404). The setting confirmation display flag is a flag for the main CPU 63 to determine whether or not the setting confirmation process (FIG. 115) is being executed in the main CPU 63. As already explained, the setting confirmation process (FIG. 115) is executed in a situation where the process at the start of the supply of operating power is being executed in the main process (FIG. 114) when the supply of operating power to the main CPU 63 is started, but the second timer interruption process (FIG. 123) is started by interrupting even in a situation where the process at the start of the supply of operating power is being executed. Therefore, even in a situation where the setting confirmation process (FIG. 115) is being executed in the main CPU 63, the second timer interruption process (FIG. 123) is started by interrupting.

The situation where the setting confirmation display flag is set to "1" means that the main CPU 63 is executing the setting confirmation process (FIG. 115) in the current processing time of the second timer interrupt process (FIG. 123). This means that the process was started by interrupting the situation. If an affirmative determination is made in step S8404, a setting process for the fifth display data buffer 275 during setting confirmation is executed (step S8405). In the setting process, a display indicating that the setting values of the pachinko machine 10 are being checked and a display indicating the current setting values of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. Display data for the display is stored in the fifth display data buffer 275.

When the display data stored in the fifth display data buffer 275 is sent to the fifth display circuit 265 via the display IC 266, the first to fourth display devices 201 to 204 display as shown in the explanatory diagram of FIG. 124(b). Specifically, when the first to fourth display devices 201 to 204 display an indication that the setting value is being updated, at least one display segment is illuminated in each of the first to fourth display devices 201 to 204. In other words, each of the first to fourth display devices 201 to 204 is in a display state. This allows the manager of the amusement hall to know that the first to fourth display devices 201 to 204 are not malfunctioning, even when an indication is being displayed that the setting value is being checked.

In detail, regarding the display contents of each of the first to fourth notification display devices 201 to 204, in the first notification display device 201, one display segment in the center is in a light emitting state and the remaining display segments are in a non-lighting state. becomes. Even if the game history management results are displayed on the first to fourth notification display devices 201 to 204, one display segment in the center of the first notification display device 201 may be in a light emitting state. When the game history management results are displayed, the display content of the first notification display device 201 does not include display content in which one display segment in the center is in a light-emitting state and the remaining display segments are in a light-out state. Not yet. As a result, while using the display segment that can be in a light emitting state even when the management results of the game history are displayed, the display contents of the first notification display device 201 in the situation where the setting value is being checked can be changed to the game history. This makes it possible to display content that is not displayed in the management results.

In the second notification display device 202, like the first notification display device 201, one display segment in the center is in a light emitting state and the remaining display segments are in a non-lighting state. Even if the game history management results are displayed on the first to fourth notification display devices 201 to 204, one display segment in the center of the second notification display device 202 may be in a light emitting state. The display content of the second notification display device 202 when the game history management results are displayed does not include display content in which one display segment in the center is in a light emitting state and the remaining display segments are in a light-off state. Not yet. As a result, while using the display segment that can be in a light emitting state even when the management results of the game history are displayed, the display contents of the second notification display device 202 in the situation where the setting value is being checked can be changed to the game history. This makes it possible to display content that is not displayed in the management results.

The display contents on the first notification display device 201 and the second notification display device 202 are the same whether the setting value is being updated or confirmed. This makes it possible to clearly inform the manager of the gaming hall through the display on the first notification display device 201 and the second notification display device 202 that the display subject on the first to fourth notification display devices 201 to 204 is not the result of game history management but the setting value.

In the third notification display device 203, some of the display segments are in a light-emitting state and the remaining display segments are in a light-out state so that the letter "k" is displayed. In this case, the display segments that are in a light-emitting state can be in a light-emitting state even when the game history management results are displayed on the first to fourth notification display devices 201 to 204; The display contents of the third notification display device 203 when displayed do not include the display contents in which the letter "k" is displayed. As a result, while using the display segment that can be in a light emitting state even when the management results of the game history are displayed, the display contents of the third notification display device 203 in the situation where the setting value is confirmed can be changed to the game history. This makes it possible to display content that is not displayed in the management results. Furthermore, while the setting value is being updated, “H” is displayed on the third notification display device 203, while the setting value is being checked, “k” is displayed on the third notification display device 203. " is displayed. As a result, by checking the display contents of the third notification display device 203, the administrator of the game hall is notified whether the setting value is being updated or the setting value is being confirmed. becomes possible.

In the fourth notification display device 204, some display segments are in a light-emitting state and the remaining display segments are in a light-out state so that a display corresponding to the current set value is performed. In the case of FIG. 124(b), the current setting value is "Setting 2", so "2" corresponding to "Setting 2" is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the game hall manager can grasp the current setting values. Note that the display contents of the fourth notification display device 204 in the situation where the setting values are being checked can be displayed in both the situation where the game history management results are displayed and the situation where the setting values are being updated.

Returning to the explanation of the second timer interrupt process (FIG. 123), if a negative determination is made in step S8404, a setting process for the fifth display data buffer 275 in normal times is executed (step S8406). In this case, information is read from the display target setting area 276 in the work area 223 for non-specific control, and the first to fourth notification display devices 201 to 204 display parameters corresponding to the read information. Display data is stored in the fifth display data buffer 275. By transmitting the display data to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 calculate the current display target parameter among the 61st to 68th parameters. The results will be displayed.

When the processing of step S8403, step S8405, or step S8406 is executed, the transmission state of the signal through the type data signal line LN1 and the type clock signal line LN2 is set to the OFF state (step S8407), and the transmission state of the signal through the display data signal line LN3 and the display clock signal line LN4 is set to the OFF state (step S8408). After that, the type counter provided in the work area 221 for specific control is updated (step S8409).

The type counter is a counter for the main CPU 63 to specify the display data transmission target among the first to fifth display data buffers 271 to 275 in the current processing of the second timer interrupt processing. When the type counter value is "1", the display data of the first display data buffer 271 is the transmission target, when the type counter value is "2", the display data of the second display data buffer 272 is the transmission target, when the type counter value is "3", the display data of the third display data buffer 273 is the transmission target, when the type counter value is "4", the display data of the fourth display data buffer 274 is the transmission target, and when the type counter value is "5", the display data of the fifth display data buffer 275 is the transmission target. In the type counter update processing, the type counter value is incremented by 1, and when the type counter value after the increment exceeds the upper limit value "5", the type counter value is set to "1". As a result, the display data transmission target is changed sequentially among the first to fifth display data buffers 271 to 275 for each processing of the second timer interrupt processing.

Then, the type data corresponding to the value of the type counter is read from the main ROM 64 (step S8410). Specifically, if the type counter value is "1", the type data corresponding to the first display circuit 261 is read from the main ROM 64; if the type counter value is "2", the type data corresponding to the second display circuit 262 is read from the main ROM 64; if the type counter value is "3", the type data corresponding to the third display circuit 263 is read from the main ROM 64; if the type counter value is "4", the type data corresponding to the fourth display circuit 264 is read from the main ROM 64; and if the type counter value is "5", the type data corresponding to the fifth display circuit 265 is read from the main ROM 64.

Thereafter, display data is read from the display data buffers 271 to 275 corresponding to the value of the type counter (step S8411). Specifically, when the value of the type counter is "1", display data is read from the first display data buffer 271, and when the value of the type counter is "2", the display data is read from the second display data buffer 272. The display data is read, and if the value of the type counter is "3", the display data is read from the third display data buffer 273, and if the value of the type counter is "4", the display data is read from the fourth display data buffer 274. The display data is read out, and if the value of the type counter is "5", the display data is read out from the fifth display data buffer 275.

After that, a transmission process of various signals is executed (step S8412). In this transmission process, signals are output to the type data signal line LN1 and the type clock signal line LN2 so that the type data read in step S8410 is transmitted to the display IC 266. In addition, in this transmission process, signals are output to the display data signal line LN3 and the display clock signal line LN4 so that the display data read in step S8411 is transmitted to the display IC 266.

Thereafter, interrupt permission is set to permit the occurrence of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8413).

The present embodiment described above provides the following excellent advantages:

By turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key without pressing the reset button 68c, the supply of operating power to the main CPU 63 is started. In the situation where the main process (FIG. 114) is started, the reset button 68c is not pressed and the setting key insertion part 68a is turned on, and the process that allows the game to proceed is executed in the main process. The setting confirmation process is executed in a situation where the process at the start of supply of operating power is being executed, which is the situation before the operation. This makes it difficult to illegally check the setting values.

Assuming that the setting values are checked while the game continues to progress, for example, if the setting values are checked in the middle of a game round, There is a risk that a transition to the open/close execution mode may occur. In this case, there is a possibility that the game ball cannot be fired toward the special electric winning device 32 even though the opening/closing execution mode has been started. In addition, if the setting value is confirmed during the execution of the opening/closing execution mode, the opening/closing execution mode will proceed under the situation where the setting value is being confirmed. There is a possibility that the game ball will not be able to be launched towards the player.

Assuming that the progress of the game is stopped when checking the set value, if the check of the set value is started while a game is being played, the progress of the game is stopped midway. There is a risk that the processing for this may become complicated. For example, if confirmation of the set value is started in the middle of a game round and the progress of the game is to be stopped midway, a process for stopping the game round midway is required. In this case, when confirmation of the set value is started, the fluctuating display of the symbol on the symbol display device 41 is stopped midway, and when the confirmation of the set value is completed, the fluctuating display of the symbol on the symbol display device 41 is restarted. If you try to do so, it will require more complicated processing. Further, for example, if confirmation of the set value is started in the middle of execution of the opening/closing execution mode and it is attempted to stop the progress of the game midway, processing for stopping the opening/closing execution mode midway is required. Furthermore, if confirmation of the set value is started during the execution of the fluctuating display of the symbol on the ordinary figure display section 38a and an attempt is made to stop the progress of the game, the process for stopping the fluctuating display of the symbol midway is performed. It becomes necessary. In addition, if confirmation of the set value is started in the middle of execution of the open execution state of the general electric accessory 34a and you try to stop the progress of the game halfway, it is necessary to perform a process to stop the opening execution state in the middle. Become. On the other hand, a configuration in which the set values are confirmed after waiting until all games are finished may be considered, but in this case, the game time, opening/closing execution mode, fluctuating display of symbols in the general figure display section 38a, and general electric winnings It becomes necessary to wait until a situation in which none of the open execution states of the object 34a is executed, and there is a possibility that the waiting time until starting confirmation of the set value becomes long.

In contrast to this, the setting confirmation process is executed in a state where the process at the start of the supply of operating power is being executed, which is the state before the process that enables game progress is executed in the main process that is executed when the supply of operating power to the main CPU 63 is started, so the setting value is confirmed in a state where game progress has already been stopped. This makes it possible to avoid checking the setting value while game progress is in progress, and there is no need to stop game progress midway when checking the setting value, or to wait until game progress is stopped to check the setting value. This makes it possible to properly check the setting value.

By turning on the power to the pachinko machine 10 while pressing the reset button 68c, the supply of operating power to the main CPU 63 is started, and the main process (FIG. 114) is started. The reset button 68c is pressed, and the RAM clear process (step S7915) is executed regardless of whether the setting key insertion section 68a is turned on. As a result, the operation of turning on the power to the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clear process (step S7915), and the operation to cause the RAM clear process (step S7915) to occur can be made easy to understand for the manager of the amusement hall.

Even if the RAM clear process (step S7915) is executed, the setting value counter in the work area 221 for specific control is not cleared to "0" and the information in the setting value counter is not changed. This makes it possible to prevent the setting value from being changed even if the RAM clear process (step S7915) is executed.

RAM Not only the clearing process (step S7915) but also the setting value updating process (step S7918) is executed. Furthermore, as described above, the setting confirmation process (step S7914) is performed based on the fact that the power of the pachinko machine 10 is turned on while turning on the setting key insertion part 68a with the setting key without pressing the reset button 68c. is executed. This makes it possible to use the ON operation for the setting key insertion section 68a in common as an operation for executing processing related to setting values. Therefore, it is possible to make the details of the operation for generating the process related to the set value easy for the game hall manager to understand.

When turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key, and when pressing the reset button 68c is not added, a setting confirmation process is executed and the reset button is turned on. When adding the pressing operation 68c, a setting value update process is executed. Thereby, it becomes possible to change the process to be executed among the setting confirmation process and the setting value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make it easy for the game hall manager to understand the operation details for executing a desired process among the setting confirmation process and the setting value update process. Furthermore, by increasing the number of operations required to execute the setting value update process than the setting confirmation process, it is possible to make it particularly difficult to perform the setting value update process illegally.

A process for monitoring whether or not the set value is abnormal is executed in the first timer interrupt process (FIG. 117) that is activated periodically. This makes it possible to monitor whether or not the set value is abnormal even when a game is being played. Therefore, it is possible to prevent the game from being continued even though the set value is abnormal.

Monitoring to determine whether or not the set value is abnormal is performed every time a monitoring opportunity occurs. More specifically, the first timer interrupt process (FIG. 117) is executed every time it is activated. This makes it possible to increase the frequency of monitoring whether or not the set value is abnormal.

The main process (FIG. 114) does not include a process for monitoring whether or not the set value is normal. If a process for monitoring whether the set value is normal or not is set in the process at the start of supply of operating power in the main process (Figure 114), the power failure flag and check sum are set at the start of supply of operating power. In addition to monitoring the settings, it is also necessary to monitor whether the set values are normal or not, which increases the monitoring load. Furthermore, if an attempt is made to execute the RAM clearing process (step S7915) and the setting value update process (step S7918) when it is specified that the set value is abnormal at the start of the supply of operating power, the processing configuration becomes complicated. On the other hand, since the main process (FIG. 114) does not have a process for monitoring whether the set value is normal or not, the process configuration for the process at the start of the supply of operating power is not suitable. It becomes possible to make it a thing. In addition, even if the process to monitor whether the set value is normal or not is not set in the process at the start of the supply of operating power, the setting can be monitored in the first timer interrupt process (Figure 117). Since the configuration executes the process (step S8220), it is possible to deal with the abnormal setting value.

According to the display data transmitted from the main CPU 63, the display IC 266 performs display settings for the first to fifth display circuits 261 to 265, and the display contents of the special chart display unit 37a, the special chart reserved display unit 37b, the ordinary chart display unit 38a, the ordinary chart reserved display unit 38b, and the first to fourth notification display devices 201 to 204 are controlled to correspond to the display data. This makes it possible to reduce the processing load of the main CPU 63. In this case, in a configuration in which multiple display units are provided, such as the special chart display unit 37a, the special chart reserved display unit 37b, the ordinary chart display unit 38a, the ordinary chart reserved display unit 38b, and the first to fourth notification display devices 201 to 204, the display IC 266 is not provided in a one-to-one correspondence with the multiple display units, but one display IC 266 is used for multiple display units. This makes it possible to increase the number of display units to be subject to display control while suppressing an increase in the number of display ICs 266. In addition, the transmission interval of the display data from the main CPU 63 to the display IC 266 is set to a transmission interval that allows the display IC 266 to set the display settings for the display circuits 261-265 corresponding to each display unit before it becomes impossible to maintain the display corresponding to the display data on each display unit. This makes it possible to properly display the display corresponding to the display data on each display unit even in a configuration in which one display IC 266 is shared by multiple display units.

When the main CPU 63 transmits display data to the display IC 266, it transmits type data to the display IC 266 that enables identification of the type of display circuit 261-265 to which the display data is to be set. As a result, when display data is transmitted from the main CPU 63, the display IC 266 sets the display data to the display circuit 261-265 that corresponds to the type data transmitted from the main CPU 63. Therefore, even in a configuration in which one display IC 266 is shared by multiple display units, it is possible to simplify the configuration of the display IC 266.

The main CPU 63 transmits display data so that when one update cycle is such that a plurality of display units are subject to setting display data once in a predetermined order, the update cycle is repeated. I do. Thereby, the main CPU 63 only has to change the display unit to which display data is to be transmitted in accordance with a predetermined order, so that the processing configuration of the main CPU 63 can be simplified.

When a display unit becomes a transmission target, the main CPU 63 transmits display data to that display unit even if the contents of the display data for that display unit are the same as the contents of the display data transmitted the previous time that the display unit was the transmission target. This makes it possible to continue the same display on a specific display unit even in a configuration in which one display IC 266 is shared by multiple display units.

The main CPU 63 executes a process for transmitting display data to the display IC 266 in a second timer interrupt process (FIG. 123) which is activated by interrupting other processes when the second interrupt cycle has started. This makes it possible to set the display data to each display section at a predetermined period. Therefore, even in a configuration in which one display IC 266 is used for multiple display units, before it becomes impossible to maintain the display corresponding to the display data on each display unit, the This allows display data to be set by the display IC 266.

The processing for transmitting display data to the first to fifth display circuits 261 to 265 that are subject to display settings by the display IC 266 is summarized in the second timer interrupt processing (FIG. 123). This makes it possible to set the display data to the first to fifth display circuits 261 to 265 at the same cycle.

The main CPU 63 interrupts other processes and executes the first timer interrupt process (FIG. 117) when the first interrupt period has arrived. In this case, the second interrupt cycle of the second timer interrupt process (FIG. 123) is set to a shorter cycle than the first interrupt cycle of the first timer interrupt process (FIG. 117). This makes it possible to transmit display data in a shorter period than in a configuration in which the process of transmitting display data to the display IC 266 is executed in the first timer interrupt process (FIG. 117).

In addition, a process for transmitting display data to the display IC 266 is set in the second timer interrupt process (Fig. 123), which has a shorter interrupt period than the first timer interrupt process (Fig. 117), in which a process for progressing the game is set. This makes it possible to achieve the excellent effects already described, while allowing the first timer interrupt process (Fig. 117) to be started at an appropriate period for executing the process for progressing the game.

The second timer interrupt process (Fig. 123) is started by interrupting even when the first timer interrupt process (Fig. 117) is being executed. This makes it possible to set the transmission period of the display data to a predetermined period.

When the second timer interrupt processing (FIG. 123) is started, the interrupt of the first timer interrupt processing (FIG. 117) is prohibited, and when the second timer interrupt processing (FIG. 123) is terminated, the first timer interrupt processing (FIG. 117) interrupts are permitted. This makes it possible to prevent the first timer interrupt process (FIG. 117) from being interrupted and executed in a situation where the second timer interrupt process (FIG. 123) is being executed. Therefore, it is possible to prioritize processing for transmitting display data.

The second timer interrupt process (Fig. 123) is started by interrupting the main process (Fig. 114) even when the process at the start of the supply of operating power (steps S7901 to S7918) is being executed. This makes it possible to control the display of multiple display units even when the process at the start of the supply of operating power is being executed. Also, because the second timer interrupt process (Fig. 123) is configured to interrupt and start the process at the start of the supply of operating power, it becomes possible to control the display of multiple display units when the process at the start of the supply of operating power is being executed without complicating the processing configuration of the process at the start of the supply of operating power.

Even when the setting value update process (step S7918) is being executed in the main process (FIG. 114), the second timer interrupt process (FIG. 123) interrupts and is started, and in this situation, the second timer interrupt process (FIG. 123) transmits display data for displaying the current setting value on the fourth alarm display device 204. This makes it possible to display the current setting value on the fourth alarm display device 204 when the setting value update process (step S7918) is being executed without complicating the processing configuration of the main process (FIG. 114).

Even after the process at the start of supply of operating power is executed in the main process (FIG. 114), the second timer interrupt process (FIG. 123) is interrupted and activated every time the second interrupt cycle elapses. As a result, by using the second timer interrupt process (FIG. 123), it is possible to determine both the situation in which the process at the start of the supply of operating power is being executed and the situation after the process at the start of the supply of operating power is completed. Also, it becomes possible to control the display of a plurality of display units.

Note that, as in the first embodiment, an update button 68b is provided, and in the setting value update process (FIG. 116), the setting value may be updated by one step each time the update button 68b is pressed, rather than the reset button 68c being pressed. In addition, when a setting key is inserted into the setting key insertion section 68a and rotated, positions corresponding to "Setting 1" to "Setting 6" are set as rotation positions, and the setting value corresponding to the rotation position of the setting key insertion section 68a may be set. In addition, the setting key insertion section 68a may be configured to be capable of being rotated further than the ON position, and the setting value being updated may be updated to the next setting value in the sequence each time a rotation operation beyond the ON position is performed.

In addition, in the setting value update process (FIG. 116), the setting key insertion section 68a may be turned OFF to confirm the selected setting value, and the setting value update process may be terminated by pressing the reset button 68c. In addition, in a configuration in which the update button 68b is provided, in the setting value update process (FIG. 116), the setting key insertion section 68a may be turned OFF to confirm the selected setting value, and the setting value update process may be terminated by pressing the update button 68b.

Further, as a condition for executing the setting value update process (FIG. 116), the condition that the game machine main body 12 is in an open state may not be set, and the front door frame 14 is in an open state. The configuration may be such that the condition that the gaming machine main body 12 is in the open state and the condition that the front door frame 14 is in the open state are not set.

Further, as a condition for executing the setting confirmation process (FIG. 115), the condition that the game machine main body 12 is in an open state may not be set, and the front door frame 14 is in an open state. The configuration may be such that the condition that the gaming machine main body 12 is in the open state and the condition that the front door frame 14 is in the open state are not set.

In addition, if the main process (FIG. 114) that is executed when the supply of operating power to the main CPU 63 is started determines that the power outage flag is not set to "1" or that the checksum is abnormal, a RAM clear process (step S7915) may be executed. In this case, after the RAM clear process (step S7915) is executed, a setting value update process (step S7918) may be executed, or a notification may be issued indicating that the setting value update process (step S7918) should be executed and the game progress may be stopped, or a process for controlling the game progress may be started.

Also, in place of the configuration in which the setting confirmation process (step S7914) in the main process (FIG. 114) is executed after the process of determining whether the power outage flag is set to "1" and the process of comparing the checksum. , may be configured to be executed before these processes. In this case, it is possible to give priority to the process for confirming the set value.

Further, the setting monitoring process (step S8220) is not limited to a configuration in which the first timer interrupt process (FIG. 117) is executed every time the first timer interrupt process (FIG. 117) is started; for example, the first timer interrupt process (FIG. 117) is The configuration may be such that the setting monitoring process (step S8220) is executed every time it is executed a predetermined number of times (for example, 10,000 times). In this case, it is possible to periodically monitor whether or not the set value is normal, while reducing the frequency with which the monitoring is performed.

The setting monitoring process (step S8220) may also be configured to be executed in the remaining processes (steps S7921 to S7924) in the main process (Figure 114). In this case, it is possible to monitor whether the setting value is normal by utilizing the free time when the first timer interrupt process (Figure 117) and the second timer interrupt process (Figure 123) are not being executed.

Further, a configuration may be adopted in which the setting monitoring process (step S8220) is executed when a new gaming session is started. More specifically, when a game round is newly started, the setting monitoring process (step S8220) may be executed before the validity determination process is executed. This makes it possible to prevent the validity determination process from being executed in a situation where the set value is abnormal.

In addition, if the setting monitoring process (step S8220) identifies an abnormal setting value, the process may proceed to the setting value update process (step S7918).

In addition, if it is specified that the setting value is abnormal in the setting monitoring process (step S8220), the setting abnormality flag provided in the work area 221 for specific control is set to "1" and the main processing Fig. 114) may be configured to start the game, and the progress of the game is stopped with the setting abnormality flag set to "1", and in order to release the stopped state of the game, the power must be turned OFF → A configuration may be adopted in which it is necessary to turn ON. In this case, even if no operation is performed to execute the setting value update process in the main process (Fig. 114), if the setting abnormality flag is set to "1", the setting value is forcibly set. By executing the value update process, it becomes possible to forcibly set a new setting value using the setting value update process set in the main process (FIG. 114).

In addition, the reserved information acquired when the game ball enters the first operating port 33 and the reserved information acquired when the game ball enters the second operating port 34 may be stored separately, and the first special chart display section and the second special chart display section may be provided as the special chart display section 37a corresponding to the reserved information. In this case, the display of the changing pattern in the first special chart display section and the display of the changing pattern in the second special chart display section may be executed in overlapping fashion, and when a predetermined game state is reached, the display of the changing pattern in either one of the special chart display sections may be configured to be extremely long. In this configuration, if the setting value is to be checked until the game is not being played, the waiting time will be long. In response to this, the setting confirmation process (step S7914) is executed in the process at the start of the supply of operating power in the main CPU 63, so that the setting value can be checked without causing the above-mentioned waiting time.

Further, in the low-frequency support mode, the period of time during which the fluctuating display of the pattern on the ordinary figure display section 38a continues may be extremely long. In this configuration, if the player tries to wait to confirm the set value until a situation where no game is being played, the waiting time becomes long. In contrast, by executing the setting confirmation process (step S7914) in the process when the main CPU 63 starts supplying operating power, the setting value can be changed without causing the above-described standby time. It becomes possible to confirm.

Further, the display contents of the first to fourth notification display devices 201 to 204 when the setting confirmation process (FIG. 115) is executed are not limited to the display contents in the above embodiments, and for example, the third notification Instead of displaying the letter "k" on the display device 203, it may be configured such that only the central display segment is in a light emitting state, similar to the first notification display device 201 and the second notification display device 202. . Alternatively, the first to third notification display devices 201 to 203 may be turned off, and the fourth notification display device 204 may display a display corresponding to the current setting value.

In addition, when the setting value update process (FIG. 116) is executed, the display contents of the first to fourth alert display devices 201 to 204 are not limited to those in the above embodiment, and for example, instead of displaying the letter "H" on the third alert display device 203, only the central display segment may be illuminated, as with the first alert display device 201 and the second alert display device 202. Also, the first to third alert display devices 201 to 203 may be turned off, and the fourth alert display device 204 may display a value corresponding to the current setting value.

Further, instead of the configuration in which the main CPU 63 simultaneously transmits the type data and display data to the display IC 266, the main CPU 63 may be configured to start transmitting the display data after starting to transmit the type data. In this case, a configuration may be adopted in which the display data transmission is started during the transmission of the type data, or a configuration in which the display data transmission is started after the type data transmission is completed. Alternatively, the configuration may be such that the transmission of the type data is started after the transmission of the display data is started. In this case, the configuration may be such that the transmission of the type data is started during the transmission of the display data, or the transmission of the type data may be started after the transmission of the display data is completed.

The display IC 266 is not limited to a configuration in which only one display IC 266 is provided so as to be common to the first to fifth display circuits 261 to 265, but may be provided in one-to-one correspondence with each of the first to fifth display circuits 261 to 265. In this configuration, if the period for storing and holding display data in each display IC provided in one-to-one correspondence with the first to fifth display circuits 261 to 265 is short, unintended blinking may occur in each display unit depending on the period for providing display data to each display IC. In response to this, by consolidating the process for transmitting display data in the second timer interrupt process (FIG. 123), which has a relatively short interrupt period as in the above embodiment, it is possible to shorten the period for providing display data to each display IC, and it is possible to prevent unintended blinking from occurring in each display unit.

In addition, instead of a configuration in which the winning random number counter C1 is provided in the main RAM 65, a configuration in which a random number circuit is provided to update the random number obtained in the win/loss determination process may be used. In this case, the internal function register setting process in the main process (Figure 114) will set up the random number of the random number circuit to correspond to the random number obtained in the win/loss determination process.

Further, in the first timer interrupt processing (FIG. 117), the timer interrupt processing is prohibited and the timer interrupt processing is enabled before and after each of steps S8201 to S8221, but this may be changed. For example, for some processing of the first timer interrupt processing (FIG. 117), timer interrupt processing is prohibited and timer interrupt processing is enabled before and after, while other processing of the first timer interrupt processing (FIG. 117) is disabled. In this case, a configuration may be adopted in which prohibition of timer interrupt processing and permission of timer interrupt processing are not performed before and after that. Further, a configuration may be adopted in which a plurality of processes included in the first timer interrupt process (FIG. 117) are interposed, and prohibition of timer interrupt process and permission of timer interrupt process are set.

Also, the first timer interrupt process (FIG. 117) may be configured so that the setting for prohibiting the interrupt of the second timer interrupt process (FIG. 123) is not performed. In this case, the second timer interrupt process (FIG. 123) is executed with priority over the first timer interrupt process (FIG. 117), so it is possible to prioritize display control of multiple display units. Also, in this configuration, the first timer interrupt process (FIG. 117) may be configured so that the interrupt of the first timer interrupt process (FIG. 117) is prohibited to prevent the first timer interrupt process (FIG. 117) from being started multiple times, while the interrupt of the second timer interrupt process (FIG. 123) is not prohibited.

In addition, when an interrupt trigger occurs for both the first timer interrupt processing (FIG. 117) and the second timer interrupt processing (FIG. 123), instead of a configuration in which execution of the second timer interrupt processing (FIG. 123) is prioritized over execution of the first timer interrupt processing (FIG. 117), a configuration in which execution of the first timer interrupt processing (FIG. 117) is prioritized over execution of the second timer interrupt processing (FIG. 123) may be used, or a configuration in which the timer interrupt processing in which the interrupt trigger occurred earlier is started first may be used.

In addition, instead of a configuration in which execution of the first timer interrupt process (FIG. 117) is prohibited when the second timer interrupt process (FIG. 123) is being executed, a configuration in which the first timer interrupt process (FIG. 117) interrupts and is started even when the second timer interrupt process (FIG. 123) is being executed may be used. This makes it possible to prioritize execution of processes for progressing the game over display control of multiple display units.

In addition, the second timer interrupt processing (Figure 123) may not be set, and various processes of the second timer interrupt processing (Figure 123) may be distributed and executed in each of the main processing (Figure 114) and the first timer interrupt processing (Figure 117). For example, the setting confirmation processing (step S7914) in the main processing (Figure 114) may be set to a process for causing the first to fourth alarm display devices 201 to 204 to display an indication that the setting is being confirmed and an indication corresponding to the current setting value. In addition, the setting value update processing (step S7918) in the main processing (Figure 114) may be set to a process for causing the first to fourth alarm display devices 201 to 204 to display an indication that the setting is being updated and an indication corresponding to the current setting value. In addition, the first timer interrupt process (FIG. 117) may be configured to include processing for controlling the display of the special map display unit 37a, the special map reserved display unit 37b, the regular map display unit 38a, the regular map reserved display unit 38b, and the first to fourth notification display devices 201 to 204.

Furthermore, the second timer interrupt processing (FIG. 123) is not limited to a configuration in which only the processing for controlling the display of multiple display units is executed; in addition to the processing for controlling the display of multiple display units, Alternatively or alternatively, a configuration may be adopted in which a process different from the process for controlling the display of the plurality of display units is executed. For example, a part of the processing for advancing the game may be executed in the first timer interrupt process (FIG. 117), and the rest may be executed in the second timer interrupt process (FIG. 123). In this case, a process for which a relatively short execution cycle is preferable is executed in the second timer interrupt process (FIG. 123), which has a relatively short interrupt cycle, and a process that does not cause problems even if the execution cycle is relatively long. It is preferable to have a configuration in which this is executed in the first timer interrupt process (FIG. 117), which has a relatively long interrupt cycle. Further, among the processes from step S8202 to step S8221 in the first timer interrupt process (FIG. 117) of the above embodiment, the power outage information storage process (step S8202) is executed in the second timer interrupt process (FIG. 123), and A configuration may be adopted in which processes other than those described above are executed in the first timer interrupt process (FIG. 117). In this case, power outage monitoring can be repeatedly executed at relatively short intervals. In addition to or in place of this configuration, the fraud detection process (step S8206) is executed in the second timer interrupt process (Figure 123), and other processes are executed in the first timer interrupt process (Figure 117). It is also possible to have a configuration in which In this case, fraud monitoring can be repeatedly executed at relatively short intervals.

The number of display circuits 261-265 for which the display IC 266 performs display setting of display data is not limited to five, and may be two, three, four, six or more. ... is not limited to five, and may be two, three, four, six or more. The number of display circuits 261-265 for which the display IC 266 performs display setting is not limited to five, and may be two, three, four, six or more. The number of display circuits 261-265 for which the display IC 266 performs display setting is not limited to five, and may be two, three, four, six or more. The number of display circuits 261-265 for which the display

<Thirty-fourth embodiment>
In this embodiment, the processing configuration of the set value update process executed by the main CPU 63 is different from that of the 33rd embodiment. The configuration that differs from the 33rd embodiment will be described below. Note that the description of the same configuration as the 33rd embodiment will basically be omitted. In this embodiment, an update button 68b is provided on the main control board 61 as in the first embodiment.

FIG. 125 is a flowchart showing the setting value update process in this embodiment executed by the main CPU 63. Note that the processes from step S8501 to step S8508 in the setting value update process are executed using a specific control program and specific control data in the main CPU 63.

First, the setting update display flag provided in the work area 221 for specific control is set to "1" (step S8501). Then, it is determined whether the value of the setting value counter provided in the work area 221 for specific control is greater than or equal to 1, which corresponds to "setting 1," and less than or equal to 6, which corresponds to "setting 6" (step S8502). If the value of the setting value counter is "0" or greater than or equal to 7, a negative determination is made in step S8502, and the setting value counter is set to "1" (step S8503). As a result, the setting value of the pachinko machine 10 becomes "setting 1."

If an affirmative determination is made in step S8502 or if the process in step S8503 is executed, it is determined whether or not the reset button 68c is pressed (step S8504). If the reset button 68c is not pressed (step S8504: NO), and the update button 68b is pressed (step S8505: YES), the value of the set value counter in the work area 221 for specific control is changed. is added by 1 (step S8506). Thereby, each time the update button 68b is pressed once, the setting value is updated to one level higher. Further, if the update button 68b is not pressed (step S8505: NO) or if the value of the set value counter is incremented by 1, the process returns to step S8502, but in step S8502 the value of the set value counter is If it is determined that the value is 7 or more, "1" is set in the set value counter in step S8503. As a result, when the update button 68b is pressed once in the situation of "Setting 6", the state returns to "Setting 1".

If the reset button 68c has been pressed (step S8504: YES), the current setting value is confirmed and the process proceeds to step S8507. In step S8507, it is determined whether the setting key insertion unit 68a has been turned OFF using the setting key. In this case, it may be configured to determine whether the setting key insertion unit 68a has switched from an ON state to an OFF state, or to determine whether the setting key insertion unit 68a is in an OFF state. If the setting key insertion unit 68a has not been turned OFF (step S8507: NO), the process of step S8507 is executed again.

If the setting key insertion section 68a is turned OFF (step S8507: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S8508).

According to the above configuration, in a configuration where the setting value is updated by pressing the update button 68b, the setting value is determined by pressing the reset button 68c, and the setting key insertion part 68a is turned OFF. This completes the setting value update process. That is, in order to end the setting value updating process after updating the setting value in the setting value updating process, it is necessary not only to turn off the setting key insertion part 68a but also to press the reset button 68c. This makes it possible to make it difficult for the player to attempt to play a game using the set values after the set values have been updated illegally.

<35th embodiment>
This embodiment is different from the thirty-third embodiment described above in the processing configuration regarding display control of the first to fourth notification display devices 201 to 204 executed by the main CPU 63. Hereinafter, configurations that are different from the thirty-third embodiment described above will be explained. Note that descriptions of the same configurations as those in the thirty-third embodiment described above will be basically omitted.

FIG. 126 is an explanatory diagram for explaining the electrical configuration of the calculation result storage area 234 provided in the work area 223 for non-specific control.

Information on the base value calculated by the main CPU 63 is stored in the calculation result storage area 234. The base value is the total number of game balls ejected from the gaming area PA (i.e., the total number of gaming balls supplied to the gaming area PA) in a situation that is neither the opening/closing execution mode based on jackpot results nor the high-frequency support mode. It is the ratio of the total number of game balls paid out.

Regarding the calculation of the base value, in detail, in this embodiment, although a normal counter area 231 is provided in the work area 223 for non-specific control, a counter area 232 for opening/closing execution mode and a counter area 233 for high frequency support mode are provided. is not provided. As in the fifteenth embodiment, the normal counter area 231 includes a general winning counter 231a for normal use, a special electric winning counter 231b for normal use, a first operating counter 231c for normal use, a second operating counter 231d for normal use, and A normal out counter 231e is provided. If one game ball enters the general winning hole 31 in a situation that is neither the opening/closing execution mode based on the jackpot result nor the high-frequency support mode, the value of the general winning counter 231a for normal use is incremented by 1, and the special When one game ball enters the winning device 32, the value of the special electric winning counter 231b for normal use is incremented by 1, and when one game ball enters the first operating port 33, the value of the special electric winning counter 231b for normal use is added. The value of the first operation counter 231c is incremented by 1, and when one game ball enters the second operation port 34, the value of the second operation counter 231d for normal use is incremented by 1, and the value of the second operation counter 231d for normal use is incremented by 1. When one game ball enters, the value of the normal out counter 231e is incremented by 1. Then, when the values of the various counters 231a to 231e in the normal counter area 231 in a situation that is neither the opening/closing execution mode due to the jackpot result nor the high frequency support mode are K91 to K95, the base values are as follows.
・Base value: Total number of game balls paid out (K91 x "Number of prize balls for winning in the general winning opening 31" + K92 x "Number of winning balls for winning in the special electric winning device 32" + K93 x "To the first operating opening 33" Ratio of "number of prize balls for winning a prize" + K94 x "number of prize balls for winning a prize in the second operating port 34")/total number of game balls ejected from the gaming area PA (K91 + K92 + K93 + K94 + K95).

The calculation of the base value is performed each time the result calculation process (Fig. 130) described later is executed in the management process (step S8920) of the first timer interrupt process (Fig. 133) described later. The values of the various counters 231a to 231e in the normal counter area 231 are cleared to "0" when the total number of game balls discharged from the play area PA (i.e., the total number of game balls supplied to the play area PA) becomes the management start reference number in a situation where the management start flag provided in the work area 223 for non-specific control is not set to "1" and the mode is neither the open/close execution mode due to a jackpot result nor the high-frequency support mode, and when the management start flag is set to "1" and the mode is neither the open/close execution mode due to a jackpot result nor the high-frequency support mode, the total number of game balls discharged from the play area PA (i.e., the total number of game balls supplied to the play area PA) becomes the shift reference number.

The management start reference number is set to 300, which is a number less than the shift reference number, as in the fifteenth embodiment. At the shipping stage of the pachinko machine 10, the operation check of the pachinko machine 10 may be performed before shipping, and at that time, game balls are placed in each ball entrance and the subsequent operation is checked. The base value under such a situation may be a value different from the situation in which normal play is performed. Therefore, when the total number of game balls discharged from the play area PA (i.e., the total number of game balls supplied to the play area PA) in a situation in which the management start flag is not set to "1" and the situation is neither the opening and closing execution mode due to a jackpot result nor the high frequency support mode becomes the management start reference number, which is a number less than the shift reference number, the various counters 231a to 231e in the normal counter area 231 are cleared to "0", thereby making it possible to reduce the influence of the above operation check on the base value in a situation in which normal play is performed after the shipment of the pachinko machine 10. The management start threshold number is not limited to 300, but can be any number greater than 300, and may be set to a number less than 300 or more than 300.

The shift reference number is set to 60,000 balls. Since the pachinko machine 10 shoots a maximum of 100 game balls per minute, 60,000 balls is the maximum number of balls shot in 10 hours. In this case, the general business hours of the game hall are about 13 hours, and the time during which games are played in neither the open/close execution mode due to the jackpot result nor the high frequency support mode is about 10 hours. Therefore, the shift reference number is set assuming the maximum number of game balls shot in roughly one business day. By clearing the various counters 231a to 231e in the normal counter area 231 to "0" each time the shift reference number is reached, it is possible to calculate the base value within the range of the shift reference number. Note that the shift reference number is not limited to 60,000 balls and can be any number multiple, and may be set to a number less than 60,000 balls or more than 60,000 balls.

The calculation result storage area 234 is provided with a current area 311, a first history area 312, a second history area 313, and a third history area 314 as storage areas for storing information on the base value. There is. These various areas 311 to 314 all have the same storage capacity, specifically, a capacity of 1 byte so that base value information can be stored.

The current area 311 stores the base value calculated in the most recent result calculation process (FIG. 130). In other words, the latest base value is stored in the current area 311.

The first history area 312 stores the final base value in the previous calculation period. In this case, if the previous calculation period is after the management start flag is set to "1", the first history area 312 stores the base value at the time when the total number of game balls discharged from the game area PA in the previous calculation period in a situation in which the opening and closing execution mode due to a jackpot result and the high-frequency support mode are not in effect (i.e., the total number of game balls supplied to the game area PA) becomes the shift reference number. Also, if the management start flag is set to "1" after the previous calculation period has elapsed, the first history area 312 stores the base value at the time when the total number of game balls discharged from the game area PA in the previous calculation period in a situation in which the opening and closing execution mode due to a jackpot result and the high-frequency support mode are not in effect (i.e., the total number of game balls supplied to the game area PA) becomes the management start reference number.

The second history area 313 stores the final base value for the calculation period two times before. In this case, if the calculation period two times before is a situation after the management start flag was set to "1", the second history area 313 stores the base value at the timing when the total number of game balls discharged from the game area PA in a situation in which neither the opening and closing execution mode due to a jackpot result nor the high-frequency support mode in the calculation period two times before becomes the shift reference number (i.e., the total number of game balls supplied to the game area PA). Also, if the management start flag is set to "1" after the calculation period two times before has elapsed, the second history area 313 stores the base value at the timing when the total number of game balls discharged from the game area PA in a situation in which neither the opening and closing execution mode due to a jackpot result nor the high-frequency support mode in the calculation period two times before becomes the management start reference number.

The third history area 314 stores the final base value in the calculation period three times before. In this case, if the calculation period three times before is a situation after the management start flag was set to "1", the third history area 314 stores the base value at the timing when the total number of game balls discharged from the game area PA in a situation in which neither the opening and closing execution mode due to a jackpot result nor the high-frequency support mode in the calculation period three times before (i.e., the total number of game balls supplied to the game area PA) became the shift reference number. Also, if the management start flag was set to "1" after the calculation period three times before has elapsed, the third history area 314 stores the base value at the timing when the total number of game balls discharged from the game area PA in a situation in which neither the opening and closing execution mode due to a jackpot result nor the high-frequency support mode in the calculation period three times before (i.e., the total number of game balls supplied to the game area PA) became the management start reference number.

The base values stored in the current area 311, first history area 312, second history area 313, and third history area 314 are sequentially notified on the first to fourth notification display devices 201 to 204. Specifically, each time the display duration period (specifically, 5 seconds) elapses, the information is displayed in the predetermined order of current area 311 → first history area 312 → second history area 313 → third history area 314. The base value to be notified is switched, and the switching of the base value to be notified in the predetermined order is repeated.

FIG. 127(a) to FIG. 127(d) are explanatory diagrams for explaining the display contents of the first to fourth notification display devices 201 to 204 when the base values stored in the various areas 311 to 314 are notified in a situation where the management start flag is set to "1". FIG. 127(a) shows an example of the display contents of the first to fourth notification display devices 201 to 204 when the base value stored in the current status area 311 is notified, FIG. 127(b) shows an example of the display contents of the first to fourth notification display devices 201 to 204 when the base value stored in the first history area 312 is notified, FIG. 127(c) shows an example of the display contents of the first to fourth notification display devices 201 to 204 when the base value stored in the second history area 313 is notified, and FIG. 127(d) shows an example of the display contents of the first to fourth notification display devices 201 to 204 when the base value stored in the third history area 314 is notified.

As shown in FIG. 127(a) to FIG. 127(d), each of the first to fourth alarm display devices 201 to 204 has eight display segments 321 to 324. Of the eight display segments 321 to 324, seven of the display segments 321 to 324 are rod-shaped light-emitting areas of the same shape and size, and are arranged to form the number "8". On the other hand, one of the display segments 321 to 324 is a circular light-emitting area, and is provided at the lower right position of the seven display segments 321 to 324 arranged in the shape of the number "8". When reporting any of the base values of the various areas 311 to 314, at least one of the display segments 321 to 324 is in a light-emitting state in each of the first to fourth alarm display devices 201 to 204.

The first notification display device 201 displays a display indicating that the base value is being reported in the first to fourth notification display devices 201 to 204. Specifically, the character "b" is displayed on the first notification display device 201 regardless of the base value of any of the various areas 311 to 314. When information other than the base value is reported on the first to fourth notification display devices 201 to 204, the character “b” is not displayed on the first notification display device 201. As a result, by confirming that the letter "b" is displayed on the first notification display device 201, the game hall manager can check the base on the first to fourth notification display devices 201 to 204. It becomes possible to understand that the value is being reported.

The second notification display device 202 displays which of the various areas 311 to 314 is being reported. Specifically, when the base value of the current status area 311 is being reported, the second notification display device 202 displays the character "L." as shown in FIG. 127(a). When the base value of the first history area 312 is being reported, the second notification display device 202 displays the character "1." as shown in FIG. 127(b). When the base value of the second history area 313 is being reported, the second notification display device 202 displays the character "2." as shown in FIG. 127(c). When the base value of the third history area 314 is being reported, the second notification display device 202 displays the character "3." as shown in FIG. 127(d). This allows the manager of the amusement hall to know which calculation period the base value being reported on the first through fourth notification display devices 201-204 corresponds to by checking the text displayed on the second notification display device 202.

In the second alarm display device 202, the circular display segments 321-324 are illuminated regardless of which of the various areas 311-314 is being notified of the base value. As described below, the third alarm display device 203 and the fourth alarm display device 204 display any of the numbers "0" to "9" as a display corresponding to the base value. In this case, if the second alarm display device 202 displays any of the numbers "1" to "3", three numbers will be lined up in the second to fourth alarm display devices 202-204, making it difficult to grasp the base value. In contrast, by illuminating the circular display segments 321-324 provided at the bottom right of the second alarm display device 202, it becomes possible to distinguish and grasp the number displayed on the second alarm display device 202 from the numbers displayed on the third alarm display device 203 and the fourth alarm display device 204, even if the second alarm display device 202 displays any of the numbers "1" to "3".

On the third notification display device 203 and the fourth notification display device 204, the number of the base value to be notified is displayed. The base value will be calculated as a decimal to the second decimal place, but the first decimal point of the base value will be displayed on the third notification display device 203, and the decimal point of the base value will be The second place number is displayed on the fourth notification display device 204. Here, when the base value is "1.00", the number "0" is displayed on each of the third notification display device 203 and the fourth notification display device 204. On the other hand, if the base value is not yet stored in the areas 311 to 314 targeted for notification, the third notification display device 203 and the fourth notification display device A "-" character is displayed on each of the devices 204. As a result, even when the base value calculated as a decimal to the second decimal place is notified on the two display devices, the third notification display device 203 and the fourth notification display device 204, the base value It is possible to distinguish the display contents between the case where the base value is "1.00" and the case where the base value is not yet stored in the areas 311 to 314 that are the notification targets.

Note that the display contents of the combination of the third notification display device 203 and the fourth notification display device 204 are the same when the base value is “1.00” and when the base value is “0.00”. On the other hand, in order to distinguish between the two, one of the former and the latter may be configured to maintain the light-emitting state of displaying "00", and the other may display "00" in a blinking state.

Next, while referring to the time chart in FIG. 129, the base values of the various areas 311 to 314 are announced on the first to fourth notification display devices 201 to 204 in a situation where the management start flag is set to "1". Explain how it is done. 129(a) shows the period during which the base value stored in the current area 311 is notified on the first to fourth notification display devices 201 to 204, and FIG. 129(b) shows the period in which the base value stored in the current area 311 is FIG. 129(c) shows the period during which the base value stored in the second history area 313 is notified on the first to fourth notification display devices 201 to 204. FIG. 129(d) shows the period during which the base value stored in the third history area 314 is notified on the first to fourth notification display devices 201 to 204. Fig. 129(e) shows the total number of game balls discharged from the game area PA in a situation that is neither the opening/closing execution mode due to the jackpot result nor the high-frequency support mode since the new base value calculation period started. It shows the period until the number (that is, the total number of game balls supplied to the game area PA) reaches the initial reference number (specifically, 6000 balls).

At timing t1, as shown in FIG. 129(a), notification of the base value stored in the current status area 311 is started on the first to fourth notification display devices 201 to 204. During this notification, as shown in FIG. 127(a), the first notification display device 201 displays a display indicating that the base value is the subject of notification, the second notification display device 202 displays a display indicating that the base value stored in the current status area 311 is the subject of notification, and the third notification display device 203 and the fourth notification display device 204 display a display corresponding to the base value stored in the current status area 311.

Here, as shown in FIG. 129(e), the calculation initial display is performed from timing t1 to timing t2. Specifically, the total number of game balls ejected from the gaming area PA (i.e., the gaming area During the period until the total number of game balls supplied to the PA reaches the initial reference number (specifically, 6000 balls), the balls will be displayed on the first notification display device 201 and the second notification display device 202. Rather than continuing to light up the characters, the characters to be displayed are displayed blinking as an initial display of the calculation. Immediately after the calculation period starts, there is little information on the gaming history for calculating the base value, so the actual value of the base value may be a value that deviates significantly from the theoretical value range of the base value. On the other hand, by displaying the initial calculation display immediately after the calculation period starts, it becomes possible for the game hall manager to recognize that the calculation period has just started. .

In addition, in the initial calculation display, the numbers corresponding to the base value are displayed on the third notification display device 203 and the fourth notification display device 204, whereas the first notification display device continues to light up the numbers. 201 and the second notification display device 202, the characters to be displayed are displayed blinking. This makes it possible to notify that the calculation period has just started, without reducing the visibility of the base value. Note that the present invention is not limited to this, and even during the initial calculation display, a blinking display may be performed on at least one of the third notification display device 203 and the fourth notification display device 204. A configuration may be adopted in which a display is performed, or a configuration in which a blinking display is performed only on one of the first notification display device 201 and the second notification display device 202 may be adopted. In addition, the initial standard number is not limited to 6000 pieces, but can be any number as long as it is a plurality of pieces, and may be set to less than 6000 pieces, or even if it is set to more than 6000 pieces. good.

At the timing of t2, the total number of game balls discharged from the gaming area PA in a situation other than the opening/closing execution mode based on the jackpot result or the high-frequency support mode from the timing of t1 (i.e., the total number of gaming balls supplied to the gaming area PA) When the total number (total number) reaches the initial reference number (specifically, 6000), the calculation initial display is ended as shown in FIG. 129(e). Thereby, lighting display is started not only in the third notification display device 203 and the fourth notification display device 204 but also in the first notification display device 201 and the second notification display device 202.

After that, at the time t3, the display duration period from the time t1 has elapsed, and notification of the base value stored in the current state area 311 ends as shown in FIG. 129(a), and notification of the base value stored in the first history area 312 begins as shown in FIG. 129(b). In this case, the base value stored in the first history area 312 is the final calculation result of the base value in the previous calculation period, so the initial calculation display is not performed.

Thereafter, the display continuation period elapses from the timing t3 at the timing t4, and as shown in FIG. 129(b), the notification of the base value stored in the first history area 312 is terminated, and as shown in FIG. ), notification of the base value stored in the second history area 313 is started. In this case, since the base value stored in the second history area 313 is the final base value calculation result in the calculation period two times before, initial calculation display is not performed.

Thereafter, the display duration period elapses from the timing t4 at the timing t5, and as shown in FIG. 129(c), the notification of the base value stored in the second history area 313 is terminated, and as shown in FIG. ), notification of the base value stored in the third history area 314 is started. In this case, since the base value stored in the third history area 314 is the final base value calculation result in the calculation period three times before, initial calculation display is not performed.

After that, at the time t6, the display duration period from the time t5 has elapsed, and as shown in FIG. 129(d), the notification of the base value stored in the third history area 314 ends, and as shown in FIG. 129(a), the notification of the base value stored in the current state area 311 begins. In this case, in order to notify that the period from when the calculation period for the base value has newly started until the total number of game balls discharged from the game area PA in a situation other than the open/close execution mode due to a jackpot result or the high frequency support mode (i.e., the total number of game balls supplied to the game area PA) reaches the initial reference number (specifically, 6,000 balls) is displayed from the time t6 to the time t7, as shown in FIG. 129(e).

Thereafter, as the display duration period elapses from the timing t6 at the timing t8, the notification of the base value stored in the current area 311 is ended as shown in FIG. 129(a), and the display is shown in FIG. 129(b). As shown, notification of the base value stored in the first history area 312 is started. In this case, since the base value stored in the first history area 312 is the final base value calculation result in the previous calculation period, initial calculation display is not performed.

Next, we will explain the processing configuration that enables the base value notification described above.

In the management process (step S8920) in the first timer interrupt process (FIG. 133) described below, a program for the management execution process, which is a process corresponding to non-specific control, is read out in step S3803, similar to the management process (FIG. 70) in the 15th embodiment. Then, in this management execution process (FIG. 71), a check process is executed in step S3908, similar to the 15th embodiment.

In the check process, when one game ball enters the general winning hole 31 in a situation that is neither the opening/closing execution mode based on the jackpot result nor the high-frequency support mode, the normal general winning counter 231a is When one game ball enters the special electric winning device 32, one is added to the value of the normal special electric winning counter 231b, and one game ball enters the first operating port 33. When the entry of a game ball is identified, the value of the first operation counter 231c for normal use is incremented by 1, and when the entry of one game ball into the second operation port 34 is identified, the value of the first operation counter 231c for normal use is increased. The value of the second operation counter 231d is incremented by 1, and when it is specified that one game ball enters the out port 24a, the value of the normal out counter 231e is incremented by 1. Furthermore, in the checking process, result calculation processing and display processing are executed.

FIG. 130 is a flowchart showing the result calculation process. Note that the processing from step S8601 to step S8615 in the result calculation process is executed using a program for non-specific control and data for non-specific control in the main CPU 63.

First, base value calculation processing is executed (step S8601). In this calculation process, a base value is calculated using the values of various counters 231a to 231e in the normal counter area 231. The method of calculating the base value is as described above. Then, the calculated base value is overwritten in the current area 311 (step S8602).

Then, it is determined whether the management start flag provided in the work area 223 for non-specific control is set to "1" (step S8603). The management start flag is set to a value of "0" when the supply of operating power to the pachinko machine 10 is started for the first time after the manufacture of the pachinko machine 10. The value of the management start flag also becomes "0" when the work area 223 for non-specific control is cleared to "0" including the management start flag and initialized. In a situation where the management start flag is set to a value of "0" and the mode is neither the open/close execution mode due to a jackpot result nor the high frequency support mode, the total number of game balls discharged from the game area PA (i.e., the total number of game balls supplied to the game area PA) becomes the management start reference number, and the management start flag is set to "1". In addition, when the management start flag is set to "1", the values of the various counters 231a to 231e in the normal counter area 231 are cleared to "0" and a new calculation period is started. This makes it possible to make it difficult for the influence of operational checks at the shipping stage of the pachinko machine 10 to affect the base value in a situation where normal play is being carried out after the pachinko machine 10 is shipped.

If the determination in step S8603 is negative, the total number is calculated by adding up all the values of the various counters 231a to 231e in the normal counter area 231 (step S8604). Then, it is determined whether the calculated total number is greater than the management start reference number of 300 (step S8605).

If the determination in step S8605 is affirmative, the management start flag is set to "1" (step S8606). Then, data shift processing is executed (step S8607). In the data shift processing, the information stored in the current state area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234 is shifted in the order of the second history area 313 → the third history area 314, the first history area 312 → the second history area 313, and the current state area 311 → the first history area 312. As a result, the final base value in the calculation period two times ago is stored in the third history area 314 as the final base value in the calculation period three times ago, the final base value in the calculation period one time ago is stored in the second history area 313 as the final base value in the calculation period two times ago, and the base value calculated last in the current calculation period is stored in the first history area 312 as the final base value in the calculation period one time ago. In data shift processing, the LDIR command is used to shift information as described above. With the LDIR command, the address of the area from which the information is to be stored and the address of the area to which the information is to be stored are specified, and the information stored in the source area is shifted (copied) to the destination area.

However, in a situation where the management start flag is not set to "1", basically no base value information is stored in the first to third history areas 312 to 314, so in step S8607, management is essentially Only the final base value of the calculation period in a situation where the start flag is not set to "1" is shifted to the first history area 312. Thereafter, all the counters 231a to 231e in the normal counter area 231 are cleared to "0" (step S8608).

If an affirmative determination is made in step S8603, the total number is calculated by summing all the values of the various counters 231a to 231e in the normal counter area 231 (step S8609). Then, it is determined whether the calculated total number is greater than the initial reference number of 6000 (step S8610). If a negative determination is made in step S8610, the calculation initial flag provided in the work area 223 for non-specific control is set to "1" (step S8611), and if an affirmative determination is made in step S8610, the corresponding The calculation initial flag is cleared to "0" (step S8612). The calculation initial flag indicates the total number of game balls ejected from the gaming area PA (i.e., the gaming area This flag is used by the main CPU 63 to specify whether the total number of game balls supplied to the PA has reached the initial reference number.

When the processing of step S8611 or step S8612 is executed, it is determined whether the total number calculated in step S8609 is equal to or greater than the shift reference number of 60,000 (step S8613). If the determination in step S8613 is affirmative, data shift processing is executed (step S8614). In the data shift processing, similar to step S8607, the information stored in the current status area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234 is shifted in the order of the second history area 313 → the third history area 314, the first history area 312 → the second history area 313, and the current status area 311 → the first history area 312. As a result, the final base value for the calculation period two calculations ago is stored in the third history area 314 as the final base value for the calculation period three calculations ago, the final base value for the calculation period one calculation ago is stored in the second history area 313 as the final base value for the calculation period two calculations ago, and the base value calculated last in the current calculation period is stored in the first history area 312 as the final base value for the calculation period one calculation ago. In the data shift process, when shifting information as described above, the LDIR command is used. With the LDIR command, the address of the area from which the information is stored and the address of the area to which the information is to be stored are specified, and the information stored in the area from which the information is stored is shifted (copied) to the area to which the information is to be stored. After that, all of the counters 231a to 231e in the normal counter area 231 are cleared to "0" (step S8615).

Figure 131 is a flowchart showing the display process. Note that steps S8701 to S8714 in the display process are executed using a program for non-specific control and data for non-specific control in the main CPU 63.

First, it is determined whether the management start flag provided in the work area 223 for non-specific control is set to "1" (step S8701). When an affirmative determination is made in step S8701, the value of the switching timing counter provided in the work area 223 for non-specific control is subtracted by 1 (step S8702). The switching timing counter selects the first to fourth notification displays among the base values stored in the current state area 311, first history area 312, second history area 313, and third history area 314 of the calculation result storage area 234, respectively. This counter is used by the main CPU 63 to specify that it is the timing to switch the base value to be notified in the devices 201 to 204. As already explained, each time the display duration period (specifically 5 seconds) elapses, notification is made in the predetermined order of current area 311 → first history area 312 → second history area 313 → third history area 314. The target base value is switched, and the base value to be notified is repeatedly switched in the predetermined order.

When the process of step S8702 is executed, by determining whether the value of the switching timing counter after subtraction by 1 is "0", the base value that is currently the target of notification becomes the target of notification. It is determined whether the display duration period has elapsed since then (step S8703). When an affirmative determination is made in step S8703, the value of the display target counter provided in the work area 223 for non-specific control is incremented by 1 (step S8704). If the value of the display target counter after adding 1 exceeds the maximum value "3" (step S8705: YES), the value of the display target counter is cleared to "0" (step S8706).

The counters to be displayed are the first to fourth notification displays among the base values stored in each of the current area 311, first history area 312, second history area 313, and third history area 314 in the calculation result storage area 234. This counter is used by the main CPU 63 to specify the base value to be notified in the devices 201 to 204. Specifically, when the value of the display target counter is "0", the base value stored in the current area 311 is the target of notification, and when the value of the display target counter is "1", the base value stored in the first history area The base value stored in the second history area 312 becomes the notification target, and when the value of the display target counter is "2", the base value stored in the second history area 313 becomes the notification target, and the value of the display target counter is "3". ”, the base value stored in the third history area 314 becomes the notification target.

If a negative judgment is made in step S8705, or if the processing of step S8706 is executed, a value corresponding to the display duration (specifically, 5 seconds) is set in the switching timing counter of the non-specific control work area 223 as a value corresponding to the next switching timing of the notification target (step S8707).

If a negative determination is made in step S8703, or if the process of step S8707 is executed, a process is executed to set display data corresponding to the base value that is the target of the current notification in the display target setting area 276 provided in the work area 223 for non-specific control. Specifically, display type data corresponding to the value of the display target counter is first set in the display target setting area 276 (step S8708). The display type data includes display data for causing the first notification display device 201 to display an indication that the notification target of the first to fourth notification display devices 201 to 204 is the base value, and display data for causing the second notification display device 202 to display an indication of which of the current status area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234 the base value of the notification target corresponds to.

Then, the base value is read from the area corresponding to the value of the display target counter among the current status area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234, and calculation result data corresponding to the digits in the first decimal place and the digits in the second decimal place in the read base value is set in the display target setting area 276 (step S8709). The calculation result data includes display data for causing the third notification display device 203 to display a number corresponding to the digit in the first decimal place in the base value of the notification target, and display data for causing the fourth notification display device 204 to display a number corresponding to the digit in the second decimal place in the base value of the notification target.

As described above, display data consisting of display type data and calculation result data is set in the display target setting area 276. The display data is sent to the display IC 266 in the second timer interrupt process (FIG. 134) described later, and the first to fourth notification display devices 201 to 204 display data corresponding to the display data.

Further, the process of step S8709 is executed every time the display process (FIG. 131) is executed, regardless of the switching timing of the base value to be notified. As already explained, each time the calculation result storage process (FIG. 130) is executed, the base value is calculated using the current values of each counter 231a to 231e in the normal counter area 231, and the calculated base value is It is stored in the current state area 311 of the calculation result storage area 234. In this case, as described above, the process of step S8709 for setting the calculation result data in the display target setting area 276 is executed every time the display process (FIG. 131) is performed regardless of the switching timing of the base value of the notification target. When the base value of the current area 311 is changed in a situation where the base value of the current area 311 is to be notified, the changed base value can be notified.

Thereafter, it is determined whether the base value of the current area 311 is to be notified based on the value of the display target counter (step S8710), and the calculation initial flag provided in the work area 223 for non-specific control is set to " 1" is set (step S8711). As already explained, the calculation initial flag is the total number of game balls discharged from the game area PA in a situation that is neither the opening/closing execution mode based on the jackpot result nor the high-frequency support mode after the new base value calculation period starts. This flag is used by the main CPU 63 to specify whether or not (that is, the total number of game balls supplied to the game area PA) has reached the initial reference number. If an affirmative determination is made in both step S8710 and step S8711, the initial display flag provided in the work area 223 for non-specific control is set to "1" (step S8712), and either step S8710 or step S8711 is set. If a negative determination is made in step S8713, the initial display flag is cleared to "0".

The initial display flag is a flag for the main CPU 63 to identify a situation in which the first notification display device 201 and the second notification display device 202 should be flashed to notify the user that the base value in the current state area 311 is the target of notification and that the base value is the initial base value calculated after the start of the calculation period. When the second timer interrupt process (FIG. 134) described later identifies that the initial display flag is set to "1", not only is the display data stored in the display target setting area 276 transmitted to the display IC 266, but when the first to fourth notification display devices 201 to 204 are caused to display corresponding to the display data, the first notification display device 201 and the second notification display device 202 are caused to flash and the third notification display device 203 and the fourth notification display device 204 are caused to light up. In addition, if the second timer interrupt process (FIG. 134) described below determines that the initial display flag is not set to "1", when the first to fourth notification display devices 201 to 204 are to display a display corresponding to the display data stored in the display target setting area 276, all of the first to fourth notification display devices 201 to 204 are lit up.

On the other hand, if the management start flag provided in the work area 223 for non-specific control is not set to "1" and a negative determination is made in step S8701, regardless of the value of the display target counter, the current area 311 The base value is read, and calculation result data corresponding to the first decimal place number and the second decimal place number in the read base value are set in the display target setting area 276 (step S8714). By transmitting the display data corresponding to the calculation result data to the display IC 266, the number to the first decimal place in the base value of the current area 311 is displayed on the third notification display device 203, and the base value of the current area 311 is displayed on the third notification display device 203. The second decimal place digit in the value is displayed on the fourth notification display device 204. With the above configuration, in a situation where the management start flag is not set to "1", the base value in the past calculation period will not be reported, and only the base value calculated in the current calculation period will be reported. be done.

In a situation where the management start flag is not set to "1", calculation result data is set in the display target setting area 276, but display type data is not set. Details will be described later, but when the base value is notified in a situation where the management start flag is not set to "1", the display contents of the first notification display device 201 and the second notification display device 202 are The display content is different from the case where the base value is notified in a situation where the start flag is set to "1".

Next, the main processing in this embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. 132. Note that the processing from step S8801 to step S8825 in the main processing is executed using a specific control program and specific control data in the main CPU 63.

First, power-on initial setting processing is executed (step S8801). In the power-on initial setting process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process is started. During this predetermined wait period, the start of operation and initial setting of the symbol display device 41 are completed. Also, access to the main RAM 65 is permitted.

Then, the internal function register setting process is executed (step S8802). In the internal function register setting process, the interrupt period of the first timer interrupt process (FIG. 133), which is a process that periodically interrupts the main process and is started, is set to the first interrupt period (specifically, 4 milliseconds), and the interrupt period of the second timer interrupt process (FIG. 134), which is a process that periodically interrupts the main process and is started, is set to the second interrupt period (specifically, 2 milliseconds), which is shorter than the first interrupt period.

In other words, in this embodiment, as in the 33rd embodiment, there are a first timer interrupt process and a second timer interrupt process so that the interrupt period is relatively long and short as the timer interrupt process. Both the first timer interrupt process and the second timer interrupt process are started by interrupting the main process. Also, the second timer interrupt process is started by interrupting the first timer interrupt process. On the other hand, the first timer interrupt process is not started by interrupting the second timer interrupt process. Also, if both the first interrupt period and the second interrupt period have elapsed in a situation where both the first timer interrupt process and the second timer interrupt process are not being executed, the second timer interrupt process is started first regardless of the order in which the periods have elapsed. In this respect, it can be said that the second timer interrupt process is started with priority over the first timer interrupt process. However, this is not limited to this, and the first timer interrupt process may be started with priority over the second timer interrupt process.

In the internal function register setting process, the first interrupt period of the first timer interrupt process is set in a specified register of the main CPU 63, and the second interrupt period of the second timer interrupt process is set in a specific register of the main CPU 63. In addition to setting the first and second interrupt periods, the internal function register setting process also executes processes for setting the numerical ranges of various counters, such as the numerical range of the winning random number counter C1.

Then, the start-up processing in progress flag provided in the work area 221 for specific control is set to "1" (step S8803). The start-up processing in progress flag is a flag that allows the main CPU 63 to identify a situation in which, even if the first timer interrupt processing is started, the processing for power outage monitoring, updating of various counters, and fraud monitoring among the various processing set in the first timer interrupt processing is executed, but the first timer interrupt processing should be terminated without executing processing for progressing the game.

FIG. 133 is a flowchart showing the first timer interrupt process in this embodiment executed by the main CPU 63. Note that, as already explained, the first timer interrupt process is activated periodically at a 4-millisecond cycle, which is the first interrupt cycle. Further, the program corresponding to the first timer interrupt processing is set as a specific control program.

Steps S8901 to S8905 execute the same processing as steps S301 to S305 of the timer interrupt processing (FIG. 11) in the first embodiment. That is, power outage monitoring is executed by executing power outage information storage processing in step S8901. Specifically, as with the power outage information storage processing (FIG. 101) in the 30th embodiment, it monitors whether a power outage signal corresponding to the occurrence of a power cut is received from the power outage monitoring board 67, and if a power outage is identified, it executes power outage processing and then enters an infinite loop. In the power outage processing, the power outage flag provided in the work area 221 for specific control is set to "1", and a checksum is calculated and the calculated checksum is stored in the work area 221 for specific control. In addition, in step S8902, a random number update process for lottery is executed to update the numerical information of the winning random number counter C1, the big win type counter C2, the reach random number counter C3, and the normal power role opening counter C4. In step S8903, a random number initial value update process is executed to update the numerical information of the random number initial value counter CINI. In step S8904, a counter update process for fluctuation is executed to update the numerical information of the fluctuation type counter CS. In addition, in step S8905, a fraud detection process is executed to monitor whether an event set as a monitoring target for fraud has occurred. In this fraud detection process, the occurrence of multiple types of events is monitored, and if any of these multiple types of events has occurred, the game stop flag provided in the work area 221 for specific control is set to "1".

After executing the processing of steps S8901 to S8905, it is determined whether or not "1" is set to either the game stop flag or the launch processing flag provided in the work area 221 for specific control (step S8906). If "1" is not set to either the game stop flag or the launch processing flag (step S8906: NO), the processing of steps S8907 to S8920 is executed. In steps S8907 to S8919, the same processing as steps S8208 to S8220 of the first timer interrupt processing (FIG. 117) in the 33rd embodiment is executed. In addition, in step S8920, the management processing is executed in the same manner as step S8221 of the first timer interrupt processing (FIG. 117) in the 33rd embodiment, but the contents of the check processing of the management execution processing called in the management processing are the contents already described. This check process executes update processing for each counter 231a to 231e in the normal counter area 231, and also executes result calculation processing (Figure 130) and display processing (Figure 131).

On the other hand, if at least one of the game stop flag and the start-up processing flag is set to "1" (step S8906: YES), the first timer interrupt processing is executed without executing the processing of steps S8907 to S8920. finish. In other words, not only when the game stop flag is set to "1" but also when the start-up processing flag is set to "1", the processing of steps S8901 to S8905 is executed in the first timer interrupt processing. However, the processes in steps S8907 to S8920 are not executed.

As in the 33rd embodiment, the start-up processing flag is set to "1" in the main processing (FIG. 132) before the processing at the start of the supply of operating power (steps S8801 to S8819) is started and the interrupt is permitted (step S8805), and is cleared to "0" before the processing at the start of the supply of operating power ends and the remaining processing (steps S8822 to S8825) is started. In this case, by not executing the processing of steps S8907 to S8920 when the start-up processing flag is set to "1" in the first timer interrupt processing as described above, it is possible to prevent the processing for progressing the game from being executed when the processing at the start of the supply of operating power (steps S8801 to S8819) is being executed. On the other hand, as described above, in the first timer interrupt process, even if the start-up processing in progress flag is set to "1", steps S8901 to S8905 are executed, and power outage monitoring is executed even in a situation where the processing at the start of the supply of operating power (steps S8801 to S8819) is being executed, and the winning random number counter C1, the big win type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and further fraud detection is executed.

In particular, by executing the power outage information storage process (step S8901) even when the start-up process flag is set to "1", the process at the start of the supply of operating power (steps S8801 to S8819) Even if a power outage occurs in a situation where ) is being executed, it is possible to perform power outage processing in response to the power outage. As already explained in the power outage processing, the power outage flag provided in the work area 221 for specific control is set to "1", a checksum is calculated, and the calculated checksum is stored in the work area 221 for specific control. Since the information is stored, it is possible to prevent the occurrence of an abnormality in the main RAM 65 from being identified when the supply of operating power is restarted. As a result, even if a power outage occurs during the setting value update process (step S8819), the setting values selected at that time can be stored and retained as the current setting values of the pachinko machine 10. . Therefore, even if a power outage occurs during execution of the set value update process, there is no need to execute the set value update process again when the supply of operating power is restarted.

By the way, in a situation where the setting value update process is being executed, interrupts are not prohibited for either the first timer interrupt process (Figure 133) or the second timer interrupt process (Figure 134) and can be interrupted at any timing. It is possible. In this case, if the first timer interrupt process (Figure 133) or the second timer interrupt process (Figure 134) interrupts and starts in the main process (Figure 132) including the setting value update process, the activation target Information on the return address of the main process (FIG. 132) for returning after the timer interrupt process has been completed is saved to the stack area 222 for specific control, and the information on the return address of the main process immediately before the timer interrupt process is started is saved. Information in various registers of the CPU 63 is saved in a stack area 222 for specific control. Then, when the timer interrupt processing that has been activated ends, the processing returns to the main processing (FIG. 132) corresponding to the return address information saved in the stack area 222 for specific control, and The information saved in the stack area 222 for specific control is returned to various registers of the main CPU 63.

Returning to the explanation of the main processing (FIG. 132), after setting the start-up processing flag to "1" in step S8803, the initial check period (specific Specifically, a value corresponding to 5 seconds is set (step S8804). In this embodiment, when the supply of operating power to the main CPU 63 is started, each display segment 321 to 324 provided in the first to fourth notification display devices 201 to 204 can normally enter a light emitting state. In order to have the administrator of the game hall confirm whether the game is correct or not, a check display is performed on the first to fourth notification display devices 201 to 204 from the start of the process in step S8804 until the initial check period has elapsed. . Specifically, as the check display, all the display segments 321 to 324 of the first to fourth notification display devices 201 to 204 are maintained in a light emitting state, as shown in the explanatory diagram of FIG. 128(b). . In step S8804, information corresponding to this initial check period is set in the checking counter.

Note that the initial check period is required until the process for controlling the progress of the game is started when none of the processes of step S8811, step S8812, step S8815, and step S8819, which will be described later, are executed in the main process. The time is set longer than the maximum time. Therefore, a game may be started in a situation where a check display is being performed on the first to fourth notification display devices 201 to 204.

Thereafter, interrupt permission is set (step S8805). As a result, the first timer interrupt process (FIG. 133) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 134) is interrupted and activated in the second interrupt cycle. However, since the start-up processing flag is set to "1" in step S8803, even if the first timer interrupt processing is started, out of the various processing of the first timer interrupt processing, power failure monitoring and various counters are While the process for updating and fraud monitoring is executed, the first timer interrupt process is ended without executing the process for advancing the game.

Thereafter, in steps S8806 to S8825, processes similar to steps S7905 to S7924 of the main process (FIG. 114) in the thirty-third embodiment are executed. Specifically, in step S8806, it is determined whether the reset button 68c is pressed. In other words, it is determined whether or not the pachinko machine 10 is powered on while the reset button 68c is pressed and the supply of operating power to the main CPU 63 is started. Here, in this embodiment, like the thirty-third embodiment described above, the main controller 60 is provided with a setting key insertion section 68a and a reset button 68c, but is not provided with an update button 68b. Furthermore, the main control device 60 is provided with first to fourth notification display devices 201 to 204, as in the eleventh embodiment, instead of the first to third notification display devices 69a to 69c.

If the reset button 68c is not pressed (step S8806: NO), it is determined whether the power outage flag provided in the work area 221 for specific control is set to "1" (step S8807). When the power outage process is executed in the power outage information storage process (step S8901) of the first timer interrupt process (FIG. 133), the power outage flag is set to "1". The power outage flag is a flag used by the main CPU 63 to determine whether or not the power outage process was appropriately performed during the previous power shutoff.

If the power outage flag is set to "1" (step S8807: YES), a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step S8808). The checksum calculation method is the same as in the 33rd embodiment. Thereafter, the work area 221 for specific control and the work area 221 for specific control calculated in the power outage process executed immediately before the supply of operating power to the main CPU 63 is stopped and saved in the work area 221 for specific control. The checksum for the stack area 222 is read from the specific control work area 221, and the read checksum is compared with the checksum calculated in step S8808 (step S8809). Then, it is determined whether these checksums match (step S8810).

If a negative judgment is made in step S8807 or step S8810, that is, if the power failure flag is not set to "1" or the checksums do not match, the game stop flag provided in the work area 221 for specific control is set to "1" (step S8811). By setting the game stop flag to "1", the processing of steps S8901 to S8905 is executed in the first timer interrupt processing (FIG. 133), while the processing of steps S8907 to S8920 is not executed by making a positive judgment in step S8906. As a result, if the power failure flag is not set to "1" because the power failure processing was not properly performed at the time of the previous power failure, or if the checksums do not match because the storage state of information has changed since the previous power failure for at least one of the work area 221 for specific control and the stack area 222 for specific control, the processing for power failure monitoring, updating of various counters, and fraud monitoring is executed, but the processing for progressing the game is not executed.

Then, an abnormality command indicating that an abnormality occurred in the power failure flag or checksum at the start of the supply of operating power is sent to the audio and light emission control device 81 (step S8812). By receiving the abnormality command, the audio and light emission control device 81 causes the display light-emitting unit 53 to emit light in a manner corresponding to the information abnormality at the start of the supply of operating power, and causes the speaker unit 54 to output a voice saying "Please change the settings." In addition, a text image saying "Please change the settings" is displayed on the pattern display device 41. These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, even if the supply of operating power to the pachinko machine 10 is temporarily stopped, the above notification may be configured to continue when the supply of operating power to the pachinko machine 10 is resumed until the setting value update process (step S8819) is executed.

If the power failure flag is set to "1" and the checksum is normal (steps S8807 and S8810: YES), it is determined whether the setting key insertion unit 68a has been turned on using the setting key (step S8813), and it is determined whether the front door frame 14 is open relative to the inner frame 13 and the gaming machine main body 12 is open relative to the outer frame 11 (step S8814). The front door open sensor 95 is used to detect whether the front door frame 14 is open relative to the inner frame 13, as in the 30th embodiment, and the main body open sensor 96 is used to detect whether the gaming machine main body 12 is open relative to the outer frame 11, as in the 30th embodiment. If the setting key insertion section 68a is turned on using the setting key (step S8813: YES), and further, the front door frame 14 is open relative to the inner frame 13 and the gaming machine main body 12 is open relative to the outer frame 11 (step S8814: YES), a setting confirmation process is executed (step S8815). Details of the setting confirmation process will be described later.

If the reset button 68c is pressed (step S8806: YES), RAM clear processing is executed (step S8816). The contents of the RAM clearing process are the same as step S7915 of the main process (FIG. 114) in the thirty-third embodiment. Thereafter, the setting key insertion part 68a is turned ON using the setting key (step S8817: YES), and the front door frame 14 is in an open state with respect to the inner frame 13, and the game is not inserted with respect to the outer frame 11. If the machine body 12 is in the open state (step S8818: YES), a setting value update process is executed (step S8819). Details of the setting value update process will be explained later.

When the processing of step S8812 is executed, when a negative judgment is made in step S8813 or step S8814, when the processing of step S8815 is executed, when a negative judgment is made in step S8817 or step S8818, or when the processing of step S8819 is executed, the start-up processing in progress flag in the work area 221 for specific control is cleared to "0" (step S8820). By clearing the start-up processing in progress flag to "0", the state in which processing to progress the game is not executed even if the first timer interrupt processing is started is released. Note that in step S8820, the power outage flag in the work area 221 for specific control is also cleared to "0".

Then, a return command is sent to the audio and light emission control device 81 (step S8821). The information contained in the return command and the processing performed by the audio and light emission control device 81 when the return command is received are the same as those in step S7920 of the main processing (Figure 114) in the 33rd embodiment described above.

Then, the process proceeds to the remaining process of steps S8822 to S8825. In other words, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134), but there is a remaining time between one timer interrupt process and the next timer interrupt process. This remaining time varies depending on the completion time of each timer interrupt process, but this irregular time is used to repeatedly execute the remaining process of steps S8822 to S8825. In this respect, the remaining process of steps S8822 to S8825 can be said to be non-periodic process that is executed non-periodically. In steps S8822 to S8825, the same process is executed as steps S113 to S116 of the main process (FIG. 9) in the first embodiment.

Next, the second timer interrupt process in this embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. 134. Note that the processes from step S9001 to step S9014 in the second timer interrupt process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134) (step S9001). By prohibiting the occurrence of the first timer interrupt processing (FIG. 133), it is possible to prevent the first timer interrupt processing (FIG. 133) from interrupting the second timer interrupt processing (FIG. 134) and starting it up even if the first interrupt period has elapsed. Also, by prohibiting the occurrence of the second timer interrupt processing (FIG. 134), it is possible to prevent the second timer interrupt processing (FIG. 134) from being started up in a duplicate manner even if the second interrupt period has elapsed during the execution of the second timer interrupt processing (FIG. 134).

Thereafter, the checking counter is updated (step S9002). In the process of updating the checking counter, when the value of the checking counter provided in the work area 221 for specific control is 1 or more, the value of the checking counter is subtracted by 1. As a result, when the checking counter is used to measure the initial check period, the value of the checking counter is periodically decremented each time the second timer interrupt process (Figure 134) is started. The Rukoto.

Thereafter, it is determined whether the setting update display flag in the specific control work area 221 is set to "1" (step S9003). The setting update display flag is a flag for the main CPU 63 to specify whether or not the main CPU 63 is executing the setting value update process (FIG. 137). As already explained, the setting value update process (FIG. 137) is performed in the main process (FIG. 132) when the supply of operating power to the main CPU 63 is started, when the process at the time of starting the supply of operating power is being executed. However, since the second timer interrupt process (FIG. 134) is started by interrupting even when the process at the start of the supply of operating power is being executed, it is necessary to set it in the main CPU 63. Even if the value update process (FIG. 137) is being executed, the second timer interrupt process (FIG. 134) is activated by interruption.

The situation where the setting update display flag is set to "1" means that the current processing time of the second timer interrupt processing (FIG. 134) is executing the setting value update processing (FIG. 137) in the main CPU 63. This means that the process was started by interrupting the situation. If an affirmative determination is made in step S9003, a setting process for the fifth display data buffer 275 during setting update is executed (step S9004). In this setting process, similarly to step S8403 of the second timer interrupt process (FIG. 123) in the thirty-third embodiment, the setting values of the pachinko machine 10 are updated on the first to fourth notification display devices 201 to 204. Display data for displaying the current setting value of the pachinko machine 10 and displaying the current setting value of the pachinko machine 10 are stored in the fifth display data buffer 275. As a result, similarly to the thirty-third embodiment, the first to fourth notification display devices 201 to 204 display a display indicating that the setting value is being updated and a display indicating the current setting value. will be held.

If a negative determination is made in step S9003, it is determined whether the setting confirmation display flag in the specific control work area 221 is set to "1" (step S9005). The setting confirmation display flag is a flag used by the main CPU 63 to specify whether or not the main CPU 63 is executing the setting confirmation process (FIG. 136). As already explained, the setting confirmation process (FIG. 136) is executed in the main process (FIG. 132) when the supply of operating power to the main CPU 63 is started. However, since the second timer interrupt process (FIG. 134) is started by interrupting even when the process at the start of the supply of operating power is being executed, it is necessary to set it in the main CPU 63. Even if the confirmation process (FIG. 136) is being executed, the second timer interrupt process (FIG. 134) is activated by interruption.

The situation in which the setting confirmation display flag is set to "1" means that the main CPU 63 is executing the setting confirmation process (FIG. 137) in the current processing time of the second timer interrupt process (FIG. 134). This means that the process was started by interrupting the situation. If an affirmative determination is made in step S9005, a setting process for the fifth display data buffer 275 during setting confirmation is executed (step S9006). In this setting process, similarly to step S8405 of the second timer interrupt process (FIG. 123) in the thirty-third embodiment, the setting values of the pachinko machine 10 are checked on the first to fourth notification display devices 201 to 204. Display data for displaying the current setting value of the pachinko machine 10 and displaying the current setting value of the pachinko machine 10 are stored in the fifth display data buffer 275. As a result, similarly to the thirty-third embodiment, the first to fourth notification display devices 201 to 204 display a display indicating that the setting value is being checked and a display indicating the current setting value. will be held.

If the determination in step S9005 is negative, normal setting processing is executed (step S9007). The normal setting processing will be described in detail later.

When the processing of step S9004, step S9006, or step S9007 has been executed, the processing of steps S9008 to S9014 is executed. The processing content of these steps S9008 to S9014 is the same as steps S8407 to S8413 of the second timer interrupt processing (FIG. 123) in the 33rd embodiment.

Specifically, first, the transmission state of the signal through the type data signal line LN1 and the type clock signal line LN2 is turned off (step S9008), and the signal is transmitted through the display data signal line LN3 and the display clock signal line LN4. The state is set to OFF state (step S9009). Thereafter, the type counter provided in the work area 221 for specific control is updated (step S9010).

The type counter is a counter for the main CPU 63 to specify the display data transmission target among the first to fifth display data buffers 271 to 275 in the current processing of the second timer interrupt processing. When the type counter value is "1", the display data of the first display data buffer 271 is the transmission target, when the type counter value is "2", the display data of the second display data buffer 272 is the transmission target, when the type counter value is "3", the display data of the third display data buffer 273 is the transmission target, when the type counter value is "4", the display data of the fourth display data buffer 274 is the transmission target, and when the type counter value is "5", the display data of the fifth display data buffer 275 is the transmission target. In the type counter update processing, the type counter value is incremented by 1, and when the type counter value after the increment exceeds the upper limit value "5", the type counter value is set to "1". As a result, the display data transmission target is changed sequentially among the first to fifth display data buffers 271 to 275 for each processing of the second timer interrupt processing.

Thereafter, type data corresponding to the value of the type counter is read from the main ROM 64 (step S9011). Specifically, when the value of the type counter is "1", the type data corresponding to the first display circuit 261 is read from the main side ROM 64, and when the value of the type counter is "2", the type data corresponding to the first display circuit 261 is read from the main side ROM 64; The type data corresponding to the display circuit 262 is read from the main side ROM 64, and when the value of the type counter is "3", the type data corresponding to the third display circuit 263 is read from the main side ROM 64, and the value of the type counter is When the value of the type counter is "4", the type data corresponding to the fourth display circuit 264 is read from the main side ROM 64, and when the value of the type counter is "5", the type data corresponding to the fifth display circuit 265 is read from the main side ROM 64. Read from the side ROM 64.

Thereafter, display data is read from the display data buffers 271 to 275 corresponding to the value of the type counter (step S9012). Specifically, when the value of the type counter is "1", display data is read from the first display data buffer 271, and when the value of the type counter is "2", the display data is read from the second display data buffer 272. The display data is read, and if the value of the type counter is "3", the display data is read from the third display data buffer 273, and if the value of the type counter is "4", the display data is read from the fourth display data buffer 274. The display data is read out, and if the value of the type counter is "5", the display data is read out from the fifth display data buffer 275.

After that, a transmission process of various signals is executed (step S9013). In this transmission process, signals are output to the type data signal line LN1 and the type clock signal line LN2 so that the type data read in step S9011 is transmitted to the display IC 266. In addition, in this transmission process, signals are output to the display data signal line LN3 and the display clock signal line LN4 so that the display data read in step S9012 is transmitted to the display IC 266.

Thereafter, interrupt permission is set to permit the occurrence of the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) (step S9014).

Figure 135 is a flowchart showing the normal setting process in step S9007 of the second timer interrupt process (Figure 134). Note that the processes in steps S9101 to S9109 in the normal setting process are executed by the main CPU 63 using a program for specific control and data for specific control.

First, it is determined whether the value of the check counter provided in the work area 221 for specific control is 1 or more (step S9101). If the value of the check counter is 1 or more (step S9101: YES), it means that it is the initial check period. In this case, the data of the check display is set in the fifth display data buffer 275 in the work area 221 for specific control (step S9102). As already explained, the display data set in the fifth display data buffer 275 is display data for display control of the first to fourth alarm display devices 201 to 204. In addition, the data of the check display is display data for causing the first to fourth alarm display devices 201 to 204 to perform the check display, that is, display data for making all the display segments 321 to 324 in each of the first to fourth alarm display devices 201 to 204 emit light. When the check display data is supplied to the display IC 266, as shown in the explanatory diagram of FIG. 128(b), all display segments 321-324 in each of the first through fourth alert display devices 201-204 are illuminated as a check display. This allows the amusement hall manager to know whether each of the display segments 321-324 in the first through fourth alert display devices 201-204 can be illuminated normally.

The initial check period can be cancelled when checking the settings or updating the settings. Such a cancellation configuration will be described below. Figure 136 is a flowchart showing the setting confirmation process executed in step S8815 of the main process (Figure 132). Note that steps S9201 to S9206 in the setting confirmation process are executed using a program for specific control and data for specific control in the main CPU 63.

First, an operation instruction command is transmitted to the audio emission control device 81 (step S9201). Upon receiving the operation instruction command, the audio emission control device 81 causes the speaker section 54 to output a voice saying "Please operate the reset button 68c." The notification continues until the reset button 68c is pressed.

Thereafter, it is determined whether the reset button 68c has been pressed (step S9202). If the reset button 68c is not pressed, the process waits in step S9202. When the reset button 68c is pressed (step S9202: YES), the checking counter provided in the work area 221 for specific control is cleared to "0" (step S9203). This cancels the initial check period.

Thereafter, the setting confirmation display flag provided in the work area 221 for specific control is set to "1" (step S9204). By setting the setting confirmation display flag to "1", in the second timer interrupt process (FIG. 134), an affirmative determination is made in step S9005 as already explained, and the first to fourth notification display devices 201 to In step 204, display data for displaying that the setting values of the pachinko machine 10 are being checked and displaying the current setting values of the pachinko machine 10 is stored in the fifth display data buffer 275. (Step S9006). As a result, similarly to the thirty-third embodiment, the first to fourth notification display devices 201 to 204 display a display indicating that the setting value is being checked and a display indicating the current setting value. will be held.

Thereafter, on the condition that the setting key insertion section 68a is turned off (step S9205: YES), the setting confirmation display flag in the work area 221 for specific control is cleared to "0" (step S9206). As a result, the first to fourth notification display devices 201 to 204 display a display indicating that the current setting values of the pachinko machine 10 are being checked, and a display indicating the current setting values of the pachinko machine 10. The state in which this occurs is canceled. In this case, the first to fourth notification display devices 201 to 204 start displaying the base value.

When the setting confirmation process is started as described above, on condition that the reset button 68c is pressed, the initial check period is canceled midway and the current status is displayed on the first to fourth notification display devices 201 to 204. The setting value will be announced. As a result, when the supply of operating power to the main CPU 63 is started and the main processing (FIG. 132) is started in the main CPU 63, the processing at the time of starting the supply of operating power in the main processing is executed. Even if the configuration is such that the initial check period is started in the situation where the check display is performed on the first to fourth notification display devices 201 to 204, the process at the start of supply of operating power is not executed. When checking the set values in a situation where the current set values are to be confirmed, it is possible to cancel the initial check period and display the current set values on the first to fourth notification display devices 201 to 204. Therefore, it is possible to check the set value without waiting for the initial check period to elapse.

Furthermore, even if the setting confirmation process (FIG. 136) is executed in the main process (FIG. 132), the initial check period starts first, so the first to fourth notification display devices 201 to 204 It is possible to check the set value after checking whether each of the display segments 321 to 324 can normally be in a light emitting state. This makes it possible to accurately check the set values.

Figure 137 is a flowchart showing the setting value update process executed in step S8819 of the main process (Figure 132). Note that the processing in steps S9301 to S9310 in the setting value update process is executed using a program for specific control and data for specific control in the main CPU 63.

First, an update start command is sent to the audio emission control device 81 (step S9301). Upon receiving the update start command, the audio emission control device 81 causes the speaker section 54 to output a voice saying "Settings are being changed." This notification continues until this setting value update process is completed.

After that, it is determined whether the value of the setting value counter provided in the work area 221 for specific control is greater than or equal to 1, which corresponds to "setting 1", and less than or equal to 6, which corresponds to "setting 6" (step S9302). If the value of the set value counter is "0" or 7 or more, a negative determination is made in step S9302, and the set value counter is set to "1" (step S9303). As a result, the setting value of the pachinko machine 10 becomes "setting 1."

If an affirmative determination is made in step S9302 or if the process in step S9303 is executed, it is determined whether the setting key insertion section 68a is turned off using a setting key (step S9304). In this case, a configuration may be adopted in which it is determined whether the setting key insertion section 68a has been switched from an ON state to an OFF state, or a configuration may be adopted in which it is determined whether or not the setting key insertion section 68a is in an OFF state.

If the setting key insertion section 68a has not been turned OFF (step S9304: NO), it is determined whether the reset button 68c has been pressed (step S9305). If the reset button 68c has been pressed (step S9305: YES), and provided that the setting update display flag provided in the work area 221 for specific control is not set to "1" (step S9306: NO), the setting update display flag is set to "1" (step S9307), and the checking counter provided in the work area 221 for specific control is cleared to "0" (step S9308).

The initial check period is cancelled by clearing the check counter to "0". In addition, by setting the setting update display flag to "1", the second timer interrupt process (FIG. 134) makes a positive determination in step S9003 as already explained, and stores display data in the fifth display data buffer 275 for causing the first to fourth notification display devices 201 to 204 to display an indication that the setting values of the pachinko machine 10 are being updated and to display the current setting values of the pachinko machine 10 (step S9004). As a result, similar to the 33rd embodiment, the first to fourth notification display devices 201 to 204 display an indication that the setting values are being updated and to display the current setting values.

If the determination in step S9306 is affirmative, or if the processing in step S9308 is executed, the value of the setting value counter in the work area 221 for specific control is incremented by 1 (step S9309). As a result, the setting value is updated to the next higher level each time the reset button 68c is pressed once. If the reset button 68c is not pressed (step S9305: NO) or the setting value counter value is incremented by 1, the processing returns to step S9302. However, if it is determined in step S9302 that the setting value counter value is 7 or greater, the setting value counter is set to "1" in step S9303. As a result, if the reset button 68c is pressed once in the "setting 6" situation, the setting value returns to "setting 1."

If the setting key insertion section 68a has been turned OFF (step 9304: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S9310). This cancels the state in which the first to fourth notification display devices 201 to 204 display an indication that the setting value of the pachinko machine 10 is being updated and the display of the current setting value of the pachinko machine 10. In this case, the first to fourth notification display devices 201 to 204 start displaying the base value.

When the setting value update process is executed as described above, the initial check period is canceled midway and the current setting value is notified on the first to fourth notification display devices 201 to 204 on the condition that the reset button 68c is pressed. As a result, when the supply of operating power to the main CPU 63 is started and the main processing (FIG. 132) is started in the main CPU 63, even if the initial check period is started and the first to fourth notification display devices 201 to 204 display a check display while the processing at the start of the supply of operating power in the main processing is being executed, the initial check period can be canceled and the first to fourth notification display devices 201 to 204 can display the current setting value when the setting value is updated while the processing at the start of the supply of operating power is being executed. Therefore, it is possible to update the setting value while checking the current setting value without waiting for the initial check period to elapse.

Furthermore, even if the setting value update process (FIG. 137) is executed in the main process (FIG. 132), the initial check period starts first, so the first to fourth notification display devices 201 to 204 The setting value can be updated after confirming whether each of the display segments 321 to 324 can normally be in a light emitting state. This makes it possible to update setting values accurately.

In addition, when the reset button 68c is pressed to update the setting value in the setting value update process (FIG. 137), the initial check period is canceled. As a result, when the reset button 68c is pressed to update the setting value, the initial check period is canceled accordingly, which makes it possible to improve the operability for canceling the initial check period.

Returning to the description of the normal setting process (FIG. 135), if the value of the checking counter is "0" and it is not the initial check period (step S9101: NO), the It is determined whether the management start flag is set to "1" (step S9103). If the management start flag is not set to "1" (step S9103: NO), a pre-management display setting process is executed for the first and second notification display devices 201 and 202 (step S9104). In the setting process, display data for setting all display segments 321 and 322 in the light emitting state in each of the first and second notification display devices 201 and 202 is set in the fifth display data buffer 275. Note that the configuration is not limited to having all the display segments 321, 322 in a light emitting state in each of the first and second notification display devices 201, 202, and the first and second notification display devices 201, 202, all display segments 321 and 322 may be configured to perform blinking display.

Then, the calculation result data set in the display target setting area 276 in the work area 223 for non-specific control is read (step S9105), and the read calculation result data is set in the fifth display data buffer 275 as display data to be applied to the third and fourth alarm display devices 203, 204 (step S9106). As already explained, in the display process (FIG. 131), if the management start flag is not set to "1" (step S8701: NO), the base value is read from the current area 311, and the calculation result data corresponding to the digits in the first and second decimal places of the read base value is set in the display target setting area 276 (step S8714). In step S9106, this calculation result data is set in the fifth display data buffer 275 as display data to be applied to the third and fourth alarm display devices 203, 204.

By supplying the display data set in the fifth display data buffer 275 in steps S9104 and S9106 to the display IC 266, the first and second notification displays are displayed as shown in the explanatory diagram of FIG. 128(c). In a situation where all the display segments 321 and 322 in each of the devices 201 and 202 are in a light emitting state, the first decimal place of the base value calculated in the current calculation period by the third notification display device 203 At the same time, the fourth notification display device 204 displays the number to the second decimal place of the base value calculated in the current calculation period. The numbers corresponding to the base value are displayed on the third and fourth notification display devices 203 and 204 while all the display segments 321 and 322 are in a light emitting state in the first and second notification display devices 201 and 202, respectively. By doing so, it becomes possible to make the game hall manager recognize that the base value currently being reported is the base value in a situation where the management start flag is not set to "1".

In addition, when the management start flag is set to "1", as already explained, the base value to be notified in the first to fourth notification display devices 201-204 is switched in a predetermined order of current status area 311 → first history area 312 → second history area 313 → third history area 314 each time the display duration period (specifically, 5 seconds) elapses, whereas when the management start flag is not set to "1", the base value in the current status area 311 is maintained as the one to be notified. This makes it possible to check the current base value at any time when an operation check of the pachinko machine 10 is performed at the time of shipment of the pachinko machine 10.

If the management start flag is set to "1" (step S9103: YES), the display data set in the display target setting area 276 in the work area 223 for non-specific control is read out, and the read display data is 5 display data buffer 275 (step S9107). By supplying the display data to the display IC 266, if the base value of the current area 311 is the target of notification, the display as shown in the explanatory diagram of FIG. 127(a) is displayed for the first to fourth notifications. This is performed on the display devices 201 to 204, and if the base value of the first history area 312 is the target of notification, the display as shown in the explanatory diagram of FIG. 127(b) is the first to fourth notification display. If the base value of the second history area 313 is the target of notification, the display as shown in the explanatory diagram of FIG. 127(c) will be displayed on the first to fourth notification display devices. 201 to 204, and if the base value of the third history area 314 is the target of notification, a display as shown in the explanatory diagram of FIG. 127(d) is displayed on the first to fourth notification display devices 201. ~204 will be held.

Thereafter, it is determined whether the initial display flag provided in the work area 223 for non-specific control is set to "1" (step S9108). As already explained, the initial display flag is used in the first notification to notify that the base value of the current area 311 is the initial base value of the calculation after the start of the calculation period in the situation where the base value of the current area 311 is the target of notification. This flag is used by the main CPU 63 to specify that the display device 201 and the second display device 202 should be displayed blinking. If the initial display flag is set to "1" (step S9108: YES), a blinking setting process is executed for the first and second notification display devices 201 and 202 (step S9109).

In the blinking setting process, when the display corresponding to the display data currently set in the fifth display data buffer 275 is performed on the first and second alarm display devices 201 and 202, the display is set to blink. Specifically, for the setting to blink, data corresponding to the display data currently set in the fifth display data buffer 275 is sent to the display IC 266 until a predetermined lighting period (e.g., 0.5 seconds) has elapsed for the transmission of display data to the first and second alarm display devices 201 and 202, and then data for turning off all the display segments 321 and 322 of the first and second alarm display devices 201 and 202 is sent to the display IC 266 until a predetermined lighting period (e.g., 0.5 seconds) has elapsed, and then these predetermined lighting periods and predetermined lighting periods are alternately repeated. As a result, if the base value in the current state area 311 becomes the target for notification immediately after a new calculation period for the base value has begun, the first and second notification display devices 201, 202 will display the initial calculation results, allowing the amusement hall manager to understand that the current base value being notified by the first through fourth notification display devices 201-204 is the value immediately after the start of a new calculation period.

Next, the display contents of the first to fourth notification display devices 201 to 204 when the supply of operating power to the main CPU 63 is started will be described with reference to the time chart of Fig. 138. Fig. 138(a) shows an initial check period, Fig. 138(b) shows a pre-management display period in which the base value is notified by the first to fourth notification display devices 201 to 204 when the management start flag is not set to "1", Fig. 138(c) shows a normal display period in which the base values stored in the various areas 311 to 314 of the calculation result storage area 234 are sequentially notified by the first to fourth notification display devices 201 to 204, and Fig. 138(d) shows a display period in which the setting value of the pachinko machine 10 is updated. FIG. 138(e) shows a display period during which a display indicating that the setting values of the pachinko machine 10 are being checked and a display indicating the current setting values of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204, and FIG. 138(f) shows the timing when the reset button 68c is pressed.

First, we will explain the case where the supply of operating power to the main CPU 63 is started when the management start flag is not set to "1" and the setting confirmation process (Figure 136) and setting value update process (Figure 137) are not executed in the processing at the start of the supply of operating power.

At timing t1, the initial check period starts as shown in FIG. 138(a). This starts the check display on the first to fourth notification display devices 201 to 204 as shown in the explanatory diagram in FIG. 128(b).

Thereafter, at timing t2, the initial check period ends without being canceled midway, as shown in FIG. 138(a). In this case, the pre-management display period starts at the timing t2 as shown in FIG. 138(b). In the display period before the start of management, all the display segments 321 and 322 in the first notification display device 201 and the second notification display device 202 are in a light emitting state, as shown in the explanatory diagram of FIG. On the third notification display device 203 and the fourth notification display device 204, numbers corresponding to the current base value are displayed.

After that, at the timing of t3, in a situation where the management start flag is not set to "1" and the mode is neither the open/close execution mode due to the big win result nor the high frequency support mode, the total number of game balls discharged from the game area PA (i.e., the total number of game balls supplied to the game area PA) reaches the management start reference number, which is a number less than the shift reference number. As a result, the management start flag is set to "1", and the pre-management start display period ends as shown in FIG. 138(b). In this case, the normal display period begins at the timing of t3 as shown in FIG. 138(c). During the normal display period, the base values stored in the various areas 311-314 in the calculation result storage area 234 are sequentially notified by the first to fourth notification display devices 201-204 as shown in FIG. 127(a) to FIG. 127(d).

Next, when the supply of operating power to the main CPU 63 is started in a situation where the management start flag is set to "1", a setting confirmation process (FIG. 136 ) and the setting value update process (FIG. 137) are not executed.

At timing t4, the initial check period starts as shown in FIG. 138(a). This starts the check display on the first to fourth notification display devices 201 to 204 as shown in the explanatory diagram in FIG. 128(b).

Thereafter, at timing t5, the initial check period ends without being canceled midway, as shown in FIG. 138(a). In this case, the normal display period starts at the timing t5 as shown in FIG. 138(c). In the normal display period, as shown in FIGS. 127(a) to 127(d), the base values stored in various areas 311 to 314 in the calculation result storage area 234 are displayed on the first to fourth notification display devices 201 to 204. Announcements will be made sequentially.

Next, we will explain the case where the supply of operating power to the main CPU 63 is started when the management start flag is set to "1" and the setting value update process (Figure 137) is executed during the process at the start of the supply of operating power.

At timing t6, an initial check period starts as shown in FIG. 138(a). As a result, the check display starts on the first to fourth notification display devices 201 to 204, as shown in the explanatory diagram of FIG. 128(b).

Thereafter, the setting value update process (FIG. 137) is started in the middle of the initial check period, and the reset button 68c is pressed at timing t7 as shown in FIG. 138(f). As a result, the initial check period is prematurely ended as shown in FIG. 138(a) at the timing of t7, and the setting update display period is started as shown in FIG. 138(d) at the timing of t7. Ru.

Then, at timing t8, the setting update display period ends as shown in FIG. 138(d). In this case, at timing t8, the normal display period begins as shown in FIG. 138(c). During the normal display period, the base values stored in the various areas 311-314 in the calculation result storage area 234 are sequentially notified by the first to fourth notification display devices 201-204 as shown in FIG. 127(a) to FIG. 127(d).

Next, we will explain the case where the supply of operating power to the main CPU 63 is started when the management start flag is set to "1" and the setting confirmation process (Figure 136) is executed during the process at the start of the supply of operating power.

At timing t9, the initial check period starts as shown in FIG. 138(a). This starts the check display on the first to fourth notification display devices 201 to 204 as shown in the explanatory diagram in FIG. 128(b).

Then, in the middle of the initial check period, the setting confirmation process (FIG. 136) is started, and at timing t10, the reset button 68c is pressed as shown in FIG. 138(f). This ends the initial check period in the middle at timing t10 as shown in FIG. 138(a), and at timing t10, the setting confirmation display period starts as shown in FIG. 138(e).

Then, at timing t11, the setting confirmation display period ends as shown in FIG. 138(e). In this case, at timing t11, the normal display period begins as shown in FIG. 138(c). During the normal display period, the base values stored in the various areas 311-314 in the calculation result storage area 234 are sequentially notified by the first to fourth notification display devices 201-204 as shown in FIG. 127(a) to FIG. 127(d).

Note that when the supply of operating power to the main CPU 63 is started in a situation where the management start flag is not set to "1", the setting confirmation process (FIG. 136) is performed in the process at the time of starting the supply of operating power. Or, if the setting value update process (Fig. 137) is executed and the initial check period is canceled midway, the display period before starting management starts after the display period during setting update or the display period during setting confirmation ends. It happens.

The present embodiment described above provides the following excellent advantages:

An initial check period may occur in which each of the display segments 321 to 324 in each of the first to fourth notification display devices 201 to 204 is in a light emitting state as a check display. This makes it possible to check whether each of the display segments 321 to 324 is in a light emitting state, and to check whether the first to fourth notification display devices 201 to 204 are normal. It becomes possible to do so.

When the supply of operating power to the main CPU 63 starts, an initial check period for the first to fourth notification display devices 201 to 204 starts. This makes it possible to quickly check whether the first to fourth notification display devices 201 to 204 are normal when the supply of operating power starts.

Each time the supply of operating power to the main CPU 63 is started, an initial check period for the first to fourth notification display devices 201 to 204 is started. This makes it possible to check whether the first to fourth notification display devices 201 to 204 are normal each time the supply of operating power is started.

When the supply of operating power to the main CPU 63 starts, the initial check period of the first to fourth alarm display devices 201 to 204 starts without the need for any special operations. This makes it easy to check whether the first to fourth alarm display devices 201 to 204 are normal.

Even if the initial check period has not elapsed, if a cancellation trigger occurs, the above-mentioned check display on the first to fourth notification display devices 201 to 204 is terminated midway. Thereby, even in the middle of the initial check period, it is possible to end the check display and cause the first to fourth notification display devices 201 to 204 to display other displays.

When the supply of operating power to the main CPU 63 is started and before the processing for controlling the progress of the game is executed, an initial check period is started and the first to fourth notification display devices 201 to At 204, the above-mentioned check display is started. This makes it possible to check whether the first to fourth notification display devices 201 to 204 are normal before the game starts.

In a configuration in which predetermined setting-related processes such as a setting confirmation process (FIG. 136) and a setting value update process (FIG. 137) are executed while processing at the start of the supply of operating power is being executed, the initial check period is started while processing at the start of the supply of operating power is being executed. This makes it possible to consolidate not only the predetermined setting-related processes but also the processing for starting the initial check period into processing at the start of the supply of operating power.

In the setting confirmation process (FIG. 136) and the setting value update process (FIG. 137), these predetermined settings are Before the related processing is executed, an initial check period is started, and the above-mentioned check display is started on the first to fourth notification display devices 201 to 204. As a result, after confirming whether the first to fourth notification display devices 201 to 204 are normal, the current setting values are confirmed using the first to fourth notification display devices 201 to 204. It becomes possible to do so. Therefore, it becomes possible to confirm the setting values accurately.

Based on the fact that the setting confirmation process (FIG. 136) or the setting value update process (FIG. 137) was executed in a situation during the initial check period, the first to fourth notifications are executed even if the initial check period has not passed. The above-mentioned check display on the display devices 201 to 204 is ended midway. As a result, when the setting confirmation process (FIG. 136) or the setting value update process (FIG. 137) is executed, the first to fourth notification display devices 201 to 201 do not have to wait for the initial check period to elapse. After completing the above-mentioned checking process in step 204, it becomes possible to display the current set values on the first to fourth notification display devices 201 to 204. Therefore, it becomes possible to check the current setting values at an early stage.

When the setting confirmation process (FIG. 136) or the setting value update process (FIG. 137) is executed during the initial check period and the reset button 68c is pressed, the above check display on the first to fourth notification display devices 201 to 204 is terminated midway even if the initial check period has not elapsed. This makes it possible to terminate the initial check period at any timing after the setting confirmation process (FIG. 136) or the setting value update process (FIG. 137) has been started. For example, when the setting confirmation process (FIG. 136) or the setting value update process (FIG. 137) is started, it becomes possible to terminate the above check display on the first to fourth notification display devices 201 to 204 and start displaying the current setting value after the manager of the game hall has fully confirmed that the first to fourth notification display devices 201 to 204 are normal.

Further, in the setting value update process (FIG. 137), the setting value of the selected object is updated by pressing the reset button 68c. In this case, when the reset button 68c is pressed as described above, the check display is ended on the first to fourth notification display devices 201 to 204, and the display of the current setting value is started. This eliminates the need for a dedicated operation to end the check display and start displaying the current set values. Therefore, it is possible to improve the work efficiency of updating setting values.

The calculation result storage area 234 stores multiple base values derived using information from the normal counter area 231 for different time periods. This makes it possible to grasp the base values for multiple time periods, and therefore to accurately grasp the ratio of the number of winning balls to the number of game balls supplied to the game area PA.

The calculation result storage area 234 includes a current state area 311 in which the most recent base value is stored, and first to third history areas 312 to 314 in which previously derived base values are stored. This makes it possible to grasp the ratio of the number of winning balls to the number of game balls supplied to the game area PA not only for the most recent time, but also for past times.

The base value, which is repeatedly calculated at a relatively short interval before one calculation period has elapsed, is stored in the current state area 311, and the base value calculated when one calculation period has elapsed is stored in the first to third history areas 312 to 314. This makes it possible to grasp the most recent ratio of the number of prize balls to the number of game balls supplied to the play area PA, and also makes it possible to grasp the above ratio in the past in units of one calculation period. Furthermore, because the first to third history areas 312 to 314 store base values in units of one calculation period, it is possible to reduce the number of base values stored in the first to third history areas 312 to 314.

The various counters 231a-231e in the normal counter area 231 are cleared to "0" when a calculation period has elapsed. This makes it possible to reduce the storage capacity required in the normal counter area 231. Even if the various counters 231a-231e in the normal counter area 231 are configured to be cleared to "0" in this way, the base values calculated when a calculation period has elapsed are stored in the first to third history areas 312-314, making it possible to later grasp the ratio of the number of winning balls to the number of game balls supplied to the game area PA during the past calculation period.

Multiple history areas 312-314 are provided as areas for storing past base values. This makes it possible to compare base values for multiple past calculation periods.

The base values stored in each of the current area 311, first history area 312, second history area 313, and third history area 314 are sequentially displayed on the first to fourth notification display devices 201 to 204. This makes it possible to individually grasp base values in a plurality of calculation periods while suppressing the number of notification devices 201 to 204.

Even if the process for starting the supply of operating power is being executed, the occurrence of a power outage is monitored by executing the power outage information storage process (step S8901), and if the occurrence of a power outage is identified, Power outage processing is executed. As a result, if a power outage occurs while the process for starting the supply of operating power is being executed, it is possible to appropriately deal with the power outage.

In a configuration in which the first timer interrupt process (FIG. 133) includes the power outage information storage process (step S8901), the first timer interrupt process is started by interrupting even when the process at the start of the supply of operating power is being executed. This makes it possible to periodically monitor for the occurrence of a power outage even when the process at the start of the supply of operating power is being executed.

The first timer interrupt process (FIG. 133) is activated by interrupting even if the remaining process is being executed after the process at the start of supply of operating power is completed. As a result, by using the first timer interrupt process that is started by interrupting the remaining process, it is possible to periodically monitor the occurrence of a power outage while the process for starting the supply of operating power is being executed. Become.

If the first timer interrupt process (FIG. 133) interrupts and is started while the process for starting the supply of operating power is being executed, " 1" is set, the process for advancing the game is not executed. As a result, in a configuration in which the first timer interrupt process is interrupted and started even when the process at the start of the supply of operating power is being executed, the occurrence of a power outage is periodically monitored. It is possible to prevent the process for advancing the game from being executed in a situation where the process at the start of supply is being executed.

In a configuration in which the setting value update process (FIG. 137) is executed while the process at the start of the supply of operating power is being executed, the power outage information storage process (step S8901) is executed even while the process at the start of the supply of operating power is being executed. This makes it possible to appropriately deal with a power outage that occurs while setting the setting value to be used.

Note that the check display of the first to fourth notification display devices 201 to 204 is not limited to a configuration in which the check display is terminated when the initial check period has elapsed, and an operation for terminating the check display may be performed. The check display may be continued until the check is performed. For example, the operation for terminating the termination may include operating the reset button 68c regardless of whether either the setting confirmation process (FIG. 136) or the setting value update process (FIG. 137) is being executed. Often, an operation section other than the reset button 68c may be operated. In this case, the check display continues on the first to fourth notification display devices 201 to 204 until it is time to check the base value or set value on the first to fourth notification display devices 201 to 204. Therefore, it is possible to check the base value or set value after checking whether the first to fourth notification display devices 201 to 204 are normal. Furthermore, since the check display is terminated based on the operation of the operating unit, it is possible to terminate the check display at a desired timing.

Also, the first to fourth notification display devices 201 to 204 may be configured to start a check display when a specific operation unit such as the update button 68b or the reset button 68c is operated regardless of whether the supply of operating power has started. In this case, it is possible to start the check display at a desired timing when checking the base value or the set value. In addition, in this configuration, the check display may be ended when a specific period (e.g., 5 seconds) has elapsed, or the check display may be ended when the specific operation unit operated to start the check display or another operation unit is operated.

Also, if the supply of operating power to the main CPU 63 is started while a specific operation unit other than the reset button 68c, such as the update button 68b, is operated, the first to fourth notification display devices 201 to 204 start to display a check, and if the supply of operating power to the main CPU 63 is started without the specific operation unit being operated, the check display may not be started. In this case, in a configuration in which the check display is displayed in response to the start of the supply of operating power, it becomes possible for the amusement hall manager to select whether or not to start the check display.

Furthermore, the base value is not limited to the configuration in which the base value is displayed on the first to fourth notification display devices 201 to 204 regardless of whether or not the gaming machine main body 12 is in an open state. The base value may be displayed on the first to fourth notification display devices 201 to 204 when it is specified based on the detection result of the main body open sensor 96 that the main body is in the open state. In this case, when the gaming machine main body 12 is in the open state, the first to fourth notification display devices 201 to 204 start checking display, and then the first to fourth notification display devices 201 to 204 start displaying for checking. The base value may be displayed in step 204. This makes it possible to check whether the first to fourth notification display devices 201 to 204 are normal before checking the base value. In addition, in this configuration, the check display may be terminated when a predetermined period of time (for example, 5 seconds) has elapsed, and the check display may be terminated using the above-mentioned predetermined operation section operated to start the check display or a separate operation section. The check display may be configured to end when the operation unit is operated.

Also, if the main process (FIG. 132) is started with the conditions for executing the setting confirmation process (FIG. 136) satisfied, the check display of the first to fourth notification display devices 201 to 204 may not be started, and if the main process is started with the conditions for executing the setting confirmation process not satisfied, the check display may be started. In this case, it is possible to prevent the check display from being displayed when it is determined that the setting value will be confirmed.

Also, if the main processing (FIG. 132) is started with the conditions for executing the setting value update processing (FIG. 137) satisfied, the check display of the first to fourth notification display devices 201 to 204 may not be started, and if the main processing is started with the conditions for executing the setting value update processing not satisfied, the check display may be started. In this case, it is possible to prevent the check display from being displayed when it is confirmed that the setting value will be updated.

Also, if the main processing (FIG. 132) is started in a state where either the condition for executing the setting confirmation processing (FIG. 136) or the condition for executing the setting value update processing (FIG. 137) is satisfied, the check display of the first to fourth notification display devices 201 to 204 may not be started, and if the main processing is started in a state where neither the condition for executing the setting confirmation processing nor the condition for executing the setting value update processing is satisfied, the check display may be started. In this case, it is possible to prevent the check display from being displayed when it is confirmed that the setting value will be confirmed or updated.

The check display is not limited to a configuration in which each of the display segments 321-324 in each of the first to fourth alarm display devices 201-204 is maintained in an illuminating state, and each of the display segments 321-324 in each of the first to fourth alarm display devices 201-204 may be configured to flash. The check display may also be configured in such a way that each of the display segments 321-324 in each of the first to fourth alarm display devices 201-204 is sequentially illuminated one by one or a portion of each of the display segments 321-324 is illuminated at least once within the initial check period.

In addition, the process of displaying the check display on the first to fourth notification display devices 201 to 204 is not limited to a configuration in which the process is executed as a process corresponding to a specific control, but may be a configuration in which the process is executed as a process corresponding to a non-specific control.

Also, if a base value is not stored in any of the first to third history areas 312 to 314 of the calculation result storage area 234, the history area 312 to 314 may not be the notification target in the first to fourth notification display devices 201 to 204. In this case, for example, if a base value is stored in the current status area 311 and the first history area 312, but a base value is not stored in the second history area 313 and the third history area 314, the notification target in the first to fourth notification display devices 201 to 204 is switched between the current status area 311 and the first history area 312 each time the display duration period elapses, and the second history area 313 and the third history area 314 are not the notification target.

Furthermore, in the current state area 311, first history area 312, second history area 313, and third history area 314 of the calculation result storage area 234, base values expressed as decimals up to the second decimal place are stored. Although the configuration is described above, the present invention is not limited to this, and the configuration may be such that information on a combination of a number in the first decimal place and a number in the second decimal place of the base value is stored. To make it possible to calculate the total number of game balls paid out (K91 x "Number of prize balls for winning in the general winning slot 31" + K92 x "Number of prize balls for winning in the special electric winning device 32" + K93 x "No. The combination of "Number of prize balls for winning in the first operating port 33" + K94 x "Number of prize balls for winning in the second operating port 34") and the total number of game balls discharged from the technique area PA (K91 + K92 + K93 + K94 + K95) It may also be configured such that information is stored. In the former case, the information in the various areas 311 to 314 can be set as is in the display target setting area 276, and in the latter case, the information in the various areas 311 to 314 can be used to calculate the base value and then the relevant information can be set as is. Information about the number in the first decimal place and the number in the second decimal place extracted from the base value is set in the display target setting area 276.

Further, the calculation result storage area 234 may have a configuration in which only the current area 311 and the first history area 312 are provided as areas for storing base values. A configuration may be adopted in which only two history areas 313 are provided. Furthermore, a configuration may be adopted in which four or more areas are provided as history areas for storing past base value information.

Furthermore, the calculation result storage area 234 is not limited to a configuration in which the various areas 311 to 314 have fixed addresses and the base value is shifted in these various areas 311 to 314 as necessary, but may also be configured such that the various areas 311 to 314 are provided as ring buffers.

Further, instead of the configuration in which the base value is calculated as the mode information, a configuration in which the 61st parameter to the 68th parameter are calculated as in the fifteenth embodiment may be used. In this case, all of the 61st to 68th parameters may be stored in each of the current area 311, first history area 312, second history area 313, and third history area 314 of the calculation result storage area 234. A configuration may also be adopted in which some parameters are stored, such as the 61st to 68th parameters are stored in the current area 311, but only the 61st parameter is stored in the first to third history areas 312 to 314.

Furthermore, in addition to or instead of the base value, the probability of a jackpot result occurring may be calculated and stored as mode information, or the probability of a high frequency support mode occurring may be calculated and stored.

In addition, the trigger for shifting the base value in the various areas 311 to 314 in the calculation result storage area 234 is not limited to when the total number of game balls discharged from the game area PA becomes equal to or exceeds the shift reference number, but may be configured to cause a shift when a predetermined period of time (e.g., 8 hours) has elapsed, or when the supply of operating power to the main CPU 63 is stopped, or when the supply of operating power to the main CPU 63 is started, or when the setting value of the pachinko machine 10 is changed. Also, a configuration may be adopted in which there are multiple triggers for causing a shift.

Furthermore, until the management start flag provided in the work area 223 for non-specific control is set to "1", the display segments 321 and 322 in each of the first and second notification display devices 202 are in a light emitting state. The display segments 321 and 322 in each of the first and second notification display devices 202 may be in a blinking state. Furthermore, until the management start flag is set to "1", in the first to fourth notification display devices 201 to 204, "bL.--" → "b1.--" → "b2.--" → A configuration may be adopted in which the display "b3.--" is repeated.

Furthermore, until the management start flag provided in the work area 223 for non-specific control is set to "1", the display segments 321 to 324 in each of the first to fourth notification display devices 201 to 204 are The display segments 321 and 322 in each of the first and second notification display devices 201 and 202 are in a light emission state or a blinking state without the check display being in a light emission state, and the third and fourth notification display is not performed. A configuration may also be adopted in which a display corresponding to the fact that the management start flag is not set to "1" is displayed, such as a display corresponding to the current base value being displayed on the display devices 203 and 204.

In addition, if the power outage flag is not set to "1" or the checksums do not match, the game stop flag is set to "1" and the progress of the game is stopped, the first to fourth notification In the display devices 201 to 204, each of the display segments 321 to 324 may be in a light emitting state, similar to the check display, or each of the display segments 321 to 324 may be in a blinking state.

Further, the display control of the first to fourth notification display devices 201 to 204 is not limited to the configuration in which the main side CPU 63 performs the display control, but may be configured to be performed by a dedicated control means. The configuration may be performed by the display control device 82, or the display control device 82 may perform the configuration. In this case, when displaying the base value on the first to fourth notification display devices 201 to 204, the base value to be notified is transmitted from the main side CPU 63 to the control means that is the main control body, and the first to fourth notification display devices 201 to 204 When setting values are displayed on the fourth notification display devices 201 to 204, the setting values to be notified are transmitted from the main CPU 63 to the control means that is the main control unit. In addition, when the main side CPU 63 executes the process at the time of starting the supply of operating power, the first to fourth notification display devices 201 to 204 are Information corresponding to the start of the check display is transmitted from the main side CPU 63 to the control means serving as the control entity so that the check display is started.

<Thirty-sixth embodiment>
In this embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the 35th embodiment. The configuration that differs from the 35th embodiment will be described below. Note that the description of the same configuration as the 35th embodiment will basically be omitted.

FIG. 139 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step S9401 to step S9426 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

In steps S9401 to S9403, the same processes as steps S8801 to S8803 of the main process (FIG. 132) in the thirty-fifth embodiment are executed. Thereafter, interrupt permission is set (step S9404). As a result, the first timer interrupt process (FIG. 133) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 134) is interrupted and activated in the second interrupt cycle. However, since the start-up processing flag is set to "1" in step S9403, even if the first timer interrupt processing is started, out of the various processing of the first timer interrupt processing, power failure monitoring and various counters are While the process for updating and fraud monitoring is executed, the first timer interrupt process is ended without executing the process for advancing the game.

After that, information corresponding to the initial check period (specifically, 5 seconds) is set in the checking counter provided in the work area 221 for specific control (step S9405). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is started, as in the 35th embodiment. If a value of 1 or more is set in the checking counter, a check display is performed on the first to fourth notification display devices 201 to 204, as in the 35th embodiment.

Thereafter, it is determined whether the value of the checking counter is "0" (step S9406). Then, the process waits in step S9406 until the value of the checking counter becomes "0". As a result, the check display on the first to fourth notification display devices 201 to 204 continues until the initial check period set in step S9405 has elapsed.

Thereafter, the processes of steps S9407 to S9426 are executed. The processing contents of steps S9407 to S9426 are the same as steps S8806 to S8825 of the main processing (FIG. 132) in the thirty-fifth embodiment.

According to the above configuration, when the supply of operating power to the main CPU 63 is started and the main CPU 63 starts processing at the start of the supply of operating power, a check display is displayed on the first to fourth notification display devices 201 to 204, and in this state, the progress of processing at the start of the supply of operating power is stopped until the initial check period has elapsed. This makes it possible to prevent setting confirmation and setting value updates from being performed during the initial check period, making it possible to suppress an increase in the processing load. It also makes it possible to prevent game play from starting in the middle of the initial check period.

<37th embodiment>
This embodiment is different from the thirty-fifth embodiment in the processing configuration of the main processing executed by the main CPU 63. Hereinafter, the configuration that is different from the thirty-fifth embodiment will be explained. Note that descriptions of the same configurations as those of the thirty-fifth embodiment are basically omitted.

FIG. 140 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step S9501 to step S9525 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

In steps S9501 to S9518, the same processing as steps S7901 to S7918 in the main processing (FIG. 114) in the 33rd embodiment is executed. After that, information corresponding to the initial check period (specifically, 5 seconds) is set in the checking counter provided in the work area 221 for specific control (step S9519). The value set in the checking counter is decremented by 1 each time the second timer interrupt processing (FIG. 134) is started, as in the 35th embodiment. If a value of 1 or more is set in the checking counter, the checking display continues on the first to fourth notification display devices 201 to 204, as in the 35th embodiment.

Thereafter, the processing from step S9520 onwards is executed. The processing contents of steps S9520 to S9525 are the same as steps S7919 to S7924 of the main processing (FIG. 114) in the thirty-third embodiment.

According to the above configuration, when the supply of operating power to the main CPU 63 is started, the remaining processing is performed after the processing at the time of starting the supply of operating power (steps S9501 to S9518) is completed in the main CPU 63. Before (steps S9522 to S9525) are started, an initial check period is started. As a result, there is no need to control the initial check period in a situation where processing at the start of supply of operating power is being executed, reducing the processing load in a situation where processing at the start of supply of operating power is being executed. becomes possible.

The setting confirmation process (step S9514) and the setting value update process (step S9518) are executed as processes at the start of the supply of operating power, whereas the initial check period starts after the processes at the start of the supply of operating power are completed. This makes it possible to ensure that even if a check display is performed on the first to fourth notification display devices 201 to 204 during the initial check period, this does not affect the display of the setting values using the first to fourth notification display devices 201 to 204.

When the supply of operating power to the main CPU 63 is started, a check display is provided on the first to fourth alarm display devices 201 to 204, regardless of whether the setting confirmation process (step S9514) or the setting value update process (step S9518) is executed, or whether neither the setting confirmation process (step S9514) nor the setting value update process (step S9518) is executed. This makes it possible to check whether the first to fourth alarm display devices 201 to 204 are normal, regardless of the situation when the supply of operating power to the main CPU 63 is started.

The main processing of the main CPU 63 (FIG. 140) is a process that is executed in common when either the setting confirmation process (step S9514) or the setting value update process (step S9518) is executed, and when neither the setting confirmation process (step S9514) nor the setting value update process (step S9518) is executed. When either the setting confirmation process (step S9514) or the setting value update process (step S9518) is executed, a process that starts a check display on the first to fourth notification display devices 201 to 204 is set as a process that is executed later in the order of execution than the setting confirmation process (step S9514) and the setting value update process (step S9518). In this way, the process that starts a check display on the first to fourth notification display devices 201 to 204 is set as a common process, which makes it possible to achieve the excellent effects already described while simplifying the processing configuration.

Even in a situation where the check display is being executed on the first to fourth notification display devices 201 to 204, the main CPU 63 can start processing for advancing the game. As a result, even if the configuration is such that a check display is performed on the first to fourth notification display devices 201 to 204 after execution of the setting confirmation process (step S9514) or setting value update process (step S9518), the game can be played. It becomes possible to prevent the start timing of the process for proceeding from being delayed.

It is also possible to configure the process after step S9520 not to start until the initial check period has elapsed. In this case, it is possible to prevent the game from starting while the check display is being displayed on the first to fourth notification display devices 201 to 204.

<Thirty-eighth embodiment>
In this embodiment, the processing configuration of the normal setting processing executed by the main CPU 63 is different from that of the above-mentioned 35th embodiment. The configuration different from the above-mentioned 35th embodiment will be described below. Note that the description of the same configuration as the above-mentioned 35th embodiment will basically be omitted.

FIG. 141 is a flowchart showing the normal setting process in this embodiment executed by the main CPU 63. Note that the processing in steps S9601 to S9605 in the normal setting processing is executed using a specific control program and specific control data in the main CPU 63.

First, it is determined whether the management start flag provided in the work area 223 for non-specific control is set to "1" (step S9601). If the management start flag is not set to "1" (step S9601: NO), the data for the check display is set in the fifth display data buffer 275 in the work area 221 for specific control (step S9602). When the data for the check display is supplied to the display IC 266, the check display is started in the first to fourth notification display devices 201 to 204. Specifically, all the display segments 321 to 324 in each of the first to fourth notification display devices 201 to 204 are illuminated. This allows the manager of the game hall to know whether the display segments 321 to 324 of the first to fourth notification display devices 201 to 204 can be illuminated normally.

If the management start flag is set to "1" (step S9601: YES), the processes of steps S9603 to S9605 are executed. The processing contents of steps S9603 to S9605 are the same as steps S9107 to S9109 in the normal setting processing (FIG. 135) in the thirty-fifth embodiment. By executing the processes of steps S9603 to S9605, the base values stored in the various areas 311 to 314 of the calculation result storage area 234 are sequentially notified on the first to fourth notification display devices 201 to 204. At the same time, when the base value of the current area 311 is notified immediately after the start of a new calculation period, initial calculation display is performed on the first and second notification display devices 201 and 202.

According to the above configuration, when the management start flag is not set to "1", an initial check period occurs during which a check display is performed on the first to fourth notification display devices 201 to 204. This makes it possible to limit the situation in which the initial check period occurs when the supply of operating power to the main CPU 63 begins to a situation in which the management start flag is not set to "1" at the shipping stage of the pachinko machine 10, etc.

<39th embodiment>
This embodiment is different from the thirty-third embodiment described above in the configuration regarding setting values. Hereinafter, the configuration that is different from the thirty-third embodiment described above will be explained. Note that descriptions of the same configurations as those in the thirty-third embodiment described above will be basically omitted.

Figures 142(a) to 142(d) are explanatory diagrams for explaining the setting correspondence memory area 325 provided in the main ROM 64.

In the setting correspondence memory area 325, a win/lose table for the low probability mode, a win/lose table for the high probability mode, and display data for the setting values used to display the current setting values on the first to fourth notification display devices 201 to 204 in the setting confirmation process (FIG. 115) and the setting value update process (FIG. 116) are set in correspondence with the setting values of the pachinko machine 10. More specifically, the setting correspondence memory area 325 includes a first setting information storage area 325a, a second setting information storage area 325b, a third setting information storage area 325c, a fourth setting information storage area 325d, a fifth setting information storage area 325e, and a sixth setting information storage area 325f.

Each of the first to sixth setting information storage areas 325a to 325f includes a storage area for storing a low probability mode win/fail table that is referred to when the win/fail lottery mode is the low probability mode, and a storage area for storing a low probability mode win/fail table that is referred to when the win/fail lottery mode is the low probability mode. A storage area for storing the high probability mode validity table that is referred to when the high probability mode is selected, and a storage area for the first to fourth notifications in the setting confirmation process (FIG. 115) and the setting value update process (FIG. 116). A storage area is provided for storing display data of setting values used to display the current setting values on the display devices 201 to 204. In each of the first to sixth setting information storage areas 325a to 325f, a predetermined area of multiple bytes is secured as a storage area for storing the success/failure table for the low probability mode, and an area for storing the success/failure table for the high probability mode. A predetermined area of multiple bytes is reserved as a storage area for storing setting value display data, and a 1-byte area is reserved as a storage area for storing display data of setting values. Therefore, each of the first to sixth setting information storage areas 325a to 325f has a storage capacity of multiple bytes. In this case, the start address of the first setting information storage area 325a is A(1), the start address of the second setting information storage area 325b is A(2), and the start address of the third setting information storage area 325c The start address of the fourth setting information storage area 325d is A(4), and the start address of the fifth setting information storage area 325e is A(5). The start address of the sixth setting information storage area 325f is A(6).

In the pachinko machine 10 of the first form in this embodiment with the above configuration, six levels of setting values from "setting 1" to "setting 6" are set as the setting values of the pachinko machine 10, similar to the above 33 embodiments. ing. In this case, while the probabilities of a jackpot result in the low probability mode are different for each of "Settings 1" to "Settings 6", the probabilities of a jackpot result in the high probability mode are the same. Therefore, as shown in FIG. 142(a), the first setting information storage area 325a has a first low probability correctness table LT( 1) is stored, and a common high probability probability table HT that is common to "Settings 1" to "Settings 6" is stored in the storage area for storing the probability table of the high probability mode. Display data for displaying "1" is stored in a storage area for storing display data. In the second setting information storage area 325b, a second low probability table LT(2) corresponding to "setting 2" is stored in a storage area for storing the low probability mode probability table, and a high probability mode A common high accuracy table HT that is common to "Setting 1" to "Setting 6" is stored in the storage area for storing the validity table of "Setting 1" to "Setting 6", and " Display data for displaying "2" is stored.

In the third setting information storage area 325c, a third low-probability win/loss table LT (3) corresponding to "Setting 3" is stored in a storage area for storing a win/loss table for the low probability mode, a common high-probability win/loss table HT common to "Setting 1" to "Setting 6" is stored in a storage area for storing a win/loss table for the high probability mode, and display data for displaying "3" is stored in a storage area for storing display data for the setting value. In the fourth setting information storage area 325d, a fourth low-probability win/loss table LT (4) corresponding to "Setting 4" is stored in a storage area for storing a win/loss table for the low probability mode, a common high-probability win/loss table HT common to "Setting 1" to "Setting 6" is stored in a storage area for storing a win/loss table for the high probability mode, and display data for displaying "4" is stored in a storage area for storing display data for the setting value.

In the fifth setting information storage area 325e, a fifth low probability correctness table LT(5) corresponding to "setting 5" is stored in a storage area for storing the correctness table for the low probability mode, and a fifth low probability correctness table LT(5) corresponding to "setting 5" is stored. A common high accuracy table HT that is common to "Setting 1" to "Setting 6" is stored in the storage area for storing the validity table of "Setting 1" to "Setting 6", and " Display data for displaying "5" is stored. In the sixth setting information storage area 325f, a sixth low probability correctness table LT(6) corresponding to "setting 6" is stored in a storage area for storing the correctness table for the low probability mode, and a sixth low probability correctness table LT(6) corresponding to "setting 6" is stored. A common high accuracy table HT that is common to "Setting 1" to "Setting 6" is stored in the storage area for storing the validity table of "Setting 1" to "Setting 6", and " Display data for displaying "6" is stored.

In the case of the configuration of the first form described above, the probability of a jackpot result in low probability mode increases with a larger setting value. On the other hand, the probability of a jackpot result in high probability mode is the same regardless of the setting value. Note that since the probability of a jackpot result in high probability mode is 1/30, the probability of a jackpot result in high probability mode even at "setting 1" is higher than the jackpot probability in low probability mode at "setting 6".

In the first form in which "Setting 1" to "Setting 6" are set as setting values, in order to execute the validity judgment process in Step S504 of the special symbol fluctuation start process (FIG. 13), it is executed in Step S503. The process of reading out the validity table will be explained. FIG. 143 is a flowchart showing the read-out process of the validity table. Note that the processing from step S9701 to step S9705 in the read-out process of the validity table is executed using a program for specific control and data for specific control in the main CPU 63.

First, the value of the setting value counter provided in the work area 221 for specific control in the main RAM 65 is read (step S9701). The setting value counter is a counter that allows the main CPU 63 to determine which of the first to sixth setting information storage areas 325a to 325f in the setting corresponding storage area 325 should be referenced when reading the win/lose table and when reading the display data for the setting value.

Thereafter, a storage area corresponding to the value of the setting value counter read out in step S9701 is selected from among the first to sixth setting information storage areas 325a to 325f in the setting corresponding storage area 325 (step S9702). The set value counter is configured to take any value from "1" to "6" as in the thirty-third embodiment, and when the value of the set value counter is "1", the first If the setting information storage area 325a is selected, and the value of the setting value counter is "2", the second setting information storage area 325b is selected, and if the value of the setting value counter is "3", the third setting information storage area 325b is selected. If the setting information storage area 325c is selected, and the value of the setting value counter is "4", the fourth setting information storage area 325d is selected, and if the value of the setting value counter is "5", the fifth setting information storage area 325c is selected. The setting information storage area 325e is selected, and if the value of the setting value counter is "6", the sixth setting information storage area 325f is selected.

When making this selection, a correspondence table previously stored in the main ROM 64 is referred to. The correspondence table defines the correspondence between the value of the setting value counter and the start address of the first to sixth setting information storage areas 325a to 325f. Specifically, A(1), which is the start address of the first setting information storage area 325a, is set corresponding to the value "1" of the setting value counter, and A(1) is set corresponding to the value "2" of the setting value counter. A(2), which is the start address of the second setting information storage area 325b, is set, and A(2), which is the start address of the third setting information storage area 325c, is set in correspondence with the value "3" of the setting value counter. (3) is set, A(4), which is the start address of the fourth setting information storage area 325d, is set corresponding to the value of "4" of the setting value counter, and "5" of the setting value counter is set. A(5), which is the start address of the fifth setting information storage area 325e, is set in correspondence with the value of ``6'' of the setting value counter, and the start address of the sixth setting information storage area 325f is set in correspondence with the value of ``6'' of the setting value counter. The start address A(6) is set.

After that, if the current win/lose lottery mode is the low probability mode (step S9703: NO), the win/lose table for the low probability mode is read from the setting information storage area 325a to 325f selected in step S9702 (step S9704). On the other hand, if the current win/lose lottery mode is the high probability mode (step S9703: YES), the win/lose table for the high probability mode is read from the setting information storage area 325a to 325f selected in step S9702 (step S9705).

By executing the win/fail table reading process as described above, the win/fail table corresponding to the current win/fail lottery mode is read out from the setting information storage areas 325a to 325f corresponding to the value of the setting value counter. Then, in the validity determination process (step S504) of the special figure fluctuation start process (FIG. 13), the read validity table is used to determine whether or not the current game round corresponds to the jackpot result.

Next, we will explain the process when the second timer interrupt process (FIG. 123) is interrupted and started while the setting value update process (step S7918) is being executed in the main process (FIG. 114) in the main CPU 63. do. In this case, in the second timer interrupt process (FIG. 123), a process for setting the fifth display data buffer 275 during update of the setting value is executed (step S8403). FIG. 144 is a flowchart showing a setting process for the fifth display data buffer 275 during a setting update. Note that the processing from step S9801 to step S9805 in the setting process is executed using a specific control program and specific control data in the main CPU 63.

First, the value of the setting value counter provided in the work area 221 for specific control in the main RAM 65 is read (step S9801). Then, from among the first to sixth setting information storage areas 325a to 325f in the setting corresponding storage area 325, a storage area corresponding to the setting value counter value read in step S9801 is selected (step S9802). The setting value counter is configured to take any value from "1" to "6" as in the 33rd embodiment above, and when the setting value counter value is "1", the first setting information storage area 325a is selected, when the setting value counter value is "2", the second setting information storage area 325b is selected, when the setting value counter value is "3", the third setting information storage area 325c is selected, when the setting value counter value is "4", the fourth setting information storage area 325d is selected, when the setting value counter value is "5", the fifth setting information storage area 325e is selected, and when the setting value counter value is "6", the sixth setting information storage area 325f is selected. When making this selection, a corresponding table pre-stored in the main ROM 64 is referenced, similar to the win/lose table read process (Figure 143).

Then, display data for the setting values is read from the setting information storage areas 325a to 325f selected in step S9802 (step S9803). The read display data for the setting values is then set in the fifth display data buffer 275 in the specific control work area 221 as display data to be applied to the fourth alert display device 204 (step S9804). Display data for displaying on the first to third alert display devices 201 to 203 an indication that the setting values of the pachinko machine 10 are being updated is also set in the fifth display data buffer 275 (step S9805).

As described above, by executing the setting process for the fifth display data buffer 275 during the setting update, a display corresponding to the display data set in the fifth display data buffer 275 in step S9805 is performed on the first to third alert display devices 201 to 203, and a display corresponding to the display data set in the fifth display data buffer 275 in step S9804 is performed on the fourth alert display device 204. As a result, as shown in the explanatory diagram of FIG. 124(a), for example, a display indicating that the setting values of the pachinko machine 10 are being updated and a display indicating the current setting values of the pachinko machine 10 are performed on the first to fourth alert display devices 201 to 204.

In addition, when the second timer interrupt process (FIG. 123) is started as an interrupt while the setting confirmation process (step S7914) is being executed in the main process (FIG. 114) in the master CPU 63, the setting process (step S8405) to the fifth display data buffer 275 during setting confirmation also executes the same process as the setting process (FIG. 144) to the fifth display data buffer 275 during setting update with regard to setting the display data of the setting value.

Here, in the first form of pachinko machine 10, six setting values from "Setting 1" to "Setting 6" are set as the setting values of the pachinko machine 10, but depending on the model and type of pachinko machine 10, fewer than six setting values may be used. Specifically, in the second form of pachinko machine 10 shown in the explanatory diagram of FIG. 142(b), three setting values are set: "Setting 1", "Setting 3", and "Setting 6", in the third form of pachinko machine 10 shown in the explanatory diagram of FIG. 142(c), four setting values are set: "Setting 1", "Setting 2", "Setting 3", and "Setting 4", in the fourth form of pachinko machine 10 shown in the explanatory diagram of FIG. 142(d), only one setting value, "Setting 1", is set. In this case, regardless of whether the pachinko machine 10 is of the second to fourth form, the setting correspondence memory area 325 having the first to sixth setting information memory areas 325a to 325f that allow the setting of six levels of setting values is used, just like the pachinko machine 10 of the first form.

In detail, when the setting corresponding memory area 325 is used in the pachinko machine 10 of the second form, as shown in the explanatory diagram of FIG. 142(b), various information corresponding to "setting 1" is stored in the first setting information memory area 325a and the fourth setting information memory area 325d. In other words, in the first setting information memory area 325a and the fourth setting information memory area 325d, the first low probability hit/miss table LT (1) corresponding to "setting 1" is stored in the memory area for storing the hit/miss table of the low probability mode, the first high probability hit/miss table HT (1) corresponding to "setting 1" is stored in the memory area for storing the hit/miss table of the high probability mode, and display data for displaying "1" is stored in the memory area for storing the display data of the setting value.

Various information corresponding to "Setting 3" is stored in the second setting information storage area 325b and the fifth setting information storage area 325e. That is, in the second setting information storage area 325b and the fifth setting information storage area 325e, a third low probability correctness table LT (3 ) is stored, and a third high probability correctness table HT(3) corresponding to "Setting 3" is stored in the storage area for storing the correctness table of the high probability mode, and the display data of the setting value is stored. Display data for displaying "3" is stored in the storage area for storage.

Various information corresponding to "setting 6" is stored in the third setting information storage area 325c and the sixth setting information storage area 325f. That is, in the third setting information storage area 325c and the sixth setting information storage area 325f, the sixth low probability correctness table LT (6 ) is stored, and a sixth high probability correctness table HT(6) corresponding to "Setting 6" is stored in the storage area for storing the accuracy table of the high probability mode, and the display data of the set value is stored. Display data for displaying "6" is stored in the storage area for storage.

In the case of the configuration of the second embodiment, even if the configuration uses the setting corresponding storage area 325 having the first to sixth setting information storage areas 325a to 325f, these first to sixth setting information storage areas 325a to 325f The setting value for the number of stages is set to be smaller than the number of 6 stages. The probability of a jackpot result in the low probability mode increases as the set value increases, and the probability of a jackpot result in the high probability mode also increases as the set value increases. Note that the jackpot probability in the high probability mode in "Setting 1" is higher than the jackpot probability in the low probability mode in "Setting 6".

In the case of the second form of configuration described above, in the process of reading the pass/fail table (Figure 143), the pass/fail table corresponding to "Setting 1" is read regardless of whether the setting value counter value is "1" or "4", the pass/fail table corresponding to "Setting 3" is read regardless of whether the setting value counter value is "2" or "5", and the pass/fail table corresponding to "Setting 6" is read regardless of whether the setting value counter value is "3" or "6".

In the process of reading the validity table (FIG. 143), the validity table is read from the setting information storage area 325 corresponding to the value of the setting value counter, regardless of the number of stages of the setting value. As a result, even if three levels of set values are set, the processing configuration of the read/fail table read process (Fig. 143) is the same as when six levels of set values are set. becomes possible.

In the case of the second embodiment, when the setting corresponding memory area 325 capable of setting six setting values is used, three setting values are set, so that the number of setting value levels that can be set in the setting corresponding memory area 325 can be divided by the number of setting value levels to be used. In other words, the number of setting value levels to be used is a divisor of the maximum number of setting value levels that can be set in the setting corresponding memory area 325, and is a number different from the maximum number of setting value levels. In this case, the same number of setting information memory areas 325a to 325f are assigned to each of the setting values to be used, and the setting values are assigned to the first to sixth setting information memory areas 325a to 325f so that when the three setting values are arranged one by one in ascending order as one group, the group is repeated. As a result, if the reset button 68c is operated repeatedly during the setting value update process (FIG. 116) when the setting value counter value is "1", the setting values displayed on the first to fourth notification display devices 201 to 204 will change in the following order: "1" → "3" → "6" → "1" → "3" → "6" → "1" → ... In other words, a different setting value will be displayed with each operation of the reset button 68c, and if one display cycle is defined as a cycle in which each of the settable setting values is displayed once, a certain number of display cycles will be repeated. This makes it easier to perform setting value update operations.

In the setting process to the fifth display data buffer 275 (FIG. 144) during the setting update, the setting value is displayed from the setting information storage area 325 corresponding to the value of the setting value counter, regardless of the number of stages of the setting value. This is a configuration for reading data. As a result, even if three levels of setting values are set, the processing configuration of the setting process (Fig. 144) can be made the same as when six levels of setting values are set. It becomes possible.

In addition, in the pachinko machine 10 of the second form, various information corresponding to "setting 1" is stored in the first setting information storage area 325a and the second setting information storage area 325b, and the third setting information storage area 325c and the third setting information storage area 325c and the second setting information storage area 325b are stored. Various information corresponding to "Setting 3" is stored in the 4th setting information storage area 325d, and various information corresponding to "Setting 6" is stored in the 5th setting information storage area 325e and 6th setting information storage area 325f. A configuration may also be used. In other words, the same number of setting information storage areas 325a to 325f are allocated to each setting value to be used, and the setting information storage areas in which the same setting value is continuous in relation to the value of the setting value counter. The configuration may be set to 325a to 325f. In this case, if the reset button 68c is repeatedly operated in a situation where the value of the setting value counter is "1" in the setting value update process (FIG. 116), the first to fourth notification display devices 201 to 204 The setting values displayed will be changed in the order of "1" → "1" → "3" → "3" → "6" → "6" → "1" → .

When the setting corresponding memory area 325 is used in the third form of pachinko machine 10, as shown in the explanatory diagram of FIG. 142(c), various information corresponding to "setting 1" is stored in the first setting information memory area 325a and the second setting information memory area 325b. In other words, in the first setting information memory area 325a and the second setting information memory area 325b, the first low probability win/loss table LT (1) corresponding to "setting 1" is stored in the memory area for storing the win/loss table of the low probability mode, the common high probability win/loss table HT common to "setting 1" to "setting 6" is stored in the memory area for storing the win/loss table of the high probability mode, and display data for displaying "1" is stored in the memory area for storing the display data of the setting value.

Various information corresponding to "Setting 2" is stored in the third setting information storage area 325c and the fourth setting information storage area 325d. That is, in the third setting information storage area 325c and the fourth setting information storage area 325d, a second low probability correctness table LT (2 ) is stored, and a common high probability table HT that is common to "Settings 1" to "Settings 6" is stored in the storage area for storing the high probability mode's pass/fail table, and the set values are displayed. Display data for displaying "2" is stored in a storage area for storing data.

The fifth setting information storage area 325e stores various information corresponding to "Setting 3." In other words, in the fifth setting information storage area 325e, the third low-probability win/loss table LT (3) corresponding to "Setting 3" is stored in the storage area for storing the win/loss table for the low probability mode, the common high-probability win/loss table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the win/loss table for the high probability mode, and display data for displaying "3" is stored in the storage area for storing the display data for the setting value.

Various information corresponding to "Setting 4" is stored in the sixth setting information storage area 325f. That is, in the sixth setting information storage area 325f, a fourth low probability correctness table LT(4) corresponding to "setting 4" is stored in the storage area for storing the correctness table of the low probability mode, and a fourth low probability correctness table LT(4) corresponding to "setting 4" is stored. A common high-probability table HT that is common to "Setting 1" to "Setting 6" is stored in the storage area for storing the probability mode probability table, and a storage area for storing display data of setting values. Display data for displaying "4" is stored.

In the case of the configuration of the third embodiment, even if the configuration uses the setting storage area 325 having the first to sixth setting information storage areas 325a to 325f, these first to sixth setting information storage areas 325a to 325f The setting value for the number of stages is set to be smaller than the number of 6 stages. The probability of a jackpot result in the low probability mode increases as the setting value increases, and the probability of a jackpot result in the high probability mode remains the same regardless of the setting value. In addition, since the probability of a jackpot result in high probability mode is 1/30, even with "Setting 1", the probability of a jackpot result in high probability mode is higher than the jackpot probability of low probability mode with "Setting 4". There is a high probability.

In the case of the configuration of the third embodiment, in the read-out process of the validity table (FIG. 143), whether the value of the setting value counter is "1" or "2" corresponds to "setting 1". The validity table is read out, and whether the value of the setting value counter is "3" or "4", the validity table corresponding to "setting 2" is read out, and the value of the setting value counter is If the value of the setting value counter is "5", the validity table corresponding to "Setting 3" is read out, and if the value of the setting value counter is "6", the validity table corresponding to "Setting 4" is read out.

In the process of reading the pass/fail table (Fig. 143), the pass/fail table is read from the setting information storage area 325 corresponding to the value of the setting value counter, regardless of the number of stages of the setting value. This makes it possible to make the processing configuration of the process of reading the pass/fail table (Fig. 143) the same as when a six-stage setting value is set, even when a four-stage setting value is set.

In the case of the configuration of the third embodiment, when the setting corresponding memory area 325 capable of setting six setting values is used, four setting values are set, so the number of setting value levels that can be set in the setting corresponding memory area 325 cannot be divided by the number of setting value levels to be used. In this case, two consecutive setting information memory areas 325a to 325d are assigned to each of "Setting 1" and "Setting 2" in relation to the value of the setting value counter, and one setting information memory area 325e, 325f is assigned to each of "Setting 3" and "Setting 4". As a result, when the reset button 68c is repeatedly operated from a situation where the value of the setting value counter is "1" in the setting value update process (FIG. 116), the setting values displayed on the first to fourth notification display devices 201 to 204 are changed in the following order: "1" → "1" → "2" → "2" → "3" → "4" → "1" → ....

In the setting process (FIG. 144) to the fifth display data buffer 275 during setting update, the display data of the setting value is read from the setting information storage area 325 corresponding to the value of the setting value counter, regardless of the number of stages of the setting value. This makes it possible to make the processing configuration of the setting process (FIG. 144) the same as when a six-stage setting value is set, even when a four-stage setting value is set.

In addition, in order to change the display of the setting value in the first to fourth notification display devices 201 to 204 in response to one operation of the reset button 68c in the setting value update process (FIG. 116), it is preferable that various information corresponding to the same setting value is not set in consecutive setting information storage areas 325a to 325f in relation to the value of the setting value counter. For example, a configuration is conceivable in which various information corresponding to "Setting 1" is set in the first setting information storage area 325a, various information corresponding to "Setting 2" is set in the second setting information storage area 325b, various information corresponding to "Setting 3" is set in the third setting information storage area 325c, various information corresponding to "Setting 4" is set in the fourth setting information storage area 325d, various information corresponding to "Setting 1" is set in the fifth setting information storage area 325e, and various information corresponding to "Setting 2" is set in the sixth setting information storage area 325f. In this case, if the reset button 68c is operated repeatedly when the value of the setting value counter is "1" during the setting value update process (Figure 116), the setting values displayed on the first to fourth notification display devices 201 to 204 will change in the following order: "1" → "2" → "3" → "4" → "1" → "2" → "1" → ...

In detail, when the setting corresponding storage area 325 is used in the pachinko machine 10 of the fourth form, as shown in the explanatory diagram of FIG. 142(d), all of the first to sixth setting information storage areas 325a to 325f Various information corresponding to "Setting 1" is stored in . That is, in the first to sixth setting information storage areas 325a to 325f, the first low probability correctness table LT(1) corresponding to "setting 1" is stored in the storage area for storing the correctness table of the low probability mode. A common high probability pass/fail table HT that is common to "Settings 1" to "Settings 6" is stored in the storage area for storing the pass/fail table for the high probability mode, and the display data of the setting values is stored. Display data for displaying "1" is stored in a storage area for displaying "1".

In the case of the configuration of the fourth form described above, even if the configuration uses a setting corresponding memory area 325 having first to sixth setting information memory areas 325a to 325f, only one type of setting value is set. Even in this configuration where only one type of setting value is set, the win/fail table read process (Figure 143) is configured to read the win/fail table from the setting information memory area 325 corresponding to the value of the setting value counter. This makes it possible to make the processing configuration of the win/fail table read process (Figure 143) the same as when six levels of setting values are set, even when only one type of setting value is set.

In the case of the fourth embodiment, since there is no need to set a setting value, there is basically no need to execute the setting value update process (Fig. 116). However, if an abnormality occurs in the setting value, the setting value update process (Fig. 116) may be executed. In this case, "Setting 1" is assigned to all of the first to sixth setting information storage areas 325a to 325f. Therefore, if the reset button 68c is repeatedly operated from a situation in which the setting value counter value is "1" in the setting value update process (Fig. 116), the setting value displayed on the first to fourth notification display devices 201 to 204 will continue to display "1" in the following order: "1" → "1" → "1" → "1" → "1" → "1" → "1" → "1" → ...

In the setting process to the fifth display data buffer 275 (FIG. 144) during the setting update, the setting value is displayed from the setting information storage area 325 corresponding to the value of the setting value counter, regardless of the number of stages of the setting value. This is a configuration for reading data. As a result, even when only one type of setting value is set, the processing configuration of the setting process (Fig. 144) is the same as when six levels of setting values are set. becomes possible.

According to this embodiment described in detail above, the following excellent effects are achieved.

Since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player expects that the more advantageous setting value is to be used. It happens. In this case, in the pachinko machine 10 of the second to fourth embodiments, a first predetermined number (specifically, six) of setting information storage areas 325a to 325f are provided for storing the validity table corresponding to the setting value. In this configuration, the number of types of setting values to be used is smaller than the first predetermined number. As a result, it is possible to share the configuration regarding the setting corresponding storage area 325 with the pachinko machine 10 of the first form in which the number of types of setting values to be used is the first predetermined number, and changing the number of types of setting values. This makes it possible to easily design the pachinko machine 10 when the pachinko machine 10 is used.

In the setting value update process (step S7918), each time the reset button 68c is operated, the numerical information of the setting value counter provided in the work area 221 for specific control is changed, so that the setting value to be used is changed. By using the validity tables in the setting information storage areas 325a to 325f corresponding to the changed numerical information in the validity determination process, the validity determination process is executed in a manner corresponding to the setting value to be used. Become. In this case, each validity table of setting values that can be set is configured to be stored in at least one setting information storage area 325a to 325f, and is a part of the first predetermined number of setting information storage areas 325a to 325f. Since the areas 325a to 325f are configured to store the same validity table, the validity table is stored in all of the first predetermined number of setting information storage areas 325a to 325f. As a result, the first predetermined number of setting information storage areas 325a to 325f can be used as is, and the setting value to be used can be determined while using the configuration of determining the setting value to be used using the setting value counter. It becomes possible to make the number of types smaller than the first predetermined number.

The configuration is such that a propriety table is read from the setting information storage areas 325a to 325f corresponding to the numerical information of the setting value counter, and a propriety determination process is executed using the read propriety table. As a result, even if the number of types of set values to be used is smaller than the first predetermined number, it is possible to use the configuration that reads the validity table when executing the validity determination process as is. .

When the setting value update process (step S7918) is being executed, the display data for the setting value is read from the setting information storage areas 325a to 325f corresponding to the numerical information of the setting value counter, and the display corresponding to the read display data for the setting value is performed on the fourth notification display device 204. This makes it possible to use the configuration for reading the display data for the setting value when performing the display corresponding to the setting value, even if the number of types of setting values to be used is less than the first predetermined number.

The number of stages of setting values to be used is a divisor of the maximum number of stages of setting values that can be set in the setting correspondence storage area 325, and is different from the maximum number of stages. In this case, the same number of setting information storage areas 325a to 325f are allocated to each of the setting values to be used, and three setting values are arranged one by one in ascending order as one group. In this case, setting values are assigned to the first to sixth setting information storage areas 325a to 325f so that the group is repeated. As a result, when the reset button 68c is repeatedly operated in a situation where the value of the setting value counter is "1" in the setting value update process (FIG. 116), the first to fourth notification display devices 201 to 204 are displayed. The setting values displayed will be changed in the order of "1" → "3" → "6" → "1" → "3" → "6" → "1" → . In other words, the display changes to a different setting value in response to one operation of the reset button 68c, and the display is displayed in a fixed manner when one display cycle is defined as displaying each settable setting value once. The rounds will be repeated. Therefore, it becomes easier to update the setting values.

In a configuration in which the win/lose table for the high probability mode does not change according to the setting value, the win/lose table for the high probability mode may be stored in a memory area different from the setting corresponding memory area 325 in the main ROM 64, rather than being stored in the first to sixth setting information memory areas 325a to 325f of the setting corresponding memory area 325.

Further, when there is only one setting value to be used, the validity table corresponding to that setting value is set in only one setting information storage area 325a to 325f, and the remaining setting information storage areas 325a to 325f are set. 325f may have a configuration in which no pass/fail table is set. Further, if the setting values to be used are in multiple stages, but the number of stages is smaller than the number of the first to sixth setting information storage areas 325a to 325f, the validity tables corresponding to each of the setting values are A configuration may also be adopted in which the validity table is set only in one corresponding setting information storage area 325a to 325f and the validity table is not set in the remaining setting information storage areas 325a to 325f. In this configuration, the numerical information corresponding to the setting information storage areas 325a to 325 in which the validity table is not set is set as numerical information that cannot be selected in the setting value counter, so that the setting information storage area in which the validity table is not set. 325a to 325f can be prevented from being selected when reading the validity table or reading the setting value display data.

<Fortieth embodiment>
In the above-mentioned thirty-ninth embodiment, a setting corresponding memory area 325 capable of setting six levels of setting values is utilized, but in the present embodiment, a setting corresponding memory area 326 capable of setting three levels of setting values is utilized.

Figures 145(a) to 145(c) are explanatory diagrams for explaining the setting correspondence memory area 326 that is pre-stored in the main ROM 64.

The settings storage area 326 is provided with a first settings information storage area 326a, a second settings information storage area 326b, and a third settings information storage area 326c. In the first form of pachinko machine 10 shown in FIG. 145(a), various information corresponding to "Setting 1" is set in the first setting information storage area 326a, and "Setting 2" is set in the second setting information storage area 326b. Various information corresponding to "Setting 3" is set in the third setting information storage area 326c. In other words, in the first form of pachinko machine 10, the maximum number of settable setting values are set in the setting correspondence storage area 326.

In the pachinko machine 10 of the second form shown in FIG. 145(b), various information corresponding to "setting 1" is set in all of the first to third setting information storage areas 326a to 326c. In other words, in the pachinko machine 10 of the second form, only one type of setting value is set using the setting corresponding storage area 326, which can set three levels of setting values.

In the pachinko machine 10 of the third form shown in FIG. 145(c), various information corresponding to "setting 1" is set in the first setting information storage area 326a and the second setting information storage area 326b, and the third setting Various information corresponding to "Setting 3" is set in the information storage area 326c. That is, in the pachinko machine 10 of the third embodiment, two levels of setting values are set using the setting corresponding storage area 326 in which three levels of setting values can be set.

According to the above configuration, the setting corresponding storage area 326 in which setting values in three stages can be set is used in the second and third forms in which setting values in a number of stages smaller than the setting values in three stages are to be used. It becomes possible to use it as is for the pachinko machine 10. In addition, similarly to the thirty-ninth embodiment, the processing configuration of the read-out process of the validity table (FIG. 143) and the processing configuration of the setting process to the fifth display data buffer 275 during the setting update (FIG. 144) are - It becomes possible to use it in common in the pachinko machine 10 of the third form.

<41st embodiment>
In this embodiment, when the setting confirmation process (step S7914) or the setting value update process (step S7918) is executed in the main process (FIG. 114) in the main CPU 63, it is visible from the front side of the pachinko machine 10. This embodiment differs from the thirty-third embodiment in that a predetermined notification is executed on the display section. Hereinafter, configurations that are different from the thirty-third embodiment described above will be explained. Note that descriptions of the same configurations as those in the thirty-third embodiment described above will be basically omitted.

FIG. 146(a) is an explanatory diagram for explaining various display sections provided in an area that is visible from the front of the Pachinko machine 10 through the window panel 52 that forms the front surface of the Pachinko machine 10.

Various display sections are provided, including a special chart display section 37a, a special chart reserved display section 37b, a regular chart display section 38a, and a regular chart reserved display section 38b. These functions are the same as those of the first embodiment. The special chart display section 37a and the regular chart display section 38a are arranged side-by-side, and a round display section 330 is arranged side-by-side with the special chart display section 37a and the regular chart display section 38a.

The round display section 330, like the special display section 37a and the regular display section 38a, has seven display segments 331-337. All seven display segments 331-337 are rod-shaped light-emitting areas of the same shape and size, and are arranged to form the number "8". The illumination of the seven display segments 331-337 is individually controlled.

The round display section 330 notifies the number of round games that occur in the opening/closing execution mode triggered by a jackpot result. In this embodiment, the jackpot results that can be selected when a jackpot is won in the judgment process are the first jackpot result that triggers the transition to the opening/closing execution mode in which the number of executions of the round game is relatively small, and the round game. There is a second jackpot result that triggers the transition to the opening/closing execution mode in which the number of executions is relatively large. Specifically, the round game is executed twice in the opening/closing execution mode triggered by the first jackpot result, and the round game is executed 16 times in the opening/closing execution mode triggered by the second jackpot result.

The first jackpot result includes a jackpot result in which the win/lose selection mode becomes a low probability mode and the support mode becomes a low frequency support mode after the opening/closing execution mode ends, and a jackpot result in which the win/lose selection mode becomes a high probability mode and the support mode becomes a high frequency support mode after the opening/closing execution mode ends.The second jackpot result includes a jackpot result in which the win/lose selection mode becomes a low probability mode and the support mode becomes a low frequency support mode after the opening/closing execution mode ends, and a jackpot result in which the win/lose selection mode becomes a high probability mode and the support mode becomes a high frequency support mode after the opening/closing execution mode ends.

Figure 146 (b) is an explanatory diagram for explaining the display contents of the round display section 330.

When an opening and closing execution mode is started in response to any jackpot result, the round display unit 330 changes from a non-display state in which all display segments 331-337 are turned off to a display state in which at least some of the display segments 331-337 are illuminated. While the opening and closing execution mode continues, the display content displayed on the round display unit 330 at the start of the opening and closing execution mode is maintained. Then, when the opening and closing execution mode ends, the round display unit 330 changes from a display state to a non-display state.

In the open/close execution mode in which two round games are played, as shown in FIG. 146(b), the first to fourth display segments 331 to 334 of the round display section 330 are turned off, and the fifth ~The seventh display segments 335 to 337 are turned on. In the open/close execution mode in which 16 round games are played, as shown in FIG. 146(b), the first to fourth display segments 331 to 334 of the round display section 330 are lit, and the fifth ~The seventh display segments 335 to 337 are turned off. As a result, when the opening/closing execution mode is being executed in the pachinko machine 10, the administrator of the game hall can check the round display section 330 to determine which type of opening/closing execution mode the opening/closing execution mode corresponds to. This makes it possible to understand whether the

If the setting value update process (step S7918) is being executed in the main process (FIG. 114) in the main CPU 63, a corresponding display is performed on the round display section 330. Specifically, when the setting value update process (step S7918) is being executed, as shown in FIG. 146(b), the first display segment 331, the third display segment 333, and The fifth display segment 335 and the seventh display segment 337 are turned off, and the second display segment 332, the fourth display segment 334, and the sixth display segment 336 are turned on.

The display on the round display unit 330 corresponding to the setting value update process (step S7918) starts when the setting value update process (step S7918) is started, and ends when the setting value update process (step S7918) is ended. This display content is different from the display content displayed on the round display unit 330 when the open/close execution mode is executed, and also different from the display content displayed on the round display unit 330 when the setting confirmation process (step S7914) described below is executed. This allows the manager of the game hall to easily determine whether or not the setting value update process (step S7918) is being executed by checking the round display unit 330. This determination can also be made by using the round display unit 330.

If the setting confirmation process (step S7914) is being executed in the main process (FIG. 114) in the main CPU 63, a corresponding display is performed on the round display section 330. Specifically, when the setting confirmation process (step S7914) is executed, as shown in FIG. 146(b), the first display segment 331, the third display segment 333, and The fifth display segment 335 and the seventh display segment 337 are turned on, and the second display segment 332, the fourth display segment 334, and the sixth display segment 336 are turned off.

The display on the round display unit 330 corresponding to the setting confirmation process (step S7914) starts when the setting confirmation process (step S7914) is started, and ends when the setting confirmation process (step S7914) is ended. This display content is different from the display content displayed on the round display unit 330 when the open/close execution mode is executed, and also different from the display content displayed on the round display unit 330 when the setting value update process (step S7918) is executed. This allows the manager of the game hall to easily determine whether or not the setting confirmation process (step S7914) is being executed by checking the round display unit 330. This determination can also be made by using the round display unit 330.

In the main processing (FIG. 114), when the setting confirmation process (step S7914) and the setting value update process (step S7918) are executed, no processing for progressing the game is executed. Therefore, when the open/close execution mode is being executed, the setting confirmation process (step S7914) and the setting value update process (step S7918) are not executed. Furthermore, when one of the setting confirmation process (step S7914) and the setting value update process (step S7918) is being executed, the other is not executed. Therefore, even if the round display unit 330 is used as a display unit for each display, there will be no overlapping of situations in which each display should be executed.

Note that the display content of the round display section 330 is not limited to the above display content, and may be arbitrary as long as it is possible to distinguish each situation from the display content of the round display section 330, for example. One of the display and setting value update processing (step S7918) corresponding to the setting confirmation processing (step S7914) may be configured such that all of the first to seventh display segments 331 to 337 are turned on. Also, in one of the display and setting value update processing (step S7918) corresponding to the setting confirmation processing (step S7914), all of the first to seventh display segments 331 to 337 are turned on and the state is maintained. On the other hand, all of the first to seventh display segments 331 to 337 may be in a blinking state.

In addition, instead of a configuration in which the round display unit 330 displays the display corresponding to the setting confirmation process and the display corresponding to the setting value update process, these displays may be made on the special map display unit 37a, or on the general map display unit 38a. Also, a display corresponding to the setting confirmation process may be made on one of the special map display unit 37a, general map display unit 38a, and round display unit 330, and a display corresponding to the setting value update process may be made on the other display unit.

In addition, in a configuration in which the reserved information acquired based on the game ball entering the first operating port 33 and the reserved information acquired based on the game ball entering the second operating port 34 are stored separately, and the special chart display unit 37a is provided with a first special chart display unit in which a game round is executed triggered by the reserved information corresponding to the first operating port 33, and a second special chart display unit in which a game round is executed triggered by the reserved information corresponding to the second operating port 34, the first special chart display unit may be configured to display a display corresponding to the setting confirmation process and a display corresponding to the setting value update process, the second special chart display unit may be configured to display a display corresponding to the setting confirmation process and a display corresponding to the setting value update process, or the first special chart display unit may be configured to display a display corresponding to the setting confirmation process and the second special chart display unit may be configured to display a display corresponding to the setting value update process.

Further, a configuration may be provided in which a dedicated display unit is provided to display that a setting confirmation process is being executed, and to display that a setting value update process is being executed. The configuration may be such that a dedicated display section is provided for displaying that the setting confirmation process is being executed or that the setting value update process is being executed. A configuration may also be adopted in which a display section is provided. In this case, the dedicated display section may be configured to be display-controlled by the main CPU 63, or may be configured to be display-controlled by the audio emission control device 81 or the display control device 82.

<42nd embodiment>
This embodiment is different from the thirty-third embodiment described above in the processing configurations of the main processing and the first timer interrupt processing. Hereinafter, the configuration that is different from the thirty-third embodiment described above will be explained. Note that descriptions of the same configurations as those in the thirty-third embodiment described above will be basically omitted.

Figure 147 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing of steps S9901 to S9923 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

First, the power-on initial setting process is executed (step S9901). In the power-on initial setting process, for example, the main process is started and then the process waits until a predetermined waiting time (specifically, one second) has elapsed before proceeding to the next process. During this predetermined waiting period, the operation start and initial setting of the pattern display device 41 are completed. In addition, access to the main RAM 65 is permitted.

Thereafter, internal function register setting processing is executed (step S9902). In the internal function register setting process, similar to step S7902 of the main process (FIG. 114) in the thirty-third embodiment, a first timer interrupt process (a process that is started by periodically interrupting the main process) is performed. 148) is set to the first interrupt cycle (specifically, 4 milliseconds), and the second timer interrupt process (Figure 123), which is a process that is started by periodically interrupting the main process, is set. ) is set to a second interrupt cycle (specifically, 2 milliseconds) that is shorter than the first interrupt cycle.

After that, interrupt permission is set for the second timer interrupt process (Fig. 123) (step S9903). As a result, the second timer interrupt process (Fig. 123) is started by interrupting at the second interrupt period. On the other hand, interrupt permission is not set for the first timer interrupt process (Fig. 148). As a result, the first timer interrupt process (Fig. 148) remains in an interrupt-prohibited state.

Thereafter, the processes from step S9904 to step S9917 are executed. The processing contents of steps S9904 to S9917 are the same as steps S7905 to S7918 of the main processing (FIG. 114) in the thirty-third embodiment.

After steps S9904 to S9917 are completed, interrupt permission is set for the first timer interrupt process (Fig. 148) (step S9918). This causes the first timer interrupt process (Fig. 148) to interrupt and be started at the first interrupt period. In other words, the first timer interrupt process (Fig. 117) is started at the first interrupt period, and the second timer interrupt process (Fig. 123) is started at the second interrupt period. Thereafter, steps S9919 to S9923 execute the same processes as steps S7920 to S7924 of the main process (Fig. 114) in the 33rd embodiment.

FIG. 148 is a flowchart showing the first timer interrupt process in this embodiment executed by the main CPU 63. Note that, as already explained, the first timer interrupt process is started periodically at a 4 millisecond cycle, which is the first interrupt cycle. Further, the program corresponding to the first timer interrupt processing is set as a specific control program.

First, interrupt prohibition is set to prohibit the occurrence of the first timer interrupt processing (FIG. 148) and the second timer interrupt processing (FIG. 123) (step SA101). By prohibiting the occurrence of the first timer interrupt processing (FIG. 148), it is possible to prevent the first timer interrupt processing (FIG. 148) from being started in duplicate even if the first interrupt period has elapsed during the execution of the first timer interrupt processing (FIG. 148). Also, by prohibiting the occurrence of the second timer interrupt processing (FIG. 123), it is possible to prevent the second timer interrupt processing (FIG. 123) from interrupting the first timer interrupt processing (FIG. 148) and starting it up even if the second interrupt period has elapsed.

Thereafter, in steps SA102 to SA121, the same processes as steps S8202 to S8221 of the first timer interrupt process (FIG. 117) in the thirty-third embodiment are executed. If an affirmative determination is made in step SA107 or if the process in step SA121 is executed, interrupt permission is set to allow the occurrence of the first timer interrupt process (Figure 148) and the second timer interrupt process (Figure 123). (Step SA122).

According to the above configuration, in a situation where the process at the start of supply of operating power is being executed in the main process (FIG. 147), the interrupt of the second timer interrupt process (FIG. 123) is permitted, while the first timer interrupt process (Fig. 148) interrupts are not permitted. As a result, display control of the first to fourth notification display devices 201 to 204 can be executed by the second timer interrupt process (FIG. 123) even when the process at the start of supply of operating power is being executed. On the other hand, it is possible to prevent the processing for controlling the progress of the game by the first timer interrupt processing (FIG. 148) from being executed.

Additionally, the first timer interrupt process (Figure 148) interrupts the second timer interrupt process (Figure 123) and is not activated, and the second timer interrupt process (Figure 123) interrupts the first timer interrupt process (Figure 148). It interrupts and does not start. This makes it possible to prevent timer interrupt processing from being activated redundantly.

<43rd embodiment>
This embodiment is different from the thirty-fifth embodiment in the configuration for displaying the base value on the first to fourth notification display devices 201 to 204. Hereinafter, configurations that are different from the thirty-fifth embodiment described above will be explained. Note that the description of the same configuration as the thirty-fifth embodiment is basically omitted.

In this embodiment as well, a normal counter area 231 is provided in the work area 223 for non-specific control, as in the thirty-fifth embodiment. The normal counter area 231 includes a normal general winning counter 231a, a special electric winning counter 231b for normal use, a first operating counter 231c for normal use, a second operating counter 231d for normal use, and A normal out counter 231e is provided. When one game ball enters the general winning hole 31 in a situation that is neither the opening/closing execution mode based on the jackpot result nor the high-frequency support mode, the value of the general winning counter 231a for normal use is added by 1, and the special When one game ball enters the winning device 32, the value of the special electric winning counter 231b for normal use is incremented by 1, and when one game ball enters the first operating port 33, the value of the special electric winning counter 231b for normal use is added. The value of the first operation counter 231c is incremented by 1, and when one game ball enters the second operation port 34, the value of the second operation counter 231d for normal use is incremented by 1, and the value of the second operation counter 231d for normal use is incremented by 1. When one game ball enters, 1 is added to the value of the normal out counter 231e. Then, when the values of the various counters 231a to 231e in the normal counter area 231 in a situation that is neither the opening/closing execution mode due to the jackpot result nor the high frequency support mode are K91 to K95, the base values are as follows.
・Base value: Total number of game balls paid out (K91 x ``Number of prize balls for winning into the general winning opening 31'' + K92 x ``Number of winning balls for winning into the special electric winning device 32'' + K93 x ``To the first operating opening 33'' Ratio of the total number of game balls ejected from the gaming area PA (K91+K92+K93+K94+K95).

In addition to the normal counter area 231, the work area 223 for non-specific control is also provided with a calculation result storage area 234. As in the 35th embodiment, the calculation result storage area 234 is provided with a current state area 311, a first history area 312, a second history area 313, and a third history area 314 as storage areas for storing information on the base value (see FIG. 126). The current state area 311 stores the most recent base value calculated in the result calculation process (FIG. 149). The first history area 312 stores the final base value in the calculation period one period before. The second history area 313 stores the final base value in the calculation period two periods before. The third history area 314 stores the final base value in the calculation period three periods before.

Figure 149 is a flowchart showing the result calculation process in this embodiment executed by the main CPU 63. In the management process (step S8920) in the first timer interrupt process (Figure 133), a program for the management execution process, which is a process corresponding to non-specific control, is read out in step S3803, as in the management process (Figure 70) in the 15th embodiment. In this management execution process (Figure 71), a check process is executed in step S3908, as in the 15th embodiment. In this check process, the result calculation process is executed, and the display process (Figure 150), which will be described later, is executed. In addition, the processes in steps SA201 to SA217 in the result calculation process are executed using the program for non-specific control and data for non-specific control in the main CPU 63.

First, base value calculation processing is executed (step SA201). In the calculation process, the base value is calculated using the values of the various counters 231a to 231e in the normal counter area 231, as in the thirty-fifth embodiment. Here, in this embodiment, the calculation of the base value is not completed in one process of the result calculation process, but is completed by executing the process of the result calculation process a predetermined plurality of times.

Specifically, in a predetermined processing time of the result calculation process in which a new base value calculation is started, the values of the various counters 231a to 231e in the normal counter area 231 are set to K91 to K95 in step SA201. In this case, K91 x ``Number of prize balls for winning in the general winning opening 31'', K92 x ``Number of winning balls for winning in the special electric winning device 32'', and K93 x ``Number of winning balls for winning in the first operating opening 33''. The number of prize balls", K94 x "the number of prize balls for winning into the second operating port 34", and the total number of game balls ejected from the technique area PA (K91+K92+K93+K94+K95), and calculate the results of each calculation. is stored in the calculation storage area provided in the work area 223 for non-specific control. Thereafter, in step SA201 of calculating the results of the processing round after the predetermined processing round, the total number of game balls to be paid out (K91 x "Number of prize balls for winning in the general winning opening 31" + K92 x "Number of prize balls for winning in the special electric winning device 32" + K93 x "Number of winning balls for winning in the first operation opening 33" + K94 x "Second operation The number of prize balls that hit the winning hole 34) is calculated, and the result of the calculation is stored in the storage area during calculation. Thereafter, in step SA201 of calculating the result of the second processing time after the predetermined processing time, the base value is calculated using various information stored in the storage area during calculation.

In other words, in this embodiment, the result calculation process needs to be executed three times to calculate one base value. In this case, the result calculation process is called and executed by the first timer interrupt process (Figure 133), so it is executed every time the first interrupt period (specifically, 4 milliseconds) has elapsed. Therefore, one base value is calculated at approximately 12 millisecond intervals. However, this is not limited to this, and the period for calculating one base value may be shorter than the 12 millisecond interval, or longer than the 12 millisecond interval.

As described above, by configuring the result calculation process to calculate one base value by performing the process multiple times, it is possible to reduce the processing load for calculating the base value. In particular, since the result calculation process is executed as a process corresponding to non-specific control, in order to execute the result calculation process, it is necessary not only to read out the program for non-specific control and the data for non-specific control, but also to save the information of various registers of the main CPU 63 used in the process corresponding to specific control. In this case, by reducing the processing load for calculating the base value, it is possible to reduce the processing load of the result calculation process, and as a result, it is possible to reduce the processing load for executing the process corresponding to non-specific control.

Even in a configuration in which multiple rounds of result calculation processing are performed to calculate a single base value, each piece of information during the calculation of the base value in each round of result calculation processing is written to the work area 223 for non-specific control. This makes it possible to store and hold each piece of information during the calculation of the base value even if information in various registers of the main CPU 63 used in the processing corresponding to non-specific control is erased as processing corresponding to specific control is performed between one round of result calculation processing and the next round of result calculation processing.

Even in a configuration in which the result calculation process is executed multiple times to calculate one base value, the values of all of the counters 231a to 231e in the normal counter area 231 are extracted in the first result calculation process to calculate a new base value, and the base value for that calculation is calculated using the extracted values. This makes it possible to calculate one base value without being affected by the change in values, even if the values of the counters 231a to 231e in the normal counter area 231 are changed while the base value is being calculated.

After the base value calculation process is executed in step SA201, it is determined whether the calculation of one base value has been completed in the result calculation process of the current processing round (step SA202). If calculation of the first base value is not completed (step SA202: NO), overwriting of the base value to the current area 311 of the calculation result storage area 234 is not performed by not executing the processes of steps SA203 to SA205.

If the calculation of a base value is completed (step SA202: YES), the calculated base value is overwritten in the current state area 311 (step SA203). Then, it is determined whether or not the shift trigger flag provided in the work area 223 for non-specific control is set to "1" (step SA204). In this embodiment, when the calculation of a new base value is completed after the total number of game balls discharged from the game area PA (i.e., the total number of game balls supplied to the game area PA) becomes the shift reference number (specifically, 60,000) in a situation other than the opening and closing execution mode due to the jackpot result and the high frequency support mode, the data shift process (step SA216) in the calculation result storage area 234 is executed. In this data shift process, the information stored in the current status area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234 is shifted in the order of the second history area 313 → the third history area 314, the first history area 312 → the second history area 313, and the current status area 311 → the first history area 312, and then the current status area 311 is cleared to "0". The shift trigger flag is a flag that allows the master CPU 63 to identify the situation after the total number of game balls has reached the shift reference number and before the data shift process is executed.

If the shift trigger flag is set to "1" (step SA204: YES), the shift calculation completion flag provided in the work area 223 for non-specific control is set to "1" (step SA205). The shift calculation completion flag is a flag that allows the main CPU 63 to identify that calculation of one base value has been completed after the total number of game balls has reached the shift reference number.

If a negative determination is made in step SA202, if a negative determination is made in step SA204, or if the process in step SA205 is executed, "1" is set in the management start flag provided in the work area 223 for non-specific control. It is determined whether it is set (step SA206). If the management start flag is not set to "1" (step SA206: NO), pre-management processing is executed (step SA207). In the pre-management processing, steps S8604 to S8608 of the result calculation processing (FIG. 130) in the thirty-fifth embodiment are executed.

If the management start flag is set to "1" (step SA206: YES), it is determined whether the shift trigger flag in the non-specific control work area 223 is set to "1" (step SA208). . If the shift trigger flag is not set to "1" (step SA208: NO), the total number is calculated by summing all the values of the various counters 231a to 231e in the normal counter area 231 (step SA209). Then, it is determined whether the calculated total number is equal to or greater than the shift reference number of 60,000 (step SA210).

If a positive judgment is made in step SA210, the shift trigger flag in the work area 223 for non-specific control is set to "1" (step SA211). In addition, the pre-shift display flag provided in the work area 223 for non-specific control is set to "1" (step SA212). The pre-shift display flag is a flag for the main CPU 63 to identify a situation in which a pre-shift display corresponding to the total number of game balls reaching the shift reference number should be started on the first to fourth notification display devices 201 to 204.

If the shift trigger flag is set to "1" and an affirmative determination is made in step SA208, it is determined whether the computation completion flag during shift in the work area 223 for non-specific control is set to "1". (Step SA213). As already explained, the computation completion flag at the time of shift is set to "1" when the calculation of the base value of 1 is completed after the total number of game balls reaches the shift reference number. When an affirmative determination is made in step SA213, the shift trigger flag in the work area 223 for non-specific control is cleared to "0" (step SA214). Further, the computation completion flag at the time of shift in the work area 223 for non-specific control is cleared to "0" (step SA215).

Thereafter, data shift processing is executed (step SA216). In the data shift process, information stored in the current state area 311, first history area 312, second history area 313, and third history area 314 in the calculation result storage area 234 is transferred from the second history area 313 to the third history area 314. , first history area 312 → second history area 313, current area 311 → first history area 312, and then clears the current area 311 to "0". As a result, the final base value in the two previous calculation periods is stored in the third history area 314 as the final base value in the three previous calculation periods, and the final base value in the one previous calculation period is stored in the third history area 314. is stored in the second history area 313 as the final base value in the calculation period two times ago, and the base value calculated after the total number of game balls reaches the shift reference number in the current calculation period is stored once. It is stored in the first history area 312 as the final base value in the previous calculation period. Further, the current area 311 is in a state where no base value is stored. Note that in the data shift process, when shifting information as described above, an LDIR instruction is used. With the LDIR instruction, by specifying the address of the area where the information is to be stored and the address of the area where the information is to be stored, the information stored in the storage source area can be shifted (copied) to the storage destination area. becomes. Thereafter, all the counters 231a to 231e in the normal counter area 231 are cleared to "0" (step SA217).

FIG. 150 is a flowchart showing display processing in this embodiment executed by the main CPU 63. Note that the processing from step SA301 to step SA320 in the display processing is executed using a non-specific control program and non-specific control data in the main CPU 63.

First, it is determined whether the management start flag in the work area 223 for non-specific control is set to "1" (step SA301). If the determination in step SA301 is negative, similar to step S8714 of the display process (FIG. 131) in the 35th embodiment, the base value is read from the current situation area 311, and the calculation result data corresponding to the digits in the first and second decimal places of the read base value is set in the display target setting area 276 (step SA302). By transmitting the display data corresponding to the calculation result data to the display IC 266, the digits in the first and second decimal places of the base value in the current situation area 311 are displayed on the third notification display device 203, and the digits in the second decimal place of the base value in the current situation area 311 are displayed on the fourth notification display device 204. With the above configuration, in a situation where the management start flag is not set to "1", the base value in the past calculation period is not notified, and only the base value calculated in the current calculation period is notified. Note that when the management start flag is not set to "1" and the base value is notified, the display contents of the first to fourth notification display devices 201 to 204 are the same as those in the 35th embodiment.

If a positive determination is made in step SA301, the value of the switching timing counter provided in the work area 223 for non-specific control is decremented by 1 (step SA303). The switching timing counter is a counter that allows the main CPU 63 to determine the timing for switching the display contents of the first to fourth notification display devices 201-204 in a situation where the first to fourth notification display devices 201-204 display information related to the base value.

In this embodiment, the total number of game balls ejected from the game area PA (that is, the total number of game balls supplied to the game area PA) in a situation that is neither the opening/closing execution mode based on the jackpot result nor the high-frequency support mode is In a situation where the shift reference number has not been reached, the base value stored in each of the current area 311, first history area 312, second history area 313, and third history area 314 will be notified for the display duration period (specifically is executed for a period of 5 seconds), and the interval hidden display is executed for an interval period (specifically, 1 (seconds). Specifically, as the interval non-display, all the display segments 321 to 324 in each of the first to fourth notification display devices 201 to 204 are turned off, so that the first to fourth notification display devices 201 to 204 are turned off. 204 becomes hidden. By performing interval hiding before the base value to be notified is switched in the predetermined order of current area 311 → first history area 312 → second history area 313 → third history area 314, the notification is It becomes possible to make the game hall manager clearly aware that the target base value is to be changed.

In a situation where the total number of game balls reaches the shift reference number, the first to fourth notification display devices 201 to 204 display a corresponding pre-shift display. Specifically, as the pre-shift display, "A." is displayed on each of the first to fourth notification display devices 201 to 204. The display content of "A." is a display content that is not displayed on the first to fourth notification display devices 201 to 204 during either the display duration period of the display corresponding to the base value or the interval period during which the interval is not displayed. This makes it possible to make the overall display content of the first to fourth notification display devices 201 to 204 in a situation where the pre-shift display is displayed different from the display duration period of the display corresponding to the base value and the interval period during which the interval is not displayed. Therefore, by confirming that the pre-shift display is displayed on the first to fourth notification display devices 201 to 204, the manager of the game hall can grasp that the total number of game balls has reached the shift reference number and that the base value is to be shifted.

The display contents of the pre-shift display are the display contents of the first to fourth notification display devices 201 to 204 in a situation where the check display is performed, and the display contents of the first to fourth notification display devices 201 to 204 in a situation where the check display is performed, and the display contents of the first to fourth notification display devices 201 to 204 in a situation where the pre-management flag is not set to "1". Display contents of the first to fourth notification display devices 201 to 204, display contents of the first to fourth notification display devices 201 to 204 in a situation where the setting confirmation process (FIG. 136) is being executed, and setting value update This is also different from the display contents of the first to fourth notification display devices 201 to 204 in a situation where the process (FIG. 137) is being executed. From this point of view, if the game hall manager confirms that the pre-shift display is performed on the first to fourth notification display devices 201 to 204, the total number of game balls can be adjusted to the shift standard number. By reaching , it becomes possible to understand that the base value is being shifted.

The execution period of the pre-shift display is set to be longer than the interval period (specifically, 1 second) in which the interval non-display is performed. Further, the execution period of the pre-shift display is set to a period longer than the display continuation period (specifically, 5 seconds) of the display corresponding to the base value. Specifically, the execution period of the pre-shift display is set to 8 seconds. Note that the present invention is not limited to this, and the execution period of the pre-shift display may be configured to be longer than the interval period and less than or equal to the display duration period of the display corresponding to the base value, or may be configured to be less than or equal to the interval period. . However, in order to make the game hall manager clearly aware that the pre-shift display is being performed, it is preferable that the execution period of the pre-shift display be set to a longer period than the interval period.

As already explained, in order to complete the calculation of the first base value, the result calculation process (FIG. 149) must be performed multiple times, and specifically, the cycle in which the first base value is calculated is a 12 millisecond cycle. In addition, the data shift process (step SA216) in which the base value information is shifted between the various areas 311 to 314 of the calculation result storage area 234 when the total number of game balls reaches the shift reference number is executed after the first base value is newly calculated after the shift reference number is reached. In this case, the execution period of the pre-shift display is set to a period longer than the longest period required for the data shift process (step SA216) to be completed when the total number of game balls reaches the shift reference number. This makes it possible to complete the new calculation of the first base value and the data shift process (step SA216) of the base value in a situation in which the pre-shift display is being performed on the first to fourth notification display devices 201 to 204.

Returning to the explanation of the display process (FIG. 150), when the process of step SA303 is executed, it is determined whether the value of the switching timing counter after subtraction of 1 is "0" to determine whether the currently measured period among the base value display duration, the interval period during which interval non-display is performed, and the execution period of the pre-shift display has elapsed (step SA304). If a positive determination is made in step SA304, it is determined whether a pre-shift display should be started by determining whether a pre-shift display flag in the work area 223 for non-specific control is set to "1" (step SA305). If a negative determination is made in step SA305, it is determined whether an interval flag provided in the work area 223 for non-specific control is set to "1" (step SA306). The interval flag is a flag for the main CPU 63 to determine whether a situation exists in which interval non-display should be started.

If the determination in step SA306 is negative, it means that the base value is the target for which notification should be started in the first to fourth notification display devices 201 to 204 at the current switching timing. In this case, the value of the display target counter provided in the non-specific control work area 223 is incremented by 1 (step SA307). Then, if the value of the display target counter after incrementing by 1 exceeds the maximum value of "3" (step SA308: YES), the value of the display target counter is cleared to "0" (step SA309).

The counters to be displayed are the first to fourth notification displays among the base values stored in each of the current area 311, first history area 312, second history area 313, and third history area 314 in the calculation result storage area 234. This counter is used by the main CPU 63 to specify the base value to be notified in the devices 201 to 204. Specifically, when the value of the display target counter is "0", the base value stored in the current area 311 is the target of notification, and when the value of the display target counter is "1", the base value stored in the first history area The base value stored in the second history area 312 becomes the notification target, and when the value of the display target counter is "2", the base value stored in the second history area 313 becomes the notification target, and the value of the display target counter is "3". ”, the base value stored in the third history area 314 becomes the notification target.

If a negative determination is made in step SA308, or if the processing of step SA309 is executed, a value corresponding to the display duration (specifically, 5 seconds) for displaying the base value is set as a value corresponding to the next switching timing in the switching timing counter of the work area 223 for non-specific control (step SA310). After that, the interval flag in the work area 223 for non-specific control is set to "1" (step SA311). As a result, if the pre-shift display flag in the work area 223 for non-specific control has not been set to "1" by the time the next switching timing occurs, interval non-display will be performed when the next switching timing occurs.

Then, a process is executed to set display data corresponding to the base value that is the target of the current notification in the display target setting area 276 provided in the work area 223 for non-specific control. Specifically, similar to step S8708 of the display process (FIG. 131) in the 35th embodiment, display type data corresponding to the value of the display target counter is set in the display target setting area 276 (step SA312). The display type data includes display data for causing the first notification display device 201 to display an indication that the notification target of the first to fourth notification display devices 201 to 204 is the base value, and display data for causing the second notification display device 202 to display an indication of which of the current status area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234 the base value of the notification target corresponds to.

After that, similarly to step S8709 of the display processing (FIG. 131) in the thirty-fifth embodiment, the current area 311, first history area 312, second history area 313, and third history area 314 in the calculation result storage area 234 are The base value is read out from the area corresponding to the value of the display target counter, and the calculation result data corresponding to the first decimal point number and the second decimal point number in the read base value are displayed in the display target setting area 276. (step SA313). The calculation result data includes display data for causing the third notification display device 203 to display a display corresponding to the number in the first decimal place in the base value to be notified, and the number in the second decimal place in the base value to be notified. and display data for causing the fourth notification display device 204 to perform a display corresponding to the above.

Display data consisting of display type data and calculation result data is set in the display target setting area 276, and the display data is transmitted to the display IC 266 by the second timer interrupt processing (Figure 134) as in the 35th embodiment above, and a display corresponding to the display data is performed on the first to fourth alarm display devices 201 to 204. That is, when the base value of the current status area 311 is the subject of notification, a display as shown in FIG. 127(a) is displayed on the first to fourth notification display devices 201 to 204, when the base value of the first history area 312 is the subject of notification, a display as shown in FIG. 127(b) is displayed on the first to fourth notification display devices 201 to 204, when the base value of the second history area 313 is the subject of notification, a display as shown in FIG. 127(c) is displayed on the first to fourth notification display devices 201 to 204, and when the base value of the third history area 314 is the subject of notification, a display as shown in FIG. 127(d) is displayed on the first to fourth notification display devices 201 to 204.

If a positive determination is made in step SA306 because the interval flag in the work area 223 for non-specific control is set to "1," the current switching timing is displayed on the first to fourth notification display devices 201 to 204. This means that the target for which notification should be started using this as a trigger is interval non-display. In this case, an interval setting process is executed (step SA314). In this setting process, a value corresponding to an interval period (specifically, 1 second) is set in the switching timing counter of the work area 223 for non-specific control as a value corresponding to the next switching timing. Thereafter, the interval flag in the work area 223 for non-specific control is cleared to "0" (step SA315). As a result, if the pre-shift display flag in the work area 223 for non-specific control is not set to "1" before the next switching timing, the base value will be A display will be made.

Thereafter, interval data is set in the display target setting area 276 provided in the work area 223 for non-specific control (step SA316). The interval data is data for causing the first to fourth notification display devices 201 to 204 to perform interval non-display, and specifically, all the This is data for turning off the display segments 321 to 324. By setting the interval data as display data in the display target setting area 276, the interval data is transmitted to the display IC 266 in the second timer interrupt process (FIG. 134), and the first to fourth notification display devices 201 to 204 are all in a non-display state. After confirming that the first to fourth notification display devices 201 to 204 are in the non-display state, the game hall manager can understand that it is the interval period.

If a positive determination is made in step SA305 because the pre-shift display flag in the work area 223 for non-specific control is set to "1", the first to fourth notification display devices 201 to 204 display the current information. This means that the target for which notification should be started at the switching timing is the pre-shift display. In this case, a pre-shift display period setting process is executed (step SA317). In this setting process, a value corresponding to the execution period of the pre-shift display (specifically, 8 seconds) is set in the switching timing counter of the work area 223 for non-specific control as a value corresponding to the next switching timing.

Thereafter, the interval flag in the work area 223 for non-specific control is cleared to "0" and the pre-shift display flag in the work area 223 for non-specific control is cleared to "0" (step SA318), and The display target counter in the work area 223 is set to the maximum value "3" (step SA319). When the execution period of the pre-shift display has elapsed by clearing the interval flag to "0", the next notification target becomes the base value. Then, by setting the maximum value in the display target counter, if a negative determination is made in step SA306 to notify the base value, the display target counter after adding 1 to the value of the display target counter in step SA307 The value exceeds the maximum value, and an affirmative determination is made in step SA308 to clear the value of the display target counter to "0". As a result, when the execution period of the pre-shift display has elapsed, the next notification target becomes the base value, and the base value becomes the base value of the current area 311 of the calculation result storage area 234.

That is, when the pre-shift display is performed, the notification starts from the base value regardless of whether the notification target before the pre-shift display is the base value or the interval non-display. Thereby, when the pre-shift display ends, it becomes possible to confirm the base value without waiting for the interval period to elapse. Furthermore, it is also possible to determine which of the current area 311, first history area 312, second history area 313, and third history area 314 the base value that was the last notification target before the pre-shift display was performed. Even if there is, when the pre-shift display ends, the notification starts from the base value of the current area 311. This makes it possible to return the base value notification order in the current area 311, first history area 312, second history area 313, and third history area 314 to the initial notification order, and immediately after the base value shift occurs. It becomes possible to make it easier for the game hall manager to recognize that this is the case.

Then, pre-shift display data is set in the display target setting area 276 provided in the work area 223 for non-specific control (step SA320). The pre-shift display data is data for causing the first to fourth notification display devices 201 to 204 to perform a pre-shift display, specifically, data for causing each of the first to fourth notification display devices 201 to 204 to display "A.". By setting the pre-shift display data as display data in the display target setting area 276, the pre-shift display data is transmitted to the display IC 266 in the second timer interrupt process (FIG. 134), and "A." is displayed on each of the first to fourth notification display devices 201 to 204. The manager of the game hall who has confirmed that the pre-shift display is being performed on the first to fourth notification display devices 201 to 204 can understand that it is the execution period of the pre-shift display.

Next, while referring to the time chart in FIG. 151, the base values of the various areas 311 to 314 are reported on the first to fourth notification display devices 201 to 204 in a situation where the management start flag is set to "1". Explain how it is done. 151(a) shows the period during which the base value stored in the current area 311 is notified on the first to fourth notification display devices 201 to 204, and FIG. 151(b) shows the period in which the base value stored in the current area 311 is FIG. 151(c) shows the period during which the base value stored in the second history area 313 is notified on the first to fourth notification display devices 201 to 204. FIG. 151(d) shows the period during which the base value stored in the third history area 314 is notified on the first to fourth display devices 201 to 204. 151(e) shows a period in which interval non-display is performed on the first to fourth notification display devices 201 to 204, and FIG. 151(f) shows a period in which interval non-display is performed on the first to fourth notification display devices 201 to 204. 201 to 204 indicate the period in which the pre-shift display is performed, and FIG. 151 (g) shows a situation in which the base value calculation period starts anew and is neither the opening/closing execution mode due to the jackpot result nor the high-frequency support mode. It shows the timing when the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) reaches the shift reference number (specifically, 60,000 balls).

At timing t1, as shown in FIG. 151(a), notification of the base value stored in the current status area 311 is started on the first to fourth notification display devices 201 to 204. During this notification, as shown in FIG. 127(a), the first notification display device 201 displays a display indicating that the base value is the subject of notification, the second notification display device 202 displays a display indicating that the base value stored in the current status area 311 is the subject of notification, and the third notification display device 203 and the fourth notification display device 204 display a display corresponding to the base value stored in the current status area 311.

After that, at the timing of t2, the display duration period from the timing of t1 has elapsed, and as shown in FIG. 151(a), the notification of the base value stored in the current status area 311 is terminated, and as shown in FIG. 151(e), interval non-display is initiated by the first to fourth notification display devices 201 to 204. This interval non-display is terminated at the timing of t3, which is the timing when the interval period has elapsed from the timing of t2, as shown in FIG. 151(e).

At timing t3, as shown in FIG. 151(b), notification of the base value stored in the first history area 312 is started on the first to fourth notification display devices 201 to 204. At the time of this notification, as shown in FIG. 127(b), the first notification display device 201 displays a display indicating that the base value is the notification target, and the second notification display device 202 displays a message in the first history area 312. A display indicating that the stored base value is the target of notification is performed, and a display corresponding to the base value stored in the first history area 312 is displayed on the third notification display device 203 and the fourth notification display device 204. be exposed.

After that, at the timing of t4, the display duration period from the timing of t3 has elapsed, and as shown in FIG. 151(b), the notification of the base value stored in the first history area 312 is terminated, and as shown in FIG. 151(e), interval non-display is initiated by the first to fourth notification display devices 201 to 204. This interval non-display is terminated at the timing of t5, which is the timing when the interval period has elapsed from the timing of t4, as shown in FIG. 151(e).

At timing t5, as shown in FIG. 151(c), notification of the base value stored in the second history area 313 is started on the first to fourth notification display devices 201 to 204. At the time of this notification, as shown in FIG. 127(c), the first notification display device 201 displays a display indicating that the base value is the notification target, and the second notification display device 202 displays a message in the second history area 313. A display indicating that the stored base value is the target of notification is performed, and a display corresponding to the base value stored in the second history area 313 is displayed on the third notification display device 203 and the fourth notification display device 204. be exposed.

Thereafter, when the display duration period elapses from the timing t5 at the timing t6, the notification of the base value stored in the second history area 313 is ended as shown in FIG. 151(c), and as shown in FIG. 151(e) As shown in FIG. 3, interval non-display is started on the first to fourth notification display devices 201 to 204. This interval non-display is ended at timing t7, which is the timing at which the interval period has elapsed from timing t6, as shown in FIG. 151(e).

At timing t7, as shown in FIG. 151(d), notification of the base value stored in the third history area 314 is started on the first to fourth notification display devices 201 to 204. During this notification, as shown in FIG. 127(d), the first notification display device 201 displays a display indicating that the base value is the subject of notification, the second notification display device 202 displays a display indicating that the base value stored in the third history area 314 is the subject of notification, and the third notification display device 203 and the fourth notification display device 204 display a display corresponding to the base value stored in the third history area 314.

Thereafter, when the display duration period elapses from the timing t7 at the timing t8, the notification of the base value stored in the third history area 314 is ended as shown in FIG. 151(d), and as shown in FIG. 151(e) As shown in FIG. 3, interval non-display is started on the first to fourth notification display devices 201 to 204. This interval non-display ends at timing t9, which is the timing at which the interval period has elapsed from timing t8, as shown in FIG. 151(e).

After that, from the timing t9 to the timing t10, similarly to the timing t1 to t2, the display corresponding to the base value stored in the current area 311 changes from the first to the 4 notification display devices 201 to 204, and as shown in FIG. 151(e), as shown in FIG. This is performed on the first to fourth notification display devices 201 to 204. Then, at the timing t11, similarly to the timing t3, the display corresponding to the base value stored in the first history area 312 is displayed on the first to fourth notification display devices 201 to 204, as shown in FIG. It will be started at

After that, at the timing of t12, which is a timing during which the display corresponding to the base value stored in the first history area 312 is being performed, as shown in FIG. 151(g), the total number of game balls discharged from the game area PA since the base value calculation period started in a situation that is neither the open/close execution mode due to a jackpot result nor the high frequency support mode (i.e., the total number of game balls supplied to the game area PA) reaches the shift reference number (specifically, 60,000). However, at the timing of t12, since the display duration period has not elapsed since the display corresponding to the base value in the first history area 312 started at the timing of t11, the display corresponding to the base value in the first history area 312 continues as shown in FIG. 151(b). This makes it possible to start displaying the pre-shift display on the first to fourth notification display devices 201-204 after displaying the current notification target on the first to fourth notification display devices 201-204 for the scheduled period, even if the timing at which the total number of game balls reaches the shift reference number is arbitrary.

After that, at the timing of t13, the display duration period from the timing of t11 has elapsed, and as shown in FIG. 151(b), the notification of the base value stored in the first history area 312 is terminated, and as shown in FIG. 151(f), the pre-shift display is started on the first to fourth notification display devices 201 to 204. Even if the total number of game balls reaches the shift reference number while another base value is being notified, the pre-shift display is started on the first to fourth notification display devices 201 to 204 when the display duration for the notification of that base value has elapsed. Even if the total number of game balls reaches the shift reference number while an interval non-display is being performed, the pre-shift display is started on the first to fourth notification display devices 201 to 204 when the interval period for the interval non-display has elapsed.

Thereafter, at the timing t14, the execution period of the pre-shift display has elapsed from the timing t13, so the pre-shift display is finished as shown in FIG. 151(f), and the current area 311 is Notification of the base value stored in is started on the first to fourth notification display devices 201 to 204. In other words, even if the notification target when the pre-shift display starts is the base value of the first history area 312, when the pre-shift display ends, it corresponds to the first notification order in the base value notification order. Notification starts from the base value of the current area 311.

After that, at the timing of t15, when the display duration period from the timing of t14 has elapsed, the notification of the base value stored in the current state area 311 is terminated as shown in FIG. 151(a), and interval non-display is started on the first to fourth notification display devices 201 to 204 as shown in FIG. 151(e). This interval non-display is terminated at the timing of t16, which is the timing when the interval period has elapsed from the timing of t15, as shown in FIG. 151(e), and display corresponding to the base value in the first history area 312 is started on the first to fourth notification display devices 201 to 204 as shown in FIG. 151(b).

According to this embodiment described in detail above, the following excellent effects are achieved.

The base values stored in the current status area 311, the first history area 312, the second history area 313, and the third history area 314 of the calculation result storage area 234 are displayed in sequence on the first to fourth notification display devices 201 to 204. This makes it possible to individually notify each base value corresponding to a different period while keeping the number of first to fourth notification display devices 201 to 204 to a minimum. In addition, because each base value is displayed in a predetermined order, it becomes easier for the amusement hall manager to understand the type of base value being displayed.

The display order of base values is determined in association with each of the current area 311, first history area 312, second history area 313, and third history area 314 in the calculation result storage area 234. This makes it possible to simplify the processing configuration for specifying the type of base value to be displayed when starting a new display of the base value.

Before the situation where one base value is displayed changes to the situation where the next base value is displayed, the first to fourth notification display devices 201 to 204 change to the interval non-display state. This allows the game hall manager to clearly understand that the type of base value being displayed has been switched.

In a configuration in which the base values are displayed sequentially on the first to fourth notification display devices 201 to 204, if the total number of game balls discharged from the game area PA (i.e. the total number of game balls supplied to the game area PA) reaches the shift reference number (specifically, 60,000 balls) after a new calculation period for the base value is started and the game is not in either the open/close execution mode based on a jackpot result or the high frequency support mode, a pre-shift display is performed on the first to fourth notification display devices 201 to 204. This makes it possible to use the first to fourth notification display devices 201 to 204 to notify that the total number of game balls has reached the shift reference number.

When the total number of game balls reaches the shift reference number, the base value stored in the current area 311, first history area 312, second history area 313, and third history area 314 in the calculation result storage area 234 is determined. is shifted to the later storage area in the storage order, and the various counters 231a to 231e in the normal counter area 231 are cleared to "0" and calculation of the base value for a new calculation period is started. Therefore, when the total number of game balls reaches the shift reference number, the notification content of the base value on the first to fourth notification display devices 201 to 204 is changed. In this case, if the total number of game balls reaches the shift reference number, the base value notification will be restarted after the pre-shift display is performed, so the total number of game balls will reach the shift reference number. It becomes possible to make the manager of the game hall aware that the notification contents of the base value will be changed in response to the change.

If the total number of game balls reaches the shift reference number while the base value is being displayed, the pre-shift display will begin after the display duration of the base value has elapsed. This makes it possible to start the pre-shift display without interfering with the display of the base value that is already being displayed.

In a configuration in which multiple base values stored in the calculation result storage area 234 are displayed in sequence according to a predetermined display order, after the pre-shift display is performed, the base value is displayed starting from the first base value in the predetermined display order. This makes it possible to check again starting from the first base value in the predetermined display order when the total number of game balls reaches the shift reference number.

In a configuration in which a base value is calculated using the result calculation process (FIG. 149), the result calculation process is executed multiple times from the start of calculation of one base value until the calculation of that base value is completed. This makes it possible to reduce the processing load for executing the result calculation process compared to a configuration in which the calculation of the base value is completed in a single result calculation process.

When the total number of game balls reaches the shift reference number, the base value is newly derived at the timing when the shift reference number is reached, and then the base value data shift process (step SA216) is executed. When the total number of game balls reaches the shift reference number, a pre-shift display is performed on the first to fourth notification display devices 201 to 204. As a result, in a situation where a base value is newly derived and data shift processing of the base value is being performed, it becomes possible to perform a pre-shift display on the first to fourth notification display devices 201 to 204, and It is possible to prevent the display of the previous base value from continuing as it is even though the reference number has been reached.

In addition, the total number of game balls ejected from the gaming area PA since the base value calculation period started (i.e., the number of game balls supplied to the gaming area PA Until the total number of game balls (total number of game balls) reaches the initial reference number (specifically 6000 balls), as in the thirty-fifth embodiment above, when the base value of the current area 311 is displayed, the first to fourth A configuration may be adopted in which the initial calculation display is performed on the notification display devices 201 to 204.

Also, when the first to fourth notification display devices 201 to 204 are in the interval non-display state and the total number of game balls reaches the shift reference number (specifically, 60,000), the pre-shift display may be immediately started, and when the first to fourth notification display devices 201 to 204 are displaying the base value and the total number of game balls reaches the shift reference number (specifically, 60,000), the pre-shift display may be started when the display duration period for the base value has elapsed. This makes it possible to start the pre-shift display early while preventing the display of the base value that is already being displayed from being terminated midway.

The display contents of the pre-shift display are not limited to those described above, and although the display contents of at least a part of the first to fourth notification display devices 201 to 204 may be displayed in other situations, the display contents of the entire first to fourth notification display devices 201 to 204 may be displayed in other situations. When the pre-shift display is performed, at least one display segment 321 to 324 is turned on in each of the first to fourth notification display devices 201 to 204, but for some of the first to fourth notification display devices 201 to 204, all display segments 321 to 324 may be turned off. When the pre-shift display is performed, the display contents of the pre-shift display are not limited to those that are maintained throughout the execution period of the pre-shift display, and the display contents of the pre-shift display may be blinking throughout the execution period of the pre-shift display.

Furthermore, the execution period of the pre-shift display is not limited to a fixed configuration; for example, the new base value is calculated after the total number of game balls reaches the shift reference number (specifically, 60,000 balls). The execution period of the pre-shift display may be configured to vary depending on the period required for the base value data shift process to be completed.

In addition, when the total number of game balls reaches the shift reference number, the last of the display cycles of each base value being performed on the first to fourth notification display devices 201 to 204 at that time. The pre-shift display may be started after the display of the base value of the order (that is, the base value stored in the third history area 314) is completed. Thereby, after the display cycle of each base value is completed, it becomes possible to start a new display cycle of each base value via the pre-shift display.

Furthermore, when the total number of game balls reaches the shift reference number, calculation of the base value is started using the various counters 231a to 231e in the normal counter area 231 at that time, and the calculation of the base value is started. The configuration may be such that the data shift process (step SA216) is performed when the process is completed. In this case, it becomes possible to accurately calculate the base value at the timing when the total number of game balls reaches the shift reference number.

In addition, instead of performing interval non-display during the interval period, a predetermined display may be performed on at least a portion of the first to fourth alarm display devices 201 to 204, and an interval display may be performed in which the entire display of the first to fourth alarm display devices 201 to 204 has a different display content than the display content that may occur in a situation where the base value is notified. For example, the first to fourth alarm display devices 201 to 204 may each have only the central display segments 321 to 324 turned on to display "-", or some of the first to fourth alarm display devices 201 to 204 may display "-" while the remaining display devices are in a non-display state.

Also, a configuration may be adopted in which no interval period is set. In this case, when the display duration period for one base value has elapsed, the display of the next base value to be displayed in turn will begin on the first to fourth notification display devices 201 to 204.

<Forty-fourth embodiment>
In this embodiment, the start timing of the pre-shift display is different from that of the 43rd embodiment. The following describes the configuration that is different from the 43rd embodiment. Note that the description of the same configuration as the 43rd embodiment is basically omitted.

The start timing of the pre-shift display in this embodiment will be explained with reference to the time chart of FIG. 152. 152(a) shows the period during which the base value stored in the current area 311 is notified on the first to fourth notification display devices 201 to 204, and FIG. 152(b) shows the period in which the base value stored in the current area 311 is 152(c) shows the period in which the base value stored in the second history area 313 is notified on the first to fourth notification display devices 201 to 204. FIG. FIG. 152(d) shows the period during which the base value stored in the third history area 314 is notified on the first to fourth display devices 201 to 204. 152(e) shows a period in which interval non-display is performed on the first to fourth notification display devices 201 to 204, and FIG. 152(f) shows a period in which interval non-display is performed on the first to fourth notification display devices 201 to 204. 201 to 204 show the period in which the pre-shift display is performed, and FIG. 152 (g) shows a situation in which the base value calculation period starts anew and is neither the opening/closing execution mode due to the jackpot result nor the high-frequency support mode. It shows the timing when the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) reaches the shift reference number (specifically, 60,000 balls).

At the timing of t1 to t11, the display duration period is set on the first to fourth notification display devices 201 to 204, similarly to the time charts of FIGS. 151(a) to 151(g) in the forty-third embodiment. The display corresponding to the base value over the interval period and the execution of interval non-display during the interval period are repeated, and the display corresponding to the base value is changed from the current area 311 of the calculation result storage area 234 to the first history area 312 to the second history area 312. It is repeated in the order of history area 313 → third history area 314. Then, at timing t11, as shown in FIG. 152(b), display corresponding to the base value stored in the first history area 312 is started on the first to fourth notification display devices 201 to 204.

After that, at the timing of t12 during which the display corresponding to the base value stored in the first history area 312 is being performed, as shown in FIG. 152(g), the total number of game balls discharged from the play area PA since the base value calculation period started in a situation that is neither the open/close execution mode due to the jackpot result nor the high frequency support mode (i.e., the total number of game balls supplied to the play area PA) reaches the shift reference number (specifically, 60,000). In this case, at the timing of t12, although the display duration period has not elapsed since the display corresponding to the base value in the first history area 312 started at the timing of t11, the notification of the base value stored in the first history area 312 is terminated as shown in FIG. 152(b), and the pre-shift display is started on the first to fourth notification display devices 201 to 204 as shown in FIG. 152(f).

Note that even if the total number of game balls reaches the shift reference number while other base values are being notified, the pre-shift display will be displayed on the first to fourth notification display devices 201 at that timing. ~204. In addition, even if the total number of game balls reaches the shift reference number while the interval non-display is being performed, the pre-shift display will be changed to the first to fourth notification display devices 201 to 204 at that timing. It will be started at

Thereafter, at the timing t13, the execution period of the pre-shift display has elapsed from the timing t12, so the pre-shift display is finished as shown in FIG. 152(f), and the current area 311 is Notification of the base value stored in is started on the first to fourth notification display devices 201 to 204. In other words, even if the notification target when the pre-shift display starts is the base value of the first history area 312, when the pre-shift display ends, it corresponds to the first notification order in the base value notification order. Notification starts from the base value of the current area 311.

Thereafter, when the display duration period elapses from the timing t13 at the timing t14, the notification of the base value stored in the current area 311 is ended as shown in FIG. 152(a), and as shown in FIG. 152(e). In this way, interval non-display is started on the first to fourth notification display devices 201 to 204. This interval non-display is ended as shown in FIG. 152(e) at timing t15, which is the timing when the interval period has elapsed from timing t14, and as shown in FIG. 152(b), the base of the first history area 312 is Display corresponding to the value is started on the first to fourth notification display devices 201 to 204.

According to the above configuration, when the total number of game balls discharged from the game area PA (i.e. the total number of game balls supplied to the game area PA) reaches the shift reference number (specifically, 60,000 balls) after the base value calculation period has started and when the mode is neither the open/close execution mode based on the jackpot result nor the high frequency support mode, the first to fourth notification display devices 201 to 204 start displaying the pre-shift at that timing. This makes it possible to start the pre-shift display early and to notify early that the total number of game balls has reached the shift reference number.

<45th embodiment>
This embodiment is different from the thirty-fifth embodiment described above in the processing configuration of the main processing executed by the main CPU 63. Hereinafter, configurations that are different from the thirty-fifth embodiment described above will be explained. Note that the description of the same configuration as the thirty-fifth embodiment is basically omitted.

Figure 153 is a flowchart showing the main processing in this embodiment that is executed by the main CPU 63. Note that the processing of steps SA401 to SA425 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

First, the power-on initial setting process is executed (step SA401). In the power-on initial setting process, for example, the main process is started and then the process waits until a predetermined waiting time (specifically, one second) has elapsed before proceeding to the next process. During this predetermined waiting period, the operation start and initial setting of the pattern display device 41 are completed. In addition, access to the main RAM 65 is permitted.

Then, the internal function register setting process is executed (step SA402). In the internal function register setting process, as in the 35th embodiment, the interrupt period of the first timer interrupt process (FIG. 133), which is a process that periodically interrupts the main process and is started, is set to the first interrupt period (specifically, 4 milliseconds), and the interrupt period of the second timer interrupt process (FIG. 134), which is a process that periodically interrupts the main process and is started, is set to the second interrupt period (specifically, 2 milliseconds), which is shorter than the first interrupt period.

In other words, in this embodiment, as in the thirty-fifth embodiment, the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134) are performed so that the interrupt period is relatively long and short. exists. Both the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) are started by interrupting the main process. Further, the second timer interrupt process (FIG. 134) is started by interrupting the first timer interrupt process (FIG. 133). On the other hand, the first timer interrupt process (FIG. 133) interrupts the second timer interrupt process (FIG. 134) and is not activated. In addition, if both the first interrupt cycle and the second interrupt cycle have elapsed in a situation where both the first timer interrupt process (Figure 133) and the second timer interrupt process (Figure 134) are not being executed, those cycles The second timer interrupt process (FIG. 134) is started first regardless of the order of progress. In this respect, it can be said that the second timer interrupt process (FIG. 134) is started with priority over the first timer interrupt process (FIG. 133). However, the present invention is not limited to this, and the first timer interrupt process (FIG. 133) may be started with priority over the second timer interrupt process (FIG. 134).

In the internal function register setting process, the first interrupt period of the first timer interrupt process (Fig. 133) is set in a specified register of the main CPU 63, and the second interrupt period of the second timer interrupt process (Fig. 134) is set in a specific register of the main CPU 63. In addition to setting the first and second interrupt periods, the internal function register setting process also executes processing for setting the numerical ranges of various counters, such as the numerical range of the winning random number counter C1.

Then, the start-up processing flag provided in the work area 221 for specific control is set to "1" (step SA403). As in the 35th embodiment, the start-up processing flag is a flag for the main CPU 63 to identify that even if the first timer interrupt process (FIG. 133) is started, the first timer interrupt process (FIG. 133) should end without executing any process for progressing the game, while the various processes set in the first timer interrupt process (FIG. 133) for power outage monitoring, updating of various counters, and fraud monitoring are executed.

The start-up processing flag indicates that the processing at the time of starting the supply of operating power (step SA401 to step SA418) is started in the main processing (FIG. 153) and interrupt permission (step SA404) is set, as in the thirty-fifth embodiment. It is set to "1" before the operation, and cleared to "0" before the processing at the start of supply of operating power is completed and the remaining processing (steps SA422 to SA425) is started. In this case, similarly to the thirty-fifth embodiment, in the first timer interrupt process (FIG. 133), if the start-up processing flag is set to "1", the processes from step S8907 to step S8920 are not executed. By doing so, it is possible to prevent the processing for advancing the game from being executed in a situation where the processing at the start of supply of operating power (steps SA401 to SA418) is being executed. On the other hand, as described above, in the first timer interrupt processing (FIG. 133), even if the startup processing flag is set to "1", the operating power is reduced by executing the processing from step S8901 to step S8905. Power outage monitoring is executed even when the supply start processing (steps SA401 to SA418) is being executed, and the winning random number counter C1, jackpot type counter C2, reach random number counter C3, and random number initial value counter CINI update is performed and further fraud detection is performed.

In particular, even if the start-up processing flag is set to "1", the power outage information storage process (step S8901) is executed, so that even if a power outage occurs when the processing at the start of the supply of operating power (steps SA401 to SA418) is being executed, the power outage processing can be executed. In the power outage processing, as in the 35th embodiment, the power outage flag provided in the work area 221 for specific control is set to "1", a checksum is calculated, and the calculated checksum is stored in the work area 221 for specific control, so that when the supply of operating power is restarted, it is possible to prevent the occurrence of an abnormality in the main RAM 65 from being identified. As a result, if a power outage occurs during the setting confirmation process (step SA415) or the setting value update process (step SA418), it is possible to identify that a power outage occurred during these setting-related processes at the start of the next supply of operating power.

Incidentally, in a situation where the setting confirmation process (step SA415) or the setting value update process (step SA418) is being executed, neither the first timer interrupt process (Figure 133) nor the second timer interrupt process (Figure 134) Interrupts are not prohibited and can be interrupted at any time. In this case, the first timer interrupt process (Figure 133) or the second timer interrupt process (Figure 134) is performed in the main process (Figure 153), including the setting confirmation process (step SA415) and setting value update process (step SA418). When activated by an interrupt, information on the return address of the main process (FIG. 153) for returning after the timer interrupt process that was the target of activation is completed is saved in the stack area 222 for specific control. , information of various registers of the main CPU 63 immediately before the timer interrupt processing is started is saved in the stack area 222 for specific control. Then, when the timer interrupt processing that was the target of activation ends, the process returns to the main processing (FIG. 153) corresponding to the return address information saved in the stack area 222 for specific control, and The information saved in the stack area 222 for specific control is returned to various registers of the main CPU 63.

After setting the start-up processing flag to "1" in step SA403, interrupt permission is set (step SA404). As a result, the first timer interrupt process (FIG. 133) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 134) is interrupted and activated in the second interrupt cycle. However, since the startup processing flag is set to "1" in step SA403, even if the first timer interrupt processing (FIG. 133) is started, various processing of the first timer interrupt processing (FIG. 133) will not be executed. Of these, the processes for monitoring power outages, updating various counters, and monitoring fraud are executed, while the first timer interrupt process (FIG. 133) ends without executing processes for advancing the game. .

Then, it is determined whether the reset button 68c has been pressed (step SA405). In other words, it is determined whether the power to the pachinko machine 10 has been turned on while the reset button 68c has been pressed, and whether the supply of operating power to the main CPU 63 has begun. Here, in this embodiment, as in the 35th embodiment, the main control device 60 is provided with a setting key insertion section 68a and a reset button 68c, but is not provided with an update button 68b. Also, as in the 11th embodiment, the main control device 60 is provided with first to fourth notification display devices 201 to 204, rather than first to third notification display devices 69a to 69c.

If the reset button 68c is not pressed (step SA405: NO), it is determined whether the power outage flag provided in the work area 221 for specific control is set to "1" (step SA406). When the power outage process is executed in the power outage information storage process (step S8901) of the first timer interrupt process (FIG. 133), the power outage flag is set to "1". The power outage flag is a flag used by the main CPU 63 to determine whether or not the power outage process was appropriately performed during the previous power shutoff.

If the power outage flag is set to "1" (step SA406: YES), a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step SA407). The method of calculating the checksum is the same as that of the 33rd embodiment. Then, the checksums for the specific control work area 221 and the specific control stack area 222 that were calculated and stored in the specific control work area 221 during the power outage processing executed immediately before the supply of operating power to the main CPU 63 was stopped are read, and the read checksum is compared with the checksum calculated in step SA407 (step SA408). Then, it is determined whether the checksums match (step SA409).

If a negative determination is made in step SA406 or step SA409, that is, if the power outage flag is not set to "1" or if the checksums do not match, the game stop flag provided in the work area 221 for specific control is set to "1" (step SA410). When the game stop flag is set to "1", steps S8901 to S8905 are executed in the first timer interrupt process (FIG. 133), and when an affirmative determination is made in step S8906, steps S8907 to S8905 are executed. Do not execute the process in S8920. As a result, if the power outage flag is not set to "1" because the power outage processing was not performed properly at the time of the previous power shutdown, or if the work area 221 for specific control and the stack area 222 for specific control If the checksums do not match due to a change in the storage state of information for at least one of the following items since the last time the power was shut off, processing for power outage monitoring, updating of various counters, and fraud monitoring will be executed. However, the process for advancing the game will not be executed.

Then, an abnormality command indicating that an abnormality occurred in the power failure flag or checksum at the start of the supply of operating power is sent to the sound and light emission control device 81 (step SA411). By receiving the abnormality command, the sound and light emission control device 81 causes the display light-emitting unit 53 to emit light in a manner corresponding to the information abnormality at the start of the supply of operating power, and causes the speaker unit 54 to output a voice saying "Please change the settings." In addition, a text image saying "Please change the settings" is displayed on the pattern display device 41. These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, even if the supply of operating power to the pachinko machine 10 is temporarily stopped, the above notification may be configured to continue when the supply of operating power to the pachinko machine 10 is resumed until the setting value update process (step SA418) is executed.

If the power outage flag is set to "1" and the checksum is normal (step SA406 and step SA409: YES), "1" is set to the setting update display flag provided in the work area 221 for specific control. It is determined whether or not (step SA412). The setting update display flag is a flag for the main CPU 63 to specify that the setting value update process (step SA418) is being executed, as in the thirty-fifth embodiment, and the setting update display flag is set to "1". is set, the first to fourth notification display devices 201 to 204 display a display indicating that the setting value is being updated and a display indicating the setting value that is being updated. The setting update display flag is a flag that is set to "1" when the setting value update process (step SA418) is started and is cleared to "0" when the setting value update process (step SA418) is finished. , in a situation where the setting value update process (step SA418) is not executed, the setting update display flag is basically not set to "1". However, if the supply of operating power to the main CPU 63 is stopped while the setting value update process (step SA418) is being executed, if the supply of operating power to the main CPU 63 is subsequently started; In this state, the setting update display flag is set to "1". When this setting update display flag is set to "1", the RAM clearing process (step SA416) is executed, or the setting update display flag is cleared to "0" in the setting value update process (step SA418). It will remain until it is executed.

If the setting update display flag is not set to "1" and a negative determination is made in step SA412, it is determined whether the setting key insertion section 68a is turned on using a setting key (step SA413). ). If the setting key insertion section 68a is turned on using a setting key (step SA413: YES), a setting confirmation process is executed (step SA415). Furthermore, even if the setting key insertion section 68a is not turned on using a setting key (step SA413: NO), the setting confirmation display flag provided in the work area 221 for specific control is set to "1". is set (step SA414: YES), a setting confirmation process is executed (step SA415). The setting confirmation process will be explained later.

The setting confirmation display flag is a flag for the main CPU 63 to specify that the setting confirmation process (step SA415) is being executed, as in the thirty-fifth embodiment, and the setting confirmation display flag is set to "1". is set, the first to fourth notification display devices 201 to 204 display a display indicating that the setting value is being checked and a display indicating the currently set setting value. be exposed. The setting confirmation display flag is a flag that is set to "1" when the setting confirmation process (step SA415) is started and is cleared to "0" when the setting confirmation process (step SA415) is ended. , in a situation where the setting confirmation process (step SA415) is not executed, the setting confirmation display flag is basically not set to "1". However, if the supply of operating power to the main CPU 63 is stopped while the setting confirmation process (step SA415) is being executed, if the supply of operating power to the main CPU 63 is subsequently started; In this state, the setting confirmation display flag is set to "1". When this setting confirmation display flag is set to "1", the RAM clearing process (step SA416) is executed, or the setting confirmation display flag is cleared to "0" in the setting confirmation process (step SA415). It will remain until it is executed.

If the reset button 68c is pressed (step SA405: YES), RAM clear processing is executed (step SA416). In the RAM clearing process, in the work area 221 for specific control, excluding the area in which setting value information indicating the setting state of the pachinko machine 10 is set (specifically, the setting reference area 341 described later), the specific control work area 221 is cleared. Clears the work area 221 to "0" and executes initial settings. As a result, the area indicating whether the win/fail lottery mode is the high probability mode is cleared to "0", so the win/fail lottery is performed regardless of the win/fail lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in a closed state. situation. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted. Further, the setting update display flag and the setting confirmation display flag provided in the work area 221 for specific control are cleared to "0". Further, a setting update area 342, which will be described later, provided in the work area 221 for specific control is cleared to "0". Further, in the RAM clearing process, the stack area 222 for specific control is cleared to "0" and initial settings are executed. Furthermore, in the RAM clearing process, initial settings are executed after various registers of the main CPU 63 are also cleared to "0". In this initial setting, processing similar to the internal function register setting processing in step SA402 is executed. Note that for the work area 223 for non-specific control and the stack area 224 for non-specific control, processing for clearing to "0" and processing for initializing are not executed.

Then, it is determined whether the setting key insertion unit 68a has been turned on using the setting key (step SA417). If it has been turned on (step SA417: YES), a setting value update process is executed (step SA418). The setting value update process will be described later.

If the process of step SA411 is executed, if a negative determination is made in step SA414, if the process of step SA415 is executed, if a negative determination is made in step SA417, or if the process of step SA418 is executed, the specific control Information corresponding to the initial check period (specifically, 5 seconds) is set in the checking counter provided in the work area 221 (step SA419). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is activated, as in the thirty-fifth embodiment. If the checking counter is set to a value of 1 or more, the checking display continues on the first to fourth notification display devices 201 to 204, as in the thirty-fifth embodiment.

According to the above configuration, when the supply of operating power to the main CPU 63 is started, the remaining processing is performed after the processing at the time of starting the supply of operating power (step SA401 to step SA418) is completed in the main CPU 63. Before (steps SA422 to SA425) are started, an initial check period is started. As a result, there is no need to control the initial check period in a situation where processing at the start of supply of operating power is being executed, reducing the processing load in a situation where processing at the start of supply of operating power is being executed. becomes possible.

Furthermore, the settings confirmation process (step SA415) and the setting value update process (step SA418) are executed as the process at the start of the supply of operating power, whereas the process at the start of the supply of operating power is performed during the initial check period. Starts after it finishes. As a result, even if the check display is performed on the first to fourth notification display devices 201 to 204 during the initial check period, the setting values are not displayed using the first to fourth notification display devices 201 to 204. It is possible to avoid any influence.

Then, the start-up processing in progress flag in the work area 221 for specific control is cleared to "0" (step SA420). By clearing the start-up processing in progress flag to "0", if the first timer interrupt process (FIG. 133) is started, a negative judgment is made in step S8906, which causes not only the processes of steps S8901 to S8905 but also the processes of steps S8907 to S8920 to be executed, and the state in which processes for progressing the game are not executed is released. Note that in step SA420, the power outage flag in the work area 221 for specific control is also cleared to "0".

Then, a return command is sent to the audio and light emission control device 81 (step SA421). The information contained in the return command and the processing performed by the audio and light emission control device 81 when the return command is received are the same as those in step S7920 of the main processing (Figure 114) in the 33rd embodiment described above.

Then, the process proceeds to the remaining process of steps SA422 to SA425. In other words, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134), but there is a remaining time between one timer interrupt process and the next timer interrupt process. This remaining time varies depending on the completion time of each timer interrupt process, but this irregular time is used to repeatedly execute the remaining process of steps SA422 to SA425. In this respect, the remaining process of steps SA422 to SA425 can be said to be non-periodic process that is executed non-periodically. In steps SA422 to SA425, the same process is executed as steps S113 to S116 of the main process (FIG. 9) in the first embodiment.

Next, the configuration related to the setting values in this embodiment will be described. Figure 154 is an explanatory diagram for explaining the contents of the memory area related to the setting values provided in the work area 221 for specific control.

As shown in FIG. 154, the work area 221 for specific control has a setting reference area 341 and a setting update area 342. The setting reference area 341 is a memory area in which information for the main CPU 63 to identify the current setting value of the pachinko machine 10 is stored. In step S503 of the special chart change start process (FIG. 13), the current setting value of the pachinko machine 10 is identified using the information stored in the setting reference area 341, and a win/lose table corresponding to the identified setting value is read. Then, in step S504, the win/lose judgment process is executed using the read win/lose table. Also, when the setting confirmation display flag in the work area 221 for specific control is set to "1", the setting value corresponding to the information stored in the setting reference area 341 is displayed on the fourth notification display device 204.

The setting reference area 341 stores numerical information as setting value information. Specifically, when numerical information of "1" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 1". When numerical information of "2" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 2". When numerical information of "3" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 3". When numerical information of "4" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 4". When numerical information of "5" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 5". When numerical information of "6" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 6".

The setting update area 342 stores information on the setting values being updated during the setting value update process (step SA418). In other words, in the setting value update process (step SA418), the setting value information of the selection target is updated each time the reset button 68c is pressed, but during this update, the setting value information stored in the setting reference area 341 is not changed, and the setting value information stored in the setting update area 342 is changed. This makes it possible to update the setting value while storing and retaining the setting value information that was set before the setting value update process (step SA418) was started. When the setting value update process (step SA418) is terminated, the setting value information stored in the setting update area 342 at that time is overwritten in the setting reference area 341. As a result, the setting value updated in the setting value update process (step SA418) is set as the current setting value of the pachinko machine 10. In addition, when the setting update display flag in the specific control work area 221 is set to "1", the setting value corresponding to the information stored in the setting update area 342 is displayed on the fourth notification display device 204.

Numerical information is stored in the setting update area 342 as setting value information. Specifically, when numerical information of "1" is stored in the setting update area 342, the setting value of the update target (selection target or change target) becomes "setting 1". If numerical information of "2" is stored in the setting update area 342, the setting value to be updated becomes "setting 2". If numerical information of "3" is stored in the setting update area 342, the setting value to be updated becomes "setting 3". When numerical information of "4" is stored in the setting update area 342, the setting value to be updated becomes "setting 4". If numerical information of "5" is stored in the setting update area 342, the setting value to be updated is "setting 5". If numerical information of "6" is stored in the setting update area 342, the setting value to be updated is "setting 6".

Figure 155 is a flowchart showing the setting confirmation process executed in step SA415 of the main process (Figure 153). Note that the processing of steps SA501 to SA504 in the setting confirmation process is executed using a program for specific control and data for specific control in the main CPU 63.

On the condition that the setting confirmation display flag provided in the work area 221 for specific control is not set to "1" (step SA501: NO), the setting confirmation display flag is set to "1" (step SA502). . By setting the setting confirmation display flag to "1" and making an affirmative determination in step S9005 of the second timer interrupt process (FIG. 134), the setting process for the fifth display data buffer 275 during setting confirmation is performed. (Step S9006) is executed.

FIG. 156 is a flowchart showing the setting process for the fifth display data buffer 275 during setting confirmation. Note that the processing from step SA601 to step SA603 in the setting process is executed using a specific control program and specific control data in the main CPU 63.

First, the display data of the setting value corresponding to the setting value information stored in the setting reference area 341 of the work area 221 for specific control is read (step SA601). Then, the display data of the setting value that has been read is set in the fifth display data buffer 275 in the work area 221 for specific control as display data to be applied to the fourth notification display device 204 (step SA602). Also, display data for causing the first to third notification display devices 201 to 203 to display an indication that the setting value of the pachinko machine 10 is being checked is set in the fifth display data buffer 275 (step SA603).

As described above, by executing the setting process for the fifth display data buffer 275 during the setting confirmation, a display corresponding to the display data set in the fifth display data buffer 275 in step SA603 is performed on the first to third alert display devices 201 to 203, and a display corresponding to the display data set in the fifth display data buffer 275 in step SA602 is performed on the fourth alert display device 204. As a result, as shown in the explanatory diagram of FIG. 124(b), for example, a display indicating that the setting values of the pachinko machine 10 are being confirmed and a display showing the current setting values of the pachinko machine 10 are performed on the first to fourth alert display devices 201 to 204.

Returning to the explanation of the setting confirmation process (FIG. 155), if a positive determination is made in step SA501 or if the process of step SA502 is executed, it is determined whether or not the setting key insertion unit 68a has switched from the ON state to the OFF state using the setting key (step SA503). Specifically, it is determined whether or not the reception state of the signal received from the detection sensor that detects the state of the setting key insertion unit 68a has changed from a reception state corresponding to the ON state to a reception state corresponding to the OFF state. Therefore, a negative determination is made in step SA503 not only when the setting key insertion unit 68a is maintained in the ON state, but also when the setting confirmation process is started in a situation where the setting key insertion unit 68a is in the OFF state and the OFF state is maintained. If it is not determined that the setting key insertion unit 68a has switched from the ON state to the OFF state (step SA503: NO), the process of step SA503 is repeated.

When it is determined that the setting key insertion section 68a has switched from the ON state to the OFF state (step SA503: YES), the setting confirmation display flag in the specific control work area 221 is cleared to "0" (step SA504). As a result, a negative determination is made in step S9005 of the second timer interrupt process (FIG. 134), resulting in a situation in which the setting process (step S9006) for the fifth display data buffer 275 during the setting confirmation is not executed. Therefore, the state in which the first to fourth notification display devices 201 to 204 display the indication that the current setting value of the pachinko machine 10 is being confirmed and the indication of the current setting value of the pachinko machine 10 are displayed is canceled.

As described above, by turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key without pressing the reset button 68c, the supply of operating power to the main CPU 63 starts. In the situation where the reset button 68c is not pressed and the setting key insertion section 68a is turned on in the situation where the main processing (FIG. 153) is started, the game can proceed in the main processing (FIG. 153). The setting confirmation process (FIG. 155) is executed in a situation where the process at the start of supply of operating power is being executed, which is the situation before the process described above is executed. This makes it possible to check the set values even when no games are being played.

Figure 157 is a flowchart showing the setting value update process executed in step SA418 of the main process (Figure 153). Note that the processing of steps SA701 to SA710 in the setting value update process is executed using a program for specific control and data for specific control in the main CPU 63.

First, it is determined whether the setting update display flag provided in the work area 221 for specific control is set to "1" (step SA701). If the setting update display flag is not set to "1" (step SA701: NO), the setting update display flag is set to "1" (step SA702). Thereafter, the setting value information stored in the setting reference area 341 in the specific control work area 221 is overwritten in the setting update area 342 in the specific control work area 221 (step SA703). As a result, information about the setting value that was set when the supply of operating power was stopped last time is set in the setting update area 342.

On the other hand, if the supply of operating power is stopped while the setting value update process is being executed, and then the supply of operating power is resumed, and the setting value update process is started without executing the RAM clear process (step SA416) of the main process (FIG. 153), so that the setting update display flag is already set to "1" (step SA701: YES), the process of step SA703 is not executed. In this case, the process of step SA704 and subsequent steps will be executed with the setting value information that was set in the setting update area 342 during the setting value update process before the supply of operating power was stopped remaining unchanged.

If the setting update display flag is set to "1", a positive determination is made in step S9003 of the second timer interrupt process (Figure 134), and setting processing (step S9004) is executed for the fifth display data buffer 275 during the setting update.

FIG. 158 is a flowchart showing a setting process for the fifth display data buffer 275 during a setting update. Note that the processing from step SA801 to step SA803 in the setting process is executed using a specific control program and specific control data in the main CPU 63.

First, setting value display data corresponding to the setting value information stored in the setting update area 342 of the specific control work area 221 is read out (step SA801). Then, the display data of the read setting value is set in the fifth display data buffer 275 in the specific control work area 221 as display data to be applied to the fourth notification display device 204 (step SA802). Further, display data for causing the first to third notification display devices 201 to 203 to display a display indicating that the setting values of the pachinko machine 10 are being updated is set in the fifth display data buffer 275. (Step SA803).

As described above, by executing the setting process for the fifth display data buffer 275 during the setting update, a display corresponding to the display data set in the fifth display data buffer 275 in step SA803 is performed on the first to third notification display devices 201 to 203, and a display corresponding to the display data set in the fifth display data buffer 275 in step SA802 is performed on the fourth notification display device 204. As a result, as shown in the explanatory diagram of FIG. 124(a), for example, a display indicating that the setting values of the pachinko machine 10 are being updated and a display of the setting values selected to be updated for the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204.

Returning to the explanation of the setting value update process (FIG. 157), if a positive determination is made in step SA701 or if the process of step SA703 is executed, it is determined whether the setting value information stored in the setting update area 342 is any of "1" to "6" (step SA704). If it is not any of "1" to "6" (step SA704: NO), "1" is set in the setting update area 342 (step SA705). As a result, the setting value to be updated becomes "Setting 1".

If an affirmative determination is made in step SA704 or if the process in step SA705 is executed, the setting key insertion unit 68a determines whether the setting key has been switched from the ON state to the OFF state (step SA706). Specifically, it is determined whether the reception state of the signal received from the detection sensor that detects the state of the setting key insertion section 68a has changed from the reception state corresponding to the ON state to the reception state corresponding to the OFF state. do. Therefore, the OFF state is maintained not only when the setting key insertion section 68a is maintained in the ON state, but also when the setting value update process is started in a situation where the setting key insertion section 68a is in the OFF state. In this case, a negative determination is made in step SA706.

If the result of the determination in step SA706 is negative, and the reset button 68c is pressed (step SA707: YES), the value in the setting update area 342 is incremented by 1 (step SA708). As a result, the setting value is updated to the next higher setting value each time the reset button 68c is pressed. If the reset button 68c is not pressed (step SA707: NO) or the value in the setting update area 342 is incremented by 1, the process returns to step SA704. However, if the value in the setting update area 342 is determined to be 7 or greater in step SA704, "1" is set in the setting update area 342 in step SA705. As a result, if the reset button 68c is pressed once in the "setting 6" state, the setting returns to "setting 1."

When it is determined that the setting key insertion section 68a has switched from an ON state to an OFF state (step SA706: YES), the setting value information stored in the setting update area 342 is overwritten in the setting reference area 341 (step SA709). As a result, the setting value information resulting from the update in this setting value update process is set in the setting reference area 341, and the setting value corresponding to this set information becomes the current setting value of the pachinko machine 10.

Thereafter, the setting update display flag in the specific control work area 221 is cleared to "0" (step SA710). As a result, a negative determination is made in step S9003 of the second timer interrupt process (FIG. 134), resulting in a situation in which the setting process for the fifth display data buffer 275 (step S9004) during the setting update is not executed. Therefore, the first to fourth notification display devices 201 to 204 display a display indicating that the current setting values of the pachinko machine 10 are being updated, and the settings selected to be updated for the pachinko machine 10. The state where the value is displayed is canceled.

As described above, not only is the power to the pachinko machine 10 turned on while pressing the reset button 68c, but also the setting value update process (FIG. 157) is executed based on the power to the pachinko machine 10 being turned on while the setting key insertion section 68a is turned on with the setting key. Also, as already explained, the setting confirmation process (FIG. 155) is executed based on the power to the pachinko machine 10 being turned on while the setting key insertion section 68a is turned on with the setting key without pressing the reset button 68c. This makes it possible to make the ON operation of the setting key insertion section 68a a common operation for executing setting-related processes related to setting values. This makes it possible to make the operation content for generating setting-related processes easy to understand for the manager of the game hall.

In addition, when turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key, and when pressing the reset button 68c is not added, a setting confirmation process is executed and the reset is performed. When adding a press operation to the button 68c, a setting value update process is executed. Thereby, it becomes possible to change the process to be executed among the setting confirmation process and the setting value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make it easy for the game hall manager to understand the operation details for executing a desired process among the setting confirmation process and the setting value update process. Furthermore, by increasing the number of operations required to execute the setting value update process than the setting confirmation process, it is possible to make it particularly difficult to perform the setting value update process illegally.

Next, in the case where power failure processing is executed while the setting value update processing (Fig. 157) or the setting confirmation processing (Fig. 155) is being executed, the contents of the processing executed in the main processing (Fig. 153) when the supply of operating power is resumed thereafter will be explained with reference to the explanatory diagram in Fig. 159.

First, we will explain the contents of the processing executed in the main processing (Fig. 153) when the supply of operating power is resumed after a power outage processing is executed in a situation where neither the setting value update processing (Fig. 157) nor the setting confirmation processing (Fig. 155) has been executed.

If the supply of operating power is resumed without the setting key insertion part 68a being turned on and the reset button 68c being pressed (that is, in the case of "no operation"), the RAM is None of the clearing process (step SA416), setting value updating process (step SA418), and setting confirmation process (step SA415) is executed. When the supply of operating power is resumed while the reset button 68c is pressed while the setting key insertion section 68a is not turned on (that is, when the "RAM clear operation" is performed), the main process (FIG. 153) In this step, RAM clear processing (step SA416) is executed, while setting value update processing (step SA418) and setting confirmation processing (step SA415) are not executed. When the supply of operating power is resumed while the setting key insertion part 68a is turned on and the reset button 68c is pressed (that is, when a "setting change operation" is performed), the main processing (FIG. 153) While the clearing process (step SA416) is executed and the setting value updating process (step SA418) is executed, the setting confirmation process (step SA415) is not executed. When the setting key insertion part 68a is turned on but the supply of operating power is resumed without pressing the reset button 68c (that is, when the "setting confirmation operation" is performed), the setting confirmation process (step SA415) is executed, while RAM clear processing (step SA416) and setting value update processing (step SA418) are not executed.

Next, we will explain the contents of the processing that is executed in the main processing (Figure 153) when the supply of operating power is resumed if power outage processing is executed while the setting value update processing (step SA418) is being executed (i.e., the setting update display flag is set to "1").

If the supply of operating power is resumed when a "RAM clear operation" has been performed, the main processing (Figure 153) executes the RAM clear process (step SA416), but the setting value update process (step SA418) and the setting confirmation process (step SA415) are not executed. In other words, even if power outage processing is executed when the setting value update process (step SA418) is being executed, if a "RAM clear operation" is performed when the supply of operating power is subsequently resumed, the RAM clear process (step SA416) is executed without resuming or newly executing the setting value update process (step SA418). This makes it possible to prioritize the execution of only the RAM clear process (step SA416) in response to the "RAM clear operation". In this case, if power failure processing is performed before the processing of step SA709 is performed in the setting value update processing (step SA418), the information on the setting value updated in the setting value update processing (step SA418) (i.e., the changed setting value) is not set in the setting reference area 341, so the setting value that was set before the setting value update processing (step SA418) was started will be used even after the supply of operating power is resumed. Note that the setting update display flag is cleared to "0" by executing the RAM clear processing (step SA416).

If the supply of operating power is resumed when a "setting change operation" has been performed, the main processing (FIG. 153) executes a RAM clear process (step SA416) and a setting value update process (step SA418), but does not execute the setting confirmation process (step SA415). In other words, even if a power outage process is executed when the setting value update process (step SA418) is being executed, if a "setting change operation" is performed when the supply of operating power is subsequently resumed, the RAM clear process (step SA416) is executed and then the setting value update process (step SA418) is started anew.

When the RAM clear process (step SA416) is executed, the setting update display flag in the work area 221 for specific control is cleared to "0" as already explained, so that in the setting value update process (FIG. 157), a negative determination is made in step SA701, and the setting value information stored in the setting reference area 341 is overwritten in the setting update area 342. Therefore, if the power failure process is executed before the process of step SA709 is executed in the setting value update process (step SA418) before the supply of operating power is stopped, the setting value information updated in the setting value update process (step SA418) is invalidated because it is not set in the setting reference area 341. In this case, in the setting value update process (step SA418) after the supply of operating power is resumed, the setting value is updated from the setting value that was set before the setting value update process (step SA418) before the supply of operating power was stopped was started.

If the supply of operating power is resumed in the situation of "no operation" or if the supply of operating power is resumed in the situation of "setting confirmation operation", the main process (Figure 153) will check the power outage flag and By making an affirmative determination in step SA412 on the condition that no abnormality has occurred with respect to the thumb, the setting value updating process (step SA418) is executed without executing the RAM clearing process (step SA416). If the RAM clearing process (step SA416) is not executed, the setting update display flag in the work area 221 for specific control will remain set to "1", so the setting value updating process (FIG. 157) will not be executed in step SA416. By making an affirmative determination in SA701, the setting value information in the setting update area 342 is maintained as is. Therefore, the update of the set value will be restarted from the set value that was being updated in the set value update process (step SA418) before the supply of operating power was stopped. As a result, if the power outage processing is executed during the setting value update process (step SA418) and the "RAM clear operation" is not performed when the supply of operating power is resumed, the "setting Even if the "change operation" is not performed, it is possible to restart the setting value update process (step SA418).

In particular, it is assumed that the power of the pachinko machine 10 will be turned off by mistake while the setting value update process (step SA418) is being performed, and in this case, the power of the pachinko machine 10 will be immediately turned on. In this case, it is assumed that the power of the pachinko machine 10 will be turned on without pressing the reset button 68c while the setting key insertion section 68a is in the ON state, and the supply of operating power will be resumed in a situation where the "setting confirmation operation" has been performed. In such a situation, the setting value update process (step SA418) is executed as described above, and the update of the setting value is resumed from the setting value that was being updated in the setting value update process (step SA418) before the supply of operating power was stopped in the setting value update process (step SA418). This makes it possible to resume the update of the setting value without any problems even if the above-mentioned event occurs.

Next, we will explain the contents of the processing that is executed in the main processing (Figure 153) when the supply of operating power is resumed if power outage processing is executed while the setting confirmation processing (step SA415) is being executed (i.e., the setting confirmation display flag is set to "1").

If the supply of operating power is resumed when a "RAM clear operation" has been performed, the main processing (FIG. 153) executes the RAM clear process (step SA416), but does not execute the setting value update process (step SA418) or the setting confirmation process (step SA415). In other words, even if the power outage process is executed when the setting confirmation process (step SA415) is being executed, if a "RAM clear operation" is performed when the supply of operating power is resumed, the RAM clear process (step SA416) is executed without newly executing the setting confirmation process (step SA415). This makes it possible to prioritize the execution of only the RAM clear process (step SA416) for the "RAM clear operation". Note that the setting confirmation display flag is cleared to "0" when the RAM clear process (step SA416) is executed.

If the supply of operating power is resumed in a situation where a "setting change operation" has been performed, in the main process (Figure 153), RAM clear processing (step SA416) is executed and setting value update processing (step SA418) is executed. However, the setting confirmation process (step SA415) is not executed. In other words, even if the power outage process is executed while the settings confirmation process (step SA415) is being executed, if a "settings change operation" is performed when the supply of operating power is resumed, the settings will be confirmed. The setting value update process (step SA418) is executed after the RAM clear process (step SA416) is executed without newly executing the service process (step SA415). This makes it possible to give priority to the execution of the RAM clearing process (step SA416) and the setting value updating process (step SA418) for the "setting change operation". Further, even if the setting confirmation process (step SA415) is not executed in this way, the setting value to be updated is displayed on the fourth notification display device 204 by executing the setting value update process (step SA418). At the same time, upon completion of the setting value update process (step SA418), information on the setting values that are subject to update at that time is set in the setting reference area 341. You can check 10 setting values. Note that the setting confirmation display flag is cleared to "0" by executing the RAM clearing process (step SA416).

If the supply of operating power is resumed when the "settings check operation" has been performed, the main processing (FIG. 153) executes the settings check process (step SA415) on the condition that no abnormalities have occurred with respect to the power outage flag and checksum. As a result, even if power outage processing is executed during the settings check process (step SA415), it is possible to resume checking the setting values by performing the "settings check operation" when the supply of operating power is resumed.

When the supply of operating power is resumed in the "no operation" situation, the main process (FIG. 153) makes an affirmative determination in step SA414 on the condition that no abnormality has occurred regarding the power outage flag and checksum. , the setting confirmation process (step SA415) is executed even if the setting key insertion section 68a is not turned on. As a result, even if the power outage process is executed during the setting confirmation process (step SA415) and there is no operation when the supply of operating power is resumed, the setting values can be confirmed. It is possible to restart it.

Next, the end timing of the setting value update process (FIG. 157) and the setting confirmation process (FIG. 155) in relation to the operation state of the setting key insertion unit 68a will be explained with reference to the time chart in FIG. 160. FIG. 160(a) shows the period when the power of the pachinko machine 10 is ON, FIG. 160(b) shows the period when the setting key insertion unit 68a is ON, FIG. 160(c) shows the period when the setting value update process (FIG. 157) is being executed, FIG. 160(d) shows the period when the setting confirmation process (FIG. 155) is being executed, and FIG. 160(e) shows the period when the power outage process is being executed.

First, a case where the setting value update process (FIG. 157) and the setting confirmation process (FIG. 155) are executed in the normal flow will be described.

At timing t1, the setting key insertion part 68a is turned on using the setting key as shown in FIG. 160(b), and then at timing t2, the power of the pachinko machine 10 is turned on as shown in FIG. 160(a). An operation is performed. In this case, the reset button 68c is also pressed. Therefore, at timing t3, the setting value update process (FIG. 157) is started as shown in FIG. 160(c). Thereafter, at timing t4, as shown in FIG. 160(b), the setting key insertion section 68a changes from the ON state to the OFF state. This completes the setting value update process (FIG. 157) as shown in FIG. 160(c).

Furthermore, at timing t5, as shown in FIG. 160(b), the setting key insertion section 68a is turned ON using the setting key, and then at timing t6, as shown in FIG. 160(a), the power supply to the pachinko machine 10 is turned ON. In this case, the reset button 68c is not pressed. Therefore, at timing t7, as shown in FIG. 160(d), the setting confirmation process (FIG. 155) is started. Then, at timing t8, as shown in FIG. 160(b), the setting key insertion section 68a changes from an ON state to an OFF state. This ends the setting confirmation process (FIG. 155) as shown in FIG. 160(d).

Next, we will explain the case where power outage processing is performed during the setting value update processing (Figure 157) and the "no operation" status is found when the supply of operating power is subsequently resumed.

At timing t9, the setting key insertion part 68a is turned on using the setting key as shown in FIG. 160(b), and then at timing t10, the power of the pachinko machine 10 is turned on as shown in FIG. 160(a). An operation is performed. In this case, the reset button 68c is also pressed. Therefore, at timing t11, the setting value update process (FIG. 157) is started as shown in FIG. 160(c). Then, at timing t12 during the execution of the setting value update process (FIG. 157), the power is turned off as shown in FIG. In this state, power outage processing is started as shown in FIG. 160(e). In this case, the setting value update process (FIG. 157) ends at the timing t12, as shown in FIG. 160(c), and the power outage process ends at the timing t13, as shown in FIG. 160(e).

Thereafter, at timing t14, the setting key insertion part 68a is turned off as shown in FIG. 160(b), and in this state, at timing t15, the power supply of the pachinko machine 10 is turned off as shown in FIG. 160(a). An ON operation is performed. In this case, the reset button 68c is not pressed. In other words, the power ON operation of the pachinko machine 10 is performed in a "no operation" situation. However, when the pachinko machine 10 was previously powered off, the power outage process was executed during the setting value update process (FIG. 157). Therefore, at timing t16, the setting value update process (FIG. 157) is started as shown in FIG. 160(c). In this case, the setting value update process (FIG. 157) is terminated when it is determined that the setting key insertion section 68a has switched from the ON operation state to the OFF operation state. Even if the setting key insertion section 68a is maintained in an OFF-operated state from the start timing of step 157), this does not mean that the termination condition for the setting value update process (FIG. 157) is satisfied.

After that, at timing t17 while the setting value update process (Fig. 157) is being executed, the setting key insertion section 68a is turned ON using the setting key as shown in Fig. 160(b), and then at timing t18 as shown in Fig. 160(b), the setting key insertion section 68a changes from being turned ON to being turned OFF. This ends the setting value update process (Fig. 157) as shown in Fig. 160(c).

Next, a case will be described in which the power outage process is executed during the execution of the setting confirmation process (FIG. 155) and the situation is "no operation" when the supply of operating power is resumed.

At timing t19, as shown in FIG. 160(b), the setting key insertion part 68a is turned on using the setting key, and then at timing t20, as shown in FIG. 160(a), the power of the pachinko machine 10 is turned on. An operation is performed. In this case, the reset button 68c is not pressed. Therefore, at timing t21, the setting confirmation process (FIG. 155) is started as shown in FIG. 160(d). Then, at timing t22 during execution of the setting confirmation process (FIG. 155), the power is turned off as shown in FIG. In this state, the power outage process is started as shown in FIG. 160(e). In this case, the setting confirmation process (FIG. 155) ends at the timing t22, as shown in FIG. 160(d), and the power outage process ends at the timing t23, as shown in FIG. 160(e).

Thereafter, at timing t24, the setting key insertion part 68a is turned off as shown in FIG. 160(b), and in this state, at timing t25, the power supply of the pachinko machine 10 is turned off as shown in FIG. 160(a). An ON operation is performed. In this case, the reset button 68c is not pressed. In other words, the power ON operation of the pachinko machine 10 is performed in a "no operation" situation. However, when the pachinko machine 10 was previously powered off, the power outage process was executed during the setting confirmation process (FIG. 155). Therefore, at timing t26, the setting confirmation process (FIG. 155) is started as shown in FIG. 160(d). In this case, the setting confirmation process (FIG. 155) is terminated when it is determined that the setting key insertion section 68a has switched from the ON operation state to the OFF operation state. Even if the setting key insertion section 68a is maintained in the OFF-operated state from the start timing of step 155), this does not mean that the termination condition of the setting confirmation process (FIG. 155) is satisfied.

After that, at timing t27 while the setting confirmation process (Fig. 155) is being executed, the setting key insertion section 68a is turned ON using the setting key as shown in Fig. 160(b), and then at timing t28 as shown in Fig. 160(b), the setting key insertion section 68a changes from the ON state to the OFF state. This ends the setting confirmation process (Fig. 155) as shown in Fig. 160(d).

According to this embodiment described in detail above, the following excellent effects are achieved.

In order to execute the setting value update process (FIG. 157), when the supply of operating power is started, turn on the setting key insertion part 68a and press the reset button 68c. It is necessary to perform a change operation. This makes it difficult to illegally change the setting value. In this case, if the supply of operating power is stopped while the setting value update process (Fig. 157) is being executed, if the supply of operating power is restarted, the "setting change operation" has not been performed. The setting value update process (FIG. 157) can be executed even if the setting value is updated. This makes it possible to give priority to the execution of the setting value update process (FIG. 157).

If the supply of operating power is stopped while the setting value update process (Fig. 157) is being executed, and then the supply of operating power is resumed, and a "setting confirmation operation" is performed to check the setting value, the setting value update process (Fig. 157) is executed instead of the setting confirmation process (Fig. 155). This makes it possible to prioritize changing the setting value over checking the setting value, and prevents gameplay from starting even when the change to the setting value of the target to be used has not actually been completed.

In a situation where the setting value update process (FIG. 157) is being executed, the setting values selected to be updated are displayed on the first to fourth notification display devices 201 to 204. This makes it possible to change the setting value while keeping track of the setting value selected to be updated. In addition, by displaying the setting values selected to be updated in this way, when the supply of operating power is resumed, the setting value update process (Fig. 157), it is also possible to substantially confirm the set value.

When the setting value update process (Fig. 157) is being executed, not only is a display corresponding to the setting value selected as the update target displayed on the first to fourth notification display devices 201 to 204, but also a display corresponding to the state in which the setting value update process (Fig. 157) is being executed is displayed. This makes it easier for the amusement hall manager to know that the setting value update process (Fig. 157) has started, even if the "setting confirmation operation" has been performed when the supply of operating power is resumed.

If the supply of operating power is stopped while the setting value update process (Fig. 157) is being executed, and if the supply of operating power is resumed afterwards, if there is "no operation" or "setting confirmation operation". ”, the setting value is changed from the setting value that was selected before the supply of operating power was stopped. This makes it possible to continue changing the setting value from the setting value that was selected before the supply of operating power was stopped.

If the supply of operating power is stopped while the setting value update process (Figure 157) is being executed, and the "setting change operation" is performed when the supply of operating power is resumed, the current The setting value is changed from the setting value to be used. This makes it possible to vary the initial set value when starting to change the set value, depending on the content of the operation when the supply of operating power is restarted.

Even if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, the setting value update process (FIG. 157) will not be executed if the "RAM clear operation" is performed when the supply of operating power is resumed. As a result, even if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, if there is no need to execute the setting value update process (FIG. 157) thereafter, it is possible to prevent the setting value update process (FIG. 157) from being executed by performing the "RAM clear operation" when the supply of operating power is resumed.

In order to execute the setting confirmation process (FIG. 155), it is necessary to perform a "setting confirmation operation" by turning on the setting key insertion part 68a when the supply of operating power is started. . This makes it difficult to illegally check the setting values. In this case, if the supply of operating power is stopped while the setting confirmation process (Figure 155) is being executed, if the supply of operating power is restarted, the "setting confirmation operation" has not been performed. The settings confirmation process (FIG. 155) can be executed even if the settings are checked. This makes it possible to give priority to the execution of the setting confirmation process (FIG. 155).

Even if the supply of operating power is stopped while the setting confirmation process (Figure 155) is being executed, if the "settings change operation" is performed when the supply of operating power is resumed. The setting value update process (FIG. 157) is executed without executing the setting confirmation process (FIG. 155). This makes it possible to give priority to the task of changing setting values over the task of checking setting values.

The work area 221 for specific control is provided with a setting reference area 341 and a setting update area 342. Information corresponding to the setting value to be used is stored in the setting reference area 341, and setting value update processing is performed. Information corresponding to the setting value that is being changed in the situation where (FIG. 157) is being executed is stored in the setting update area 342. As a result, while the information on the setting values that were set before the setting value update processing (FIG. 157) was started is stored and retained in the setting reference area 341, the information to be updated in the setting value update processing (FIG. 157) is retained. It becomes possible to change the setting value.

If the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, when the supply of operating power is subsequently resumed, if there is "no operation" or if a "setting confirmation operation" is performed, the setting value will start changing from the setting value corresponding to the information stored in the setting update area 342, and if a "setting change operation" is performed when the supply of operating power is subsequently resumed, the setting value will start changing from the setting value corresponding to the information stored in the setting reference area 341. This makes it possible to appropriately generate each of these situations.

In order to start the setting value update process (Fig. 157), it is necessary to turn on the setting key insertion part 68a using the setting key, so an attempt is made to start the setting value update process (Fig. 157) fraudulently. It is possible to make it difficult to perform an action. In this case, the setting value update process (FIG. 157) will not be terminated just by turning off the setting key insertion section 68a, but if the setting key insertion section 68a is turned off after being turned on. will be terminated in As a result, if the supply of operating power is stopped while the setting value update process (Fig. 157) is being executed, and when the supply of operating power is subsequently restarted, the setting key can be inserted due to "no operation". Even if the setting value update process (FIG. 157) is started in a situation where the setting key insertion section 68a is in the OFF state, the setting value update process (FIG. 157) is not immediately terminated, and the setting key insertion section 68a is turned on once. Since the setting value update process (FIG. 157) is ended by further turning OFF after the operation, it is possible to end the setting value update process (FIG. 157) at a timing that is favorable to the administrator of the gaming hall.

In order to start the setting confirmation process (Fig. 155), it is necessary to use the setting key to turn on the setting key insertion section 68a, making it difficult to illegally start the setting confirmation process (Fig. 155). In this case, the setting confirmation process (Fig. 155) is not terminated simply by turning off the setting key insertion section 68a, but is terminated when the setting key insertion section 68a is turned off from an ON state. As a result, even if the supply of operating power is stopped while the setting confirmation process (FIG. 155) is being executed, and the setting confirmation process (FIG. 155) is started when the supply of operating power is subsequently resumed and the setting key insertion section 68a is in the OFF state due to "no operation," the setting confirmation process (FIG. 155) will not end immediately; the setting confirmation process (FIG. 155) can be ended by first turning the setting key insertion section 68a ON and then turning it OFF, making it possible for the manager of the amusement hall to end the setting confirmation process (FIG. 155) at a time that is convenient for him/her.

When the supply of operating power to the main CPU 63 is started, an initial check period is started after the processing at the start of the supply of operating power (steps SA401 to SA418) is completed in the main CPU 63 and before the remaining processing (steps SA422 to SA425) is started. This makes it unnecessary to control the initial check period when the processing at the start of the supply of operating power is being executed, thereby making it possible to reduce the processing load when the processing at the start of the supply of operating power is being executed.

The setting confirmation process (FIG. 155) and the setting value update process (FIG. 157) are executed as processes at the start of the supply of operating power, whereas the initial check period starts after the processes at the start of the supply of operating power are completed. This makes it possible to ensure that even if a check display is performed on the first to fourth notification display devices 201 to 204 during the initial check period, this does not affect the display of the setting values using the first to fourth notification display devices 201 to 204.

When the supply of operating power to the main CPU 63 is started, a check display is provided on the first to fourth alarm display devices 201 to 204, regardless of whether the setting confirmation process (FIG. 155) or the setting value update process (FIG. 157) is executed, or whether neither the setting confirmation process (FIG. 155) nor the setting value update process (FIG. 157) is executed. This makes it possible to check whether the first to fourth alarm display devices 201 to 204 are normal, regardless of the situation when the supply of operating power to the main CPU 63 is started.

The main processing (FIG. 153) of the main CPU 63 is a processing that is executed in common when either the setting confirmation processing (FIG. 155) or the setting value update processing (FIG. 157) is executed, and when neither the setting confirmation processing (FIG. 155) nor the setting value update processing (FIG. 157) is executed, and when either the setting confirmation processing (FIG. 155) or the setting value update processing (FIG. 157) is executed, a processing that starts a check display on the first to fourth notification display devices 201 to 204 is set as a processing that is executed later in the order of execution than the setting confirmation processing (FIG. 155) and the setting value update processing (FIG. 157). In this way, the processing that starts a check display on the first to fourth notification display devices 201 to 204 is set as a common processing, which makes it possible to achieve the excellent effects already described while simplifying the processing configuration.

Even if a check display is being executed on the first to fourth notification display devices 201 to 204, the main CPU 63 can start processing to progress the game. This makes it possible to prevent delays in the start of processing to progress the game even in a configuration in which a check display is executed on the first to fourth notification display devices 201 to 204 after the setting confirmation process (FIG. 155) or the setting value update process (FIG. 157) is executed.

Note that if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, and if the supply of operating power is resumed and there is "no operation", the setting value update process (FIG. 157) is not limited to being started from the setting value being changed before the supply of operating power was stopped, but may be started from the setting value currently being used that is stored in the setting reference area 341. Also, if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, and if the supply of operating power is resumed and there is "no operation", the setting value update process (FIG. 157) may be executed after the RAM clear process (step SA416) is executed, or the setting value update process (FIG. 157) may be executed after the RAM clear process (step SA416).

In addition, if the supply of operating power is stopped while the setting value update process (Fig. 157) is being executed, and if the supply of operating power is restarted and there is no operation, the setting value update process (Fig. 157) is executed. 157) may not be executed. In this case, the setting value information stored in the setting reference area 341 may be overwritten in the setting update area 342 at the start of the next setting value update process (FIG. 157).

In addition, if the supply of operating power is stopped while the setting confirmation process (FIG. 155) is being executed, and the supply of operating power is resumed, the setting confirmation process (FIG. 155) may not be executed if there is "no operation."

In addition, if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, and then the supply of operating power is resumed and a "RAM clear operation" is performed, the setting value update process (FIG. 157) may be executed after the RAM clear process (step SA416). In this case, the setting value update process (FIG. 157) may be started from the setting value that was being changed before the supply of operating power was stopped, or may be started from the setting value currently being used that is stored in the setting reference area 341.

In addition, if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, and the supply of operating power is resumed and a "RAM clear operation" is performed, the setting value update process (FIG. 157) may be executed without executing the RAM clear process (step SA416), or the RAM clear process (step SA416) may be executed after the setting value update process (FIG. 157) is executed. In this case, the setting value update process (FIG. 157) may be started from the setting value that was being changed before the supply of operating power was stopped, or may be started from the setting value currently being used that is stored in the setting reference area 341.

Furthermore, if the supply of operating power is stopped while the setting confirmation process (Fig. 155) is being executed, and the "RAM clear operation" is performed when the supply of operating power is restarted, The configuration may be such that the setting confirmation process (FIG. 155) is executed after the RAM clear process (step SA416) is executed, or the setting confirmation process (FIG. 155) is performed without the RAM clear process (step SA416) being executed. may be executed, or the RAM clearing process (step SA416) may be executed after the setting confirmation process (FIG. 155) is executed.

Furthermore, if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, and the "setting change operation" is performed when the supply of operating power is restarted, Although the setting value update process (FIG. 157) is configured to start from the current target setting value stored in the setting reference area 341, the setting value update process (FIG. 157) starts when the supply of operating power is stopped. A configuration may also be adopted in which the setting value is started from the setting value that is currently being changed.

In addition, if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, and the supply of operating power is resumed and a "setting change operation" is performed, the setting value update process (FIG. 157) may be executed without executing the RAM clear process (step SA416), or the RAM clear process (step SA416) may be executed after the setting value update process (FIG. 157) is executed. In this case, the setting value update process (FIG. 157) may be started from the setting value that was being changed before the supply of operating power was stopped, or may be started from the setting value currently being used that is stored in the setting reference area 341.

Furthermore, if the supply of operating power is stopped while the setting confirmation process (FIG. 155) is being executed, and the "settings change operation" is performed when the supply of operating power is restarted, Although the setting value update process (FIG. 157) is configured to start from the current target setting value stored in the setting reference area 341, the setting value update process (FIG. 157) starts when the supply of operating power is stopped. A configuration may also be adopted in which the setting value is started from the setting value that is currently being changed.

In addition, if the supply of operating power is stopped while the setting confirmation process (FIG. 155) is being executed, and the supply of operating power is resumed and a "setting change operation" is performed, the setting value update process (FIG. 157) may be executed without executing the RAM clear process (step SA416), or the RAM clear process (step SA416) may be executed after the setting value update process (FIG. 157).

In addition, if the supply of operating power is stopped while the setting confirmation process (FIG. 155) is being executed, and the supply of operating power is resumed and a "setting change operation" is performed, the setting confirmation process (FIG. 155) may be executed and the setting value update process (FIG. 157) may not be executed, or the setting confirmation process (FIG. 155) may be executed after the setting confirmation process (FIG. 155) is executed, or the setting value update process (FIG. 157) may be executed after the setting confirmation process (FIG. 155) is executed. In addition, if the supply of operating power is stopped while the setting confirmation process (FIG. 155) is being executed, and the supply of operating power is resumed and a "setting change operation" is performed, both the setting confirmation process (FIG. 155) and the setting value update process (FIG. 157) may not be executed.

Furthermore, if the supply of operating power is stopped while the setting value update process (Fig. 157) is being executed, and the "setting confirmation operation" is performed when the supply of operating power is restarted, The setting value update process (Fig. 157) is not limited to a configuration in which the setting value is started from the setting value that is being changed before the supply of operating power is stopped, and the setting value update process (Fig. 157) is performed in the setting reference area. The configuration may be such that the process starts from the current setting value of the target to be used stored in 341.

In addition, if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed, and the supply of operating power is resumed and a "setting confirmation operation" is performed, the setting value update process (FIG. 157) may be executed after the RAM clear process (step SA416), or the setting value update process (FIG. 157) may be executed after the RAM clear process (step SA416).

In addition, if the supply of operating power is stopped while the setting value update process (Fig. 157) is being executed, and the "setting confirmation operation" is performed when the supply of operating power is restarted, the settings will be changed. A configuration may be adopted in which the setting confirmation process (FIG. 155) is executed without executing the value update process (FIG. 157). In this case, the setting value information stored in the setting reference area 341 may be overwritten in the setting update area 342 at the start of the next setting value update process (FIG. 157).

Furthermore, if the supply of operating power is stopped while the setting value update process (Fig. 157) is being executed, and the "setting confirmation operation" is performed when the supply of operating power is restarted, The configuration may be such that the setting value update process (Figure 157) is executed after the setting confirmation process (Figure 155) is executed, or the setting value update process (Figure 155) is executed after the setting value update process (Figure 157) is executed. ) may be configured to be executed. Furthermore, if the supply of operating power is stopped while the setting value update process (Fig. 157) is being executed, and the "setting confirmation operation" is performed when the supply of operating power is restarted, A configuration may be adopted in which both the setting confirmation process (FIG. 155) and the setting value update process (FIG. 157) are not executed.

In addition, when the supply of operating power is started in a state where the setting update display flag in the work area 221 for specific control is set to "1", the second timer interrupt process (FIG. 134) is permitted to interrupt after a predetermined time for waiting has elapsed in the power-on initial setting process (step SA401), so that the display indicating that the setting value is being updated and the display indicating the setting value corresponding to the information stored in the setting update area 342 are started on the first to fourth notification display devices 201 to 204 are not limited to the configuration, and these displays may be started without waiting for the predetermined time for waiting to elapse. In addition, even if the setting update display flag is set to "1", the display indicating that the setting value is being updated and the display indicating the setting value corresponding to the information stored in the setting update area 342 may be configured to be performed on the first to fourth notification display devices 201 to 204 on the condition that the setting value update process (FIG. 157) is being performed. In this case, it is possible to prevent these displays from being performed in a state where the setting value update process (FIG. 157) is not being performed.

In addition, if the supply of operating power is started in a situation where the setting confirmation display flag in the work area 221 for specific control is set to "1", the power supply for the wait is set in the power-on initial setting process (step SA401). When the second timer interrupt process (FIG. 134) is allowed to interrupt after a predetermined period of time has elapsed, a display indicating that the setting value is being checked is stored in the setting reference area 341. The configuration is not limited to the configuration in which the display indicating the set value corresponding to the information is started on the first to fourth notification display devices 201 to 204, and these displays can be performed without waiting for the elapse of the predetermined time for the wait. The display may be started. Furthermore, even if the setting confirmation display flag is set to "1", it is possible to confirm that the setting value is being checked, provided that the setting confirmation process (Figure 155) is being executed. The first to fourth notification display devices 201 to 204 may display the setting values corresponding to the information stored in the setting update area 342. In this case, it is possible to prevent these displays from being performed in a situation where the setting confirmation process (FIG. 155) is not being executed.

In addition, when the setting value update process (Figure 157) is being executed, the pattern display device 41 may be configured to display an image indicating that the setting value is being updated, and in addition to or instead of this display, an image showing the operating procedure for updating the setting value may be displayed, and the display light-emitting unit 53 or speaker unit 54 may be configured to notify the user that the setting value is being updated. In this case, it is possible to make the manager of the amusement hall clearly aware that the setting value update process (Figure 157) is being executed.

Further, in a situation where the setting confirmation process (FIG. 155) is being executed, an image indicating that the setting value is being confirmed on the symbol display device 41 may be displayed. In addition to or in place of this, an image showing the operating procedure for checking the setting value may be displayed, and the display light emitting section 53 or the speaker section 54 can indicate that the setting value is being checked. It is also possible to adopt a configuration in which the notification shown in FIG. In this case, it becomes possible to make the game hall manager clearly aware that the setting confirmation process (FIG. 155) is being executed.

The operation unit operated to update the setting value in the setting value update process (Fig. 157) is not limited to the reset button 68c, but may be a dedicated operation unit such as the update button 68b, or may be an operation unit provided in the main control device 60 to release an abnormal state. In addition, the setting key insertion unit 68a may be configured so that positions corresponding to "Setting 1" to "Setting 6" are set as the rotation operation positions when the setting key is inserted into the setting key insertion unit 68a and rotated, and the setting value corresponding to the rotation operation position of the setting key insertion unit 68a is set. In addition, the setting key insertion unit 68a may be configured so that it can be rotated further than the ON position, and each time a rotation operation beyond the ON position is performed, the setting value being updated is updated to the next setting value in the sequence.

Further, when the setting value update process (FIG. 157) is executed, a corresponding signal may be externally outputted from the pachinko machine 10 to the management computer of the gaming hall. In this case, the configuration may be such that the signal output is performed for a predetermined period (for example, 100 milliseconds), and the signal output is continued while the setting value update process (FIG. 157) is being executed. It is also possible to configure This makes it possible for the game hall management computer to know that the setting value update process (FIG. 157) has been executed in the pachinko machine 10.

Further, when the setting confirmation process (FIG. 155) is executed, a corresponding signal may be externally outputted from the pachinko machine 10 to the management computer of the gaming hall. In this case, the configuration may be such that the signal output is performed for a predetermined period (for example, 100 milliseconds), and the signal output is continued while the setting confirmation process (FIG. 155) is being executed. It is also possible to configure This makes it possible for the game hall management computer to know that the setting confirmation process (FIG. 155) has been executed in the pachinko machine 10.

The configuration in which processing is terminated when the key insertion section is changed from the ON state to the OFF state may also be applied to processing other than the setting confirmation processing (FIG. 155) and the setting value update processing (FIG. 157). For example, a configuration may be adopted in which a specific key insertion section must be operated to the ON position in order to display the base value on the first to fourth notification display devices 201 to 204, and the display may be terminated when it is determined that the specific key insertion section has been changed from the ON state to the OFF state.

Also, the configuration may be such that the condition for starting the setting value update process (FIG. 157) is that the opening target, which is at least one of the gaming machine main body 12 and the front door frame 14, has been operated to open. In this configuration, if the supply of operating power is stopped while the setting value update process (FIG. 157) is being executed and the supply of operating power is resumed with "no operation" or if a "setting confirmation operation" has been performed, the setting value update process (FIG. 157) may be started even if the opening target has not been operated to open.

Also, the configuration may be such that the condition for starting the setting confirmation process (FIG. 155) is that the opening target, which is at least one of the gaming machine main body 12 and the front door frame 14, has been operated to open. In this configuration, if the supply of operating power is stopped while the setting confirmation process (FIG. 155) is being executed and "no operation" is displayed when the supply of operating power is resumed, the setting confirmation process (FIG. 155) may be started even if the opening target has not been operated to open.

In addition, the areas to be initialized in the main RAM 65 may be different between the RAM clear process executed before the setting value update process (Figure 157) and the RAM clear process executed without the setting value update process being executed.

In addition, when the setting value update process (FIG. 157) is started in a situation where the setting update display flag is not set to "1", the setting value is not limited to being changed from the setting value corresponding to the information stored in the setting reference area 341, but may be changed from a predetermined initial setting value. The initial value may be, for example, "Setting 1" or "Setting 6", or may be another setting value.

In addition to or instead of a configuration in which the setting value update process (FIG. 157) is executed as a process at the start of the supply of operating power, a configuration in which the setting value update process (FIG. 157) is executed based on a "setting change operation" being performed in a situation after the process at the start of the supply of operating power has ended may be used. Even in this configuration, if the setting value update process (FIG. 157) ends before the normal termination trigger occurs, the setting value update process (FIG. 157) is executed even if a "setting change operation" has not been performed, making it possible to prioritize the setting value change operation.

In addition to or in place of the configuration in which the setting confirmation process (FIG. 155) is executed as the process at the start of the supply of operating power, the setting confirmation '' has been performed, the setting confirmation process (FIG. 155) may be executed. Even with this configuration, if the settings confirmation process (Figure 155) is completed before the normal termination trigger occurs, the settings confirmation process (Figure 155) will be executed even if the "settings confirmation operation" is not performed. By configuring this to be executed, it is possible to give priority to the setting value confirmation work.

<Forty-sixth embodiment>
In this embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the 45th embodiment. The configuration that differs from the 45th embodiment will be described below. Note that the description of the same configuration as the 45th embodiment will basically be omitted.

Figure 161 is a flowchart showing the main processing in this embodiment that is executed by the main CPU 63. Note that the processing of steps SA901 to SA925 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

Steps SA901 to SA904 are the same as steps SA401 to SA404 of the main processing (Figure 153) in the 45th embodiment. Then, it is determined whether the setting update display flag provided in the work area 221 for specific control is set to "1" (step SA905). If the supply of operating power is stopped and then resumed while the setting value update processing (step SA918) is being performed, the main processing is started with the setting update display flag set to "1".

If a negative determination is made in step SA905, it is determined whether or not the reset button 68c is pressed (step SA906). That is, it is determined whether or not the pachinko machine 10 is powered on while the reset button 68c is pressed and the supply of operating power to the main CPU 63 is started.

If the reset button 68c is not pressed (step SA906: NO), it is determined whether the power outage flag provided in the specific control work area 221 is set to "1" (step SA907). When the power outage process is executed in the power outage information storage process (step S8901) of the first timer interrupt process (FIG. 133), the power outage flag is set to "1". The power outage flag is a flag used by the main CPU 63 to determine whether or not the power outage process was appropriately performed during the previous power shutoff.

If the power outage flag is set to "1" (step SA907: YES), a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step SA908). The checksum calculation method is the same as in the 33rd embodiment. Thereafter, the work area 221 for specific control and the work area 221 for specific control calculated in the power outage process executed immediately before the supply of operating power to the main CPU 63 is stopped and saved in the work area 221 for specific control. The checksum for the stack area 222 is read, and the read checksum is compared with the checksum calculated in step SA908 (step SA909). Then, it is determined whether these checksums match (step SA910).

If a negative determination is made in step SA907 or step SA910, that is, if the power outage flag is not set to "1" or if the checksums do not match, the game stop flag provided in the work area 221 for specific control is set to "1" (step SA911). Furthermore, at the start of supply of operating power, an abnormality command indicating that an abnormality has occurred regarding the power failure flag or checksum is transmitted to the audio emission control device 81 (step SA912). The processing contents of step SA911 and step SA912 are the same as step SA410 and step SA411 of the main processing (FIG. 153) in the forty-fifth embodiment.

If the power outage flag is set to "1" and the checksum is normal (step SA907 and step SA910: YES), it is determined whether the setting key insertion section 68a is turned on using the setting key. (Step SA913). When the setting key insertion section 68a is turned on using a setting key (step SA913: YES), a setting confirmation process is executed (step SA914). The contents of the setting confirmation process are the same as those in the forty-fifth embodiment. In other words, in this embodiment, even if the setting confirmation display flag provided in the work area 221 for specific control is set to "1", the setting confirmation process is executed as long as the setting key insertion section 68a is not turned on. Not done. Therefore, even if the supply of operating power is stopped while the setting confirmation process is being executed, the setting confirmation process will not be executed unless the supply of operating power is restarted in a situation where the "setting confirmation operation" is performed.

If the setting update display flag is set to "1" (step SA905: YES), or if the reset button 68c is pressed (step SA906: YES), a RAM clear process is executed (step SA915). The contents of the RAM clear process are the same as the RAM clear process (step SA416) of the main process (FIG. 153) in the 45th embodiment.

After that, if the setting update display flag is set to "1" (step SA916: YES), the setting value update process is executed regardless of whether the setting key insertion section 68a is turned ON (step SA918). On the other hand, if the setting update display flag is not set to "1" (step SA916: NO), the setting value update process is executed (step SA918) on the condition that the setting key insertion section 68a is turned ON (step SA917: YES). In other words, if the supply of operating power is stopped while the setting value update process is being executed, the setting value update process (step SA918) is started anew after the RAM clear process (step SA915) is executed, regardless of the operation content when the supply of operating power is resumed.

If the process of step SA912 is executed, if a negative determination is made in step SA913, if the process of step SA914 is executed, if a negative determination is made in step SA917, or if the process of step SA918 is executed, step SA919 ~Execute the process of step SA925. The processing contents of step SA919 to step SA925 are the same as steps SA419 to step SA425 of the main processing (FIG. 153) in the forty-fifth embodiment.

FIG. 162 shows that when the power outage process is executed in a situation where the setting value update process (step SA918) or the setting confirmation process (step SA914) is being executed, the main process ( FIG. 161 is an explanatory diagram for explaining the contents of the process executed in FIG. 161).

When the power failure processing is performed in a situation where neither the setting value update processing (step SA918) nor the setting confirmation processing (step SA914) is performed, the contents of the processing performed in the main processing (FIG. 161) when the supply of operating power is resumed thereafter are the same as those in the above 45th embodiment. In other words, when the supply of operating power is resumed in a "no operation" situation, the RAM clear processing (step SA915), the setting value update processing (step SA918), and the setting confirmation processing (step SA914) are not performed in the main processing (FIG. 161). Also, when the supply of operating power is resumed in a situation where a "RAM clear operation" has been performed, the RAM clear processing (step SA915) is performed in the main processing (FIG. 161), while the setting value update processing (step SA918) and the setting confirmation processing (step SA914) are not performed. If the supply of operating power is resumed when a "setting change operation" has been performed, the main processing (FIG. 161) executes a RAM clear process (step SA915) and a setting value update process (step SA918), but does not execute a setting confirmation process (step SA914). If the supply of operating power is resumed when a "setting confirmation operation" has been performed, the main processing (FIG. 161) executes a setting confirmation process (step SA914), but does not execute a RAM clear process (step SA915) or a setting value update process (step SA918).

Next, we will explain the contents of the processing that is executed in the main processing (Figure 161) when the supply of operating power is resumed if power outage processing is executed while the setting value update processing (step SA918) is being executed (i.e., the setting update display flag is set to "1").

If the supply of operating power is resumed in the situation of "no operation", if the supply of operating power is resumed in the situation of "RAM clear operation", it will operate in the situation that "setting change operation" is performed. Regardless of whether the supply of power is resumed or if the supply of operating power is resumed in a situation where the "setting confirmation operation" has been performed, the main process (FIG. 161) performs the RAM clear process (step SA915). ) is executed and the setting value update process (step SA918) is executed, while the setting confirmation process (step SA914) is not executed. In other words, if the power outage process is executed while the setting value update process (step SA918) is being executed, no matter what operation is performed when the supply of operating power is resumed, the RAM will be cleared. After the process (step SA915) is executed, the setting value update process (step SA918) is newly started.

With the above configuration, when the supply of operating power is stopped in the middle of the setting value update process (step SA918), when the supply of operating power is restarted, the setting key insertion part when the power of the pachinko machine 10 is turned on is 68a and the reset button 68c, the setting value update process (step SA918) can be newly started after the RAM clear process (step SA915) is executed. As a result, if the supply of operating power is stopped in the middle of updating the setting values, if the supply of operating power is resumed afterwards, there will be an opportunity to update the setting values and then complete the update. becomes possible. Therefore, even though the supply of operating power is stopped during the update of the setting value, if the supply of operating power is restarted afterwards, the setting before the previous setting value update process (step SA918) is started. It is possible to prevent the game from starting with the same value.

In addition, if the supply of operating power is stopped during the setting value update process (step SA918), the RAM clearing process (step SA915) is uniquely executed regardless of the operation details when restarting the supply of operating power. By executing the setting value update process (step SA918) after the setting value update process (step SA918), the process configuration is simplified compared to a configuration in which the process content to be executed is changed depending on the content of each operation, and the advantages described above can be achieved. This makes it possible to achieve the desired effect.

Next, if the power outage process is executed in a situation where the setting confirmation process (step SA914) is being executed (that is, a situation where the setting confirmation display flag is set to "1"), the subsequent operating power supply The contents of the process executed in the main process (FIG. 161) when restarting will be explained.

When power failure processing is executed while the setting confirmation processing (step SA914) is being executed (i.e., the setting confirmation display flag is set to "1"), the contents of the processing executed in the main processing (Fig. 161) when the supply of operating power is resumed thereafter are the same as the contents of the processing executed in the main processing (Fig. 161) when the supply of operating power is resumed thereafter when power failure processing is executed while neither the setting value update processing (Fig. 157) nor the setting confirmation processing (Fig. 155) is being executed. In other words, even if the supply of operating power is stopped while the setting confirmation processing (step SA914) is being executed, when the supply of operating power is resumed thereafter, the processing corresponding to the operation contents when the power of the pachinko machine 10 is turned on is executed.

Confirming the setting value is different from changing the setting value, and even if the game is terminated midway and is not restarted, it will not affect the game. Therefore, even if the supply of operating power is stopped in the middle of checking the set values, the process corresponding to the operation when turning on the power of the pachinko machine 10 is executed, so that the administrator of the game hall can It becomes possible to give priority to the details of the operation when turning on the power.

<Forty-seventh embodiment>
In this embodiment, when the power failure process is executed while the setting value update process (step SA918) or the setting confirmation process (step SA914) is being executed, the contents of the process executed in the main process (FIG. 161) when the supply of operating power is resumed after the power failure process is executed differ from those of the 45th embodiment. The following describes the configurations that differ from the 45th embodiment. Note that the description of the same configurations as the 45th embodiment will basically be omitted.

FIG. 163 shows the main processing ( FIG. 153 is an explanatory diagram for explaining the contents of the process executed in FIG. 153).

When power failure processing is executed in a situation where neither the setting value update processing (FIG. 157) nor the setting confirmation processing (FIG. 155) is being executed, the contents of the processing executed in the main processing (FIG. 153) when the supply of operating power is subsequently resumed are the same as those in the 45th embodiment. Also, when power failure processing is executed in a situation where the setting confirmation processing (step FIG. 155) is being executed (i.e., the setting confirmation display flag is set to "1"), the contents of the processing executed in the main processing (FIG. 153) when the supply of operating power is subsequently resumed are the same as those in the 46th embodiment.

If the power outage process is executed while the setting value update process (Figure 157) is being executed (that is, the setting update display flag is set to "1"), the main The content of the process executed in the process (FIG. 153) is the same as in the forty-fifth embodiment above in the case of "no operation" and in the case of "setting confirmation operation", restarting the setting value update process (FIG. 157). It is. Further, in the case of "RAM clear operation" and "setting change operation", the setting value update process (FIG. 157) is restarted after the RAM clear process (step SA416) is executed. In this case, in the RAM clearing process (step SA416), not only the setting reference area 341 provided in the work area 221 for specific control but also the setting update display flag and setting reference area 341 provided in the work area 221 for specific control are used. Area 342 is excluded from initialization targets. Therefore, even if the RAM clearing process (step SA416) is executed in a situation where the setting update display flag is set to "1", when starting the subsequent setting value update process (FIG. 157), the setting update display flag is set to "1". "1" is set, and updating of the setting value is started from the setting value information stored at that time in the setting update area 342.

With the above configuration, if the supply of operating power is stopped in the middle of updating the setting value, not only is the setting value update process (FIG. 157) executed reliably when the supply of operating power is resumed, but it is also possible to resume updating the setting value from the setting value that was in the middle of updating just before the supply of operating power was stopped. This makes it possible to continue the work of changing the setting value as is.

<Forty-eighth embodiment>
In this embodiment, when the power failure process is executed while the setting value update process (step SA918) or the setting confirmation process (step SA914) is being executed, the contents of the process executed in the main process (FIG. 161) when the supply of operating power is resumed thereafter differ from those of the 45th embodiment. The following describes the configurations that differ from the 45th embodiment. Note that the description of the same configurations as the 45th embodiment will basically be omitted.

FIG. 164 shows the main processing ( FIG. 153 is an explanatory diagram for explaining the contents of the process executed in FIG. 153).

When power failure processing is executed in a situation where neither the setting value update processing (FIG. 157) nor the setting confirmation processing (FIG. 155) is being executed, the contents of the processing executed in the main processing (FIG. 153) when the supply of operating power is subsequently resumed are the same as those in the 45th embodiment. Also, when power failure processing is executed in a situation where the setting confirmation processing (step FIG. 155) is being executed (i.e., the setting confirmation display flag is set to "1"), the contents of the processing executed in the main processing (FIG. 153) when the supply of operating power is subsequently resumed are the same as those in the 46th embodiment.

If the power outage process is executed while the setting value update process (Figure 157) is being executed (that is, the setting update display flag is set to "1"), the main The content of the process executed in the process (Figure 153) is the setting value update process (Figure 157) and setting confirmation in the case of "no operation", in the case of "RAM clear operation", and in the case of "setting confirmation operation". The contents of the process are the same as those executed in the main process (Figure 153) when the power supply is resumed after the power outage process is executed in a situation where none of the main processes (Figure 155) are executed. It is. In other words, in the case of "no operation", none of the RAM clear processing (step SA416), setting value update processing (Fig. 157), and setting confirmation processing (Fig. 155) is executed, and the "RAM clear operation" In this case, RAM clear processing (step SA416) is executed, but setting value update processing (Fig. 157) and setting confirmation processing (Fig. 155) are not executed, and in the case of "setting confirmation operation", Although the setting confirmation process (FIG. 155) is executed, the RAM clear process (step SA416) and setting value update process (FIG. 157) are not executed.

In contrast, in the case of a "setting change operation", the setting value update process (FIG. 157) is resumed after the RAM clear process (step SA416) is executed. In this case, in the RAM clear process (step SA416), not only the setting reference area 341 provided in the work area 221 for specific control, but also the setting update display flag and setting update area 342 provided in the work area 221 for specific control are excluded from the targets of initialization. Therefore, even if the RAM clear process (step SA416) is executed in a situation where the setting update display flag is set to "1", when the subsequent setting value update process (FIG. 157) is started, the setting update display flag will be set to "1", and the setting value update will be started from the setting value information stored at that time in the setting update area 342.

With the above configuration, even if the supply of operating power is stopped while the setting value is being updated, it is possible to prioritize the execution of the process corresponding to the operation content by the amusement hall manager when the supply of operating power is subsequently resumed.

In addition, if the supply of operating power is stopped while a setting value is being updated, and the supply of operating power is resumed in a situation where a "setting change operation" has been performed, it is possible to resume updating the setting value from the setting value that was in the middle of being updated just before the supply of operating power was stopped. This makes it possible to continue the work of changing the setting value as is.

<49th embodiment>
This embodiment is different from the forty-fifth embodiment in the processing configuration of the main processing executed by the main CPU 63. Hereinafter, the configuration that is different from the forty-fifth embodiment will be explained. Note that the description of the same configuration as the forty-fifth embodiment is basically omitted.

FIG. 165 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step SB101 to step SB128 in the main processing is executed using a specific control program and specific control data in the main CPU 63.

First, a power-on initial setting process is executed (step SB101). In the power-on initial setting process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process is started. During this predetermined wait period, the start of operation and initial setting of the symbol display device 41 are completed. Also, access to the main RAM 65 is permitted.

Thereafter, internal function register setting processing is executed (step SB102). In the internal function register setting process, as in the thirty-fifth embodiment, the interrupt cycle of the first timer interrupt process (FIG. 133), which is a process that is started by periodically interrupting the main process, is set as the first interrupt cycle. (specifically, 4 milliseconds), and set the interrupt cycle of the second timer interrupt process (Figure 134), which is a process that is started by periodically interrupting the main process, to be longer than the first interrupt cycle. The second interrupt period is also set to be a short period (specifically, 2 milliseconds).

In other words, in this embodiment, as in the 35th embodiment, the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134) exist as timer interrupt processing so that the interrupt period is relatively long and short. Both the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134) are started by interrupting the main processing. Also, the second timer interrupt processing (FIG. 134) is started by interrupting the first timer interrupt processing (FIG. 133). On the other hand, the first timer interrupt processing (FIG. 133) is not started by interrupting the second timer interrupt processing (FIG. 134). Also, if both the first interrupt period and the second interrupt period have elapsed in a situation where both the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134) are not being executed, the second timer interrupt processing (FIG. 134) is started first, regardless of the order in which those periods have elapsed. In this respect, it can be said that the second timer interrupt process (FIG. 134) is a process that is started with priority over the first timer interrupt process (FIG. 133). However, this is not limited to this, and the first timer interrupt process (FIG. 133) may be configured to be started with priority over the second timer interrupt process (FIG. 134).

In the internal function register setting process, the first interrupt period of the first timer interrupt process (Fig. 133) is set in a specified register of the main CPU 63, and the second interrupt period of the second timer interrupt process (Fig. 134) is set in a specific register of the main CPU 63. In addition to setting the first and second interrupt periods, the internal function register setting process also executes processes for setting the numerical ranges of various counters, such as the numerical range of the winning random number counter C1.

Then, the start-up processing flag provided in the work area 221 for specific control is set to "1" (step SB103). As in the 35th embodiment, the start-up processing flag is a flag for the main CPU 63 to identify that even if the first timer interrupt process (FIG. 133) is started, the first timer interrupt process (FIG. 133) should end without executing any process for progressing the game, while the various processes set in the first timer interrupt process (FIG. 133) for power outage monitoring, updating of various counters, and fraud monitoring are executed.

The start-up process flag is set to "1" when the process at the start of supply of operating power (steps SB101 to SB122) is started in the main process (FIG. 165); It is cleared to "0" after (steps SB101 to SB122) are completed and before the remaining processing (steps SB125 to SB128) is started. Similarly to the thirty-fifth embodiment, in the first timer interrupt process (FIG. 133), if the start-up processing flag is set to "1", the processes from step S8907 to step S8920 are not executed. Therefore, in order to proceed with the game in a situation where a setting confirmation process (FIG. 166) or a setting value update process (FIG. 167), which will be described later, is being executed among the processes at the start of supply of operating power (steps SB101 to SB122). It is possible to prevent this process from being executed. On the other hand, as described above, in the first timer interrupt processing (FIG. 133), even if the startup processing flag is set to "1", the operating power is reduced by executing the processing from step S8901 to step S8905. Power outage monitoring is executed even when the setting confirmation process (FIG. 166) or setting value update process (FIG. 167), which will be described later, is being executed among the processes at the start of supply (steps SB101 to SB122). At the same time, the winning random number counter C1, jackpot type counter C2, reach random number counter C3, and random number initial value counter CINI are updated, and fraud detection is also performed.

In particular, by executing the power outage information storage process (step S8901) even in a situation where the start-up process flag is set to "1", the process at the start of the supply of operating power (steps SB101 to SB122) ), even if a power outage occurs in a situation where a setting confirmation process (FIG. 166) or a setting value update process (FIG. 167), which will be described later, is being executed, the power outage process can be executed in response. In the power outage processing, as in the thirty-fifth embodiment, the power outage flag provided in the work area 221 for specific control is set to "1", a checksum is calculated, and the calculated checksum is used for specific control. Since the data is stored in the work area 221 of the main side RAM 65, it is possible to prevent it from being identified as an abnormality occurring in the main side RAM 65 when the supply of operating power is restarted. As a result, if a power outage occurs during the setting confirmation process (Figure 166) or the setting value update process (Figure 167), the next operating power supply will be informed that the power outage has occurred during the setting-related process. This can be specified at the start.

By the way, when the setting confirmation process (FIG. 166) or the setting value update process (FIG. 167) is being executed, the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) are not prohibited from interrupting and can be interrupted at any timing. In this case, when the first timer interrupt process (FIG. 133) or the second timer interrupt process (FIG. 134) is interrupted and started in the setting confirmation process (FIG. 166) or the setting value update process (FIG. 167), the return address information of the main process (FIG. 165) for returning after the timer interrupt process that was started is finished is saved in the stack area 222 for specific control, and the information of various registers of the main CPU 63 immediately before the timer interrupt process is started is saved in the stack area 222 for specific control. Then, when the timer interrupt process that was the target of activation is completed, the process returns to the main process (FIG. 165) corresponding to the return address information saved in the specific control stack area 222, and the information saved in the specific control stack area 222 is restored to the various registers of the main CPU 63.

After setting the start-up processing flag to "1" in step SB103, it is determined whether or not the power outage flag provided in the work area 221 for specific control is set to "1" (step SB104). . When the power outage process is executed in the power outage information storage process (step S8901) of the first timer interrupt process (FIG. 133), the power outage flag is set to "1". The power outage flag is a flag used by the main CPU 63 to specify whether or not the power outage processing was appropriately performed during the previous power cutoff.

If the power failure flag is set to "1" (step SB104: YES), it is determined whether the checksum is normal (step SB105). Specifically, first, the checksum is calculated for the specific control work area 221 and the specific control stack area 222. The method of calculating the checksum is the same as that of the 33rd embodiment. Then, the checksum for the specific control work area 221 and the specific control stack area 222 that was calculated and stored in the specific control work area 221 in the power failure processing executed immediately before the supply of operating power to the main CPU 63 was stopped is read, and the read checksum is compared with the checksum calculated as described above in the current main processing. Then, it is determined whether the checksums match.

If the checksums match (step SB105: YES), it is determined whether the setting value corresponding to the information stored in the setting reference area 341 (see FIG. 154) in the work area 221 for specific control is within the normal range (step SB106). The setting reference area 341 is a storage area in which information for identifying the current setting value of the pachinko machine 10 by the main CPU 63 is stored, as in the 45th embodiment. If the numerical information of "1" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 1". If the numerical information of "2" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 2". If the numerical information of "3" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 3". If the numerical information of "4" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 4". If the numerical information "5" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 will be "Setting 5." If the numerical information "6" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 will be "Setting 6." In step SB106, it is determined whether the setting value information stored in the setting reference area 341 is any of "1" to "6."

If all of steps SB104 to SB106 are judged to be positive, it is judged whether the setting update display flag provided in the work area 221 for specific control is set to "1" (step SB107). The setting update display flag is a flag for the main CPU 63 to identify that the setting value update process (FIG. 167) is being executed, as in the 35th embodiment. When the setting update display flag is set to "1", the first to fourth notification display devices 201 to 204 display an indication that the setting value is being updated and an indication of the setting value being updated. The setting update display flag is a flag that is set to "1" when the setting value update process (FIG. 167) is started and cleared to "0" when the setting value update process (FIG. 167) is terminated, so that in a situation where the setting value update process (FIG. 167) is not being executed, the setting update display flag is not basically set to "1". However, if the supply of operating power to the main CPU 63 is stopped while the setting value update process (FIG. 167) is being executed, the setting update display flag will be set to "1" when the supply of operating power to the main CPU 63 is subsequently started. This state in which the setting update display flag is set to "1" is maintained until the process of clearing the setting update display flag to "0" is executed in the setting value update process (FIG. 167).

If the setting update display flag is not set to "1" and a negative judgment is made in step SB107, it is judged whether the reset button 68c is pressed (step SB108). In other words, it is judged whether the power supply to the main CPU 63 is started by turning on the power of the pachinko machine 10 while the reset button 68c is pressed. Here, in this embodiment, as in the 35th embodiment, the main control device 60 is provided with a setting key insertion section 68a and a reset button 68c, but is not provided with an update button 68b. Also, as in the 11th embodiment, the main control device 60 is provided with the first to fourth notification display devices 201 to 204, rather than the first to third notification display devices 69a to 69c.

If the reset button 68c is not pressed (step SB108: NO), it is determined whether the game stop flag in the work area 221 for specific control is set to "1" (step SB109). The game stop flag is a flag that is set to "1" when the power outage flag is not set to "1", when the checksums do not match, or when the set value is abnormal. When the game stop flag is set to "1", steps S8901 to S8905 are executed in the first timer interrupt process (Figure 133), while a positive determination is made in step S8906, so that steps S8907 to S8920 are not executed. As a result, if the power outage flag is not set to "1" because power outage processing was not performed properly the previous time the power was cut off, if the checksums do not match because the information storage state has changed since the previous power outage in at least one of the work area 221 for specific control and the stack area 222 for specific control, or if the set value is abnormal, processing for power outage monitoring, updating of various counters, and fraud monitoring is executed, but processing for progressing the game is not executed. If a positive determination is made in step SB109, the processing of steps SB121 and SB122 described below is executed.

If the determination in step SB109 is negative, it is determined whether the setting key insertion unit 68a has been turned ON using the setting key (step SB110). If the setting key insertion unit 68a has been turned ON using the setting key (step SB110: YES), a setting confirmation process is executed (step SB112). Even if the setting key insertion unit 68a has not been turned ON using the setting key (step SB110: NO), if the setting confirmation display flag provided in the work area 221 for specific control is set to "1" (step SB111: YES), a setting confirmation process is executed (step SB112).

The setting confirmation display flag is a flag for specifying in the main CPU 63 that the setting confirmation process (FIG. 166) is being executed, as in the thirty-fifth embodiment, and the setting confirmation display flag is set to "1". is set, the first to fourth notification display devices 201 to 204 display a display indicating that the setting value is being checked and a display indicating the currently set setting value. be exposed. The setting confirmation display flag is a flag that is set to ``1'' when the setting confirmation process (Figure 166) is started and is cleared to ``0'' when the setting confirmation process (Figure 166) is ended. , in a situation where the setting confirmation process (FIG. 166) is not executed, the setting confirmation display flag is basically not set to "1". However, if the supply of operating power to the main CPU 63 is stopped while the setting confirmation process (FIG. 166) is being executed, if the supply of operating power to the main CPU 63 is subsequently started; In this state, the setting confirmation display flag is set to "1". When the setting confirmation display flag is set to "1", the first RAM clearing process (step SB117) to be described later is executed, the setting value updating process (FIG. 167) to be described later is executed, or the setting is confirmed. It is maintained until the process of clearing the setting confirmation display flag to "0" is executed in the process (FIG. 166).

As described above, the setting confirmation process (FIG. 166) is executed not only when the reset button 68c is not pressed and the setting key insertion section 68a is ON (i.e., when the "setting confirmation operation" is performed), but also when the reset button 68c is not pressed and the setting confirmation display flag is set to "1". Therefore, when the power failure process is executed in a situation where the setting confirmation process (FIG. 166) is being executed, the setting confirmation process (FIG. 166) is executed even if the "setting confirmation operation" is not performed when the supply of operating power is resumed thereafter. This makes it possible to continue checking the current setting value of the pachinko machine 10. On the other hand, even if the power failure process is executed in a situation where the setting confirmation process (FIG. 166) is being executed, if the reset button 68c is pressed when the supply of operating power is resumed thereafter, the setting confirmation process (FIG. 166) is not executed, and the first RAM clear process (step SB117) and the setting value update process (FIG. 167) corresponding to the operation performed when the supply of operating power is resumed are executed. This makes it possible to prioritize execution of the first RAM clear process (step SB117) or the setting value update process (Figure 167) over the setting confirmation process (Figure 166).

Here, we will explain the setting confirmation process executed in step SB112. Figure 166 is a flowchart showing the setting confirmation process. Note that the processing of steps SB201 to SB207 in the setting confirmation process is executed using a program for specific control and data for specific control in the main CPU 63.

First, interrupt permission is set (step SB201). This causes the first timer interrupt process (Fig. 133) to be started at the first interrupt period, and the second timer interrupt process (Fig. 134) to be started at the second interrupt period.

In this embodiment, the interrupts of the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) are basically prohibited in the process at the start of supply of operating power (steps SB101 to SB122). , interrupts are permitted in the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167). Therefore, in a situation where the setting confirmation process (Fig. 166) and the setting value update process (Fig. 167) are not executed in the process at the start of supply of operating power (steps SB101 to SB122), the first timer interrupt process (Fig. 133) and the second timer interrupt processing (Fig. 134) are prohibited and the setting confirmation processing (Fig. 166) or setting value update processing (Fig. 167) is executed. ) and second timer interrupt processing (FIG. 134) are permitted. However, in a situation where the setting confirmation process (Figure 166) or the setting value update process (Figure 167) is being executed, the startup process flag is set to "1", so the first timer interrupt process (Figure 167) is executed. 133) is started, among the various processes of the first timer interrupt process (Fig. 133), the processes for power outage monitoring, updating of various counters, and fraud monitoring are executed, while the processes for proceeding with the game are executed. The first timer interrupt process (FIG. 133) is ended without any process being executed.

Then, on condition that the setting confirmation display flag provided in the work area 221 for specific control is not set to "1", the setting confirmation display flag is set to "1" (step SB202). By setting the setting confirmation display flag to "1", a positive judgment is made in step S9005 of the second timer interrupt process (FIG. 134), and a setting process (step S9006) is executed for the fifth display data buffer 275 during the setting confirmation. The processing content of the setting process for the fifth display data buffer 275 during the setting confirmation is the same as that of the 45th embodiment. By executing this process, for example, as shown in the explanatory diagram of FIG. 124(b), a display indicating that the setting value of the pachinko machine 10 is being confirmed and a display indicating the current setting value of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204.

Thereafter, a confirmation start command is sent to the audio emission control device 81 (step SB203). By receiving the confirmation start command, the audio emission control device 81 recognizes an image indicating that the setting confirmation process (FIG. 166) is being executed and the operation details for terminating the setting confirmation process (FIG. 166). Display control is performed on the display control device 82 so that the image for making the display possible is displayed on the symbol display device 41. This allows the game hall administrator to recognize that the current setting values of the pachinko machine 10 are being checked, and is necessary for ending the setting confirmation process (Fig. 166). This makes it possible for the game hall manager to recognize the operation details. In addition to or instead of the notification being executed by the symbol display device 41, the notification may be executed by at least one of the display light emitting section 53 and the speaker section 54. Further, an external output indicating that the setting confirmation process (FIG. 166) is being executed may be configured to be sent to a device external to the pachinko machine 10, such as a management computer of a game hall.

Thereafter, the setting key insertion section 68a determines whether the setting key has been switched from the ON state to the OFF state (step SB204). Specifically, similar to the setting confirmation process (FIG. 155) in the forty-fifth embodiment, the reception state of the signal received from the detection sensor that detects the state of the setting key insertion section 68a corresponds to the ON state. It is determined whether the reception state corresponding to the OFF state has changed from the reception state corresponding to the OFF state. Therefore, not only when the setting key insertion part 68a is maintained in the ON state, but also when the setting confirmation process (FIG. 166) is started in a situation where the setting key insertion part 68a is in the OFF state, the OFF state is Even if it is maintained, a negative determination is made in step SB204. If it is not specified that the setting key insertion section 68a has switched from the ON state to the OFF state (step SB204: NO), the process of step SB204 is repeated.

When it is specified that the setting key insertion section 68a has switched from the ON state to the OFF state (Step SB204: YES), the setting confirmation display flag in the work area 221 for specific control is cleared to "0" (Step SB205). As a result, a negative determination is made in step S9005 of the second timer interrupt process (FIG. 134), resulting in a situation in which the setting process for the fifth display data buffer 275 (step S9006) during setting confirmation is not executed. Therefore, the first to fourth notification display devices 201 to 204 display a display indicating that the current setting values of the pachinko machine 10 are being checked and a display indicating the current setting values of the pachinko machine 10. The current state is canceled.

Then, the interrupt prohibition setting is performed (step SB206). As a result, when the setting confirmation process (FIG. 166) is terminated and the process at the start of the supply of operating power in the main process (FIG. 165) (steps SB101 to SB122) is returned to, the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) are prohibited from interrupting.

Then, a confirmation return command is sent to the audio and light emission control device 81 (step SB207). By receiving the confirmation return command, the audio and light emission control device 81 determines that the main CPU 63 has completed the processing at the start of the supply of operating power (steps SB101 to SB122), and determines that the setting confirmation processing (FIG. 166) was performed in the processing at the start of the current supply of operating power (steps SB101 to SB122). Then, it executes processing corresponding to the reception of the confirmation return command. The content of this processing will be explained later.

As described above, when the power to the pachinko machine 10 is turned on with the setting key insertion section 68a turned on by the setting key without pressing the reset button 68c, the supply of operating power to the main CPU 63 is started and the main process (Fig. 165) is started, but the reset button 68c is not pressed and the setting key insertion section 68a is turned on, and the setting confirmation process (Fig. 166) is executed in a state in which processing is being executed when the supply of operating power begins, which is the state before the processing for progressing the game is executed in the main process (Fig. 165). This makes it possible to check the setting values when no game is being played.

Returning to the explanation of the main process (FIG. 165), if the setting key insertion section 68a has not been turned on using the setting key and the setting confirmation display flag is not set to "1" (steps SB110 and SB111: NO), a normal return command is sent to the audio/light emission control device 81 (step SB113). By receiving the normal return command, the audio/light emission control device 81 determines that the processing at the start of the supply of operating power (steps SB101 to SB122) in the main CPU 63 has ended, and determines that none of the first RAM clear processing (step SB117), the setting confirmation processing (FIG. 166), and the setting value update processing (FIG. 167) has been executed in the processing at the start of the current supply of operating power (steps SB101 to SB122). Then, the process corresponding to the reception of the normal return command is executed. The contents of the process will be explained later.

On the other hand, if it is determined in step SB108 that the reset button 68c has been pressed, and it is determined that the setting key insertion section 68a has been turned on using the setting key (steps SB108 and SB114 :YES), or if it is determined in step SB107 that the setting update display flag is set to "1", a setting value update process is executed (step SB115). Not only when the reset button 68c is pressed as described above and the setting key insertion part 68a is turned on (that is, when a "setting change operation" is performed), but also when the reset button 68c is pressed. The setting value is updated by executing the setting value update process (FIG. 167) even when the setting update display flag is set to "1" regardless of whether there is a pressing operation or an ON operation of the setting key insertion part 68a. If the power outage process is executed in a situation where the process (Figure 167) is being executed, the operation contents when starting the supply of operating power after that are "No operation", "RAM clear operation", and "Setting change". The setting value update process (FIG. 167) is executed regardless of whether it is a ``operation'' or a ``setting confirmation operation.'' This makes it possible to give priority to the execution of the setting value update process (FIG. 167).

Here, we will explain the setting value update process executed in step SB115. Figure 167 is a flowchart showing the setting value update process. Note that the processing of steps SB301 to SB314 in the setting value update process is executed using a program for specific control and data for specific control in the main CPU 63.

First, interrupt permission is set (step SB301). This causes the first timer interrupt process (Fig. 133) to be started at the first interrupt period, and the second timer interrupt process (Fig. 134) to be started at the second interrupt period.

In this embodiment, in the processing at the start of supply of operating power (steps SB101 to SB122), interrupts of the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134) are basically prohibited. , interrupts are permitted in the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167). Therefore, in a situation where the setting confirmation process (Fig. 166) and the setting value update process (Fig. 167) are not executed in the process at the start of supply of operating power (steps SB101 to SB122), the first timer interrupt process (Fig. 133) and the second timer interrupt processing (Fig. 134) are prohibited and the setting confirmation processing (Fig. 166) or setting value update processing (Fig. 167) is executed. ) and second timer interrupt processing (FIG. 134) are permitted. However, when the setting confirmation process (Figure 166) or the setting value update process (Figure 167) is being executed, the startup process flag is set to 1, so the first timer interrupt process (Figure 167) is executed. 133) is started, among the various processes of the first timer interrupt process (Fig. 133), the processes for power outage monitoring, updating of various counters, and fraud monitoring are executed, while the processes for proceeding with the game are executed. The first timer interrupt process (FIG. 133) is ended without any process being executed.

Then, on condition that the setting update display flag provided in the work area 221 for specific control is not set to "1", the setting update display flag is set to "1" (step SB302). By setting the setting update display flag to "1", a positive judgment is made in step S9003 of the second timer interrupt process (FIG. 134), and a setting process (step S9004) is executed for the fifth display data buffer 275 during the setting update. The processing content of the setting process for the fifth display data buffer 275 during the setting update is the same as that of the 45th embodiment. By executing this process, for example, as shown in the explanatory diagram of FIG. 124(a), a display indicating that the setting value of the pachinko machine 10 is being updated and a display of the setting value selected as the update target of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204.

Thereafter, initial settings at the time of starting are performed (step SB303). In the initial setting, the game stop flag provided in the work area 221 for specific control is cleared to "0". If the power outage flag is not set to "1" because the power outage processing was not performed appropriately during the previous power outage (step SB104: NO), the game stop flag is set to the work area 221 for specific control and If the checksums do not match because the storage state of information in at least one of the stack areas 222 for specific control has changed since the last time the power was shut off (step SB105: NO), or the setting reference area 341 This flag is set to "1" in step SB119 of the main process (FIG. 165) when the setting value corresponding to the information stored in is not within the normal range (step SB106: NO). When the game stop flag is set to "1", steps S8901 to S8905 are executed in the first timer interrupt process (FIG. 133), and when an affirmative determination is made in step S8906, steps S8907 to S8905 are executed. Do not execute the process in S8920. As a result, when an information abnormality in the main RAM 65 as described above occurs, processing for monitoring power outages, updating various counters, and monitoring fraud is executed, while processing for advancing the game is executed. It will not be done. By clearing the game stop flag to "0" in the process of step SB303, the state in which the occurrence of information abnormality in the main side RAM 65 is specified is canceled when the setting value update process (FIG. 167) is executed. becomes possible.

Then, "1" is set in the setting update area 342 (see FIG. 154) in the work area 221 for specific control (step SB304). The setting update area 342 is a storage area in which information on the setting value being updated is stored in the setting value update process (FIG. 167) as in the 45th embodiment. When the numerical information of "1" is stored in the setting update area 342, the setting value to be updated (selected or changed) becomes "Setting 1". When the numerical information of "2" is stored in the setting update area 342, the setting value to be updated becomes "Setting 2". When the numerical information of "3" is stored in the setting update area 342, the setting value to be updated becomes "Setting 3". When the numerical information of "4" is stored in the setting update area 342, the setting value to be updated becomes "Setting 4". When the numerical information of "5" is stored in the setting update area 342, the setting value to be updated becomes "Setting 5". When the numerical information of "6" is stored in the setting update area 342, the setting value to be updated becomes "Setting 6".

By setting "1" in the setting update area 342 at step SB304, the setting value to be updated becomes "setting 1." That is, in this embodiment, no matter what the current setting value of the pachinko machine 10 is, when the setting value update process (FIG. 167) is started, the setting value to be updated is "setting 1".

Thereafter, an update start command is sent to the audio emission control device 81 (step SB305). When the audio emission control device 81 receives the update start command, it displays an image indicating that the setting value update process (FIG. 167) is being executed, and an image that makes it possible to recognize the operation details for changing the setting value. , and the display control device 82 is controlled to display an image on the symbol display device 41 so that the operation details for terminating the setting value update process (FIG. 167) can be recognized. This allows the game hall administrator to recognize that the setting value is being changed, and the operation details and setting value update process necessary to change the setting value (Figure 167) It becomes possible for the manager of the game hall to recognize the details of the operation required to end the game. In addition to or instead of the notification being executed by the symbol display device 41, the notification may be executed by at least one of the display light emitting section 53 and the speaker section 54. Further, an external output indicating that the setting value update process (FIG. 167) is being executed may be configured to be sent to a device external to the pachinko machine 10, such as a management computer of a game hall.

Thereafter, it is determined whether the setting value information stored in the setting update area 342 is one of "1" to "6" (step SB306). If it is not one of "1" to "6" (step SB306: NO), "1" is set in the setting update area 342 (step SB307). As a result, the setting value to be updated becomes "Setting 1."

If a positive determination is made in step SB306 or if the processing of step SB307 is executed, it is determined whether the setting key insertion unit 68a has switched from the ON state to the OFF state using the setting key (step SB308). Specifically, it is determined whether the reception state of the signal received from the detection sensor that detects the state of the setting key insertion unit 68a has changed from a reception state corresponding to the ON state to a reception state corresponding to the OFF state. Therefore, a negative determination is made in step SB308 not only when the setting key insertion unit 68a is maintained in the ON state, but also when the setting value update processing is started when the setting key insertion unit 68a is in the OFF state and the OFF state is maintained.

If a negative determination is made in step SB308, the value in the setting update area 342 is incremented by 1 on the condition that the reset button 68c is pressed (step SB309: YES) (step SB310). Thereby, each time the reset button 68c is pressed once, the setting value is updated to one level higher. Further, if the reset button 68c is not pressed (step SB309: NO) or if the value in the setting update area 342 is incremented by 1, the process returns to step SB306, but the settings are updated in step SB306. If it is determined that the value of the setting update area 342 is 7 or more, "1" is set in the setting update area 342 in step SB307. As a result, when the reset button 68c is pressed once in the situation of "Setting 6", the state returns to "Setting 1".

When it is determined that the setting key insertion unit 68a has switched from an ON state to an OFF state (step SB308: YES), the setting value information stored in the setting update area 342 is overwritten in the setting reference area 341 (step SB311). As a result, the setting value information resulting from the update in this setting value update process (FIG. 167) is set in the setting reference area 341, and the setting value corresponding to this set information becomes the current setting value of the pachinko machine 10.

Then, interrupts are disabled (step SB312). As a result, when the setting value update process (FIG. 167) is terminated and the process at the start of the supply of operating power in the main process (FIG. 165) (steps SB101 to SB122) is resumed, interrupts in the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) are disabled.

Thereafter, a second RAM clearing process is executed (step SB313). In the second RAM clearing process, similar to the RAM clearing process (step SA416) in the forty-fifth embodiment, in the work area 221 for specific control, the area ( That is, except for the setting reference area 341), the specific control work area 221 is cleared to "0" and initial settings are executed. As a result, the area indicating whether the win/fail lottery mode is the high probability mode is cleared to "0", so the win/fail lottery is performed regardless of the win/fail lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in a closed state. situation. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted. Further, the setting update display flag and the setting confirmation display flag provided in the work area 221 for specific control are cleared to "0". Further, the setting update area 342 provided in the work area 221 for specific control is cleared to "0". Also, the game stop flag provided in the work area 221 for specific control is cleared to "0". Further, in the second RAM clearing process, the stack area 222 for specific control is cleared to "0" and initial settings are executed. Further, in the second RAM clearing process, initial settings are executed after various registers of the main CPU 63 are also cleared to "0". In this initial setting, processing similar to the internal function register setting processing in step SB102 is executed. Note that for the work area 223 for non-specific control and the stack area 224 for non-specific control, processing for clearing to "0" and processing for initializing are not executed.

Thereafter, a return command at the time of update is transmitted to the audio emission control device 81 (step SB314). By receiving the return command at the time of update, the audio emission control device 81 specifies that the processing for starting the supply of operating power (steps SB101 to SB122) has ended in the main CPU 63, and also specifies that the current operating power supply is completed. It is specified that the setting value update process (FIG. 167) has been executed in the process at the start of supply (steps SB101 to SB122). Then, the process corresponding to the reception of the return command at the time of update is executed. The details of this process will be explained later.

As described above, the setting value update process (Fig. 167) is executed not only by pressing the reset button 68c while turning on the power to the pachinko machine 10, but also by turning on the power to the pachinko machine 10 while turning on the setting key insertion section 68a with the setting key. Also, as already explained, the setting confirmation process (Fig. 166) is executed by turning on the power to the pachinko machine 10 while turning on the setting key insertion section 68a with the setting key without pressing the reset button 68c. This makes it possible to make the ON operation of the setting key insertion section 68a a common operation for executing setting-related processes related to setting values. This makes it possible to make the operation content for generating setting-related processes easy to understand for the manager of the game hall.

In addition, when the power of the pachinko machine 10 is turned on while the setting key insertion section 68a is turned on by the setting key, if the reset button 68c is not pressed, the setting confirmation process (Fig. 166) is executed, and if the reset button 68c is pressed, the setting value update process (Fig. 167) is executed. This makes it possible to differentiate the process to be executed between the setting confirmation process (Fig. 166) and the setting value update process (Fig. 167) depending on whether the reset button 68c is pressed. This makes it possible to make the operation contents for executing the desired process between the setting confirmation process (Fig. 166) and the setting value update process (Fig. 167) easy to understand for the manager of the game hall. In addition, by making the operation contents for executing the setting value update process (Fig. 167) more than the setting confirmation process (Fig. 166), it becomes possible to make it particularly difficult to perform the act of fraudulently executing the setting value update process (Fig. 167).

Returning to the explanation of the main process (Fig. 165), if it is determined in step SB108 that the reset button 68c has been pressed and that the setting key insertion section 68a has not been turned on using the setting key (step SB114: NO), it is determined whether or not the game stop flag in the work area 221 for specific control is set to "1" (step SB116). The game stop flag is a flag that is set to "1" when the power outage flag is not set to "1", when the checksums do not match, or when the setting value is abnormal. When the game stop flag is set to "1", the processes of steps S8901 to S8905 are executed in the first timer interrupt process (Fig. 133), while the processes of steps S8907 to S8920 are not executed by making a positive determination in step S8906. As a result, if the power outage flag is not set to "1" because power outage processing was not performed properly the previous time the power was cut off, if the checksums do not match because the information storage state has changed since the previous power outage in at least one of the work area 221 for specific control and the stack area 222 for specific control, or if the setting value is abnormal, processing for power outage monitoring, updating of various counters, and fraud monitoring will be executed, but processing for progressing the game will not be executed.

If the game stop flag is not set to "1" (step SB116: NO), the first RAM clear process is executed (step SB117). In the first RAM clear process, similar to the RAM clear process (step SA416) in the 45th embodiment, the specific control work area 221 is cleared to "0" and the initial setting is executed, except for the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the specific control work area 221 (i.e., the setting reference area 341). As a result, the area indicating whether the winning/losing lottery mode is the high probability mode or not is cleared to "0", so that the winning/losing lottery mode becomes the low probability mode regardless of the winning/losing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. In addition, the game round is not being executed, and the open/close execution mode is not being executed, and further, the normal map display unit 38a is not displayed in a variable manner and the normal power role 34a is in a closed state. In addition, the reserved storage area 65a and the normal power reserved area 65c provided in the work area 221 for specific control are also cleared to "0", so that the reserved information for the special map display unit 37a is erased and the reserved information for the normal map display unit 38a is erased. In addition, the setting update display flag and the setting confirmation display flag provided in the work area 221 for specific control are cleared to "0". In addition, the setting update area 342 provided in the work area 221 for specific control is cleared to "0". In the first RAM clear process, the stack area 222 for specific control is cleared to "0" and the initial setting is performed. In the first RAM clear process, various registers of the main CPU 63 are also cleared to "0" and then the initial setting is performed. In this initial setting, the same process as the internal function register setting process of step SB102 is performed.

The process for clearing to "0" and the process for initializing the work area 223 for non-specific control and the stack area 224 for non-specific control are not executed. The process content of the first RAM clear process (step SB117) is the same as the process content of the second RAM clear process (step SB313) in the setting value update process (FIG. 167), but some of the process content may be different. For example, the area that is the subject of the "0" clear and initial setting in the first RAM clear process (step SB117) may not be the subject of the "0" clear and initial setting in the second RAM clear process (step SB313), and the area that is the subject of the "0" clear and initial setting in the second RAM clear process (step SB313) may not be the subject of the "0" clear and initial setting in the first RAM clear process (step SB117).

Thereafter, a return command upon clearing is transmitted to the audio emission control device 81 (step SB118). By receiving the return command at the time of clearing, the audio emission control device 81 specifies that the process for starting the supply of operating power (steps SB101 to SB122) has ended in the main CPU 63, and also specifies that the current operating power supply is completed. It is specified that the first RAM clearing process (step SB117) has been executed in the process at the start of supply (steps SB101 to SB122). Then, the processing corresponding to the reception of the return command at the time of clearing is executed. The details of this process will be explained later.

If a negative determination is made in any of steps SB104 to SB106 in the main process (FIG. 165), that is, if the power outage flag is not set to "1", if the checksums do not match, or if the set value is abnormal If so, the game stop flag in the specific control work area 221 is set to "1" (step SB119). As already explained, when the game stop flag is set to "1", steps S8901 to S8905 are executed in the first timer interrupt process (FIG. 133), and an affirmative determination is made in step S8906. The processes from step S8907 to step S8920 are not executed. As a result, if the power outage flag is not set to "1" because the power outage processing was not performed properly during the previous power shutdown, the work area 221 for specific control and the stack area 222 for specific control If the checksums do not match due to changes in the storage state of information on at least one side since the last power cut, or if the set values are abnormal, power outage monitoring, updating of various counters, and unauthorized While the process for monitoring is executed, the process for advancing the game is not executed.

Then, it is determined whether the reset button 68c is pressed (step SB120). If the reset button 68c is not pressed (step SB120: NO), an abnormality command indicating that an abnormality occurred in the power failure flag, checksum, or setting value at the start of the supply of operating power is sent to the sound and light emission control device 81 (step SB121). By receiving the abnormality command, the sound and light emission control device 81 causes the display light-emitting unit 53 to emit light in a manner corresponding to the information abnormality at the start of the supply of operating power, and outputs a voice saying "Please change the settings" from the speaker unit 54. In addition, a text image saying "Please change the settings" is displayed on the pattern display device 41. These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, even if the supply of operating power to the pachinko machine 10 is temporarily stopped, the above notification will be restarted when the supply of operating power to the pachinko machine 10 is resumed until the setting value update process (Figure 167) is executed.

Thereafter, external output processing in the event of an abnormality is executed (step SB122). In the external output process at the time of an abnormality, a process for externally outputting an abnormal signal to the management computer of the gaming hall is executed. In this case, the abnormal signal is output for a predetermined period (for example, 100 milliseconds). However, this is not limited to this, and in a situation where the game stop flag is set to "1", the abnormal signal will continue to be output, and when the game stop flag is cleared to "0", the abnormal signal will be output. A configuration may also be adopted in which the signal output is stopped. Further, the abnormality signal can be outputted even when an abnormality different from the abnormality related to the power outage flag, checksum, and set value occurs. For example, an abnormal signal may also be generated when it is identified that fraud has occurred in the monitored object (detection of unauthorized radio waves or detection of unauthorized magnetism) in the fraud detection processing (step S8905) of the first timer interrupt processing (FIG. 133). It is output externally. However, the configuration is not limited to this configuration in which the abnormal signal is also used, and a configuration in which a dedicated abnormal signal is output externally for abnormalities related to the power failure flag, checksum, or set value may also be used. It is also possible to have a configuration in which abnormality signals corresponding to each of the abnormality related to the above, the abnormality related to the checksum, and the abnormality related to the set value are outputted to the outside.

If the reset button 68c is pressed (step SB120: YES), it is determined whether the setting key insertion section 68a is turned on using a setting key (step SB114). When the reset button 68c is pressed and the setting key insertion section 68a is turned on using a setting key (step SB114 and step SB120: YES), a setting value update process is executed (step SB115). The contents of the setting value update process have already been described. In other words, if operating power is supplied to the main CPU 63 while a "setting change operation" is being performed, an abnormality has occurred in the main RAM 65, so a negative result is determined in any of steps SB104 to SB106. Even if a determination is made, the setting value update process (FIG. 167) is executed. This makes it possible to prioritize changes to set values. Further, in the setting value update process (FIG. 167), as already explained, the initial setting at the start is executed in step SB303, and the game stop flag is cleared to "0". As a result, when the setting value update process (FIG. 167) is executed, it is possible to eliminate the abnormal state in the main RAM 65 after the setting value update is completed.

On the other hand, if the reset button 68c is pressed but the setting key insertion section 68a is not turned on (step SB120: YES, step SB114: NO), the game stop flag in the work area 221 for specific control is set to "1". ” is set (step SB116). In the process of step SB116 after the game stop flag is set to "1" at step SB119, since the game stop flag is naturally set to "1", an affirmative determination is made at step SB116. In this case, an abnormality command is transmitted to the audio emission control device 81 in step SB121, and an abnormality signal is externally outputted in step SB122.

In other words, if an abnormality regarding the power outage flag, checksum, and set value occurs and a negative determination is made in any of steps SB104 to SB106, the operation to the main CPU 63 is Even if power supply is started, the first RAM clearing process (step SB117) is not executed. In addition, when the supply of operating power to the main CPU 63 is started in a situation where the game stop flag is set to "1" and a "RAM clear operation" is being performed, the first RAM clear process is performed. (Step SB117) is not executed. This prevents the game stop flag from being set to "1" even if the supply of operating power to the main CPU 63 is started while the "RAM clear operation" is being performed. It becomes possible. On the other hand, if a "setting change operation" is being performed, the setting value update process (Fig. 167) is executed regardless of whether the game stop flag is set to "1" and the setting The game stop flag is cleared to "0" in the initial setting (step SB303) at the start of the value update process (FIG. 167). As a result, in order to eliminate the state in which the game stop flag is set to "1", it becomes necessary to execute the setting value update process (FIG. 167). Therefore, when an information abnormality occurs in the work area 221 for specific control, it is possible to not only perform processing to initialize the work area 221 for specific control, but also to reset the setting values. .

In addition, when the supply of operating power to the main CPU 63 is started in a situation where the game stop flag is set to "1", if the "setting change operation" is not performed, that is, if there is no operation, or if the "RAM clear operation" or the "setting confirmation operation" is performed, a positive judgment is made in step SB109 or step SB116, and an abnormality command is sent in step SB121 and an external output process in the event of an abnormality is executed in step SB122. As a result, when the game stop flag is set to "1", an abnormality notification in the pachinko machine 10 and an external output in the event of an abnormality to the outside of the pachinko machine 10 are executed every time the supply of operating power to the main CPU 63 is started, regardless of the processing results of steps SB104 to SB106 in the subsequent main processing, unless the setting value update process (FIG. 167) is executed. This makes it possible to make the manager of the game hall aware that the setting value should be changed.

When the process of step SB112, step SB113, step SB115, step SB118, or step SB122 is performed, information corresponding to the initial check period (specifically, 5 seconds) is set in a checking counter provided in the work area 221 for specific control (step SB123). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is started, as in the 35th embodiment. When a value of 1 or more is set in the checking counter, the first to fourth notification display devices 201 to 204 continue to display the check, as in the 35th embodiment.

According to the above configuration, when the supply of operating power to the main CPU 63 is started, the remaining processing is performed after the main CPU 63 completes the processing at the time of starting the supply of operating power (steps SB101 to SB122). Before (steps SB125 to SB128) are started, an initial check period is started. As a result, there is no need to control the initial check period in a situation where processing at the start of supply of operating power is being executed, reducing the processing load in a situation where processing at the start of supply of operating power is being executed. becomes possible.

In addition, the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167) are executed as processes at the start of the supply of operating power (steps SB101 to SB122), whereas the initial check period starts after the processes at the start of the supply of operating power are completed. This makes it possible to ensure that even if a check display is performed on the first to fourth notification display devices 201 to 204 during the initial check period, this does not affect the display of the setting values using the first to fourth notification display devices 201 to 204.

Then, the start-up processing in progress flag in the work area 221 for specific control is cleared to "0" (step SB124). By clearing the start-up processing in progress flag to "0", if the first timer interrupt processing (FIG. 133) is started, a negative judgment is made in step S8906, and not only the processing of steps S8901 to S8905 but also the processing of steps S8907 to S8920 is executed, and the state in which processing for progressing the game is not executed is released. Note that in step SB124, the power outage flag in the work area 221 for specific control is also cleared to "0".

Then, the process proceeds to the remaining process of steps SB125 to SB128. In other words, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134), but there is a remaining time between one timer interrupt process and the next timer interrupt process. This remaining time varies depending on the completion time of each timer interrupt process, but this irregular time is used to repeatedly execute the remaining process of steps SB125 to SB128. In this respect, the remaining process of steps SB125 to SB128 can be said to be non-periodic process that is executed non-periodically. In steps SB125 to SB128, the same process is executed as steps S113 to S116 of the main process (FIG. 9) in the first embodiment.

Next, in a situation where the process at the start of supply of operating power (steps SB101 to SB122) is being executed, the interrupts of the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) are permitted. The situation will be explained with reference to the time chart of FIG. 168. FIG. 168(a) shows a period in which the power of the pachinko machine 10 is in the ON state, and FIG. 168(b) shows a period in which the process at the start of supply of operating power (steps SB101 to SB122) is executed. 168(c) shows a period in which the start-up processing flag in the work area 221 for specific control is set to "1", and FIG. 168(d) shows a period during which the remaining processing (steps SB125 to SB128) is completed. FIG. 168(e) shows the period in which interrupts are being executed, and FIG. 168(f) shows the period in which the first timer interrupt process (FIG. 133) or the second timer interrupt process (FIG. 134) is being executed. FIG. 168(g) shows the period during which the setting value update process (FIG. 167) is being executed, and FIG. 168(h) shows the period during which the setting confirmation process (FIG. 166) is being executed. Indicates the period.

First, a case will be described in which both the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167) are not executed in the process at the start of supply of operating power (steps SB101 to SB122).

At timing t1, the power of the pachinko machine 10 is turned on as shown in FIG. 168(a). In this case, the pachinko machine 10 is powered on in a "no operation" situation in which none of the "RAM clear operation," "setting change operation," and "setting confirmation operation" are performed. At the timing of t1, as shown in FIG. 168(b), the main CPU 63 starts the process for starting the supply of operating power (steps SB101 to SB122). Further, as shown in FIG. 168(c), the start-up processing flag in the specific control work area 221 is set to "1".

Thereafter, at timing t2, the processing at the start of the supply of operating power (steps SB101 to SB122) is completed as shown in FIG. 168(b), and the remaining processing (step SB125) is completed as shown in FIG. 168(d). ~Step SB128) is started. Furthermore, at the timing t2, the start-up processing flag in the specific control work area 221 is cleared to "0" as shown in FIG. 168(c). Note that at the timing when the remaining processing (steps SB125 to SB128) is started, interrupts are not permitted as shown in FIG. 168(e).

Thereafter, at timing t3, the remaining processing (steps SB125 to SB128) is completed as shown in FIG. 168(d), and interrupts are permitted as shown in FIG. 168(e). As a result, timer interrupt processing is started as shown in FIG. 168(f). In this case, the second timer interrupt process (FIG. 134) is executed first, and when the second timer interrupt process (FIG. 134) ends, the first timer interrupt process (FIG. 133) is executed. However, this is not limited to this, and if the first timer interrupt process (Figure 133) is executed first and the first timer interrupt process (Figure 133) ends, the second timer interrupt process (Figure 134) is executed. It may also be configured to be executed.

Next, we will explain the case where the setting value update process (Figure 167) is executed during the process at the start of the supply of operating power (steps SB101 to SB122).

At timing t4, the pachinko machine 10 is powered on as shown in FIG. 168(a). In this case, the pachinko machine 10 is powered on while the "setting change operation" is being performed. At the timing t4, as shown in FIG. 168(b), the main CPU 63 starts the process for starting the supply of operating power (steps SB101 to SB122). Further, as shown in FIG. 168(c), the start-up processing flag in the specific control work area 221 is set to "1".

Thereafter, at timing t5, the setting value update process (FIG. 167) is started as shown in FIG. 168(g). In this case, an interrupt is permitted at the timing t5 as shown in FIG. 168(e). By allowing the interrupt, timer interrupt processing is started at timing t6 as shown in FIG. 168(f). In this case, the second timer interrupt process (FIG. 134) is executed first, and when the second timer interrupt process (FIG. 134) ends, the first timer interrupt process (FIG. 133) is executed. However, this is not limited to this, and if the first timer interrupt process (Figure 133) is executed first and the first timer interrupt process (Figure 133) ends, the second timer interrupt process (Figure 134) is executed. It may also be configured to be executed. Furthermore, even if the first timer interrupt processing (Fig. 133) is executed, the start-up processing flag is set to "1" as shown in Fig. 168(c), so power failure monitoring, updating of various counters, etc. While the process for monitoring fraud is executed, the process for advancing the game is not executed.

The timer interrupt process ends at timing t7 as shown in FIG. 168(f), and then the setting value update process (FIG. 167) ends at timing t8 as shown in FIG. 168(g). Then, at timing t8, the process at the start of the supply of operating power (steps SB101 to SB122) ends as shown in FIG. 168(b), and the start-up process in progress flag is cleared to "0" as shown in FIG. 168(c). Also, at timing t8, the remaining process (steps SB125 to SB128) starts as shown in FIG. 168(d).

Next, we will explain the case where the setting confirmation process (Figure 166) is executed during the process at the start of the supply of operating power (steps SB101 to SB122).

At timing t9, the power to the pachinko machine 10 is turned ON as shown in FIG. 168(a). In this case, the power to the pachinko machine 10 is turned ON when the "setting confirmation operation" has been performed. At timing t9, the main CPU 63 starts processing (steps SB101 to SB122) when the supply of operating power begins as shown in FIG. 168(b). Also, as shown in FIG. 168(c), the start-up processing in progress flag in the work area 221 for specific control is set to "1".

After that, at the timing of t10, the setting confirmation process (FIG. 166) is started as shown in FIG. 168(h). In this case, an interrupt is permitted at the timing of t10 as shown in FIG. 168(e). By permitting the interrupt, the timer interrupt process is started at the timing of t11 as shown in FIG. 168(f). In this case, the second timer interrupt process (FIG. 134) is executed first, and when the second timer interrupt process (FIG. 134) is terminated, the first timer interrupt process (FIG. 133) is executed. However, this is not limited to this, and the first timer interrupt process (FIG. 133) may be executed first, and when the first timer interrupt process (FIG. 133) is terminated, the second timer interrupt process (FIG. 134) may be executed. In addition, even if the first timer interrupt process (FIG. 133) is executed, the start-up process flag is set to "1" as shown in FIG. 168(c), so that the processes for power outage monitoring, updating of various counters, and fraud monitoring are executed, but the processes for progressing the game are not executed.

The timer interrupt process ends at timing t12 as shown in FIG. 168(f), and then the setting confirmation process (FIG. 166) ends at timing t13 as shown in FIG. 168(h). Then, at the timing t13, as shown in FIG. 168(b), the processing at the start of the supply of operating power (steps SB101 to SB122) is completed, and as shown in FIG. 168(c), the start-up processing flag is set. Cleared to "0". Further, at the timing of t13, the remaining processing (steps SB125 to SB128) is started as shown in FIG. 168(d).

As mentioned above, in the situation where the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167) are not executed in the process at the start of the supply of operating power (steps SB101 to SB122), the first timer interrupt process ( 133) and the second timer interrupt processing (Fig. 134) are prohibited and the setting confirmation processing (Fig. 166) or setting value update processing (Fig. 167) is being executed. 133) and the second timer interrupt process (FIG. 134) are permitted to be executed. If the settings confirmation process (FIG. 166) and setting value update process (FIG. 167) are not executed, the timer interrupt process is prevented from interrupting and starting during the process when starting the supply of operating power (steps SB101 to SB122). By doing so, it becomes possible to quickly complete the process at the start of supply of operating power (steps SB101 to SB122).

On the other hand, when the setting confirmation process (Figure 166) and the setting value update process (Figure 167) are executed, the process is executed according to the operation of the amusement hall manager, so the period spent on these processes is long. In this case, if the timer interrupt process remains prohibited even when the setting confirmation process (Figure 166) and the setting value update process (Figure 167) are being executed, the timing at which the timer interrupt process starts to be executed will be extremely delayed. In contrast, when the setting confirmation process (Figure 166) or the setting value update process (Figure 167) is executed, the timer interrupt process is permitted to be interrupted. This makes it possible to prevent the timing at which the timer interrupt process starts to be executed from being extremely delayed. In addition, while the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167) are being executed, the second timer interrupt process (FIG. 134), which executes a process for controlling the display of the first to fourth notification display devices 201 to 204, is executed as an interrupt, making it possible to display information related to the setting values on the first to fourth notification display devices 201 to 204 using the second timer interrupt process (FIG. 134).

Furthermore, in a situation where the setting confirmation process (FIG. 166) or the setting value update process (FIG. 167) is being executed, the start-up process flag is set to "1". Therefore, even if the first timer interrupt process (Fig. 133) is started while the setting confirmation process (Fig. 166) or the setting value update process (Fig. 167) is being executed, the first timer interrupt process (Fig. Among the various processes in 133), the processes for monitoring power outages, updating various counters, and monitoring fraud are executed, while the processes for advancing the game can be prevented from being executed.

Next, the progress of processing when an abnormality regarding the power outage flag, checksum, or set value occurs will be described with reference to the time chart of FIG. 169. FIG. 169(a) shows the period when the power of the pachinko machine 10 is in the ON state, and FIG. 169(b) shows the period during which the process at the start of supply of operating power (steps SB101 to SB122) is executed. 169(c) shows the period in which the remaining processing (steps SB125 to SB128) is being executed, and FIG. 169(d) shows the period during which the remaining processing (steps SB125 to SB128) is being executed, and FIG. ) is being executed, FIG. 169(e) shows a period when the game stop flag in the work area 221 for specific control is set to "1", and FIG. 169(f) shows the period when the abnormal signal is externally executed. The output period is shown, and FIG. 169(g) shows the period during which the setting value update process (FIG. 167) is being executed.

At timing t1, the power to the pachinko machine 10 is turned ON as shown in FIG. 169(a). In this case, the power to the pachinko machine 10 is turned ON in a "no operation" situation in which none of the "RAM clear operation," "setting change operation," or "setting confirmation operation" is performed. At timing t1, the main CPU 63 starts processing (steps SB101 to SB122) when the supply of operating power begins as shown in FIG. 168(b).

Thereafter, at timing t2, the occurrence of an abnormality regarding any of the power outage flag, checksum, and set value is identified, and as shown in FIG. 169(e), the game stop flag in the work area 221 for specific control is 1" is set. Further, at the timing t2, external output of the abnormal signal is started as shown in FIG. 169(f). This makes it possible for the management computer of the game hall to specify that an abnormality has occurred in the pachinko machine 10 regarding any of the power outage flag, checksum, and set value.

Thereafter, at timing t3, as shown in FIG. 169(b), the processing at the start of the supply of operating power (step SB101 to step SB122) is completed, and the remaining processing (step SB125 to step SB122) is completed as shown in FIG. 169(c). SB128) is started. Further, at timing t4, the external output of the abnormal signal is terminated as shown in FIG. 169(f). By continuing to output the abnormality signal externally for a predetermined period (for example, 100 milliseconds) from timing t2 to timing t4, an abnormality regarding any of the power outage flag, checksum, and set value occurs in the pachinko machine 10. It becomes possible to accurately identify what has happened in the gaming hall management computer. Further, since the period during which the external output of the abnormal signal is continued is a constant predetermined period, it is possible to simplify the processing configuration for externally outputting the abnormal signal. In addition to external output of the abnormality signal, abnormality notification in the symbol display device 41, display light emitting section 53, and speaker section 54 is also executed.

Thereafter, the remaining processing (steps SB125 to SB128) ends at timing t5 as shown in FIG. 169(c). Then, timer interrupt processing is executed as shown in FIG. 169(d) from timing t5 to timing t6, and residual processing ( Steps SB125 to SB128) are executed, and timer interrupt processing is executed from timing t7 to timing t8 as shown in FIG. 169(d). However, as shown in FIG. 169(e), the game stop flag is set to "1", so even if the first timer interrupt process (FIG. 133) is executed, power failure monitoring, updating of various counters, and fraud will occur. Although processing for monitoring is executed, processing for advancing the game is not executed. At timing t8, a power outage process is executed in the first timer interrupt process (FIG. 133), and the power of the pachinko machine 10 is turned off as shown in FIG. 169(a).

Thereafter, at timing t9, the power of the pachinko machine 10 is turned on again as shown in FIG. 169(a), and as shown in FIG. ) is started. In this case, as shown in FIG. 169(e), the game stop flag in the work area 221 for specific control is set to "1". Therefore, as shown in FIG. 169(f), an abnormal signal is output to the outside from timing t10 to timing t12. This makes it possible to once again make the gaming hall management computer recognize that an abnormality has occurred in the pachinko machine 10 regarding any of the power outage flag, checksum, and set value. In addition to external output of the abnormality signal, abnormality notification in the symbol display device 41, display light emitting section 53, and speaker section 54 is also executed.

As shown in FIG. 169(b), the process at the start of the supply of operating power (steps SB101 to SB122) ends at the timing of t11, and the remaining process (steps SB125 to SB128) is executed from the timing of t11 to the timing of t13 as shown in FIG. 169(c). Then, as shown in FIG. 169(d), the timer interrupt process is executed at the timing of t13. However, since the game stop flag is set to "1" as shown in FIG. 169(e), even if the first timer interrupt process (FIG. 133) is executed, the process for power outage monitoring, updating of various counters, and fraud monitoring is executed, but the process for progressing the game is not executed. At the timing of t14, the power outage process is executed in the first timer interrupt process (FIG. 133), and the power of the pachinko machine 10 is turned off as shown in FIG. 169(a).

After that, at the timing of t15, the power supply of the pachinko machine 10 is turned on again as shown in FIG. 169(a), and the process at the start of the supply of operating power (steps SB101 to SB122) is started as shown in FIG. 169(b). Then, the set value update process (FIG. 167) is executed from the timing of t16 to the timing of t17 as shown in FIG. 169(g). By executing the set value update process (FIG. 167), not only the set value is changed, but also the game stop flag in the work area 221 for specific control is cleared to "0" as shown in FIG. 169(e). This resolves the state in which the execution of the process for progressing the game is prevented due to the occurrence of an information anomaly in the work area 221 for specific control. After that, the remaining process (steps SB125 to SB128) is executed from the timing of t17 to the timing of t18 as shown in FIG. 169(c), and the timer interrupt process is started at the timing of t18 as shown in FIG. 169(d).

As mentioned above, if an abnormality regarding the power outage flag, checksum, and setting value occurs and a negative determination is made in any of steps SB104 to SB106 in the main process (FIG. 165), the game in the work area 221 for specific control By setting the stop flag to "1", a situation arises in which processing for advancing the game is not executed. This makes it possible to prevent a game from being played even though an information abnormality has occurred in the work area 221 for specific control.

Further, the state in which the game stop flag is set to "1" will not be resolved unless the setting value update process (FIG. 167) is executed. As a result, in order to eliminate the state in which the game stop flag is set to "1", it becomes necessary to execute the setting value update process (Fig. 167), and an information error occurs in the work area 221 for specific control. In this case, it becomes possible to require not only the processing for initializing the work area 221 for the specific control but also the resetting of the setting values.

Next, the display contents of the first to fourth notification display devices 201 to 204 when the supply of operating power to the main CPU 63 is started will be described with reference to the time chart in Figure 170. Figure 170(a) shows the period during which the processing at the start of the supply of operating power (steps SB101 to SB122) is being executed, Figure 170(b) shows the period during which the processing after the processing at the start of the supply of operating power (steps SB101 to SB122) is completed is executed, Figure 170(c) shows the initial check period, Figure 170(d) shows the period during which the setting value update processing (Figure 167) is being executed, and Figure 170(e) shows the situation in which the setting values of the pachinko machine 10 are being updated. FIG. 170(f) shows a period during which the setting confirmation process (FIG. 166) is being executed, and FIG. 170(g) shows a setting confirmation display period during which the first to fourth notification display devices 201 to 204 display a display indicating that the setting values of the pachinko machine 10 are being confirmed and a display indicating the current setting values of the pachinko machine 10.

First, a case will be described in which both the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167) are not executed in the process at the start of supply of operating power (steps SB101 to SB122).

As shown in FIG. 170(a), the processing at the start of supply of operating power (steps SB101 to SB122) is executed from timing t1 to timing t2. Then, at timing t2, as shown in FIG. 170(b), the process after the process at the start of supply of operating power (steps SB101 to SB122) is started. In this case, the initial check period is started by executing the checking counter setting process at step SB122 in the main process (FIG. 165) at the timing t2. As a result, the check display starts on the first to fourth notification display devices 201 to 204 (see FIG. 128(b)). Since the process for advancing the game is executed even during the initial check period, the game can be played in a situation where the check display is being performed on the first to fourth notification display devices 201 to 204. . Thereafter, the initial check period ends at timing t3 as shown in FIG. 170(c). As a result, the first to fourth notification display devices 201 to 204 start displaying the base value.

Next, a case will be described in which the setting value update process (FIG. 167) is executed in the process at the start of supply of operating power (steps SB101 to SB122).

At timing t4, as shown in FIG. 170(a), processing at the start of the supply of operating power (steps SB101 to SB122) begins. Then, from timing t5 to timing t6, as shown in FIG. 170(d), setting value update processing (FIG. 167) is executed. In this case, as shown in FIG. 170(e), the setting update display period lasts from timing t5 to timing t6.

After that, at the timing of t6, as shown in FIG. 170(b), the processing after the processing at the start of the supply of operating power (steps SB101 to SB122) is completed is started. In this case, at the timing of t6, the initial check period is started by executing the setting processing of the checking counter in step SB122 in the main processing (FIG. 165). As a result, the first to fourth notification display devices 201 to 204 start displaying the check (see FIG. 128(b)). Even during the initial check period, the processing for progressing the game is executed, so the game can be played in a situation where the first to fourth notification display devices 201 to 204 are displaying the check. After that, at the timing of t7, as shown in FIG. 170(c), the initial check period ends. As a result, the first to fourth notification display devices 201 to 204 start displaying the base value.

Next, a case will be described in which the setting confirmation process (FIG. 166) is executed in the process at the start of supply of operating power (steps SB101 to SB122).

At timing t8, as shown in FIG. 170(a), processing at the start of the supply of operating power (steps SB101 to SB122) begins. Then, from timing t9 to timing t10, as shown in FIG. 170(f), processing for setting confirmation (FIG. 166) is executed. In this case, as shown in FIG. 170(g), the display period for setting confirmation is from timing t9 to timing t10.

After that, at the timing of t10, as shown in FIG. 170(b), the processing after the processing at the start of the supply of operating power (steps SB101 to SB122) is completed is started. In this case, at the timing of t10, the initial check period is started by executing the setting processing of the checking counter in step SB122 in the main processing (FIG. 165). As a result, the first to fourth notification display devices 201 to 204 start displaying the check (see FIG. 128(b)). Even during the initial check period, the processing for progressing the game is executed, so the game can be played in a situation where the first to fourth notification display devices 201 to 204 are displaying the check. After that, at the timing of t11, as shown in FIG. 170(c), the initial check period ends. As a result, the first to fourth notification display devices 201 to 204 start displaying the base value.

According to the above configuration, when the supply of operating power to the main CPU 63 is started, the initial check period is started after the processing at the start of the supply of operating power (steps SB101 to SB122) is completed in the main CPU 63 and before the remaining processing (steps SB125 to SB128) is started. This makes it unnecessary to control the initial check period when the processing at the start of the supply of operating power is being executed, thereby making it possible to reduce the processing load when the processing at the start of the supply of operating power is being executed.

In addition, the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167) are executed as processes at the start of the supply of operating power (steps SB101 to SB122), whereas the initial check period starts after the processes at the start of the supply of operating power are completed. This makes it possible to ensure that even if a check display is performed on the first to fourth notification display devices 201 to 204 during the initial check period, this does not affect the display of the setting values using the first to fourth notification display devices 201 to 204.

Next, in the case where power failure processing is executed while the setting value update processing (Fig. 167) or the setting confirmation processing (Fig. 166) is being executed, the contents of the processing executed in the main processing (Fig. 165) when the supply of operating power is resumed thereafter will be explained with reference to the explanatory diagram in Fig. 171.

If the power outage process is executed in a situation where neither the setting value update process (Figure 167) nor the setting confirmation process (Figure 166) is executed, the main process (Figure 165) is executed when the supply of operating power is resumed. ) will first be explained.

When the supply of operating power is resumed in the "no operation" situation, the main processing (Fig. 165) includes first RAM clear processing (step SB117), setting value update processing (Fig. 167), and setting confirmation processing (Fig. 166). ) are not executed. Furthermore, when the supply of operating power is resumed in a situation where a "RAM clear operation" has been performed, the first RAM clear process (step SB117) is executed in the main process (FIG. 165), while the setting value update process ( FIG. 167) and setting confirmation processing (FIG. 166) are not executed. When the supply of operating power is resumed in a situation where the "setting change operation" has been performed, the main process (FIG. 165) executes the setting value update process (FIG. 167), and the first RAM clear process (step SB117) is executed. ) and setting confirmation processing (FIG. 166) are not executed. When the supply of operating power is resumed in a situation where the "setting confirmation operation" has been performed, the main processing (FIG. 165) executes the setting confirmation processing (FIG. 166), and the first RAM clearing processing (step SB117) is executed. ) and setting value update processing (FIG. 167) are not executed.

Next, we will explain the contents of the processing that is executed in the main processing (Fig. 165) when the supply of operating power is resumed if power outage processing is executed while the setting value update processing (Fig. 167) is being executed (i.e., the setting update display flag is set to "1")

In all cases where the supply of operating power is resumed when "no operation" has been performed, when the supply of operating power is resumed when "RAM clear operation" has been performed, when "setting change operation" has been performed, or when "setting confirmation operation" has been performed, the main processing (Fig. 165) executes the setting value update processing (Fig. 167), but does not execute the setting confirmation processing (Fig. 166). In other words, if the power outage processing is executed when the setting value update processing (Fig. 167) is being executed, the setting value update processing (Fig. 167) will be newly started regardless of the operation content when the supply of operating power is subsequently resumed.

With the above configuration, if the supply of operating power is stopped during the setting value update process (Fig. 167), when the supply of operating power is resumed, the setting value update process (Fig. 167) can be started anew regardless of the operation content of the setting key insertion section 68a and the reset button 68c when the pachinko machine 10 is powered on. This makes it possible to reliably create an opportunity to complete the update of the setting values. Therefore, it becomes possible to prevent gameplay from starting before the update of the setting values is completed.

In addition, if the supply of operating power is stopped during the setting value update process (Fig. 167), the setting value update process (Fig. 167) is executed uniquely regardless of the operation content when the supply of operating power is resumed. This makes it possible to achieve the above-mentioned excellent effects while simplifying the processing configuration compared to a configuration in which the processing content to be executed is changed depending on the operation content.

Next, we will explain the contents of the processing executed in the main processing (Fig. 165) when the supply of operating power is resumed if power outage processing is executed while the setting confirmation processing (Fig. 166) is being executed (i.e., the setting confirmation display flag is set to "1")

If the supply of operating power is resumed when a "RAM clear operation" has been performed, the first RAM clear process (step SB117) is executed in the main process (Fig. 165), but the setting value update process (Fig. 167) and the setting confirmation process (Fig. 166) are not executed. In other words, even if the power outage process is executed when the setting confirmation process (Fig. 166) is executed, if a "RAM clear operation" is performed when the supply of operating power is resumed, the first RAM clear process (step SB117) is executed without newly executing the setting confirmation process (Fig. 166). This makes it possible to prioritize the execution of the first RAM clear process (step SB117) over the "RAM clear operation". Note that the setting confirmation display flag is cleared to "0" when the first RAM clear process (step SB117) is executed.

When the supply of operating power is resumed in a situation where a "setting change operation" has been performed, the main process (Figure 165) executes the setting value update process (Figure 167), while the setting confirmation process (Figure 166) is not executed. In other words, even if the power outage process is executed in a situation where the settings confirmation process (Figure 166) is being executed, if a "settings change operation" is performed when the supply of operating power is resumed, the settings will be confirmed. The setting value update process (FIG. 167) is executed without newly executing the process (FIG. 166). This makes it possible to give priority to the execution of the setting value update process (FIG. 167) for the "setting change operation". Furthermore, even if the setting confirmation process (FIG. 166) is not executed, the setting value to be updated is displayed on the fourth notification display device 204 by executing the setting value update process (FIG. 167). At the same time, upon completion of the setting value update process (FIG. 167), information on the setting values that are subject to update at that time is set in the setting reference area 341. You can check 10 setting values. Note that the setting confirmation display flag is cleared to "0" by executing the second RAM clearing process (step SB313) in the setting value updating process (FIG. 167).

If the supply of operating power is resumed in a situation where the "setting confirmation operation" has been performed, the main process (Figure 165) will perform the setting confirmation operation on the condition that no abnormality has occurred regarding the power outage flag, checksum, and setting value. Execute the process (FIG. 166). As a result, even if the power outage process is executed during the setting confirmation process (Figure 166), it is possible to resume checking the setting values by performing the "setting confirmation operation" when the supply of operating power is resumed. becomes.

When the supply of operating power is resumed in a "no operation" state, the main processing (Fig. 165) executes the setting confirmation processing (Fig. 166) even if the setting key insertion section 68a is not turned ON, provided that no abnormalities have occurred with the power outage flag, checksum, or setting value. This makes it possible to resume checking the setting value even if the power outage processing is executed during the setting confirmation processing (Fig. 166) and the supply of operating power is subsequently resumed in a "no operation" state.

Next, the processing executed by the audio emission control device 81 will be explained. Prior to explaining the processing, the electrical configuration of the audio emission control device 81 will be explained with reference to the explanatory diagram of FIG. 172.

The audio emission control device 81 includes an audio emission control board 351. A sound and light side MPU 352 is mounted on the sound and light emission control board 351 . The sound and light side MPU 352 includes a sound and light side ROM 354 and a sound and light side RAM 355 in addition to a sound and light side CPU 353 which is an arithmetic processing unit including a control section and a calculation section. In addition to the above-described elements, the audio-optical side MPU 352 includes an interrupt circuit, a timer circuit, a data input/output circuit, various counter circuits as a random number generator, and the like.

The sound/light side ROM 354 is a memory (i.e., a non-volatile storage means) that does not require an external power supply to retain memory, such as a NOR type flash memory or a NAND type flash memory, and is used for read-only purposes. The sound/light side ROM 354 stores various control programs and fixed value data executed by the sound/light side CPU 353.

The audio-optical RAM 355 is a memory such as SRAM and DRAM (ie, volatile storage means) that requires an external power supply to maintain memory, and is used for both reading and writing. The audio-optical side RAM 355 can be randomly accessed, and when compared with the same data capacity, the time required for reading is faster than the audio-optical side ROM 354. The audio-optical side RAM 355 temporarily stores various data for execution of the control program stored in the audio-optical side ROM 354.

In addition to the sound/light side MPU 352, the sound/light emission control board 351 is also equipped with an RTC 356 and an RTC memory 357. The RTC 356 is a real-time clock that constantly measures date information and time information, and is configured to be able to output the measured date information and time information (hereinafter also referred to as date and time information) according to instructions from the sound/light side CPU 353. The RTC 356 is provided with a backup power supply, and is capable of measuring date information and time information even when the power to the pachinko machine 10 is cut off. Furthermore, the RTC 356 is not limited to a configuration in which date and time information is measured, and may be configured to measure only time information.

The RTC memory 357 is a memory (i.e., a volatile storage means) that requires an external power supply to store data, such as SRAM and DRAM, and is used for both reading and writing. The RTC memory 357 stores the date and time information of the RTC 356 according to instructions from the sound/light side CPU 353. The date and time information stored in the RTC memory 357 is read by the sound/light side CPU 353 as necessary. The sound/light side CPU 353 grasps the reference time based on the date and time information stored in the RTC memory 357, and executes processing to execute a time-dependent performance every time a predetermined time (e.g., one hour) has elapsed based on the reference time. The RTC memory 357 is configured to receive backup power from a backup power supply provided for the RTC 356, and the date and time information is stored and stored even when the power supply of the pachinko machine 10 is cut off. However, this is not limited to this, and the RTC memory 357 may be an EEPROM or the like that does not require an external power supply to store and store information.

Next, the performance control process executed by the sound/light side CPU 353 will be described with reference to the flowchart in FIG. 173. Note that the performance control process is executed when the supply of operating power to the sound/light side CPU 353 is started.

If an update start command has been received from the main CPU 63 (step SB401: YES), update time notification setting processing is executed (step SB402). As already explained, the update start command is sent to the sound and light side CPU 353 when the main side CPU 63 starts the setting value update process (FIG. 167). In the update time notification setting process, an image showing that the setting value update process (FIG. 167) is being executed, an image to make it possible to recognize the operation details for changing the setting value, and a setting value update process (FIG. 167) are displayed. The display control device 82 is controlled to display an image on the symbol display device 41 to make it possible to recognize the operation details for ending the process shown in FIG. 167). This allows the administrator of the game hall to recognize that the setting value is being changed, and the operation details and setting value update process necessary to change the setting value (Figure 167) It becomes possible for the manager of the game hall to recognize the details of the operation required to end the game. In addition to or instead of the notification being executed by the symbol display device 41, the notification may be executed by at least one of the display light emitting section 53 and the speaker section 54.

When a confirmation start command is received from the main CPU 63 (step SB403: YES), the confirmation time notification setting process is executed (step SB404). As already explained, the confirmation start command is sent to the sound/light side CPU 353 when the setting confirmation process (FIG. 166) is started by the main CPU 63. In the confirmation time notification setting process, the display control device 82 is controlled so that an image indicating that the setting confirmation process (FIG. 166) is being executed and an image for enabling the operation content for terminating the setting confirmation process (FIG. 166) are displayed on the pattern display device 41. This allows the manager of the game hall to recognize that the current setting value of the pachinko machine 10 is being confirmed, and allows the manager of the game hall to recognize the operation content required to terminate the setting confirmation process (FIG. 166). In addition to or instead of the above notification being executed by the pattern display device 41, it may be configured to be performed by at least one of the display light-emitting unit 53 and the speaker unit 54.

When the processes in steps SB401 to SB404 are executed, it is determined whether any of the normal return command, clear return command, confirmation return command, and update return command is received from the main CPU 63 ( Step SB405). The normal return command is executed when the supply of operating power is started (step SB101) without executing any of the first RAM clear processing (step SB117), setting confirmation processing (FIG. 166), and setting value update processing (FIG. 167). ~Step SB122) is completed. The return command at the time of clearing is sent when the first RAM clearing process (step SB117) is executed and the process at the start of supply of operating power (steps SB101 to SB122) is completed. The return command for confirmation is sent when the setting confirmation process (FIG. 166) is executed and the process for starting the supply of operating power (steps SB101 to SB122) is completed. The return command at the time of update is sent when the setting value update process (FIG. 167) is executed and the process at the start of supply of operating power (steps SB101 to SB122) is completed.

If these return commands have not been received (step SB405: NO), the process returns to step SB401. The main side CPU 63 transmits one of the return commands to the sound and light side CPU 353 when the processing at the start of supply of operating power (steps SB101 to SB122) is completed. In this case, as described above, the sound/light side CPU 353 does not execute the processing from step SB406 until it receives any of the return commands from the main side CPU 63. This prevents the sound and light side CPU 353 from starting normal performance execution control while the main side CPU 63 is executing the process for starting the supply of operating power (steps SB101 to SB122). It becomes possible.

In addition, in a situation where no return command has been received, there is a possibility that an update start command or a confirmation start command will be received from the main CPU 63, and when an update start command is received, it is necessary to make a notification corresponding to the execution of the setting value update process (FIG. 167) as already explained, and when a confirmation start command is received, it is necessary to make a notification corresponding to the execution of the setting confirmation process (FIG. 166) as already explained. In this case, the audio-optical CPU 353 will not execute the process from step SB406 onwards until it receives one of the return commands from the main CPU 63, thereby making it possible to preferably start a notification corresponding to the reception of an update start command or a confirmation start command.

When any of the return commands is received from the main CPU 63 (step SB405: YES), it is determined whether the received return command is a normal return command (step SB406). As already explained, the normal return command is sent when the processing at the start of the supply of operating power (steps SB101 to SB122) is completed without executing any of the first RAM clear processing (step SB117), the setting confirmation processing (FIG. 166), and the setting value update processing (FIG. 167). When the normal return command is received (step SB406: YES), the current date and time information of the RTC 356 is read, and the read date and time information is stored in the RTC memory 357 (step SB407). As a result, the date and time information that is the reference for determining the timing to execute the time-based performance is stored in the RTC memory 357.

If the return command received this time is not a normal return command (step SB406: NO) but is a return command at the time of update (step SB408: YES), an end process of update time notification is executed (step SB409). As already explained, the return command at the time of update is sent to the sound and light side CPU 353 when the main side CPU 63 finishes the setting value update process (FIG. 167). In the update time notification termination process, the notification corresponding to the setting value update process (FIG. 167) started in step SB402 is ended.

If the return command received this time is not a return command at the time of update (step SB408: NO) but a return command at the time of confirmation (step SB410: YES), the confirmation notification end process is executed (step SB411). As already explained, the return command at the time of confirmation is sent to the audio/optical side CPU 353 when the setting confirmation process (FIG. 166) is ended by the main side CPU 63. In the confirmation notification end process, the notification corresponding to the setting confirmation process (FIG. 166) started in step SB404 is ended.

When the process of step SB407 is executed, when the process of step SB409 is executed, when a negative judgment is made in step SB410, or when the process of step SB411 is executed, a process for controlling the execution of a normal performance is executed. Specifically, first, it is judged whether or not it is the timing to start a time-responsive performance (step SB412).

A time-responsive performance is a performance that is executed each time a predetermined time (e.g., one hour) has elapsed based on a reference time corresponding to the date and time information stored in the RTC memory 357. In a time-responsive performance, the display light-emitting unit 53 produces a light-emitting performance corresponding to the time-responsive performance, the speaker unit 54 produces a sound output performance corresponding to the time-responsive performance, and the pattern display device 41 produces a display performance corresponding to the time-responsive performance.

In addition, when a time-based performance is started in a situation where a game-based performance is being executed, the display light emitting unit 53 and speaker unit 54 execute the time-based performance with priority over the game-based performance. On the other hand, in the symbol display device 41, an image corresponding to the time-based performance is displayed in a state where the image display corresponding to the performance of the game cycle is displayed in a reduced size on a part of the display surface of the symbol display device 41. In addition, if a time-based performance is started in a situation where a performance for the opening/closing execution mode is being executed, the display light emitting unit 53 and the speaker unit 54 give priority to the time-based performance over the performance for the opening/closing execution mode. On the other hand, in the symbol display device 41, an image corresponding to the time-based performance is displayed in a state where the image display corresponding to the performance for the opening/closing execution mode is displayed in a reduced size on a part of the display surface of the symbol display device 41.

Since the time-responsive performance is executed each time a predetermined time (e.g., one hour) has elapsed based on a reference time corresponding to the date and time information stored in the RTC memory 357, if the reference times of multiple adjacent pachinko machines 10 in an arcade are the same, it becomes possible to simultaneously start the time-responsive performance on those multiple pachinko machines 10. Note that, since the power of multiple pachinko machines 10 is turned ON at the same time in an arcade, the reference times of those multiple pachinko machines 10 will basically be the same.

In step SB412, the reference time is determined based on the date and time information stored in the RTC memory 357. Also, the current date and time information of the RTC 356 is read out. Then, it is determined whether the difference between the reference time and the time corresponding to the current date and time information read from the RTC 356 is an integral multiple of the predetermined time. When an affirmative determination is made in step SB412, a time-based performance setting process is executed (step SB413). In the time-based performance setting process, the display light emitting unit 53 and the speaker unit 54 are set to execute the time-based performance, and the display control device issues a command to cause the symbol display device 41 to execute the time-based performance. 82. Note that the execution content of the time-based performance may be different depending on the number of times the time-based performance is performed when the reference time corresponding to the date and time information stored in the RTC memory 357 is used as a reference.

If a negative determination is made in step SB412 or if the process in step SB413 is executed, other processes are executed (step SB414). In other processing, when a command to start a game replay is received from the main CPU 63, the symbol display device 41, the display light emitting section 53, and the speaker section 54 are used to start the game replay. If the situation is such that the game cycle performance should be performed, the symbol display device 41, the display light emitting unit 53, and the speaker unit 54 are set to proceed with the game cycle performance, and the game cycle is started. If the situation is such that the performance for the game should be ended, the symbol display device 41, the display light emitting section 53, and the speaker section 54 are set to end the performance for the game. In addition, in other processing, when a command to start the effect for the opening/closing execution mode is received from the main CPU 63, the symbol display device 41, the display light emitting unit 53, and the speaker unit 54 start the effect for the opening/closing execution mode. If the situation is such that the opening/closing execution mode performance should be performed, the symbol display device 41, the display light emitting unit 53, and the speaker unit 54 are used to proceed with the opening/closing execution mode performance. Settings are made, and when the situation is such that the performance for the opening/closing execution mode should be ended, settings are made for terminating the performance for the opening/closing execution mode on the symbol display device 41, the display light emitting section 53, and the speaker section 54.

Next, the effects corresponding to the contents of the processing executed in the processing at the start of supply of operating power in the main CPU 63 (steps SB101 to SB122) will be explained with reference to the explanatory diagram of FIG. 174.

If none of the first RAM clear process (step SB117), the setting confirmation process (FIG. 166), and the setting value update process (FIG. 167) is executed during the process at the start of the supply of operating power in the main CPU 63 (steps SB101 to SB122), the main CPU 63 sends a normal return command to the sound/light side CPU 353 when the process at the start of the supply of operating power (steps SB101 to SB122) ends. When the sound/light side CPU 353 receives a normal return command, it does not execute any control related to the notification. On the other hand, when the sound/light side CPU 353 receives a normal return command, it stores the current date and time information measured in the RTC 356 in the RTC memory 357. As a result, information corresponding to the reference time referenced to identify the execution trigger of the time-dependent performance is newly stored in the RTC memory 357.

If the first RAM clearing process (step SB117) is executed in the process at the start of the supply of operating power (steps SB101 to SB122) in the main CPU 63, the process at the start of the supply of operating power (steps SB101 to SB122) When the process ends, the main side CPU 63 transmits a return command at the time of clearing to the sound and light side CPU 353. When the sound-light side CPU 353 receives a return command upon clearing, it does not perform control related to notification in response to the command. Moreover, even if the sound-light side CPU 353 receives the return command at the time of clearing, it does not store the current date and time information measured by the RTC 356 in the RTC memory 357. Since backup power is supplied to the RTC memory 357, if new date and time information is not stored in the RTC memory 357, the RTC memory is The date and time information stored in 357 is stored and retained as is.

If the setting value update process (FIG. 167) is executed in the process at the time of starting the supply of operating power in the main CPU 63 (steps SB101 to SB122), the process at the time of starting the supply of operating power (steps SB101 to SB122) When the process ends, the main side CPU 63 transmits a return command at the time of update to the sound and light side CPU 353. When the sound and light side CPU 353 receives the update return command, it ends the notification corresponding to the execution of the setting value update process (FIG. 167). Further, even if the audio-light side CPU 353 receives the return command at the time of update, it does not store the current date and time information measured by the RTC 356 in the RTC memory 357. Since backup power is supplied to the RTC memory 357, if new date and time information is not stored in the RTC memory 357, the RTC memory is The date and time information stored in 357 is stored and retained as is.

If the setting confirmation process (FIG. 166) is executed in the process at the start of the supply of operating power in the main CPU 63 (steps SB101 to SB122), the process at the start of the supply of operating power (steps SB101 to SB122) When the process ends, the main side CPU 63 transmits a return command at the time of confirmation to the sound and light side CPU 353. When the sound-light side CPU 353 receives the return command at the time of confirmation, it ends the notification corresponding to the execution of the setting confirmation process (FIG. 166). Moreover, even if the sound-light side CPU 353 receives the return command at the time of confirmation, it does not store the current date and time information measured by the RTC 356 in the RTC memory 357. Since backup power is supplied to the RTC memory 357, if new date and time information is not stored in the RTC memory 357, the RTC memory is The date and time information stored in 357 is stored and retained as is.

The present embodiment described above provides the following excellent advantages:

When the setting value update process (FIG. 167) is started, the setting value is changed from a predetermined starting setting value. As a result, regardless of the setting value to be used before the setting value updating process (Fig. 167) is started, the setting value can be changed from a certain starting setting value in the setting value updating process (Fig. 167). It becomes possible to do this. Therefore, the content of the setting value changing operation becomes easy for the operator to understand.

The setting value corresponding to the above start is specifically "Setting 1", which has the lowest degree of advantage. Therefore, when the setting value update process (Figure 167) is started, the setting value is changed from "Setting 1", which has the lowest degree of advantage. As a result, even if the manager of the amusement hall unintentionally ends the setting value update process (Figure 167) immediately after it has started, the setting value will have the lowest degree of advantage, so it is possible to prevent unintended disadvantages from occurring to the amusement hall even if play is started in such a situation.

The work area 221 for specific control is provided with a setting reference area 341 and a setting update area 342, and information corresponding to the setting value to be used is stored in the setting reference area 341, and information corresponding to the setting value being changed while the setting value update process (FIG. 167) is being executed is stored in the setting update area 342. This makes it possible to change the setting value to be updated in the setting value update process (FIG. 167) while storing and holding information on the setting value that was set before the setting value update process (FIG. 167) was started in the setting reference area 341.

When the supply of operating power is started, the main CPU 63 sends a return command when clearing if it executes the first RAM clear process (step SB117), sends a return command when updating if it executes the setting value update process (Figure 167), sends a return command when checking if it executes the setting confirmation process (Figure 166), and sends a normal return command if none of the first RAM clear process (step SB117), setting value update process (Figure 167), or setting confirmation process (Figure 166) is executed. This makes it possible for control corresponding to the type of start status when the supply of operating power is started to be performed not only by the main CPU 63 but also by the audio/optical CPU 353.

Regardless of whether the sound/light side CPU 353 receives a normal return command, a return command at the time of clearing, a return command at the time of updating, or a return command at the time of confirmation, it makes a positive judgment at step SB405 of the performance control process (Fig. 173) and enters a state in which it executes the processes of steps SB412 to SB414. On the other hand, when it receives a normal return command, it executes a write process to the RTC memory 357 (step SB407), when it receives a return command at the time of updating, it executes an end process of the update notification (step SB409), when it receives a return command at the time of confirmation, it executes an end process of the confirmation notification (step SB411), and when it receives a return command at the time of clearing, it does not execute a dedicated process. This makes it possible to have the sound/light side CPU 353 execute a process corresponding to the progress of the game when any one of the return commands is received, while the sound/light side CPU 353 executes a control corresponding to each return command.

After transmitting any of the return commands, the main CPU 63 ends the processing at the start of the supply of operating power (steps SB101 to SB122) and starts the processing for controlling the progress of the game (steps S8907 to S8920), and when the sound/light CPU 353 receives any of the return commands, it controls the execution of the presentation corresponding to the progress of the game. This makes it possible for the sound/light CPU 353 to control the execution of the presentation corresponding to the progress of the game after the main CPU 63 is in a situation where it can execute the processing for controlling the progress of the game. In this case, the sound/light CPU 353 executes the processing corresponding to each return command. This makes it possible to have the sound/light CPU 353 recognize the trigger for starting the execution control of the presentation corresponding to the progress of the game by using multiple return commands that differ in the execution content of the processing at the start of the supply of operating power in the sound/light CPU 353.

When the timing for executing the time-based performance is reached based on the date and time information stored in the RTC memory 357, the time-based performance is executed, so that it is possible to execute the time-based performance at the timing when the specified time is reached. In this case, when the supply of operating power to the main CPU 63 is started, if the first RAM clear process (step SB117), the setting value update process (FIG. 167), or the setting confirmation process (FIG. 166) is executed, no new storage of date and time information occurs in the RTC memory 357, while when none of the first RAM clear process (step SB117), the setting value update process (FIG. 167), or the setting confirmation process (FIG. 166) is executed, the current date and time information measured in the RTC 356 is stored in the RTC memory 357. This makes it possible to create a situation in which date and time information is newly stored in the RTC memory 357 and a situation in which date and time information is not newly stored in the RTC memory 357 depending on the processing content executed by the main CPU 63 when the supply of operating power to the main CPU 63 is started.

When the supply of operating power to the main CPU 63 is started, if a "RAM clear operation" is performed, the first RAM clear process (step SB117) is executed, if a "setting change operation" is performed, the setting value update process (Fig. 167) is executed, and if a "setting confirmation operation" is performed, the setting confirmation process (Fig. 166) is executed. On the other hand, when the supply of operating power to the main CPU 63 is started in a "no operation" situation, none of the first RAM clear process (step SB117), the setting value update process (Fig. 167), and the setting confirmation process (Fig. 166) are executed. In this case, when the supply of operating power to the main CPU 63 is started as described above, if the first RAM clear process (step SB117), the setting value update process (FIG. 167), or the setting confirmation process (FIG. 166) is executed, no new date and time information is stored in the RTC memory 357. On the other hand, if none of the first RAM clear process (step SB117), the setting value update process (FIG. 167), or the setting confirmation process (FIG. 166) is executed, the current date and time information measured in the RTC 356 is stored in the RTC memory 357. This allows the manager of the game hall to select whether the date and time information is newly stored in the RTC memory 357 or not when the power of the pachinko machine 10 is turned on.

When the supply of operating power to the main CPU 63 is started, an initial check period is started after the processing at the start of the supply of operating power (steps SB101 to SB122) is completed in the main CPU 63 and before the remaining processing (steps SB125 to SB128) is started. This makes it unnecessary to control the initial check period when the processing at the start of the supply of operating power is being executed, thereby making it possible to reduce the processing load when the processing at the start of the supply of operating power is being executed.

The setting confirmation process (FIG. 166) and the setting value update process (FIG. 167) are executed as processes at the start of the supply of operating power (steps SB101 to SB122), whereas the initial check period starts after the processes at the start of the supply of operating power are completed. This makes it possible to ensure that even if a check display is performed on the first to fourth notification display devices 201 to 204 during the initial check period, this does not affect the display of the setting values using the first to fourth notification display devices 201 to 204.

When the supply of operating power to the main CPU 63 is started, either the setting confirmation process (Fig. 166) or the setting value update process (Fig. 167) is executed, and the setting confirmation process (Fig. 166) and the setting value update process (FIG. 167) are not executed, a check display is performed on the first to fourth notification display devices 201 to 204. This makes it possible to check whether the first to fourth notification display devices 201 to 204 are normal, regardless of the situation when the supply of operating power to the main CPU 63 is started.

The main processing (FIG. 165) of the main CPU 63 is a processing that is executed in common when either the setting confirmation processing (FIG. 166) or the setting value update processing (FIG. 167) is executed, and when neither the setting confirmation processing (FIG. 166) nor the setting value update processing (FIG. 167) is executed, and when either the setting confirmation processing (FIG. 166) or the setting value update processing (FIG. 167) is executed, a processing that starts a check display on the first to fourth notification display devices 201 to 204 is set as a processing that is executed later in the order of execution than the setting confirmation processing (FIG. 166) and the setting value update processing (FIG. 167). In this way, the processing that starts a check display on the first to fourth notification display devices 201 to 204 is set as a common processing, which makes it possible to achieve the excellent effects already described while simplifying the processing configuration.

Even if a check display is being executed on the first to fourth notification display devices 201 to 204, the main CPU 63 can start processing to progress the game. This makes it possible to prevent delays in the start timing of processing to progress the game even in a configuration in which a check display is executed on the first to fourth notification display devices 201 to 204 after execution of a setting confirmation process (FIG. 166) or a setting value update process (FIG. 167).

In the processing at the time of starting the supply of operating power (step SB101 to step SB122), which is executed when the supply of operating power is started in the main CPU 63, it is determined whether the set value to be used is within the normal range. Processing for monitoring is executed. If the set value to be used is abnormal, a regulated state is entered in which processing for advancing the game is not started. This makes it possible to prevent the process for advancing the game from being started even though the set value to be used is abnormal.

The process for monitoring whether the setting value of the target to be used is within the normal range is executed in step S8919 of the first timer interrupt process (Fig. 133) even after the process at the start of the supply of operating power (steps SB101 to SB122) has ended. This makes it possible to deal with the situation even if the setting value of the target to be used becomes abnormal as the game progresses.

When the supply of operating power to the main CPU 63 is started, the process at the start of the supply of operating power (steps SB101 to SB122) not only monitors whether the setting values to be used are within the normal range, but also monitors whether the power outage flag in the work area 221 for specific control is set to "1", and monitors whether the checksums of the work area 221 for specific control and the stack area 222 for specific control are normal. If the power outage flag is not set to "1" or the checksum is abnormal, a restricted state is entered in which processing to progress the game is not started. This makes it possible to prevent processing to progress the game from being started despite the occurrence of an information abnormality regarding the main RAM 65.

Even if the supply of operating power is stopped, the regulated state is resumed when the supply of operating power is restarted. This makes it possible to prevent the state in which execution of processing for advancing the game is restricted due to an information abnormality occurring in the main side RAM 65 from being canceled simply by stopping the supply of operating power. Become.

The above restricted state is released by executing the setting value update process (Fig. 167). This makes it possible to set new setting values to be used when releasing the state in which game progress is restricted due to an information anomaly occurring in the main RAM 65.

Even in the above-mentioned restricted state, power outage monitoring and various counter updating processes are executed. This makes it possible to ensure execution of necessary processing even when the progress of the game is restricted as described above. In particular, by performing power outage monitoring, even if the progress of the game is restricted, if a power outage occurs, it becomes possible to appropriately deal with it.

When the above-mentioned restriction state is reached, it is notified that the setting value of the target of use should be changed. Thereby, if an information abnormality occurs in the main side RAM 65, it becomes possible to prompt the gaming hall manager to resolve the problem.

If an information abnormality occurs in the main side RAM 65, an abnormality signal is externally outputted to the management computer of the gaming hall. Thereby, if an information abnormality occurs in the main side RAM 65, it becomes possible to prompt the gaming hall manager to resolve the problem.

If an abnormality other than an information abnormality occurs in the main RAM 65, an abnormality signal is output to the gaming hall's management computer. This makes it possible to use the same configuration for external output.

Even if the supply of operating power to the main CPU 63 is stopped in a restricted state in which game progress is restricted due to an information abnormality occurring in the main RAM 65, if the restricted state is not yet lifted when the supply of operating power is resumed, an abnormality signal is output to the outside again. As a result, in the restricted state, an abnormality signal is output to the outside every time the supply of operating power is resumed. This makes it easier for the manager of the game hall to recognize that an information abnormality has occurred in the main RAM 65.

In the situation where the setting confirmation process (Fig. 166) and the setting value update process (Fig. 167) are not executed in the process at the start of supply of operating power (steps SB101 to SB122), the first timer interrupt process (Fig. 133) is executed. The first timer interrupt process (Fig. 133) and the second timer interrupt process (Fig. 134) are prohibited and the setting confirmation process (Fig. 166) or setting value update process (Fig. 167) is executed. Execution of the second timer interrupt process (FIG. 134) is permitted. If the settings confirmation process (FIG. 166) and setting value update process (FIG. 167) are not executed, the timer interrupt process is prevented from interrupting and starting during the process when starting the supply of operating power (steps SB101 to SB122). By doing so, it becomes possible to quickly complete the process at the start of supply of operating power (steps SB101 to SB122).

On the other hand, when the setting confirmation process (Figure 166) and the setting value update process (Figure 167) are executed, the process is executed according to the operation of the amusement hall manager, so the period spent on these processes is long. In this case, if the timer interrupt process remains prohibited even when the setting confirmation process (Figure 166) and the setting value update process (Figure 167) are being executed, the timing at which the timer interrupt process starts to be executed will be extremely delayed. In contrast, when the setting confirmation process (Figure 166) or the setting value update process (Figure 167) is executed, the timer interrupt process is permitted to be interrupted. This makes it possible to prevent the timing at which the timer interrupt process starts to be executed from being extremely delayed. In addition, while the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167) are being executed, the second timer interrupt process (FIG. 134), which executes a process for controlling the display of the first to fourth notification display devices 201 to 204, is executed as an interrupt, making it possible to display information related to the setting values on the first to fourth notification display devices 201 to 204 using the second timer interrupt process (FIG. 134).

Furthermore, in a situation where the setting confirmation process (FIG. 166) or the setting value update process (FIG. 167) is being executed, the start-up process flag is set to "1". Therefore, even if the first timer interrupt process (Fig. 133) is started while the setting confirmation process (Fig. 166) or the setting value update process (Fig. 167) is being executed, the first timer interrupt process (Fig. Among the various processes in 133), the processes for monitoring power outages, updating various counters, and monitoring fraud are executed, while the processes for advancing the game can be prevented from being executed.

Note that the present invention is not limited to a configuration in which new storage of date and time information occurs in the RTC memory 357 when none of the first RAM clearing process (step SB117), the setting value update process (FIG. 167), and the setting confirmation process (FIG. 166) is executed, and new storage of date and time information does not occur in the RTC memory 357 when any of the first RAM clearing process (step SB117), the setting value update process (FIG. 167), and the setting confirmation process (FIG. 166) is executed. For example, a configuration in which new storage of date and time information occurs in the RTC memory 357 may be used when none of the first RAM clearing process (step SB117), the setting value update process (FIG. 167), and the setting confirmation process (FIG. 166) is executed, or when the first RAM clearing process (step SB117) is executed. Also, when none of the first RAM clearing process (step SB117), the setting value update process (FIG. 167), and the setting confirmation process (FIG. 166) is executed, or when the setting value update process (FIG. 167) is executed, new storage of date and time information may occur in the RTC memory 357. Also, when none of the first RAM clearing process (step SB117), the setting value update process (FIG. 167), and the setting confirmation process (FIG. 166) is executed, or when the setting confirmation process (FIG. 166) is executed, new storage of date and time information may occur in the RTC memory 357.

Furthermore, if none of the first RAM clearing process (step SB117), setting value updating process (FIG. 167), and setting confirmation process (FIG. 166) is executed, and if the setting value updating process (FIG. 167) is executed, Alternatively, a configuration may be adopted in which the date and time information is newly stored in the RTC memory 357 when the setting confirmation process (FIG. 166) is executed. Furthermore, if none of the first RAM clear processing (step SB117), setting value update processing (FIG. 167), and setting confirmation processing (FIG. 166) is executed, and if the first RAM clear processing (step SB117) is executed, Alternatively, a configuration may be adopted in which the date and time information is newly stored in the RTC memory 357 when the setting confirmation process (FIG. 166) is executed. Furthermore, if none of the first RAM clear processing (step SB117), setting value update processing (FIG. 167), and setting confirmation processing (FIG. 166) is executed, and if the first RAM clear processing (step SB117) is executed, Alternatively, a configuration may be adopted in which the date and time information is newly stored in the RTC memory 357 when the setting value update process (FIG. 167) is executed.

Further, if the first RAM clearing process (step SB117) is executed, new storage of date and time information in the RTC memory 357 occurs, and in other cases, new storage of date and time information in the RTC memory 357 occurs. It is also possible to adopt a configuration in which storage does not occur. Furthermore, when the setting value update process (FIG. 167) is executed, new date and time information is stored in the RTC memory 357, and in other cases, new date and time information is stored in the RTC memory 357. It is also possible to adopt a configuration in which storage does not occur. Furthermore, when the setting confirmation process (FIG. 166) is executed, new date and time information is stored in the RTC memory 357, and in other cases, new date and time information is stored in the RTC memory 357. It is also possible to adopt a configuration in which storage does not occur. Furthermore, when the first RAM clearing process (step SB117) or the setting value updating process (FIG. 167) is executed, new storage of date and time information in the RTC memory 357 occurs; A configuration may also be adopted in which new storage of date and time information in the memory 357 does not occur. If the first RAM clearing process (step SB117) or the setting confirmation process (FIG. 166) is executed, new storage of date and time information in the RTC memory 357 occurs; otherwise, the RTC memory 357 It is also possible to adopt a configuration in which no new storage of date and time information occurs. Furthermore, when the setting value update process (Fig. 167) or the setting confirmation process (Fig. 166) is executed, new storage of date and time information in the RTC memory 357 occurs; A configuration may also be adopted in which new storage of date and time information in the memory 357 does not occur.

In addition, when the setting value update process (FIG. 167) is executed, the entire area of the work area 221 for specific control, including the setting reference area 341 and the setting update area 342, may be cleared to "0" during the initial setting process (step SB303) at the start, and initialization may be performed. In this case, the second RAM clear process (step SB313) may not be executed during the setting value update process (FIG. 167).

Further, when the setting value update process (FIG. 167) is started, the configuration may be such that the setting value change is started from a predetermined setting value other than "setting 1". For example, the configuration may be such that changing the setting value starts from "Setting 2", it may start from changing the setting value from "Setting 3", and the changing of the setting value starts from "Setting 4". The configuration may be such that changing the setting value starts from "Setting 5", or it may start changing the setting value from "Setting 6".

Furthermore, when the setting value update process (FIG. 167) is started, the setting value information stored in the setting reference area 341 is overwritten in the setting update area 342, as in the forty-fifth embodiment. In this way, a configuration may be adopted in which the change of the setting value is started from the setting value that has been set as the target of use up to that point.

Further, a configuration may be adopted in which the process for transmitting various return commands in the main process (FIG. 165) is set as a process before the remaining process (steps SB125 to SB128) is started. In this case, if any of the first RAM clear processing (step SB117), setting value update processing (Fig. 167), and setting confirmation processing (Fig. 166) is executed, the corresponding flag is set, and the In the process for transmitting various return commands, a configuration may be adopted in which a return command corresponding to the state of the flag is sent to the audio-light side CPU 353.

In addition to or in place of the configuration in which time-based effects are executed every time a predetermined time elapses based on the date and time information stored in the RTC memory 357, the date and time information stored in the RTC memory 357 may be used as a reference. The configuration may be such that monitoring is performed to determine whether a predetermined abnormality has occurred each time a predetermined time elapses, and each time a predetermined time elapses based on the date and time information stored in the RTC memory 357. A configuration may also be adopted in which the base value is notified. In this case, the RTC 356 and the RTC memory 357 may be provided in the main control board 61, and the main CPU 63 may be configured to monitor the abnormality or notify the base value. Abnormality monitoring is executed simultaneously on a plurality of pachinko machines 10 installed in a gaming hall, and the results are reported on, for example, the symbol display device 41, thereby periodically determining whether or not a predetermined abnormality is occurring. It becomes possible to monitor multiple pachinko machines 10 all at once. In addition, by simultaneously notifying the base value on the symbol display device 41 of the plurality of pachinko machines 10 set in the gaming hall, regular monitoring of the base value can be carried out collectively for the plurality of pachinko machines 10. It becomes possible to do this by Note that the various types of notifications described above are not limited to a configuration that is performed by the pachinko machine 10 itself, but may also be configured to be performed by external output to the management computer of the game hall.

Also, if it is determined that the power outage flag is not set to "1" in the main processing (FIG. 165), if it is determined that the checksum is abnormal, or if the setting value in the setting reference area 341 is abnormal. If it is determined, the configuration may be such that the setting value update process (FIG. 165) is forcibly executed regardless of whether or not the "setting change operation" is being performed. This makes it possible to immediately change the set value if an information abnormality occurs in the main RAM 65.

<50th embodiment>
This embodiment is different from the forty-ninth embodiment described above in the processing configuration of the effect control processing executed by the sound and light side CPU 353. Hereinafter, the configuration different from the forty-ninth embodiment described above will be explained. Note that the description of the same configuration as the forty-ninth embodiment is basically omitted.

Figure 175 is a flowchart showing the performance control process in this embodiment executed by the sound/light side CPU 353.

Steps SB501 to SB505 are the same as steps SB401 to SB405 of the performance control process (Figure 173) in the 49th embodiment. If a normal return command, a return command when clearing, a return command when checking, or a return command when updating is received from the main CPU 63 (step SB505: YES), it is determined whether the return command received this time is a return command other than a normal return command (step SB506).

If the return command received this time is one of the return command for clearing, the return command for confirmation, and the return command for update (step SB506: YES), the production control process in the forty-ninth embodiment (FIG. 173) Similarly to step SB407, the current date and time information of the RTC 356 is read, and the read date and time information is stored in the RTC memory 357 (step SB407). As a result, the date and time information that serves as a reference when specifying the timing to perform the time-based performance is stored in the RTC memory 357.

Steps SB508 to SB514 execute the same processing as steps SB408 to SB414 of the performance control processing (Figure 173) in the 49th embodiment described above.

FIG. 176 is an explanatory diagram for explaining the action corresponding to the content of the processing executed in the processing at the start of supply of operating power in the main CPU 63 (steps SB101 to SB122).

As in the 49th embodiment, in the process (steps SB101 to SB122) when the supply of operating power is started in the main CPU 63, if none of the first RAM clear process (step SB117), the setting confirmation process (FIG. 166), and the setting value update process (FIG. 167) is executed, the main CPU 63 sends a normal return command to the sound/light side CPU 353, if the first RAM clear process (step SB117) is executed, the main CPU 63 sends a return command at the time of clearing to the sound/light side CPU 353, if the setting value update process (FIG. 167) is executed, the main CPU 63 sends a return command at the time of update to the sound/light side CPU 353, and if the setting confirmation process (FIG. 166) is executed, the main CPU 63 sends a return command at the time of confirmation to the sound/light side CPU 353.

Similarly to the forty-ninth embodiment, when the sound-light side CPU 353 receives a return command at the time of update, it ends the notification corresponding to the execution of the setting value update process (FIG. 167), and also terminates the notification corresponding to the execution of the setting value update process (FIG. 167). When the return command is received, the notification corresponding to the execution of the setting confirmation process (FIG. 166) is terminated. Further, as in the forty-ninth embodiment, even if the sound and light side CPU 353 receives a normal return command and a clear return command, it does not perform notification-related control in response thereto.

When receiving any one of the return command for clearing, the return command for updating, and the return command for confirmation, the sound-light side CPU 353 stores the current date and time information measured by the RTC 356 in the RTC memory 357. As a result, information corresponding to the reference time that is referred to in order to specify the trigger for executing the time-based performance is newly stored in the RTC memory 357. On the other hand, even if the audio-light side CPU 353 receives the normal return command, it does not store the current date and time information measured by the RTC 356 in the RTC memory 357. Since backup power is supplied to the RTC memory 357, if the date and time information is not newly stored in the RTC memory 357, the RTC memory 357 is The date and time information stored in the memory 357 is stored and retained as is.

According to the above configuration, in the process at the start of supply of operating power (steps SB101 to SB122), one of the first RAM clear process (step SB117), the setting value update process (FIG. 167), and the setting confirmation process (FIG. 166) is performed. is executed, the date and time information stored in the RTC memory 357 is rewritten to the current date and time information measured in the RTC 356, whereas the processing at the start of supply of operating power (steps SB101 to SB101) If none of the first RAM clear processing (step SB117), setting value update processing (FIG. 167), and setting confirmation processing (FIG. 166) is executed in step SB122), the information stored in the RTC memory 357 Date and time information cannot be rewritten. As a result, even if the power of the pachinko machine 10 is turned off once for maintenance or operation check of the pachinko machine 10 during operation of the game hall, when the supply of operating power is resumed after that, there will be no operation. By turning on the power of the pachinko machine 10, it is possible to prevent the date and time information stored in the RTC memory 357 from being rewritten. Therefore, when restarting the supply of operating power after turning off the power to the pachinko machine 10 during operation of the game hall, it is necessary to set the reference time of the time-based performance to be the same with the surrounding pachinko machines 10 in the game hall. However, it is possible to improve the operability for restarting the supply of operating power to the pachinko machine 10.

In addition, the date and time information stored in the RTC memory 357 is not rewritten by turning on the power of the pachinko machine 10 in the "no operation" situation, so the date and time information stored in the RTC memory 357 is When the power of the pachinko machine 10 is turned on so that the information is not rewritten, unintended operations such as first RAM clear processing (step SB117), setting value update processing (Fig. 167), and setting confirmation processing (Fig. 166) are performed. It is possible to prevent the process from being executed.

<Fifty-first embodiment>
In this embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the 49th embodiment. The configuration that differs from the 49th embodiment will be described below. Note that the description of the same configuration as the 49th embodiment will basically be omitted.

FIG. 177 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step SB601 to step SB630 in the main processing is executed using a specific control program and specific control data in the main CPU 63.

Steps SB601 to SB622 execute the same processes as steps SB101 to SB122 of the main process (FIG. 165) in the forty-ninth embodiment.

When the process of step SB612, step SB613, step SB615, step SB618, or step SB622 is executed, information corresponding to the initial check period (specifically, 5 seconds) is set in a checking counter provided in the work area 221 for specific control (step SB623). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is started, as in the 35th embodiment. When a value of 1 or more is set in the checking counter, the first to fourth notification display devices 201 to 204 continue to display the check, as in the 35th embodiment.

According to the above configuration, when the supply of operating power to the main CPU 63 is started, the initial check period is started after the processing at the start of the supply of operating power (steps SB601 to SB622) is completed in the main CPU 63 and before the remaining processing (steps SB627 to SB630) is started. This makes it unnecessary to control the initial check period when the processing at the start of the supply of operating power is being executed, thereby making it possible to reduce the processing load when the processing at the start of the supply of operating power is being executed.

In addition, the setting confirmation process (FIG. 166) and the setting value update process (FIG. 167) are executed as processes at the start of the supply of operating power (steps SB601 to SB622), whereas the initial check period starts after the processes at the start of the supply of operating power are completed. This makes it possible to ensure that even if a check display is performed on the first to fourth notification display devices 201 to 204 during the initial check period, this does not affect the display of the setting values using the first to fourth notification display devices 201 to 204.

Thereafter, interrupt permission is set (step SB624). As a result, the first timer interrupt process (FIG. 133) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 134) is interrupted and activated in the second interrupt cycle. When the second timer interrupt process (FIG. 134) is interrupted and started, the first to fourth notification display devices are configured so that a check display is performed in a situation where the checking counter is set to a value of 1 or more. The display of 201 to 204 is controlled.

Thereafter, it is determined whether the value of the checking counter in the specific control work area 221 is "0" (step SB625). Then, the process waits in step SB625 until the value of the checking counter becomes "0". In this case, since the startup processing flag in the work area 221 for specific control remains set to "1", even if the first timer interrupt processing (FIG. 133) is interrupted and started, Among the various processes of the first timer interrupt process (FIG. 133), the processes for monitoring power outages, updating various counters, and monitoring fraud are executed, while the processes for advancing the game are not executed. The first timer interrupt process (FIG. 133) is ended. Therefore, until the initial check period set in step SB623 has elapsed, a check display is displayed on the first to fourth notification display devices 201 to 204 in a situation where execution of the process for advancing the game is blocked. will continue.

Thereafter, the start-up processing flag in the specific control work area 221 is cleared to "0" (step SB626). When the first timer interrupt processing (FIG. 133) is started by clearing the start-up processing flag to "0", a negative determination is made in step S8906, so that not only the processing in steps S8901 to S8905 is executed. The processes from step S8907 to step S8920 are executed, and the state in which the process for advancing the game is not executed is canceled. Incidentally, in step SB626, the power outage flag in the work area 221 for specific control is also cleared to "0".

Thereafter, the process proceeds to the remaining processing of steps SB627 to SB630. In other words, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134), but between the first timer interrupt process and the next timer interrupt process, There will be a remaining time. Although this remaining time will vary depending on the processing completion time of each timer interrupt process, the remaining process from step SB627 to step SB630 is repeatedly executed using this irregular time. In this respect, it can be said that the remaining processing of steps SB627 to SB630 is non-regular processing that is executed non-regularly. In steps SB627 to SB630, the same processes as steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

According to the above configuration, when the execution of a process for progressing a game is prevented, a check display is performed on the first to fourth notification display devices 201 to 204. This makes it possible to check whether the first to fourth notification display devices 201 to 204 are normal or not when a game is not being played.

<Fifty-second embodiment>
In this embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the 49th embodiment. The configuration that differs from the 49th embodiment will be described below. Note that the description of the same configuration as the 49th embodiment will basically be omitted.

FIG. 178 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step SB701 to step SB734 in the main processing is executed using a specific control program and specific control data in the main CPU 63.

In the main processing of this embodiment, unlike the forty-ninth embodiment described above, power-on initial setting processing is not executed. Therefore, when the main process is started, the process starting from step SB701 is started without waiting for the predetermined wait time to elapse. Although the power-on initialization process is not executed, access to the main RAM 65 is permitted when the main process is started.

In the main process, first, the internal function register setting process is executed (step SB701) in the same manner as in step SB102 in the main process (FIG. 165) in the 49th embodiment, and the start-up process in progress flag in the work area 221 for specific control is set to "1" (step SB702) in the same manner as in step SB103 in the main process (FIG. 165) in the 49th embodiment. Then, under the condition that the power outage flag is set to "1", the checksum is normal, the setting value is normal, and further the setting update display flag in the work area 221 for specific control is not set to "1" (steps SB703 to SB705: YES, step SB706: NO), it is determined whether the reset button 68c has been pressed (step SB707).

If the reset button 68c is not pressed (step SB707: NO), it is determined whether the game stop flag in the work area 221 for specific control is set to "1" (step SB708). If the game stop flag is not set to "1" and the setting key insertion unit 68a is turned on using the setting key (step SB708: NO, step SB709: YES), or if the game stop flag is not set to "1" and the setting key insertion unit 68a is not turned on using the setting key and the setting confirmation display flag in the work area 221 for specific control is set to "1" (steps SB708 and SB709: NO, step SB710: YES), a setting confirmation process is executed (step SB711). In the setting confirmation process, the processes of steps SB201 to SB202 and steps SB204 to SB207 are executed in the setting confirmation process (FIG. 166) in the 49th embodiment.

In other words, in the setting confirmation process of this embodiment, the confirmation start command is not sent to the sound/light side CPU 353. Therefore, even if the setting confirmation process is executed in this embodiment, the notification corresponding to the setting confirmation process is not executed by the pattern display device 41, the display light-emitting unit 53, and the speaker unit 54. As already explained in this embodiment, when the main process is started, the process after step SB701 is started without waiting for the predetermined wait time to elapse, so that the operation start and initial setting of the pattern display device 41 may not be completed at the timing when the setting confirmation process is started. In response to this, by preventing the notification corresponding to the setting confirmation process from being executed by the pattern display device 41 as described above, it is possible to prevent the display control of the pattern display device 41 from being started in a situation where the initial setting is not completed. Note that the notification corresponding to the setting confirmation process may be performed by the display light-emitting unit 53 and the speaker unit 54 but not by the pattern display device 41.

After the setting confirmation process is executed, information corresponding to the initial check period (specifically, 5 seconds) is set in the checking counter provided in the work area 221 for specific control (step SB712). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is started, as in the 35th embodiment. If the checking counter is set to a value of 1 or more, the first to fourth notification display devices 201 to 204 continue to display the check, as in the 35th embodiment. In other words, when the setting confirmation process is executed in the process at the start of the supply of operating power (steps SB701 to SB729), the first to fourth notification display devices 201 to 204 start displaying the check after the setting confirmation process is finished, and the check display is displayed in a situation where the progress of the process is not pending.

If the reset button 68c is not pressed, the game stop flag is not set to "1", the setting key insertion section 68a is not turned ON using the setting key, and the setting confirmation display flag in the specific control work area 221 is not set to "1" (steps SB707 to SB710: NO), information corresponding to the initial check period (specifically, 5 seconds) is set in the checking counter provided in the specific control work area 221 (step SB713). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is started, as in the 35th embodiment. If a value of 1 or more is set in the checking counter, the first to fourth notification display devices 201 to 204 continue to display the check, as in the 35th embodiment.

Thereafter, interrupt permission is set (step SB714). As a result, the first timer interrupt process (FIG. 133) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 134) is interrupted and activated in the second interrupt cycle. When the second timer interrupt process (FIG. 134) is interrupted and started, the first to fourth notification display devices are configured so that a check display is performed in a situation where the checking counter is set to a value of 1 or more. The display of 201 to 204 is controlled.

Thereafter, wait processing is executed (step SB715). In the wait process, the process waits until the value of the checking counter in the specific control work area 221 becomes "0". In this case, since the startup processing flag in the work area 221 for specific control remains set to "1", even if the first timer interrupt processing (FIG. 133) is interrupted and started, Among the various processes of the first timer interrupt process (FIG. 133), the processes for monitoring power outages, updating various counters, and monitoring fraud are executed, while the processes for advancing the game are not executed. The first timer interrupt process (FIG. 133) is ended. Therefore, until the initial check period set in step SB713 has elapsed, a check display is displayed on the first to fourth notification display devices 201 to 204 in a situation where execution of the process for advancing the game is blocked. will continue. In addition, the operation start and initial setting of the symbol display device 41 are completed during the waiting time in the wait process. In other words, the first to fourth notification display devices 201 to 204 are displayed on the first to fourth notification display devices 201 to 204 by using the wait period to prevent execution of processing for advancing the game until the symbol display device 41 starts operating and initial settings are completed. This makes it possible to display a check display. After the wait process (step SB715) is completed, a normal return command is sent to the sound-light side CPU 353 (step SB716), similar to step SB113 of the main process (FIG. 165) in the forty-ninth embodiment.

When the reset button 68c is pressed and the setting key insertion section 68a is turned ON using the setting key (steps SB707 and SB717: YES), the setting value update process is executed (step SB718). Also, when the setting update display flag in the specific control work area 221 is set to "1" (step SB706: YES), regardless of whether the above-mentioned "setting change operation" has been performed, the setting value update process is executed (step SB717). In the setting value update process, the processes of steps SB301 to SB304 and steps SB306 to SB314 are executed in the setting value update process in the 49th embodiment (FIG. 167).

In other words, in the setting value update process of this embodiment, an update start command is not sent to the sound/light side CPU 353. Therefore, even if the setting value update process is executed in this embodiment, a notification corresponding to the setting value update process is not executed by the pattern display device 41, the display light-emitting unit 53, and the speaker unit 54. As already explained in this embodiment, when the main process is started, the process after step SB701 is started without waiting for the predetermined wait time to elapse, so that the operation start and initial setting of the pattern display device 41 may not be completed at the timing when the setting value update process is started. In response to this, by preventing the notification corresponding to the setting value update process from being executed by the pattern display device 41 as described above, it is possible to prevent the display control of the pattern display device 41 from being started in a situation where the initial setting is not completed. Note that a configuration may be adopted in which a notification corresponding to the setting value update process is executed by the display light-emitting unit 53 and the speaker unit 54 but not by the pattern display device 41.

After the set value update process is executed, information corresponding to the initial check period (specifically, 5 seconds) is set in the check counter provided in the work area 221 for specific control (step SB719). The value set in the check counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is started, as in the 35th embodiment. If the check counter is set to a value of 1 or more, the check display is continued on the first to fourth notification display devices 201 to 204, as in the 35th embodiment. In other words, when the set value update process is executed in the process at the start of the supply of operating power (steps SB701 to SB729), the check display is started on the first to fourth notification display devices 201 to 204 after the set value update process is completed, and the check display is displayed in a situation where the progress of the process is not pending.

If the reset button 68c is pressed and the setting key insertion part 68a is not turned on (step SB707: YES, step SB717: NO), the game stop flag in the work area 221 for specific control is set to "1". is not set (step SB720: NO), the first RAM clearing process is executed (step SB721). The contents of the first RAM clear process are the same as the first RAM clear process (step SB117) of the main process (FIG. 165) in the forty-ninth embodiment.

Thereafter, information corresponding to the initial check period (specifically, 5 seconds) is set in the checking counter provided in the work area 221 for specific control (step SB722). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is activated, as in the thirty-fifth embodiment. If the checking counter is set to a value of 1 or more, the checking display continues on the first to fourth notification display devices 201 to 204, as in the thirty-fifth embodiment.

Then, interrupt permission is set (step SB723). As a result, the first timer interrupt process (FIG. 133) is started by interrupting at the first interrupt period, and the second timer interrupt process (FIG. 134) is started by interrupting at the second interrupt period. When the second timer interrupt process (FIG. 134) is started by interrupting, the first to fourth notification display devices 201 to 204 are controlled to display a check display when the checking counter is set to a value of 1 or more.

Thereafter, wait processing is executed (step SB724). In the wait process, the process waits until the value of the checking counter in the specific control work area 221 becomes "0". In this case, since the startup processing flag in the work area 221 for specific control remains set to "1", even if the first timer interrupt processing (FIG. 133) is interrupted and started, Among the various processes of the first timer interrupt process (FIG. 133), the processes for monitoring power outages, updating various counters, and monitoring fraud are executed, while the processes for advancing the game are not executed. The first timer interrupt process (FIG. 133) is ended. Therefore, until the initial check period set in step SB722 has elapsed, a check display is displayed on the first to fourth notification display devices 201 to 204 in a situation where execution of the process for advancing the game is blocked. will continue. In addition, the operation start and initial setting of the symbol display device 41 are completed during the waiting time in the wait process. In other words, the first to fourth notification display devices 201 to 204 are displayed on the first to fourth notification display devices 201 to 204 by using the wait period to prevent execution of processing for advancing the game until the symbol display device 41 starts operating and initial settings are completed. This makes it possible to display a check display. After the wait process (step SB724) is completed, a return command upon clearing is sent to the sound-light side CPU 353 (step SB725), similar to step SB118 of the main process (FIG. 165) in the forty-ninth embodiment.

If a negative determination is made in any of steps SB703 to SB705, after setting the game stop flag in the specific control work area 221 to "1" (step SB726), check whether the reset button 68c has been pressed. (Step SB727). If the reset button 68c is pressed and the setting key insertion part 68a is turned on using the setting key (step SB717 and step SB727: YES), the setting value update process is performed in step SB718. At the same time, in step SB719, a checking counter setting process is executed. The contents of these processes are as already explained.

If the reset button 68c has not been pressed (step SB727: NO), if it is determined in step SB720 that the game stop flag is set to "1", or if it is determined in step SB708 that the game stop flag is set to "1", the processing of steps SB728 and SB729 is executed. The processing content of these steps SB728 and SB729 is the same as that of steps SB121 and SB122 in the main processing (FIG. 165) in the 49th embodiment.

When step SB712, step SB716, step SB719, step SB725, or step SB729 is executed, the start-up processing flag in the work area 221 for specific control is cleared to "0" (step SB730). When the start-up processing flag is cleared to "0", a negative judgment is made in step S8906 when the first timer interrupt process (FIG. 133) is started, and not only the processes of steps S8901 to S8905 but also the processes of steps S8907 to S8920 are executed, and the state in which processes for progressing the game are not executed is released. Note that in step SB730, the power outage flag in the work area 221 for specific control is also cleared to "0".

Then, the process proceeds to the remaining process of steps SB731 to SB734. In other words, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134), but there is a remaining time between the first timer interrupt process and the next timer interrupt process. This remaining time varies depending on the completion time of each timer interrupt process, but this irregular time is used to repeatedly execute the remaining process of steps SB731 to SB734. In this respect, the remaining process of steps SB731 to SB734 can be said to be non-periodic process that is executed non-periodically. In steps SB731 to SB734, the same process is executed as steps S113 to S116 of the main process (FIG. 9) in the first embodiment.

According to the above configuration, if the setting confirmation process (step SB711) and the setting value update process (step SB718) are not executed in the process at the start of the supply of operating power (steps SB701 to SB729), the wait process While waiting for the progress of the process, the check display continues on the first to fourth notification display devices 201 to 204. As a result, the first to fourth notification display devices 201 to 204 utilize the wait period to prevent execution of processing for progressing the game until the start of operation of the symbol display device 41 and initial settings are completed. It is now possible to display a check display. In addition, it is possible to secure an opportunity to check the check displays on the first to fourth notification display devices 201 to 204 before starting the process for advancing the game.

On the other hand, since the setting confirmation process (step SB711) or the setting value update process (step SB718) does not end until the setting key insertion unit 68a is turned OFF by at least the manager of the game hall, by the time the setting confirmation process (step SB711) or the setting value update process (step SB718) is ended, more time than is required for the symbol display device 41 to start operating and for the initial settings to be completed will have passed. In this case, by preventing the wait process from being executed when the setting confirmation process (step SB711) or the setting value update process (step SB718) is executed, it is possible to prevent the time required for the process to proceed with the game from being excessively long when the setting confirmation process (step SB711) or the setting value update process (step SB718) is executed.

In addition, when the setting confirmation process (step SB711) or the setting value update process (step SB718) is executed, a check display is performed on the first to fourth notification display devices 201 to 204 after the setting confirmation process (step SB711) or the setting value update process (step SB718) is completed. This makes it possible to perform a check display on the first to fourth notification display devices 201 to 204 without affecting the display of the setting values using the first to fourth notification display devices 201 to 204.

<Fifty-third embodiment>
In this embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the 49th embodiment. The configuration that differs from the 49th embodiment will be described below. Note that the description of the same configuration as the 49th embodiment will basically be omitted.

FIG. 179 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step SB801 to step SB826 in the main processing is executed using a specific control program and specific control data in the main CPU 63.

First, the power-on initial setting process is executed (step SB801). In the power-on initial setting process, for example, the main process is started and then the process waits until a predetermined waiting time (specifically, one second) has elapsed before proceeding to the next process. During this predetermined waiting period, the operation start and initial setting of the pattern display device 41 are completed. In addition, access to the main RAM 65 is permitted.

Thereafter, internal function register setting processing is executed (step SB802). In the internal function register setting process, as in the thirty-fifth embodiment, the interrupt cycle of the first timer interrupt process (FIG. 133), which is a process that is started by periodically interrupting the main process, is set as the first interrupt cycle. (specifically, 4 milliseconds), and set the interrupt cycle of the second timer interrupt process (Figure 134), which is a process that is started by periodically interrupting the main process, to be longer than the first interrupt cycle. The second interrupt period is also set to be a short period (specifically, 2 milliseconds).

In other words, in this embodiment, as in the 35th embodiment, the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134) exist as timer interrupt processing so that the interrupt period is relatively long and short. Both the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134) are started by interrupting the main processing. Also, the second timer interrupt processing (FIG. 134) is started by interrupting the first timer interrupt processing (FIG. 133). On the other hand, the first timer interrupt processing (FIG. 133) is not started by interrupting the second timer interrupt processing (FIG. 134). Also, if both the first interrupt period and the second interrupt period have elapsed in a situation where both the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134) are not being executed, the second timer interrupt processing (FIG. 134) is started first, regardless of the order in which those periods have elapsed. In this respect, it can be said that the second timer interrupt process (FIG. 134) is a process that is started with priority over the first timer interrupt process (FIG. 133). However, this is not limited to this, and the first timer interrupt process (FIG. 133) may be configured to be started with priority over the second timer interrupt process (FIG. 134).

In the internal function register setting process, the first interrupt period of the first timer interrupt process (Fig. 133) is set in a specified register of the main CPU 63, and the second interrupt period of the second timer interrupt process (Fig. 134) is set in a specific register of the main CPU 63. In addition to setting the first and second interrupt periods, the internal function register setting process also executes processes for setting the numerical ranges of various counters, such as the numerical range of the winning random number counter C1.

Thereafter, the start-up process flag provided in the work area 221 for specific control is set to "1" (step SB803). As in the thirty-fifth embodiment, even if the first timer interrupt process (FIG. 133) is activated, the start-up processing flag is used to indicate whether the first timer interrupt process (FIG. 133) is in progress or not. The situation is such that the first timer interrupt processing (Fig. 133) should be terminated without executing the processing for advancing the game, while executing the processing for monitoring power outage, updating various counters, and monitoring fraud. This is a flag for specifying by the main CPU 63.

The start-up processing flag is set to "1" when the processing at the start of the supply of operating power (steps SB801 to SB818, steps SB823 to SB826) is started in the main processing (Fig. 165), and is cleared to "0" before the processing at the start of the supply of operating power ends and the remaining processing (steps SB819 to SB822) is started. As in the 35th embodiment, in the first timer interrupt processing (Fig. 133), if the start-up processing flag is set to "1", the processing of steps S8907 to S8920 is not executed, so that it is possible to prevent the processing for progressing the game from being executed in the processing at the start of the supply of operating power (steps SB801 to SB818, steps SB823 to SB826) when the setting confirmation processing (step SB810) or the setting value update processing (Fig. 181) described later is being executed. On the other hand, as described above, even if the start-up processing in progress flag is set to "1" in the first timer interrupt processing (FIG. 133), by executing the processing of steps S8901 to S8905, power outage monitoring is performed even in a situation where the setting confirmation processing (step SB810) or setting value update processing (FIG. 181) described below is being executed among the processing at the start of the supply of operating power (steps SB801 to SB818, steps SB823 to SB826), and the winning random number counter C1, the big win type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and further fraud detection is performed.

In particular, even if the startup processing flag is set to "1", the power outage information storage process (step S8901) is executed, so that even if a power outage occurs in a situation where the setting confirmation process (step SB810) or the setting value update process (FIG. 181), which will be described later, is being executed among the processes at the start of the supply of operating power (steps SB801 to SB818, steps SB823 to SB826), a power outage process can be executed. In the power outage process, as in the 35th embodiment, the power outage flag provided in the work area 221 for specific control is set to "1", a checksum is calculated, and the calculated checksum is stored in the work area 221 for specific control, so that when the supply of operating power is restarted, it is possible to prevent the occurrence of an abnormality in the main RAM 65 from being identified. As a result, if a power outage occurs during the setting confirmation process (step SB810) or the setting value update process (FIG. 181), it is possible to identify the occurrence of a power outage during these setting-related processes at the start of the supply of operating power the next time.

Incidentally, in a situation where the setting confirmation process (step SB810) or the setting value update process (Figure 181) is being executed, neither the first timer interrupt process (Figure 133) nor the second timer interrupt process (Figure 134) Interrupts are not prohibited and can be interrupted at any time. In this case, if the first timer interrupt process (FIG. 133) or the second timer interrupt process (FIG. 134) is activated by interrupting the setting confirmation process (step SB810) or the setting value update process (FIG. 181), Information on the return address of the main process (FIG. 179) for returning after the timer interrupt process that was the target of activation is completed is saved to the stack area 222 for specific control, and the timer interrupt process is activated. The information of various registers of the main CPU 63 immediately before is saved to the stack area 222 for specific control. Then, when the timer interrupt processing that was the activation target ends, the process returns to the main processing (FIG. 179) corresponding to the return address information saved in the stack area 222 for specific control, and The information saved in the stack area 222 for specific control is returned to various registers of the main CPU 63.

After setting the start-up processing flag to "1" in step SB803, it is determined whether or not the power outage flag provided in the work area 221 for specific control is set to "1" (step SB804). . When the power outage process is executed in the power outage information storage process (step S8901) of the first timer interrupt process (FIG. 133), the power outage flag is set to "1". The power outage flag is a flag used by the main CPU 63 to determine whether or not the power outage process was appropriately performed during the previous power shutoff.

If the power failure flag is set to "1" (step SB804: YES), it is determined whether the checksum is normal (step SB805). Specifically, first, the checksum is calculated for the specific control work area 221 and the specific control stack area 222. The method of calculating the checksum is the same as that of the 33rd embodiment. Then, the checksum for the specific control work area 221 and the specific control stack area 222 that was calculated and stored in the specific control work area 221 in the power failure processing executed immediately before the supply of operating power to the main CPU 63 was stopped is read, and the read checksum is compared with the checksum calculated as described above in the current main processing. Then, it is determined whether the checksums match.

If the checksums match (step SB805: YES), it is determined whether the setting value corresponding to the information stored in the setting reference area 341 (see FIG. 154) in the work area 221 for specific control is within the normal range (step SB806). The setting reference area 341 is a storage area in which information for identifying the current setting value of the pachinko machine 10 by the main CPU 63 is stored, as in the 45th embodiment. If the numerical information of "1" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 1". If the numerical information of "2" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 2". If the numerical information of "3" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 3". If the numerical information of "4" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 is "setting 4". If the numerical information "5" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 will be "Setting 5." If the numerical information "6" is stored in the setting reference area 341, the current setting value of the pachinko machine 10 will be "Setting 6." In step SB806, it is determined whether the setting value information stored in the setting reference area 341 is any of "1" to "6."

If an affirmative determination is made in all steps SB804 to SB806, it is determined whether or not the reset button 68c is pressed (step SB807). In other words, it is determined whether or not the pachinko machine 10 is powered on while the reset button 68c is pressed and the supply of operating power to the main CPU 63 is started. Here, in this embodiment, like the thirty-fifth embodiment, the main controller 60 is provided with a setting key insertion section 68a and a reset button 68c, but is not provided with an update button 68b. Furthermore, the main control device 60 is provided with first to fourth notification display devices 201 to 204, as in the eleventh embodiment, instead of the first to third notification display devices 69a to 69c.

If the reset button 68c is not pressed (step SB807: NO), it is determined whether the game stop flag or the setting update display flag provided in the work area 221 for specific control is set to "1" (step SB808).

The game stop flag is a flag that is set to "1" if the power failure flag is not set to "1", if the checksums do not match, or if the set value is abnormal. By setting the game stop flag to "1", the processes of steps S8901 to S8905 are executed in the first timer interrupt process (Fig. 133), while the processes of steps S8907 to S8920 are not executed by making a positive determination in step S8906. As a result, if the power failure flag is not set to "1" because the power failure process was not performed properly at the time of the previous power failure, if the checksums do not match due to a change in the storage state of information in at least one of the work area 221 for specific control and the stack area 222 for specific control since the previous power failure, or if the set value is abnormal, the processes for power failure monitoring, updating of various counters, and fraud monitoring are executed, but the processes for progressing the game are not executed.

The setting update display flag is a flag for the main CPU 63 to identify that the setting value update process (FIG. 181) is being executed, as in the 35th embodiment. When the setting update display flag is set to "1", the first to fourth notification display devices 201 to 204 display an indication that the setting value is being updated and an indication that the setting value is being updated. The setting update display flag is a flag that is set to "1" when the setting value update process (FIG. 181) is started and cleared to "0" when the setting value update process (FIG. 181) is terminated. Therefore, when the setting value update process (FIG. 181) is not being executed, the setting update display flag is not basically set to "1". However, when the supply of operating power to the main CPU 63 is stopped while the setting value update process (FIG. 181) is being executed, the setting update display flag is set to "1" when the supply of operating power to the main CPU 63 is started thereafter. The setting update display flag will remain set to "1" until the setting value update process (Figure 181) clears the setting update display flag to "0."

If a negative judgment is made in step SB808 because the game stop flag and the setting update display flag are not set to "1", it is judged whether the setting key insertion unit 68a has been turned ON using the setting key (step SB809). If the setting key insertion unit 68a has been turned ON using the setting key (step SB809: YES), a setting confirmation process is executed (step SB810). The processing content of the setting confirmation process is the same as the setting confirmation process in the 49th embodiment (FIG. 166). Note that in this embodiment, even if the supply of operating power is stopped while the setting confirmation process is being executed, the setting confirmation process is not executed unless a "setting confirmation operation" is performed when the supply of operating power is resumed.

If the setting key insertion section 68a has not been turned on using a setting key (step SB809: NO), a normal return command is sent to the audio emission control device 81 (step SB811). The processing contents executed by the audio emission control device 81 when a normal return command is received are the same as those in the forty-ninth embodiment.

On the other hand, if it is determined in step SB807 that the reset button 68c has been pressed, and it is determined that the setting key insertion section 68a has been turned on using the setting key (steps SB807 and SB812 :YES), the setting value update process is executed (step SB813). In other words, in this embodiment, even if the setting update display flag in the work area 221 for specific control is set to "1", the "setting change operation" is not performed when the supply of operating power to the main CPU 63 is started. The setting value update process will not be executed until then. Details of the setting value update process will be explained later.

If it is determined in step SB807 that the reset button 68c has been pressed, and it is determined that the setting key insertion section 68a has not been turned ON using the setting key (step SB812: NO), it is determined whether the game stop flag or the setting update display flag in the work area 221 for specific control is set to "1" (step SB814).

If both the game stop flag and the setting update display flag are not set to "1" (step SB814: NO), the first RAM clear process is executed (step SB815). In the first RAM clear process, similar to the RAM clear process (step SA416) in the 45th embodiment, the specific control work area 221 is cleared to "0" and the initial setting is executed, except for the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the specific control work area 221 (i.e., the setting reference area 341). As a result, the area indicating whether the winning/losing lottery mode is the high probability mode or not is cleared to "0", so that the winning/losing lottery mode becomes the low probability mode regardless of the winning/losing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. In addition, the game round is not being executed, and the open/close execution mode is not being executed, and further, the normal map display unit 38a is not displayed in a variable manner and the normal power role 34a is in a closed state. In addition, the reserved storage area 65a and the normal power reserved area 65c provided in the work area 221 for specific control are also cleared to "0", so that the reserved information for the special map display unit 37a is erased and the reserved information for the normal map display unit 38a is erased. In addition, the setting update display flag and the setting confirmation display flag provided in the work area 221 for specific control are cleared to "0". In addition, the setting update area 342 provided in the work area 221 for specific control is cleared to "0". In addition, in the first RAM clearing process, the stack area 222 for specific control is cleared to "0" and the initial setting is performed. In addition, in the first RAM clearing process, various registers of the main CPU 63 are also cleared to "0" and then the initial setting is performed. In this initial setting, the same process as the internal function register setting process of step SB802 is performed. Note that the process for clearing to "0" and the process for performing the initial setting are not performed for the work area 223 for non-specific control and the stack area 224 for non-specific control.

Then, a clear-time return command is sent to the audio and light emission control device 81 (step SB816). The processing contents executed by the audio and light emission control device 81 when the clear-time return command is received are the same as those in the 49th embodiment.

When the process of step SB810, step SB811, step SB813, or step SB816 is executed, information corresponding to the initial check period (specifically, 5 seconds) is set in a checking counter provided in the work area 221 for specific control (step SB817). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is started, as in the 35th embodiment. When a value of 1 or more is set in the checking counter, the first to fourth notification display devices 201 to 204 continue to display the check, as in the 35th embodiment.

According to the above configuration, when the supply of operating power to the main CPU 63 is started, the processing at the time of starting the supply of operating power (step SB801 to step SB818, step SB823 to step SB826) is completed in the main CPU 63. Later and before the residual processing (steps SB819 to SB822) is started, an initial check period is started. As a result, there is no need to control the initial check period in a situation where processing at the start of supply of operating power is being executed, reducing the processing load in a situation where processing at the start of supply of operating power is being executed. becomes possible.

In addition, the setting confirmation process (step SB810) and the setting value update process (FIG. 181) are executed as processes at the start of the supply of operating power (steps SB801 to SB818, steps SB823 to SB826), whereas the initial check period starts after the processes at the start of the supply of operating power are completed. This makes it possible to ensure that even if a check display is performed on the first to fourth notification display devices 201 to 204 during the initial check period, this does not affect the display of the setting values using the first to fourth notification display devices 201 to 204.

Then, the start-up processing in progress flag in the work area 221 for specific control is cleared to "0" (step SB818). By clearing the start-up processing in progress flag to "0", if the first timer interrupt processing (FIG. 133) is started, a negative judgment is made in step S8906, which causes not only the processing of steps S8901 to S8905 but also the processing of steps S8907 to S8920 to be executed, and the state in which processing for progressing the game is not executed is released. Note that in step SB818, the power outage flag in the work area 221 for specific control is also cleared to "0".

Then, proceed to the remaining processing of steps SB819 to SB822. In other words, the main CPU 63 is configured to periodically execute the first timer interrupt processing (FIG. 133) and the second timer interrupt processing (FIG. 134), but there is a remaining time between the first timer interrupt processing and the next timer interrupt processing. This remaining time varies depending on the processing completion time of each timer interrupt processing, but this irregular time is used to repeatedly execute the remaining processing of steps SB819 to SB822. In this respect, the remaining processing of steps SB819 to SB822 can be said to be non-periodic processing that is executed non-periodically. In steps SB819 to SB822, the same processing is executed as steps S113 to S116 of the main processing (FIG. 9) in the first embodiment.

If a negative judgment is made in any of steps SB804 to SB806 in the main processing (Fig. 179), i.e., if the power outage flag is not set to "1", if the checksums do not match, or if the set value is abnormal, the game stop flag in the work area 221 for specific control is set to "1" (step SB823). As already explained, setting the game stop flag to "1" causes the processing of steps S8901 to S8905 to be executed in the first timer interrupt processing (Fig. 133), whereas a positive judgment is made in step S8906, and therefore the processing of steps S8907 to S8920 is not executed. As a result, if the power outage flag is not set to "1" because power outage processing was not performed properly the previous time the power was cut off, if the checksums do not match because the information storage state has changed since the previous power outage in at least one of the work area 221 for specific control and the stack area 222 for specific control, or if the setting value is abnormal, processing for power outage monitoring, updating of various counters, and fraud monitoring will be executed, but processing for progressing the game will not be executed.

Thereafter, it is determined whether or not the reset button 68c has been pressed (step SB824). If the reset button 68c is not pressed (step SB824: NO), an abnormality command indicating that an abnormality has occurred regarding the power outage flag, checksum, or set value at the start of supply of operating power is sent to the audio emission control device 81. (Step SB825). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emitting section 53 to emit light in a manner corresponding to the information abnormality at the time of starting supply of operating power, and also issues a message from the speaker section 54 saying, ``Please change the settings.'' ” will be output. Further, a character image "Please change the settings" is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, even if the supply of operating power to the pachinko machine 10 is once stopped, the above notification will not be sent when the supply of operating power to the pachinko machine 10 is resumed until the setting value update process (FIG. 181) is executed. It will be restarted.

Thereafter, external output processing in the event of an abnormality is executed (step SB826). In the external output process at the time of an abnormality, a process for externally outputting an abnormal signal to the management computer of the gaming hall is executed. In this case, the abnormality signal is output for a predetermined period (for example, 100 milliseconds). However, the present invention is not limited to this, and in a situation where an event that triggers the execution of the process in step SB826 occurs, the signal output of the abnormal signal continues, and the event that triggers the execution of the process in step SB826 does not occur. It is also possible to adopt a configuration in which the signal output of the abnormal signal is stopped when the abnormality signal is not detected. Furthermore, the abnormality signal is not output only in step SB826, but may also be output through other processing. For example, an abnormal signal may also be generated when it is identified that fraud has occurred in the monitored object (detection of unauthorized radio waves or detection of unauthorized magnetism) in the fraud detection processing (step S8905) of the first timer interrupt processing (FIG. 133). It is output externally. However, the present invention is not limited to such a configuration in which the abnormal signal is also used, and a configuration in which the abnormal signal dedicated to step SB826 is output externally may be adopted.

If the reset button 68c is pressed (step SB824: YES), it is determined whether the setting key insertion section 68a is turned on using a setting key (step SB812). When the reset button 68c is pressed and the setting key insertion section 68a is turned on using a setting key (step SB812 and step SB824: YES), a setting value update process is executed (step SB813). In other words, if operating power is supplied to the main CPU 63 while a "setting change operation" is being performed, an abnormality has occurred in the main RAM 65, so a negative result is determined in any of steps SB804 to SB806. Even if a determination is made, the setting value update process (FIG. 181) is executed. This makes it possible to prioritize changes to set values.

On the other hand, if the reset button 68c is pressed but the setting key insertion part 68a is not turned on (step SB824: YES, step SB812: NO), the game stop flag or setting update in the work area 221 for specific control It is determined whether the display flag is set to "1" (step SB814). In the process of step SB814 after the game stop flag is set to "1" at step SB823, since the game stop flag is naturally set to "1", an affirmative determination is made at step SB814. In this case, an abnormality command is transmitted to the audio emission control device 81 in step SB825, and an abnormality signal is externally outputted in step SB826. Thereafter, the process proceeds to the remaining processing of steps SB819 to SB822 without executing the processing of steps SB817 and SB818.

In other words, if an abnormality occurs in the power failure flag, checksum, and setting value and a negative judgment is made in any of steps SB804 to SB806, the first RAM clear process (step SB815) is not executed even if the supply of operating power to the main CPU 63 is started in a situation where the "RAM clear operation" is being performed. Also, the first RAM clear process (step SB815) is not executed even if the supply of operating power to the main CPU 63 is started in a situation where the game stop flag is set to "1" and the "RAM clear operation" is being performed. This makes it possible to prevent the state in which the game stop flag is set to "1" from being canceled even if the supply of operating power to the main CPU 63 is started in a situation where the "RAM clear operation" is being performed. On the other hand, if a "setting change operation" is being performed, the setting value update process (Fig. 181) is executed regardless of whether the game stop flag is set to "1" or not, and the game stop flag is cleared to "0" in the initial setting at the start of the setting value update process (Fig. 181), as will be described later in detail. As a result, in order to cancel the state in which the game stop flag is set to "1", it becomes necessary to execute the setting value update process (FIG. 181). Therefore, when an information abnormality occurs in the work area 221 for specific control, it becomes possible to require not only the process for initializing the work area 221 for specific control, but also the resetting of the setting value.

Here, if it is determined in step SB807 that the reset button 68c is not pressed, the game stop flag or setting update display flag in the work area 221 for specific control is set to "1" in step SB808. If it is determined that this is the case, an abnormality command is transmitted to the audio emission control device 81 in step SB825, and an abnormality signal is outputted to the outside in step SB826. After executing these processes, the process proceeds to the remaining processes of steps SB819 to SB822 without executing the processes of steps SB817 and SB818. Further, when it is determined in step SB807 that the reset button 68c has been pressed, and it is determined in step SB812 that the setting key insertion part 68a has not been turned on (that is, when a "RAM clear operation" has been performed) ), if the game stop flag or setting update display flag in the work area 221 for specific control is set to "1", an affirmative determination is made in step SB814, and a sound emission is performed in step SB825. The abnormality command is transmitted to the control device 81, and at the same time, an abnormality signal is outputted to the outside in step SB826. After executing these processes, the process proceeds to the remaining processes of steps SB819 to SB822 without executing the processes of steps SB817 and SB818.

Next, with reference to the time chart of FIG. 180, a description will be given of the subsequent processing when the supply of operating power to the main CPU 63 is stopped while the setting value update process (FIG. 181) is being executed. . FIG. 180(a) shows the period during which the power of the pachinko machine 10 is in the ON state, and FIG. 180(b) shows the processing at the start of supply of operating power (step SB801 to step SB818, step SB823 to step SB826). FIG. 180(c) shows a period in which the process is being executed after the process at the start of the supply of operating power (steps SB801 to SB818, steps SB823 to SB826) is completed, FIG. 180(d) shows the period during which the setting value update process (FIG. 181) is being executed, and FIG. 180(e) shows the setting update display flag in the specific control work area 221 being set to "1". FIG. 180(f) shows a period when the start-up processing flag in the specific control work area 221 is set to "1", and FIG. 180(g) shows an abnormal signal being output to the outside. Indicates the period.

At timing t1, the power of the pachinko machine 10 is turned on as shown in FIG. 180(a). In this case, the pachinko machine 10 is powered on while the "setting change operation" is being performed. At the timing of t1, as shown in FIG. 180(b), the main CPU 63 starts the process for starting the supply of operating power (step SB801 to step SB818, step SB823 to step SB826), and at the same time, as shown in FIG. ), the start-up processing flag in the specific control work area 221 is set to "1".

Then, at the timing t2, the setting value update process (FIG. 181) is started as shown in FIG. 180(d). In this case, at the timing t2, the setting update display flag in the work area 221 for specific control is set to "1" as shown in FIG. 180(e).

After that, as shown in FIG. 180(d), at timing t3, which is a situation in which the setting value update process (FIG. 181) is being executed, the pachinko machine 10 is powered off, so that the main CPU 63 The supply of operating power is stopped. Therefore, as shown in FIG. 180(b), the processing at the start of supply of operating power (step SB801 to step SB818, step SB823 to step SB826) is completed, and the setting value update processing (as shown in FIG. 180(d)) FIG. 181) ends.

After that, at timing t4, the power to the pachinko machine 10 is turned ON again as shown in FIG. 180(a). In this case, the power to the pachinko machine 10 is turned ON when the "RAM clear operation" has been performed. At timing t4, as shown in FIG. 180(b), the main CPU 63 starts processing when the supply of operating power starts (steps SB801 to SB818, steps SB823 to SB826). Also, as shown in FIG. 180(e) and FIG. 180(f), both the setting update display flag and the startup processing in progress flag in the work area 221 for specific control remain set to "1" as they were before the previous stoppage of the supply of operating power.

This time, the power to the pachinko machine 10 is turned on when the "RAM clear operation" is performed while the setting update display flag is set to "1", so the first RAM clear process (step SB815) is not executed, and an abnormality signal is output to the outside for a predetermined period (e.g., 100 milliseconds) from timing t5 to timing t7, as shown in FIG. 180 (g). Also, at timing t5, an abnormality notification based on the transmission of an abnormality command is initiated.

As shown in FIG. 180(b), the process at the start of the supply of operating power (steps SB801 to SB818, and steps SB823 to SB826) that began at time t4 ends at time t6. Then, at time t6, the process after the process at the start of the supply of operating power (steps SB801 to SB818, and steps SB823 to SB826) ends starts.

In this case, as shown in FIG. 180(f), the start-up processing in progress flag in the work area 221 for specific control is set to "1", so even if the first timer interrupt process (FIG. 133) is started, the processes for power outage monitoring, updating of various counters, and fraud monitoring are executed, but the processes for progressing the game are not executed. Then, at timing t8, as shown in FIG. 180(a), the power supply to the main CPU 63 is stopped by turning off the power to the pachinko machine 10. Also, at timing t8, the post-supply processing is completed as shown in FIG. 180(c).

After that, at timing t9, the power to the pachinko machine 10 is turned on again as shown in FIG. 180(a). In this case, the power to the pachinko machine 10 is turned on when the "setting change operation" has been performed. At timing t9, as shown in FIG. 180(b), the main CPU 63 starts processing when the supply of operating power starts (steps SB801 to SB818, steps SB823 to SB826). Also, as shown in FIG. 180(e) and FIG. 180(f), both the setting update display flag and the startup processing in progress flag in the work area 221 for specific control remain set to "1" as they were before the previous stoppage of the supply of operating power.

After that, the setting value update process (Fig. 181) is executed from timing t10 to timing t11 as shown in Fig. 180(d). In this case, the setting value update process (Fig. 181) ends normally. Then, at timing t11, which is the timing of this end, the setting update display flag is cleared to "0" as shown in Fig. 180(e). Also, at timing t11, the process at the start of the supply of operating power (steps SB801 to SB818, steps SB823 to SB826) ends as shown in Fig. 180(b). As a result, at timing t11, the start-up process in progress flag is cleared to "0" as shown in Fig. 180(f). Then, at timing t11, the process after the process at the start of the supply of operating power (steps SB801 to SB818, steps SB823 to SB826) ends is started as shown in Fig. 180(c). In this case, the startup processing flag has already been cleared to "0," so when the first timer interrupt process (FIG. 133) is started, not only will it perform processes for power outage monitoring, updating of various counters, and fraud monitoring, but it will also perform processes for progressing the game.

If the supply of operating power to the main CPU 63 is stopped while the setting value update process (FIG. 181) is being executed as described above, when the supply of operating power to the main CPU 63 is restarted, Unless a "setting change operation" is performed, the processing at the start of supply of operating power (steps SB801 to SB818, steps SB823 to SB826) involves sending an abnormality command to the audio emission control device 81 and outputting an abnormality signal to the outside. is executed, and even if a "RAM clear operation" has been performed, the first RAM clear process (step SB815) will not be executed, and even if a "settings confirmation operation" has been performed, the settings confirmation process ( Step SB810) is never executed. Furthermore, when the abnormality command is transmitted to the audio emission control device 81 and the abnormality signal is externally outputted, a process (step Since the remaining processing (steps SB819 to SB822) is executed without executing SB818), power outage monitoring, updating of various counters, and fraud monitoring are performed even if the first timer interrupt processing (Fig. 133) is activated. The process for advancing the game is not executed. As a result, if the supply of operating power to the main CPU 63 is stopped while the setting value update process (Fig. 181) is being executed, the supply of operating power to the main CPU 63 is stopped when the "setting change operation" is performed. It becomes necessary to restart the supply of operating power and execute the setting value update process (FIG. 181). Therefore, it is possible to reliably change the set value.

Next, the setting value update process in this embodiment, which is executed in step SB813 of the main process (FIG. 179), will be described with reference to the flowchart in FIG. 181. Note that the processes in steps SB901 to SB918 in the setting value update process are executed using a program for specific control and data for specific control in the main CPU 63.

First, set the OFF confirmation flag 361 to "1" (step SB901). The OFF confirmation flag 361 is provided in the work area 221 for specific control, as shown in the explanatory diagram of FIG. 182. Even in this embodiment, in the setting value update process (FIG. 181), the value of the setting update area 342 of the work area 221 for specific control, i.e., the setting value to be updated, is incremented by 1 each time the reset button 68c is pressed. In this case, in order to increment the setting value to be updated only by "1" for each pressing of the reset button 68c, when the reset button 68c goes from a non-operating state to an operating state, i.e., when the detection signal from the detection sensor that detects the operation of the reset button 68c switches from a non-operating state to an operating state, the value of the setting update area 342 is incremented by 1, thereby incrementing the setting value to be updated by 1.

In this configuration, the OFF confirmation flag 361 is a flag for checking whether the timing is when pressing of the reset button 68c has started when checking whether the reset button 68c has been pressed in the setting value update process (FIG. 181). After the process of determining whether the reset button 68c has been pressed (step SB910) is executed in the setting value update process (FIG. 181), if it is determined that the reset button 68c has been pressed, the flag is set to "1" or the set state of "1" is maintained, and if it is determined that the reset button 68c has not been pressed, the flag is cleared to "0" or the state of "0" is maintained.

Here, the setting value update process (FIG. 181) is executed on the condition that it is determined that the reset button 68c is pressed in step SB807 or step SB824 of the main process (FIG. 179), as already described. In step SB807 or step SB824, the main CPU 63 directly monitors the input port into which the detection signal from the detection sensor that detects whether or not the reset button 68c has been pressed, determines whether the reset button 68c has been pressed. Determine whether In this case, instead of checking the start timing and end timing of the pressing operation of the reset button 68c, it is checked whether the reset button 68c is being pressed. Therefore, in step SB807 or step SB824, an affirmative determination is made without checking the OFF confirmation flag 361 if a signal corresponding to the reset button 68c being pressed is input to the input port.

However, in this configuration, the end timing of pressing the reset button 68c when pachinko machine 10 is powered on to start the setting value updating process (FIG. 181) and the start timing of the setting value updating process (FIG. 181) are different. Depending on the relationship, there will be cases where the pressing operation becomes a trigger for adding 1 to the setting value to be updated, and cases where it does not become the trigger. In this case, the update mode of the setting value to be updated changes depending on the end timing of the pressing operation of the reset button 68c when the power of the pachinko machine 10 is turned on, resulting in a decrease in operability. On the other hand, in a configuration in which the setting value to be updated is incremented by 1 when it is determined that the reset button 68c is pressed in a situation where the OFF confirmation flag 361 is set to "0", the setting value update process is performed. (FIG. 181) is started, the OFF confirmation flag 361 is set to "1" in step SB901, which is executed before the process of determining whether or not the reset button 68c is pressed. By doing so, it is possible to prevent the setting value to be updated from being incremented by 1 due to the pressing operation of the reset button 68c when the power of the pachinko machine 10 is turned on.

After executing the process of step SB901, interrupt permission is set (step SB902). As a result, the first timer interrupt process (FIG. 133) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 134) is interrupted and activated in the second interrupt cycle. In this embodiment, as in the forty-ninth embodiment, the processing at the start of the supply of operating power (steps SB801 to SB818, steps SB823 to SB826) basically involves the first timer interrupt processing (FIG. 133) and the first timer interrupt processing (FIG. 133). Interrupts in the 2-timer interrupt process (FIG. 134) are prohibited, and interrupts are permitted in the setting confirmation process (step SB810) and the setting value update process (FIG. 181). Therefore, in a situation where the setting confirmation process (step SB810) and the setting value update process (FIG. 181) are not executed in the process at the start of the supply of operating power (step SB801 to step SB818, step SB823 to step SB826), the In a situation where execution of the 1st timer interrupt processing (FIG. 133) and the 2nd timer interrupt processing (FIG. 134) is prohibited, and the setting confirmation processing (step SB810) or the setting value update processing (step SB810) is being executed, the 1st timer Execution of timer interrupt processing (FIG. 133) and second timer interrupt processing (FIG. 134) is permitted. However, in a situation where the setting confirmation process (step SB810) or the setting value update process (Fig. 181) is being executed, the start-up process flag is set to "1", so the first timer interrupt process (Fig. 133) is started, among the various processes of the first timer interrupt process (Fig. 133), the processes for power outage monitoring, updating of various counters, and fraud monitoring are executed, while the processes for proceeding with the game are executed. The first timer interrupt process (FIG. 133) is ended without any process being executed.

Then, on condition that the setting update display flag provided in the work area 221 for specific control is not set to "1", the setting update display flag is set to "1" (step SB903). By setting the setting update display flag to "1", a positive judgment is made in step S9003 of the second timer interrupt process (FIG. 134), and a setting process (step S9004) is executed for the fifth display data buffer 275 during the setting update. The processing content of the setting process for the fifth display data buffer 275 during the setting update is the same as that of the 45th embodiment. By executing this process, for example, as shown in the explanatory diagram of FIG. 124(a), a display indicating that the setting value of the pachinko machine 10 is being updated and a display of the setting value selected as the update target of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204.

Then, the initial setting at the start is performed (step SB904). In this initial setting, the game stop flag provided in the work area 221 for specific control is cleared to "0". The game stop flag is a flag that is set to "1" in step SB823 of the main processing (FIG. 179) when the power outage processing was not performed properly at the previous power outage and the power outage flag was not set to "1" (step SB804: NO), when the checksums do not match due to the fact that the storage state of information has changed since the previous power outage for at least one of the work area 221 for specific control and the stack area 222 for specific control (step SB805: NO), or when the setting value corresponding to the information stored in the setting reference area 341 is not within the normal range (step SB806: NO). By setting the game stop flag to "1", the processing of steps S8901 to S8905 is executed in the first timer interrupt processing (FIG. 133), but by making a positive determination in step S8906, the processing of steps S8907 to S8920 is not executed. As a result, when an information abnormality occurs in the main RAM 65 as described above, the processing for power outage monitoring, updating of various counters, and fraud monitoring is executed, but the processing for progressing the game is not executed. By clearing the game stop flag to "0" in the processing of step SB904, it is possible to release the state in which the occurrence of an information abnormality in the main RAM 65 has been identified when the setting value update processing (FIG. 181) is executed.

After that, "1" is set in the setting update area 342 (see FIG. 154) in the work area 221 for specific control (step SB905). The setting update area 342 is a storage area in which information on the setting value being updated is stored in the setting value update process (FIG. 181) as in the 45th embodiment. When the numerical information of "1" is stored in the setting update area 342, the setting value to be updated (selected or changed) becomes "Setting 1". When the numerical information of "2" is stored in the setting update area 342, the setting value to be updated becomes "Setting 2". When the numerical information of "3" is stored in the setting update area 342, the setting value to be updated becomes "Setting 3". When the numerical information of "4" is stored in the setting update area 342, the setting value to be updated becomes "Setting 4". When the numerical information of "5" is stored in the setting update area 342, the setting value to be updated becomes "Setting 5". When the numerical information of "6" is stored in the setting update area 342, the setting value to be updated becomes "Setting 6".

By setting "1" in the setting update area 342 in step SB905, the setting value to be updated becomes "Setting 1." In other words, in this embodiment, regardless of the current setting value of the pachinko machine 10, when the setting value update process (FIG. 181) is started, the setting value to be updated becomes "Setting 1."

Thereafter, an update start command is sent to the audio emission control device 81 (step SB906). When the audio emission control device 81 receives the update start command, it displays an image showing that the setting value update process (FIG. 181) is being executed, and an image that makes it possible to recognize the operation details for changing the setting value. , and the display control device 82 is controlled to display an image on the symbol display device 41 so that the operation details for terminating the setting value update process (FIG. 181) can be recognized. This allows the game hall administrator to recognize that the setting value is being changed, and the operation details and setting value update process necessary to change the setting value (Figure 181) It becomes possible for the manager of the game hall to recognize the details of the operation required to end the game. In addition to or instead of the notification being executed by the symbol display device 41, the notification may be executed by at least one of the display light emitting section 53 and the speaker section 54. Further, an external output indicating that the setting value update process (FIG. 181) is being executed may be configured to be sent to a device external to the pachinko machine 10, such as a management computer of a game hall.

Then, it is determined whether the setting value information stored in the setting update area 342 is any one of "1" to "6" (step SB907). If it is not any one of "1" to "6" (step SB907: NO), "1" is set in the setting update area 342 (step SB908). As a result, the setting value to be updated becomes "Setting 1".

If a positive determination is made in step SB907 or if the processing of step SB908 is executed, it is determined whether the setting key insertion unit 68a has switched from the ON state to the OFF state using the setting key (step SB909). Specifically, it is determined whether the reception state of the signal received from the detection sensor that detects the state of the setting key insertion unit 68a has changed from a reception state corresponding to the ON state to a reception state corresponding to the OFF state.

If a negative determination is made in step SB909, it is determined whether or not the reset button 68c is pressed (step SB910). Specifically, it is determined whether or not the reset button 68c is pressed by directly monitoring an input port into which a detection signal from a detection sensor that detects whether or not the reset button 68c is pressed. If the reset button 68c is not pressed (step SB910: NO), the OFF confirmation flag 361 in the specific control work area 221 is cleared to "0" (step SB911), and then the process returns to step SB907.

If the reset button 68c is pressed (step SB910: YES), it is determined whether the value of the OFF confirmation flag 361 in the specific control work area 221 is "0" (step SB912). If the OFF confirmation flag 361 is set to "1" (step SB912: NO), the current confirmation timing is not the start timing of the pressing operation of the reset button 68c, but the pressing operation of the reset button 68c is being continued. Therefore, the process returns to step SB907 without adding 1 to the setting value to be updated.

If the value of the OFF confirmation flag 361 is "0" (step SB912: YES), this means that the current confirmation timing is the start timing of pressing the reset button 68c. In this case, after setting the OFF confirmation flag 361 to "1" (step SB913), the value of the setting update area 342 is incremented by 1 (step SB914). As a result, the setting value is updated to the next higher setting value each time the reset button 68c is pressed once. Also, if the reset button 68c is not pressed (step SB910: NO), if the OFF confirmation flag 361 is set to "1" (step SB912: NO), or if the value of the setting update area 342 is incremented by 1 (step SB914), the process returns to step SB907. However, if it is determined in step SB907 that the value of the setting update area 342 is 7 or more, "1" is set in the setting update area 342 in step SB908. As a result, if the reset button 68c is pressed once when the setting is "Setting 6," the setting will return to "Setting 1."

If it is determined that the setting key insertion section 68a has switched from the ON state to the OFF state (step SB909: YES), the setting value information stored in the setting update area 342 is overwritten in the setting reference area 341 ( Step SB915). As a result, the setting value information updated in the current setting value update process (FIG. 181) is set in the setting reference area 341, and the setting value corresponding to the set information is changed to the current setting value. This is the setting value of the pachinko machine 10.

Then, interrupts are disabled (step SB916). As a result, when the setting value update process (FIG. 181) is terminated and the process at the start of the supply of operating power in the main process (FIG. 179) (steps SB801 to SB818, steps SB823 to SB826) is returned to, interrupts in the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) are disabled.

Then, the second RAM clear process is executed (step SB917). In the second RAM clear process, similar to the RAM clear process (step SA416) in the 45th embodiment, the work area 221 for specific control is cleared to "0" and the initial setting is executed, except for the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control (i.e., the setting reference area 341). As a result, the area indicating whether the winning/losing lottery mode is the high probability mode or not is cleared to "0", so that the winning/losing lottery mode becomes the low probability mode regardless of the winning/losing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. In addition, the game round is not being executed, and the open/close execution mode is not being executed, and further, the normal map display unit 38a is not displayed in a variable manner and the normal power role 34a is in a closed state. In addition, the reserved storage area 65a and the normal power reserved area 65c provided in the work area 221 for specific control are also cleared to "0", so that the reserved information for the special chart display unit 37a is erased and the reserved information for the normal chart display unit 38a is erased. In addition, the setting update display flag and the setting confirmation display flag provided in the work area 221 for specific control are cleared to "0". In addition, the setting update area 342 provided in the work area 221 for specific control is cleared to "0". In addition, the game stop flag provided in the work area 221 for specific control is cleared to "0". In the second RAM clear process, the stack area 222 for specific control is cleared to "0" and the initial setting is performed. In addition, in the second RAM clear process, various registers of the main CPU 63 are also cleared to "0" and then the initial setting is performed. In this initial setting, the same process as the internal function register setting process of step SB802 is performed. Note that the process for clearing to "0" and the process for performing the initial setting are not performed for the work area 223 for non-specific control and the stack area 224 for non-specific control.

Thereafter, a return command at the time of update is transmitted to the audio emission control device 81 (step SB918). The processing contents executed by the audio emission control device 81 when a return command at the time of update is received are the same as in the forty-ninth embodiment.

Next, the manner in which the setting values to be updated are updated will be described with reference to the time chart in Figure 183. Figure 183(a) shows the period during which the power of the pachinko machine 10 is ON, Figure 183(b) shows the operation status of the setting key insertion section 68a, Figure 183(c) shows the operation status of the reset button 68c, Figure 183(d) shows the period during which the setting value update process (Figure 181) is being executed, Figure 183(e) shows the setting status of the OFF confirmation flag 361, and Figure 183(f) shows the timing of updating the setting values.

First, a comparative example will be described in which the OFF confirmation flag 361 is not set to "1" when the setting value update process (FIG. 181) is started.

At time t1, as shown in FIG. 183(b), the setting key insertion section 68a is turned on using the setting key, and the reset button 68c is pressed, as shown in FIG. 183(c). Then, at time t2, when the setting key insertion section 68a is being turned on and the reset button 68c is being pressed, the power to the pachinko machine 10 is turned on, as shown in FIG. 183(a). In this case, the power to the pachinko machine 10 is being turned on when a "setting change operation" has been performed, and so the setting value update process (FIG. 181) is started at time t3, as shown in FIG. 183(d).

In this comparative example, when the setting value update process (FIG. 181) is started, the OFF confirmation flag 361 is not set to "1", so at timing t3, as shown in FIG. 183(e), the value of the OFF confirmation flag 361 is "0". Then, at timing t4, when the reset button 68c continues to be pressed when the power is turned on, it is determined that the reset button 68c is being pressed while the value of the OFF confirmation flag 361 is "0", and the setting value to be updated is incremented by 1, as shown in FIG. 183(f). Also, at timing t4, the OFF confirmation flag 361 is set to "1", as shown in FIG. 183(e).

In other words, in the above comparative example, the pressing operation of the reset button 68c at the time of turning on the power is continued even after the start of the setting value update process (FIG. 181), and the setting value to be updated is changed to 1 due to the pressing operation. It will be added. In this case, even though the administrator of the game hall has no intention of updating the setting values to be updated, the setting values to be updated will be updated.

Next, we will explain this embodiment in which the OFF confirmation flag 361 is set to "1" when the setting value update process (Figure 181) is started.

At the timing of t5, as shown in FIG. 183(b), the setting key insertion section 68a is turned on using the setting key, and as shown in FIG. 183(c), the reset button 68c is pressed. Then, at the timing of t6, when the setting key insertion section 68a is turned on and the reset button 68c is pressed, as shown in FIG. 183(a), the power supply of the pachinko machine 10 is turned on. In this case, the power supply of the pachinko machine 10 is turned on in a state in which the "setting change operation" has been performed, so that the setting value update process (FIG. 181) is started at the timing of t7, as shown in FIG. 183(d). When the setting value update process (FIG. 181) is started, a process of setting the OFF confirmation flag 361 to "1" is executed in step SB901. Therefore, at the timing of t7, as shown in FIG. 183(e), the OFF confirmation flag 361 is set to "1". The timing at which this OFF confirmation flag 361 is set to "1" is before the timing at which it is determined in the setting value update process (FIG. 181) whether the reset button 68c has been pressed, so the setting value to be updated is not incremented by 1 even if the reset button 68c continues to be pressed when the power is turned on, as shown in FIG. 183(f). After that, at timing t8, the pressing of the reset button 68c ends, as shown in FIG. 183(c), and the OFF confirmation flag 361 is cleared to "0," as shown in FIG. 183(e).

Then, as shown in FIG. 183(c), the reset button 68c is pressed from time t9 to time t10, from time t11 to time t12, and from time t13 to time t14. In this case, the reset button 68c is pressed when the value of the OFF confirmation flag 361 is "0" at each of times t9, t11, and t13, so the setting value to be updated is incremented by 1 at each of these times, as shown in FIG. 183(f).

After that, at timing t15, the setting key insertion section 68a is turned OFF as shown in FIG. 183(b), which ends the setting value update process (FIG. 181) at timing t15 as shown in FIG. 183(d).

As described above, in the configuration in which the setting value to be updated is incremented by 1 when it is determined that the reset button 68c is pressed in the situation where the OFF confirmation flag 361 is set to "0", the setting value update process (Fig. 181) is started, the OFF confirmation flag 361 is set to "1" in step SB901, which is executed before the process of determining whether or not the reset button 68c is pressed. This makes it possible to prevent the setting value to be updated from being incremented by 1 due to the pressing operation of the reset button 68c when the power of the pachinko machine 10 is turned on.

According to this embodiment described in detail above, the following excellent effects are achieved.

When the setting value update process (FIG. 181) is started, the setting value is changed from a predetermined start-corresponding setting value. This makes it possible to change the setting value from a certain start-corresponding setting value in the setting value update process (FIG. 181) regardless of the setting value to be used before the setting value update process (FIG. 181) is started. This makes it easy for the operator to understand the work content of the setting value change operation.

The setting value corresponding to the above start is specifically "Setting 1", which has the lowest degree of advantage. Therefore, when the setting value update process (Fig. 181) is started, the setting value is changed from "Setting 1", which has the lowest degree of advantage. As a result, even if the manager of the amusement hall unintentionally ends the setting value update process (Fig. 181) immediately after it has started, the setting value will have the lowest degree of advantage, so it is possible to prevent unintended disadvantages from occurring to the amusement hall even if play is started in such a situation.

The work area 221 for specific control is provided with a setting reference area 341 and a setting update area 342, and information corresponding to the setting value to be used is stored in the setting reference area 341, and information corresponding to the setting value being changed while the setting value update process (FIG. 181) is being executed is stored in the setting update area 342. This makes it possible to change the setting value to be updated in the setting value update process (FIG. 181) while storing and holding information on the setting value that was set before the setting value update process (FIG. 181) was started in the setting reference area 341.

If the supply of operating power to the main CPU 63 is stopped while the setting value update process (Fig. 181) is being executed, a restricted state will be entered in which processing to progress the game will not be started when the supply of operating power to the main CPU 63 is subsequently resumed. This makes it possible to prevent processing to progress the game from being started even if the setting value update process (Fig. 181) has not been completed.

Even if the supply of operating power to the main CPU 63 is stopped while the setting value update process (Fig. 181) is being executed, the above-mentioned restricted state will not occur if the "setting change operation" is performed when the supply of operating power to the main CPU 63 is subsequently resumed. This makes it possible to prevent the execution of processes for progressing the game from being restricted even when the setting value is changed.

Even in the above-mentioned restricted state, power outage monitoring and various counter updating processes are executed. This makes it possible to ensure the execution of necessary processing even when the progress of the game is restricted as described above. In particular, by performing power outage monitoring, even if the progress of the game is restricted, if a power outage occurs, it becomes possible to deal with it appropriately.

The above-mentioned restricted state is resumed when the supply of operating power is resumed, even if the supply of operating power is stopped. This makes it possible to ensure that the state in which the execution of processing for progressing the game is restricted by stopping the supply of operating power to the main CPU 63 while the setting value update process (Figure 181) is being executed is not released simply by stopping the supply of operating power.

In a configuration in which the setting value to be updated is incremented by 1 when it is determined that the reset button 68c is pressed in a situation where the OFF confirmation flag 361 in the work area 221 for specific control is set to "0", the setting When the value update process (FIG. 181) is started, the OFF confirmation flag 361 is set to "1" in step SB901, which is executed before the process of determining whether or not the reset button 68c is pressed. It is configured to do this. This makes it possible to prevent the setting value to be updated from being incremented by 1 due to the pressing operation of the reset button 68c when the power of the pachinko machine 10 is turned on.

In addition, if the supply of operating power to the main CPU 63 is stopped during the setting value update process (Figure 181), and the setting confirmation process (step SB810) is executed when the supply of operating power to the main CPU 63 is subsequently resumed, the setting update display flag may be cleared to "0" and the execution of the process for progressing the game may not be restricted. Since the current setting value to be used is notified by executing the setting confirmation process (step SB810), the manager of the game hall can know the setting value to be used. In such a case, even if the execution of the process for progressing the game is not restricted, the game will not progress with the setting value that the manager of the game hall did not expect.

In addition, if the supply of operating power to the main CPU 63 is stopped during the setting value update process (FIG. 181), whether or not a "setting change operation" is performed when the supply of operating power is subsequently restarted. A configuration may be adopted in which the setting value update process (FIG. 181) is forcibly executed regardless of the setting value update process (FIG. 181). This makes it possible to forcibly change the set value.

In addition, if the supply of operating power to the main CPU 63 is stopped during the setting confirmation process (step SB810), a restricted state may be established in which the execution of processing for progressing the game is restricted when the supply of operating power is subsequently resumed. In this case, the restricted state may not be established when the setting confirmation process (step SB810) is executed when the supply of operating power is resumed, and in addition to or instead of this configuration, the restricted state may not be established when the setting value update process (Figure 181) is executed when the supply of operating power is resumed.

In addition, if the supply of operating power to the main CPU 63 is stopped during the setting confirmation process (step SB810), the setting confirmation process (step SB810) may be forcibly executed when the supply of operating power is subsequently resumed, regardless of whether or not the "setting confirmation operation" has been performed. This makes it possible to forcibly check the setting value.

In addition, in the setting value update process (FIG. 181), it is determined that the reset button 68c is not pressed in the previous processing time in two consecutive processing times, and the reset button 68c is pressed in the subsequent processing time. Although the configuration is such that the setting value of the selection target is changed when it is determined that a pressing operation is being performed, the configuration is not limited to this, and the reset button 68c is changed at each of a plurality of consecutive past processing times. When it is determined that the reset button 68c is not being pressed, and in that situation, it is determined that the reset button 68c is being pressed in one processing time or in a plurality of consecutive processing times, the setting value of the selection target is changed. It is also possible to have a configuration in which Even in this case, when the setting value update process (FIG. 181) is started, information regarding the confirmation history of press operations of the reset button 68c in a plurality of past consecutive processing times is stored. By rewriting the information to the information corresponding to the setting value update process (FIG. 181), the setting value to be selected in the setting value update process (FIG. 181) will be changed by pressing the reset button 68c to start the setting value update process (FIG. 181). It is possible to prevent this from happening.

<54th embodiment>
In this embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from the above-described 53rd embodiment. Hereinafter, the configuration that is different from the above-described 53rd embodiment will be explained. Note that descriptions of the same configurations as those of the fifty-third embodiment described above will be basically omitted.

Figure 184 is a flowchart showing the main processing in this embodiment that is executed by the main CPU 63. Note that the processing of steps SC101 to SC128 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

In steps SC101 to SC106, the same processes as steps SB801 to SB806 of the main process (FIG. 179) in the 53rd embodiment are executed. If an affirmative determination is made in all steps SC104 to SC106, it is determined whether or not the reset button 68c is pressed (step SC107). Further, if the reset button 68c is not pressed (step SC107: NO), it is determined whether the setting update display flag in the work area 221 for specific control is set to "1" (step SC108). ). If the reset button 68c is not pressed and the setting update display flag is not set to "1" (step SC107 and step SC108: NO), the game stop flag in the work area 221 for specific control is set to "1". ” is set (step SC109). If the game stop flag is set to "1", an abnormality command is transmitted in step SC127, and external output processing at the time of abnormality is executed in step SC128.

If the game stop flag is not set to "1" (step SC109: NO), the process advances to step SC110. In steps SC110 to SC112, the same processes as steps SB809 to SB811 of the main process (FIG. 179) in the 53rd embodiment are executed.

If it is determined in step SC107 that the reset button 68c is pressed, or if it is determined in step SC108 that the setting update display flag is set to "1", in step SC113 the setting key insertion section 68a It is determined whether or not the button is turned on using the setting key. If it is determined that the setting key insertion section 68a has been turned on (step SC113: YES), after setting the OFF confirmation flag 361 in the work area 221 for specific control to "1" (step SC114), the setting A value update process is executed (step SC115). Note that in steps SC116 to SC128, the same processes as steps SB114 to SB826 of the main process (FIG. 179) in the 53rd embodiment are executed.

In other words, in this embodiment, if the supply of operating power to the main CPU 63 is stopped during the execution of the setting value update process (step SC115), there is a situation where there is "no operation" or a "RAM clear operation" is performed. If the supply of operating power to the main CPU 63 is restarted under the circumstances, the situation in which the processing for advancing the game is blocked continues as in the 53rd embodiment, while the "setting change operation" Not only when the supply of operating power to the main CPU 63 is resumed in a situation where "setting confirmation operation" has been performed, but also when the supply of operating power to the main CPU 63 is resumed in a situation where "setting confirmation operation" has been performed. Setting value update processing (step SC115) is executed. As a result, when the supply of operating power to the main CPU 63 is resumed after the supply of operating power to the main CPU 63 is stopped during the execution of the setting value update process (step SC115), the setting value update process (step SC115) is resumed. Step SC115) becomes easier to execute.

In particular, when performing a "setting change operation," it is necessary to use the setting key to turn on the setting key insertion section 68a and press the reset button 68c, and when performing a "setting confirmation operation," the setting key is used to set the setting key. In a configuration where it is necessary to turn on the key insertion section 68a, if the setting update display flag is set to "1", the setting key insertion section 68a will be turned on even if the reset button 68c is not pressed. The setting value update process (step SC115) is executed. As a result, although the setting value update process (step SC115) is started by turning on the power of the pachinko machine 10 in a situation where a "setting change operation" is performed, for example, the power is turned off by mistake during the process. In order to quickly return the power to the ON state in the event that It becomes possible to execute the value update process (step SC115).

Further, in this embodiment, if it is determined in step SC112 that the setting key insertion section 68a has been turned on, before the setting value update process (step SC115) is started, in step SC114, the workpiece for specific control is The OFF confirmation flag 361 in the area 221 is set to "1". As a result, when the setting value update process (step SC115) is started, even if the OFF confirmation flag 361 is not set to "1", the reset button 68c is pressed when the power is turned ON. It becomes possible to prevent the setting value to be updated from being incremented by 1. Incidentally, in the setting value update process (step SC115) in this embodiment, the process in step SB901 of the setting value update process (FIG. 181) in the 53rd embodiment is not executed, and the processes in steps SB902 to SB918 are executed. executed.

In the setting value update process (step SC115), the setting value of the selection target is changed when it is determined that the reset button 68c has not been pressed in the previous processing cycle and that the reset button 68c has been pressed in the subsequent processing cycle in two consecutive processing cycles. However, the present invention is not limited to this, and the setting value of the selection target may be changed when it is determined that the reset button 68c has not been pressed in each of the past consecutive processing cycles and that the reset button 68c has been pressed in one processing cycle or multiple consecutive processing cycles in that situation. Even in this case, when the setting value update process (step SC115) is started, the information on the confirmation history of the pressing of the reset button 68c in the past consecutive processing cycles is rewritten to information corresponding to the reset button 68c being pressed, so that the setting value of the selection target is not changed in the setting value update process (FIG. 181) by pressing the reset button 68c to start the setting value update process (FIG. 181).

<Other embodiments>
Note that the present invention is not limited to the contents described in the embodiments described above, and various modifications and improvements can be made without departing from the spirit of the present invention. For example, the following changes may be made. Incidentally, the configurations of the following alternative forms may be applied individually to the configuration of the above embodiment, or may be applied in combination.

(1) In the first to fourteenth embodiments described above, the number of occurrences of the opening/closing execution mode per unit game is calculated as a parameter indicating the frequency of occurrence of the opening/closing execution mode, but in addition to or instead of this, In addition, it may be configured to calculate the result of dividing the number of occurrences of the opening/closing execution mode by the total number of game balls discharged from the game area PA. In addition to or in place of this, there is also a configuration that calculates the result of dividing the number of times the opening/closing execution mode occurs by the total number of balls entering the first operating port 33 and the number of balls entering the second operating port 34. You can also use it as Further, the configuration may be applied to the fifteenth to fifty-fourth embodiments described above.

(2) In the first to fourteenth embodiments, the parameters indicating the frequency of occurrence of the high-frequency support mode are the number of occurrences of the high-frequency support mode per unit game and the number of occurrences of the opening/closing execution mode. In addition to or in place of this, the configuration may be configured to calculate the result of dividing the number of occurrences of the high-frequency support mode by the total number of game balls ejected from the gaming area PA. good. In addition to or in place of this, the result is calculated by dividing the number of occurrences of the high-frequency support mode by the total number of balls entering the first operating port 33 and the number of balls entering the second operating port 34. It may also be a configuration. Further, the configuration may be applied to the fifteenth to fifty-fourth embodiments described above.

(3) The game result that triggers the opening and closing execution mode may include not only a big win result but also a small win result. When a small win result occurs, the opening and closing execution mode occurs, but the win/lose selection mode and the support mode do not change before and after the opening and closing execution mode. In addition, the opening and closing execution mode that results in a small win may be configured to be a low-frequency winning mode. In this case, when a big win result occurs, history information corresponding to the occurrence of the big win result may be stored in the history memory 117, and when a small win result occurs, history information corresponding to the occurrence of the small win result may be stored in the history memory 117. In addition, in this configuration, a parameter indicating the occurrence frequency of the big win result and a parameter indicating the occurrence frequency of the small win result may be calculated by using the history information stored in the history memory 117. In addition, this configuration may be applied to the above-mentioned 15th to 54th embodiments.

The probability of winning a small win result may be configured to change depending on the setting state of the pachinko machine 10, or may not change. When the probability of winning a small win result is configured to change depending on the setting state of the pachinko machine 10, the higher the setting value, the higher the probability of winning a small win result, or the higher the setting value, the lower the probability of winning a small win result.

In addition, in a configuration in which there is a small hit result, reservation information is obtained when a game ball enters the first operating port 33 and retention information is obtained when a game ball enters the second operating port 34. The distribution ratio of the type of jackpot result in the case of a jackpot result is different depending on the pending information, and when aiming to enter the first operation port 33, the variable display unit 36 in the gaming area PA The firing operation is performed so that the game ball flows down the area on the left side, and when aiming the ball to enter the second operating port 34, the game ball flows down the area on the right side of the variable display unit 36 in the game area PA. The configuration may be such that the firing operation is performed as shown in FIG.

In this configuration, the following 51st parameter may exist as a management result of the game history. Note that the normal period is the sum of the execution period of the opening/closing execution mode triggered by a small hit result based on the ball entering the first operating port 33 and the execution period of the low frequency support mode instead of the opening/closing execution mode. do. In addition, the number of balls entering the out port 24a during the normal period is the number of balls entering K51, the number of balls entering the general winning hole 31 during the normal period is the number K52 of entering balls, and the number of balls entering the special electric winning device 32 during the normal period. The number of balls entering the first operating port 33 during the normal period is K54, and the number of balls entering the second operating port 34 during the normal period is the number K55 of entering balls.
-51st parameter: Total number of game balls paid out during the regular period (K52 x "Number of prize balls for winning in the general winning slot 31" + K53 x "Number of prize balls for winning in the special electric winning device 32" + K54 x "1st Ratio of "Number of prize balls for winning in the operating port 33" + K55 x "Number of prize balls for winning in the second operating port 34") / Total number of game balls discharged from the technique area PA during the normal period (K51 + K52 + K53 + K54 + K55) Above In the configuration in which the 51st parameter is calculated, if the probability of winning a small win varies depending on the setting state of the pachinko machine 10, the normal value of the 51st parameter may vary depending on the setting state of the pachinko machine 10. becomes. Therefore, it is preferable that the history information used to calculate the 51st parameter be deleted when the setting state of the pachinko machine 10 is changed. On the other hand, if the winning probability of the small winning result does not vary depending on the setting state of the pachinko machine 10, the normal value of the 51st parameter does not vary depending on the setting state of the pachinko machine 10. Therefore, it is preferable that the history information used to calculate the 51st parameter is not deleted even if the setting state of the pachinko machine 10 is changed.

(4) In the first to fourteenth embodiments, the history information corresponding to the occurrence of the opening/closing execution mode is stored in the history memory 117 regardless of which type of jackpot result occurs. Therefore, history information corresponding to the type of jackpot result may be stored in the history memory 117. In this case, a configuration may be adopted in which a parameter indicating the frequency of occurrence is calculated for each type of jackpot result. Further, the configuration may be applied to the fifteenth to fifty-fourth embodiments described above.

(5) In the first to fourteenth embodiments, the various parameters (the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters) are periodically calculated. However, the present invention is not limited to this. For example, the various parameters may be calculated when the total number of game balls discharged from the game area PA reaches a calculation trigger number (e.g., 10,000 balls), when the supply of operating power to the pachinko machine 10 is stopped, or when the number of game plays reaches a calculation trigger number (e.g., 1,000 times). In this case, the history memory 117 may be cleared to "0" when the various parameters are calculated. This configuration may also be applied to the fifteenth to fifty-fourth embodiments.

(6) In the first to fourteenth embodiments, all of the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters are calculated each time the timing for calculating various parameters is reached. However, the present invention is not limited to this. Only some of the various parameters are calculated at one calculation timing, and the parameter group to be calculated may be changed sequentially each time the timing for calculating is reached. For example, the first to eighth parameters may be calculated at one calculation timing, the eleventh to eighteenth parameters may be calculated at the next calculation timing, the twenty-first to twenty-sixth parameters may be calculated at the next calculation timing, the thirty-first parameter and the forty-first to forty-second parameters may be calculated at the next calculation timing, and the change of the calculation target in the above order may be repeated each time the timing for calculating is reached. This makes it possible to reduce the processing load for calculating parameters when a calculation timing is reached. This configuration may also be applied to the fifteenth to fifty-fourth embodiments.

(7) In the first to fourteenth embodiments described above, calculations of various parameters using history information in the history memory 117 may be executed on the condition that a game is being played. For example, the configuration may be such that calculations of various parameters are executed on the condition that game balls are supplied to the game area PA. This makes it possible to prevent calculations of various parameters from being needlessly repeated even though no game is being played. Further, the configuration may be applied to the fifteenth to fifty-fourth embodiments described above.

(8) In the first to fourteenth embodiments described above, the configuration is not limited to the configuration in which the management IC 66 is provided separately from the main CPU 63, and the function of the management IC 66 is performed by the main CPU 63. It may also be a configuration. In this case, the correspondence information will be stored in the main ROM 64 in advance. Furthermore, a configuration may be adopted in which a history memory 117, a calculation result memory 131, and a separate storage memory 171 are provided separately from the main RAM 65. A configuration may be adopted in which the function of the storage memory 171 is fulfilled. In a configuration where the main side RAM 65 functions as the history memory 117, the calculation result memory 131, and the separate storage memory 171, when the main side RAM 65 clearing process (step S105, step S117) is executed, the history memory 117, the calculation result memory 131, and the separate storage memory 171 are It may be configured such that part or all of the areas corresponding to each of the memory 117, the calculation result memory 131, and the separate storage memory 171 are cleared to "0." The area corresponding to each of the memory 171 may be excluded from the target of "0" clearing, and may be configured to be cleared to "0" when the corresponding clearing conditions in each of the above embodiments are satisfied. Furthermore, it is also possible to configure the main RAM 65 to have different manual operations for executing clear processing in areas corresponding to the history memory 117, calculation result memory 131, and separate storage memory 171 and other areas. good. Alternatively, the function of the management IC 66 may be performed by the sound emission control device 81.

(9) In the first to fourteenth embodiments described above, when a new setting is made to the setting state of the pachinko machine 10, the history information in the history memory 117 is stored and retained without being deleted; A configuration may also be adopted in which various parameters stored in the result memory 131 are deleted. Thereby, after a new setting of the setting state is performed, it is possible to prevent notification of various parameters calculated before the new setting is performed. Further, the configuration may be applied to the fifteenth to fifty-fourth embodiments described above.

(10) In the third to fifth embodiments described above, even if a new setting of the setting state of the pachinko machine 10 is performed (that is, even if the setting value update process is executed by the main CPU 63), the corresponding If the setting value is not changed before and after the setting, the clearing process of the history memory 117 may not be executed. This makes it possible to prevent the history information in the history memory 117 from being deleted even though the setting value has not been changed.

In this configuration, the area for storing setting values in the main side RAM 65 is configured so that it is not cleared to "0" even if the entire clearing process (step S117) is executed, so that the setting value update process ( It becomes possible for the main CPU 63 to specify whether the set value has been changed before or after step S118). In this case, if the main CPU 63 identifies that the setting value has not been changed, a signal is output to the management CPU 112 so that the setting update recognition process is not executed in the management CPU 112, and the main CPU 63 If it is determined that a setting value has been changed, a signal may be output to the management CPU 112 so that the management CPU 112 executes a setting update recognition process.

In addition, when a signal indicating that a new setting has been made to the setting state of the pachinko machine 10 is received from the main CPU 63, the management CPU 112 may be configured to determine whether or not the setting value has been changed by referring to the history information stored in the history memory 117. In this case, it is possible to prevent the history memory 117 from being cleared when the management CPU 112 determines that the setting value has not been changed, and to clear the history memory 117 when the management CPU 112 determines that the setting value has been changed.

(11) In the third to fifth embodiments described above, even if a new setting is made to the setting state of the pachinko machine 10 (i.e., even if the main CPU 63 executes a setting value update process), if the setting value has not changed before and after the setting, the calculation process of various parameters triggered by the new setting of the setting state may not be executed. This makes it possible to prevent various parameters from being calculated in response to the new setting of the setting state even if the setting value has not been changed.

In this configuration, the area for storing setting values in the main side RAM 65 is configured so that it is not cleared to "0" even if the entire clearing process (step S117) is executed, so that the setting value update process ( It becomes possible for the main CPU 63 to specify whether the set value has been changed before or after step S118). In this case, if the main CPU 63 identifies that the setting value has not been changed, a signal is output to the management CPU 112 so that the setting update recognition process is not executed in the management CPU 112, and the main CPU 63 If it is determined that a setting value has been changed, a signal may be output to the management CPU 112 so that the management CPU 112 executes a setting update recognition process.

Furthermore, when a signal indicating that a new setting of the pachinko machine 10 has been set is received from the main CPU 63, the management CPU 112 can refer to the history information stored in the history memory 117. It may be configured to specify whether or not the setting value has been changed. In this case, if the management CPU 112 determines that the setting values have not been changed, calculations of various parameters triggered by new settings in the current setting state are not executed, and the management CPU 112 When it is determined that a value has been changed, calculations of various parameters can be executed using the new setting of the current setting state as a trigger.

(12) In the third to fifth embodiments, when a new setting is made for the setting state of the pachinko machine 10, various parameters are calculated in various calculation processes (step S1807) at that point. The various parameters stored in the calculation result memory 131 at that time are stored in the area to be stored among the first to fifth separate storage areas 172 to 176 of the separate storage memory 171, and the calculation The information stored in the result memory 131 may be cleared to "0". In this case, since there is no need to calculate various parameters under the situation where a new setting is made for the setting state of the pachinko machine 10, it is possible to quickly complete the storage of various parameters in the separate storage memory 171. Become.

(13) In the third to fifth embodiments, the contents of various parameters stored in the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 are changed by performing a predetermined display start operation. It may be configured to be displayed on the first to third notification display devices 69a to 69c or other display devices. The predetermined display start operation may be performed by operating a dedicated operation section, or may be performed by performing a predetermined dedicated operation on an operation section for performing other operations. This makes it possible to easily check various parameters stored in the separate storage memory 171.

(14) Although the configuration is such that all of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 are targets for storing history information (or ball entry history), this is not limited to this, and only some of the outlet 24a, general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 may be targets for storing history information. For example, only the general winning opening 31, special electric winning device 32, and second operating opening 34 may be targets for storing history information, or only the general winning opening 31 may be targets for storing history information. Even in this case, it is possible to grasp the ball entry patterns of game balls during a specified period for the ball entry sections for which history information is stored.

(15) Signal paths 118a-118c are set to transmit information corresponding to the ball's entry results for the first entry port detection sensor 42a, the second entry port detection sensor 43a, and the third entry port detection sensor 44a, respectively. However, this is not limited to this, and information corresponding to the ball entry results for the same type of entry port may be transmitted as one type of information even if there are multiple ball entry ports of the same type and multiple ball entry detection sensors corresponding to them. This makes it possible to reduce the number of types of information transmitted from the main CPU 63 to the management IC 66.

(16) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the type of information transmitted from the main CPU 63 to the management IC 66 and each of the buffers 122a to 122o is transmitted from the main CPU 63 to the management IC 66. However, this is not limited to the above, and the correspondence information may be pre-stored in the management IC 66. In this case, it is not necessary to execute a process to cause the management IC 66 to recognize the correspondence information, and therefore it is possible to reduce the processing load on the main CPU 63.

(17) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the type of information transmitted from the main CPU 63 to the management IC 66 and each of the buffers 122a to 122o is transmitted from the main CPU 63 to the management IC 66 when the supply of operating power to the main CPU 63 starts. However, the present invention is not limited to this. For example, the main CPU 63 and the management IC 66 may be capable of two-way communication, and the correspondence information may be transmitted from the main CPU 63 to the management IC 66 when a signal requesting the transmission of the correspondence information is received from the management IC 66. In this case, the correspondence memory 116 is provided as a non-volatile memory and is configured to be used for both reading and writing, and the correspondence information provided from the main CPU 63 to the management IC 66 after the shipment of the pachinko machine 10 is stored and held in the correspondence memory 116 even if the supply of operating power to the main CPU 63 is stopped. This makes it possible to reduce the frequency with which the correspondence information is transmitted.

(18) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the type of information sent from the main CPU 63 to the management IC 66 and each buffer 122a to 122o is transmitted from the main CPU 63 to the management IC 66. Although the configuration is such that transmission is performed using the signal paths 118a to 118g for transmitting information on the detection results of the respective ball entry detection sensors 42a to 48a, the present invention is not limited to this, and the correspondence relationship A configuration may be adopted in which a dedicated signal path for transmitting information from the main CPU 63 to the management IC 66 is provided. This allows the management IC 66 to know which type of information it is receiving from the main CPU 63 based on the type of the buffers 122a to 122o that receive the information.

(19) In the first to fourteenth embodiments described above, information is transmitted from the main CPU 63 to the management IC 66, but information is not transmitted from the management IC 66 to the main CPU 63; however, the present invention is not limited to this. Instead, the configuration may be such that information is transmitted from the management IC 66 to the main CPU 63. For example, a configuration may be adopted in which various parameters calculated by the management CPU 112 based on history information are transmitted to the main CPU 63. In this case, the main CPU 63 may be configured to directly execute notification control of the notification means so that notifications corresponding to the contents of the received various parameters are performed, and the main CPU 63 By sending commands corresponding to the contents of the parameters to the audio light emission control device 81, notifications corresponding to the contents of various parameters are executed using the symbol display device 41, the display light emission section 53, and the speaker section 54. It is also possible to have a configuration in which

(20) In the first to fourteenth embodiments, when the supply of operating power to the main CPU 63 is started, the main CPU 63 or the management CPU 112 is Various parameters may be calculated, and the contents of the calculated various parameters may be notified using the symbol display device 41, the display light emitting section 53, the speaker section 54, etc. In this case, when the gaming hall starts business, it is possible to confirm whether or not the entry state of game balls in the gaming area PA on the immediately preceding business day was normal. Further, the configuration may be applied to the fifteenth to fifty-fourth embodiments described above.

(21) In the above first to fourteenth embodiments, if the various parameters calculated based on the history information stored in the history memory 117 are abnormal, the pachinko machine 10 may be configured not to allow play to begin until a prohibition release operation is performed. The configuration for preventing play from beginning may be, for example, a configuration in which the launch of game balls is prohibited, a configuration in which the ball entry detection sensors 42a to 49a are disabled, or a configuration in which the winning/losing determination process is not executed even if a winning entry occurs in the first operating port 33 or the second operating port 34. The prohibition release operation may be an operation of turning on the power of the pachinko machine 10 again with the reset button 68c pressed, or an operation of an operation means that becomes operable when the gaming machine main body 12 is opened relative to the outer frame 11. This makes it possible to prevent play from continuing in a situation where the ball entry mode of the game ball in the game area PA is abnormal. It also makes it possible to prevent play from continuing in a situation where the frequency of occurrence of the opening/closing execution mode is abnormal. This configuration may also be applied to the above 15th to 54th embodiments.

(22) Although the history information corresponding to the detection results of the ball entry detection sensors 42a to 48a is stored in the history memory 117 in the first to fourteenth embodiments, the calculation of various parameters using the history information is A configuration may be adopted in which neither the main side CPU 63 nor the management side CPU 112 executes. In this case, the history information may be read by an external device electrically connected to the reading terminal 68d, and various parameter calculations may be performed using the read history information by the reading worker. Often, the configuration may be such that an external device executes calculations of various parameters using the read history information. In this case, it becomes possible to reduce the processing load on the main side CPU 63 and the management side CPU 112. Further, the configuration may be applied to the fifteenth to fifty-fourth embodiments described above.

(23) In the first to fourteenth embodiments, the management IC 66 is provided with a separate power source from the main CPU 63, and even if the supply of operating power to the main CPU 63 is stopped, the management IC 66 The configuration may be such that it is possible to calculate various parameters using history information and to output information on history information or various parameters. Thereby, even in a situation where the supply of operating power to the main CPU 63 is stopped, it becomes possible to read history information and various parameters with an external device.

(24) In the first to fourteenth embodiments, the read terminal 68d used to read the program from the main ROM 64 is configured to also be used as a terminal used to read history information or various parameters by an external device, but this is not limited to the above, and the terminal used to read history information or various parameters by an external device may be provided separately from the read terminal 68d for reading the program from the main ROM 64. In this case, the terminal used to read history information or various parameters may be provided in the MPU 62, or may be provided in a position on the main control board 61 separate from the MPU 62.

(25) In the first to fourteenth embodiments, the correspondence memory 116, the history memory 117, and the calculation result memory 131 are not limited to the configuration in which they are provided as nonvolatile storage means such as flash memory. For example, one of these memories 116, 117, and 131 is provided as a volatile storage means that requires power supply to store and retain information, and by supplying backup power to that memory, the main side The information may be stored and retained even if the supply of operating power to the CPU 63 is stopped. In this case, a configuration may be adopted in which a dedicated backup power device is provided for the memory, or a configuration in which backup power is supplied to the memory from the power supply/launch control device 78 that supplies backup power to the main side RAM 65. Good too.

(26) In the first to fourteenth embodiments, the management IC 66 is not limited to a configuration in which the management side CPU 112 is provided as a general-purpose CPU and performs storage processing of history information and calculation processing of various parameters based on the programs and data stored in the management side ROM 113, and a hardware circuit designed to have these functions may be formed in the management IC 66. Specifically, for example, in the first embodiment, when the hardware circuit receives a signal from the main CPU 63 indicating that a game ball has been detected by any of the detection sensors 42a to 48a, the correspondence information corresponding to the buffer that received the signal is stored from the correspondence memory 116 to the history memory 117, and the information of the RTC 115 at that time is stored in the history memory 117. Also, in the sixth embodiment, for example, when the hardware circuit receives a signal from the main CPU 63 indicating that a game ball has been detected by any of the detection sensors 42a to 48a, the counter value corresponding to the buffer that received the signal is incremented by one. Furthermore, when a calculation trigger occurs in the first embodiment or the like, the hardware circuit calculates various parameters using the history information at that time. Furthermore, when a trigger for external output to the read terminal 68d occurs, the hardware circuit outputs the various parameters that are the calculation results to the outside, as well as the history information to the outside.

(27) In the first to fourteenth embodiments described above, the main CPU 63 and the management IC 66 may be provided as separate chips, may be provided as separate boards, or may be provided as separate control devices. It is also possible to have a configuration provided as .

(28) The number of game balls entering the outlet 24a is counted, while history information including RTC information may be stored for game balls entering bonus-triggering entry sections that trigger the payout of prize balls and the win/lose determination process, such as the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34. This makes it possible to extract the history of game balls entering bonus-triggering entry sections, while calculating the frequency of game balls entering each bonus-triggering entry section relative to the total number of game balls dispensed.

(29) A configuration may be adopted in which the predetermined event that triggers the storage of history information includes events other than those in the above embodiments. For example, a configuration may be adopted in which at least one of the fact that the lower tray 56a becomes full, the timing at which the full state starts, and the timing at which the full state is canceled is stored as history information. The structure may be such that at least one of the fact that the no-ball state has been reached, the timing at which the no-ball state is started, and the timing at which the no-ball state is canceled is stored as history information, and the dispensing device 76 is in an abnormal state. In particular, a configuration may be adopted in which at least one of the timing when the abnormal state of the dispensing device 76 is started and the timing when the abnormal state of the dispensing device 76 is released is stored as history information. In this case, it becomes possible to grasp the frequency of occurrence of these events.

(30) In the first embodiment, the 16th buffer 122p of the input port 121 in the management side I/F 111 corresponds to the output instruction signal, which is preset in the design stage of the management IC 66. However, this is not limited to this, and the management IC 66 may recognize that the 16th buffer 122p corresponds to the output instruction signal by sending a type identification command from the main CPU 63. In addition, in the first embodiment, the 15th buffer 122o of the input port 121 in the management side I/F 111 corresponds to the setting value update signal, which is preset in the design stage of the management IC 66. However, this is not limited to this, and the management IC 66 may recognize that the 15th buffer 122o corresponds to the setting value update signal by sending a type identification command from the main CPU 63. In this case, it is not necessary to set in advance in the management IC 66 the correspondence between each buffer 122a to 122p and the type of signal input to the buffers 122a to 122p.

(31) In the first to fourteenth embodiments described above, the management IC 66 may be configured to send a normal operation signal to the main CPU 63 when it is operating normally. In this case, it becomes possible for the main CPU 63 to monitor whether the management IC 66 is operating normally.

(32) The display device that displays the setting value that is being updated in the setting value update process is not limited to the first to fourth notification display devices 201 to 204, and may be the symbol display device 41, It may also be a dedicated display device. Further, the display device that displays the setting value in the setting confirmation process is not limited to the first to fourth notification display devices 201 to 204, and may be the symbol display device 41, or a dedicated display device. It may be.

(33) The operation unit operated to update the setting value in the setting value update process is not limited to the update button 68b, and may be the reset button 68c. Further, when a setting key is inserted into the setting key insertion portion 68a and a turning operation is performed, positions corresponding to "Setting 1" to "Setting 6" are set as the rotation operation positions, and the setting key is inserted. A configuration may be adopted in which a setting value corresponding to the rotation operation position of the portion 68a is set. In addition, the setting key insertion part 68a is configured to be able to be rotated further than the ON position, and each time a rotation operation beyond the ON position is performed, the setting value in the middle of updating is changed to the setting value in the next order. The configuration may be updated.

(34) In the first to tenth and fifteenth to twenty-first embodiments, the first to third notification display devices 69a to 69c are arranged horizontally, but they are arranged in parallel in the vertical direction. It may be possible to have a structure in which there are two layers, a structure in which they are arranged diagonally in parallel, or a structure in which they are arranged in two rows, one above the other. Further, in the eleventh to fourteenth and twenty-second to forty-fourth embodiments, the first to fourth notification display devices 201 to 204 are arranged horizontally, but they are arranged in parallel in the vertical direction. It may be a configuration, a configuration in which they are arranged diagonally in parallel, or a configuration in which they are arranged in two levels, one above the other. Further, in the fifteenth to twenty-first embodiments, the first to fourth notification display devices 201 to 204 may be used as display devices for displaying the management results of game history.

(35) In the first to fourteenth embodiments, the history information used to calculate parameters whose normal values change according to the setting state of the pachinko machine 10 (hereinafter referred to as the history information of the change object) and the history information used to calculate parameters whose normal values do not change according to the setting state of the pachinko machine 10 (hereinafter referred to as the history information of the non-change object) may be stored in different areas in the history memory 117. In this case, when the setting state of the pachinko machine 10 is newly set or when the setting state of the pachinko machine 10 is changed, the area in the history memory 117 in which the history information of the change object is stored may be cleared to "0", while the area in the history memory 117 in which the history information of the non-change object is stored may not be cleared to "0". This allows accurate calculation of parameters whose normal values change according to the setting state of the pachinko machine 10 even after the setting value is changed, and can increase the accuracy of calculation of parameters whose normal values do not change according to the setting state of the pachinko machine 10. This configuration may also be applied to the fifteenth to fifty-fourth embodiments.

(36) In the above fifteenth to twenty-first embodiments, the stack area 222 for specific control and the stack area 224 for non-specific control may be configured not to be pre-specified in the main RAM 65. Even in this case, the areas corresponding to these stack areas 222, 224 will be specified in the main RAM 65 at the design stage of the pachinko machine 10, but if the storage capacity of the area is exceeded and the storage process for information specifying the area is executed, unintended information will be written to an area that was not originally intended, so the main RAM 65 may be configured to be cleared to "0".

(37) In the fifteenth to twenty-first embodiments described above, when the main side RAM 65 clearing process (step S105, step S117) is executed, the work area 221 for specific control and the stack area 222 for specific control are The work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to 0, but the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to 0. In step S117), not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". . In addition, in the clearing process of the main side RAM 65 (steps S105 and S117), not only the work area 221 for specific control and the stack area 222 for specific control, but also the normal counter area 231, the counter area 232 for opening/closing execution mode, and the high frequency Although the support mode counter area 233 is cleared to "0", the calculation result storage area 234 may not be cleared to "0". In this case, it becomes possible to protect the information stored in the calculation result storage area 234.

(38) In the fifteenth to twenty-fifth embodiments, the operation for clearing the work area 221 for specific control and the stack area 222 for specific control to “0” and the work area 223 for non-specific control and the The configuration may be such that the operation for clearing the specific control stack area 224 to "0" is a different operation. For example, when the supply of operating power to the pachinko machine 10 is started while operating the reset button 68c, the work area 221 for specific control and the stack area 222 for specific control are cleared to "0", and the update button 68b is pressed. When the supply of operating power to the pachinko machine 10 is started while the pachinko machine 10 is being operated, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". This makes it possible to selectively erase each piece of information. In addition, in this configuration, when the supply of operating power to the pachinko machine 10 is started while operating both the update button 68b and the reset button 68c, the work area 221 for specific control and the stack area 222 for specific control , the work area 223 for non-specific control, and the stack area 224 for non-specific control may all be cleared to "0". This makes it possible to improve work efficiency when erasing information in each area 221 to 224 all at once in a configuration that allows selective erasure as described above.

(39) In the above fifteenth to eighteenth and twentieth embodiments, similar to the nineteenth embodiment, the stack pointer information of the main CPU 63 may be saved to the work area 223 for non-specific control when processing corresponding to non-specific control is started, and the saved information may be restored to the stack pointer of the main CPU 63 when processing corresponding to specific control is resumed. This makes it possible to restore the state of the stack pointer of the main CPU 63 to the state before processing corresponding to non-specific control is started when processing corresponding to non-specific control is completed, even if the stack pointer information of the main CPU 63 may change when processing corresponding to non-specific control is started.

(40) In the fifteenth to twenty-fifth embodiments, processing for collecting gaming history information as processing corresponding to non-specific control, processing for calculating various parameters using the collected history information, and The configuration is such that processing for notifying calculation results is executed, but only part of these processes is executed as processing corresponding to non-specific control, and the rest is executed as processing corresponding to specific control. You can also use it as Additionally, in addition to or in place of the processing for collecting game history information, the processing for calculating various parameters using the collected history information, and the processing for notifying the calculation results, processing other than these processing may be performed. The configuration may be such that the process is executed as a process corresponding to non-specific control. For example, a configuration may be adopted in which at least one of fraud monitoring and notification of monitoring results is executed as a process corresponding to non-specific control.

(41) In the fifteenth to twenty-fifth embodiments, when the main CPU 63 returns to the process corresponding to specific control from the situation where the process corresponding to non-specific control is being executed, the flag register of the main CPU 63, Although the configuration is such that neither the stack pointer nor the various registers are saved to the main side RAM 65, instead of this, the main side CPU 63 can switch from a situation in which a process corresponding to non-specific control is being executed to a process corresponding to specific control. When returning, at least some information among the flag register, stack pointer, and various registers of the main CPU 63 is saved to the main RAM 65, and the process corresponding to the non-specific control is started again using the saved information. In such a case, the configuration may be such that the data is returned to the corresponding storage area of the main CPU 63. This makes it possible to carry over and use the information of the main CPU 63 used in processing corresponding to non-specific control.

(42) In the above fifteenth to twenty-fifth embodiments, various parameters are calculated when the total number of game balls discharged from the play area reaches 6,000. However, the total number of game balls that triggers the calculation may be more or less than 6,000. For example, various parameters may be calculated when the total number of game balls discharged from the play area reaches 60,000. In this case, the memory capacity required to store the game history information increases, but by storing the game history information in the management RAM 241 external to the MPU 62 as in the twenty-first embodiment, it is possible to flexibly respond to the increase in memory capacity.

(43) In the above fifteenth to twenty-fifth embodiments, the 61st to 68th parameters are calculated as the result of managing the game history. In addition to or instead of this, at least some of the 31st, 41st, and 42nd parameters in the first embodiment may be calculated.

(44) In the above fifteenth to twenty-fifth embodiments, when a process for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control and the stack area 224 for non-specific control may be configured to be cleared to "0". In this case, when a process for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the normal counter area 231, the counter area 232 for the open/close execution mode, the counter area 233 for the high frequency support mode, and the calculation result storage area 234 are cleared to "0".

In addition, when a process for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, not only the work area 221 for specific control and the stack area 222 for specific control but also the normal counter area 231, the counter area for opening/closing execution mode 232, and the counter area for high frequency support mode 233 are cleared to "0", but the calculation result storage area 234 may not be cleared to "0". In this case, it is possible to protect the information stored in the calculation result storage area 234.

In addition, when a process to newly set the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the work area 221 for specific control and the stack area 222 for specific control are set to "0". ''Although the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to ``0'', the configuration may be such that they are not cleared. In this case, it becomes possible to protect the information stored in the work area 223 for non-specific control and the stack area 224 for non-specific control.

In addition, when the above configuration (43) is provided, when the process of newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the above-mentioned first Although the history information for calculating the 31st parameter, 41st parameter, and 42nd parameter in the embodiment is deleted, the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 And the calculation result storage area 234 may be configured not to be cleared to "0".

(45) In the first to fifty-fourth embodiments described above, instead of using the total number of game balls discharged from the game area PA to calculate various parameters, the total number of game balls supplied to the game area PA may be used. In this case, for example, a detection sensor may be provided to detect game balls that have been launched from the game ball launching mechanism 27 and reached the game area PA, and the number of game balls supplied to the game area PA may be measured based on the detection result of the detection sensor. In this configuration, since it is not necessary to measure the number of game balls discharged from the outlet 24a, the outlet detection sensor 48a may not be provided.

(46) In the above fifteenth to fifty-fourth embodiments, at least a portion of the information in the various registers and stack pointer of the main CPU 63 may be saved to the stack area 222 for specific control or the stack area 224 for non-specific control by a load command. In this case, it is necessary to update the information in the stack pointer of the main CPU 63 when saving the information to the stack areas 222, 224. It is also possible to configure the information saved in the stack areas 222, 224 to be restored to the corresponding memory area of the main CPU 63 by a load command. In this case, too, it is necessary to update the information in the stack pointer of the main CPU 63 when restoring the information from the stack areas 222, 224.

(47) In each of the above embodiments, when the setting value update process is being executed, a corresponding notification may be issued by any of the pattern display device 41, the display light-emitting unit 53, and the speaker unit 54. This allows the manager of the gaming hall to clearly understand that the setting value update process is being executed.

(48) In each of the embodiments described above, a history of new setting values may be stored in the main RAM 65. Further, a configuration may be adopted in which a history of new setting values is stored in a RAM provided in the audio emission control device 81. In this case, each time the setting value update process is completed, a command including information on the setting value set in the setting value update process is sent from the main side CPU 63 to the audio light emission control device 81, and the voice emission control device 81 is configured to cumulatively store information indicating that a setting value has been newly set and information indicating the setting value at that time in the RAM of the audio emission control device 81 each time the command is received. In this configuration, when a predetermined operation is performed, the setting history of the setting values cumulatively stored in the RAM of the sound emission control device 81 may be displayed on the symbol display device 41.

(49) In each of the above embodiments, when the setting value is newly set in the setting value update process, the information indicating the number of game balls to be put out stored in the payout control device 77 is not deleted. However, instead of this, the information indicating the number of game balls to be paid out may be deleted. In addition, if the setting value update process is executed but the setting value is not changed, the information indicating the number of game balls scheduled to be paid out will not be deleted, and if the setting value is changed, the information indicating the number of game balls scheduled to be paid out will not be deleted. The information indicating the number of game balls may be deleted.

(50) In each of the above embodiments, if the setting value update processing is executed but the setting value is not changed, the areas 221 to 224 of the main side RAM 65 will not be cleared to "0" and the setting value will be changed. When changed, at least a portion of each area 221 to 224 of the main side RAM 65 may be cleared to "0". For example, when a setting value is changed, areas other than the setting value counter in the work area 221 for specific control may be cleared to "0".

(51) In the above 22nd to 54th embodiments, the movable object related to the profit of the game may be configured to continue to move even when the main CPU 63 is executing a process to confirm the setting value in the setting confirmation process (FIG. 87). For example, in a configuration in which a V zone and a non-V zone are provided in the ball entry means that allows balls to enter in the open/close execution mode, and a distribution member is provided that distributes game balls that have entered the ball entry means to either the V zone or the non-V zone, the operation of the distribution member may be configured to continue even when the process to confirm the setting value is being executed in the setting confirmation process. In this case, it is possible to make it impossible to fraudulently create a situation in which the process to confirm the setting value is executed in the setting confirmation process and stop the operation of the distribution member. In addition to the above-mentioned distribution member, a movable object that continues to operate even when the process for confirming the setting value is being executed in the setting confirmation process can be a distribution member that distributes game balls to either an advantageous opening, which will result in a round of play being generated when a game ball enters the ball entry means, or an outlet, which will discharge a game ball that has entered the ball entry means without allowing it to enter the advantageous opening.

(52) In the twenty-second to fifty-fourth embodiments, at least one of the work area 223 for non-specific control and the stack area 224 for non-specific control may be configured not to be monitored for information abnormality. In this case, even if it is identified that an information abnormality has occurred in the work area 221 for specific control and the stack area 222 for specific control, the work area 223 for non-specific control and the stack area for non-specific control 224 is not cleared to "0" to prevent a situation in which the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0" based on the occurrence of an information error. It becomes possible to do so.

(53) In the above 22nd to 54th embodiments, the monitoring of whether or not an information abnormality has occurred in the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control may all be performed by processing corresponding to non-specific control. Also, the processing for clearing each of the areas 221 to 224 to "0" when an information abnormality has occurred may all be performed by processing corresponding to non-specific control.

(54) In each of the above embodiments, the main RAM 65 requires a power supply to store and retain information, and backup power is supplied to the main RAM 65 even when the power to the pachinko machine 10 is turned off. However, the main RAM 65 may be configured as a non-volatile memory that does not require a power supply to store and retain information.

(55) In each of the above embodiments, in the various clearing processes of the main side RAM 65, the target area of the main side RAM 65 is initialized by executing a process of clearing it to "0" and a process of initializing it. Alternatively, the target area may be initialized by performing initial setting processing without performing clearing to "0" processing.

(56) In each of the above embodiments, if the setting key insertion section 68a is turned on when the supply of operating power to the main CPU 63 is started, the setting value update process is executed without requiring any other operation. It is also possible to have a configuration in which Furthermore, instead of the setting key insertion portion 68a that is turned on and off by a setting key, a setting switch that is directly turned on and off by hand may be provided. Further, if the setting key insertion part 68a is not provided and the reset button 68c is pressed when the supply of operating power to the main CPU 63 is started, the setting value is reset without requiring any other operation. A configuration may also be adopted in which update processing is executed. In this case, a structure may be provided in which a cover member is provided so that the reset button 68c can be switched between a closed state that covers it and an open state that does not cover it, and a locking device that locks this cover member in the closed state position. It is also possible to have a configuration in which

(57) A configuration in which the currently selected setting value is determined and the setting value updating process ends when the setting key insertion section 68a is maintained in the OFF position for a predetermined period in the setting value updating process. You can also use it as Furthermore, if a termination reference period (for example, 5 minutes) has elapsed since the setting value update process was started, the currently selected setting value is automatically determined and the setting value update process is terminated. Additionally, if the update button 68b or reset button 68c is held down for longer than the termination reference period (for example, 10 seconds) during the setting value update process, the selected setting value is confirmed and the setting value update process is ended. It may also be a configuration.

(58) The setting key insertion part 68a is configured to be able to be rotated further than the ON position, and each time the rotation operation beyond the ON position is performed, the setting value in the middle of updating is changed to the setting value in the next order. In the configuration updated to , when the supply of operating power to the main CPU 63 is started in a situation where the setting key insertion part 68a is operated to the ON position, a setting confirmation process that enables confirmation of the setting value is started. The setting confirmation process may be terminated when the setting key insertion section 68a is operated to the OFF position. In addition, when the supply of operating power to the main CPU 63 is started in a situation where the update button 68b or the reset button 68c is pressed, a setting confirmation process that allows confirmation of the setting value is started, and the button is pressed. The setting confirmation process may be configured to end when the pressing operation is released. In addition, in a configuration in which a setting switch that is directly operated on and off by hand is provided instead of the setting key insertion part 68a that is operated on and off by the setting key, when the setting switch is turned on and off, the main When the supply of operating power to the side CPU 63 is started, a setting confirmation process that enables confirmation of the setting value is started, and when the setting switch is turned OFF or turned ON after the OFF operation. A configuration may be adopted in which the setting confirmation process is ended. In addition, in a configuration in which a setting switch that is directly operated on and off by hand is provided instead of the setting key insertion part 68a that is operated on and off by the setting key, when the setting switch is turned on and off, the main The configuration is such that when the supply of operating power to the side CPU 63 is started, a setting confirmation process that enables confirmation of the setting value is started, and when the reset button 68c is pressed, the setting confirmation process is ended. Good too.

(59) In each of the above embodiments, when the setting confirmation process or the setting value update process is executed, an image corresponding to the procedure may be displayed on the pattern display device 41, and a sound corresponding to the procedure may be output from the speaker unit 54 to assist the process. For example, in the setting value update process in the above-mentioned 33rd embodiment, the reset button 68c may be pressed to notify that the setting value is changed by one step, and the setting key insertion unit 68a may be turned OFF to notify that the setting value update process is terminated. This makes it easier to update the setting value. Note that the display control of the pattern display device 41 and the sound output control of the speaker unit 54 are performed by the sound emission control device 81, so that when the setting confirmation process or the setting value update process is started, a corresponding command is transmitted from the main CPU 63, and when the setting confirmation process or the setting value update process is terminated, a corresponding command is transmitted from the main CPU 63.

(60) In each of the above embodiments, the check display of the first to fourth display devices 201 to 204 may be configured to continue until an operation for terminating the check display is performed, rather than being terminated when the initial check period has elapsed. The operation for terminating the check display may be, for example, the operation of the reset button 68c regardless of whether the setting confirmation process or the setting value update process is being performed, or an operation unit other than the reset button 68c. In this case, the check display is continued on the first to fourth display devices 201 to 204 until it is time to check the base value or the setting value on the first to fourth display devices 201 to 204, so that it is possible to check the base value or the setting value after checking whether the first to fourth display devices 201 to 204 are normal. In addition, since the check display is terminated based on the operation of the operation unit, it is possible to terminate the check display at a desired timing.

(61) In each of the above embodiments, the first to fourth notification display devices 201 to 204 may be configured to start a check display when a predetermined operation unit such as the update button 68b or the reset button 68c is operated regardless of whether the supply of operating power has started. In this case, it is possible to start the check display at a desired timing when checking the base value or the set value. In addition, in this configuration, the check display may be ended when a predetermined period (e.g., 5 seconds) has elapsed, or the check display may be ended when the above-mentioned predetermined operation unit operated to start the check display or another operation unit is operated.

(62) In each of the above embodiments, when the supply of operating power to the main CPU 63 is started while a specific operation unit other than the reset button 68c, such as the update button 68b, is operated, the check display of the first to fourth notification display devices 201 to 204 may be started, and when the supply of operating power to the main CPU 63 is started without the specific operation unit being operated, the check display may not be started. In this case, in a configuration in which the check display is displayed in response to the start of the supply of operating power, it is possible for the amusement hall manager to select whether or not to start the check display by operation.

(63) In each of the above embodiments, the base value is not displayed on the first to fourth notification display devices 201 to 204 regardless of whether the gaming machine main body 12 is in the open state or not, but the base value may be displayed on the first to fourth notification display devices 201 to 204 when it is determined based on the detection result of the main body open sensor 96 that the gaming machine main body 12 is in the open state. In this case, when the gaming machine main body 12 is in the open state, the check display of the first to fourth notification display devices 201 to 204 may be started first, and then the base value may be displayed on the first to fourth notification display devices 201 to 204. This makes it possible to check whether the first to fourth notification display devices 201 to 204 are normal before checking the base value. In addition, in this configuration, the check display may be ended when a predetermined period (for example, 5 seconds) has elapsed, or the check display may be ended when the above-mentioned predetermined operation unit operated to start the check display or another operation unit is operated.

(64) In each of the above embodiments, when the main process is started with the conditions for executing the setting confirmation process being fulfilled, the check display on the first to fourth notification display devices 201 to 204 is started. Alternatively, if the main process is started without satisfying the conditions for executing the setting confirmation process, a check display may be started. In this case, if it is certain that the set value will be confirmed, it is possible to prevent the check display from being performed.

(65) In each of the above embodiments, if the main process is started with the conditions for executing the setting value update process being met, the check display on the first to fourth notification display devices 201 to 204 is started. Alternatively, if the main process is started without satisfying the conditions for executing the setting value update process, a check display may be started. In this case, if it is certain that the set value will be updated, it is possible to prevent the check display from being displayed.

(66) In each of the above embodiments, if the main process is started with either the conditions for executing the setting confirmation process or the conditions for executing the setting value update process, the first to fourth notifications are sent. If the main processing is started without the checking display of the display devices 201 to 204 starting and the conditions for executing the setting confirmation processing and the conditions for executing the setting value update processing are not satisfied. may be configured such that a check display is started. In this case, if it is certain that the set value will be confirmed or updated, it is possible to prevent the check display from being displayed.

(67) In each of the above embodiments, the check display may be configured such that each of the display segments 321-324 in each of the first to fourth alarm display devices 201-204 is not maintained in an illuminating state, but rather each of the display segments 321-324 in each of the first to fourth alarm display devices 201-204 is made to flash. Also, the check display may be configured such that each of the display segments 321-324 in each of the first to fourth alarm display devices 201-204 is sequentially illuminated one by one or a portion of each of the display segments 321-324 is illuminated at least once within the initial check period.

(68) In each of the above embodiments, the process of causing the first to fourth notification display devices 201 to 204 to display a check display may be configured to be executed as a process corresponding to a non-specific control, rather than as a process corresponding to a specific control.

(69) In each of the above embodiments, the display control of the first to fourth alarm display devices 201 to 204 may be performed by a dedicated control means, the audio and light emission control device 81, or the display control device 82, instead of by the main CPU 63. In this case, when the base value is displayed on the first to fourth alarm display devices 201 to 204, the base value to be notified is transmitted from the main CPU 63 to the control means that serves as the control body, and when the setting value is displayed on the first to fourth alarm display devices 201 to 204, the setting value to be notified is transmitted from the main CPU 63 to the control means that serves as the control body. In addition, when the main CPU 63 executes processing at the start of the supply of operating power, information corresponding to the start of the check display is transmitted from the main CPU 63 to the control means that serves as the control body so that the check display is started on the first to fourth alarm display devices 201 to 204 in a situation where the processing at the start of the supply of operating power is being executed.

(70) In each of the above embodiments, if the power outage flag is not set to "1" or the checksums do not match, and the game stop flag is set to "1" to stop the game progress, the first to fourth notification display devices 201 to 204 may be configured to have each of the display segments 321 to 324 emit light in the same way as the check display, or each of the display segments 321 to 324 flash.

(71) In each of the above embodiments, the setting value update process may be executed not only when the supply of operating power to the main CPU 63 is started, but also when a setting change trigger occurs after the processing at the start of the supply of operating power is completed. This makes it possible to eliminate the need to turn the power of the pachinko machine 10 OFF and ON when starting the setting value update process.

(72) In each of the above embodiments, the "setting change operation" and the "setting confirmation operation" may be configured to have an inverse relationship. In other words, a "setting confirmation operation" may be identified as being performed when the reset button 68c is pressed and the setting key insertion section 68a is turned ON, and a "setting change operation" may be identified as being performed when the reset button 68c is not pressed and the setting key insertion section 68a is turned ON. Also, a configuration may be used in which there is no overlap between the "setting change operation" and the "setting confirmation operation".

(73) In each of the above embodiments, the setting value update process is started based on the start of the supply of operating power to the main CPU 63 when the reset button 68c is pressed, and instead of changing the setting value of the selection target every time the reset button 68c is pressed in the setting value update process, the operation unit operated to start the setting value update process and the operation unit operated to change the setting value of the selection target in the setting value update process may not be the same.

(74) Instead of a configuration in which the display control device 82 is controlled by the audio/light emitting control device 81 based on a command transmitted from the main control device 60, the display control device 82 may be configured to control the audio/light emitting control device 81 based on a command transmitted from the main control device 60. Also, instead of a configuration in which the audio/light emitting control device 81 and the display control device 82 are provided separately, both control devices may be provided as a single control device, the functions of one of the two control devices may be integrated into the main control device 60, or both functions of the two control devices may be integrated into the main control device 60. Also, the configuration of the command transmitted from the main control device 60 to the audio/light emitting control device 81 and the configuration of the command transmitted from the audio/light emitting control device 81 to the display control device 82 may be arbitrary.

(75) The present invention can also be applied to other types of pachinko machines that differ from the above-described embodiments, such as pachinko machines in which an electric device opens a predetermined number of times when a gaming ball enters a specific area of a special device, pachinko machines in which a right is generated and a jackpot is awarded when a gaming ball enters a specific area of a special device, pachinko machines equipped with other devices, arrange ball machines, mahjong ball machines, and other gaming machines.

The present invention can also be applied to non-pinball gaming machines, such as slot machines, which have multiple reels with multiple patterns circumferentially attached, and which start the rotation of the reels by inserting a medal and operating a start lever, and which, after the reels stop when a stop switch is operated or a predetermined time has passed, award the player with a special prize, such as a medal payout, if a specific pattern or combination of specific patterns is formed on a winning line visible through a display window.

In addition, the game machine main body, which is supported by the outer frame in an openable and closable manner, is equipped with a storage section and a retrieval device, and the start lever is operated after a predetermined number of game balls stored in the storage section are retrieved by the retrieval device. The present invention can also be applied to a gaming machine that is a combination of a pachinko machine and a slot machine, which starts the rotation of the reels by doing so.

When the present invention is applied to a slot machine or a gaming machine that combines a pachinko machine and a slot machine, for example, the result of the lottery process for the role executed when starting one game based on the operation of the start lever may be stored as history information, and the actual probability of winning for each role may be calculated using the history information. When a transition to a special gaming state such as a bonus game occurs, it may be stored as history information, and the actual probability of transition to the special gaming state may be calculated using the history information. Alternatively, the ratio of the number of games stayed in the special gaming state to the total number of games played may be calculated. The history information and various parameters may be readable by an external device, or a notification corresponding to the calculation result of various parameters may be made by the gaming machine itself. In addition, a configuration may be made in which there are multiple setting states such as "Setting 1" to "Setting 6", and the winning probability in the lottery process for the role may be changed depending on the setting state. In this case, the configurations in the above embodiments may be applied to the handling of history information when the setting state is newly set or the setting value is changed, the calculation of various parameters, and the handling of repeated changes.

(76) The characteristic configurations of the above first to fifty-fourth embodiments may be mutually applied in any combination. For example, the characteristic configuration of the first embodiment, the characteristic configuration of the sixth embodiment, the characteristic configuration of the tenth embodiment, the characteristic configuration of the thirtieth embodiment, and the characteristic configuration of the forty-fifth embodiment may be combined; the characteristic configuration of the second embodiment, the characteristic configuration of the fourth embodiment, the characteristic configuration of the eighth embodiment, the characteristic configuration of the eleventh embodiment, the characteristic configuration of the thirty-third embodiment, and the characteristic configuration of the forty-third embodiment may be combined; the characteristic configuration of the first embodiment, the characteristic configuration of the fifteenth embodiment, the characteristic configuration of the twenty-first embodiment, the characteristic configuration of the twenty-ninth embodiment, the characteristic configuration of the thirty-fourth embodiment, and the characteristic configuration of the forty-ninth embodiment may be combined; or the characteristic configuration of the second embodiment, the characteristic configuration of the sixteenth embodiment, the characteristic configuration of the twenty-second embodiment, the characteristic configuration of the thirty-fifth embodiment, the characteristic configuration of the thirty-ninth embodiment, and the characteristic configuration of the fifty-third embodiment may be combined. In addition, the configuration of the above-mentioned alternative embodiment may be applied in any combination to a configuration in which the characteristic configurations of the above-mentioned first to fifty-fourth embodiments are applied in a predetermined combination.

<About the invention group extracted from each of the above embodiments>
Hereinafter, the features of the invention group extracted from each of the embodiments described above will be explained, showing effects etc. as necessary. In the following, for ease of understanding, structures corresponding to each of the above embodiments are indicated in parentheses as appropriate, but the present invention is not limited to the specific structures shown in parentheses.

<Features Group A>
Feature A1. A setting means (a function for executing a setting value update process in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
a history storage execution means (a function of executing a history setting process in the management CPU 112) for storing history information of a game corresponding to a predetermined event that occurs as a result of the game being played in a history storage means (a history memory 117);
an information erasing means for erasing at least a part of the history information stored in the history storage means when at least one condition is that the setting value to be used has been set by the setting means (a function for executing the process of step S1809 in the management CPU 112 in the third embodiment, a function for executing the process of step S2109 in the management CPU 112 in the fifth embodiment, a function for executing the processes of steps S2306 to S2308 in the management CPU 112 in the sixth embodiment, and a function for executing the process of step S2608 in the management CPU 112 in the eighth embodiment);
A gaming machine comprising:

According to feature A1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, at least a portion of the history information stored in the history storage means is erased on at least one condition that a setting value to be used has been newly set. This makes it possible to adjust the contents of the history storage means so that the frequency of occurrence of predetermined events can be suitably managed in the situation after a new setting of the setting value to be used is made. .

Feature A2. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
an information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) that determines whether the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) for awarding a privilege (open/close execution mode) to the player; a function of executing the processing from S409 to S412);
The gaming machine according to feature A1, wherein the probability of obtaining the award corresponding result in the award determination varies depending on the set value.

According to feature A2, it is possible to vary the probability of a grant corresponding result in accordance with a set value in a so-called pachinko machine. In this case, by having the configuration of feature A1 described above, it is possible to adjust the contents of the history storage means so as to appropriately manage the frequency of occurrence of a specified event in a situation after the probability of a grant corresponding result has been changed.

Feature A3. The gaming machine according to feature A1 or A2, characterized in that the information erasing means erases all of the history information stored in the history storage means under at least one condition that the setting value to be used has been set by the setting means.

According to feature A3, when a setting value to be used is newly set, all the history information stored in the history storage means is deleted, so that the setting value to be used is changed. It becomes possible to specify the frequency of occurrence of a predetermined event based on the timing when the event is newly performed.

Feature A4. The information erasing means erases some of the history information stored in the history storage means, with at least one condition being that the setting value to be used has been set by the setting means, The gaming machine according to feature A1 or A2, characterized in that part of the history information stored in the history storage means is retained.

According to feature A4, when a new setting value to be used is set, it is possible to erase history information that is not necessary for managing the frequency of occurrence of a specified event thereafter, and to leave history information that is necessary for managing the frequency of occurrence of a specified event thereafter. This makes it possible to appropriately manage the frequency of occurrence of a specified event after a new setting value to be used is set.

Feature A5. The history information stored in the history storage means includes first history information (history indicating that the opening/closing execution mode has occurred) in which the probability of occurrence of the predetermined event corresponding to the history information varies according to the set value; information) and second history information (history information indicating that a game ball has been ejected from the game area PA) that does not change according to the setting value,
The information erasing means erases the first history information stored in the history storage means on at least one condition that the setting value to be used has been set by the setting means, and The gaming machine according to feature A4, characterized in that the second history information stored in the history storage means is left.

According to feature A5, when a new set value is set to be used, the first history information corresponding to a predetermined event whose occurrence probability changes according to the set value is deleted, and the occurrence probability is changed to the set value. The second history information corresponding to a predetermined event that does not change depending on the event is not deleted. As a result, when the first history information before the setting value to be used is newly set is carried over after the setting value is newly set, a predetermined event corresponding to the first history information occurs. The first history information that is undesirable for specifying the frequency can be deleted when the setting value is newly set. On the other hand, the second history information is not deleted even if the setting value to be used is newly set, so that it can be referred to when specifying the frequency of occurrence of a predetermined event corresponding to the second history information. Since it is possible to secure a large amount of second history information, it is possible to accurately identify the frequency of occurrence of a predetermined event corresponding to the second history information.

Feature A6. A ball entry means (first actuation port 33, second actuation port 34) through which a game ball flowing down the game area can enter;
An information acquisition means (a function for executing the process of step S401 in the main CPU 63) for acquiring special information based on the game ball entering the ball entry means;
An assignment determination means (a function for executing the processes of steps S503 and S504 in the main CPU 63) for determining whether the special information corresponds to the assignment information;
A bonus awarding means (a function for executing the processes of steps S409 to S412 in the master CPU 63) for awarding a bonus (opening/closing execution mode) to a player based on the result of the bonus determination that the special information corresponds to the bonus information,
The probability of the grant corresponding result being obtained in the grant determination varies depending on the set value,
the first history information includes information corresponding to the granting of the benefit,
The gaming machine described in feature A5, wherein the second history information includes information corresponding to the ejection of a gaming ball from the gaming area in a predetermined manner.

According to feature A6, the probability of awarding a bonus varies depending on the set value, so by erasing the first history information when a new set value to be used is set, it becomes possible to determine the frequency of awarding a bonus under the circumstances of the newly set set value. On the other hand, since the frequency with which game balls are discharged from the game area does not vary depending on the set value, by not erasing the second history information even when a new set value to be used is set, it becomes possible to accurately determine the frequency with which game balls are discharged from the game area in a predetermined manner.

Feature A7. The gaming machine according to any one of Features A1 to A6, wherein the information erasing means erases at least a portion of the history information when the setting value to be used is set by the setting means and a predetermined amount or more of the history information is stored in the history storage means.

According to feature A7, if a predetermined amount or more of predetermined history information is not stored in the history storage means, the history information is not deleted even if a new set value to be used is set. This makes it possible to prevent history information from being repeatedly erased from the history storage means even if new setting values are repeatedly set in a situation where no game is played.

Feature A8. A gaming machine according to any one of Features A1 to A7, characterized in that it is equipped with information derivation means (a function for executing the process of step S1807 in the management CPU 112 in the third embodiment, and a function for executing the process of step S2107 in the management CPU 112 in the fifth embodiment) that derives aspect information corresponding to the results of a game during a predetermined period of time using the history information stored in the history storage means, with at least one condition being that the setting value to be used has been set by the setting means.

According to feature A8, having the configuration of feature A1 above, at least a part of the history information stored in the history storage means is stored on at least one condition that a new setting value to be used has been set. In the configuration to be deleted, a mode in which the history information stored in the history storage means is used to correspond to the gaming results in a predetermined period when a new setting value to be used is set. Information is derived. As a result, even if at least part of the history information is erased when the setting value is changed, it is possible to grasp the management results of gaming history, such as the frequency of occurrence of specified events in the situation before the setting value was changed. It becomes possible to do so.

Feature A9. The gaming machine according to feature A8, further comprising mode information storage means (separate storage memory 171) for storing the mode information derived by the information derivation means.

According to feature A9, when a new setting of the setting value to be used is made and the history information stored in the history storage means is used to derive behavior information corresponding to the game results during a specified period, the behavior information is stored in the behavior information storage means. As a result, even if the setting value is changed, it is possible to grasp the management results of the game history in the situation before the setting value was changed at any time thereafter.

Feature A10. The gaming machine described in Feature A9, wherein the mode information storage means is capable of storing a plurality of pieces of mode information.

According to feature A10, since it is possible to store a plurality of pieces of mode information in the mode information storage means, it is possible to grasp the management results of gaming history over a plurality of periods based on the timing when a new setting value is set. It becomes possible to do so. Furthermore, even if new setting values are repeatedly set in a situation where no game is being played, the mode information derived using the history information of the situation where a game is actually being played is retained in the mode information storage means. This makes it possible to increase the possibility that the

Feature A11. The aspect information storage means is capable of storing a predetermined number of the aspect information,
This gaming machine is characterized by being equipped with a means for executing special processing when the setting of the setting value to be used by the setting means occurs more than the specified number of times under specified conditions (in the third embodiment, a function for executing monitoring processing of repeated changes in the management CPU 112, and in the fourth embodiment, a function for executing monitoring processing of repeated changes in the main CPU 63), as described in feature A9 or A10.

According to feature A11, when new setting values are repeatedly set in a situation where no game is being played, special processing is executed in order to prevent the behavior information derived using the history information of the situation where the game is actually being played from remaining in the behavior information storage means. This makes it possible to deal with such behavior.

Feature A12. The gaming machine according to any one of features A8 to A11, wherein the information derivation means derives the mode information when a predetermined amount or more of the history information is stored in the history storage means. .

According to feature A12, since behavior information is derived when a predetermined amount or more of predetermined history information is stored in the history storage means, it is possible to prevent behavior information from being derived unnecessarily.

Feature A13. The information erasing means erases the history information from when the setting value to be used is set by the setting means until a predetermined amount of the history information is stored in the history storage means. If a specified amount or more of the history information is stored in the history storage means after the setting value to be used is set by the setting means, and before the setting value is set. The gaming machine according to any one of features A1 to A12, characterized in that the history information stored in the history storage means is deleted.

According to feature A13, even if a new setting of the setting value to be used is made, the history information stored before the setting is made is not erased until a specific amount of predetermined history information is newly stored in the history storage means. This makes it possible to identify the management results of the game history for a specified period of time even if a new setting of the setting value is made.

Feature A14. The history storage means includes a first history storage means (first history memory 191) and a second history storage means (second history memory 192),
The history storage execution means includes:
If the predetermined event occurs during a predetermined period from when the setting value to be used is set by the setting means until the cancellation condition is met, the corresponding history information is stored in the first history storage means and A means for storing in both the second history storage means (a function for executing the process of step S2604 in the management CPU 112);
When the predetermined event occurs during a period other than the predetermined period, means for storing the corresponding history information in the side of the first history storage means and the second history storage means that is set as a storage target. (Function to execute the process of step S2603 in the management CPU 112);
Equipped with
The information erasing means erases the history information stored in the side of the first history storage means and the second history storage means that was previously set as the storage target when the cancellation condition is satisfied. The gaming machine according to any one of features A1 to A13.

According to feature A14, until a specific amount of history information is newly stored in the history storage means, even if a new setting value for use is made, the setting value is not stored before the new setting is made. History information will not be deleted. This makes it possible to specify the gaming history management results for a predetermined period even if new settings are made. Furthermore, this effect can be produced simply by appropriately changing the history storage means for storing history information between the first history storage means and the second history storage means.

Feature A15. The gaming machine described in Feature A14, characterized in that it is equipped with information derivation means (a function for executing the process of step S2703 in the management CPU 112) that derives behavior information corresponding to the results of a game during a predetermined period of time using the history information stored in the one of the first history storage means and the second history storage means that is set as the storage target.

According to feature A15, even if the history information is stored in both the first history storage means and the second history storage means due to a new setting of the setting value, the mode in which the history information is used is It becomes possible to derive information appropriately.

In addition, for the configuration of features A1 to A15, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Characteristics Group B>
Feature B1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of a game. )and,
Equipped with
The predetermined history information stored in the history storage means before the setting value to be used is set by the setting means is set as the setting value to be used by the setting means. A game machine characterized in that the history is stored and retained in the history storage means even after the game is played.

According to feature B1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, even if the setting value to be used is newly set, the history information stored in the history storage means is not deleted but is stored and retained. As a result, even if the setting value to be used is set, the history information up to that point can be continuously stored in the history storage means, and the history information will not be accumulated in the history storage means over a long period of time. It becomes possible to specify the management results of the game history using the history information obtained.

Feature B2. The gaming machine described in Feature B1, characterized in that the history storage execution means includes a setting time storage execution means (a function for executing the process of step S1307 in the management CPU 112 in the first embodiment, and a function for executing the process of step S2408 in the management CPU 112 in the seventh embodiment) that stores the corresponding history information in the history storage means when the setting value to be used is set by the setting means.

According to feature B2, in a configuration in which history information is not deleted and is stored and retained even if a setting value to be used is newly set, the setting value to be used is newly set. History information corresponding to this is stored in the history storage means. This makes it possible to distinguish between history information before a new setting of the setting value to be used and history information after the setting is made.

Feature B3. When the setting value to be used is set by the setting means, the storage execution means at the time of setting causes the history storage means to store information corresponding to the set value as the history information. The gaming machine according to feature B2.

According to feature B3, by referring to history information, it is possible to specify the contents of setting values set in the past.

Feature B4. A gaming machine according to any one of Features B1 to B3, characterized in that the history storage means includes a plurality of corresponding history storage means (history memories 181 to 186 for settings 1 to 6) corresponding to the plurality of types of setting values that can be set by the setting means.

According to feature B4, since a correspondence history storage means is provided corresponding to each set value, it is possible to store history information separately for each set value.

Feature B5. When the setting value to be used is set by the setting means, means for making the correspondence history storage means corresponding to the setting value for which the setting is to be stored for the subsequent history information (management side The gaming machine according to feature B4, further comprising a function of executing the process of step S2406 in the CPU 112.

According to feature B5, when a setting value to be used is newly set, the correspondence history storage means corresponding to that setting value is to be stored for subsequent history information, so that It becomes possible to distinguish and store history information.

Feature B6. Information derivation means (display output processing in the management side CPU 112 The gaming machine according to feature B5, characterized in that the gaming machine is equipped with a function of executing the following functions.

According to feature B6, in a configuration where history information is stored separately for each setting value, it is possible to derive mode information corresponding to the currently set setting value.

Feature B7. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. a function of executing the processing from S409 to S412);
The gaming machine according to any one of features B1 to B6, wherein the probability of the award corresponding result in the award determination varies depending on the set value.

Feature B7 makes it possible to vary the probability of a corresponding result being awarded in a so-called pachinko machine according to a set value.

Note that for the configuration of features B1 to B7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature C group>
Feature C1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of a game. )and,
post-setting response means for not erasing the history information until at least a predetermined amount of the history information is stored in the history storage means after the setting value to be used is set by the setting means; (Function to execute the processing of step S2506 and steps S2605 to S2609 in the management side CPU 112),
A gaming machine characterized by comprising:

According to feature C1, the setting value to be used is set from among multiple setting values corresponding to the player's degree of advantage, so the player will expect that the more advantageous setting value will be the one to be used. Furthermore, when a specified event occurs, corresponding history information is stored in the history storage means. This makes it possible for the gaming machine to store and hold information for managing the number of times or frequency of occurrence of a specified event, and by using this managed information, it becomes possible to appropriately manage the frequency of occurrence of a specified event. Furthermore, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, until a specific amount of predetermined history information is newly stored in the history storage means, even if a new setting is made for the setting value to be used, it will not be stored before the setting is made. History information will not be deleted. This makes it possible to specify the gaming history management results for a predetermined period even if new settings are made.

Feature C2. The gaming machine described in Feature C1, wherein the post-setting response means erases the history information stored in the history storage means before the setting value was set when the history information stored in the history storage means is equal to or exceeds the specific amount after the setting value to be used is set by the setting means.

According to feature C2, when a specific amount of history information is stored in the history storage means that makes it possible to specify the gaming history management results for a predetermined period after a new setting value is set. In this case, the history information stored in the history storage means is erased before the new settings are made. This makes it possible to prevent useless history information from being continuously stored in the history storage means.

Feature C3. The history storage means includes a first history storage means (first history memory 191) and a second history storage means (second history memory 192),
The history storage execution means includes:
a means for storing the history information corresponding to the predetermined event in one of the first history storage means and the second history storage means, which is set as a storage target when the predetermined event occurs (a function for executing the process of step S2603 in the management CPU 112);
a means for storing the history information corresponding to the occurrence of the predetermined event in both the first history storage means and the second history storage means until the predetermined amount or more of the history information is stored in the one of the first history storage means and the second history storage means that is not set as the storage target from the time when the setting value to be used is set by the setting means, (a function for executing the process of step S2604 in the management side CPU 112);
Equipped with
The post-setting response means includes:
a means for changing the storage target between the first history storage means and the second history storage means when a predetermined amount or more of history information is stored in the one of the first history storage means and the second history storage means that is not set as the storage target after the setting value to be used is set by the setting means; and
a means for deleting the history information of the one of the first history storage means and the second history storage means that has been set as the storage target up until that point, when the predetermined amount of history information is stored in the one of the first history storage means and the second history storage means that has not been set as the storage target after the setting means has set the setting value to be used; and
The gaming machine according to feature C1 or C2, characterized in that it is provided with:

According to feature C3, until a specific amount of history information is newly stored in the history storage means, even if a new setting of the setting value to be used is made, the setting value is not stored before the setting is made. History information will not be deleted. This makes it possible to specify the gaming history management results for a predetermined period even if new settings are made. Furthermore, this effect can be produced simply by appropriately changing the history storage means for storing history information between the first history storage means and the second history storage means.

Feature C4. Deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the side of the first history storage means and the second history storage means that is set as the storage target. The gaming machine according to feature C3, further comprising information deriving means (a function of executing the process of step S2703 in the management CPU 112).

According to feature C4, even if the history information is stored in both the first history storage means and the second history storage means due to a new setting of the setting value, the manner in which the history information is used is It becomes possible to derive information appropriately.

Feature C5. A ball entry means (first actuation port 33, second actuation port 34) through which a game ball flowing down the game area can enter;
An information acquisition means (a function for executing the process of step S401 in the main CPU 63) for acquiring special information based on the game ball entering the ball entry means;
An assignment determination means (a function for executing the processes of steps S503 and S504 in the main CPU 63) for determining whether the special information corresponds to the assignment information;
A bonus awarding means (a function for executing the processes of steps S409 to S412 in the master CPU 63) for awarding a bonus (opening/closing execution mode) to a player based on the result of the bonus determination that the special information corresponds to the bonus information,
A gaming machine according to any one of features C1 to C4, characterized in that the probability of the award corresponding result being obtained in the award judgment varies depending on the set value.

Feature C5 makes it possible to vary the probability of a corresponding result being awarded in a so-called pachinko machine according to a set value.

Note that for the configuration of features C1 to C5, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature D group>
Feature D1. A setting means (a function for executing a setting value update process in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
a special execution means for executing a special process under at least one condition that the setting of the setting value to be used by the setting means is executed in a special situation (a function for executing a process for monitoring repeated changes in the management CPU 112 in the third embodiment, a function for executing a process for monitoring repeated changes in the main CPU 63 in the fourth embodiment, and a function for making a negative determination in step S2106 in the management CPU 112 in the fifth embodiment);
A gaming machine comprising:

According to feature D1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, the special process is executed with at least one condition that the new setting of the setting value to be used is executed in a special situation. This makes it possible to deal with a case where a new set value is set under an unfavorable situation.

Feature D2. Feature D1 characterized in that the special execution means executes the special processing on the condition that at least one condition is that setting of the setting value to be used by the setting means has been executed a specified number of times or more in the special situation. The gaming machine described in .

According to feature D2, even if a new setting of a setting value to be used is executed in a special situation, the special process is not executed if the number of executions is less than a specific number of times. This makes it possible to prevent special processing from being executed even when a regular worker sets a new set value less than a specific number of times in a special situation.

Feature D3. The special execution means is configured to determine, as the special situation, a situation in which no game is played after the setting value to be used is set by the setting means, or a setting of the setting value to be used by the setting means. In a situation where a game exceeding a predetermined standard has not been played since the execution of the special processing, the special processing is executed with at least one condition that the setting value to be used is set by the setting means. The gaming machine according to feature D1 or D2.

According to feature D3, when a new setting value to be used is set in a situation where no game is being played or where no game is being played substantially, special processing is executed, so that it is possible to deal with such an action when it occurs.

Feature D4. The gaming machine according to any one of features D1 to D3, wherein the special execution means executes a notification process as the special process.

According to feature D4, the notification process is executed under at least one condition that a new setting of the setting value to be used is performed in a special situation. This makes it possible to prompt the user to take action when a new setting of the setting value is performed under unfavorable circumstances.

Feature D5. A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
With at least one condition that the setting value to be used is set by the setting means, the history information stored in the history storage means is used to respond to the gaming results in a predetermined period. information derivation means (in the third embodiment, the function of executing the process of step S1807 in the management side CPU 112; in the fifth embodiment, the function of executing the process of step S2107 in the management side CPU 112);
The gaming machine according to any one of features D1 to D4, characterized by comprising:

According to feature D5, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, when a new setting value to be used is set, the history information stored in the history storage means is used to derive behavior information corresponding to the game results during a specified period. This makes it possible to grasp the results of game history management, such as the frequency of occurrence of a specified event in the situation before the setting value was changed.

Feature D6. The gaming machine described in Feature D5, wherein the special execution means, under at least one condition that the setting of the setting value to be used by the setting means is executed in the special situation, does not cause the information derivation means to derive the mode information as the special process.

According to feature D6, even if a new setting is made to the setting value to be used, if the setting is made in an unfavorable situation, the behavior information is not derived. This makes it possible to prevent the behavior information from being derived unnecessarily.

Feature D7. The gaming machine according to feature D5 or D6, further comprising mode information storage means (separate storage memory 171) for storing the mode information derived by the information derivation means.

According to feature D7, when a new setting of the setting value to be used is made and the history information stored in the history storage means is used to derive behavior information corresponding to the game results during a specified period, the behavior information is stored in the behavior information storage means. As a result, even if the setting value is changed, it is possible to grasp the management results of the game history in the situation before the setting value was changed at any time thereafter.

Feature D8. The gaming machine according to feature D7, wherein the aspect information storage means is capable of storing a plurality of pieces of the aspect information.

According to feature D8, since it is possible to store multiple pieces of behavior information in the behavior information storage means, it is possible to grasp the results of managing the game history over multiple periods based on the timing when the setting value was newly set. In addition, even if new setting values are repeatedly set in a situation where no game is being played, it is possible to increase the likelihood that behavior information derived using history information of a situation where game play is actually being played will remain in the behavior information storage means.

Feature D9. The aspect information storage means is capable of storing a predetermined number of the aspect information,
The gaming machine described in feature D7 or D8, wherein the special execution means executes the special processing when the setting of the setting value to be used by the setting means occurs more than the specified number of times in the special situation.

According to feature D9, in order to prevent the mode information derived using the history information of the situation where the game is actually being played from remaining in the mode information storage means, the set value is set in a situation where no game is played. If a new setting is repeated, special processing is performed for it. This makes it possible to deal with the act.

Feature D10. A ball entry means (first actuation port 33, second actuation port 34) through which a game ball flowing down the game area can enter;
An information acquisition means (a function for executing the process of step S401 in the main CPU 63) for acquiring special information based on the game ball entering the ball entry means;
An assignment determination means (a function for executing the processes of steps S503 and S504 in the main CPU 63) for determining whether the special information corresponds to the assignment information;
A bonus awarding means (a function for executing the processes of steps S409 to S412 in the master CPU 63) for awarding a bonus (opening/closing execution mode) to a player based on the result of the bonus determination that the special information corresponds to the bonus information,
A gaming machine described in any one of features D1 to D9, characterized in that the probability of the award corresponding result being obtained in the award judgment varies depending on the set value.

Feature D10 makes it possible to vary the probability of a corresponding result being awarded in a so-called pachinko machine according to a set value.

In addition, for the configuration of features D1 to D10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Features Group E>
Feature E1. A setting means (a function for executing a setting value update process in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
a history storage execution means (a function of executing a history setting process in the management CPU 112) for storing history information of a game corresponding to a predetermined event that occurs as a result of the game being played in a history storage means (a history memory 117);
information derivation means for deriving aspect information corresponding to game results during a predetermined period of time using the history information stored in the history storage means, with at least one condition being that the setting value to be used has been set by the setting means (a function for executing the process of step S1807 in the management CPU 112 in the third embodiment, and a function for executing the process of step S2107 in the management CPU 112 in the fifth embodiment);
A gaming machine comprising:

According to feature E1, the setting value to be used is set from among multiple setting values corresponding to the player's degree of advantage, so the player will expect that the more advantageous setting value will be the one to be used. Furthermore, when a specified event occurs, corresponding history information is stored in the history storage means. This makes it possible for the gaming machine to store and hold information for managing the number of times or frequency of occurrence of a specified event, and by using this managed information, it becomes possible to appropriately manage the frequency of occurrence of a specified event. Furthermore, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, when a new setting value to be used is set, the history information stored in the history storage means is used to derive behavior information corresponding to the game results during a specified period. This makes it possible to grasp the results of game history management, such as the frequency of occurrence of a specified event in the situation before the setting value was changed.

Feature E2. The gaming machine according to feature E1, further comprising mode information storage means (separate storage memory 171) for storing the mode information derived by the information derivation means.

According to feature E2, when a new setting value to be used is set, the history information stored in the history storage means is used to generate mode information corresponding to the result of a game in a predetermined period. When the form information is derived, the form information is stored in the form information storage means. Thereby, even if the setting value is changed, it becomes possible to grasp the management result of the gaming history in the situation before the setting value was changed at any subsequent timing.

Feature E3. The gaming machine according to feature E2, wherein the aspect information storage means is capable of storing a plurality of pieces of the aspect information.

According to feature E3, since it is possible to store multiple pieces of behavior information in the behavior information storage means, it is possible to grasp the results of managing the game history over multiple periods based on the timing when the setting value was newly set. Furthermore, even if new setting of the setting value is repeated under circumstances in which no game is being played, it is possible to increase the likelihood that behavior information derived using history information of a situation in which game play is actually being played will remain in the behavior information storage means.

Feature E4. The mode information storage means is capable of storing a predetermined number of the mode information,
This gaming machine includes a means (in the third embodiment, a means for executing special processing in the management side CPU 112) when the setting value to be used is set by the setting means more than the predetermined number of times under predetermined conditions. The gaming machine according to feature E2 or E3, characterized in that the gaming machine is equipped with a function of executing repeated change monitoring processing (in the fourth embodiment, a function of executing repeated change monitoring processing in the main CPU 63).

According to feature E4, when new setting values are repeatedly set in a situation where no game is being played, special processing is executed in order to prevent the behavior information derived using the history information of the situation where the game is actually being played from remaining in the behavior information storage means. This makes it possible to deal with such behavior.

Feature E5. The gaming machine according to any one of Features E1 to E4, wherein the information deriving means derives the behavior information when a predetermined amount or more of the history information is stored in the history storage means.

According to feature E5, since behavior information is derived when a predetermined amount or more of predetermined history information is stored in the history storage means, it is possible to prevent behavior information from being derived unnecessarily.

Feature E6. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. a function of executing the processing from S409 to S412);
The gaming machine according to any one of features E1 to E5, characterized in that the probability of obtaining the award corresponding result in the award determination varies depending on the set value.

Feature E6 makes it possible to vary the probability of a corresponding result being awarded in a so-called pachinko machine according to a set value.

Note that for the configuration of features E1 to E6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the inventions related to the above feature A group, the above feature B group, the above feature C group, the above feature D group, and the above feature E group, it is possible to solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, the gaming ball is paid out from, for example, a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known for a pachinko machine, and in this case, the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, gaming machines such as those exemplified above need to be properly managed, and there is still room for improvement in this regard.

<Characteristic group F>
Feature F1. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. (a function to execute the processing from S409 to S412);
a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Equipped with
The grant determination means has a high probability mode and a low probability mode as the grant determination modes such that the probability of the grant corresponding result is relatively high or low,
A gaming machine characterized in that the probability of the award corresponding result changes at least in the low probability mode depending on the set value.

Feature F1 makes it possible to vary the probability of a bonus corresponding result in at least the low probability mode in a so-called pachinko machine according to a set value. This makes it possible to create a situation in which the probability of a bonus corresponding result in the low probability mode is favorable or unfavorable even in a single gaming machine. This makes it possible to increase the interest of the game.

Feature F2. The gaming machine according to feature F1, wherein the probability of the award corresponding result in the high probability mode does not vary depending on the set value.

According to feature F2, the probability of a grant-compatible result in low probability mode is changed according to the setting value, while the probability of a grant-compatible result in high probability mode is not changed according to the setting value. By doing so, it becomes possible to limit the influence of the setting value to the situation in the low probability mode.

Feature F3. There are multiple types of the above benefits,
A gaming machine according to feature F1 or F2, characterized in that the selection mode of the benefit does not change according to the set value.

According to feature F3, the probability of receiving a corresponding result in low probability mode is changed according to the setting value, while the selection mode of benefits is not changed according to the setting value, thereby reducing the influence of the setting value. can be restricted to situations in low probability mode.

In addition, for the configuration of features F1 to F3, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

According to the invention related to the above feature group F, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to improve the interest of the game, and there is still room for improvement in this respect.

<Feature Group G>
Feature G1. A history storage execution means (a function for executing a history setting process in the management CPU 112) for storing history information of a game corresponding to a predetermined event that occurs when the game is executed in the history storage means (history memory 117);
information derivation means for deriving aspect information corresponding to game results during a predetermined period of time using the history information stored in the history storage means (a function for executing the processes of steps S1402 to S1412 in the management CPU 112 in the first embodiment, a function for executing the process of step S1807 in the management CPU 112 in the third embodiment, and a function for executing the process of step S2107 in the management CPU 112 in the fifth embodiment);
a first information display control means (a function of executing a display process in the management CPU 112) for controlling the display of an information display means (the first to third notification display devices 69a to 69c in the first to tenth embodiments, and the first to fourth notification display devices 201 to 204 in the eleventh to fourteenth embodiments) so that a display corresponding to the aspect information derived by the information derivation means is performed;
A second information display control means for controlling the display of the information display means so that a display corresponding to another information different from the aspect information is performed (a function for executing the processes of steps S202 and S208 in the main CPU 63 in the first to tenth embodiments, a function for executing the processes of steps S3101, S3103, and S3109 in the main CPU 63 in the eleventh embodiment, a function for executing the processes of steps S3201, S3202, S3204, and S3210 in the main CPU 63 in the twelfth embodiment, and a function for executing the process for abnormality display in the main CPU 63 in the thirteenth embodiment);
A gaming machine comprising:

According to feature G1, when a predetermined event occurs, history information corresponding to the event is stored in the history storage means. This allows the gaming machine to store and hold information for managing the number of occurrences or frequency of occurrence of the predetermined event, and by using this managed information, it is possible to appropriately manage the frequency of occurrence of the predetermined event. Furthermore, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Furthermore, by using the history information stored in the history storage means, behavior information corresponding to the results of play during a predetermined period is derived. Then, a display corresponding to the behavior information is performed by the information display means. This makes it possible to grasp the results of management of the game history, such as the frequency of occurrence of the predetermined event. Furthermore, the information display means not only displays corresponding to the behavior information but also displays corresponding to other information. This makes it possible to effectively use the information display means.

Feature G2. The gaming machine described in Feature G1, characterized in that the period during which the information display means displays the mode information is distinguished from the period during which the information display means displays the other information.

According to feature G2, by understanding the situation in which display is being performed on the information display means, it is possible to determine which of the display corresponding to mode information and the display corresponding to other information is being performed on the information display means. It becomes possible to specify.

Feature G3. The second information display control means displays the information corresponding to the separate information by controlling the display of the information display means so that the display mode is different from the display mode when the display corresponding to the mode information is displayed. The gaming machine according to feature G1 or G2, wherein

According to feature G3, by grasping the display mode of the information display means, it is possible to identify whether the display corresponding to the mode information or the display corresponding to the different information is being performed on the information display means.

Feature G4. As the information display means, individual information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to fourteenth In the embodiment, the gaming machine according to any one of features G1 to G3, characterized in that it includes a plurality of first to fourth notification display devices 201 to 204).

According to feature G4, by using a plurality of individual information display means to display a display corresponding to the mode information, it is possible to display a wide variety of mode information. In addition, the presence of multiple individual information display means makes it possible to make the display mode significantly different between when a display corresponding to mode information is displayed and when a display corresponding to different information is displayed. .

Feature G5. When causing a display corresponding to the separate information to be displayed, the second information display control means selects a predetermined individual information display means from among the plurality of individual information display means that does not go into a non-display state when a display corresponding to the aspect information is displayed. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments; first notification display device 201 and second notification device in the eleventh and twelfth embodiments) Feature G4 characterized in that the display device 202 and the third notification display device 203 (in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are in a non-display state. The gaming machine described in .

According to feature G5, a specific individual information display means that is not in a hidden state when a display corresponding to mode information is made is in a hidden state when a display corresponding to other information is made. This makes it possible to clearly identify whether a display corresponding to mode information or a display corresponding to other information is being made, simply by grasping the type of individual information display means that is in a hidden state.

Feature G6: When the second information display control means causes a display corresponding to the different information to be performed, a specific individual information display means (the third alert display device 69c in the first to tenth embodiments, the fourth alert display device 204 in the eleventh and twelfth embodiments, and the third alert display device 203 and the fourth alert display device 204 in the thirteenth embodiment) that is in a display state when the aspect information is displayed among the plurality of individual information display means is in a display state;
A gaming machine as described in feature G5, characterized in that the display content of the specific individual information display means when a display corresponding to the other information is made can be displayed on the specific individual information display means when a display corresponding to the mode information is made.

According to feature G6, in a specific individual information display means, the display content that can be displayed when a display corresponding to aspect information is performed can also be displayed when a display corresponding to another information is performed, so that the aspect It becomes possible to avoid imposing restrictions on the display contents when displaying information corresponding to the information. Furthermore, even if the specific individual information display means has a configuration that can display the same display content, it will not be in a non-display state if it has the configuration of feature G5 above and a display corresponding to the mode information is performed. Since the predetermined individual information display means is in a non-display state when a display corresponding to another information is performed, it is possible to specify which of the plurality of individual information display means is being displayed.

Feature G7. The gaming machine according to feature G5 or G6, wherein the first information display control means puts each of the plurality of individual information display means into a display state when causing the display corresponding to the aspect information to be displayed.

According to feature G7, when the display corresponding to the mode information is performed, each of the plurality of individual information display means is in the display state, so that the predetermined individual information display means corresponds to another information in which the predetermined individual information display means is in the non-display state. This makes it possible to clearly distinguish the display from the display.

Feature G8. The first information display control means sequentially changes the display of the aspect information on the information display means, and even when changing the display of the aspect information, the predetermined individual information display means is in a non-display state. The gaming machine according to any one of features G5 to G7, characterized in that the game machine is not maintained in the same state as above.

According to feature G8, when a display corresponding to the mode information is being displayed, the specified individual information display means is not maintained in a non-display state. This makes it possible to identify whether a display corresponding to the mode information or a display corresponding to the different information is being displayed on the multiple individual information display means, regardless of the timing at which the multiple individual information display means are checked.

Feature G9. The gaming machine described in any one of Features G5 to G8, characterized in that the second information display control means causes one specific individual information display means (the third notification display device 69c in the first to tenth embodiments, and the fourth notification display device 204 in the eleventh and twelfth embodiments) among the plurality of individual information display means to display the different information, and causes the remaining individual information display means to be in a non-display state.

According to feature G9, when a display corresponding to different information is made, only one individual information display means is in a display state, making it easier to know whether a display corresponding to different information is made or not.

Feature G10. The individual information display means are arranged in a predetermined direction;
A gaming machine described in feature G9, characterized in that the specific individual information display means is located at the end of the multiple individual information display means arranged in the specified direction in the specified direction.

According to feature G10, since one individual information display means in which a display corresponding to separate information is displayed is located at an end in a predetermined direction, it is possible to determine whether or not a display corresponding to separate information is being performed. It becomes easier to do.

Feature G11. The first information display control means is a part of the plurality of individual information display means (in the first to tenth embodiments, the first notification display device 69a, the eleventh ~ In the fourteenth embodiment, a display corresponding to the type of the aspect information to be displayed is performed on the first notification display device 201 and the second notification display device 202), and a plurality of the individual information display means Individual information display means (in the first to tenth embodiments, the second notification display device 69b and the third notification display device 69c, and in the eleventh to fourteenth embodiments, the individual information display device for displaying results) A display corresponding to the content of the mode information to be displayed is performed on the third notification display device 203 and the fourth notification display device 204,
The gaming machine according to any one of features G5 to G10, wherein the predetermined individual information display means corresponds to the individual information display means for the type display target.

According to feature G11, when a display corresponding to mode information is made, a display corresponding to the type of mode information to be displayed is made in the individual information display means of the type display target, and a display corresponding to the content of the mode information to be displayed is made in the individual information display means of the result display target. This makes it easier to grasp the mode information to be displayed. In this case, when a display corresponding to other information is made, the individual information display means of the type display target is in a hidden state, so the hidden state of type display corresponds to other information, making it easier to grasp that other information is being displayed.

Feature G12. The information display means has a plurality of unit light emitting parts (display segments 201a to 201g, 202a to 202g), and performs a predetermined display by a combination of unit light emitting parts that are in a light emitting state among the plurality of unit light emitting parts. It is a configuration that allows
The second information display control means corresponds to the different information by setting a unit light emitting unit, which can be set in a light emitting state when a display corresponding to the mode information is displayed, among the plurality of unit light emitting parts, into a light emitting state. A combination of the unit light emitting parts that becomes a light emitting state when a display corresponding to the other information is displayed does not exist when a display corresponding to the aspect information is displayed. The gaming machine according to any one of features G1 to G11, characterized in that the gaming machine is configured to be a combination.

According to feature G12, when a display corresponding to the mode information is performed, a unit light emitting section that can be set to a light emitting state is set to a light emitting state, whereby a display corresponding to another information is performed, and a display corresponding to the mode information is displayed. In order to diversify the information, it is possible to place as few restrictions as possible on the content of the display corresponding to the mode information. On the other hand, a combination of unit light emitting parts that are in a light emitting state when a display corresponding to different information is performed is a combination that does not exist when a display corresponding to mode information is performed. Thereby, by understanding the combination of unit light emitting parts that are in the light emitting state, it becomes possible to understand which of the display corresponding to the mode information and the display corresponding to other information is being performed.

Feature G13. There are a plurality of display modes corresponding to the mode information in the information display means,
The game according to feature G12, wherein among the plurality of unit light emitting parts, there is no unit light emitting part that does not enter a light emitting state even if all the displays corresponding to the mode information of the plurality of modes are performed. Machine.

According to feature G13, when the display corresponding to the aspect information is performed, the unit light emitting parts of any combination are set to the light emitting state. Therefore, in order to diversify the display corresponding to the aspect information, It becomes possible to place as few restrictions as possible on the content of the display corresponding to the information.

Feature G14: The information display means includes a plurality of individual information display means including a specific individual information display means (the third notification display device 69c in the first to tenth embodiments, the fourth notification display device 204 in the eleventh and twelfth embodiments, and the third notification display device 203 and the fourth notification display device 204 in the thirteenth embodiment),
The gaming machine described in feature G12 or G13, wherein the second information display control means, when causing a display corresponding to the different information to be performed, causes a predetermined individual information display means (the first alert display device 69a and the second alert display device 69b in the first to tenth embodiments, the first alert display device 201, the second alert display device 202, and the third alert display device 203 in the 11th and 12th embodiments, and the first alert display device 201 and the second alert display device 202 in the 13th embodiment) among the plurality of individual information display means to be in a non-display state when a display corresponding to the aspect information is performed.

According to feature G14, a specific individual information display means that is not in a hidden state when a display corresponding to mode information is made is in a hidden state when a display corresponding to other information is made. This makes it possible to clearly identify whether a display corresponding to mode information or a display corresponding to other information is being made, simply by grasping the type of individual information display means that is in a hidden state.

Feature G15. Equipped with a setting means (a function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level,
The gaming machine according to any one of features G1 to G14, wherein the second information display control means causes a display corresponding to the separate information to be displayed in a situation where the setting value can be changed.

According to feature G15, the information display means that displays information corresponding to the mode information can also be used as a display means for notifying the user that a setting value can be changed.

Feature G16. The gaming machine according to feature G15, wherein the second information display control means causes information corresponding to the currently selected setting value to be displayed as the display corresponding to the separate information.

According to feature G16, the information display means that displays the mode information can also be used as a display means for displaying the setting value that is being changed.

Feature G17. The gaming machine described in any one of Features G1 to G16, characterized in that the second information display control means causes a display corresponding to an abnormal state of the gaming machine to be displayed as a display corresponding to the other information.

According to feature G17, the information display means for displaying a display corresponding to mode information can also be used as a display means for displaying a display corresponding to an abnormal state of the gaming machine.

Feature G18. The gaming machine described in Feature G17, wherein the second information display control means, when causing a display corresponding to the abnormal condition to be displayed in a situation in which the abnormal condition is not occurring, causes a display corresponding to the absence of the abnormal condition to be displayed.

Feature G18 makes it possible to clearly identify whether an abnormal condition has occurred by checking the information display means.

In addition, for the configuration of features G1 to G18, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Feature H Group>
Feature H1. A history storage execution means (a function for executing a history setting process in the management CPU 112) for storing history information of a game corresponding to a predetermined event that occurs when the game is executed in the history storage means (history memory 117);
information derivation means for deriving aspect information corresponding to game results during a predetermined period of time using the history information stored in the history storage means (a function for executing the processes of steps S1402 to S1412 in the management CPU 112 in the first embodiment, a function for executing the process of step S1807 in the management CPU 112 in the third embodiment, and a function for executing the process of step S2107 in the management CPU 112 in the fifth embodiment);
a first information display control means (a function of executing a display process in the management CPU 112) for controlling the display of an information display means (the first to third notification display devices 69a to 69c in the first to tenth embodiments, and the first to fourth notification display devices 201 to 204 in the eleventh to fourteenth embodiments) so that a display corresponding to the aspect information derived by the information derivation means is performed;
A second information display control means for controlling the display of the information display means so that a display corresponding to another information different from the aspect information is performed (a function for executing the processes of steps S202 and S208 in the main CPU 63 in the first to tenth embodiments, a function for executing the processes of steps S3101, S3103, and S3109 in the main CPU 63 in the eleventh embodiment, a function for executing the processes of steps S3201, S3202, S3204, and S3210 in the main CPU 63 in the twelfth embodiment, and a function for executing the process for abnormality display in the main CPU 63 in the thirteenth embodiment);
Equipped with
the information display means has a plurality of unit light-emitting elements (display segments 201 a to 201 g, 202 a to 202 g) and is configured to be able to perform a predetermined display by a combination of unit light-emitting elements that are in a light-emitting state among the plurality of unit light-emitting elements;
The second information display control means causes a display corresponding to the other information to be displayed by causing unit light-emitting units among the plurality of unit light-emitting units that can be made to emit light when a display corresponding to the status information is made to emit light, and is characterized in that the combination of unit light-emitting units that are made to emit light when a display corresponding to the other information is made is a combination that does not exist when a display corresponding to the status information is made.

According to feature H1, when a predetermined event occurs, history information corresponding to the event is stored in the history storage means. This allows the gaming machine to store and hold information for managing the number of occurrences or frequency of occurrence of the predetermined event, and by using this managed information, it is possible to appropriately manage the frequency of occurrence of the predetermined event. Furthermore, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Furthermore, by using the history information stored in the history storage means, behavior information corresponding to the results of play during a predetermined period is derived. Then, a display corresponding to the behavior information is performed by the information display means. This makes it possible to grasp the results of management of the game history, such as the frequency of occurrence of the predetermined event. Furthermore, the information display means not only displays corresponding to the behavior information but also displays corresponding to other information. This makes it possible to effectively use the information display means.

In addition, display corresponding to different information is performed by setting a unit light-emitting section to a light-emitting state, which can be set to a light-emitting state when a display corresponding to the mode information is displayed, thereby diversifying the display corresponding to the mode information. It becomes possible to place as few restrictions as possible on the content of the display corresponding to the mode information. On the other hand, a combination of unit light emitting parts that are in a light emitting state when a display corresponding to different information is performed is a combination that does not exist when a display corresponding to mode information is performed. Thereby, by understanding the combination of unit light emitting parts that are in the light emitting state, it becomes possible to understand which of the display corresponding to the mode information and the display corresponding to other information is being performed.

Feature H2. There are a plurality of display modes corresponding to the mode information in the information display means,
The game according to feature H1, wherein among the plurality of unit light emitting parts, there is no unit light emitting part that does not enter a light emitting state even if all the displays corresponding to the mode information of the plurality of modes are performed. Machine.

According to feature H2, when a display corresponding to the aspect information is made, any combination of unit light-emitting elements is made to emit light, so that it is possible to diversify the display corresponding to the aspect information without restricting the content of the display corresponding to the aspect information as much as possible.

Feature H3. Specific individual information display means that is the information display means (the third notification display device 69c in the first to tenth embodiments, the fourth notification display device 204 in the eleventh and twelfth embodiments, the thirteenth In the embodiment, a plurality of individual information display means including a third notification display device 203 and a fourth notification display device 204 are provided,
When causing a display corresponding to the separate information to be displayed, the second information display control means selects a predetermined individual information display means from among the plurality of individual information display means that does not go into a non-display state when a display corresponding to the aspect information is displayed. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments; first notification display device 201 and second notification device in the eleventh and twelfth embodiments) Feature H1 characterized in that the display device 202 and the third notification display device 203 (in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are in a non-display state. Or the gaming machine described in H2.

According to feature H3, a specific individual information display means that is not in a hidden state when a display corresponding to the mode information is made is in a hidden state when a display corresponding to the other information is made. This makes it possible to clearly identify whether a display corresponding to the mode information or a display corresponding to the other information is being made, simply by grasping the type of individual information display means that is in a hidden state.

Feature H4. The gaming machine described in Feature H3, wherein the first information display control means sets each of the multiple individual information display means to a display state when performing a display corresponding to the mode information.

According to feature H4, when a display corresponding to mode information is made, each of the multiple individual information display means is in a display state, making it possible to clearly distinguish this from a case where a display corresponding to other information is made in which a specific individual information display means is in a non-display state.

Feature H5. The gaming machine described in Feature H3 or H4, wherein the first information display control means sequentially changes the display of the status information on the information display means, and even when the display of the status information is changed, the predetermined individual information display means is not maintained in a non-display state.

According to feature H5, when display corresponding to mode information is performed, the predetermined individual information display means is not maintained in a non-display state. As a result, regardless of the timing at which the plurality of individual information display means are checked, it is possible to specify which of the display corresponding to the mode information and the display corresponding to separate information is being performed on the plurality of individual information display means. becomes possible.

Feature H6. Equipped with a setting means (a function for executing a setting value update process in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
A gaming machine described in any one of features H1 to H5, characterized in that the second information display control means causes a display corresponding to the other information to be performed in a situation in which the setting value can be changed.

According to feature H6, the information display means that displays the status information can also be used as a display means for notifying the user that the setting value can be changed.

Feature H7. The gaming machine described in Feature H6, wherein the second information display control means displays information corresponding to a currently selected setting value as the display corresponding to the different information.

According to feature H7, the information display means that displays the display corresponding to the aspect information can also be used as the display means for displaying the setting value that is being changed.

Note that for the configuration of features H1 to H7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristics Group I>
Feature I1. A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
Information deriving means (in the first embodiment, step S1402 to step S1412 in the management CPU 112 (in the third embodiment, the function to execute the process of step S1807 in the management CPU 112; in the fifth embodiment, the function to execute the process in step S2107 in the management CPU 112),
A first information display control means (management side a function of executing display processing in the CPU 112);
a second information display control means (a function for executing abnormality display processing in the main CPU 63) that controls the display of the information display means so that a display corresponding to an abnormal state of the gaming machine is displayed;
A gaming machine characterized by comprising:

According to feature I1, when a predetermined event occurs, history information corresponding to the event is stored in the history storage means. This allows the gaming machine to store and hold information for managing the number of occurrences or frequency of occurrence of the predetermined event, and by using this managed information, it is possible to appropriately manage the frequency of occurrence of the predetermined event. Furthermore, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Furthermore, by using the history information stored in the history storage means, behavior information corresponding to the results of play during a predetermined period is derived. Then, a display corresponding to the behavior information is performed by the information display means. This makes it possible to grasp the results of management of the game history, such as the frequency of occurrence of the predetermined event. Furthermore, the information display means not only displays corresponding to the behavior information, but also displays corresponding to abnormal states of the gaming machine. This makes it possible to effectively use the information display means.

Feature I2. The gaming machine described in Feature I1, wherein the second information display control means, when causing a display corresponding to the abnormal condition to be displayed in a situation in which the abnormal condition is not occurring, causes a display corresponding to the absence of the abnormal condition to be displayed.

According to feature I2, it is possible to clearly identify whether or not an abnormal condition has occurred by checking the information display means.

Feature I3. A gaming machine according to feature I1 or I2, characterized in that the period during which the information display means displays the status information is distinguished from the period during which the information display means displays the abnormal state.

According to feature I3, by understanding the situation in which display is being performed on the information display means, it is possible to determine which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed on the information display means. It becomes possible to specify.

Feature I4. The second information display control means displays a display corresponding to the abnormal state by controlling the display of the information display means so that the display mode is different from the display mode when the display corresponding to the mode information is displayed. The gaming machine according to feature G1 or G2, wherein

According to feature I4, by grasping the display mode of the information display means, it is possible to identify whether the display corresponding to the mode information or the display corresponding to the abnormal state is being displayed on the information display means.

Feature I5. A gaming machine according to any one of Features I1 to I4, characterized in that the information display means includes a plurality of individual information display means (first to fourth notification display devices 201 to 204), each capable of displaying a plurality of types of information.

According to feature I5, a wide variety of status information can be displayed by using multiple individual information display means to display information corresponding to the status information. In addition, the existence of multiple individual information display means makes it possible to greatly differ the display mode between when a display corresponding to status information is displayed and when a display corresponding to an abnormal state is displayed.

Feature I6. The gaming machine described in Feature I5, characterized in that when the second information display control means causes a display corresponding to the abnormal state to be displayed, a predetermined individual information display means (the first alert display device 201 and the second alert display device 202) among the plurality of individual information display means that is not in a hidden state when a display corresponding to the mode information is performed is in a hidden state.

According to feature I6, the predetermined individual information display means, which does not go into a non-display state when a display corresponding to mode information is performed, becomes a non-display state when a display corresponding to an abnormal state is performed. As a result, simply by understanding the type of individual information display means that is in a hidden state, it is possible to clearly identify which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed. becomes possible.

Feature I7. When the second information display control means causes a display corresponding to the abnormal state to be performed, a specific individual information display means (the third notification display device 203 and the fourth notification display device 204) that is in a display state when the aspect information is displayed among the plurality of individual information display means is in a display state;
A gaming machine as described in feature I6, characterized in that the display content of the specific individual information display means when a display corresponding to the abnormal state is made can be displayed on the specific individual information display means when a display corresponding to the status information is made.

According to feature I7, the display content that can be displayed when a display corresponding to mode information is made on a specific individual information display means can also be displayed when a display corresponding to an abnormal state is made, making it possible to avoid restricting the display content when a display corresponding to mode information is made. Also, even if a specific individual information display means is configured to be able to display the same content, a specific individual information display means that has the configuration of feature I7 and is not in a hidden state when a display corresponding to mode information is made becomes in a hidden state when a display corresponding to an abnormal state is made, making it possible to identify which display is being made on multiple individual information display means.

Feature I8. The gaming machine described in Feature I6 or I7, wherein the first information display control means sets each of the multiple individual information display means to a display state when performing a display corresponding to the mode information.

According to feature I8, when a display corresponding to status information is made, each of the multiple individual information display means is in a display state, making it possible to clearly distinguish this from a display corresponding to an abnormal state in which a specific individual information display means is in a non-display state.

Feature I9. The first information display control means sequentially changes the display of the aspect information on the information display means, and even when changing the display of the aspect information, the predetermined individual information display means is in a non-display state. The gaming machine according to any one of features I6 to I8, characterized in that the game machine is configured such that the game machine is not maintained in the same state.

According to feature I9, when a display corresponding to the status information is being displayed, the specified individual information display means is not maintained in a non-display state. This makes it possible to identify whether a display corresponding to the status information or a display corresponding to an abnormal state is being displayed on the multiple individual information display means, regardless of the timing at which the multiple individual information display means are checked.

In addition, for the configuration of features I1 to I9, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Characteristics Group J>
Feature J1. A history storage execution means (a function for executing a history setting process in the management CPU 112) for storing history information of a game corresponding to a predetermined event that occurs as a result of the game being played in the history storage means (history memory 117);
information derivation means for deriving aspect information corresponding to game results during a predetermined period of time using the history information stored in the history storage means (a function for executing the processes of steps S1402 to S1412 in the management CPU 112 in the first embodiment, a function for executing the process of step S1807 in the management CPU 112 in the third embodiment, and a function for executing the process of step S2107 in the management CPU 112 in the fifth embodiment);
a first information display control means (a function of executing a display process in the management CPU 112) for controlling the display of an information display means (the first to third notification display devices 69a to 69c in the first to tenth embodiments, and the first to fourth notification display devices 201 to 204 in the eleventh to fourteenth embodiments) so that a display corresponding to the aspect information derived by the information derivation means is performed;
Equipped with
The first information display control means sequentially changes the display corresponding to the status information on the information display means, and is characterized in that the information display means is not maintained in a non-display state even when the display corresponding to the status information is changed.

According to feature J1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Further, mode information corresponding to the results of the game in a predetermined period is derived using the history information stored in the history storage means. Then, a display corresponding to the aspect information is performed on the information display means. This makes it possible to grasp the gaming history management results, such as the frequency of occurrence of predetermined events. Furthermore, when a display corresponding to the mode information is displayed, the information display means is not maintained in a non-display state. This makes it possible to specify the display corresponding to the mode information, regardless of the timing at which the information display means is checked.

Feature J2. As the information display means, individual information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to fourteenth In the embodiment, the gaming machine according to feature J1 is provided with a plurality of first to fourth notification display devices 201 to 204).

According to feature J2, by using multiple individual information display means to display information corresponding to the behavior information, it is possible to display a wide variety of behavior information.

Feature J3. The gaming machine described in Feature J2, wherein the first information display control means sets each of the plurality of individual information display means to a display state when performing a display corresponding to the mode information.

According to feature J3, each of the plurality of individual information display means is in the display state when the display corresponding to the mode information is performed, and even when the display corresponding to the mode information is changed, the display state is not changed. maintained. This makes it easier to understand the aspect information.

Feature J4. The gaming machine described in Feature J2 or J3, characterized in that the first information display control means causes a display corresponding to the type of the aspect information to be displayed on an individual information display means to be a type display target that is a part of the plurality of individual information display means (the first notification display device 69a in the first to tenth embodiments, and the first notification display device 201 and the second notification display device 202 in the eleventh to fourteenth embodiments), and causes a display corresponding to the content of the aspect information to be displayed on an individual information display means to be a result display target that is a part of the plurality of individual information display means (the second notification display device 69b and the third notification display device 69c in the first to tenth embodiments, and the third notification display device 203 and the fourth notification display device 204 in the eleventh to fourteenth embodiments).

According to feature J4, when a display corresponding to the aspect information is made, a display corresponding to the type of aspect information to be displayed is made in the individual information display means of the type display target, and a display corresponding to the content of the aspect information to be displayed is made in the individual information display means of the result display target. This makes it easier to grasp the aspect information to be displayed.

In addition, for the configuration of features J1 to J4, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Feature K group>
Feature K1. A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); ),
The history storage execution means is a means for preventing the history information from being stored in the history storage means even if the predetermined event occurs in a restricted situation (a function for making a negative determination in step S3501 in the main CPU 63). ) A gaming machine characterized by comprising:

According to feature K1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, in a restricted situation, history information is not stored even if a predetermined event occurs, so it is possible to prevent history information from being stored in situations where it is undesirable to store history information. .

Feature K2. The gaming machine described in Feature K1, characterized in that the restricted state can occur from when the supply of operating power to the history storage execution means starts until a restriction release event occurs.

According to feature K2, it is possible to prevent the occurrence of a predetermined event due to an operation check immediately after the start of supply of operating power from being stored as history information.

Feature K3: A means for setting the limiting state when the supply of operating power to the history storage execution means is started and the limiting condition is satisfied (a function for executing the process of step S3610 in the main CPU 63);
A means for not setting the limiting state when the supply of operating power to the history storage execution means is started and the limiting condition is not satisfied (a function for executing the process of step S3621 in the main CPU 63);
The gaming machine according to feature K2, characterized in that it is equipped with:

According to feature K3, the restricted state may or may not be set depending on whether the restrictive condition is met. This makes it possible to avoid setting the restricted state as necessary.

Feature K4. The limiting situation may occur as a situation from when the supply of operating power to the history storage execution means is started until the number of gaming balls discharged from the gaming area exceeds a predetermined reference number. The gaming machine according to any one of K1 to K3.

Feature K4 makes it possible to prevent history information from being stored until the number of game balls discharged from the game area reaches or exceeds a predetermined reference number after the supply of operating power begins.

Feature K5. A history storage execution means (a function for executing a normal ball entry management process in the main CPU 63, a ball entry management process during the opening and closing execution mode, and a ball entry management process during the high frequency support mode) for storing corresponding game history information in the history storage means (a normal counter area 231, a counter area 232 for the opening and closing execution mode, and a ball entry management process during the high frequency support mode) when a predetermined event occurs due to the execution of a game;
An information deriving means (a function for executing the process of step S4208 in the master CPU 63) for deriving behavior information corresponding to a game result during a predetermined period by utilizing the history information stored in the history storage means;
Equipped with
The gaming machine is characterized in that the information deriving means does not derive the status information when a restricted situation occurs.

According to feature K5, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Further, mode information corresponding to the results of the game in a predetermined period is derived using the history information stored in the history storage means. This makes it possible to grasp the gaming history management results, such as the frequency of occurrence of predetermined events. Furthermore, in the case of a restricted situation, modal information will not be derived even if a predetermined event occurs, so it is possible to prevent modal information from being derived in situations where it is undesirable to derive modal information. .

Feature K6. The gaming machine according to feature K5, wherein the restriction situation can occur as a situation from when the supply of operating power to the history storage execution means is started until a restriction release event occurs.

Feature K6 makes it possible to prevent the derivation of behavior information using history information based on the occurrence of a specified event during an operation check immediately after the supply of operating power begins.

Feature K7. The limiting situation may occur as a situation from when the supply of operating power to the history storage execution means is started until the number of gaming balls discharged from the gaming area exceeds a predetermined reference number. The gaming machine described in K5 or K6.

According to feature K7, it is possible to prevent mode information from being derived until the number of game balls discharged from the game area reaches or exceeds a predetermined reference number after the supply of operating power is started.

In addition, for the configuration of features K1 to K7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

The invention relating to the above-mentioned feature group G, feature group H, feature group I, feature group J, and feature group K makes it possible to solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, the gaming ball is paid out from, for example, a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known for a pachinko machine, and in this case, the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, gaming machines such as those exemplified above need to be properly managed, and there is still room for improvement in this regard.

<Feature L group>
Feature L1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
A first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least one of the items stored in the internal storage means is evacuation execution means (in the fifteenth embodiment, a function for executing the processes of step S3802 and steps S3902 to S3907 in the main side CPU 63; In the embodiment, the function of executing the process of step S4402 in the main CPU 63, in the 17th embodiment, the function of executing the process of steps S4502 to S4507 in the main CPU 63, and in the 18th embodiment, the function of executing the process of step S4502 in the main CPU 63. a function of executing the process of S4602, a function of executing the processes of step S4701 and step S4703 in the main CPU 63 in the 19th embodiment),
When or after the second predetermined process is finished, return execution means (in the fifteenth embodiment, step S3804 and A function to execute the process from step S3910 to step S3915, a function to execute the process from step S4404 in the main CPU 63 in the 16th embodiment, and a function to execute the process from step S4510 to step S4515 in the main CPU 63 in the 17th embodiment. (in the 18th embodiment, a function to execute the processing of step S4605 in the main CPU 63, and in the 19th embodiment, a function to execute the processing in step S4705 and step S4706 in the main CPU 63),
A gaming machine characterized by comprising:

According to feature L1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least some of the information is saved in a predetermined storage means. Thereby, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Furthermore, when or after the second predetermined process is finished, the information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process. From the above, it becomes possible to perform various types of control suitably.

Feature L2. The gaming machine according to feature L1, wherein the predetermined information is part of the information stored in the internal storage means.

According to feature L2, only a portion of the information stored in the internal storage means is evacuated to the specified storage means, making it possible to reduce the storage capacity required to evacuate the information from the internal storage means in the specified storage means.

Feature L3. The internal storage means has a first storage area (WA register, BC register, DE register, HL register, IX register, and IY register) and a second storage area (WA register, BC register, DE register, HL register, IX register, and registers other than IY registers),
The second predetermined process execution means is configured to store information in the first storage area in the second predetermined process, but not to store information in the second storage area,
The gaming machine according to feature L2, wherein the saving execution means saves the information stored in the first storage area to the predetermined storage means.

According to feature L3, when the situation changes from one in which the first predetermined process is being executed to one in which the second predetermined process is being executed, or when the situation changes to one in which the second predetermined process is being executed, information in the first storage area that is to be stored in the second predetermined process in the internal storage means is saved to the predetermined storage means. This makes it possible to reduce the storage capacity required to save information from the internal storage means in the predetermined storage means, while making it possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process when the second predetermined process is completed.

Feature L4. The predetermined storage means is
a first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
A gaming machine according to any one of features L1 to L3, characterized in that the save execution means saves the specified information in the second specified memory area.

According to feature L4, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the storage destination of information in the predetermined storage means can be determined by the first predetermined process and the second predetermined process. It becomes possible to make a clear difference. Thereby, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. In this case, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least a portion of the information stored in the internal storage means is information is saved to the second predetermined storage area. This makes it possible to save the information in the internal storage means immediately before the start of the second predetermined process, and also makes it possible to save the information without using the first predetermined storage area.

Feature L5. The save execution means is
A means for saving first predetermined information, which is a part of information stored in the internal storage means, to the first predetermined storage area in the first predetermined processing when the situation changes from the situation where the first predetermined processing is being executed to the situation where the second predetermined processing is being executed (a function for executing the processing of step S3802 in the main CPU 63 in the fifteenth embodiment, and a function for executing the processing of step S4402 in the main CPU 63 in the sixteenth embodiment);
A means for saving second predetermined information, which is a part of information stored in the internal storage means, to the second predetermined storage area in the second predetermined processing when the situation changes from the situation where the first predetermined processing is being executed to the situation where the second predetermined processing is being executed (in the fifteenth embodiment, a function for executing the processing of steps S3902 to S3907 in the main CPU 63; in the seventeenth embodiment, a function for executing the processing of steps S4502 to S4507 in the main CPU 63; in the eighteenth embodiment, a function for executing the processing of step S4602 in the main CPU 63; and in the nineteenth embodiment, a function for executing the processing of steps S4702 and S4703 in the main CPU 63);
A gaming machine according to feature L4, characterized in that it is equipped with:

According to feature L5, the first predetermined information that is part of the information stored in the internal storage means is saved in the first predetermined storage area in the first predetermined process, and the part of the information stored in the internal storage means is saved in the first predetermined storage area in the first predetermined process. The second predetermined information is saved in the second predetermined storage area in the second predetermined process. As a result, it becomes possible to save each piece of information stored in the internal storage means at a timing that is preferable, and the process for saving information is executed in a distributed manner between the first predetermined process and the second predetermined process. becomes possible.

Feature L6. The gaming machine according to feature L5, wherein the first predetermined information is information in a flag register provided in the internal storage means.

According to feature L6, it is possible to appropriately save information in the flag register in a situation where the first predetermined process is being executed.

Feature L7. The second predetermined storage area is
a stack area (non-specific control stack area 224) into which information can be written by a push command and into which information can be read by a pop command;
A work area (non-specific control work area 223) in which information can be written and read by a load command;
Equipped with
A gaming machine according to any one of features L4 to L6, wherein the save execution means saves the specified information to one of the stack area and the work area.

According to feature L7, when the situation changes from one in which the first predetermined process is being executed to one in which the second predetermined process is being executed, or when the situation changes to one in which the second predetermined process is being executed, at least a portion of the information stored in the internal storage means is saved to one of the stack area and the work area in the second predetermined storage area. This makes it possible to consolidate the destinations for saving information, and to simplify the processing configuration for saving and the processing configuration for restoring.

Feature L8. The gaming machine according to feature L7, wherein the saving execution means saves the predetermined information to the work area.

According to feature L8, since the save destination of at least part of the information stored in the internal storage means is the work area, it is possible to save the information without cumulatively changing the stack pointer. Become.

Feature L9: The first predetermined storage area is capable of storing information and reading information when the first predetermined process is executed, and is capable of reading information but is not capable of storing information when the second predetermined process is executed;
A gaming machine described in any one of features L4 to L8, characterized in that the second specified memory area is capable of storing information and reading information when the second specified process is executed, and is capable of reading information but not storing information when the first specified process is executed.

According to feature L9, it is possible to treat the first predetermined storage area as a storage area dedicated to the first predetermined process, and it is also possible to treat the second predetermined storage area as a storage area dedicated to the second predetermined process. becomes.

Feature L10. The predetermined storage means is
a stack area (non-specific control stack area 224) into which information can be written by a push command and into which information can be read by a pop command;
A work area (non-specific control work area 223) in which information can be written and read by a load command;
Equipped with
A gaming machine described in any one of features L1 to L9, wherein the save execution means saves the specified information to one of the stack area and the work area.

According to feature L10, it becomes possible to consolidate the save destinations of the predetermined information, and it becomes possible to simplify the processing configuration for saving the predetermined information and the processing configuration for restoring the predetermined information.

Feature L11. The gaming machine according to feature L10, wherein the saving execution means saves the predetermined information to the work area.

According to feature L11, the destination for saving specific information is the work area, making it possible to save the information without making cumulative changes to the stack pointer.

Feature L12: The predetermined information is a part of the information stored in the internal storage means,
The gaming machine described in feature L11 is characterized in that the save execution means is equipped with a means (a function of executing the processing of step S3802 in the main CPU 63) for saving specific information, which is a part of the information stored in the internal storage means, to the stack area when the situation changes from one in which the first specified processing is being executed to one in which the second specified processing is being executed or when the situation changes to one in which the second specified processing is being executed.

According to feature L12, in a configuration in which predetermined information is saved in the work area, specific information is saved in the stack area. This allows the information stored in the internal storage means to be distributed and saved in the work area and the stack area.

Feature L13. The gaming machine according to feature L12, wherein the predetermined information has a larger amount of information than the specific information.

According to feature L13, by saving predetermined information, which has a larger amount of information than specific information, in the work area, it is possible to prevent a large amount of information from being cumulatively stored in the stack area when saving information stored in the internal storage means.

Feature L14: When the state of executing the first predetermined process changes to the state of executing the second predetermined process, or when the state of executing the second predetermined process changes, information of the stack pointer provided in the internal storage means becomes fixed information;
A gaming machine described in any one of features L1 to L13, characterized in that information of a stack pointer provided in the internal storage means is not subject to saving by the save execution means.

According to feature L14, since there is no need to reserve capacity in the specified storage means for saving stack pointer information, it is possible to reduce the capacity of the specified storage means. Even in such a configuration in which stack pointer information is not saved, when the situation changes from the situation in which the first specified process is being executed to the situation in which the second specified process is being executed, or when the situation changes to the situation in which the second specified process is being executed, the stack pointer information becomes fixed information, so it is possible to restore the stack pointer information to the information before the second specified process was started without saving the stack pointer information as described above.

Feature L15. A gaming machine according to feature L14, characterized in that it is provided with a means for setting the fixed information in the stack pointer when or after the second predetermined process is completed (a function for executing the process of step S3909 in the main CPU 63 in the 15th embodiment, a function for executing the process of step S4509 in the main CPU 63 in the 17th embodiment, and a function for executing the process of step S4604 in the main CPU 63 in the 18th embodiment).

According to feature L15, when or after the second specified process is terminated, it is possible to restore the stack pointer information to the state before the second specified process was started.

Feature L16. When the situation changes from executing the first predetermined process to executing the second predetermined process, or when the situation changes to executing the second predetermined process, the stack pointer is set to the second predetermined process. means for setting the corresponding second response start information (in the fifteenth embodiment, a function of executing the process of step S3901 in the main CPU 63; in the seventeenth embodiment, a function of executing the process of step S4501 in the main CPU 63; In the eighteenth embodiment, the gaming machine according to feature L14 or L15 is provided with a function of executing the process of step S4601 in the main CPU 63.

According to feature L16, when the second predetermined process is started, second corresponding start information corresponding to the second predetermined process is set in the stack pointer, making it possible to store information in the stack area at an appropriate address in the second predetermined process.

Feature L17. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features L1 to L16, wherein the second predetermined process includes a process for managing a gaming history.

According to feature L17, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature L18: The predetermined storage means is
a first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The gaming machine described in feature L17 is characterized in that the second specified memory area is equipped with a history memory area (normal counter area 231, counter area 232 for opening/closing execution mode, counter area 233 for high frequency support mode) in which corresponding game history information is stored when a specified event occurs as a result of the game being played.

According to feature L18, when a predetermined event occurs, the corresponding history information is stored in the history storage area. This allows the gaming machine to store and hold information for managing the number of times or frequency of occurrence of the predetermined event, and by using this managed information, it becomes possible to appropriately manage the frequency of occurrence of the predetermined event. Furthermore, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Furthermore, by executing a process for controlling the progress of the game as the first predetermined process, and executing a process for managing the game history as the second predetermined process, it becomes possible to prevent the information stored in the history storage area from being rewritten when the process for controlling the progress of the game is executed.

Feature L19. The gaming machine described in Feature L18, characterized in that the second predetermined process execution means includes information derivation means (a function for executing the process of step S4208 in the main CPU 63) that uses the history information stored in the history storage area to derive behavior information corresponding to the game results during a predetermined period.

According to feature L19, by deriving behavior information corresponding to the results of play during a specified period of time using the history information stored in the history storage area, it becomes possible to grasp the results of management of the play history, such as the frequency of occurrence of a specified event.

Feature L20. The gaming machine according to feature L19, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature L20, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any timing. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the aspect information storage area from being rewritten during execution.

Note that for the configuration of features L1 to L20, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature M group>
Feature M1. Equipped with a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processes;
The control means includes:
A first predetermined processing execution means for executing a first predetermined processing among the various processing (a function for executing processing other than the management execution processing in the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined processing execution means (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments) that executes a second predetermined processing among the various processing;
When the situation changes from the situation where the first predetermined processing is being executed to the situation where the second predetermined processing is being executed or when the situation where the second predetermined processing is being executed is reached, a save execution means saves predetermined information, which is at least a part of the information stored in the internal storage means, to a predetermined storage means (main RAM 65) (in the fifteenth embodiment, a function for executing the processing of steps S3902 to S3907 in the main CPU 63; in the seventeenth embodiment, a function for executing the processing of steps S4502 to S4507 in the main CPU 63; in the eighteenth embodiment, a function for executing the processing of step S4602 in the main CPU 63; and in the nineteenth embodiment, a function for executing the processing of steps S4701 and S4703 in the main CPU 63);
A restoration execution means for restoring the specified information saved in the specified storage means to the internal storage means when or after the second specified process is completed (in the fifteenth embodiment, a function for executing the processes of steps S3910 to S3915 in the main CPU 63; in the seventeenth embodiment, a function for executing the processes of steps S4510 to S4515 in the main CPU 63; in the eighteenth embodiment, a function for executing the processes of step S4605 in the main CPU 63; and in the nineteenth embodiment, a function for executing the processes of steps S4705 and S4706 in the main CPU 63);
Equipped with
The save execution means saves the specified information into the specified storage means in response to a load command.

According to feature M1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least part of the predetermined information is saved in a predetermined storage means. Thereby, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined process is finished, the predetermined information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process. When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the above predetermined information is saved to the predetermined storage means by a load instruction. . This makes it possible to save predetermined information without changing the stack pointer.

Feature M2. The predetermined storage means is
a stack area (stack area 224 for non-specific control) into which information can be written with a push command and read with a pop command;
a work area (work area 223 for non-specific control) in which information can be written and read by a load command;
Equipped with
The gaming machine according to feature M1, wherein the saving execution means saves the predetermined information to the work area.

According to feature M2, since the predetermined information, which is at least part of the information stored in the internal storage means, is saved to the work area, the information is saved without cumulatively changing the stack pointer. becomes possible.

Feature M3. The predetermined information is a part of information stored in the internal storage means,
The evacuation execution means stores the internal storage means when the situation changes from the situation where the first predetermined process is being executed to the situation where the second predetermined process is executed or when the situation changes to a situation where the second predetermined process is executed. The gaming machine according to feature M2, further comprising means for saving specific information, which is part of the information stored in the stack area, into the stack area (a function of executing the process of step S3802 in the main CPU 63). .

According to feature M3, in a configuration in which predetermined information is saved to a work area, specific information is saved to a stack area. This makes it possible to distribute and save information stored in the internal storage means to the work area and stack area.

Feature M4. The gaming machine described in Feature M3, characterized in that the predetermined information contains more information than the specific information.

According to feature M4, by saving predetermined information, which has a larger amount of information than specific information, in the work area, it is possible to prevent a large amount of information from being cumulatively stored in the stack area when saving information stored in the internal storage means.

Feature M5. The work area is
a first work area (work area 221 for specific control) in which information is stored when the first predetermined process is executed;
a second work area (work area 223 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The gaming machine according to any one of features M2 to M4, wherein the saving execution means saves the predetermined information to the second work area.

According to feature M5, by providing the first work area and the second work area in the work area, the storage destination of information in the work area is clearly different between the first predetermined process and the second predetermined process. becomes possible. Thereby, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. In this case, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least a portion of the information stored in the internal storage means is information is saved to the second work area. This makes it possible to save the information in the internal storage means immediately before the start of the second predetermined process, and also makes it possible to save the information without using the first work area.

Feature M6. The first work area is capable of storing and reading information when the first predetermined process is executed, and is capable of reading information when the second predetermined process is executed. Inability to remember information
The second work area is capable of storing and reading information when the second predetermined process is executed, and is capable of reading information when the first predetermined process is executed. The gaming machine according to feature M5, characterized in that information cannot be stored.

According to feature M6, it becomes possible to treat the first work area as a storage area dedicated to the first predetermined process, and it becomes possible to treat the second work area as a storage area dedicated to the second predetermined process. .

Feature M7. Equipped with a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processes;
The control means includes:
A first predetermined processing execution means for executing a first predetermined processing among the various processing (a function for executing processing other than the management execution processing in the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined processing execution means (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments) that executes a second predetermined processing among the various processing;
When the situation changes from the situation where the first predetermined processing is being executed to the situation where the second predetermined processing is being executed or when the situation where the second predetermined processing is being executed is reached, a save execution means saves predetermined information, which is at least a part of the information stored in the internal storage means, to a predetermined storage means (main RAM 65) (in the fifteenth embodiment, a function for executing the processing of steps S3902 to S3907 in the main CPU 63; in the seventeenth embodiment, a function for executing the processing of steps S4502 to S4507 in the main CPU 63; in the eighteenth embodiment, a function for executing the processing of step S4602 in the main CPU 63; and in the nineteenth embodiment, a function for executing the processing of steps S4701 and S4703 in the main CPU 63);
A restoration execution means for restoring the specified information saved in the specified storage means to the internal storage means when or after the second specified process is completed (in the fifteenth embodiment, a function for executing the processes of steps S3910 to S3915 in the main CPU 63; in the seventeenth embodiment, a function for executing the processes of steps S4510 to S4515 in the main CPU 63; in the eighteenth embodiment, a function for executing the processes of step S4605 in the main CPU 63; and in the nineteenth embodiment, a function for executing the processes of steps S4705 and S4706 in the main CPU 63);
Equipped with
The predetermined storage means includes:
a stack area (non-specific control stack area 224) into which information can be written by a push command and into which information can be read by a pop command;
A work area (non-specific control work area 223) in which information can be written and read by a load command;
Equipped with
The gaming machine is characterized in that the save execution means saves the specified information to one of the stack area and the work area.

According to feature M7, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least part of the predetermined information is saved in a predetermined storage means. Thereby, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined process is finished, the predetermined information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process.

In addition, when the situation changes from one in which the first predetermined process is being executed to one in which the second predetermined process is being executed, or when the situation changes to one in which the second predetermined process is being executed, the above-mentioned predetermined information is saved to one of the stack area and the work area in the predetermined storage means. This makes it possible to consolidate the destinations for saving information, and to simplify the processing configuration for saving and the processing configuration for restoring.

Note that for the configuration of features M1 to M7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristics N group>
Feature N1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
A first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
Equipped with
When the situation changes from the situation in which the first predetermined process is executed to the situation in which the second predetermined process is executed, the information of the stack pointer provided in the internal storage means is configured to be fixed information. A gaming machine.

According to feature N1, when the situation changes from the execution of the first predetermined process to the execution of the second predetermined process, the stack pointer information stored in the internal storage means becomes fixed information, so there is no need to save the stack pointer information when starting the second predetermined process. This eliminates the need to secure a storage area for saving the stack pointer information. In addition, when the situation changes from the execution of the first predetermined process to the execution of the second predetermined process, the stack pointer information becomes fixed information, so it is possible to restore the stack pointer information to the state before the second predetermined process was started without having to save the stack pointer information as described above.

Feature N2. Means for setting the fixed information in the stack pointer when or after the second predetermined process (in the fifteenth embodiment, a function for executing the process in step S3909 in the main CPU 63, in the seventeenth embodiment) In the embodiment, the gaming machine according to feature N1 is equipped with a function of executing the process of step S4509 in the main CPU 63, and a function of executing the process of step S4604 in the main CPU 63 in the 18th embodiment. .

According to feature N2, when or after the second predetermined process is finished, it is possible to restore the stack pointer information to the information before the second predetermined process was started.

Feature N3. means for setting second response start information corresponding to the second predetermined process in the stack pointer when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed; In the embodiment, the function of executing the process of step S3901 in the main CPU 63, in the 17th embodiment, the function of executing the process of step S4501 in the main CPU 63, and in the 18th embodiment, the process of step S4601 in the main CPU 63 The gaming machine according to feature N1 or N2, characterized in that the gaming machine is equipped with a function of executing the above function.

According to feature N3, when the second predetermined process is started, the second response start information corresponding to the second predetermined process is set to the stack pointer, so that an appropriate address can be set in the second predetermined process. It becomes possible to store information in the stack area.

Feature N4. When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least one of the items stored in the internal storage means is evacuation execution means (in the fifteenth embodiment, a function for executing the processes of step S3802 and steps S3902 to S3907 in the main side CPU 63; In the embodiment, the function of executing the process of step S4402 in the main CPU 63, in the 17th embodiment, the function of executing the process of steps S4502 to S4507 in the main CPU 63, and in the 18th embodiment, the function of executing the process of step S4502 in the main CPU 63. a function of executing the process of S4602, a function of executing the processes of step S4701 and step S4703 in the main CPU 63 in the 19th embodiment),
When or after the second predetermined process is finished, return execution means (in the fifteenth embodiment, step S3804 and A function to execute the process from step S3910 to step S3915, a function to execute the process from step S4404 in the main CPU 63 in the 16th embodiment, and a function to execute the process from step S4510 to step S4515 in the main CPU 63 in the 17th embodiment. (in the 18th embodiment, a function to execute the processing of step S4605 in the main CPU 63, and in the 19th embodiment, a function to execute the processing in step S4705 and step S4706 in the main CPU 63),
Equipped with
The gaming machine according to any one of features N1 to N3, wherein the information of the stack pointer provided in the internal storage means is not saved by the save execution means.

According to feature N4, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least some of the information is saved in a predetermined storage means. Thereby, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Furthermore, when or after the second predetermined process is finished, the information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process. Furthermore, since the stack pointer information is not to be saved, there is no need to secure a capacity for saving the stack pointer information in the predetermined storage means. Therefore, it is possible to suppress the capacity of the predetermined storage means. Furthermore, even in a configuration where the stack pointer information is not saved, if the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or the situation where the second predetermined process is executed. In this case, the stack pointer information becomes fixed information, so it is possible to restore the stack pointer information to the one before the start of the second predetermined process without saving the stack pointer information as described above. It is possible.

Feature N5. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The gaming machine according to feature N4, wherein the saving execution means saves the predetermined information to the second predetermined storage area.

According to feature N5, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the storage destination of information in the predetermined storage means can be determined by the first predetermined process and the second predetermined process. It becomes possible to make a clear difference. Thereby, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. In this case, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least a portion of the information stored in the internal storage means is information is saved to the second predetermined storage area. This makes it possible to save the information in the internal storage means immediately before the start of the second predetermined process, and also makes it possible to save the information without using the first predetermined storage area.

Feature N6: The first predetermined memory area is capable of storing information and reading information when the first predetermined process is executed, and is capable of reading information but is not capable of storing information when the second predetermined process is executed;
A gaming machine as described in feature N5, characterized in that the second specified memory area is capable of storing information and reading information when the second specified process is executed, and when the first specified process is executed, information can be read but information cannot be stored.

Feature N6 makes it possible to treat the first specified memory area as a memory area dedicated to the first specified process, and to treat the second specified memory area as a memory area dedicated to the second specified process.

Note that for the configuration of features N1 to N6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristic group O>
Feature O1. Equipped with a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processes;
The control means includes:
A first predetermined processing execution means for executing a first predetermined processing among the various processing (a function for executing processing other than the management execution processing in the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined processing execution means (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments) that executes a second predetermined processing among the various processing;
When the state where the first predetermined process is being executed is changed to the state where the second predetermined process is being executed or when the state where the second predetermined process is being executed is changed, a first state setting means (a function of executing the processes of steps S4803 to S4808 in the main CPU 63) sets the state of a predetermined memory area (WA register, BC register, DE register, HL register, IX register, and IY register), which is at least a part of the memory area in the internal memory means, to a predetermined state;
A second state setting means (a function for executing the processes of steps S4903 to S4908 in the main CPU 63) for setting the state of the predetermined storage area to the predetermined state when or after the second predetermined process is completed;
A gaming machine comprising:

According to feature O1, when the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the predetermined storage area of the internal storage means The state of the predetermined storage area is set to a predetermined state, and when or after the second predetermined process ends, the state of the predetermined storage area is set to the predetermined state again. This allows the state of the predetermined storage area to be in the predetermined state before and after the second predetermined process. Therefore, it is possible to prevent the state of the predetermined storage area caused by one of the first predetermined process and the second predetermined process from affecting the other process. From the above, it becomes possible to perform various types of control suitably.

Feature O2. The gaming machine described in Feature O1, characterized in that the predetermined state is a state when the supply of operating power to the control means is started.

According to feature O2, the predetermined storage area is set to the predetermined state when the supply of operating power to the control means is started, so the processing configuration for setting the predetermined state is simplified. becomes possible.

Feature O3. The gaming machine according to feature O1 or O2, wherein the predetermined state is a state in which the predetermined memory area is cleared to "0."

According to feature O3, the specified memory area is set to a "0" cleared state as the specified state, so the processing configuration for setting the specified state can be simplified.

Feature O4. The gaming machine according to any one of features O1 to O3, wherein the predetermined storage area is a part of the storage area in the internal storage means.

According to feature O4, only a part of the storage area of the internal storage means is set to the predetermined state, so that it is possible to reduce the processing load for setting the predetermined state.

Feature O5. The internal storage means includes at least the predetermined storage area and another storage area (registers other than the WA register, the BC register, the DE register, the HL register, the IX register, and the IY register);
the second predetermined process execution means is configured to store information in the predetermined storage area during the second predetermined process, but not to store information in the separate storage area;
A gaming machine described in feature O4, characterized in that the first state setting means and the second state setting means are configured not to change the state of the separate memory area.

According to feature O5, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or when the situation changes to the situation where the second predetermined process is executed, the second predetermined process is stored in the internal storage means. A predetermined storage area in which information is to be stored is set to a predetermined state. This makes it possible to prevent the state of the predetermined storage area caused by the first predetermined process from affecting the second predetermined process. In addition, since the state of the separate storage area is not changed, setting it to the predetermined state when the second predetermined process is started does not affect the process after the second predetermined process ends. It becomes possible.

Feature O6. Features O1 to O5, characterized in that the information in the predetermined storage area before the predetermined state is set by the first state setting means is information that is not used after the second predetermined process is completed. The gaming machine according to any one of the above.

According to feature O6, the second predetermined process ends even if the predetermined storage area is set to the predetermined state when the second predetermined process is executed or when the second predetermined process is executed. This makes it possible to avoid affecting subsequent processing.

Feature O7. When the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is being executed or when the situation where the second predetermined process is being executed is reached, a save execution means (function of executing the process of step S4802 in the main CPU 63) saves predetermined information (information in the flag register), which is a part of the information stored in the internal storage means, to a predetermined storage means (main RAM 65);
A return execution means (a function of executing the processing of step S4810 in the main CPU 63) for returning the specified information saved in the specified storage means to the internal storage means when or after the second specified processing is terminated;
A gaming machine described in any one of features O1 to O6, characterized in that it is equipped with:

According to feature O7, when the situation changes from the situation where the first predetermined process is being executed to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. Part of the predetermined information is saved in a predetermined storage means. As a result, when the second predetermined process is executed, the information stored in the internal storage means when the first predetermined process was executed and which is necessary for the subsequent execution of the first predetermined process is rewritten. It is possible to prevent this from happening. Further, when or after the second predetermined process is finished, the predetermined information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process.

Feature O8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features O1 to O7, wherein the second predetermined process includes a process for managing a gaming history.

According to feature O8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature O9. The predetermined storage means is
a first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The gaming machine described in feature O8 is characterized in that the second specified memory area is equipped with history memory areas (normal counter area 231, counter area 232 for opening/closing execution mode, counter area 233 for high frequency support mode) in which corresponding game history information is stored when a specified event occurs as a result of the game being played.

According to feature O9, when a predetermined event occurs, history information corresponding to it is stored in the history storage area. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the history storage area from being rewritten during execution.

Feature O10. The gaming machine described in Feature O9, characterized in that the second predetermined process execution means includes information derivation means (a function for executing the process of step S4208 in the main CPU 63) that uses the history information stored in the history storage area to derive behavior information corresponding to the game results during a predetermined period.

According to feature O10, by deriving behavior information corresponding to the results of play during a specified period of time using the history information stored in the history storage area, it becomes possible to grasp the results of management of the play history, such as the frequency of occurrence of a specified event.

Feature O11. The gaming machine described in Feature O10, characterized in that the second predetermined storage area includes a mode information storage area (computation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature O11, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the mode information storage area from being rewritten during execution.

Note that for the configuration of features O1 to O11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature P group>
Feature P1. Equipped with a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processes;
The control means includes:
A first predetermined processing execution means for executing a first predetermined processing among the various processing (a function for executing processing other than the management execution processing in the main CPU 63 in the fifteenth to twenty-first embodiments);
A second predetermined processing execution means (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments) that executes a second predetermined processing among the various processing;
a first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
A gaming machine comprising:

According to feature P1, a first predetermined storage area and a second predetermined storage area are provided, and the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is treated as a dedicated storage area for the first predetermined process. It is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage location of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted.

Feature P2. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to feature P1, wherein the second predetermined process includes a process for managing a gaming history.

According to feature P2, a process for controlling the progress of a game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that it is possible to prevent information used in the process for managing the game history from being rewritten when the process for controlling the progress of a game is executed.

Feature P3. The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring as a result of a game being executed is stored. , a high-frequency support mode counter area 233).

According to feature P3, when a specified event occurs, the corresponding history information is stored in the history storage area. This allows the gaming machine to store and hold information for managing the number of times or frequency of occurrence of the specified event, and by using this managed information, it becomes possible to appropriately manage the frequency of occurrence of the specified event. Furthermore, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Furthermore, by executing a process for controlling the progress of the game as the first specified process, and executing a process for managing the game history as the second specified process, it becomes possible to prevent the information stored in the history storage area from being rewritten when the process for controlling the progress of the game is executed.

Feature P4. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature P3, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature P4, by deriving behavior information corresponding to the results of play during a specified period of time using the history information stored in the history storage area, it becomes possible to grasp the results of management of the play history, such as the frequency of occurrence of a specified event.

Feature P5. The gaming machine described in Feature P4, characterized in that the second predetermined storage area includes a mode information storage area (computation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature P5, when behavior information corresponding to the results of a game during a specified period is derived using history information, the behavior information is stored in the behavior information storage area. This makes it possible to grasp the results of game history management at any time. In addition, by executing a process for controlling the progress of a game as the first specified process and a process for managing the game history as the second specified process, it becomes possible to prevent the information stored in the behavior information storage area from being overwritten when the process for controlling the progress of a game is executed.

Feature P6: A first saving means for saving the first predetermined information, which is a part of the information stored in the internal storage means, in the first predetermined processing when the situation changes from the situation where the first predetermined processing is being executed to the situation where the second predetermined processing is being executed, to the first predetermined storage area in the first predetermined processing (a function for executing the processing of step S3802 in the main CPU 63 in the fifteenth embodiment, and a function for executing the processing of step S4402 in the main CPU 63 in the sixteenth embodiment);
A second saving means for saving second predetermined information, which is a part of information stored in the internal storage means, to the second predetermined storage area in the second predetermined processing when the situation changes from the situation where the first predetermined processing is being executed to the situation where the second predetermined processing is being executed (in the fifteenth embodiment, a function for executing the processing of steps S3902 to S3907 in the main CPU 63; in the seventeenth embodiment, a function for executing the processing of steps S4502 to S4507 in the main CPU 63; in the eighteenth embodiment, a function for executing the processing of step S4602 in the main CPU 63; and in the nineteenth embodiment, a function for executing the processing of steps S4701 and S4703 in the main CPU 63);
A gaming machine according to any one of features P1 to P5, characterized in that it is equipped with:

According to feature P6, the first predetermined information that is part of the information stored in the internal storage means is saved in the first predetermined storage area in the first predetermined process, and the part of the information stored in the internal storage means is saved in the first predetermined storage area in the first predetermined process. The second predetermined information is saved in the second predetermined storage area in the second predetermined process. As a result, it becomes possible to save each piece of information stored in the internal storage means at a timing that is preferable, and the process for saving information is executed in a distributed manner between the first predetermined process and the second predetermined process. becomes possible.

Feature P7: A first return execution means for returning the first predetermined information saved in the first predetermined storage area to the internal storage means when or after the second predetermined process is ended (a function for executing the process of step S3804 in the main CPU 63 in the fifteenth embodiment, and a function for executing the process of step S4404 in the main CPU 63 in the sixteenth embodiment);
A second return execution means for returning the second specified information saved in the second specified storage area to the internal storage means when or after the second specified processing is completed (in the fifteenth embodiment, a function for executing the processing of steps S3910 to S3915 in the main CPU 63; in the seventeenth embodiment, a function for executing the processing of steps S4510 to S4515 in the main CPU 63; in the eighteenth embodiment, a function for executing the processing of step S4605 in the main CPU 63; and in the nineteenth embodiment, a function for executing the processing of steps S4705 and S4706 in the main CPU 63);
The gaming machine described in feature P6 is characterized by comprising:

According to feature P7, when or after the second predetermined process ends, the first predetermined information saved in the first predetermined storage area is returned to the internal storage means, and the first predetermined information saved in the second predetermined storage area is returned to the internal storage means. Since the second predetermined information is restored to the internal storage means, it is possible to restore the state of the internal storage means to the state before the second predetermined process was started.

Feature P8. The gaming machine according to feature P6 or P7, wherein the first predetermined information includes information of a flag register provided in the internal storage means.

According to feature P8, it is possible to appropriately save information in the flag register in a situation where the first predetermined process is being executed.

Feature P9. The gaming machine according to any one of features P6 to P8, wherein the second predetermined information includes information on all registers of the internal storage means.

According to feature P9, the information of all the registers in the internal storage means is saved at once, so there is no need to selectively save the information of the registers.

Feature P10. The second predetermined storage area is
a stack area (stack area 224 for non-specific control) into which information is written by a push command and read by a pop command;
A work area (work area 223 for non-specific control) in which information is written and read by a load instruction;
Equipped with
The gaming machine according to feature P9, wherein the second saving execution means saves the second predetermined information to one of the stack area and the work area.

According to feature P10, the information of all registers of the internal storage means is saved to one of the stack area and the work area in the second predetermined storage area. This makes it possible to consolidate the destinations for saving the information of all registers, and simplifies the processing configuration for saving and restoring the information.

Feature P11. The gaming machine described in Feature P10, wherein the second save execution means saves the second predetermined information in the stack area.

Feature P11 makes it possible to save the information in all registers without using the work area.

Feature P12. A gaming machine according to any one of features P6 to P11, characterized in that the second predetermined information includes stack pointer information of the internal storage means.

Feature P12 makes it possible to properly save stack pointer information when the first specified process is being executed.

In addition, for the configuration of features P1 to P12, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

According to the invention related to the feature L group, the feature M group, the feature N group, the feature O group, and the feature P group, the following problems can be solved.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entrance section provided in the gaming area, the gaming ball is paid out from a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known in pachinko gaming machines, in which the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, the control means executes a lottery process. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately perform various controls, and there is still room for improvement in this respect.

<Feature Q group>
Feature Q1. A control means (MPU 62) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when the processes are executed;
A history storage means (management RAM 241) that is provided as a chip separate from the control means and is capable of temporarily storing information;
Equipped with
The control means is a gaming machine characterized in that it is equipped with a history memory execution means (a function of executing normal goal entry management processing in the main CPU 63, goal entry management processing during the opening and closing execution mode, and goal entry management processing during the high frequency support mode) that stores corresponding game history information in the history memory means when a specified event occurs as a result of a game being played.

According to feature Q1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Further, since the history storage means is provided as a separate chip from the control means, it is possible to increase the storage capacity for storing history information while using a general-purpose control means.

Feature Q2. The gaming machine described in Feature Q1 is characterized in that the control means includes a predetermined storage means (main RAM 65) that temporarily stores information when various processes are executed.

According to feature Q2, in a configuration that includes not only a predetermined storage means provided in the control means but also a history storage means provided as a chip separate from the control means, it is possible to store and hold a large amount of history information by storing the history information in the history storage means.

Feature Q3. The gaming machine described in Feature Q2, wherein the control means temporarily stores information in the predetermined storage means when executing processing related to the history information.

According to feature Q3, in a configuration in which the history storage means for storing history information is provided as a separate chip from the control means, when processing related to history information is executed, a predetermined storage means provided in the control means is used. Since the information is temporarily stored, it is possible to prevent the processing speed from decreasing excessively when processing related to history information is executed.

Features Q4. The control means includes information derivation means (executes the process of step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means. The gaming machine according to any one of features Q1 to Q3, characterized in that the gaming machine has a function of:

According to feature Q4, by deriving behavior information corresponding to the results of play during a specified period of time using the history information stored in the history storage means, it becomes possible to grasp the results of management of the play history, such as the frequency of occurrence of a specified event.

Features Q5. The gaming machine according to feature Q4, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature Q5, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any timing.

In addition, for the configuration of features Q1 to Q5, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

The invention relating to the above group of features Q can solve the following problems:

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, gaming machines such as those exemplified above need to be properly managed, and there is still room for improvement in this regard.

<Characteristic R group>
Feature R1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Changing the set value to be used based on the fact that a plurality of events including the first event and the second event occur when the supply of operating power to the control means having the setting means is started. Situation generating means (in the 22nd embodiment, a function of executing the processing of steps S5003 to S5006 in the main CPU 63, and in another embodiment, a situation generation unit that causes the main CPU 63 to become a settable situation) A function to execute the process of step S5507, in the 23rd embodiment, a function to execute the process of steps S5703 to S5705 and step S5715 in the main CPU 63),
A gaming machine characterized by comprising:

According to feature R1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, in order to set the set value to be used, multiple events including the first event and the second event must occur when the supply of operating power to the control means is started. Must be. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R2. Equipped with an open detection means for detecting that the opening/closing body (front door frame 14) is in the open state (a function for executing the process of step S5005 in the main CPU 63 in the 22nd embodiment, a function for executing the process of step S5505 in the main CPU 63 in another embodiment, and a function for executing the process of step S5703 in the main CPU 63 in the 23rd embodiment),
The gaming machine described in feature R1, wherein the situation generation means determines that the first event has occurred based on the opening detection means detecting that the opening/closing body is in an open state.

According to feature R2, the opening and closing body must be in the open state in order for the setting value to be used to be set. This makes it possible to highlight the fraudulent act if someone tries to fraudulently set the setting value to be used, which makes it easier to discover the fraudulent act.

Feature R3. Equipped with separate opening grasping means for grasping that the separate opening/closing body (the gaming machine main body 12) is in the open state (a function for executing the process of step S5006 in the main CPU 63 in the 22nd embodiment, a function for executing the process of step S5506 in the main CPU 63 in another embodiment, and a function for executing the process of step S5704 in the main CPU 63 in the 23rd embodiment),
The gaming machine described in feature R2, wherein the situation generation means determines that the second event has occurred based on the separate opening detection means detecting that the separate opening/closing body is in an open state.

According to feature R3, in order to set the setting value to be used, it is necessary not only to open the opening/closing body but also to open another opening/closing body. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R4: The setting means is configured to select the setting value to be used and/or set the setting value to be used based on the operation of a predetermined operation means (update button 68b, reset button 68c),
The gaming machine according to feature R2 or R3, wherein the predetermined operation means is configured to be operable by opening a separate opening/closing body.

According to feature R4, the setting value to be used cannot be set unless an opening/closing body different from the separate opening/closing body that is opened to enable the predetermined operating means to be operated is opened. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R5. The opening and closing body defines the front side of the gaming machine of the gaming area into which the gaming balls flow,
A gaming machine described in any one of features R2 to R4, characterized in that the gaming area is opened to the front of the gaming machine by opening the opening/closing body.

According to feature R5, in order to set the setting value to be used, it is necessary to open the opening/closing body to open the gaming area to the front of the gaming machine. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R6. A gaming machine according to any one of Features R1 to R5, characterized in that the situation generating means determines that one of the plurality of events has occurred based on a predetermined operation being performed using a setting key on a setting key insertion section (setting key insertion section 68a).

According to feature R6, in order to set the setting value to be used, it is necessary not only to perform a specific operation using the setting key on the setting key insertion section, but also to cause a different event to occur. This makes it difficult to fraudulently set the setting value to be used.

Feature R7. A gaming machine according to any one of features R1 to R6, characterized in that the situation generating means identifies that one of the plurality of events has occurred based on the occurrence of a predetermined game event (operation of the launch operating device 28, entry of a ball into the through gate 35) that occurs when a game is played.

According to feature R7, in order to set the setting value to be used, it is not only necessary to generate a predetermined gaming event that occurs when a game is played, but also to set a setting value that is to be used. It is necessary to cause the following events to occur. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R8. The gaming machine according to any one of features R1 to R7, characterized in that the situation generating means determines that one of the plurality of events has occurred based on the detection of a gaming ball by a ball entry detection means (gate detection sensor 49a) that detects that a gaming ball has entered a predetermined ball entry portion provided in the gaming area.

According to feature R8, in order to set the setting value to be used, it is necessary to have a game ball enter a specific ball entry section, and a separate event must occur. This makes it difficult to fraudulently set the setting value to be used.

Feature R9. A setting value notification means (a function for executing a setting confirmation process in the main CPU 63) that causes a notification means to notify the setting value to be used set by the setting means,
The set value notification means transmits the set value to be used set by the setting means to the notification means based on the occurrence of a plurality of events including the first event and the second event. The gaming machine according to any one of features R1 to R8, characterized in that the game machine is notified by:

Feature R9 makes it difficult to fraudulently check setting values. In addition, the manager of the amusement hall only needs to cause the first and second events to occur whether setting the setting value to be used or checking the setting value, so the tasks are standardized and each task is easy to understand.

Feature R10. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
A plurality of events including both a predetermined operation using a setting key on the setting key insertion portion (setting key insertion portion 68a) and another event different from the predetermined operation using the setting key on the setting key insertion portion A situation generating means (in the 22nd embodiment, a situation generating means (in the main CPU 63 in the 22nd embodiment) that creates a setting possible situation in which the setting value to be used can be set by the setting means based on the occurrence of the setting value. A function to execute the processes of steps S5003 to S5006, in another embodiment, a function to execute the processes of steps S5503 to S5507 in the main CPU 63, and in the 23rd embodiment, a function to execute the processes of steps S5703 to S5705 and S5715 in the main CPU 63. function to perform processing), and
A game machine characterized by comprising:

According to feature R10, the setting value to be used is set from among multiple setting values corresponding to the player's degree of advantage, so the player will hope that the more advantageous setting value will be the setting value to be used. In this case, in order to set the setting value to be used, it is necessary not only to perform a specified operation using the setting key on the setting key insertion section, but also to cause a different event to occur. This makes it difficult to fraudulently set the setting value to be used.

Feature R11. An open grasping means for grasping that the opening/closing body (front door frame 14) is in an open state (in the 22nd embodiment, a function of executing the process of step S5005 in the main CPU 63, in another embodiment, a step in the main CPU 63) (a function of executing the process of step S5505, a function of executing the process of step S5703 in the main CPU 63 in the 23rd embodiment),
Feature R10 is characterized in that the situation generation means specifies that the other event has occurred based on the fact that the opening/closing body is recognized by the openness recognition means as being in the open state. The game machine described.

According to feature R11, in order to set the setting value to be used, the opening/closing body needs to be in an open state. As a result, if an act of fraudulently setting a setting value to be used is performed, it becomes possible to highlight the fraudulent act, and as a result, it becomes easier to discover the fraudulent act. .

Feature R12. Separate opening/closing means (in the 22nd embodiment, a function of executing the process of step S5006 in the main side CPU 63; in another embodiment, the main side CPU 63 (in the twenty-third embodiment, a function of executing the process of step S5704 in the main CPU 63),
The situation generating means identifies that one of the plurality of events has occurred based on the fact that the separate opening/closing body is in an open state is grasped by the separate opening grasping means. The gaming machine according to feature R11.

According to feature R12, in order to set the setting value to be used, it is necessary not only to open the opening/closing body but also to open another opening/closing body. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R13: The setting means is configured to select the setting value to be used and/or set the setting value to be used based on the operation of a predetermined operation means (update button 68b, reset button 68c),
The gaming machine according to feature R11 or R12, wherein the predetermined operation means is configured to be operable by opening a separate opening/closing body.

According to feature R13, the setting value to be used cannot be set unless an opening/closing body that is different from the other opening/closing body that is opened to enable operation of the specified operating means is opened. This makes it difficult to fraudulently set the setting value to be used, and makes the fraudulent behavior noticeable.

Feature R14. The opening and closing body defines the front side of the gaming machine of the gaming area into which the gaming balls flow,
A gaming machine described in any one of features R11 to R13, characterized in that the gaming area is opened to the front of the gaming machine by opening the opening/closing body.

According to feature R14, in order to set the setting value to be used, it is necessary to open the opening/closing body to open the gaming area to the front of the gaming machine. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R15. The situation generation means generates the plurality of events based on the fact that a predetermined game event (operation of the firing operation device 28, ball entering the through gate 35) occurs when a game is played. The gaming machine according to any one of features R10 to R14, characterized in that it is specified that one of the events has occurred.

According to feature R15, in order to set the setting value to be used, it is necessary not only to perform a predetermined operation using the setting key in the setting key insertion section, but also to perform a predetermined operation that occurs when a game is played. It is necessary to generate a gaming event. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R16. A gaming machine according to any one of features R10 to R15, characterized in that the situation generating means determines that one of the plurality of events has occurred based on the detection of a gaming ball by a ball entry detection means (gate detection sensor 49a) that detects that a gaming ball has entered a predetermined ball entry portion provided in the gaming area.

According to feature R16, in order to set the setting value to be used, it is necessary not only to perform a predetermined operation using the setting key on the setting key insertion part, but also to insert a game ball into a predetermined ball entry part. You need to make the ball. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R17. A setting value notification means (a function for executing a setting confirmation process in the main CPU 63) that causes a notification means to notify the setting value to be used set by the setting means,
The setting value notification means is configured to notify the setting value based on the fact that the predetermined operation using the setting key on the setting key insertion section is being performed and that a plurality of events including both of the other events have occurred. The gaming machine according to any one of features R10 to R16, characterized in that the setting value to be used that is set by the notification means is notified.

Feature R17 makes it difficult to fraudulently check setting values. In addition, whether the amusement hall manager is setting a setting value to be used or checking a setting value, he or she only needs to perform a specific operation using the setting key in the setting key insertion section and cause a different event to occur, so the tasks are standardized and each task is easy to understand.

Note that for the configuration of features R1 to R17, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

The invention relating to the above feature group R can solve the following problems:

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, the gaming ball is paid out from, for example, a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known for a pachinko machine, and in this case, the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to deal with fraud against the gaming machines, and there is still room for improvement in this respect.

<Feature S group>
Feature S1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
A situation generating means (in the 22nd embodiment, the processing of steps S5003 to S5006 and steps S5401 to S5408 in the main CPU 63 In another embodiment, the main CPU 63 has a function of executing steps S5503 to S5507, and in the twenty-third embodiment, the main CPU 63 has a function of executing steps S5703 to S5705 and S5715. In the twenty-fourth embodiment, the main CPU 63 has a function of executing steps S5801 to S5804; in the twenty-fifth embodiment, the main CPU 63 has a function of executing steps S5901 to S5904);
Setting value grasping means (in the 22nd embodiment, step S5017 in the main CPU 63 and a function of executing the processing of steps S5111 and S5112, or in another form, a function of executing the processing of steps S5611 and S5612 in the main CPU 63),
A gaming machine characterized by comprising:

According to feature S1, the setting value to be used is set from among multiple setting values corresponding to the player's degree of advantage, so the player will expect the more advantageous setting value to be used. In this case, it is understood whether the setting value before the setting possible situation is the same as the setting value set in the setting possible situation. This makes it possible to execute processing corresponding to whether the setting values are the same across the setting possible situation. Therefore, when the setting value to be used is set, it is possible to create a favorable situation for the setting result, and it becomes possible to perform the setting value setting work in an optimal manner.

Feature S2. The gaming machine described in feature S1 is characterized by having a simultaneous processing means (a function for executing the processing of step S5113 in the main CPU 63 in the 22nd embodiment, and a function for executing the processing of step S5613 in the main CPU 63 in another embodiment) that executes a corresponding simultaneous processing based on the fact that the setting value grasping means has grasped that the setting value before the setting possible state is reached is the same as the setting value set by the setting means.

According to feature S2, when the setting values are the same across the settable situations, the same time processing is executed, thereby making it possible to create a favorable situation for the setting values being the same. Become.

Feature S3. The gaming machine according to feature S2, wherein the simultaneous processing means executes processing for issuing a notification corresponding to the fact that the setting value has not been changed, as the simultaneous processing.

According to feature S3, it is possible to notify the game hall manager or the like that the set values are the same across the settable situations.

Feature S4. Based on the fact that the setting value grasping means has grasped that the setting value before the setting possible situation is different from the setting value set by the setting means, a corresponding non-same time process is executed. (In the twenty-second embodiment, the main CPU 63 executes the process of step S5114; in another embodiment, the main CPU 63 executes the process of step S5614.) The gaming machine according to any one of features S1 to S3.

According to feature S4, if the setting value is not the same across the settable state, non-identical processing is executed, making it possible to create a favorable situation for the setting value being changed.

Feature S5. The gaming machine according to feature S4, wherein the non-same time means executes, as the non-same time process, a process for making a notification corresponding to the change of the setting value. .

Feature S5 makes it possible to notify the manager of the amusement hall or other person that the setting value has been changed between setting possible situations.

Feature S6. The gaming machine according to any one of Features S1 to S5, characterized in that the situation generating means brings about the settable situation based on the occurrence of a need to erase information from the storage means that stores the setting value after the supply of operating power to the control means having the setting means has started.

According to feature S6, when it becomes necessary to erase information from the storage means that stores the setting value, the setting state becomes possible, so that it is possible to prevent gameplay from continuing even though the setting value information has been erased. In this case, the configuration of feature S1 described above is provided, and it is possible to grasp whether the setting value before the setting state becomes possible and the setting value set in the setting state are the same. This makes it possible to execute processing that corresponds to whether the setting values are the same across the setting state.

Feature S7. The setting value is not changed based on the setting value grasping means recognizing that the setting value before the setting possible state and the setting value set by the setting means are the same. (In the 22nd embodiment, the function of executing the process of step S5113 in the main side CPU 63, in another embodiment, the function of executing the process of step S5613 in the main side CPU 63). The gaming machine according to feature S6.

According to feature S7, even if a setting possible situation occurs due to the erasure of information in the storage means, if the setting values are the same across the setting possible situation, the setting values will not be changed. An announcement will be made in response to the failure. This makes it possible to notify the player that the setting value has not been changed even if the setting becomes possible in the middle of the game, and the player can feel safe even if the setting becomes possible in the middle of the game. It becomes possible to continue playing the game with care.

Feature S8. The situation generating means is
A first status generating means for causing the setting possible status to occur based on the start of the supply of operating power to the control means having the setting means (in the 22nd embodiment, a function for executing the processing of steps S5003 to S5006 in the main CPU 63, in another embodiment, a function for executing the processing of steps S5503 to S5507 in the main CPU 63, and in the 23rd embodiment, a function for executing the processing of steps S5703 to S5705 and step S5715 in the main CPU 63);
A second situation generating means for causing the setting possible situation to occur based on the occurrence of a need to erase information from the storage means for storing the setting value after the supply of operating power to the control means has started (a function for executing the processing of steps S5401 to S5408 in the main CPU 63 in the 22nd embodiment, a function for executing the processing of steps S5801 to S5804 in the main CPU 63 in the 24th embodiment, and a function for executing the processing of steps S5901 to S5904 in the main CPU 63 in the 25th embodiment);
Equipped with
A gaming machine described in any one of features S1 to S7, characterized in that the setting value grasping means grasps whether the setting value before the settable situation occurs is the same as the setting value set by the setting means, regardless of whether the settable situation is caused by the first situation generating means or the second situation generating means.

According to feature S8, when it becomes necessary to erase the information in the storage means that stores the setting values, the setting becomes possible, so the game is not continued even though the information on the setting values has been erased. It is possible to prevent this from occurring. In this case, using the same process as when the setting possible state is reached based on the start of supply of operating power to the control means, the setting possible state is changed as the information in the storage means is erased. When this occurs, it becomes possible to execute processing corresponding to whether or not the set values are the same across the settable situation.

In addition, for the configuration of features S1 to S8, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

The invention relating to the above group of features S can solve the following problems:

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in gaming machines such as the above examples, when a set value that determines the advantageous degree of the gaming machine is set, it is necessary to create an optimal situation for that, and there is still room for improvement in this regard.

<Feature T group>
Feature T1. Equipped with a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processes;
The control means includes:
A first predetermined processing execution means for executing a first predetermined processing among the various processing (a function for executing processing other than the management execution processing in the main CPU 63 in the fifteenth to twenty-fifth embodiments);
A second predetermined processing execution means (a function of executing a management execution process in the main CPU 63 in the fifteenth to twenty-fifth embodiments) that executes a second predetermined processing among the various processing;
a first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
a first monitoring execution means for monitoring whether the first predetermined storage area is normal or not (in the 22nd embodiment, a function for executing the processing of steps S5401 to S5404 in the main CPU 63; in the 24th embodiment, a function for executing the processing of steps S5801 to S5804 in the main CPU 63; in the 25th embodiment, a function for executing the processing of steps S5901 to S5904 in the main CPU 63; and in the 32nd embodiment, a function for executing the processing of steps S7701 to S7703 in the main CPU 63);
a second monitoring execution means for monitoring whether the second predetermined storage area is normal or not (in the 22nd embodiment, a function for executing the processes of steps S5405 to S5408 in the main CPU 63; in the 24th embodiment, a function for executing the processes of steps S5809, S5810, S5812, and S5813 in the main CPU 63; in the 25th embodiment, a function for executing the processes of steps S6101, S6102, S6105, and S6106 in the main CPU 63; and in the 32nd embodiment, a function for executing the processes of steps S7706 to S7708 in the main CPU 63);
A gaming machine comprising:

According to feature T1, a first predetermined storage area and a second predetermined storage area are provided, and the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is treated as a dedicated storage area for the first predetermined process. It is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage location of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. Further, by monitoring whether the first predetermined storage area is normal and monitoring whether the second predetermined storage area is normal, the first predetermined process and the second predetermined process are performed. It becomes possible to specify whether the situation is such that each of the processes can be performed normally.

Feature T2. The game according to feature T1, wherein the monitoring by the first monitoring execution means and the monitoring by the second monitoring execution means are executed in either the first predetermined process or the second predetermined process. Machine.

According to feature T2, monitoring of whether the first specified storage area is normal and monitoring of whether the second specified storage area is normal are executed in one of the first specified process and the second specified process. This makes it possible to simplify the processing configuration compared to a configuration in which monitoring of each storage area is executed in a distributed manner between the first specified process and the second specified process.

Feature T3. A gaming machine according to feature T1 or T2, characterized in that the monitoring by the first monitoring execution means and the monitoring by the second monitoring execution means are performed by the first predetermined process.

According to feature T3, monitoring whether the first predetermined storage area is normal or not and monitoring whether the second predetermined storage area is normal or not can be collectively executed in the first predetermined process. becomes.

Feature T4. A gaming machine according to any one of Features T1 to T3, characterized in that it is provided with a predetermined erasing means (a function for executing the process of step S5410 in the main CPU 63 in the 22nd embodiment, a function for executing the process of steps S5806, S5811, and S5814 in the main CPU 63 in the 24th embodiment, and a function for executing the process of steps S5906, S6103, and S6107 in the main CPU 63) that erases information from the first predetermined storage area based on the first monitoring execution means identifying that the first predetermined storage area is abnormal.

According to feature T4, if the first specified storage area is abnormal, the information in the first specified storage area is erased, thereby making it possible to prevent the first specified process from being executed while the first specified storage area remains in an abnormal state.

Feature T5. The predetermined erasing means erases the information in the first predetermined storage area based on the fact that the first monitoring execution means specifies that the first predetermined storage area is abnormal, and erases the information in the second predetermined storage area. The gaming machine according to feature T4, characterized in that information in the area is erased.

According to feature T5, when the first predetermined storage area is abnormal, not only the first predetermined storage area but also the second predetermined storage area is erased. Thereby, if there is a possibility that an abnormality has occurred in the second predetermined storage area, it becomes possible to erase the information in the second predetermined storage area regardless of the monitoring result by the second monitoring execution means.

Feature T6. The predetermined erasing means may erase information in the second predetermined storage area based on the second monitoring execution means specifying that the second predetermined storage area is abnormal. The gaming machine described in T4 or T5.

According to feature T6, if the first specified storage area is abnormal, the information in the first specified storage area is erased, thereby making it possible to prevent the first specified process from being executed while the first specified storage area remains abnormal.

Feature T7. The gaming machine described in Feature T6, wherein the predetermined erasing means erases information from the second predetermined storage area and erases information from the first predetermined storage area based on the second monitoring execution means identifying that the second predetermined storage area is abnormal.

According to feature T7, when the second predetermined storage area is abnormal, not only the second predetermined storage area but also the first predetermined storage area is erased. Thereby, if there is a possibility that an abnormality has occurred in the first predetermined storage area, it becomes possible to erase the information in the first predetermined storage area regardless of the monitoring result by the first monitoring execution means.

Feature T8. A gaming machine according to any one of Features T4 to T7, characterized in that the process for erasing information by the predetermined erasing means is executed by either the first predetermined process or the second predetermined process.

According to feature T8, the process of erasing information from each specified storage area based on the identification of an abnormality is executed in one of the first and second specified processes in a centralized manner. This makes it possible to simplify the processing configuration compared to a configuration in which the erasure of information from each storage area is executed in a distributed manner between the first and second specified processes.

Feature T9. The gaming machine according to any one of features T4 to T7, wherein a process for erasing information by the predetermined erasing means is executed in the first predetermined process.

According to feature T9, it becomes possible to collectively execute the process of erasing information in each predetermined storage area based on the identification of an abnormality in the first predetermined process.

Feature T10. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features T1 to T9, wherein the second predetermined process includes a process for managing a gaming history.

According to feature T10, a process for controlling the progress of a game is executed as the first predetermined process, and a process for managing the game history is executed as the second predetermined process, so that it is possible to prevent information used in the process for managing the game history from being rewritten when the process for controlling the progress of a game is executed.

Feature T11. The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring as a result of a game being executed is stored. , a high-frequency support mode counter area 233).

According to feature T11, when a predetermined event occurs, the corresponding history information is stored in the history storage area. This allows the gaming machine to store and hold information for managing the number of times or frequency of occurrence of the predetermined event, and by using this managed information, it becomes possible to appropriately manage the frequency of occurrence of the predetermined event. Furthermore, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Furthermore, by executing a process for controlling the progress of the game as the first predetermined process, and executing a process for managing the game history as the second predetermined process, it becomes possible to prevent the information stored in the history storage area from being rewritten when the process for controlling the progress of the game is executed.

Feature T12. The gaming machine described in Feature T11, characterized in that the second predetermined process execution means includes information derivation means (a function for executing the process of step S4208 in the main CPU 63) that uses the history information stored in the history storage area to derive behavior information corresponding to the game results during a predetermined period.

According to feature T12, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to game results in a predetermined period using history information stored in the history storage area. It becomes possible to understand the results.

Feature T13. The gaming machine described in feature T12, characterized in that the second predetermined storage area includes a mode information storage area (computation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature T13, when behavior information corresponding to the results of a game during a specified period is derived using history information, the behavior information is stored in a behavior information storage area. This makes it possible to grasp the results of managing the game history at any time. In addition, by executing a process for controlling the progress of a game as the first specified process and a process for managing the game history as the second specified process, it becomes possible to prevent the information stored in the behavior information storage area from being overwritten when the process for controlling the progress of a game is executed.

Note that for the configuration of features T1 to T13, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature U group>
Feature U1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a flag register provided in the internal storage means when the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or when the situation changes to a situation where the second predetermined process is executed; state setting means (in the 26th embodiment, a function of executing the processing of steps S6202 to S6204 and step S6211 in the main CPU 63, and in the 27th embodiment, a step in the main CPU 63) A function to execute the processes of S6302 to S6307 and S6312);
A gaming machine characterized by comprising:

According to feature U1, when the situation changes from one in which the first predetermined process is being executed to one in which the second predetermined process is being executed, or when the situation changes to one in which the second predetermined process is being executed, the state of the flag register of the internal storage means is set to a specific state. This makes it possible to start the second predetermined process in a situation in which the state of the flag register is a predetermined specific state. This makes it possible to perform various types of control in an optimal manner.

Feature U2. The gaming machine according to feature U1, wherein the specific state is a state when supply of operating power to the control means is started.

According to feature U2, since the flag register is set to the state when the supply of operating power to the control means is started as the specific state, the processing configuration for setting the specific state can be simplified. It becomes possible.

Feature U3. The gaming machine according to feature U1 or U2, wherein the specific state is a state in which the flag register is cleared to "0".

According to feature U3, the flag register is set to a specific state, i.e., a cleared state of "0", so the processing configuration for setting the specific state can be simplified.

Feature U4. Means for causing the state of the flag register to become the specific state when or after the second predetermined process is completed (in the twenty-sixth embodiment, executing the processes of steps S6213 to S6218 in the main CPU 63) The gaming machine according to any one of features U1 to U3, characterized in that the gaming machine is equipped with a function (in the twenty-seventh embodiment, a function of executing the processing of steps S6314 to S6322 in the main CPU 63).

According to feature U4, the second predetermined process is executed not only when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation is such that the second predetermined process is executed. When or even if the process ends, the state of the flag register is set to a specific state. This makes it possible to restart the first predetermined process in a situation where the state of the flag register is in a predetermined specific state. Furthermore, it is possible to set the state of the flag register to a specific state before and after the second predetermined process. Therefore, it is possible to prevent the state of the flag register caused by one of the first predetermined process and the second predetermined process from affecting the other process.

Feature U5. comprising a predetermined storage means (main side RAM 65) in which information is temporarily stored when executing processing in the control means,
The state setting means includes:
Means for bringing the state of a predetermined storage area in the predetermined storage means into the specific state (in the twenty-sixth embodiment, a function of executing the processing of steps S6202 to S6204 in the main CPU 63, in the twenty-seventh embodiment) A function of executing the processing of steps S6302 to S6307 in the main CPU 63);
Means for causing the state of the flag register to become the specific state by storing information stored in the predetermined storage area in the flag register (in the twenty-sixth embodiment, the processing in step S6211 in the main CPU 63 is performed) (in the twenty-seventh embodiment, a function to execute the process of step S6312 in the main CPU 63);
The gaming machine according to any one of features U1 to U4, characterized by comprising:

According to feature U5, even if the configuration is such that it is not possible to directly set the state of the flag register to a specific state as a command of the control means, the flag is set by writing information to the predetermined storage means and reading the information. It becomes possible to set the state of the register to a specific state.

Feature U6. The predetermined storage means is
a stack area (a stack area 222 for specific control) into which the control means can write information in response to a push command and into which the control means can read information in response to a pop command;
a work area (a work area 221 for specific control) in which the control means can write and read information in response to a load command;
Equipped with
A gaming machine described in feature U5, characterized in that the specified memory area is provided in the stack area.

According to feature U6, even if the configuration does not allow the information stored in the work area to be directly written to the flag register, it is possible to set the state of the flag register to a specific state by writing information to the stack area and reading that information.

Feature U7. a predetermined register provided in the internal storage means when a situation in which the first predetermined process is being executed changes to a situation in which the second predetermined process is executed or a situation in which the second predetermined process is executed; (a function of executing steps S6205 to S6210 in the main CPU 63 in the 26th embodiment, a function of executing steps S6308 to S6311 in the main CPU 63 in the 27th embodiment) processing functions),
According to any one of features U1 to U6, the state setting means causes the state of the flag register to become the specific state after the state of the predetermined register is set to the predetermined state. Game machine.

The state of the flag register can change each time various processes are executed by the control means. In this case, according to feature U7, since the state of the flag register is set to the specific state after the state of the predetermined register is set to the predetermined state, the flag register becomes the specific state immediately before the second predetermined process is started. It becomes possible to make it seem that the

Feature U8. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is a means for making the state of the flag register become a specific state (in the twenty-sixth embodiment, a function of executing the processing of steps S6202 to S6204 and step S6211 in the main CPU 63, and in the twenty-seventh embodiment) A gaming machine characterized by having a function of executing the processing of steps S6302 to S6307 and step S6312 in the main CPU 63.

According to feature U8, it is possible to set the state of the flag register to a specific state as necessary.

Note that for the configuration of features U1 to U8, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristic group V>
Feature V1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a flag register provided in the internal storage means when the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or when the situation changes to a situation where the second predetermined process is executed; evacuation execution means (in the 15th embodiment, the function of executing the process of step S3802 in the main CPU 63, and in the 16th embodiment, the function of executing the process of step S4402 in the main CPU 63) In the 20th embodiment, the function to execute the process in step S4802 in the main CPU 63, in the 28th embodiment, the function to execute the process in steps S6402 to S6405 in the main CPU 63, In the embodiment, a function of executing the processing of steps S6502 to S6509 in the main CPU 63);
When or after the second predetermined process is finished, return execution means (step S3804 in the main CPU 63 in the fifteenth embodiment) returns the information of the flag register saved in the predetermined storage means to the flag register; In the 16th embodiment, the function to execute the process in step S4404 in the main CPU 63, in the 20th embodiment, the function to execute the process in step S4810 in the main CPU 63, in the 28th embodiment (in the 29th embodiment, a function of executing the processing of steps S6407 to S6415 in the main CPU 63, and a function of executing the processing of steps S6511 to S6518 of the main CPU 63 in the 29th embodiment),
A gaming machine characterized by comprising:

According to feature V1, when the situation changes from one in which the first predetermined process is being executed to one in which the second predetermined process is being executed, or when the situation changes to one in which the second predetermined process is being executed, the information in the flag register is saved to a predetermined storage means. This makes it possible to prevent the information stored in the flag register from being overwritten when the second predetermined process is executed. Furthermore, when or after the second predetermined process is terminated, the information saved in the predetermined storage means is restored to the flag register. This makes it possible to execute a process different from the second predetermined process from the state of the flag register before the execution of the second predetermined process when the second predetermined process is terminated. As a result, various controls can be performed in an optimal manner.

Feature V2. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The gaming machine according to feature V1, wherein the saving execution means saves the information in the flag register to the first predetermined storage area.

According to feature V2, by providing the predetermined storage means with a first predetermined storage area and a second predetermined storage area, it is possible to clearly differentiate the storage destination of information in the predetermined storage means between the first predetermined process and the second predetermined process. This makes it possible to prevent information used in one of the first and second predetermined processes from being erased when the other process is executed. In this case, when the situation changes from the execution of the first predetermined process to the execution of the second predetermined process or when the situation changes to the execution of the second predetermined process, the information in the flag register is saved to the first predetermined storage area. This makes it possible to save the information in the flag register immediately before the start of the second predetermined process, and to save the information without using the second predetermined storage area.

Feature V3. The first predetermined storage area is capable of storing and reading information when the first predetermined process is executed, and is capable of reading information but is not capable of storing information when the second predetermined process is executed;
A gaming machine as described in feature V2, characterized in that the second specified memory area is capable of storing information and reading information when the second specified process is executed, and is capable of reading information but not storing information when the first specified process is executed.

According to feature V3, it is possible to treat the first predetermined storage area as a storage area dedicated to the first predetermined process, and it is also possible to treat the second predetermined storage area as a storage area dedicated to the second predetermined process. becomes.

Feature V4. The predetermined storage means is
a stack area (stack area 222 for specific control) into which information can be written by a push command and read by a pop command;
a work area (work area 221 for specific control) in which information can be written and read by a load command;
Equipped with
The gaming machine according to any one of features V1 to V3, wherein the saving execution means saves the information in the flag register to one of the stack area and the work area.

According to feature V4, when the situation changes from the execution of the first predetermined process to the execution of the second predetermined process, or when the situation changes to the execution of the second predetermined process, the information in the flag register is saved to one of the stack area and the work area in the second predetermined memory area. This makes it possible to consolidate the destinations for saving information, and to simplify the processing configuration for saving and the processing configuration for restoring.

Feature V5. The gaming machine according to feature V4, wherein the saving execution means saves the information in the flag register to the work area.

According to feature V5, since the save destination of the information in the flag register is the work area, it becomes possible to save the information without cumulatively changing the stack pointer.

Feature V6. The evacuation execution means is
Means for storing the information of the flag register in a predetermined register provided in the internal storage means (in the twenty-eighth embodiment, a function of executing the processing of step S6402 and step S6403 in the main CPU 63; in the twenty-ninth embodiment, a main function) a function of executing the processing of steps S6502 to S6505 in the side CPU 63);
Means for storing information of the flag register stored in the predetermined register in the predetermined storage means (in the twenty-eighth embodiment, a function of executing the process of step S6404 in the main CPU 63, in the twenty-ninth embodiment, the main CPU 63 function of executing the process of step S6506);
The gaming machine according to any one of features V1 to V5, characterized by comprising:

According to feature V6, even if the configuration does not allow the information in the flag register to be directly saved to the specified storage means as an instruction from the control means, it is possible to save the information in the flag register to the specified storage means by writing information to the specified register and writing the information stored in the specified register to the specified storage means.

In addition, for the configuration of features V1 to V6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Feature W group>
Feature W1. Equipped with a control means (main CPU 63) that executes various processes,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Abnormal event monitoring means (program monitoring unit 252) that monitors whether an abnormal event is occurring;
It is possible to create a situation in which information erasure processing is performed on at least the first predetermined storage area based on the fact that the abnormal event has been identified by the abnormal event monitoring means. an erasing situation generating means (reset signal output section 251),
A gaming machine characterized by comprising:

According to feature W1, a first predetermined storage area and a second predetermined storage area are provided, and the first predetermined storage area is treated as a storage area dedicated to the first predetermined process, and the second predetermined storage area is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage destination of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, it is possible to prevent information used in one of the first and second predetermined processes from being erased when the other process is executed. In addition, based on the identification that an abnormal event has occurred, an information erasure process is executed on at least the first predetermined storage area. This makes it possible to prevent the first predetermined process from being executed in a state in which the information in the first predetermined storage area is retained as is, despite the occurrence of an abnormal event.

Feature W2. The control means includes:
Means for executing processing for storing power outage response information when the supply of operating power to the control means is stopped (in the 30th embodiment, a function for executing the processing of step S6709 and step S6710 in the main CPU 63) , in the 32nd embodiment, the function of executing the processing of steps S7609 to S7611 in the main CPU 63);
When the supply of operating power to the control means is started in a situation where the power outage response information is not stored and the process at the time of supply start is executed, the information erasing process is performed for at least the first predetermined storage area. means (in the 30th embodiment, the function of executing the processing of step S6607 in the main CPU 63, in the 31st embodiment, the function of executing the clearing process in the case of an abnormality in the main CPU 63; In the embodiment, a function of executing the processing of steps S7704, S7705, S7808, and S7810 in the main CPU 63);
Equipped with
The erasure situation generating means causes the control means to start the supply in a situation where the power outage response information is not stored, based on the fact that the abnormal event monitoring means has identified that the abnormal event has occurred. The gaming machine according to feature W1, characterized in that the processing at the time is executed.

According to feature W2, when the supply of operating power to the control means is started and the process at the time of supply start is executed in a situation where power outage response information is not stored, the information erasing process is performed at least in the first predetermined manner. By being executed on the storage area, the information in the first predetermined storage area is retained as is when the supply of operating power to the control means is started in a situation where the processing at the time of a power outage is not properly performed. It is possible to prevent the first predetermined process from being executed in the current state. In this case, based on the fact that it has been identified that an abnormal event has occurred, the control means executes the process at the time of supply start in a situation where power outage response information is not stored. As a result, by utilizing a configuration that executes information erasure processing when the control means executes processing at the time of supply start in a situation where power outage response information is not stored, information is stored in response to the occurrence of an abnormal event. It becomes possible to execute the erasing process.

Feature W3. The control means executes various processes when receiving a reset signal, and when receiving the reset signal from a situation where operating power is being supplied and the reset signal is not being received. The processing at the time of supply start is started based on the situation where
The erasing situation generating means is configured to cause the control means to set a state in which the reset signal is not received based on the fact that the abnormal event monitoring means has identified that the abnormal event has occurred. The gaming machine according to feature W2, wherein the gaming machine receives the reset signal.

Feature W3 makes it possible to achieve the excellent effects described above by switching the reception state of the reset signal.

Feature W4. The control means is configured to temporarily store information in an internal storage means (a register and a program counter of the main CPU 63) when executing a process, and stores information stored in the internal storage means in the first predetermined storage. It is configured so that it can be temporarily evacuated to an area,
The abnormal event monitoring means monitors whether an abnormality has occurred in the information stored in the internal storage means as the abnormal event,
Any one of features W1 to W3, wherein the erasing situation generating means generates a situation in which the information erasing process is executed on at least both the first predetermined storage area and the internal storage means. The gaming machine described in .

According to feature W4, the information stored in the internal storage means can be temporarily evacuated to the first predetermined storage area, so if an abnormality occurs with the information stored in the internal storage means, there is a possibility that an abnormality also occurs with the information stored in the first predetermined storage area. In this case, if an abnormality occurs with the information stored in the internal storage means, an information erasure process is executed not only for the internal storage means but also for the first predetermined storage area. This makes it possible to prevent the first predetermined process from being executed in the same state, even if an abnormality has occurred with the information stored in the first predetermined storage area.

Feature W5. The gaming machine described in any one of Features W1 to W4, characterized in that the erasure status generating means prevents the information erasure process from being executed on the second predetermined storage area even if the abnormal event monitoring means identifies that the abnormal event has occurred.

According to feature W5, even if an abnormal event occurs, information can be stored and retained in the second predetermined storage area.

Feature W6. The gaming machine described in any one of Features W1 to W4, characterized in that the erasure situation generating means generates a situation in which the information erasure process is executed for both the first specified storage area and the second specified storage area based on the abnormal event monitoring means identifying the occurrence of the abnormal event.

According to feature W6, when it is determined that an abnormal event has occurred, an information erasure process is executed for both the first and second specified storage areas. This makes it possible to prevent the first specified process from being executed in a state in which the information in the first specified storage area is retained as is despite the occurrence of an abnormal event, and also makes it possible to prevent the second specified process from being executed in a state in which the information in the second specified storage area is retained as is despite the occurrence of an abnormal event.

Feature W7. The information erasing process for the first predetermined storage area is executed in the first predetermined process, and the information erasing process for the second predetermined storage area is executed in the second predetermined process. The gaming machine according to feature W6.

According to feature W7, also regarding the information erasure process, the first predetermined storage area is treated as a storage area dedicated to the first predetermined process, and the second predetermined storage area is treated as a storage area dedicated to the second predetermined process. This makes it possible to

Feature W8. The first predetermined process includes a process for controlling the progress of a game;
A gaming machine described in any one of features W1 to W7, characterized in that the second specified process includes a process for managing a gaming history.

According to feature W8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature W9. The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring as a result of a game being executed is stored. , a high-frequency support mode counter area 233).

According to feature W9, when a specified event occurs, the corresponding history information is stored in the history storage area. This allows the gaming machine to store and hold information for managing the number of times or frequency of occurrence of the specified event, and by using this managed information, it becomes possible to appropriately manage the frequency of occurrence of the specified event. Furthermore, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Furthermore, by executing a process for controlling the progress of the game as the first specified process, and executing a process for managing the game history as the second specified process, it becomes possible to prevent the information stored in the history storage area from being rewritten when the process for controlling the progress of the game is executed.

Feature W10. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature W9, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature W10, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to gaming results in a predetermined period using history information stored in the history storage area. It becomes possible to understand the results.

Feature W11. The gaming machine according to feature W10, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature W11, when behavior information corresponding to the results of a game during a specified period is derived using history information, the behavior information is stored in a behavior information storage area. This makes it possible to grasp the results of game history management at any time. In addition, by executing a process for controlling the progress of a game as the first specified process and a process for managing the game history as the second specified process, it becomes possible to prevent the information stored in the behavior information storage area from being overwritten when the process for controlling the progress of a game is executed.

Note that for the configuration of features W1 to W11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristics X group>
Features X1. Equipped with a control means (main CPU 63) that executes various processes,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The second predetermined process execution means is configured to perform erasure execution means ( In the 25th embodiment, the main CPU 63 has a function to execute the process of step S6103 and step S6107, in the 30th embodiment, the main CPU 63 has a function to execute the process of step S7204, and in the 31st embodiment, the main CPU 63 (a function of executing the process of step S7508 in the 32nd embodiment, a function of executing the process of step S7808 and step S7810 in the main CPU 63).

According to feature X1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is It is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage location of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted.

In addition, when an erasure trigger occurs, information deletion processing is executed for the second predetermined storage area, so even if some abnormality has occurred in the second predetermined storage area, the second predetermined storage area This makes it possible to prevent the second predetermined process from being executed while the information is retained as is. Further, since the information deletion process is executed in the second predetermined process, it is possible to prevent the first predetermined process from intervening in updating the information in the second predetermined storage area.

Feature X2. The gaming machine described in Feature X1, characterized in that the erasure execution means executes the erasure process of the information on the second predetermined memory area while preventing information that is not to be erased (management monitoring flags, return address information, and information on various registers) from being erased.

According to feature X2, the process of erasing information from the second specified storage area is performed while preventing information from the second specified storage area that is not to be erased from the second specified storage area from being erased. This makes it possible to execute the process of erasing information from the second specified storage area while preventing necessary information from being erased as well.

Feature X3. The second predetermined process execution means is configured to execute the second predetermined process when a situation in which the first predetermined process is executed changes to a situation in which the second predetermined process is executed or a situation in which the second predetermined process is executed. Storage execution means (in the 30th embodiment A function to execute the processing of steps S7102 to S7107 in the main CPU 63, a function to execute the processing of steps S7502 to S7507 in the main CPU 63 in the 31st embodiment, and a function to execute the processing of step S7802 in the main CPU 63 in the 32nd embodiment. - a function to execute the process of step S7807),
The game according to feature Machine.

Feature X3 makes it possible to execute the information erasure process for the second specified storage area while preventing the erasure of the return correspondence information required when returning from a situation in which the second specified process is being executed to a situation in which the first specified process is being executed.

Feature X4. The gaming machine described in Feature X3, wherein the storage and execution means stores, as the return correspondence information, information on the return address of the program when the second predetermined process is ended and the first predetermined process is returned to in the second predetermined storage area.

According to feature X4, since the information erasing process is executed on the second predetermined storage area while preventing the information of the return address of the program from being erased when returning to the first predetermined process, the second predetermined storage area Even if the information erasing process is executed on the program, it is possible to return to the predetermined program in the first predetermined process when the second predetermined process is completed.

Feature X5. The control means is configured to temporarily store information in an internal storage means (register of the main CPU 63) when executing processing,
The gaming machine according to feature X3 or X4, wherein the storage execution means stores the information stored in the internal storage means in the second predetermined storage area as the return correspondence information.

According to feature X5, an information erasure process is performed on the second specified storage area while preventing the information in the internal storage means used in the first specified process from being erased. Therefore, even if an information erasure process is performed on the second specified storage area, when the second specified process is completed, it is possible to restore the information used in the first specified process to the internal storage means.

Features X6. The erasure execution means causes the information erasure process to be executed on the second predetermined storage area based on the occurrence of an abnormality in the second predetermined storage area, as the occurrence of the erasure trigger. The gaming machine according to any one of features X1 to X5.

According to feature X6, based on the occurrence of an abnormality in the second predetermined storage area, information deletion processing is executed for the second predetermined storage area, so that the abnormality occurs in the second predetermined storage area. This makes it possible to prevent the second predetermined process from being executed while the user is in the current state.

Feature X7. The second predetermined process execution means executes the second predetermined process by monitoring whether or not the second predetermined storage area is normal (in the thirtieth embodiment, the second predetermined process execution means monitors whether or not the second predetermined storage area is normal) The gaming machine according to feature X6, characterized in that the gaming machine has a function of executing processing.

According to feature X7, not only the information deletion process for the second predetermined storage area but also the monitoring of whether or not the second predetermined storage area is normal is performed in the second predetermined process without intervening the first predetermined process. Therefore, it is possible to execute monitoring whether the second predetermined storage area is normal or not and executing the information erasing process for the second predetermined storage area as a series of processes in the second predetermined process. .

Feature X8. The first predetermined process includes a process for controlling the progress of a game;
A gaming machine according to any one of features X1 to X7, wherein the second predetermined process includes a process for managing a gaming history.

According to feature X8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the gaming history from being rewritten when executing the process for managing the game history.

Feature X9. The gaming machine described in Feature X8, characterized in that the second predetermined storage area includes a history storage area (normal counter area 231, open/close execution mode counter area 232, high frequency support mode counter area 233) in which history information of a game corresponding to a predetermined event that occurs as a result of the game being played is stored.

According to feature X9, when a specified event occurs, corresponding history information is stored in the history storage area. This allows the gaming machine to store and hold information for managing the number of times or frequency of occurrence of the specified event, and by using this managed information, it becomes possible to appropriately manage the frequency of occurrence of the specified event. Furthermore, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Furthermore, by executing a process for controlling the progress of the game as the first specified process, and executing a process for managing the game history as the second specified process, it becomes possible to prevent the information stored in the history storage area from being rewritten when the process for controlling the progress of the game is executed.

Features X10. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature

According to feature X10, by deriving behavior information corresponding to the results of play during a specified period of time using the history information stored in the history storage area, it becomes possible to grasp the results of management of the play history, such as the frequency of occurrence of a specified event.

Features X11. The gaming machine according to feature X10, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature X11, when behavior information corresponding to the results of a game during a specified period is derived using history information, the behavior information is stored in a behavior information storage area. This makes it possible to grasp the results of game history management at any time. In addition, by executing a process for controlling the progress of a game as the first specified process and a process for managing the game history as the second specified process, it becomes possible to prevent the information stored in the behavior information storage area from being overwritten when the process for controlling the progress of a game is executed.

Note that for the configuration of features X1 to X11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristic Group Y>
Feature Y1. Equipped with a control means (main CPU 63) that executes various processes,
The control means includes:
A first predetermined processing execution means for executing a first predetermined processing among the various processing (a function for executing processing other than the management execution processing in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A second predetermined processing execution means (a function of executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments) that executes a second predetermined processing among the various processing;
a first predetermined storage area (a work area 221 for specific control, a stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
A second predetermined storage area (a work area 223 for non-specific control, a stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
a first calculation means for calculating first reference numerical information corresponding to the plurality of pieces of information stored in the first predetermined storage area (in the 30th embodiment, a function for executing the processing of steps S6604 and S6710 in the main CPU 63; in the 31st embodiment, a function for executing the processing of step S7304 in the main CPU 63; in the 32nd embodiment, a function for executing the processing of steps S7610 and S7701 in the main CPU 63);
A gaming machine comprising:

According to feature Y1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a storage area dedicated to the first predetermined process, and the second predetermined storage area is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage destination of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, it is possible to prevent information used in one of the first and second predetermined processes from being erased when the other process is executed. In this case, first reference numerical information corresponding to the multiple pieces of information stored in the first predetermined storage area is calculated. By using the first reference numerical information, it is possible to identify whether an information anomaly has occurred only in the first predetermined storage area.

Feature Y2. The gaming machine described in Feature Y1, characterized in that it is equipped with information erasing means (a function for executing the process of step S6607 in the main CPU 63 in the 30th embodiment, a function for executing the process of steps S7401 and S7402 in the main CPU 63 in the 31st embodiment, and a function for executing the process of steps S7704 and S7705 in the main CPU 63) that causes information erasing processing to be executed on the first predetermined memory area based on the identification of the occurrence of an abnormality with respect to the first reference numerical information calculated by the first calculation means.

According to feature Y2, when an abnormality is identified with respect to the first reference numerical information, an information erasure process is executed for the first specified storage area, so that it is possible to prevent the first specified process from being executed in a state where the information in the first specified storage area is retained as is, even if an information abnormality has occurred.

Feature Y3. The first calculation means is
A first power failure calculation means for calculating the first reference numerical information when the supply of operating power to the control means is stopped (in the 30th embodiment, a function for executing the processing of step S6710 in the main CPU 63, and in the 32nd embodiment, a function for executing the processing of step S7610 in the main CPU 63);
A first power-on time calculation means for calculating the first reference numerical information when the supply of operating power to the control means is started (in the 30th embodiment, a function for executing the process of step S6604 in the main CPU 63, in the 31st embodiment, a function for executing the process of step S7304 in the main CPU 63, and in the 32nd embodiment, a function for executing the process of step S7701 in the main CPU 63);
Equipped with
The gaming machine described in feature Y2, characterized in that the information erasing means executes the information erasing process on at least the first specified memory area based on the fact that the first reference numerical information calculated by the first power outage calculation means does not match the first reference numerical information calculated by the first power on calculation means.

According to feature Y3, it is possible to determine whether or not the information in the first predetermined storage area is stored and retained even when the supply of operating power is stopped by calculating the first reference numerical information. becomes. If the information in the first predetermined storage area is not stored and retained after the supply of operating power is stopped, information deletion processing is executed for the first predetermined storage area, so that an information error occurs. It is possible to prevent the first predetermined process from being executed while the information in the first predetermined storage area is held as is despite the occurrence of the above.

Feature Y4. The information erasing means does not perform erasing processing of the information on the second predetermined storage area even if the occurrence of an abnormality is identified regarding the first reference numerical information calculated by the first calculation means. The gaming machine according to feature Y2 or Y3.

According to feature Y4, when the occurrence of an abnormality is identified regarding the first reference numerical information, information deletion processing is executed for the first predetermined storage area, while information deletion processing is performed for the second predetermined storage area. Processing is not executed. This makes it possible to prevent even the information in the second predetermined storage area from being erased in a situation where an information abnormality occurs in the first predetermined storage area.

Feature Y5. A gaming machine according to any one of features Y1 to Y4, characterized in that the first reference numerical information is information that does not change depending on the information stored in the second predetermined memory area.

According to feature Y5, in a configuration in which a first specified storage area and a second specified storage area exist, it is possible to individually identify information anomalies related to the first specified storage area by using the first reference numerical information.

Feature Y6. A second calculation means (a function for executing the processing of step S7611 and step S7706 in the main CPU 63) is provided for calculating second reference numerical information corresponding to a plurality of pieces of information stored in the second predetermined storage area. The gaming machine according to any one of features Y1 to Y5.

According to feature Y6, second reference numerical information corresponding to a plurality of pieces of information stored in the second predetermined storage area is calculated. By using the second reference numerical information, it is possible to specify whether an information abnormality has occurred only in the second predetermined storage area.

Feature Y7. The gaming machine described in Feature Y6 is characterized in that it is provided with a means (a function for executing the processes of steps S7808 and S7810 in the main CPU 63) for causing an information erasure process to be executed on at least the second predetermined memory area based on the identification of the occurrence of an abnormality with respect to the second reference numerical information calculated by the second calculation means.

According to feature Y7, when an abnormality is identified with respect to the second reference numerical information, an information erasure process is performed on the second specified storage area, so that it is possible to prevent the second specified process from being performed in a state where the information in the second specified storage area is retained as is despite the occurrence of an information abnormality.

Feature Y8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features Y1 to Y7, wherein the second predetermined process includes a process for managing a gaming history.

According to feature Y8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature Y9. The gaming machine described in Feature Y8, characterized in that the second predetermined storage area includes a history storage area (normal counter area 231, open/close execution mode counter area 232, high frequency support mode counter area 233) in which history information of a game corresponding to a predetermined event that occurs as a result of the game being played is stored.

According to feature Y9, when a predetermined event occurs, history information corresponding to it is stored in the history storage area. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the history storage area from being rewritten during execution.

Feature Y10. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature Y9, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature Y10, by deriving behavior information corresponding to the results of play during a specified period of time using the history information stored in the history storage area, it becomes possible to grasp the results of management of the play history, such as the frequency of occurrence of a specified event.

Feature Y11. The gaming machine described in Feature Y10, characterized in that the second predetermined storage area includes a mode information storage area (computation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature Y11, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the mode information storage area from being rewritten during execution.

Note that for the configuration of features Y1 to Y11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

The invention relating to the above feature group T, feature group U, feature group V, feature group W, feature group X, and feature group Y can solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entrance section provided in the gaming area, the gaming ball is paid out from a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known in pachinko gaming machines, in which the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately perform various controls, and there is still room for improvement in this respect.

<Feature Z group>
Feature Z1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
a situation generating means (a function of executing the processes of step S7905, step S7916, and step S7917 in the main CPU 63) for creating a setting possible situation in which the setting value to be used can be changed;
In a situation where the supply of operating power to the control means (main CPU 63) having the setting means is started and the process at the time of supply start is being executed, the setting value of the target to be used in a situation where the setting is not possible is determined. a setting notification means (a function for executing a setting confirmation process in the main CPU 63) for making notifications;
A gaming machine characterized by comprising:

According to feature Z1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, in order to check the set value that is set to be used, it is necessary to temporarily stop the supply of operating power to the control means and then restart the supply of operating power to the control means. . This makes it difficult to illegally check the setting values. Further, since the set value is notified while the supply start process is being executed, there is no need to notify the set value when the game is interrupted. Therefore, it becomes possible to appropriately notify the setting value.

Feature Z2. The gaming machine described in Feature Z1, wherein the situation generating means causes the settable situation to occur in a situation in which the supply start processing is being executed.

According to feature Z2, it is possible to consolidate the setting possible situation in which the setting value to be used can be set and the situation in which the setting value to be used is notified in a situation in which it is not possible to set, into a situation in which processing is being performed at the start of supply.

Feature Z3. A first identification means (a function for executing the processes of steps S7912 and S7916 in the main CPU 63) for identifying the occurrence of a first trigger event is provided;
The gaming machine described in feature Z1 or Z2, characterized in that the setting notification means notifies the user of the setting value to be used in a situation that is not a settable situation, based on the situation in which the processing at the start of supply is being executed and the occurrence of the first trigger event has been identified by the first identification means.

According to feature Z3, in order to notify the setting value to be used, it is necessary not only to start supplying operating power to the control means but also to generate a first trigger event. This makes it difficult to illegally check the setting values.

Feature Z4. The gaming machine according to feature Z3, wherein the first trigger event is that a predetermined operation with a setting key is performed on a setting key insertion section (setting key insertion section 68a).

According to feature Z4, in order to notify the settings of the target device, a specific operation must be performed using the setting key in the setting key insertion section. This makes it difficult to illegally check the setting values.

Feature Z5. The setting notification means satisfies the notification condition based on the situation in which the process at the time of supply start is being executed and the occurrence of the first trigger event has been specified by the first identification device. In this case, the setting value of the target to be used is notified in a situation where the setting is not possible,
The situation generating means satisfies the setting condition based on the situation where the process at the time of supply start is being executed and the occurrence of the first triggering event has been specified by the first specifying means. When the above setting is possible,
The gaming machine according to feature Z3 or Z4, wherein the notification condition and the setting condition are different.

According to feature Z5, in both cases of generating a setting possible situation and reporting the setting value of the target to be used, it is necessary to not only start the supply of operating power to the control means but also to generate a first trigger event. This makes it possible to make it difficult to fraudulently set the setting value of the target to be used and to fraudulently check the setting value of the target to be used. On the other hand, since the setting conditions for generating a setting possible situation and the reporting conditions for reporting the setting value of the target to be used are different, it is possible to independently generate either the setting possible situation or the situation in which the setting value of the target to be used is reported.

Feature Z6. comprising a second identifying means (a function of executing the process of step S7905 in the main CPU 63) for identifying the occurrence of the second trigger event,
The setting condition is a situation in which the occurrence of the first trigger event is specified by the first specifying means in a situation where the process at the time of supply start is being executed, and the second specifying means specifies the occurrence of the first trigger event. Established on the basis that the occurrence of the triggering event is specified,
The notification condition is a situation in which the first specifying means specifies the occurrence of the first trigger event in a situation where the supply start process is being executed, and the second specifying device specifies the second trigger event. The gaming machine according to feature Z5, characterized in that the triggering event is established based on a situation in which the occurrence of the triggering event is not specified.

According to feature Z6, in order to generate a setting possible state, it is necessary to start the supply of operating power to the control means and to generate not only the first triggering event but also the second triggering event. As a result, in both cases of setting the setting value to be used and of reporting the setting value to be used, in a configuration in which it is necessary to not only start the supply of operating power to the control means but also to generate the first triggering event, it is possible to make the operation for generating the setting possible state more complicated. Therefore, it is possible to more focused on preventing actions that attempt to fraudulently set the setting value to be used.

Feature Z7. The gaming machine described in Feature Z6, characterized in that the second triggering event is the operation of a specified operating means (reset button 68c).

According to feature Z7, in order to generate a setting possible state, it is necessary to start the supply of operating power to the control means and not only generate a first trigger event but also operate a specific operation means. This makes it difficult to fraudulently set the setting value to be used, while preventing the operation to legitimately generate a setting possible state from becoming excessively complicated.

Feature Z8. A gaming machine as described in feature Z6 or Z7, characterized in that it is provided with an information erasing means (a function for executing the processing of step S7915 in the main CPU 63) that executes an information erasing process based on the situation in which the occurrence of the second triggering event is identified by the second identification means in a situation in which the processing at the start of the supply is being executed.

According to feature Z8, by utilizing the second trigger event necessary to execute the information erasure process, it is possible to differentiate between the condition for generating a setting possible situation and the condition for notifying the setting value to be used in a situation where the setting is not possible.

Feature Z9. The gaming machine according to feature Z8, wherein the information erasing means executes the information erasing process even when the setting possible situation occurs.

According to feature Z9, it is possible to execute the information deletion process when the setting becomes possible.

Feature Z10. A gaming machine as described in Feature Z8 or Z9, characterized in that when the supply start processing is being executed and the occurrence of the second triggering event is identified by the second identification means but the occurrence of the first triggering event is not identified by the first identification means, the setting is not enabled but the information erasing process is executed by the information erasing means.

According to feature Z10, depending on whether or not the first trigger event is generated when the supply of operating power to the control means is started, information erasure processing is executed and a setting possible state is reached; It is possible to select a case where the deletion process is executed but the setting is not possible.

In addition, for the configuration of features Z1 to Z10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Characteristic group a>
Feature a1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
a situation generating means (a function of executing the processes of step S7905, step S7916, and step S7917 in the main CPU 63) for creating a setting possible situation in which the setting value to be used can be changed;
an information erasing means (a function that executes the process of step S7915 in the main CPU 63) that executes information erasing processing;
a setting notification means (a function for executing a setting confirmation process in the main CPU 63) for notifying the setting value of the usage target in a situation where the setting is not possible;
a first specifying means for specifying the occurrence of a first trigger event (a function of executing the processes of step S7912 and step S7916 in the main CPU 63);
a second specifying means for specifying the occurrence of the second trigger event (a function for executing the process of step S7905 in the main CPU 63);
Equipped with
The situation generating means specifies that the first triggering event occurs in a situation where the supply of operating power to the control means having the setting means is started and processing at the time of supply start is being executed, by the first specifying means. and the occurrence of the second triggering event is specified by the second specifying means, so that the setting possible situation is set;
The information erasing means performs the information erasing process based on the fact that the second specifying means has identified the occurrence of the second trigger event in the situation where the supply start process is being executed. Run
A situation in which the occurrence of the second triggering event is specified by the second specifying means in a situation where the process at the time of supply start is being executed, and the occurrence of the first triggering event is specified by the first specifying means. If the situation is such that the setting is not possible, the information erasing means executes the information erasing process, although the setting is not possible.
The setting notification means is configured to detect the occurrence of the first trigger event in a situation where the first specifying means specifies the occurrence of the first trigger event in a situation where the supply start process is being executed, and the second specifying device specifies the second trigger event. A gaming machine characterized in that, based on a situation in which the occurrence of a triggering event is not specified, notification of the setting value of the target to be used in a situation where the setting is not possible is performed.

According to feature a1, the setting value to be used is set from among multiple setting values corresponding to the player's degree of advantage, so the player will expect that the more advantageous setting value will be the one to be used. In addition, since the configuration allows for the execution of an information erasure process, it is possible to prevent play from being played despite the occurrence of an information anomaly. In addition, since the configuration allows for the notification of the setting value set to be used, it is possible to check the setting value.

In this case, in order to check the setting value that is set as the target for use, it is necessary to start the supply of operating power to the control means and cause the first trigger event to occur. This makes it difficult to illegally check the setting value.

In addition, in order to generate a settable situation, it is necessary to start supplying operating power to the control means and to generate not only the first trigger event but also the second trigger event. As a result, whether the set value to be used is set or the set value to be used is notified, it not only starts supplying operating power to the control means. In a configuration in which it is necessary to generate a first trigger event, it is possible to make the operation for generating a settable situation more complicated. Therefore, it becomes possible to more intensively prevent acts of attempting to set setting values to be used illegally.

In addition, by utilizing the second trigger event required to execute the information erasure process, it is possible to differentiate between the conditions for generating a setting possible situation and the conditions for notifying the setting value to be used in a situation where the setting is not possible.

In addition, depending on whether or not a first trigger event occurs when the supply of operating power to the control means is started, it is possible to select between a case in which the information erasure process is executed and the setting becomes possible, and a case in which the information erasure process is executed but the setting does not become possible.

Feature a2. The gaming machine described in feature a1, characterized in that the first triggering event is a predetermined operation being performed using a setting key on the setting key insertion section (setting key insertion section 68a).

According to feature a2, in order to notify the settings of the target device, a specific operation must be performed using the setting key in the setting key insertion section. This makes it difficult to illegally check the setting values.

Feature a3. The gaming machine described in feature a1 or a2, characterized in that the second triggering event is the operation of a predetermined operation means (reset button 68c).

According to feature a3, in order to generate a setting possible state, it is necessary to start the supply of operating power to the control means and to operate the specific operation means in addition to generating the first trigger event. This makes it difficult to fraudulently set the setting value to be used, while preventing the operation for legitimately generating the setting possible state from becoming excessively complicated.

Note that for the configuration of features a1 to a3, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

The invention relating to the above-mentioned feature group Z and feature group a can solve the following problems.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters a ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are ejected. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, there is a need for a configuration that can suitably confirm the setting values that determine the advantage of the gaming machine, and there is still room for improvement in this regard. .

<Feature group b>
Feature b1. A setting means (a function for executing a setting value update process in the master CPU 63) for setting a setting value to be used from among multiple setting values corresponding to the player's advantage level;
A situation generating means (a function for executing the processes of steps S7905, S7916, and S7917 in the main CPU 63) that makes it possible to change the setting value to be used;
A setting monitoring means (a function for executing the process of step S8220 in the main CPU 63) for executing a setting monitoring process for monitoring whether the setting value of the target to be used is abnormal or not;
Equipped with
A gaming machine characterized in that the setting monitoring process is not included in the supply start process executed when the supply of operating power to a control means having the setting means is started.

According to feature b1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, since a setting monitoring process is executed to monitor whether or not the setting value to be used is abnormal, it is possible to deal with it if the setting value to be used is abnormal. Moreover, since the setting monitoring process is not included in the process at the time of starting supply, it is possible to achieve the above-mentioned excellent effects while preventing the processing load of the process at the time of starting supply from increasing.

Feature b2. The gaming machine according to feature b1, wherein the situation generating means generates the settable situation in a situation where the supply start process is being executed.

According to feature b2, a setting possible situation occurs while the processing at the start of supply is being executed, so it is possible to set the setting value to be used before the start of play. In this case, the setting value to be used is set in the processing at the start of supply, so the processing load of the processing at the start of supply increases accordingly. In contrast, since the configuration of feature b1 is provided and the processing at the start of supply does not include a setting monitoring process, it is possible to monitor whether the setting value to be used is abnormal while preventing a further increase in the processing load of the processing at the start of supply.

Feature b3. The gaming machine described in feature b1 or b2, characterized in that the setting monitoring means executes the setting monitoring process after the process at the start of the supply is completed.

According to feature b3, since the setting monitoring process is executed after the process at the start of supply is completed, the setting value to be used is detected to be abnormal while preventing the processing load of the process at the start of supply from increasing. It becomes possible to monitor whether the

Feature b4. The gaming machine described in feature b3, wherein the setting monitoring means executes the setting monitoring process each time a monitoring trigger occurs after the process at the start of the supply is completed.

According to feature b4, since the setting monitoring process is executed every time a monitoring opportunity occurs after the process at the start of supply is completed, it becomes easier to identify that the setting value to be used is abnormal.

Feature b5. A means for executing periodically activated interrupt processing (a function for executing the first timer interrupt processing in the main CPU 63),
The gaming machine according to any one of features b1 to b4, wherein the interrupt processing includes the setting monitoring processing.

According to feature b5, the setting monitoring process is executed each time the device is started periodically, which makes it possible to increase the frequency of monitoring whether the setting values of the target device are abnormal.

Feature b6. The setting monitoring means is a means for regulating the progress of the game (step S8207 and The gaming machine according to any one of features b1 to b5, characterized in that the gaming machine is equipped with a function of executing the process of step S8302.

According to feature b6, the progress of the game is regulated when it is identified that the setting value to be used is abnormal, so the game is not continued even though the setting value to be used is abnormal. It is possible to prevent this from occurring.

Feature b7. The setting monitoring means is configured to provide a notification that allows the player to recognize that the setting possible situation should occur based on the fact that the setting value of the target to be used is determined to be abnormal in the setting monitoring process. The gaming machine according to any one of features b1 to b6, characterized in that the gaming machine is provided with a means for executing the process (a function of executing the process of step S8303 in the main CPU 63).

According to feature b7, when it is specified that the setting value of the target to be used is abnormal, a notification is executed that allows the player to recognize that a setting possible situation should occur. If the value becomes abnormal, it is possible to prompt the manager of the game hall to resolve it.

Note that for the configuration of features b1 to b7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

The invention relating to the above feature group b can solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entrance section provided in the gaming area, the gaming ball is paid out from a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known in pachinko gaming machines, in which the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to suitably manage the setting values that determine the advantage of the gaming machine, and there is still room for improvement in this respect.

<Feature group c>
Feature c1. A predetermined display means (first to fourth display devices 201 to 204 for notification),
A predetermined display control means for controlling the display of the predetermined display means (a function for executing a second timer interrupt process in the main CPU 63);
Equipped with
The gaming machine is characterized in that the specified display control means is equipped with a check control means (in the 35th embodiment, a function of executing the processing of step S9102 in the main CPU 63, and in the 38th embodiment, a function of executing the processing of step S9602 in the main CPU 63) that causes the specified display means to display a check display that enables confirmation of whether the specified display means is normal or not based on the occurrence of a check trigger.

According to feature c1, when a check trigger occurs, a check display is displayed on the specified display means. This makes it possible to check whether the specified display means is normal or not.

Feature c2. The predetermined display means has a plurality of light-emitting parts (display segments 321 to 324),
The gaming machine described in feature c1, wherein the check display is a display that enables confirmation that each of the multiple light-emitting sections can be illuminated.

According to feature c2, each of the plurality of light emitting parts of the predetermined display means enters a light emitting state as a check display. This makes it possible to confirm whether each of the plurality of light emitting sections of the predetermined display means is in a light emitting state.

Feature c3. The gaming machine according to feature c1 or c2, characterized in that the check trigger occurs when the supply of operating power is started.

According to feature c3, since a check display is performed when the supply of operating power is started, it is possible to quickly confirm whether the predetermined display means is normal.

Feature c4. The gaming machine according to any one of features c1 to c3, wherein the check opportunity occurs every time supply of operating power is started.

According to feature c4, it is possible to check whether the predetermined display means is normal each time the supply of operating power is started.

Feature c5. A gaming machine according to any one of features c1 to c4, characterized in that the check trigger occurs when the supply of operating power is started, without requiring any operation to generate the check trigger.

According to feature c5, when the supply of operating power starts, a check display is displayed without requiring any special operation, making it possible to easily check whether the specified display means is normal.

Feature c6. The gaming machine according to any one of features c1 to c5, characterized in that the check control means causes the predetermined display means to display the check display when the supply of operating power has started and the check trigger has occurred, and does not cause the predetermined display means to display the check display when the supply of operating power has started and the check trigger has not occurred.

According to feature c6, since the check display is performed when the supply of operating power is started and a check opportunity has occurred, the predetermined display is performed before the game starts on the gaming machine. It becomes possible to check whether the means are normal or not. On the other hand, even if the supply of operating power has started, the check display will not be displayed if no check trigger has occurred, so the check display will not be displayed in situations where there is no need to display the check display. It is possible to prevent this from occurring.

Feature c7. A means (a function for executing the process of step S8606 in the main CPU 63) is provided for storing information in a usage correspondence storage means (management start flag) based on the fact that the gaming machine is used in a predetermined manner,
The check control means is such that the check trigger occurs when the supply of operating power is started and the information stored in the usage correspondence storage means does not correspond to the usage correspondence information. when the predetermined display means makes the check display, and the supply of operating power is started and the information stored in the usage compatible storage means corresponds to the usage compatible information. The gaming machine according to feature c6, wherein the predetermined display means does not display the check display on the assumption that the check opportunity has not occurred.

According to feature c7, a check display is displayed on the specified display means when the supply of operating power is started until the gaming machine is used in a specified manner, and even if the supply of operating power is started based on the gaming machine being used in a specified manner, the check display is not displayed on the specified display means. As a result, for example, at the shipping stage of the gaming machine, by displaying a check display on the specified display means when the supply of operating power is started, it is possible to check whether the specified display means is normal, and after the gaming machine is installed in an amusement hall, it is possible to prevent the check display from being displayed on the specified display means even if the supply of operating power is started.

Feature c8. The check control means is
A display termination means for terminating the check display in the predetermined display means based on the occurrence of a termination trigger (a function for executing the process of step S9002 in the main CPU 63 and a function for making a negative determination in step S9101);
A canceling means for terminating the check display in the predetermined display means based on the occurrence of a canceling trigger even in a situation where the termination trigger has not occurred (a function for executing the process of step S9203 in the main CPU 63 and a function for making a negative determination in step S9101, a function for executing the process of step S9308 in the main CPU 63 and a function for making a negative determination in step S9101);
A gaming machine according to any one of features c1 to c7, characterized in that it is equipped with:

According to feature c8, even if a trigger for terminating the check display has not occurred, the check display is terminated based on the occurrence of a cancellation trigger, so that even if a check display is being displayed on a specified display means, the check display can be terminated midway and another display can be displayed.

Feature c9. The gaming machine described in feature c8, characterized in that the cancellation trigger occurs based on the operation of a specified operation means (reset button 68c).

According to feature c9, a cancellation trigger occurs when a specific operating means is operated, making it possible to end the check display at any time.

Feature c10. The predetermined display control means includes a separate display control means (a function of executing the processes of step S9004 and step S9006 in the main CPU 63) that causes a separate display different from the check display to be performed when a separate display execution status occurs. Prepare,
The gaming machine according to feature c8 or c9, wherein the cancellation trigger occurs based on the separate display execution status.

According to feature c10, since the check display is terminated when a cancellation opportunity occurs based on the separate display execution status, it is possible to give priority to the separate display over the check display.

Feature c11. A gaming machine according to any one of features c1 to c10, characterized in that it is provided with a means for putting the progress of processing on hold when the check display is being executed on the predetermined display means (a function for executing the processing of step S9406 in the main CPU 63).

According to feature c11, since a check display is performed on the predetermined display means in a situation where the progress of processing is on standby, it is possible to perform a check display while suppressing an increase in processing load.

Feature c12. The check control means causes the predetermined display means to start the check display before a process for controlling the progress of the game is executed when the supply of operating power is started. The gaming machine according to any one of c1 to c11.

According to feature c12, when the supply of operating power is started, it becomes possible to check whether the specified display means is normal or not before a game is played on the gaming machine.

Feature c13. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Means for executing processing at the start of supply of operating power based on the start of supply of operating power (in the 35th embodiment, a function for executing the processing of steps S8801 to S8819 in the main CPU 63, In the embodiment, a function of executing the processing of steps S9401 to S9420 in the main CPU 63);
Equipped with
A configuration in which predetermined setting-related processing regarding the setting value (setting confirmation processing, setting value update processing) can be executed in a situation where the processing at the time of starting supply of operating power is being executed,
The gaming machine according to feature c12, wherein the check control means starts the check display on the predetermined display means in a situation where the process at the time of starting the supply of operating power is being executed.

According to feature c13, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, predetermined setting-related processing regarding setting values may be executed in a situation where processing at the start of supply of operating power is being executed. This allows setting-related processing to be executed at a stage before the game starts. In this case, a check display is started on the predetermined display means in a situation where the process at the start of supply of operating power is being executed. This makes it possible to integrate not only the predetermined setting-related processing but also the processing for starting the check display on the predetermined display means with respect to the processing at the time of starting the supply of operating power.

Feature c14. The gaming machine described in feature c13, characterized in that the check control means includes a means for starting the check display on the predetermined display means before the timing for the predetermined setting-related processing to be executed (a function for executing the processing of steps S8804 and S8805 on the main CPU 63 in the 35th embodiment, and a function for executing the processing of steps S9404 and S9405 on the main CPU 63 in the 36th embodiment).

Feature c14 makes it possible to check whether a specified display means is normal before a specified setting-related process is executed.

Feature c15. The gaming machine described in feature c13 or c14, characterized in that the predetermined display control means includes a means for displaying the current setting value on the predetermined display means when the predetermined setting-related process is executed (a function for executing the processes of steps S9004 and S9006 in the main CPU 63).

According to feature c15, when a predetermined setting-related process is executed, the current setting value is displayed on the predetermined display means, so the game hall manager can check the current setting value by checking the predetermined display means. It becomes possible to understand. In this case, the configuration of feature c13 is provided, and the processing at the time of starting the supply of operating power includes not only the predetermined setting-related processing but also the processing for starting the check display on the predetermined display means. , the work of checking the predetermined display means to understand whether the predetermined display means is normal or not, and the work of checking the predetermined display means to understand the current setting value are performed at the time of starting the supply of operating power. This makes it possible to do this all at once in a situation where the

In addition, when the configuration of feature c14 is provided, the specified display means starts displaying a check before the current setting value is displayed on the specified display means, so that after checking whether the specified display means is normal, it becomes possible to check the current setting value using the specified display means. This makes it possible to accurately check the setting value.

Feature c16. The check control means includes:
means for starting the check display on the predetermined display means before the predetermined setting-related process can be executed (a function for executing the processes of step S8804 and step S8805 in the main CPU 63);
Means for terminating the check display based on the occurrence of a cancellation opportunity in the predetermined setting-related process in a situation where the check display is being performed (a function and step of executing the process of step S9203 in the main CPU 63) (a function to make a negative determination in S9101, a function to execute the process in step S9308 in the main CPU 63, and a function to make a negative determination in step S9101);
The gaming machine according to feature c15, comprising:

According to feature c16, since the check display is started on the specified display means before the current setting value is displayed on the specified display means, it is possible to check the current setting value using the specified display means after checking whether the specified display means is normal. This makes it possible to accurately check the setting value. In addition, when the check display is being displayed, the check display is terminated based on the occurrence of a cancellation trigger when a specified setting-related process is executed. This makes it possible to terminate the check display and display the current setting value on the specified display means without waiting for the check display to terminate when the specified setting-related process is executed. This makes it possible to check the current setting value early.

Feature c17. The gaming machine according to feature c16, wherein the cancellation trigger occurs based on the operation of a predetermined operation means (reset button 68c).

According to feature c17, since a cancellation opportunity occurs based on the operation of the predetermined operation means, it is possible to end the check display at any timing.

Feature c18. A gaming machine according to any one of features c13 to c17, characterized in that it is provided with a means for executing a process for making it possible to change the setting value to be used as the predetermined setting-related process (in the 35th embodiment, a function for making a positive determination in steps S8806, S8817, and S8818 in the main CPU 63; in the 36th embodiment, a function for making a positive determination in steps S9407, S9418, and S9419 in the main CPU 63).

According to feature c18, the processing at the time of starting the supply of operating power includes not only the processing for setting the setting value to be used but also the processing for starting the check display on the predetermined display means. becomes possible.

Feature c19. The setting means updates the set value to be used based on the operation of a predetermined operation means (reset button 68c) in the setting possible situation,
The check control means includes:
means for starting the check display on the predetermined display means before the setting possible state is reached (a function for executing the processing of step S8804 and step S8805 in the main CPU 63);
Means for terminating the check display based on the operation of the predetermined operation means in the setting possible state where the check display is being performed (executing the process of step S9203 in the main CPU 63); a function that makes a negative determination in step S9101, a function that executes the process of step S9308 in the main CPU 63, and a function that makes a negative determination in step S9101),
Equipped with
The predetermined display control means is a means for displaying the current setting value on the predetermined display means after the check display is finished in the setting possible condition (executes the processing of step S9004 and step S9006 in the main CPU 63). The gaming machine according to feature c18, characterized in that the gaming machine has a function of:

According to feature c19, before the current set value is displayed on the predetermined display means, the check display starts on the predetermined display means, so that after confirming whether the predetermined display means is normal or not, , it becomes possible to check the current setting values using a predetermined display means. This makes it possible to accurately check the set values. Furthermore, when the check display is being performed and the setting becomes possible and the predetermined operating means is operated, the check display is terminated and the current set value is displayed. This makes it possible to end the check display and display the current setting value on the predetermined display means without waiting for the check display to end when the setting becomes possible. . Therefore, it becomes possible to check the current setting values at an early stage.

Furthermore, in a configuration in which the setting value to be used is updated based on the operation of a specific operating means in a setting possible situation, the check display is ended and the current setting value is displayed based on the operation of a specific operating means in a setting possible situation, so no dedicated operation is required to end the check display and display the current setting value. This makes it possible to improve the operability of the work to update the setting value to be used.

Feature c20. A gaming machine according to any one of features c13 to c19, characterized in that it is provided with a means for executing a process for displaying the current setting value on the predetermined display means as the predetermined setting-related process (a function for executing a setting confirmation process in the main CPU 63).

Feature c20 makes it possible to consolidate not only the process for checking the current setting value but also the process for starting a check display on a specified display means when the supply of operating power starts.

Feature c21. The predetermined display control means includes means for displaying information corresponding to the management results of the game history on the predetermined display means (a function of executing the processing of steps S8708, S8709, and S9107 in the main CPU 63). The gaming machine according to any one of features c1 to c20.

According to feature c21, it is possible to notify the gaming hall manager of the gaming history management results. In this case, by having the configuration of feature c1 above and performing a check display on the predetermined display means, it is possible to check whether or not the information corresponding to the management result of the gaming history is being accurately displayed on the predetermined display means. It becomes possible to confirm.

In addition, for the configuration of features c1 to c21, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Feature group d>
Feature d1. A predetermined display means (first to fourth display devices 201 to 204 for notification),
A predetermined display control means for controlling the display of the predetermined display means (a function for executing a second timer interrupt process in the main CPU 63);
Equipped with
The gaming machine is characterized in that the specified display control means is equipped with a check control means (in the 35th embodiment, a function of executing processing of step S9102 in the main CPU 63, and in the 38th embodiment, a function of executing processing of step S9602 in the main CPU 63) that causes the specified display means to display a check that enables confirmation of whether the specified display means is normal before processing for controlling the progress of the game is executed when the supply of operating power is started.

According to the feature d1, by performing a check display on the predetermined display means, it is possible to confirm whether the predetermined display means is normal. In addition, when the supply of operating power is started, the check display starts before the processing for controlling the progress of the game is executed, so when the supply of operating power is started, the gaming machine It becomes possible to confirm whether or not the predetermined display means is normal before playing the game.

Feature d2. A setting means (a function for executing a setting value update process in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
A means for executing processing at the start of supply of operating power based on the start of supply of operating power (a function for executing the processing of steps S8801 to S8819 in the main CPU 63 in the 35th embodiment, and a function for executing the processing of steps S9401 to S9420 in the main CPU 63 in the 36th embodiment);
Equipped with
A configuration in which a predetermined setting-related process (a setting confirmation process, a setting value update process) related to the setting value can be executed in a situation in which the process at the start of the supply of the operating power is being executed,
The gaming machine described in feature d1 is characterized in that the check control means starts the check display on the specified display means when processing is being executed at the start of the supply of operating power.

According to feature d2, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, predetermined setting-related processing regarding setting values may be executed in a situation where processing at the start of supply of operating power is being executed. This allows setting-related processing to be executed at a stage before the game starts. In this case, a check display is started on the predetermined display means in a situation where the process at the start of supply of operating power is being executed. This makes it possible to integrate not only the predetermined setting-related processing but also the processing for starting the check display on the predetermined display means with respect to the processing at the time of starting the supply of operating power.

Feature d3. The check control means is a means for starting the check display on the predetermined display means before the predetermined setting-related process can be executed (in the 35th embodiment, step S8804 and step S8805 in the main CPU 63). (in the thirty-sixth embodiment, the function of executing the processing of step S9404 and step S9405 in the main CPU 63).

According to feature d3, it is possible to check whether the predetermined display means is normal before the predetermined setting-related process is executed.

Feature d4. The gaming machine described in feature d2 or d3, characterized in that the predetermined display control means includes a means for displaying the current setting value on the predetermined display means when the predetermined setting-related process is executed (a function for executing the processes of steps S9004 and S9006 in the main CPU 63).

According to feature d4, when a specified setting-related process is executed, the current setting value is displayed on the specified display means, so that the manager of the amusement hall can ascertain the current setting value by checking the specified display means. In this case, since the configuration of feature d2 is provided and not only the specified setting-related process but also the process for starting a check display on the specified display means is integrated into the process at the start of the supply of operating power, it is possible to check the specified display means to ascertain whether the specified display means is normal and to check the specified display means to ascertain the current setting value, all at once, while the process at the start of the supply of operating power is being executed.

Furthermore, in the case of having the configuration of feature d3 above, the predetermined display means starts displaying a check before the current set value is displayed on the predetermined display means, so that the predetermined display means is normal. After checking whether or not the current setting value is set, it becomes possible to check the current setting value using a predetermined display means. This makes it possible to accurately check the set values.

Feature d5. The check control means is
A means for starting the check display in the predetermined display means before the timing when the predetermined setting-related processing can be executed (a function for executing the processing of steps S8804 and S8805 in the main CPU 63);
A means for terminating the check display based on the occurrence of a cancellation trigger in the predetermined setting-related processing while the check display is being performed (a function for executing the processing of step S9203 in the main CPU 63 and a function for making a negative determination in step S9101, a function for executing the processing of step S9308 in the main CPU 63 and a function for making a negative determination in step S9101);
The gaming machine according to feature d4, characterized in that it is equipped with:

According to feature d5, since the check display is started on the specified display means before the current setting value is displayed on the specified display means, it is possible to check the current setting value using the specified display means after checking whether the specified display means is normal. This makes it possible to accurately check the setting value. Also, when the check display is being displayed, the check display is terminated based on the occurrence of a cancellation trigger when a specified setting-related process is executed. This makes it possible to terminate the check display and display the current setting value on the specified display means without waiting for the check display to terminate when the specified setting-related process is executed. This makes it possible to check the current setting value early.

Feature d6. The gaming machine described in feature d5, characterized in that the cancellation trigger occurs based on the operation of a specified operation means (reset button 68c).

According to feature d6, since a cancellation trigger occurs based on the operation of the predetermined operation means, it is possible to end the check display at any timing.

Feature d7. A gaming machine according to any one of features d2 to d6, characterized in that it is provided with a means for executing a process for making it possible to change the setting value to be used as the predetermined setting-related process (in the 35th embodiment, a function for making a positive determination in steps S8806, S8817, and S8818 in the main CPU 63; in the 36th embodiment, a function for making a positive determination in steps S9407, S9418, and S9419 in the main CPU 63).

Feature d7 makes it possible to consolidate not only the process for setting the setting value to be used but also the process for starting a check display on a specified display means when the supply of operating power starts.

Feature d8. The setting means updates the set value to be used based on the operation of a predetermined operation means (reset button 68c) in the setting possible situation,
The check control means includes:
means for starting the check display on the predetermined display means before the setting possible state is reached (a function for executing the processing of step S8804 and step S8805 in the main CPU 63);
Means for terminating the check display based on the operation of the predetermined operation means in the setting possible state where the check display is being performed (executing the process of step S9203 in the main CPU 63); a function that makes a negative determination in step S9101, a function that executes the process of step S9308 in the main CPU 63, and a function that makes a negative determination in step S9101),
Equipped with
The predetermined display control means is a means for displaying the current setting value on the predetermined display means after the check display is finished in the setting possible condition (executes the processing of step S9004 and step S9006 in the main CPU 63). The gaming machine according to feature d7, characterized in that the gaming machine is equipped with a function of:

According to feature d8, the check display is started on the specified display means before the current setting value is displayed on the specified display means, so that after checking whether the specified display means is normal, it is possible to check the current setting value using the specified display means. This makes it possible to accurately check the setting value. Also, when the check display is being displayed, if the setting becomes possible and the specified operating means is operated, the check display is ended and the current setting value is displayed. This makes it possible to end the check display and display the current setting value on the specified display means when the setting becomes possible, without waiting for the check display to end. This makes it possible to check the current setting value early.

Furthermore, in a configuration in which the setting values to be used are updated based on the operation of a predetermined operation means in a setting possible state, the check display is updated based on the operation of the predetermined operation means in a setting possible state. Since the check display is terminated and the current set values are displayed, no special operation is required to terminate the check display and display the current set values. Therefore, it is possible to improve the work efficiency of updating the setting values to be used.

Feature d9. The predetermined setting-related process includes means for executing a process for displaying the current setting value on the predetermined display means (a function for executing a setting confirmation process in the main CPU 63). The gaming machine according to any one of features d2 to d8.

According to feature d9, for the processing at the start of supply of operating power, it is possible to consolidate not only the processing for checking the current set value but also the processing for starting the check display on the predetermined display means. It becomes possible.

Feature d10. The predetermined display control means includes means for displaying information corresponding to the management results of the game history on the predetermined display means (a function of executing the processing of steps S8708, S8709, and S9107 in the main CPU 63). The gaming machine according to any one of features d1 to d9.

According to feature d10, it is possible to notify the manager of the gaming hall of the results of the gaming history management. In this case, by having the configuration of feature d1 and a check display being performed on the specified display means, it is possible to check whether the information corresponding to the results of the gaming history management is being displayed accurately on the specified display means.

In addition, for the configuration of features d1 to d10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

According to the invention related to the feature c group and the feature d group, the following problems can be solved.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entrance section provided in the gaming area, the gaming ball is paid out from a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known in pachinko gaming machines, in which the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, there is a need for a configuration that allows it to be confirmed whether or not the display on the predetermined display means is being performed accurately, and there is still room for improvement in this regard. be.

<Characteristic group e>
Feature e1. A history storage execution means (normal ball entry management processing in the main CPU 63) that stores game history information corresponding to a predetermined event when a game is executed in the history storage means (normal counter area 231). ) and
information deriving means (a function of executing the process of step S8601 in the main CPU 63) for deriving mode information (base value) corresponding to the result of the game using the history information stored in the history storage means;
aspect information storage means (calculation result storage area 234) for storing the aspect information derived by the information derivation means;
Equipped with
A gaming machine characterized in that the aspect information storage means is capable of storing a plurality of pieces of the aspect information derived at different timings by the information deriving means.

According to feature e1, when a predetermined event occurs, the corresponding history information is stored in the history storage means. By storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the history information stored in the history storage means is used to derive behavior information corresponding to the result of the game, and the derived behavior information is stored in the behavior information storage means. This makes it possible to store and hold information for managing the number of occurrences or occurrence frequency of a predetermined event in the gaming machine, and by using this managed information, it becomes possible to appropriately manage the occurrence frequency of the predetermined event. In addition, the behavior information storage means can store multiple behavior information derived at different times. This makes it possible to grasp the occurrence frequency of a predetermined event over multiple time periods, and therefore makes it possible to accurately grasp the occurrence frequency of the predetermined event.

Feature e2. The aspect information storage means is
A most recent storage area (current state area 311) for storing the most recent aspect information derived by the information derivation means;
A gaming machine as described in feature e1, characterized in that it is equipped with a past memory area (first to third history areas 312 to 314) that stores the status information derived by the information derivation means prior to the status information stored in the most recent memory area.

According to feature e2, since both the latest aspect information and the past aspect information derived before that are stored, not only the latest occurrence frequency of the predetermined event but also the past occurrence frequency can be grasped. becomes possible.

Feature e3. A period lapse determination means (a function for executing the processes of steps S8605 and S8613 in the main CPU 63) for determining that a predetermined period has passed from the occurrence of a period start trigger to the occurrence of a period end trigger;
A recent storage execution means (a function of executing the process of step S8602 in the main CPU 63) for storing the aspect information derived by the information derivation means in the recent storage area in a situation where the time lapse determination means has not determined that the predetermined time period has lapsed;
A past memory execution means (a function of executing the processes of steps S8607 and S8614 in the master CPU 63) for storing, in the past memory area, period-corresponding status information corresponding to the game results during the predetermined period derived by the information derivation means using the history information stored in the history storage means based on the determination by the period elapse determination means that the predetermined period has elapsed;
The gaming machine according to feature e2, characterized in that it is equipped with:

According to feature e3, aspect information derived in a situation where a predetermined period has not yet elapsed is stored in the latest storage area, and aspect information derived when the predetermined period has elapsed is stored in the past storage area. be done. This makes it possible to grasp the latest frequency of occurrence of a predetermined event, and also to grasp the frequency of occurrence of a predetermined event in the past in units of a predetermined period. Further, since the past storage area stores aspect information in units of a predetermined period, it is possible to suppress the number of aspect information stored in the past storage area.

Feature e4. The gaming machine described in feature e3 is characterized in that it is provided with a means for erasing the history information stored in the history storage means based on the time lapse determination means determining that the predetermined time period has lapsed (a function for executing the processing of steps S8608 and S8615 in the main CPU 63).

According to feature e4, since the history information in the history information storage means is erased when a predetermined period of time has elapsed, it is possible to suppress the required storage capacity in the history information storage means. Furthermore, even if the historical information is deleted after a predetermined period of time has elapsed, the mode information derived using the historical information during the predetermined period is stored in the past storage area, so the predetermined It becomes possible to later grasp the frequency of occurrence of a predetermined event during the period.

Feature e5. A gaming machine according to any one of features e2 to e4, characterized in that the past memory area is capable of storing a plurality of pieces of the behavior information derived at different times.

According to feature e5, multiple pieces of behavioral information are stored in the past memory area, making it possible to compare the occurrence frequency of a given event corresponding to multiple time periods.

Feature e6. A period lapse determination means (a function for executing the processes of steps S8605 and S8613 in the main CPU 63) for determining that a predetermined period has passed from the occurrence of a predetermined period start trigger to the occurrence of a predetermined period end trigger;
A past memory execution means (a function of executing the processes of steps S8607 and S8614 in the master CPU 63) for storing, in the mode information storage means, period-corresponding mode information corresponding to the game results during the predetermined period derived by the information derivation means using the history information stored in the history storage means, based on the determination by the period elapse determination means that the predetermined period has elapsed;
Equipped with
A gaming machine described in any one of features e1 to e5, characterized in that the mode information storage means is capable of storing a plurality of period-corresponding mode information corresponding to each of the different specified periods.

According to feature e6, multiple pieces of past behavior information derived in units of a specified period are stored, making it possible to compare the occurrence frequency of a specified event corresponding to multiple periods while suppressing the amount of behavior information stored in the behavior information storage means.

Feature e7. Means for erasing the history information stored in the history storage means (processing of steps S8608 and S8615 in the main CPU 63 The gaming machine according to feature e6, characterized in that the gaming machine is equipped with a function of executing the above function.

According to feature e7, since the history information in the history information storage means is erased when a predetermined period of time has elapsed, it is possible to reduce the storage capacity required in the history information storage means. Even if the history information is erased when a predetermined period of time has elapsed, the behavior information derived using the history information during the predetermined period of time is stored in the past storage area, so it is possible to grasp later the frequency of occurrence of a predetermined event during the predetermined period of time.

Feature e8. A gaming machine according to any one of features e1 to e7, characterized in that it is provided with a means for controlling the notification means (the first to fourth notification display devices 201 to 204) so that notifications corresponding to each of the plurality of pieces of status information stored in the status information storage means are sequentially executed (a function for executing the processing of steps S8702 to S8709 in the main CPU 63).

According to feature e8, notification corresponding to the mode information is performed by the notification means. This makes it possible to grasp the frequency of occurrence of the predetermined event. Moreover, since notifications corresponding to each of the plurality of aspect information are performed sequentially, it is possible to individually grasp the frequency of occurrence of a predetermined event in a plurality of periods while suppressing the number of notification means.

Feature e9. The aspect information storage means includes a first storage area (first history area 312) capable of storing the aspect information and a second storage area (second history area 313) capable of storing the aspect information. ) and,
This gaming machine has means (step S8607 in the main CPU 63) for shifting the aspect information stored in the first storage area to the second storage area by an instruction including at least an LDIR instruction when an information shift opportunity occurs. and a function of executing the process of step S8614).

According to feature e9, it becomes possible to shift aspect information between storage areas with a simple processing configuration.

Note that for the configuration of features e1 to e9, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the feature e group described above, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, gaming machines such as those exemplified above need to be properly managed, and there is still room for improvement in this regard.

<Feature f group>
Feature f1. Means for executing processing at the start of supply of operating power based on the start of supply of operating power (in the 35th embodiment, a function for executing the processing of steps S8801 to S8819 in the main CPU 63, In the embodiment, a function of executing the processing of steps S9401 to S9420 in the main CPU 63);
A power outage monitoring means (a function of executing the process of step S8901 in the main CPU 63 )and,
A gaming machine characterized by comprising:

According to feature f1, the power outage monitoring process is executed even when the process at the start of the supply of operating power is being executed, so that if a power outage occurs while the process at the start of the supply of operating power is being executed, it becomes possible to respond appropriately.

Feature f2. A means for executing periodically activated interrupt processing (a function for executing the first timer interrupt processing in the main CPU 63),
The interrupt processing includes the power outage monitoring processing,
The gaming machine according to feature f1, wherein the interrupt processing can be started by interrupting in a situation where the processing at the time of starting the supply of operating power is being executed.

According to feature f2, even when the process at the start of supply of operating power is being executed, the interrupt process is periodically interrupted and activated, so that the process at the start of supply of operating power is executed. It becomes possible to periodically monitor the occurrence of power outages even under the current situation.

Feature f3. The gaming machine described in feature f2, characterized in that the interrupt process can be started by interrupting even in a situation where post-termination process (steps S8822 to S8825 in the main CPU 63) is being executed after the process at the start of the supply of operating power has ended.

According to feature f3, the occurrence of a power outage can be regularly monitored in a situation where the process at the start of supply of operating power is being executed, by using an interrupt process that can be interrupted and started in a situation where the post-completion process is being executed. This makes it possible to do so.

Feature f4. The interrupt process includes a progress corresponding process (steps S8907 to S8920 in the main CPU 63) executed to control the progress of the game,
If the interrupt process is interrupted and activated in a situation where the process at the start of supply of operating power is being executed, the power failure monitoring process is executed, but the progress response process is not executed,
According to feature f3, when the interrupt process interrupts and is started in a situation where the post-termination process is being executed, both the power outage monitoring process and the progress response process can be executed. gaming machines.

According to feature f4, in a configuration in which the occurrence of a power outage is periodically monitored when processing at the start of the supply of operating power is being executed by using an interrupt process that can be started in an interrupt state when post-termination processing is being executed, it is possible to prevent the execution of progress response processing for controlling the progress of the game even if the interrupt process is started in an interrupt state when processing at the start of the supply of operating power is being executed.

Feature f5. Equipped with a setting means (a function for executing a setting value update process in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
A gaming machine described in any one of features f1 to f4, characterized in that when processing is being executed at the start of the supply of operating power, a configurable situation can be entered in which the setting value to be used can be changed.

According to feature f5, the power outage monitoring process is executed even when the setting value to be used is being set, so that even if a power outage occurs while the setting value to be used is being set, it is possible to respond appropriately.

Feature f6. If the supply of operating power is stopped after the occurrence of a power outage is identified in the power outage monitoring process, if the supply of operating power is restarted, the device that is set as a target for use before the supply of operating power is stopped. The gaming machine according to feature f5, characterized in that it is possible to play the game with the set values unchanged.

According to feature f6, even if a power outage occurs in a situation where setting values to be used are being set, the power outage monitoring process identifies the occurrence of a power outage, so the supply of operating power is resumed. In this case, it becomes possible to play the game in a situation where the setting values that were selected at the time of the power outage are used. As a result, even if a power outage occurs while the setting values to be used are being set, there is no need to set the setting values again when the supply of operating power is resumed.

Note that for the configuration of features f1 to f6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the above characteristic group f, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters a ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are ejected. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, gaming machines such as those exemplified above need to deal appropriately with power outages, and there is still room for improvement in this regard.

<Characteristic group g>
Feature g1. A setting corresponding storage area (in the 39th embodiment, the first to sixth setting information storage areas A setting corresponding storage means (setting corresponding storage area 325 in the 39th embodiment) having a first predetermined number of areas 325a to 325f, first to third setting information storage areas 326a to 326c in the fortieth embodiment); In the 40th embodiment, a settings corresponding storage area 326);
A setting means for setting setting values to be used (a function for executing setting value update processing in the main CPU 63);
profit-related means that executes profit-related processing (step S504) related to the player's profit using the setting correspondence information stored in the setting correspondence storage area corresponding to the setting value set by the setting means; (Function to execute special figure fluctuation start processing in the main CPU 63),
Equipped with
A gaming machine characterized in that the number of types of the setting values that can be set by the setting means is smaller than the first predetermined number.

According to feature g1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, in a configuration in which a first predetermined number of setting corresponding storage areas are provided for storing setting corresponding information corresponding to setting values, the number of types of setting values to be used is greater than the first predetermined number. The number is small. As a result, it becomes possible to share the configuration of the setting correspondence storage means with a gaming machine that uses the first predetermined number of types of setting values, so that when changing the number of types of setting values, the gaming machine It becomes possible to perform design work easily. From the above, it is possible to make the configuration regarding setting values suitable.

Feature g2. A correspondence information storage unit (a setting value counter in the work area 221 for specific control) capable of storing and holding correspondence information corresponding to each of the first predetermined number of setting correspondence storage areas is provided;
the setting means sets the setting value to be used by changing the corresponding information stored and held in the corresponding information storage means based on a change operation;
The gaming machine described in feature g1 is configured such that setting correspondence information for the setting values that can be set by the setting means is stored in at least one of the setting correspondence memory areas, and the same setting correspondence information is stored in a plurality of the setting correspondence memory areas that are a part of the first predetermined number, thereby causing the setting correspondence information to be stored in all of the first predetermined number of setting correspondence memory areas.

According to feature g2, the setting value to be used is changed by changing the correspondence information stored and held in the correspondence information storage means based on the change operation, and the setting correspondence storage area corresponding to the changed correspondence information is changed. By using the setting correspondence information in the profit-related process, the profit-related process will be executed in a manner corresponding to the setting value to be used. In this case, the setting correspondence information of the setting value that can be set by the setting means is stored in at least one setting correspondence storage area, and is part of the first predetermined number and is a part of the plurality of setting correspondence storage areas. Since the same setting correspondence information is stored in the areas, the setting correspondence information is stored in all of the first predetermined number of setting correspondence storage areas. As a result, the first predetermined number of settings corresponding storage areas can be used as is, and the configuration for determining the settings to be used using the correspondence information storage means can be used as is, while the number of types of settings to be used can be increased. can be made smaller than the first predetermined number.

Feature g3. The profit-related means are:
means for reading out the setting correspondence information from the setting correspondence storage area corresponding to the correspondence information stored and held in the correspondence information storage means (a function for executing readout processing of the validity table in the main CPU 63);
means for executing the profit-related process using the read setting correspondence information (a function for executing the process of step S504 in the main CPU 63);
The gaming machine according to feature g2, comprising:

According to feature g3, even if the number of types of setting values to be used is less than the first predetermined number, the profit-related processing can be executed using the setting correspondence information read from the setting correspondence storage area corresponding to the correspondence information stored and held in the correspondence information storage means, so that the configuration for reading the setting correspondence information when executing the profit-related processing can be used as is.

Feature g4. Predetermined display control for causing a predetermined display means (fourth notification display device 204) to display a display corresponding to the current setting value in a situation where the correspondence information stored and held in the correspondence information storage means can be changed; means (a function for executing the processing of steps S9801 to S9804 in the main CPU 63),
The predetermined display control means is
Means for reading display information of setting values corresponding to the setting correspondence information stored in the setting correspondence storage area corresponding to the correspondence information of the correspondence information storage means (processing of steps S9801 to S9803 in the main CPU 63) function) and
means for causing the predetermined display means to display a display corresponding to the display information of the read setting values (a function for executing the process of step S9804 in the main CPU 63);
The gaming machine according to feature g2 or g3, characterized by comprising:

According to feature g4, when changing the setting value to be used, it is possible to change the setting value while checking the display corresponding to the current setting value displayed on the specified display means. In this case, even if the number of types of setting values to be used is less than the first specified number, the configuration is such that display information of the setting value corresponding to the setting correspondence information in the setting correspondence storage area corresponding to the correspondence information in the correspondence information storage means is read, and a display corresponding to the read display information of the setting value is performed on the specified display means. This makes it possible to directly use the configuration that reads the display information of the setting value when executing the display corresponding to the setting value.

Feature g5. The number of types of the set values that can be set by the setting means is a divisor of the first predetermined number and is different from the first predetermined number;
A gaming machine as described in feature g4, characterized in that the number of setting corresponding memory areas in which the setting corresponding information corresponding to each setting value is stored is the same for each setting value.

According to feature g5, even if the number of types of setting values to be used is smaller than the first predetermined number, the frequency at which the display corresponding to the setting value is displayed on the predetermined display means is limited. It is possible to make each setting value the same.

Feature g6. The gaming machine described in feature g4 or g5, characterized in that the setting correspondence memory area corresponding to the correspondence information in successive order in the change order of the correspondence information stored and held in the correspondence information storage means does not store the setting correspondence information corresponding to the same setting value.

According to feature g6, it is possible to change the setting value to be displayed on the specified display means each time a change operation is performed. This makes it possible to improve the operability of the change operation even if the number of types of setting values to be used is less than the first specified number.

In addition, for the configuration of features g1 to g6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

According to the invention related to the above characteristic group g, it is possible to solve the following problems.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to have an optimal configuration for the setting values that determine the advantageous degree of the gaming machine, and there is still room for improvement in this regard.

<Feature group h>
Feature h1. Display means (special map display unit 37a, special map reserve display unit 37b, ordinary map display unit 38a, ordinary map reserve display unit 38b, first to fourth notification display devices 201 to 204, first to fifth display circuits 261 to 265),
A display control means (main CPU 63) for transmitting display data (display data signal, display clock signal) corresponding to the display content to be displayed on the display means;
a display execution means (display IC 266) for performing display settings on the display means so that the display contents correspond to the display data when the display control means transmits the display data;
In a gaming machine equipped with
A plurality of the display means are provided,
The display control means includes a sequential transmission means (a function of executing a second timer interrupt process in the main CPU 63) for sequentially transmitting the display data corresponding to each of the plurality of display means to the display execution means,
the display execution means, when the display data is transmitted by the display control means, performs the display setting on one of the plurality of display means to which the display data is to be set, so that display content corresponding to the display data is displayed;
A gaming machine characterized in that the transmission interval of the display data from the sequential transmission means to the display execution means is a transmission interval that allows the display setting by the display execution means to be performed on each display means before it becomes impossible to maintain the display corresponding to the display data on each display means.

According to feature h1, the display execution means performs display settings for the display means according to the display data transmitted from the display control means, and the display means is controlled to display content corresponding to the display data. This makes it possible to reduce the processing load of the display control means. In this case, in a configuration in which a plurality of display means are provided, a display execution means is not provided in one-to-one correspondence with the plurality of display means, but one display execution means is shared for the plurality of display means. This makes it possible to increase the number of display means while suppressing an increase in the number of display execution means. In addition, the transmission interval of the display data from the display control means to the display execution means is set to a transmission interval at which the display execution means performs display settings for each display means before each display means is no longer able to maintain a display corresponding to the display data. This makes it possible to appropriately perform a display corresponding to the display data on each display means, even in a configuration in which one display execution means is shared for a plurality of display means. As described above, it is possible to make the configuration for display control of the display means preferable.

Feature h2. When transmitting the display data to the display execution means, the sequential transmission means transmits identifying information (type data signal, type clock signal) that enables identification of the type of the display means to which the display data is set. The gaming machine according to feature h1, characterized in that the information is transmitted to the display execution means.

According to feature h2, when display data is transmitted from the display control means, the display execution means may set the display data to the display means corresponding to the specifiable information transmitted from the display control means. This makes it possible to simplify the configuration of the display execution means even if one display execution means is used for a plurality of display means.

Feature h3. The sequential transmission means transmits the data so that when one update cycle is such that a plurality of the display units are subject to setting of the display data once in a predetermined order, the update cycle is repeated. The gaming machine according to feature h1 or h2, characterized in that the gaming machine transmits display data.

According to feature h3, since the display control means only needs to change the display means to which display data is to be transmitted in accordance with a predetermined order, it is possible to simplify the processing configuration of the display control means.

Feature h4. The sequential transmission means is configured to transmit data to one of the display means, even if the content of the display data for one of the display means is the same as the content of the display data when the display data was previously transmitted with the display means as the transmission target. The gaming machine according to any one of features h1 to h3, wherein the gaming machine transmits the display data when the game machine becomes a game machine.

According to feature h4, even if the content of the display data to be transmitted has not been changed, the display data is transmitted. Therefore, even in a configuration in which one display execution means is shared for multiple display means, it is possible to continue the same display on a specified display means.

Feature h5. The sequential transmission means executes a process for transmitting the display data in a predetermined interrupt process (second timer interrupt process) that is activated by interrupting a situation in which a predetermined process is being executed in the display control unit. The gaming machine according to any one of features h1 to h4.

According to feature h5, since the process for transmitting display data is executed in the predetermined interrupt process, it is possible to set the display data to each display means at a predetermined cycle. Therefore, even in a configuration in which one display execution means is used for multiple display means, before it becomes impossible to maintain the display corresponding to the display data on each display means, the It becomes possible to set the display data by the display execution means.

Feature h6. The gaming machine described in Feature h5, characterized in that the process for transmitting the display data by the display execution means to the multiple display means that are the targets of the display setting is integrated into the predetermined interrupt process.

According to feature h6, it is possible to set the display data to each display means to be set by the display execution means at the same cycle.

Feature h7: The display control means includes a means for interrupting and starting a specific interrupt process (first timer interrupt process) in a situation where the predetermined process is being executed (a function for executing the first timer interrupt process in the main CPU 63);
The gaming machine according to feature h5 or h6, wherein the interrupt period of the predetermined interrupt process is shorter than the interrupt period of the specific interrupt process.

According to feature h7, a process is executed in which display data is transmitted to the display execution means in a predetermined interrupt process that has a cycle shorter than the interrupt cycle of the specific interrupt process. This makes it possible to transmit display data in a cycle shorter than that of a configuration in which a process is executed in which display data is transmitted to the display execution means in a specific interrupt process.

Feature h8. The gaming machine described in feature h7, characterized in that a process for progressing the game is executed in the specific interrupt process.

According to feature h8, it is possible to achieve the excellent effects already described while activating the specific interrupt process at an appropriate cycle to execute the process for advancing the game.

Feature h9. The gaming machine according to feature h7 or h8, wherein the predetermined interrupt process is started by interrupting even when the specific interrupt process is being executed.

According to feature h9, the predetermined interrupt process is activated by interrupting even when the specific interrupt process is being executed, so even if the specific interrupt process is configured to be activated by interrupting, the display data transmission cycle cannot be changed. It becomes possible to set the period to a predetermined period.

Feature h10. Features h7 to h9 characterized in that when the predetermined interrupt processing is started, the interruption of the specific interrupt processing is prohibited, and when the predetermined interrupt processing is ended, the interruption of the specific interrupt processing is permitted. The gaming machine according to any one of the above.

Feature h10 makes it possible to prevent a specific interrupt process from being executed in an interrupt situation where a specific interrupt process is being executed. This makes it possible to give priority to the process for transmitting display data.

Feature h11. The display control means is provided with a means for executing processing at the start of supply of operating power when the supply of operating power is started (a function for executing processing of steps S7901 to S7918 in the main CPU 63 in the 33rd embodiment, a function for executing processing of steps S8801 to S8819 in the main CPU 63 in the 35th embodiment, a function for executing processing of steps S9401 to S9420 in the main CPU 63 in the 37th embodiment, a function for executing processing of steps S9501 to S9518 in the main CPU 63 in the 42nd embodiment, and a function for executing processing of steps S9901 to S9917 in the main CPU 63),
A gaming machine described in any one of features h5 to h10, characterized in that the specified interrupt processing is started by interrupting even when processing is being executed at the start of the supply of operating power.

According to feature h11, it is possible to control the display of a plurality of display means even in a situation where processing at the start of supply of operating power is being executed. In addition, since the configuration is such that a predetermined interrupt process is activated by interrupting the process at the start of the supply of operating power, it is possible to supply the operating power without complicating the processing configuration for the process at the start of the supply of operating power. It becomes possible to control the display of a plurality of display means in a situation where the processing at the time of starting is being executed.

Feature h12. Equipped with a setting means (a function for executing a setting value update process in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
A configuration in which a setting value to be used can be changed in a state in which a process at the start of the supply of the operating power is being executed,
The gaming machine described in feature h11, wherein the sequential transmission means transmits the display data to the display execution means so that a display corresponding to the current setting value is displayed on a specified display means in the settable situation.

According to feature h12, when the setting value to be used is being set, the current setting value is displayed on a specified display means, making it easier to set the setting value to be used.

Feature h13. The display control means includes a means for executing a progress response process to control the progress of a game after the process at the start of the supply of the operating power is completed (a function for executing a first timer interrupt process in the main CPU 63);
the sequential transmission means transmits to the display execution means the display data for causing a corresponding display corresponding to a result of the execution of the progress corresponding process to be performed on at least a part of the plurality of display means,
The gaming machine according to feature h11 or h12, wherein the predetermined interrupt process is started by interrupting even after the process at the start of the supply of operating power has ended.

According to feature h13, by utilizing a specified interrupt process, it becomes possible to control the display of multiple display means both in a situation where the process at the start of the supply of operating power is being executed and in a situation after the process at the start of the supply of operating power has ended.

In addition, for the configuration of features h1 to h13, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Feature i group>
Feature i1. A first interrupt execution means (first timer interrupt processing in the main CPU 63 ) and
A second interrupt execution means (second timer interrupt processing in the main CPU 63 ) and
Equipped with
The second interrupt cycle is a shorter cycle than the first interrupt cycle,
For controlling the display of predetermined display means (special figure display section 37a, special figure reservation display section 37b, general figure display section 38a, ordinary figure reservation display section 38b, first to fourth notification display devices 201 to 204) A gaming machine characterized in that processing is executed in the second interrupt processing.

According to feature i1, a process for controlling the display of a predetermined display means is executed in a predetermined interrupt process having a cycle shorter than the interrupt cycle of the specific interrupt process. This makes it possible to control the display of the predetermined display means in a shorter period than in a configuration in which the process for controlling the display of the predetermined display means is executed by specific interrupt processing.

Feature i2. The gaming machine according to feature i1, wherein processing for advancing the game is executed in the first interrupt processing.

Feature i2 makes it possible to achieve the excellent effects already described while allowing the first interrupt process to be started at an appropriate period for executing the process for progressing the game.

Feature i3. The gaming machine according to feature i1 or i2, wherein the second interrupt process is started by interrupting even when the first interrupt process is being executed.

According to feature i3, the second interrupt process is activated by interrupting even when the first interrupt process is being executed, so even if the configuration is such that the first interrupt process is activated by interrupting, the predetermined display is It becomes possible to perform display control of the means at a predetermined period.

Feature i4. A feature characterized in that when the second interrupt processing is started, the interruption of the first interrupt processing is prohibited, and when the second interrupt processing is ended, the interruption of the first interrupt processing is permitted. The gaming machine according to any one of i1 to i3.

Feature i4 makes it possible to prevent the first interrupt process from being executed in a situation where the second interrupt process is being executed. This makes it possible to give priority to the display control of a specified display means.

Feature i5. A means for executing processing at the time of starting supply of operating power when supply of operating power is started (a function for executing main processing in the main CPU 63);
The gaming machine according to any one of features i1 to i4, wherein the second interrupt process is started by interrupting even when the process at the time of starting supply of operating power is being executed.

According to feature i5, it is possible to control the display of the predetermined display means even in a situation where processing at the start of supply of operating power is being executed. In addition, since the configuration is such that the second interrupt process interrupts and starts the process when the supply of operating power starts, it is possible to reduce the amount of operating power without complicating the processing configuration of the process when the supply of operating power starts. It becomes possible to control the display of the predetermined display means in a situation where the process at the start of supply is being executed.

Feature i6. Equipped with a setting means (a function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level,
In a situation where the process at the time of starting the supply of operating power is being executed, the configuration can be a setting enable situation in which the setting value to be used can be changed,
The second interrupt execution means is characterized in that the second interrupt processing executes processing for causing the predetermined display means to display a display corresponding to the current setting value in the setting possible situation. The gaming machine according to feature i5.

According to feature i6, since the current setting value is displayed on the predetermined display means in a situation where the setting value to be used is being set, it becomes easier to perform the work of setting the setting value to be used. .

Feature i7. The gaming machine according to feature i5 or i6, wherein the second interrupt execution means executes the second interrupt processing based on the elapse of the second interrupt period even after the processing at the start of the supply of the operating power has ended.

According to feature i7, by using the predetermined interrupt processing, the predetermined interrupt processing can be performed both in a situation where the processing at the start of supply of operating power is being executed and in a situation after the processing at the start of supply of operating power is completed. It becomes possible to control the display of the display means.

In addition, for the configuration of features i1 to i7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

According to the invention related to the feature h group and the feature i group, the following problems can be solved.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores game balls given to a player, and the game balls stored in the tray storage section are guided to a game ball launching device and launched toward the game area in response to the player's launch operation. Then, for example, when a game ball enters a ball entry section provided in the game area, the game ball is paid out from a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known in pachinko machines, and in this case, the game balls stored in the upper tray storage section are guided to the game ball launching device, and the game balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to provide a suitable configuration for displaying information on the display means, and there is still room for improvement in this regard.

<Characteristic group J>
Feature j1. Means for executing processing at the start of supply of operating power based on the start of supply of operating power (in the 33rd embodiment, a function for executing the processing of steps S7901 to S7918 in the main CPU 63, In the embodiment, the main CPU 63 has a function of executing steps S8801 to S8819, in the 36th embodiment, the main CPU 63 has a function of executing steps S9401 to S9420, and in the 37th embodiment, the main CPU 63 (in the 42nd embodiment, a function to execute the processes of steps S9901 to S9917 in the main CPU 63);
Predetermined interrupt execution means that interrupts the process at the start of supply of operating power and executes a predetermined interrupt process (a function to execute the first timer interrupt process in the main CPU 63, a function to execute the second timer interrupt process in the main CPU 63) )and,
A gaming machine characterized by comprising:

According to feature j1, the predetermined interrupt process is interrupted and activated even when the process at the start of the supply of operating power is being executed, so even if the process is started immediately after the supply of operating power starts, the predetermined interrupt process can be set as the predetermined interrupt process. It becomes possible to give priority to the execution of the processing that is currently being performed. In addition, since there is no need to set a process that is set as a predetermined interrupt process for the process at the start of the supply of operating power, it is possible to operate without complicating the processing configuration for the process at the start of the supply of operating power. Even immediately after the start of power supply, it is possible to give priority to the execution of the process set as the predetermined interrupt process. As described above, it is possible to suitably perform processing when the supply of operating power is started.

Feature j2. The predetermined interrupt execution means includes predetermined display means (special figure display section 37a, special figure reservation display section 37b, regular figure display section 38a, ordinary figure reservation display section 38b, first to fourth notification display devices 201 to 204). ) is executed in the predetermined interrupt process.

Feature j2 makes it possible to display a specified display on a specified display means even immediately after the supply of operating power begins.

Feature j3. Equipped with a setting means (a function for executing a setting value update process in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
A configuration in which a setting value to be used can be changed in a state in which a process at the start of the supply of the operating power is being executed,
The gaming machine described in feature j1 or j2 is characterized in that the specified interrupt execution means executes processing by the specified interrupt processing so that a display corresponding to the current setting value is displayed on a specified display means (fourth notification display device 204) in the settable situation.

According to feature j3, since the current setting value is displayed on the predetermined display means in a situation where the setting value to be used is being set, it becomes easier to perform the work of setting the setting value to be used. .

Feature j4. The gaming machine according to any one of features j1 to j3, characterized in that the predetermined interrupt execution means executes the predetermined interrupt processing based on the lapse of a predetermined interrupt period even after the processing at the start of the supply of the operating power has ended.

According to feature j4, by using a specified interrupt process, it is possible to execute a process set as a specified interrupt process both in a situation where the process at the start of the supply of operating power is being executed and in a situation after the process at the start of the supply of operating power has ended.

Features j5. The gaming machine according to any one of features j1 to j4, wherein the predetermined interrupt execution means executes a power outage monitoring process (step S8901) for monitoring the occurrence of a power outage in the predetermined interrupt process.

According to feature j5, the power outage monitoring process is executed even in a situation where the process at the start of the supply of operating power is being executed, so that a power outage occurs in a situation where the process at the start of the supply of operating power is being executed. This makes it possible to appropriately deal with it when it occurs.

Feature j6. The predetermined interrupt process includes a progress response process (steps S8907 to S8920 in the master CPU 63) that is executed to control the progress of the game,
When the predetermined interrupt process is started by interrupting in a situation where the process at the start of the supply of the operating power is being executed, the power outage monitoring process is executed, but the progress response process is not executed,
The gaming machine described in feature j5 is characterized in that when the specified interrupt process is started in an interrupt manner while the post-termination process (steps S8822 to S8825 in the main CPU 63) is being executed after the process at the start of the supply of operating power has been completed, both the power outage monitoring process and the progress response process can be executed.

According to feature j6, in a configuration in which a predetermined interrupt process that can be started in an interrupt state while post-termination processing is being executed is used to periodically monitor for the occurrence of a power outage while processing at the start of the supply of operating power is being executed, it is possible to prevent the execution of progress response processing for controlling the progress of the game even if the predetermined interrupt process is started in an interrupt state while processing at the start of the supply of operating power is being executed.

In addition, for the configuration of features j1 to j6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

According to the invention related to the above feature j group, it is possible to solve the following problems.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, processing needs to be carried out appropriately when the supply of operating power begins, and there is still room for improvement in this regard.

<Characteristic k group>
Feature k1. History storage execution means (normal ball entry management processing in the main side CPU 63) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (normal counter area 231) ) and
information deriving means (a function of executing the process of step SA201 in the main CPU 63) for deriving mode information (base value) corresponding to the result of the game using the history information stored in the history storage means;
Mode information display control means (main CPU 63 function for executing display processing and second timer interrupt processing);
A predetermined response display that causes a predetermined response display (pre-shift display) to be performed on the information display means before a new display corresponding to the mode information is started based on the occurrence of a predetermined display trigger. a control means (a function of executing the process of step SA320 and the second timer interrupt process in the main CPU 63);
A gaming machine characterized by comprising:

According to feature k1, when a predetermined event occurs, history information corresponding to the event is stored in the history storage means. By storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the history information stored in the history storage means is used to derive mode information corresponding to the game result, and a display corresponding to the derived mode information is performed by the information display means. This makes it possible to grasp the results of management of the game history, such as the frequency of occurrence of a predetermined event. In addition, a predetermined corresponding display is performed by the information display means before a new display corresponding to the mode information is started based on the occurrence of a predetermined display trigger. This makes it possible, when a predetermined display trigger occurs, to cause the information display means to perform a corresponding predetermined corresponding display in priority over a display corresponding to the mode information, and to notify the occurrence of the predetermined display trigger using the information display means.

Feature k2. Equipped with a period lapse determination means (a function for executing the process of step SA210 in the main CPU 63) for determining that a predetermined period has passed from the occurrence of a predetermined period start trigger to the occurrence of a predetermined period end trigger;
The gaming machine described in feature k1 is characterized in that the specified corresponding display control means determines that the specified display trigger has occurred when the period elapsed determination means determines that the specified period has elapsed, and causes the specified corresponding display to be displayed on the information display means.

According to feature k2, when a predetermined period of time has elapsed, a predetermined corresponding display is made on the information display means, and then a new display corresponding to the mode information is started on the information display means. This makes it possible for the manager of the amusement hall to recognize that the mode information displayed on the information display means is from after the predetermined period of time has elapsed.

Feature k3: The information deriving means derives the behavior information by using the history information corresponding to the predetermined event that occurred after the predetermined period, based on the fact that the predetermined period has elapsed being identified by the period elapse identifying means,
The gaming machine described in feature k2, characterized in that the specified corresponding display control means, based on the period elapsed determination means determining that the specified period has elapsed, causes the specified corresponding display to be displayed on the information display means before the information display means displays the information corresponding to the behavior information derived by the information derivation means using the historical information corresponding to the specified event that occurred after the specified period.

According to feature k3, in a configuration in which new derivation of behavior information is performed based on the passage of a predetermined period of time, when the predetermined period of time has elapsed, a predetermined corresponding display is performed on the information display means, and then a display corresponding to the newly derived behavior information is performed after the passage of the predetermined period of time. This enables the manager of the game hall to know whether the display corresponding to the behavior information on the information display means is a display corresponding to the newly derived behavior information after the passage of the predetermined period of time.

Feature k4. Means for erasing the history information stored in the history storage means based on the fact that the predetermined period has passed by the period elapse specifying means (executing the process of step SA217 in the main CPU 63) The gaming machine according to feature k3, characterized in that the gaming machine is equipped with the following function.

According to feature k4, the history information in the history information storage means is erased when a predetermined period of time has elapsed, making it possible to reduce the storage capacity required in the history information storage means.

Feature k5. A storage execution means (a function for executing the processes of steps SA203 and SA216 in the master CPU 63) is provided for storing the status information corresponding to the game results during the predetermined period derived by the information derivation means using the history information stored in the history storage means as period-corresponding status information in the status information storage means (the calculation result storage area 234) based on the fact that the predetermined period has elapsed by the period elapse determination means;
the behavior information display control means controls display of the information display means so that a display corresponding to the period-corresponding behavior information stored in the behavior information storage means is performed,
The gaming machine described in any one of features k2 to k4, characterized in that the predetermined corresponding display control means, based on the period elapsed determination means determining that the predetermined period has elapsed, causes the predetermined corresponding display to be displayed on the information display means before a display corresponding to the period-corresponding mode information newly stored in the mode information storage means by the memory execution means is displayed on the information display means.

According to feature k5, past behavior information derived in units of a predetermined period is stored as period-corresponding behavior information, and a display corresponding to the period-corresponding behavior information is performed by the information display means. This allows the manager of the amusement hall to understand the past period-corresponding behavior information derived in units of a predetermined period by checking the information display means. Furthermore, when a predetermined period has elapsed, after the information display means has performed a predetermined corresponding display, a display corresponding to the period-corresponding behavior information newly derived due to the elapse of the predetermined period is performed. This allows the manager of the amusement hall to understand whether the display corresponding to the period-corresponding behavior information on the information display means corresponds to the period-corresponding behavior information newly derived based on the elapse of the predetermined period.

Feature k6: The mode information storage means is capable of storing a plurality of the period-corresponding mode information corresponding to each of the different predetermined periods;
The gaming machine described in feature k5, wherein the mode information display control means controls the display of the information display means so that a display corresponding to each of the multiple period-corresponding mode information stored in the mode information storage means is performed.

According to feature k6, a plurality of pieces of past period-corresponding form information derived in units of a predetermined period are stored, and a display corresponding to the plurality of period-corresponding form information is performed on the information display means. It becomes possible to compare the frequency of occurrence of a predetermined event corresponding to a predetermined period.

Feature k7. In a situation where a display corresponding to the mode information is being performed, the information display means is set to a pre-switching state (interval non-display state) before displaying a display corresponding to the mode information different from the mode information. The gaming machine according to any one of features k1 to k6, characterized in that the gaming machine is equipped with means for executing the processing of step SA316 and the second timer interrupt processing in the main CPU 63.

According to feature k7, when the mode information to be displayed is switched, the information display means returns to the pre-switching state, allowing the manager of the amusement hall to clearly understand that the mode information to be displayed has been switched. In this case, the configuration of feature k1 is provided, and a predetermined corresponding display is performed on the information display means based on the occurrence of a predetermined display trigger. This makes it possible to notify the occurrence of a predetermined display trigger by using the information display means that displays corresponding to different mode information with the pre-switching state in between.

Feature k8. The gaming machine according to any one of features k1 to k7, wherein the predetermined corresponding display control means, when the predetermined display trigger occurs, starts the predetermined corresponding display on the information display means even if the display duration period of the display corresponding to the mode information has not elapsed.

According to feature k8, when a predetermined display trigger occurs, a predetermined corresponding display is started even if the display corresponding to the aspect information is in the middle of being displayed. This makes it possible to notify the user early that a predetermined display trigger has occurred.

Feature k9. When the predetermined display trigger occurs during the display duration period of the display corresponding to the aspect information, the predetermined corresponding display control means controls the predetermined corresponding display to the information display unit after the display duration period has elapsed. The gaming machine according to any one of features k1 to k7, characterized in that the gaming machine is started with

According to feature k9, even if a predetermined display trigger occurs, the predetermined corresponding display starts after the display corresponding to the aspect information being displayed at that time is completed. This makes it possible to notify the user that a predetermined display trigger has occurred without interfering with the display corresponding to the aspect information that is already being displayed.

Feature k10. comprising mode information storage means (calculation result storage area 234) for storing the mode information derived by the information derivation means,
The aspect information storage means has a plurality of specific storage areas (current area 311, first history area 312) so as to be able to store each of the plurality of aspect information derived at different timings by the information derivation means. , a second history area 313, and a third history area 314),
The aspect information display control means controls the information display means so that displays corresponding to each of the plurality of aspect information stored in the plurality of specific storage areas are sequentially executed according to a predetermined display order. The gaming machine according to any one of features k1 to k9.

According to feature k10, since notifications corresponding to each of a plurality of aspect information are executed sequentially, it is possible to individually grasp the frequency of occurrence of a predetermined event in a plurality of periods while suppressing the number of information display means. becomes. In addition, since the displays corresponding to each of the plurality of mode information stored in the plurality of specific storage areas are sequentially executed according to the predetermined display order, the administrator of the game hall can grasp the type of mode information to be displayed. It becomes easier to do.

Feature k11. The gaming machine described in feature k10, characterized in that a predetermined display order is determined in association with the plurality of specific memory areas.

According to feature k11, a predetermined display order for displaying the aspect information is determined in association with a plurality of specific storage areas, so that when starting a new display corresponding to one aspect information, it is possible to simplify the processing configuration for identifying the type of aspect information to be displayed.

Feature k12. When causing the information display means to display a display corresponding to the mode information after the predetermined correspondence display has been performed by the information display means, the mode information display control means may display information in the first order in the predetermined display order. The gaming machine according to feature k10 or k11, characterized in that the game machine starts from a display corresponding to the corresponding aspect information.

According to feature k12, after the predetermined corresponding display is performed based on the occurrence of a predetermined display trigger, the display starts from the display corresponding to the aspect corresponding to the first order in the predetermined display order. Thereby, when a predetermined display trigger occurs, it becomes possible to confirm the display corresponding to the mode information again from the first order of the predetermined display order.

Feature k13. A period lapse determination means (a function for executing the process of step SA210 in the main CPU 63) for determining that a predetermined period has elapsed from the occurrence of a predetermined period start trigger to the occurrence of a predetermined period end trigger;
a storage execution means (a function of executing the processes of steps SA203 and SA216 in the master CPU 63) for storing, in the plurality of specific storage areas, the behavior information corresponding to the game results during the predetermined period derived by the information derivation means using the history information stored in the history storage means, based on the determination by the period elapse determination means that the predetermined period has elapsed;
Equipped with
The gaming machine described in any one of features k10 to k12, characterized in that the storage execution means causes the period correspondence pattern information to be stored in the multiple specific storage areas in accordance with the order derived by the information derivation means.

Feature k13 makes it possible to check the period correspondence information in the order in which it was derived.

Feature k14. The information derivation means executes an information derivation process for deriving the aspect information based on the occurrence of a processing execution opportunity, and starts deriving the aspect information and then starts deriving the aspect information. The gaming machine according to any one of features k1 to k13, characterized in that the information derivation process is executed a plurality of times until the information derivation process is completed.

According to feature k14, the information derivation process is executed multiple times from when the derivation of the behavior information is started until the derivation of the behavior information is completed, so that it is possible to reduce the processing load for executing the information derivation process compared to a configuration in which the derivation of the behavior information is completed in a single information derivation process.

Feature k15. A period lapse determination means (a function for executing the process of step SA210 in the main CPU 63) for determining that a predetermined period has elapsed from the occurrence of a predetermined period start trigger to the occurrence of a predetermined period end trigger;
a storage execution means (a function for executing the processes of steps SA203 and SA216 in the master CPU 63) for storing, based on the fact that the predetermined period has elapsed by the period elapse determination means, the behavior information corresponding to the game results during the predetermined period derived by the information derivation means using the history information stored in the history storage means as period-corresponding behavior information in a behavior information storage means (a calculation result storage area 234);
Equipped with
the behavior information display control means controls display of the information display means so that a display corresponding to the period-corresponding behavior information stored in the behavior information storage means is performed,
The gaming machine described in feature k14 is characterized in that the specified corresponding display control means determines that the specified display trigger has occurred when the period elapsed determination means determines that the specified period has elapsed, and causes the specified corresponding display to be displayed on the information display means.

According to feature k15, past mode information derived in units of a predetermined period is stored as period-corresponding mode information, and a display corresponding to the period-corresponding mode information is performed on the information display means. Thereby, by checking the information display means, the manager of the gaming hall can grasp the past period corresponding mode information derived in units of predetermined periods. Further, when a predetermined period has elapsed, a predetermined correspondence display is performed on the information display means, and then a display corresponding to the newly derived period correspondence mode information is performed after the predetermined period has elapsed. As a result, the administrator of the game hall can determine whether or not the display corresponding to the period corresponding mode information on the information display means is the display corresponding to the period corresponding mode information newly derived based on the elapse of a predetermined period. It becomes possible to understand. In addition, it is possible to display a predetermined correspondence during a period in which period correspondence mode information is being derived, so that when a predetermined period has elapsed and period correspondence mode information is still being derived. However, it is possible to prevent the display corresponding to the period correspondence mode information from being displayed regardless of this.

Feature k16. The predetermined correspondence display control means causes the information display means to display the predetermined correspondence for a period longer than the longest period required for the information derivation means to derive one of the aspect information. The gaming machine according to feature k15.

According to feature k16, when a predetermined period has elapsed and period correspondence mode information is being derived, a predetermined correspondence display is performed on the information display means.

Note that for the configuration of features k1 to k16, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature group I>
Feature 11. A history storage execution means (a function for executing normal ball entry management processing in the main CPU 63) for storing the history information of a game corresponding to a predetermined event that occurs when the game is executed in the history storage means (normal counter area 231);
An information deriving means (a function for executing the process of step SA201 in the master CPU 63) for deriving aspect information (base value) corresponding to a game result by utilizing the history information stored in the history storage means;
A behavior information storage means (a calculation result storage area 234) for storing the behavior information derived by the information derivation means;
A status information display control means (a function of executing a display process and a second timer interrupt process in the main CPU 63) that controls the display of the information display means (the first to fourth notification display devices 201 to 204) so that a display corresponding to the status information stored in the status information storage means is performed;
Equipped with
the behavior information storage means includes a plurality of specific storage areas (a current status area 311, a first history area 312, a second history area 313, and a third history area 314) so as to be able to store each of the plurality of behavior information derived at different timings by the information derivation means,
A gaming machine characterized in that the mode information display control means controls the information display means so that displays corresponding to each of the multiple mode information stored in the multiple specific memory areas are executed sequentially in accordance with a predetermined display order.

According to feature 11, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. By storing the history information in the gaming machine itself, unauthorized access to and unauthorized modification of the history information can be prevented. Further, the history information stored in the history storage means is used to derive the mode information corresponding to the result of the game, and the information display means displays a display corresponding to the derived mode information. This makes it possible to grasp the management results of gaming history, such as the frequency of occurrence of predetermined events.

Moreover, since the aspect information storage means stores a plurality of aspect information derived at different timings and the notification corresponding to each of the plurality of aspect information is sequentially executed, the number of information display means can be suppressed. , it becomes possible to individually grasp the frequency of occurrence of a predetermined event in a plurality of periods. In addition, since the displays corresponding to each of the plurality of mode information stored in the plurality of specific storage areas are sequentially executed according to the predetermined display order, the administrator of the game hall can grasp the type of mode information to be displayed. It becomes easier to do.

Feature l2. The gaming machine described in Feature l1, characterized in that a predetermined display order is determined in association with the plurality of specific memory areas.

According to feature l2, a predetermined display order for displaying the aspect information is determined in association with a plurality of specific storage areas, so that when starting a new display corresponding to one aspect information, it is possible to simplify the processing configuration for identifying the type of aspect information to be displayed.

Feature l3. A predetermined response display that causes a predetermined response display (pre-shift display) to be performed on the information display means before a new display corresponding to the mode information is started based on the occurrence of a predetermined display trigger. comprising a control means (a function of executing the process of step SA320 and the second timer interrupt process in the main CPU 63),
When causing the information display means to display a display corresponding to the mode information after the predetermined correspondence display has been performed by the information display means, the mode information display control means may display information in the first order in the predetermined display order. The gaming machine according to feature 11 or 12, characterized in that the game machine starts from the display corresponding to the corresponding aspect information.

According to feature l3, after a predetermined corresponding display is performed based on the occurrence of a predetermined display trigger, the display starts from the display corresponding to the aspect corresponding to the first order in the predetermined display order. This makes it possible to check the display corresponding to the aspect information from the first order in the predetermined display order again when a predetermined display trigger occurs.

Feature l4. a period elapse specifying means (a function of executing the process of step SA210 in the main CPU 63) that specifies that a predetermined period has elapsed from the occurrence of a predetermined period start trigger until the predetermined period end trigger occurs;
Based on the fact that the period elapse specifying means specifies that the predetermined period has elapsed, the predetermined information is derived by the information deriving means using the history information stored in the history storage means. storage execution means (a function of executing the processing of step SA203 and step SA216 in the main CPU 63) for storing the mode information corresponding to the game results in the period in the plurality of specific storage areas as period-corresponding mode information;
Equipped with
Any one of features 11 to 13, characterized in that the storage execution means causes the period-corresponding mode information to be stored in the plurality of specific storage areas in accordance with the order derived by the information derivation means. 1. The gaming machine described in 1.

According to feature 14, it becomes possible to confirm the period correspondence mode information according to the order in which it was derived.

Feature l5. A gaming machine according to any one of features l1 to l4, characterized in that it is provided with a means (a function for executing the process of step SA316 in the main CPU 63 and the second timer interrupt process) for causing the information display means to change from a state in which a display corresponding to the mode information is being performed to a state before a display corresponding to the mode information different from the mode information is performed.

According to feature l5, when the mode information to be displayed is switched, the information display means returns to the pre-switching state, allowing the manager of the amusement hall to clearly understand that the mode information to be displayed has been switched.

In addition, for the configuration of features l1 to l5, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Feature m group>
Feature m1. History storage execution means (normal ball entry management processing in the main side CPU 63) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (normal counter area 231) ) and
information deriving means (a function of executing the process of step SA201 in the main CPU 63) for deriving mode information (base value) corresponding to the result of the game using the history information stored in the history storage means;
Equipped with
The information derivation means executes an information derivation process for deriving the aspect information based on the occurrence of a processing execution opportunity, and starts deriving the aspect information and then starts deriving the aspect information. A gaming machine characterized in that the information derivation process is executed a plurality of times until the information derivation process is completed.

According to feature m1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. By storing the history information in the gaming machine itself, unauthorized access to and unauthorized modification of the history information can be prevented. Furthermore, by using the history information stored in the history storage means to derive mode information corresponding to gaming results in a predetermined period, management results of gaming history such as the frequency of occurrence of predetermined events can be grasped. becomes possible. In addition, since the information derivation process is executed multiple times from the start of deriving the aspect information until the derivation of the aspect information is completed, compared to a configuration in which the derivation of the aspect information is completed in one information derivation process. It becomes possible to reduce the processing load for executing information derivation processing.

Feature m2. A period lapse determination means (a function for executing the process of step SA210 in the main CPU 63) for determining that a predetermined period has elapsed from the occurrence of a predetermined period start trigger to the occurrence of a predetermined period end trigger;
a storage execution means (a function for executing the processes of steps SA203 and SA216 in the main CPU 63) for storing, based on the fact that the predetermined period has elapsed by the period elapse determination means, the status information corresponding to the game results during the predetermined period derived by the information derivation means using the history information stored in the history storage means as period-corresponding status information in a status information storage means (a calculation result storage area 234);
A mode information display control means (a function of executing display processing and second timer interrupt processing in the main CPU 63) that controls the display of information display means (the first to fourth notification display devices 201 to 204) so that a display corresponding to the period-corresponding mode information stored in the mode information storage means is performed;
A predetermined correspondence display control means (a function of executing the processing of step SA320 and the second timer interrupt processing in the main CPU 63) that causes a predetermined correspondence display to be displayed on the information display means based on the fact that the predetermined period has elapsed by the period elapse determination means;
The gaming machine described in feature m1 is characterized by comprising:

According to feature m2, past mode information derived in units of a predetermined period is stored as period-corresponding mode information, and a display corresponding to the period-corresponding mode information is performed on the information display means. Thereby, by checking the information display means, the manager of the gaming hall can grasp the past period corresponding mode information derived in units of predetermined periods. Further, when a predetermined period has elapsed, a predetermined correspondence display is performed on the information display means, and then a display corresponding to the newly derived period correspondence mode information is performed after the predetermined period has elapsed. As a result, the administrator of the game hall can determine whether or not the display corresponding to the period corresponding mode information on the information display means is the display corresponding to the period corresponding mode information newly derived based on the elapse of a predetermined period. It becomes possible to understand. In addition, it is possible to display a predetermined correspondence during a period in which period correspondence mode information is being derived, so that when a predetermined period has elapsed and period correspondence mode information is still being derived. However, it is possible to prevent the display corresponding to the period correspondence mode information from being displayed regardless of this.

Feature m3. The gaming machine described in feature m2, wherein the predetermined correspondence display control means causes the information display means to display the predetermined correspondence for a period longer than the longest period required for the information derivation means to derive one of the aspect information.

According to feature m3, when a predetermined period has passed and the period correspondence information is in the process of being derived, a predetermined correspondence display is performed on the information display means.

Note that for the configuration of features m1 to m3, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the above-mentioned feature k group, above-mentioned feature l group, and above-mentioned feature m group, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, gaming machines such as those exemplified above need to be properly managed, and there is still room for improvement in this regard.

<n group of features>
Feature n1. A setting means (a function for executing the process of step SA709 in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage degree;
a situation generating means for generating a situation in which the setting value to be used can be changed (a situation in which a setting value update process is executed) based on a first setting-related operation (ON operation of the setting key insertion portion 68a and pressing operation of the reset button 68c) being performed when the supply of operating power is started (in the 45th embodiment, a function of making a positive judgment at step SA412 in the main CPU 63 and a function of making a positive judgment at step SA417; in the 46th embodiment, a function of making a positive judgment at steps SA905 and SA916 in the main CPU 63 and a function of making a positive judgment at step SA917);
A notification generating means (a function for executing a setting confirmation process in the main CPU 63) for notifying the setting value to be used, which is set by the setting means, based on a second setting-related operation (ON operation of the setting key insertion portion 68a) being performed when the supply of operating power is started;
Equipped with
The gaming machine is characterized in that the situation generation means is equipped with a post-start generation means (in the 45th embodiment, a function of making a positive judgment at step SA412 in the main CPU 63, and in the 46th embodiment, a function of making a positive judgment at steps SA905 and SA916 in the main CPU 63) that causes the settable situation to occur when the supply of operating power is stopped in the middle of the settable situation and then started again, even if the second setting-related operation is performed.

According to feature n1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In addition, in order to change the set value to be used, it is necessary to perform the first setting related operation when the supply of operating power is started, so any act of attempting to illegally change the set value to be used It is possible to make it difficult to perform. In addition, when the supply of operating power is started, the setting value to be used will be notified by performing the second setting-related operation, so the administrator of the game hall can check the setting value to be used as necessary. becomes possible.

In addition, if the supply of operating power is stopped while the setting is possible, the setting will be possible when the supply of operating power is started afterwards, even if a second setting-related operation is performed. As a result, if the supply of operating power is stopped while changing the setting value of the target to be used, when the supply of operating power is subsequently resumed, it is possible to prioritize the change of the setting value of the target to be used over the notification of the setting value of the target to be used, and it is possible to prevent gameplay from starting even if the change of the setting value of the target to be used has not actually been completed.

Feature n2. A status notification means (a function of executing the processing of steps SA801 to step SA803 in the main CPU 63 and a function of executing the second timer interrupt processing) is provided to notify the setting value that is in the process of being changed in the setting possible situation. The gaming machine according to feature n1.

According to feature n2, when the setting is possible, the setting value being changed is notified, so that it is possible to change the setting value while understanding the current setting value. In addition, by notifying the setting value being changed in this way when the setting is possible, even if the second setting-related operation is performed when the supply of operating power starts, the setting is possible, so that it is possible to actually check the setting value even if the configuration is such that the setting value change operation takes priority.

Feature n3. A feature characterized in that both the situation notification means and the notification generation means display target setting values on predetermined display means (first to fourth notification display devices 201 to 204). The gaming machine described in n2.

According to feature n3, the target setting value is displayed on the specified display means whether the setting value is changed or confirmed, so that the specified display means can be used for both situations. Also, even if the second setting-related operation is performed when the supply of operating power is started and the configuration is such that the setting is possible, the setting value is displayed on the specified display means when the setting is possible, so that the manager of the amusement hall who performed the second setting-related operation can visually check the setting value by looking at the specified display means.

Feature n4. The gaming machine described in feature n3, wherein the status notification means displays a display corresponding to the setting value being changed and a display corresponding to the setting possible status on the predetermined display means.

According to feature n4, when the setting is possible, the predetermined display means displays not only a display corresponding to the setting value that is being changed, but also a display corresponding to the setting possible. As a result, when the supply of operating power is stopped in the middle of a setting possible state, and when the supply of operating power is started afterwards, the setting becomes possible even though the second setting-related operation is performed. In this case, it becomes easier for the game hall manager to understand that the setting is possible.

Feature n5. The after-start generation means is configured to enable the set value to be changed from the set value that was selected when the supply of operating power is stopped in the middle of the settable state when the settable state is set. The gaming machine according to any one of features n1 to n4.

According to feature n5, even if the supply of operating power is stopped during the setting possible state, when the supply of operating power is resumed, it is possible to continue changing the setting value from the state immediately before the supply of operating power was stopped.

Feature n6: A setting correspondence storage means (setting reference area 341) for storing setting correspondence information corresponding to the setting value set by the setting means;
a selection correspondence storage means (setting update area 342) for storing selection correspondence information corresponding to the setting value selected in the setting possible situation;
Equipped with
The situation generation means includes a means for changing the selection correspondence information stored in the selection correspondence storage means so that the setting value to be selected is changed when a change trigger occurs in the settable situation (a function for executing the processing of step SA708 in the main CPU 63),
the setting means stores information corresponding to the selection correspondence information stored in the selection correspondence storage means as the setting correspondence information in the setting correspondence storage means when a termination trigger occurs in the setting possible situation, thereby setting a setting value that was a selection target in the setting possible situation as a target for use;
A gaming machine described in any one of features n1 to n5, characterized in that, when the settable situation is reached, the post-start generation means makes it possible to change the setting value from the setting value corresponding to the selection correspondence information stored in the selection correspondence memory means if the supply of operating power is stopped in the middle of the settable situation.

According to feature n6, the setting correspondence storage means stores the setting correspondence information corresponding to the setting value to be used, and the selection correspondence storage means stores the selection correspondence information corresponding to the setting value that is being changed in the setting possible situation. By providing this, it becomes possible to change the setting value in the settable situation while storing and retaining information on the setting value that was set before the settable situation started. In this case, if the supply of operating power is restarted after the supply of operating power is stopped in the middle of the setting possible situation, the information stored in the selection corresponding storage means when the supply of operating power is stopped. The setting value is changed from the setting value corresponding to the selection correspondence information. As a result, even if the supply of operating power is stopped in the middle of a setting possible situation, when the supply of operating power is resumed, the setting value change operation will continue from the state immediately before the supply of operating power was stopped. It is now possible to do so.

Feature n7. The gaming machine described in feature n6, characterized in that the situation generating means includes a means for enabling a change of the setting value from the setting value corresponding to the setting correspondence information stored in the setting correspondence storage means when the first setting-related operation is performed when the supply of operating power is stopped during the setting possible situation and the supply of operating power is subsequently started (a function for making an affirmative determination at step SA417 in the main CPU 63 in the 45th embodiment, and a function for making an affirmative determination at step SA917 in the main CPU 63 in the 46th embodiment).

According to feature n7, if the second setting-related operation is performed when the supply of operating power is restarted after the supply of operating power is stopped in the middle of a setting possible situation, the supply of operating power is stopped. It is possible to resume changing the setting value from the setting value that was subject to change before the change was made, while the supply of operating power is restarted after the supply of operating power was stopped in the middle of the setting possible situation. In this case, if the second setting-related operation is performed, the setting value is changed from the setting value corresponding to the setting correspondence information stored in the setting correspondence storage means. This makes it possible to vary the initial set value when starting to change the set value depending on the operation content when the supply of operating power is restarted.

Feature n8. The after-start generation means is configured to perform the first setting-related operation and the second setting-related operation when the supply of operating power is stopped in the middle of the setting possible situation and the supply of operating power is started thereafter. The gaming machine according to any one of features n1 to n7, characterized in that the setting possible state can be achieved even if no operation is performed.

According to feature n8, if the supply of operating power is stopped in the middle of a setting possible state, the setting possible state can be achieved when the supply of operating power is subsequently started even if neither the first setting-related operation nor the second setting-related operation is performed. Therefore, if the supply of operating power is stopped in the middle of changing a setting value, it is possible to proactively create a situation in which the setting value can be changed when the supply of operating power is subsequently resumed.

Feature n9. The first setting-related operation includes setting the setting key insertion part (setting key insertion part 68a) to a predetermined corresponding state (turned ON state) by the setting key,
The situation generating means terminates the settable situation based on the setting key insertion section specifying that the setting key has changed from the predetermined corresponding state to a specific corresponding state (a state in which an OFF operation has been performed). The gaming machine according to any one of features n1 to n8, characterized in that the gaming machine is equipped with means (a function of executing the processing of step SA709 and step SA710 in the main CPU 63).

According to feature n9, since it is necessary to use the setting key to put the setting key insertion part into a specific corresponding state in order to make the setting possible, it is possible to make it difficult to illegally change the setting value to be used. In this case, the setting possible state does not end just because the setting key insertion part is in a specific corresponding state, but ends when the setting key insertion part is changed from the specific corresponding state to the specific corresponding state. As a result, even if the supply of operating power is stopped during the setting possible state and the supply of operating power is then started while the setting key insertion part is in a specific corresponding state, the setting possible state is not immediately ended, but the setting possible state is ended by changing the setting key insertion part from the specific corresponding state to the specific corresponding state and then again from the specific corresponding state to the specific corresponding state, so that it is possible to end the setting possible state at a timing that is preferable for the manager of the game hall.

Feature n10. The gaming machine described in any one of features n1 to n9, characterized in that the situation generating means causes the setting possible situation to occur when the supply of operating power is stopped while the notification generating means is notifying the setting value of the target to be used, and the supply of operating power is then started when the first setting-related operation is performed.

According to feature n10, even if the supply of operating power is stopped while the setting value to be used is being notified, if the first setting-related operation is performed when the supply of operating power is subsequently started. The setting becomes possible. This makes it possible to give priority to the task of changing setting values over the task of checking setting values.

Note that for the configuration of features n1 to n10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature group o>
Feature o1. A means for executing a profit awarding process in a manner corresponding to a set value set as a use target from among a plurality of set values corresponding to the player's advantage level (a function for executing the processes of steps S503 and S504 in the master CPU 63);
A setting related execution means for executing a predetermined setting related process related to the setting value (a function for executing a setting value update process in the main CPU 63, a function for executing a setting confirmation process in the main CPU 63);
an intermediate restart means for restarting the predetermined setting-related processing from the middle after the supply of operating power is started after the supply of operating power is stopped before the completion of the predetermined setting-related processing (in the 45th embodiment, a function of making a positive determination at step SA412 in the main CPU 63 and a function of making a positive determination at step SA414 in the main CPU 63; in the 46th embodiment, a function of making a positive determination at steps SA905 and SA916 in the main CPU 63);
A gaming machine comprising:

According to feature o1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, even if the supply of operating power is stopped before the predetermined setting-related process is completed, if the supply of operating power is restarted, the predetermined setting-related process is restarted from the middle. Thereby, even if the supply of operating power is stopped in the middle of a predetermined setting-related process, it is possible to continue the predetermined setting-related process when the supply of operating power is restarted.

Features o2. The setting-related execution means executes a predetermined setting-related operation (if the predetermined setting-related process is a setting value update process, an ON operation of the setting key insertion section 68a and a pressing operation of the reset button 68c; the predetermined setting-related process is a setting confirmation operation). If it is a process, the predetermined setting-related process is executed based on the ON operation of the setting key insertion part 68a.
The gaming machine according to feature o1, wherein the midway restart means restarts the predetermined setting-related process from the middle even if the predetermined setting-related operation is not performed.

According to feature o2, if the supply of operating power is stopped before the specified setting-related process is completed, the specified setting-related process is resumed from where it left off even if the specified setting-related operation is not performed, so it is possible to prioritize resuming the specified setting-related process from where it left off.

Feature o3. The setting-related execution means executes the predetermined setting-related process based on the predetermined setting-related operation being performed when supply of operating power is started;
The intermediate restart means restarts the predetermined setting-related process from the middle even if the predetermined setting-related operation is not performed when the supply of operating power is started;
If the supply of operating power is stopped before the predetermined setting-related process is completed, and the predetermined setting-related operation is performed when the supply of operating power is started thereafter, the mid-resuming means causes the The gaming machine according to feature o2, characterized in that the predetermined setting-related process is not restarted from the middle, but the predetermined setting-related process is newly started by the setting-related execution means.

According to feature o3, since the predetermined setting-related process is executed based on the predetermined setting-related operation being performed when the supply of operating power is started, the act of causing the predetermined setting-related process to be executed fraudulently It is possible to make it difficult to perform. In this case, if the supply of operating power is restarted after the supply of operating power is stopped in the middle of a predetermined setting-related process, even if the predetermined setting-related operation is not performed, the predetermined setting-related process will continue. Since the process is restarted from the beginning, it is possible to give priority to restarting from the middle of the predetermined setting-related process. On the other hand, if a predetermined setting-related operation is performed when the supply of operating power is resumed after the supply of operating power is stopped in the middle of a predetermined setting-related process, the predetermined setting-related process will be restarted from the middle. It is not restarted but started anew. As a result, if the supply of operating power is stopped in the middle of a predetermined setting-related process, the predetermined setting-related process can be newly started depending on the presence or absence of a predetermined setting-related operation when the supply of operating power is restarted. It becomes possible to select either of or restarting a predetermined setting-related process from the middle.

Feature o4. The predetermined setting-related operation includes the setting key insertion section (setting key insertion section 68a) being in a predetermined corresponding state (ON state) by the setting key,
The gaming machine described in feature o2 or o3 is characterized in that the setting-related execution means is equipped with a means for terminating the specified setting-related processing based on determining that the setting key insertion section has been changed from the specified corresponding state to a specific corresponding state (a state where the setting key has been turned OFF) (a function for executing the processing of step SA504 in the main CPU 63, and a function for executing the processing of steps SA709 and SA710 in the main CPU 63).

According to feature o4, in order to start the predetermined setting-related process, it is necessary to use the setting key to put the setting key insertion unit into a predetermined corresponding state, so that it is possible to make it difficult to carry out the act of illegally executing the predetermined setting-related process. In this case, the predetermined setting-related process does not end just because the setting key insertion unit is in a specific corresponding state, but ends when the setting key insertion unit is changed from the specific corresponding state to the specific corresponding state. As a result, even if the supply of operating power is stopped before the predetermined setting-related process is completed and the supply of operating power is then started while the setting key insertion unit is in a specific corresponding state, the predetermined setting-related process is not immediately ended, but is ended by changing the setting key insertion unit from the specific corresponding state to the predetermined corresponding state and then again from the specific corresponding state, so that it is possible to end the predetermined setting-related process at a timing that is favorable to the manager of the game hall.

Feature o5. The gaming machine according to any one of features o1 to o4, wherein the predetermined setting-related process is a process for changing a setting value to be used.

According to feature o5, even if the supply of operating power is stopped while changing the setting value, when the supply of operating power is resumed, it is possible to resume changing the setting value from the setting value that was in the middle of the change. As a result, even if the supply of operating power is stopped while changing the setting value, when the supply of operating power is resumed, it is possible to continue changing the setting value.

Feature o6. The predetermined setting-related process is a process for changing a setting value to be used;
A setting correspondence storage means (setting reference area 341) for storing setting correspondence information corresponding to the setting value to be used;
a selection correspondence storage means (setting update area 342) for storing selection correspondence information corresponding to the setting value selected in the predetermined setting-related process;
Equipped with
The setting related execution means includes:
As the predetermined setting-related processing, a means for changing the selection correspondence information stored in the selection correspondence storage means so that the setting value to be selected is changed when a change trigger occurs (a function for executing the processing of step SA708 in the main CPU 63);
As the predetermined setting-related processing, when a termination trigger occurs, information corresponding to the selection correspondence information stored in the selection correspondence storage means is stored in the setting correspondence storage means as the setting correspondence information, thereby setting the setting value that was the selection target as the setting value to be used (a function of executing the processing of step SA709 in the main CPU 63);
Equipped with
A gaming machine described in any one of features o1 to o5, characterized in that the mid-restart means enables the setting value to be changed from the setting value corresponding to the selection correspondence information stored in the selection correspondence memory means when the supply of operating power is stopped before the specified setting-related processing is completed.

According to feature o6, a setting correspondence storage means for storing setting correspondence information corresponding to the setting value to be used and a selection correspondence storage means for storing selection correspondence information corresponding to the setting value being changed in the setting possible situation are provided, so that it is possible to change the setting value in the setting possible situation while storing and holding information on the setting value that was set before the setting possible situation was started. In this case, if the supply of operating power is stopped while changing the setting value and then the supply of operating power is resumed, the setting value is changed from the setting value corresponding to the selection correspondence information that was stored in the selection correspondence storage means when the supply of operating power was stopped. As a result, even if the supply of operating power is stopped while changing the setting value, when the supply of operating power is resumed, it is possible to continue the operation of changing the setting value from the state immediately before the supply of operating power was stopped.

Feature o7. The setting-related execution means executes the predetermined setting-related process based on a predetermined setting-related operation being performed when supply of operating power is started;
The intermediate restart means restarts the predetermined setting-related process from the middle based on the fact that the predetermined setting-related operation is not performed when the supply of operating power is started;
The setting-related execution means is configured to perform, in a case where the supply of operating power is stopped before the predetermined setting-related process is completed, and when the supply of operating power is started thereafter, the predetermined setting-related operation is performed. , means for making it possible to change the setting value from the setting value corresponding to the setting correspondence information stored in the setting correspondence storage means (in the forty-fifth embodiment, an affirmative determination is made in step SA417 in the main CPU 63) The gaming machine according to feature o6, characterized in that the gaming machine has a function of making an affirmative determination in step SA917 in the main CPU 63 in the forty-sixth embodiment.

According to feature o7, when the supply of operating power is stopped while changing a setting value and then resumed, it is possible to resume changing the setting value from the setting value that was the target of change before the supply of operating power was stopped based on the fact that a specific setting-related operation was not performed. On the other hand, when the supply of operating power is stopped while changing a setting value and then resumed, if a specific setting-related operation is performed, the setting value is changed from the setting value that corresponds to the setting correspondence information stored in the setting correspondence storage means. This makes it possible to make the initial setting value when starting to change the setting value different depending on the operation content when the supply of operating power is resumed.

In addition, for the configuration of features o1 to o7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Feature p group>
Feature p1. A means for executing a profit awarding process in a manner corresponding to a set value set as a use target from among a plurality of set values corresponding to the player's advantage level (a function for executing the processes of steps S503 and S504 in the master CPU 63);
and a setting-related execution means (a function for executing a setting value update process in the main CPU 63, a function for executing a setting confirmation process in the main CPU 63) for executing a predetermined setting-related process related to the setting value based on a predetermined setting-related operation (an ON operation of the setting key insertion unit 68a and a pressing operation of the reset button 68c if the predetermined setting-related process is a setting value update process, and an ON operation of the setting key insertion unit 68a if the predetermined setting-related process is a setting confirmation process),
The setting-related execution means is a post-supply execution means which, if the supply of operating power is stopped before the specified setting-related processing is completed, executes the specified setting-related processing even if the specified setting-related operation is not performed after the supply of operating power is subsequently started (in the 45th embodiment, a function of making a positive judgment at step SA412 in the main CPU 63 and a function of making a positive judgment at step SA414 in the main CPU 63; in the 46th embodiment, a function of making a positive judgment at steps SA905 and SA916 in the main CPU 63).

According to feature p1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage, the player can use the more advantageous setting value. It is to be expected that Further, by performing a predetermined setting-related operation, it is possible to execute a predetermined setting-related process. In this case, even if the supply of operating power is stopped before the predetermined settings-related processing is completed, if the supply of operating power is resumed, the predetermined settings will be applied even if the predetermined settings-related operations are not performed. Related processing is executed. This makes it possible to give priority to the execution of predetermined setting-related processing.

Feature p2: The setting-related execution means executes the predetermined setting-related process based on the predetermined setting-related operation being performed when the supply of operating power is started;
The gaming machine according to feature p1, wherein the post-supply execution means executes the specified setting-related processing when the supply of operating power starts even if the specified setting-related operation is not performed.

According to feature p2, when the supply of operating power is started, a predetermined setting-related process is executed based on the performance of a predetermined setting-related operation, making it difficult to perform an unauthorized execution of the predetermined setting-related process. In this case, when the supply of operating power is stopped in the middle of the predetermined setting-related process and then resumed, the predetermined setting-related process is executed even if the predetermined setting-related operation is not performed, making it possible to prioritize the execution of the predetermined setting-related process.

Feature p3. The predetermined setting-related operation includes setting the setting key insertion part (setting key insertion part 68a) to a predetermined compatible state (turned ON state) by the setting key,
The setting-related execution means executes the predetermined setting-related process based on the fact that the setting key insertion section has determined that the predetermined corresponding state has been changed to a specific corresponding state (OFF operated state) by the setting key. (a function of executing the process of step SA504 in the main side CPU 63, a function of executing the process of steps SA709 and step SA710 in the main side CPU 63). Game machine.

According to feature p3, in order to start a predetermined setting-related process, it is necessary to use the setting key to bring the setting key insertion part into a predetermined compatible state, so it is impossible to perform an act of unauthorized execution of a predetermined setting-related process. It is possible to make it difficult to perform. In this case, the predetermined setting-related processing does not end only when the setting key insertion section is in the specific compatibility state, but ends when the setting key insertion section is changed from the predetermined compatibility state to the specific compatibility state. As a result, even if the supply of operating power is stopped before the predetermined setting-related processing is completed, even if the supply of operating power is subsequently started while the setting key insertion part is in a specific compatible state, the The predetermined setting-related processing is not terminated, and the predetermined setting-related processing is terminated by changing the setting key insertion section from the specific compatibility state to the predetermined compatibility state and then further changing from the predetermined compatibility state to the specific compatibility state. Therefore, it becomes possible to finish the predetermined setting-related processing at a timing that is convenient for the administrator of the gaming hall.

Feature p4. The post-supply execution means is configured to perform a specific related operation when the supply of operating power is started thereafter even if the supply of operating power is stopped before completing the predetermined setting-related process. The gaming machine according to any one of features p1 to p3, wherein the predetermined setting-related process is not executed in the case where the setting-related process is performed.

According to feature p4, even if the supply of operating power is stopped before completing a predetermined setting-related process, if the supply of operating power is started after that, and a specific related operation is performed. , the predetermined setting-related processing is not executed. As a result, even if the supply of operating power is stopped before a predetermined setting-related process is completed, the supply of operating power will be started if there is no need to execute the predetermined setting-related process afterwards. By performing a specific related operation when a specific setting related process is performed, it is possible to prevent a predetermined setting related process from being executed.

Feature p5. The gaming machine according to any one of features p1 to p4, wherein the predetermined setting-related process is a process for notifying setting values to be used.

According to feature p5, if the supply of operating power is stopped while the setting value is being notified, when the supply of operating power is subsequently started, it is assumed that the predetermined setting-related operation has not been performed. Notification of the set value is restarted. This makes it possible to give priority to notification of setting values.

Feature p6. A setting means (a function for executing the process of step SA709 in the master CPU 63) for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level;
a situation generating means for generating a situation in which the setting value to be used can be changed (a situation in which a setting value update process is executed) based on a specific related operation (turning on the setting key insertion section 68a and pressing the reset button 68c) being performed when the supply of operating power is started (in the 45th embodiment, a function of making a positive judgment at step SA412 in the main CPU 63 and a function of making a positive judgment at step SA417; in the 46th embodiment, a function of making a positive judgment at steps SA905 and SA916 in the main CPU 63 and a function of making a positive judgment at step SA917);
Equipped with
the post-supply execution means, even if the supply of operating power is stopped before the predetermined setting-related process is completed, does not execute the predetermined setting-related process if the specific related operation is performed when the supply of operating power is started thereafter;
The gaming machine described in feature p5 is characterized in that the situation generation means causes the settable situation to occur when the specific related operation is performed when the supply of operating power is subsequently started, even if the supply of operating power is stopped before the specified setting-related processing is completed.

According to feature p6, even if the supply of operating power is stopped while the setting value is being notified, if the specific related operation is performed when the supply of operating power is started afterwards. In this case, the setting value is not notified, but the setting value becomes settable, allowing the setting value to be changed. As a result, when a specific related operation is performed to bring about a settable situation in which a setting value can be changed, it is possible to give priority to the occurrence of a settable situation over notification of a set value.

Feature p7. The gaming machine according to any one of features p1 to p6, wherein the predetermined setting-related process is a process for changing a setting value to be used.

According to feature p7, even if the supply of operating power is stopped while changing the set value, it is possible to change the set value when the supply of operating power is resumed. As a result, even if the supply of operating power is stopped while changing the set value, it is possible to continue the work of changing the set value when the supply of operating power is resumed.

In addition, for the configuration of features p1 to p7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Characteristics Q group>
Feature q1. Means for executing profit granting processing in a manner corresponding to a setting value set to be used from among setting values of multiple stages corresponding to the player's advantage level (processing of step S503 and step S504 in the main CPU 63) ) and
a setting-related execution means for executing a predetermined setting-related process regarding the setting value (a function of executing a setting value update process in the main CPU 63, a function of executing a setting confirmation process in the main CPU 63);
Equipped with
The setting-related execution means executes a specific related operation (predetermined setting-related processing) when the supply of operating power is started after that even if the supply of operating power is stopped before the predetermined setting-related processing is completed. If a RAM clear operation or a setting change operation is performed if the process is for setting confirmation, or a RAM clear operation if the predetermined setting-related process is a setting value update process, then the predetermined setting-related process is not executed. A gaming machine with special features.

According to feature q1, the setting value to be used is set from among multiple setting values corresponding to the player's degree of advantage, so the player will expect that the more advantageous setting value will be the setting value to be used. In this case, even if the supply of operating power is stopped before the specified setting-related process is completed, the specified setting-related process will not be executed if a specific related operation is performed when the supply of operating power is started thereafter. As a result, even if the supply of operating power is stopped before the specified setting-related process is completed, if there is no need to execute the specified setting-related process after that, it is possible to prevent the specified setting-related process from being executed by performing a specific related operation when the supply of operating power is started.

Feature q2. The gaming machine described in feature q1, wherein the predetermined setting-related process is a process for notifying the setting value to be used.

According to feature q2, even if the supply of operating power is stopped while the set value is being notified, if a specific related operation is performed when the supply of operating power is started thereafter, the notification of the set value will not be resumed. As a result, even if the supply of operating power is stopped while the set value is being notified, if there is no need to notify the set value afterwards, it is possible to prevent the notification of the set value by performing a specific related operation when the supply of operating power is started.

Feature q3. The setting-related execution means executes a predetermined setting-related operation (if the predetermined setting-related process is a setting value update process, an ON operation of the setting key insertion section 68a and a pressing operation of the reset button 68c; the predetermined setting-related process is a setting confirmation operation). If it is a process, the predetermined setting-related process is executed based on the ON operation of the setting key insertion part 68a, and the supply of operating power is performed before the predetermined setting-related process is completed. Even if the supply of operating power is stopped, if the specific related operation is performed instead of the predetermined setting related operation when the supply of operating power is started thereafter, the predetermined setting related process is not executed. The gaming machine according to q1 or q2.

According to feature q3, since it is necessary to perform a predetermined setting-related operation in order to perform a predetermined setting-related process, it is possible to make it difficult to perform an act of fraudulently executing a predetermined setting-related process.

Feature q4. The setting-related execution means determines whether the specific related operation is not performed if the supply of operating power is stopped before completing the predetermined setting-related process and if the supply of operating power is started thereafter. In this case, means for executing the predetermined setting-related processing even if the predetermined setting-related operation is not performed (in the 45th embodiment, a function of making an affirmative determination in step SA412 in the main CPU 63 and a function in the main CPU 63) The gaming machine according to feature q3, further comprising a function of making an affirmative determination in step SA414.

According to feature q4, if the supply of operating power is stopped before a specific setting-related process is completed, it is possible to select whether or not to execute a specific setting-related process without performing a specific setting-related operation, depending on whether or not a specific related operation is performed when the supply of operating power is started.

Feature q5. The predetermined setting-related operation includes the setting key insertion section (setting key insertion section 68a) being in a predetermined corresponding state (ON-operated state) by the setting key,
The gaming machine described in feature q4 is characterized in that the setting-related execution means is equipped with a means for terminating the specified setting-related processing based on determining that the setting key insertion section has been changed from the specified corresponding state to a specific corresponding state (a state where the setting key has been turned OFF) (a function for executing the processing of step SA504 in the main CPU 63, and a function for executing the processing of steps SA709 and SA710 in the main CPU 63).

According to feature q5, in order to start the predetermined setting-related process, it is necessary to use the setting key to put the setting key insertion part into a predetermined corresponding state, so it is possible to make it difficult to carry out the act of illegally executing the predetermined setting-related process. In this case, the predetermined setting-related process does not end just because the setting key insertion part is in a specific corresponding state, but ends when the setting key insertion part is changed from the specific corresponding state to the specific corresponding state. As a result, even if the supply of operating power is stopped before the predetermined setting-related process is completed and the supply of operating power is then started while the setting key insertion part is in a specific corresponding state, the predetermined setting-related process is not immediately ended, but is ended by changing the setting key insertion part from the specific corresponding state to the predetermined corresponding state and then again from the specific corresponding state, so that the predetermined setting-related process can be ended at a timing that is favorable to the manager of the game hall.

Feature q6. Another execution means for executing a separate process different from the predetermined setting-related process based on the specific related operation being performed when the supply of operating power is started (the predetermined setting-related process is for setting confirmation) If it is a process, a function that executes only the RAM clear process in the main CPU 63 and does not execute the setting value update process, or a function that executes the RAM clear process and the setting value update process in the main CPU 63, or a predetermined setting related process is the setting value. If it is an update process, the main CPU 63 in the 45th embodiment executes only the RAM clear process and does not execute the setting value update process). gaming machines.

According to feature q6, by utilizing a specific related operation performed to execute another process, it is possible to prevent a specific setting-related process from being executed when the supply of operating power is stopped before the completion of the specific setting-related process and the supply of operating power is subsequently started.

Feature q7. The gaming machine according to feature q6, wherein the separate execution means executes the separate process based on the specific related operation being performed when the supply of operating power is started thereafter, even if the supply of operating power is stopped before the predetermined setting-related process is completed.

According to feature q7, even if the supply of operating power is stopped before a specific setting-related process is completed, if the supply of operating power is subsequently started and a specific related operation is performed, it is possible to prioritize the execution of another process over the specific setting-related process.

Feature q8. The gaming machine described in feature q6 or q7, wherein the predetermined setting-related process is a process for notifying the setting value to be used, and the separate process is a process for changing the setting value to be used.

According to feature q8, even if the supply of operating power is stopped while the setting value is being notified, if a specific related operation is performed when the supply of operating power is started thereafter, the notification of the setting value will not be resumed. As a result, even if the supply of operating power is stopped while the setting value is being notified, if there is no need to notify the setting value after that, it is possible to prevent the notification of the setting value by performing a specific related operation when the supply of operating power is started. Also, as an operation for preventing the notification of the setting value in this way, it is possible to use a specific related operation for executing a process to change the setting value.

In addition, for the configuration of features q1 to q8, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

<Characteristic r group>
Feature r1. a setting means (a function for executing the process of step SA709 in the main CPU 63) for setting a setting value to be used from among setting values in a plurality of stages corresponding to the player's advantage level;
Situation generation means (in the 45th embodiment, step SA412 in the main CPU 63 In the 46th embodiment, the function of making an affirmative determination in step SA905 and step SA916 in the main CPU 63, and the function of making an affirmative determination in step SA917 in the main CPU 63. )and,
a setting correspondence storage means (setting reference area 341) for storing setting correspondence information corresponding to the setting values set by the setting means;
selection correspondence storage means (setting update area 342) for storing selection correspondence information corresponding to the setting value selected in the setting possible situation;
Equipped with
The situation generation means is means for changing the selection correspondence information stored in the selection correspondence storage means so that the setting value to be selected is changed when a change trigger occurs in the setting possible situation. (a function of executing the process of step SA708 in the main CPU 63),
The setting means stores information corresponding to the selection correspondence information stored in the selection correspondence storage means in the setting correspondence storage means as the setting correspondence information when a termination trigger occurs in the setting possible situation. The gaming machine is characterized in that the setting value that was the selection target in the setting possible situation is set as the usage target.

According to feature r1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, a setting correspondence storage means for storing setting correspondence information corresponding to the setting value to be used, and a selection correspondence storage means for storing selection correspondence information corresponding to the setting value that is being changed in the setting possible situation are provided. By doing so, it becomes possible to change the setting value in the setting possible situation while storing and retaining information on the setting value that was set before the setting possible situation started.

Feature r2. The situation generating means is configured to generate the information stored in the selection correspondence storage means in the previous settable situation in the settable situation that occurs after the settable situation ends before the termination trigger occurs. Feature r1 is characterized in that it is provided with a first change execution means (a function of making an affirmative determination in step SA701 in the main CPU 63) that enables changing the setting value from the setting value corresponding to the selection correspondence information. The game machine described.

Feature r2. If the settable situation is started after the settable situation ends before the termination trigger occurs, the setting value is changed from the setting value corresponding to the selection correspondence information stored in the selection correspondence storage means. . As a result, even if the configurable status ends before the termination trigger occurs, when the configurable status is restarted, the setting value can be changed from the setting value that was last selected in the previous configurable status. It becomes possible to continue to do so.

Feature r3. The gaming machine according to feature r2, wherein the situation generating means is provided with a second change executing means (a function of making a negative determination in step SA701 in the main CPU 63) that enables a change of the setting value from the setting value corresponding to the setting correspondence information stored in the setting correspondence storage means in the setting possible situation that occurs after the setting possible situation ends before the end trigger occurs.

According to feature r3, when a configurable situation is started after the configurable situation ends before the termination trigger occurs, the setting value is changed from the setting value that was last selected in the previous configurable situation. Not only is it possible to restart the setting, but also it corresponds to the setting correspondence information stored in the setting correspondence storage means when the setting possible situation is started after the setting possible situation ends before the termination trigger occurs. It becomes possible to change the setting value from the setting value. This allows the initial setting value when starting to change the setting value to be different depending on the situation when the settable situation is restarted.

Feature r4. The gaming machine described in feature r3, wherein the second change execution means enables the change of the setting value from the setting value corresponding to the setting correspondence information stored in the setting correspondence storage means in the setting possible situation that occurs after the setting possible situation that ended due to the occurrence of the ending trigger.

According to feature r4, in normal setting possible situations, the setting value will be changed from the currently used setting value.

Feature r5. The gaming machine according to feature r3 or r4, characterized in that the situation generating means includes means (a function for executing the processes of steps SA405, SA412, and SA417 in the main CPU 63) for causing one of the following situations to occur: a situation in which the setting value can be changed from the setting value corresponding to the selection correspondence information stored in the selection correspondence storage means, and a situation in which the setting value can be changed from the setting value corresponding to the setting correspondence information stored in the setting correspondence storage means, based on a specific related operation being performed when the setting possible situation begins after the setting possible situation ends before the end trigger occurs in the setting possible situation.

According to feature r5, when a configurable situation starts after a configurable situation ends before an end trigger occurs, the amusement hall manager can select whether to resume changing the setting value from the setting value last selected in the previous configurable situation, or to start changing the setting value from the setting value currently being used.

Feature r6. A gaming machine according to any one of features r1 to r5, characterized in that it is provided with a means (a function for executing the processing of steps SA801 to SA803 in the main CPU 63) for displaying on a predetermined display means (the first to fourth display devices 201 to 204) the setting value corresponding to the selection correspondence information stored in the selection correspondence storage means in the setting possible situation.

Feature r6 makes it possible to change the setting value while checking the setting value being changed in a setting possible situation.

Feature r7. A gaming machine according to any one of features r1 to r6, characterized in that it is provided with a means (a function for executing the processing of steps SA601 to SA603 in the main CPU 63) for displaying the setting value corresponding to the setting correspondence information stored in the setting correspondence storage means on a predetermined display means (first to fourth display devices 201 to 204) in a situation where the setting is not possible.

Feature r7 makes it possible to check the currently used setting values as needed.

Note that for the configuration of features r1 to r7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

The invention relating to the above group n of features, group o of features, group p of features, group q of features, and group r of features makes it possible to solve the following problems.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to have an optimal configuration for the setting values that determine the advantageous degree of the gaming machine, and there is still room for improvement in this regard.

<Feature s group>
Feature s1. A predetermined response process (setting confirmation process, setting value update process) is started based on the fact that the predetermined key insertion section (setting key insertion section 68a) is set to a predetermined corresponding state (ON operation state) by a predetermined key. Predetermined response starting means (in the 45th embodiment, a function of making an affirmative determination in step SA413 in the main CPU 63 and a function of making an affirmative decision in step SA417 in the main CPU 63, and a step in the main CPU 63 in the 46th embodiment) (a function to make an affirmative determination in SA913 and a function to make an affirmative determination in step SA917);
a predetermined response terminating means (main unit) for terminating the predetermined response processing based on the fact that the predetermined key insertion section has identified that the predetermined response state has been changed from the predetermined response state to a specific response state (OFF operated state) by the predetermined key; a function of executing the processing of step SA709 and step SA710 in the side CPU 63);
A gaming machine characterized by comprising:

According to feature s1, in order to start the predetermined response process, it is necessary to use a predetermined key to put the predetermined key insertion part into a predetermined response state, making it difficult to perform acts that attempt to start the predetermined response process illegally. In this case, the predetermined response process does not end just because the predetermined key insertion part is in a specific response state, but ends when the predetermined key insertion part is changed from a predetermined response state to a specific response state. As a result, even if the predetermined response process is started in a situation where the predetermined key insertion part is in a specific response state for some reason, the predetermined response process is not immediately ended, but is ended by changing the predetermined key insertion part from a specific response state to a predetermined response state and then again from the predetermined response state to a specific response state, making it possible to end the predetermined response process at a timing that is favorable to the manager of the game hall.

Feature s2. Another starting means (in the forty-fifth embodiment, step SA412 in the main CPU 63 and a function to make an affirmative judgment in step SA414 in the main CPU 63; in the 46th embodiment, a function to make an affirmative judgment in step SA905 and step SA916 in the main CPU 63). The gaming machine according to feature s1.

According to feature s2, the predetermined response process is started even when the predetermined key insertion unit is in a specific response state based on the fact that the specific start condition is satisfied, so it is possible to diversify the trigger for starting the predetermined response process. However, in this configuration, the predetermined response process is started when the predetermined key insertion unit is in a specific response state, but with the configuration of feature s1, the predetermined response process does not end just because the predetermined key insertion unit is in a specific response state, but ends when the predetermined key insertion unit is changed from the predetermined response state to the specific response state. As a result, even if the predetermined response process is started when the predetermined key insertion unit is in a specific response state, the predetermined response process is not immediately ended, and the predetermined response process is ended by changing the predetermined key insertion unit from the specific response state to the predetermined response state and then again from the predetermined response state to the specific response state, so it is possible to end the predetermined response process at a timing that is favorable to the manager of the game hall.

Feature s3. The predetermined response starting means starts the predetermined response processing based on the fact that the predetermined key insertion section is in the predetermined response state when supply of operating power is started;
According to feature s2, the specific start condition is satisfied when the supply of operating power is stopped and the supply of operating power is restarted in a situation where the predetermined response process is being executed. gaming machines.

According to feature s3, when the supply of operating power is started, the predetermined response process is started based on the predetermined key insertion unit being in a predetermined response state, making it difficult to perform acts that attempt to start the predetermined response process illegally. In addition, even if the supply of operating power is stopped while the predetermined response process is being executed, if the specific start condition is met when the supply of operating power is resumed, the predetermined response process will be started even if the predetermined key insertion unit is not in the predetermined response state. This makes it possible to prioritize the start of the predetermined response process if the predetermined response process ends midway.

Feature s4. Means for executing profit granting processing in a manner corresponding to a setting value set to be used from among setting values of multiple stages corresponding to the player's advantage level (processing of step S503 and step S504 in the main CPU 63) ),
The gaming machine according to any one of features s1 to s3, wherein the predetermined corresponding process is a process related to the set value.

According to feature s4, it is possible to achieve the above-mentioned excellent effects in processing related to setting values.

Note that for the configuration of features s1 to s4, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the above characteristic group s, it is possible to solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launcher and launched toward the gaming area in response to the player's launch operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, a lottery process is executed by a control means to determine whether or not to generate a gaming state advantageous to the player.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary for the processing in the control means to proceed smoothly, and there is still room for improvement in this regard.

<Feature group>
Feature t1. A setting means for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage (in the first embodiment, a function for executing the processing of steps S205 to S207 in the master CPU 63; in the eleventh embodiment, a function for executing the processing of steps S3106 to S3108 in the master CPU 63; in the twelfth embodiment, a function for executing the processing of steps S3207 to S3209 in the master CPU 63; in the twenty-second embodiment, a function for executing the processing of steps S5605 to S5607 in the master CPU 63; in the forty-ninth embodiment, a function for executing the processing of step SB311 in the master CPU 63; in the fifty-third embodiment, a function for executing the processing of step SB915 in the master CPU 63);
A situation generating means for generating a setting possible situation (a situation in which a setting value update process is executed) in which the setting value to be used can be changed (a function for making a positive determination in step S103 in the main CPU 63 in the first embodiment, a function for making a positive determination in steps S5503 to S5507 in the main CPU 63 in the 22nd embodiment, a function for making a positive determination in step SB113 in the main CPU 63 in the 49th embodiment, and a function for making a positive determination in step SB812 in the main CPU 63 in the 53rd embodiment);
a start response means for changing the setting value from a predetermined start response setting value when the setting possible state is reached (in the first embodiment, a function for executing the process of step S201 in the main CPU 63; in the eleventh embodiment, a function for executing the process of step S3102 in the main CPU 63; in the twelfth embodiment, a function for executing the process of step S3203 in the main CPU 63; in the twenty-second embodiment, a function for executing the process of step S5601 in the main CPU 63; in the forty-ninth embodiment, a function for executing the process of step SB304 in the main CPU 63; and in the fifty-third embodiment, a function for executing the process of step SB905 in the main CPU 63);
A gaming machine comprising:

According to feature t1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, when the setting becomes possible, the setting value is changed from the predetermined starting setting value. As a result, irrespective of the setting value of the object to be used before the setting possible state, in the setting possible state, it is possible to change the setting value from a certain starting setting value. Therefore, the content of the setting value changing operation becomes easy for the operator to understand.

Feature t2. The gaming machine according to feature t1, wherein the setting value corresponding to the start is a setting value with the lowest advantage ("setting 1").

According to feature t2, when a setting-possible situation occurs, the setting value is changed from the setting value with the lowest advantage. This makes it possible to prevent unintended disadvantages to the gaming hall even if the manager of the gaming hall unintentionally ends the setting-possible situation immediately after it occurs, since the setting value with the lowest advantage will be used, even if a game is played in such a situation.

Feature t3: A setting correspondence storage means (setting reference area 341) for storing setting correspondence information corresponding to the setting value set by the setting means;
a selection correspondence storage means (setting update area 342) for storing selection correspondence information corresponding to the setting value selected in the setting possible situation;
Equipped with
The situation generation means is a means for changing the selection correspondence information stored in the selection correspondence storage means so that the setting value to be selected is changed when a change trigger occurs in the settable situation (a function for executing the processes of steps SB307 and SB310 in the main CPU 63 in the 49th embodiment, and a function for executing the processes of steps SB908 and SB914 in the main CPU 63 in the 53rd embodiment),
the setting means stores information corresponding to the selection correspondence information stored in the selection correspondence storage means as the setting correspondence information in the setting correspondence storage means when a termination trigger occurs in the setting possible situation, thereby setting a setting value that was a selection target in the setting possible situation as a target for use;
The gaming machine described in feature t1 or t2, wherein the start response means stores the selection response information corresponding to the setting value of the start response in the selection response memory means when the setting possible situation occurs.

According to feature t3, the setting correspondence storage means stores the setting correspondence information corresponding to the setting value to be used, and the selection correspondence storage means stores the selection correspondence information corresponding to the setting value that is being changed in the setting possible situation. By providing this, it becomes possible to change the setting value in the settable situation while storing and retaining information on the setting value that was set before the settable situation started.

Feature t4. The gaming machine described in feature t3 is characterized in that it is provided with a means (a function for executing the processing of steps SA801 to SA803 in the main CPU 63) for displaying on a predetermined display means (the first to fourth display devices 201 to 204) the setting value corresponding to the selection correspondence information stored in the selection correspondence storage means in the setting possible situation.

Feature t4 makes it possible to change the setting value while checking the setting value being changed in a configurable situation.

Feature t5. In a situation where the setting is not possible, the setting value corresponding to the setting correspondence information stored in the setting correspondence storage means is displayed on a predetermined display means (first to fourth notification display devices 201 to 204). The gaming machine according to feature t3 or t4, characterized in that the gaming machine is equipped with a means for executing the processing in steps SA601 to SA603 in the main CPU 63.

Feature t5 makes it possible to check the currently used setting values as needed.

In addition, for the configuration of features t1 to t5, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

According to the invention related to the above feature t group, it is possible to solve the following problems.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in the gaming machine as exemplified above, it is necessary to have a suitable configuration regarding the setting values that determine the advantage of the gaming machine, and there is still room for improvement in this respect.

<Characteristic U group>
Feature u1. A first control means (MPU62),
a second control means (sound-light side MPU 352) that executes control corresponding to the information transmitted by the first control means;
In a gaming machine equipped with
The first control means includes:
A first transmitting means (in the 49th embodiment, the main side (a function of executing the process of step SB314 in the CPU 63, a function of executing the process of step SB918 in the main CPU 63 in the 53rd embodiment);
a second transmitting means (49th transmitter) for transmitting second start response information (a return command at the time of confirmation or a return command at the time of clearing) based on the fact that the second start status is reached when the supply of operating power is started; In this embodiment, the main CPU 63 has a function of executing step SB118 or step SB207, in the 51st embodiment, the main CPU 63 has a function of executing step SB618, and in the 52nd embodiment, the main CPU 63 has a function of executing step SB118 or SB207. a function of executing the process of step SB725, a function of executing the process of step SB816 in the main CPU 63 in the 53rd embodiment, a function of executing the process of step SC118 in the main CPU 63 in the 54th embodiment),
A gaming machine characterized by comprising:

According to feature u1, in a configuration in which control corresponding to information transmitted by the first control means is executed by the second control means, when the supply of operating power is started, the first control means transmits first start response information based on the first start status, and transmits second start response information based on the second start status. This makes it possible to have control corresponding to the type of start status when the supply of operating power is started be performed not only by the first control means but also by the second control means.

Feature u2. The first control means may perform processing at the time of starting supply of operating power (49th embodiment Steps SB101 to SB122, steps SB601 to SB622 in the 51st embodiment, steps SB701 to SB729 in the 52nd embodiment, steps SB801 to SB818 and steps SB823 to SB826 in the 53rd embodiment, In the embodiment No. 54, the gaming machine according to feature u1, wherein at least part of the processing contents of steps SC101 to SC120 and steps SC125 to SC128) are configured to be different.

According to feature u2, when the supply of operating power is started, at least a part of the processing at the time of starting the supply of operating power in the first control means is performed depending on which of the first start situation and the second start situation. Since the processing contents are different, it becomes possible for the first control means to execute a process corresponding to the start situation as a process when starting the supply of operating power.

Feature u3. The second control means is
a start response execution means (a function of making a positive determination in step SB405 in the audio/optical side CPU 353) for executing a start response process regardless of whether the first start response information is received or the second start response information is received;
a predetermined response execution means (a function for executing the processes of steps SB407, SB409, and SB411 in the audio/optical side CPU 353) for executing a predetermined response process when one of the first start response information and the second start response information is received, and not executing the predetermined response process when the other of the first start response information and the second start response information is received;
A gaming machine according to feature u1 or u2, characterized in that it is equipped with:

According to feature u3, the second control means executes the start response process regardless of whether it receives the first start response information or the second start response information, so it is possible to have the second control means execute the start response process in response to the transmission of any of the start response information from the first control means. Furthermore, the second control means executes a predetermined response process when it receives one of the first start response information and the second start response information, but does not execute the predetermined response process when it receives the other start response information. This makes it possible for the control corresponding to the type of start situation when the supply of operating power is started to be performed not only by the first control means but also by the second control means.

Feature u4. One of the first start situation and the second start situation indicates that a predetermined start response operation (RAM clear operation, setting change operation, or setting confirmation operation) is performed when the supply of operating power is started. Occurs based on
Feature u3, wherein the other of the first start situation and the second start situation occurs based on the predetermined start response operation not being performed when supply of operating power is started. The gaming machine described in .

According to feature u4, when the supply of operating power is started, it is possible to vary the content of the control executed by not only the first control means but also the second control means depending on whether or not a predetermined start-responsive operation is performed.

Feature u5. The first control means is configured to execute a process (steps S8907 to S8920) for controlling the progress of a game after transmitting any one of a plurality of types of start response information including the first start response information and the second start response information;
The gaming machine described in feature u3 or u4 is characterized in that the second control means is configured to execute processing corresponding to the progress of the game (steps SB412 to SB414) after receiving any one of the multiple types of start response information.

According to feature u5, the first control means transmits any of the start response information before starting the process for controlling the progress of the game, and the second control means executes the process corresponding to the progress of the game after receiving any of the start response information. This makes it possible for the second control means to execute the process corresponding to the progress of the game after the first control means is in a situation to execute the process for controlling the progress of the game. In this case, by having the configuration of feature u3, it becomes possible to have the second control means recognize the start trigger of the process corresponding to the progress of the game by using multiple pieces of start response information that differ in whether or not the second control means executes a predetermined response process.

Feature u6. The first control means is
A means for executing a common response process in either the first start status or the second start status when the supply of operating power is started (in the 49th embodiment, a function for executing the processes of steps SB101 to SB103 in the main CPU 63; in the 51st embodiment, a function for executing the processes of steps SB601 to SB603 in the main CPU 63; in the 52nd embodiment, a function for executing the processes of steps SB701 and SB702 in the main CPU 63; in the 53rd embodiment, a function for executing the processes of steps SB801 to SB803 in the main CPU 63; and in the 54th embodiment, a function for executing the processes of steps SC101 to SC103 in the main CPU 63);
a means for executing a specific response process based on the start status of one of the first start status and the second start status when the supply of operating power is started, and not executing the specific response process based on the start status of the other of the first start status and the second start status when the supply of operating power is started (a function for executing the process of step SB112, step SB115 or step SB117 in the main CPU 63 in the 49th embodiment; a function for executing the process of step SB612, step SB615 or step SB617 in the main CPU 63 in the 51st embodiment; a function for executing the process of step SB711, step SB718 or step SB721 in the main CPU 63 in the 53rd embodiment; a function for executing the process of step SB810, step SB813 or step SB815 in the main CPU 63 in the 54th embodiment;
A gaming machine described in any one of features u1 to u5, characterized in that it is equipped with:

According to feature u6, the first control means executes the common response process regardless of whether the first start situation is the first start situation or the second start situation. The specific response process is executed in one of the two start situations. As a result, the first control means executes the common response process regardless of the start situation, and the first control means executes the process corresponding to the type of start situation. It becomes possible to do so. In this case, the first control means has the configuration of feature u1 above, and the first control means transmits the first start correspondence information based on the first start situation, and transmits the first start correspondence information based on the second start situation. 2. Since the start response information is transmitted, the control corresponding to the type of start situation when the supply of operating power is started can be performed not only by the first control means but also by the second control means. Become.

Feature u7. The first control means includes:
Setting means (in the 49th embodiment, a function of executing the process of step SB311 in the main CPU 63, In the embodiment, a function of executing the process of step SB915 in the main CPU 63);
Based on the fact that the first setting-related operation (the ON operation of the setting key insertion part 68a and the pressing operation of the reset button 68c) is performed when the supply of operating power is started, the first starting situation is determined. A first response execution means (in the main CPU 63 in the forty-ninth embodiment) that brings about a setting possible situation (a situation where setting value update processing is executed) in which the setting value to be used can be changed. A function to make an affirmative determination in step SB114, a function to make an affirmative determination in step SB614 in the main CPU 63 in the 51st embodiment, a function to make an affirmative determination in step SB717 in the main CPU 63 in the 52nd embodiment, In the 53rd embodiment, a function of making an affirmative determination in step SB812 in the main CPU 63; in the 54th embodiment, a function of making an affirmative determination in step SC113 in the main CPU 63);
Based on the fact that the second setting-related operation (the ON operation of the setting key insertion part 68a) is performed when the supply of operating power is started, the second starting situation is set by the setting means. a second response execution means (a function for executing a setting confirmation process in the main CPU 63) for notifying the setting values to be used;
The gaming machine according to any one of features u1 to u6, characterized by comprising:

According to feature u7, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In addition, in order to change the set value to be used, it is necessary to perform the first setting related operation when the supply of operating power is started, so any act of attempting to illegally change the set value to be used It is possible to make it difficult to perform. In addition, when the supply of operating power is started, the setting value to be used will be notified by performing the second setting-related operation, so the administrator of the game hall can check the setting value to be used as necessary. becomes possible. In this case, the first control means has the configuration of feature u1 above, and the first control means transmits the first start correspondence information based on the first start situation, and transmits the first start correspondence information based on the second start situation. Since the second start correspondence information is transmitted, it is possible for the second control means to perform different controls depending on whether the setting is possible or when the setting value to be used is notified.

Feature u8. The first control means is
A means for executing a profit awarding process in a manner corresponding to a set value set as a target for use from among a plurality of set values corresponding to the player's advantage level (a function for executing the processes of steps S503 and S504 in the master CPU 63);
A first response execution means (a function of executing a setting value update process or a setting confirmation process in the main CPU 63) that executes a predetermined setting-related process regarding the setting value based on the first start status when the supply of operating power is started;
a second response execution means for executing a different response process different from the predetermined setting-related process based on the second start status when the supply of operating power is started (a function for executing the process of step SB117 in the main CPU 63 in the 49th embodiment, a function for executing the process of step SB617 in the main CPU 63 in the 51st embodiment, a function for executing the process of step SB721 in the main CPU 63 in the 53rd embodiment, a function for executing the process of step SB815 in the main CPU 63, and a function for executing the process of step SC117 in the main CPU 63 in the 54th embodiment);
A gaming machine described in any one of features u1 to u7, characterized in that it is equipped with:

According to feature u8, the setting value to be used is set from among multiple setting values corresponding to the player's advantage, so the player will expect the more advantageous setting value to be used. In addition, when the supply of operating power is started, a predetermined setting-related process is executed for the setting value based on the first start situation, and a different response process different from the predetermined setting-related process is executed based on the second start situation when the supply of operating power is started. This makes it possible to generate a case where the predetermined setting-related process is executed or not executed depending on the start situation when the supply of operating power is started. In this case, the configuration of feature u1 is provided, and the first control means transmits the first start response information based on the first start situation and transmits the second start response information based on the second start situation, so that it is possible to make the second control means perform different control depending on the case where the first control means executes the predetermined setting-related process or not.

Feature u9. The gaming machine described in feature u8, wherein the second response execution means executes a process for initializing a predetermined memory area provided in the first control means as the separate response process.

According to feature u9, it is possible to cause a case where a specified setting-related process is executed and a specified storage area of the first control means is initialized depending on the start status when the supply of operating power is started. In this case, the configuration of feature u1 is provided, and the first control means transmits the first start response information based on the first start status and transmits the second start response information based on the second start status, so that it is possible for the second control means to perform different controls depending on whether the specified setting-related process is executed by the first control means or whether the specified storage area is initialized.

Feature u10. The second control means
When one of the first start correspondence information and the second start correspondence information is received, the time correspondence information measured by the time measuring means (RTC 356) that enables time measurement is stored in a time correspondence memory. Means for storing in the means (RTC memory 357) (in the 49th embodiment, a function of executing the process of step SB407 in the sound and light side CPU 353, and in the 50th embodiment, a function of executing the process of step SB507 in the sound and light side CPU 353) function) and
Means for executing time-based processing when the processing execution timing is reached based on the time-related information stored in the time-based storage means (in the 49th embodiment, executing the process of step SB413 in the audio-light side CPU 353) (in the fiftieth embodiment, a function of executing the process of step SB513 in the sound and light side CPU 353),
The gaming machine according to any one of features u1 to u9.

According to feature u10, the second control means executes the time correspondence processing when the processing execution timing is reached based on the time correspondence information stored in the time correspondence storage means, so it is possible to execute the time correspondence processing at a timing when a specified time is reached. In this case, when one of the first start correspondence information and the second start correspondence information is received, the time correspondence information measured by the time measurement means is stored in the time correspondence storage means. This makes it possible to select between a situation in which the time correspondence information is newly stored in the time correspondence storage means and a situation in which it is not newly stored.

Note that for the configuration of features u1 to u10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature v group>
Feature v1. A time storage execution means (a function for executing the process of step SB407 in the sound/light side CPU 353 in the 49th embodiment, and a function for executing the process of step SB507 in the sound/light side CPU 353 in the 50th embodiment) for storing time correspondence information measured by a time measurement means (RTC 356) that enables time measurement in a time correspondence storage means (RTC memory 357);
a time correspondence execution means for executing a time correspondence process when a processing execution timing is reached based on the time correspondence information stored in the time correspondence storage means (a function for executing the process of step SB413 in the sound/light side CPU 353 in the 49th embodiment, and a function for executing the process of step SB513 in the sound/light side CPU 353 in the 50th embodiment);
Equipped with
The time memory execution means stores the time correspondence information measured by the time measurement means in the time correspondence storage means based on a first start situation when the supply of operating power is started (in the forty-ninth embodiment, a case where the power ON operation for the pachinko machine 10 is performed in a situation where no operation is performed, and in the fifty-ninth embodiment, a case where the power ON operation for the pachinko machine 10 is performed in a situation where a RAM clear operation, a setting change operation, or a setting confirmation operation is performed) and does not store the time correspondence information measured by the time measurement means in the time correspondence storage means based on a second start situation when the supply of operating power is started (in the forty-ninth embodiment, a case where the power ON operation for the pachinko machine 10 is performed in a situation where a RAM clear operation, a setting change operation, or a setting confirmation operation is performed, and in the fifty-ninth embodiment, a case where the power ON operation for the pachinko machine 10 is performed in a situation where no operation is performed).

According to feature v1, the time-based processing is executed when the processing execution timing is reached based on the time-based information stored in the time-based storage means, so the time-based processing is executed at the timing when the predetermined time has arrived. It becomes possible to make it execute. In this case, when the supply of operating power is started and the first start situation is reached, the time correspondence information measured by the time measuring means is stored in the time correspondence storage means, and the supply of operating power is started. In this case, if the second start situation occurs, the time correspondence information is not stored in the time correspondence storage means. This makes it possible to select a situation in which the time correspondence information is newly stored in the time correspondence storage means and a situation in which it is not newly stored.

Features v2. One of the first start situation and the second start situation indicates that a predetermined start response operation (RAM clear operation, setting change operation, or setting confirmation operation) is performed when the supply of operating power is started. Occurs based on
Feature v1, characterized in that the other of the first start situation and the second start situation occurs based on the predetermined start response operation not being performed when the supply of operating power is started. The gaming machine described in .

According to feature v2, when the supply of operating power starts, it is possible to select between a situation in which time correspondence information is newly stored in the time correspondence storage means and a situation in which time correspondence information is not newly stored, depending on whether or not a specified start correspondence operation is performed.

Features v3. The second start situation occurs based on a predetermined start response operation (RAM clear operation, setting change operation, or setting confirmation operation) being performed when the supply of operating power is started,
The gaming machine according to feature v1 or v2, wherein the first start situation occurs based on the fact that the predetermined start corresponding operation is not performed when supply of operating power is started.

According to feature v3, if a predetermined start response operation is not performed when the supply of operating power is started, the time correspondence information is newly stored in the time correspondence storage means, and the supply of operating power is started. In this case, when a predetermined start corresponding operation is performed, the time correspondence information is not stored in the time correspondence storage means. As a result, when the supply of operating power is started, the time correspondence information is basically newly stored in the time correspondence storage means, and the time can be changed by performing a predetermined start correspondence operation as necessary. It becomes possible to prevent correspondence information from being stored in the time correspondence storage means.

Features v4. When the supply of operating power is started, specific response processing is executed based on the fact that one of the first start situation and the second start situation is established, and the supply of operating power is started. means for not executing the specific response process based on the fact that the other of the first start situation and the second start situation has occurred in the case (in the forty-ninth embodiment, step SB112 in the main CPU 63, step A function to execute the process of SB115 or step SB117, a function to execute the process of step SB612, step SB615 or step SB617 in the main CPU 63 in the 51st embodiment, a function to execute the process in the main CPU 63 in step SB711 and step SB11 in the 52nd embodiment A function to execute the process of SB718 or step SB721, a function to execute the process of step SB810, step SB813, or step SB815 in the main CPU 63 in the 53rd embodiment, and a function to execute the process in the main CPU 63 in step SC111 and step SB815 in the 54th embodiment. The gaming machine according to any one of features v1 to v3, characterized in that the gaming machine is equipped with a function of executing the process of step SC115 or step SC117.

According to feature v4, the specific response process is executed when the start situation is one of the first start situation and the second start situation. In this case, the time correspondence information is newly stored in the time correspondence storage means based on the configuration of feature v1 described above, based on the fact that the first start situation is set, and the time correspondence information is newly stored in the time correspondence storage means based on the fact that the second start situation is set. The correspondence information is not stored in the time correspondence storage means. This makes it possible to associate whether or not specific correspondence processing is executed with whether or not new time correspondence information is stored.

Features v5. Execute specific response processing based on the fact that the second start situation is reached when the supply of operating power is started, and the first start situation is reached when the supply of operating power is started. (in the 49th embodiment, a function of executing the process of step SB112, step SB115, or step SB117 in the main CPU 63; in the 51st embodiment, step SB612 in the main CPU 63; A function to execute the process of step SB615 or step SB617, a function to execute the process of step SB711, step SB718 or step SB721 in the main CPU 63 in the 52nd embodiment, step SB810 in the main CPU 63 in the 53rd embodiment, Features v1 to v4 are provided with a function of executing the process of step SB813 or step SB815 (in the 54th embodiment, a function of executing the process of step SC111, step SC115, or step SC117 in the main CPU 63) The gaming machine according to any one of the above.

According to feature v5, the specific response process is executed when the starting situation is the second starting situation among the first starting situation and the second starting situation. In this case, the configuration of feature v1 is provided, and the time correspondence information is newly stored in the time correspondence storage means based on the first start situation, and the time correspondence information is newly stored in the time correspondence storage means based on the second start situation. The correspondence information is not stored in the time correspondence storage means. This makes it possible to prevent time correspondence information from being newly stored in the time correspondence storage means when specific correspondence processing is executed.

Feature v6. A gaming machine according to feature v4 or v5, characterized in that it is provided with a means for executing a common response process in either the first start status or the second start status when the supply of operating power is started (in the 49th embodiment, a function for executing the processes of steps SB101 to SB103 in the master CPU 63; in the 51st embodiment, a function for executing the processes of steps SB601 to SB603 in the master CPU 63; in the 52nd embodiment, a function for executing the processes of steps SB701 and SB702 in the master CPU 63; in the 53rd embodiment, a function for executing the processes of steps SB801 to SB803 in the master CPU 63; and in the 54th embodiment, a function for executing the processes of steps SC101 to SC103 in the master CPU 63).

According to feature v6, a common response process is executed regardless of whether the start status is the first start status or the second start status, while a specific response process is executed when the start status is either the first start status or the second start status. This makes it possible to execute a common response process regardless of the start status, while also executing a process that corresponds to the type of start status.

Feature v7. A means for executing a profit awarding process in a manner corresponding to a set value set as a use target from among a plurality of set values corresponding to the player's advantage level (a function for executing the processes of steps S503 and S504 in the master CPU 63);
A setting related execution means (a function of executing a setting value update process or a setting confirmation process in the main CPU 63) that executes a predetermined setting related process regarding the setting value when the supply of operating power is started;
Equipped with
A gaming machine described in any one of features v1 to v6, characterized in that the setting-related execution means executes the specified setting-related processing based on the fact that one of the first start status and the second start status is reached when the supply of operating power is started.

According to feature v7, the setting value to be used is set from among multiple setting values corresponding to the player's degree of advantage, so the player will expect the more advantageous setting value to be used. In addition, when the supply of operating power begins, a predetermined setting-related process is executed based on whether the start status is one of the first start status and the second start status. This makes it possible to associate whether the predetermined setting-related process is executed with whether new time correspondence information is stored.

Features v8. Initializing a predetermined storage area provided in the control means based on one of the first start situation and the second start situation when the supply of operating power is started. means (in the 49th embodiment, the function of executing the process of step SB117 in the main CPU 63; in the 51st embodiment, the function of executing the process of step SB617 in the main CPU 63; in the 52nd embodiment, the function of executing the process of step SB617 in the main CPU 63) A function of executing the process of step SB721, a function of executing the process of step SB815 in the main side CPU 63 in the 53rd embodiment, a function of executing the process of step SC117 in the main side CPU 63 in the 54th embodiment). The gaming machine according to any one of features v1 to v7.

According to feature v8, when the supply of operating power is started, a predetermined storage area of the first control means is initialized based on whether the start status is one of the first start status and the second start status. This makes it possible to associate whether the predetermined storage area has been initialized with whether or not new time correspondence information has been stored.

Note that for the configuration of features v1 to v8, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the feature u group and the feature v group, the following problems can be solved.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, processing needs to be performed appropriately when the supply of operating power is started, and there is still room for improvement in this respect.

<Characteristic W group>
Feature w1. Predetermined display means (first to fourth notification display devices 201 to 204),
a predetermined display control means (a function for executing second timer interrupt processing in the main CPU 63) that controls the display of the predetermined display means;
Means for executing profit granting processing in a manner corresponding to a setting value set to be used from among setting values of multiple stages corresponding to the player's advantage level (processing of step S503 and step S504 in the main CPU 63) ) and
a setting-related execution means (a function of executing a setting value update process or a setting confirmation process in the main CPU 63) that executes a predetermined setting-related process regarding the setting value when the supply of operating power is started;
Equipped with
The predetermined display control means includes:
means for causing the predetermined display means to display the setting values when the predetermined setting-related processing is executed (a function of executing the processing of step S9004 and step S9006 in the main CPU 63);
After the predetermined setting-related process is executed, check control means (in the thirty-seventh embodiment, the main check control means) causes the predetermined display means to perform a check display that allows checking whether or not the predetermined display means is normal. A function of executing the process of step S9519 in the side CPU 63, a function of executing the process of step SA419 in the main side CPU 63 in the 45th embodiment, a function of executing the process of step SA919 in the main side CPU 63 in the 46th embodiment, In the 49th embodiment, the function of executing step SB123 in the main CPU 63, in the 51st embodiment, the function of executing step SB623 in the main CPU 63, and in the 52nd embodiment, step SB712 in the main CPU 63 and a function of executing the process of step SB719, a function of executing the process of step SB817 in the main side CPU 63 in the 53rd embodiment, a function of executing the process of step SC119 in the main side CPU 63 in the 54th embodiment),
A gaming machine characterized by comprising:

According to feature w1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In addition, when a predetermined setting-related process is executed, the setting value is displayed on the predetermined display means, so the game hall manager can grasp the current setting value by checking the predetermined display means. becomes. Further, by displaying the check display on the predetermined display means, it becomes possible to confirm whether or not the predetermined display means is normal.

In this case, when the supply of operating power is started, a predetermined setting-related process is executed, and then a check display is displayed on the predetermined display means. This makes it possible to prioritize the display of the setting value when the predetermined setting-related process is executed over the check display, without the need for an adjustment process such as terminating the check display midway when the predetermined setting-related process is started.

Feature w2. The check control means displays the check display regardless of whether the supply of operating power is started, the predetermined setting-related process is executed, or the predetermined setting-related process is not executed. The gaming machine according to feature w1, wherein the gaming machine causes the predetermined display means to perform the following.

According to feature w2, when the supply of operating power is started, a check display is performed on the predetermined display means regardless of whether or not a predetermined setting-related process is executed. This makes it possible to confirm whether or not the predetermined display means is normal regardless of the situation when the supply of operating power is started.

Feature w3. Regardless of whether the predetermined setting-related process is executed or the predetermined setting-related process is not executed as the process at the time of supply start that is executed when the supply of operating power is started. A common process is set that is a process that is executed in common and is a process that is executed later than the predetermined setting-related process when the predetermined setting-related process is executed;
The gaming machine according to feature w1 or w2, wherein a process of causing the predetermined display means to start the check display is set as the common process.

According to feature w3, when the supply of operating power is started, a check display is performed on the predetermined display means regardless of whether or not a predetermined setting-related process is executed. This makes it possible to confirm whether or not the predetermined display means is normal regardless of the situation when the supply of operating power is started. Further, since the process for starting the check display on the predetermined display means is set as a common process, it is possible to achieve the excellent effects already described while simplifying the process configuration.

Feature w4. A means for executing processing for advancing the game after the supply of operating power is started and the processing at the start of supply is completed (a function for executing the processing of steps S8907 to S8920 in the main CPU 63),
The gaming machine according to any one of features w1 to w3, characterized in that processing for advancing the game can be started even in a situation where the check display is being executed on the predetermined display means. .

According to feature w4, processing for progressing the game can be started even when a check display is being executed on the specified display means, so that even if a check display is executed on the specified display means after execution of the specified setting-related processing, it is possible to prevent a delay in the start timing of processing for progressing the game.

Features w5. Delay execution means (executes the processes of step SB715 and step SB724 in the main CPU 63 function),
The check control means causes the predetermined display means to start displaying the check display before the delay processing is started if the predetermined setting-related processing is not executed when the supply of operating power is started. The gaming machine according to any one of features w1 to w4.

According to feature w5, the initial settings of various devices are completed by executing a delay process that makes it possible to delay the start of the process for progressing the game when the supply of operating power is started. It becomes possible to start processing for advancing the game later. In this case, if the predetermined setting-related processing is not executed when the supply of operating power is started, a check display on the predetermined display means is started before the delay processing is started. This makes it possible to display a check display using the period during which the start of the process for advancing the game is delayed.

Feature w6. The gaming machine according to feature w5, wherein the delay execution means does not execute the delay process when the predetermined setting-related process is executed.

According to feature w6, since a predetermined period of time is required when a predetermined setting-related process is executed, it is possible to complete the initial settings of various devices before the process for progressing the game is started. In this case, by preventing the delay process from being executed when the predetermined setting-related process is executed, it is possible to prevent the start of the process for progressing the game from being extremely delayed in a situation where the predetermined setting-related process has been executed.

Features w7. The setting-related execution means includes:
When the supply of operating power is started, the setting value to be used is changed based on the fact that the first setting-related operation (the ON operation of the setting key insertion part 68a and the pressing operation of the reset button 68c) is performed. A situation generating means (in the 49th embodiment, a function of making an affirmative determination at step SB114 in the main CPU 63, In the 51st embodiment, the function of making an affirmative determination in step SB614 in the main CPU 63, in the 52nd embodiment, the function of making an affirmative determination in step SB717 in the main CPU 63, and in the 53rd embodiment, the step in the main CPU 63 (a function to make an affirmative determination at SB812, a function to make an affirmative determination at step SC113 in the main CPU 63 in the 54th embodiment);
Generating a notification so that the setting value to be used is notified based on a second setting-related operation (ON operation of the setting key insertion part 68a) when the supply of operating power is started. means (a function of executing a setting confirmation process in the main CPU 63);
The gaming machine according to any one of features w1 to w6, characterized by comprising:

According to feature w7, in order to change the setting value to be used, it is necessary to perform the first setting-related operation when the supply of operating power is started, so the setting value to be used cannot be changed illegally. This makes it possible to make it difficult to perform the desired action. In addition, when the supply of operating power is started, the setting value to be used will be notified by performing the second setting-related operation, so the administrator of the game hall can check the setting value to be used as necessary. becomes possible.

Feature w8. A gaming machine according to any one of features w1 to w7, characterized in that the predetermined display control means has a means for displaying information corresponding to the results of game history management on the predetermined display means (a function for executing the processes of steps S8708, S8709, and S9107 in the main CPU 63).

According to feature w8, it is possible to notify the gaming hall manager of the gaming history management results. In this case, by having the configuration of the feature w1 described above and performing a check display on the predetermined display means, it is possible to check whether information corresponding to the management result of the gaming history is being accurately displayed on the predetermined display means. It becomes possible to confirm.

Note that for the configuration of features w1 to w8, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature x group>
Features x1. Predetermined display means (first to fourth notification display devices 201 to 204),
a predetermined display control means (a function for executing second timer interrupt processing in the main CPU 63) that controls the display of the predetermined display means;
A means for executing a process for advancing the game after the supply of operating power is started and the situation after the start of supply is completed (a function for executing the process of steps S8907 to S8920 in the main CPU 63);
Equipped with
The predetermined display control means is a check control means for causing the predetermined display means to perform a check display that allows checking whether or not the predetermined display means is normal in the situation after the start of supply (according to the thirty-sixth embodiment). In the 52nd embodiment, the main side CPU 63 has a function of executing the process of step S9405, and in the 52nd embodiment, the main side CPU 63 has a function of executing the process of step SB713 and step SB722),
A delay situation in which it is possible to delay the start of the process for advancing the game in a situation where the check display is performed on the predetermined display means (in the 36th embodiment, a negative determination is made in step S9406) A gaming machine characterized by having a configuration in which a situation in which the main side CPU 63 executes the processing of step SB715 and step SB724 can occur.

According to feature x1, when the supply of operating power is started, a check display is performed on the predetermined display means, thereby making it possible to confirm whether or not the predetermined display means is normal. In this case, in a situation where a check display is being performed, a delay situation may occur in which it is possible to delay the start of processing for advancing the game. This makes it possible to ensure an opportunity to check the check display on the predetermined display means before starting the process for advancing the game. Furthermore, due to the occurrence of a delay situation, it becomes possible to complete the initial settings of various devices before the processing for advancing the game is started. Then, it becomes possible to make a check display on the predetermined display means by utilizing this delay situation.

Features x2. Means for causing the delay situation to occur in a situation where the check display is performed on the predetermined display means (in the 36th embodiment, a function of executing the process of step S9406 in the main CPU 63, in the 52nd embodiment) The gaming machine according to feature x1, characterized in that the gaming machine has a function of executing the processing of step SB715 and step SB724 in the main CPU 63.

According to feature x2, since the situation where the check display is being performed is a delayed situation, the process for advancing the game should not be started while the check display is being performed. becomes possible.

Feature x3. A gaming machine according to feature x1 or x2, characterized in that the delay state occurs when the predetermined display means is displaying the check display based on the first start state when the supply of operating power is started, and the delay state does not occur when the predetermined display means is displaying the check display based on the second start state when the supply of operating power is started.

According to feature x3, in the first start status, a delay status occurs when the check display is being displayed on the specified display means, making it possible to prevent processing for progressing the game from being started while the check display is being displayed, and in the second start status, a delay status does not occur when the check display is being displayed on the specified display means, making it possible to prevent the timing of starting processing for progressing the game from being extremely delayed.

Features x4. Means for executing profit granting processing in a manner corresponding to a setting value set to be used from among setting values of multiple stages corresponding to the player's advantage level (processing of step S503 and step S504 in the main CPU 63) ) and
a setting-related execution means (a function of executing a setting value update process or a setting confirmation process in the main CPU 63) that executes a predetermined setting-related process regarding the setting value when the supply of operating power is started;
Equipped with
The first start situation is a situation in which the predetermined setting-related process is not executed in the post-supply start situation;
The gaming machine according to feature x3, wherein the second start situation is a situation in which the predetermined setting-related process is executed in the after-supply start situation.

According to feature x4, since a predetermined period of time is required when a predetermined setting-related process is executed, it is possible to complete the initial settings of various devices before the process for advancing the game is started. Become. In this case, when a predetermined setting-related process is executed, the predetermined setting-related process is executed by preventing a delay situation from occurring in a situation where a check display is displayed on the predetermined display means. It is possible to prevent the start of processing for advancing the game from being extremely delayed under certain circumstances.

Features x5. The setting-related execution means includes:
When the supply of operating power is started, the setting value to be used is changed based on the fact that the first setting-related operation (the ON operation of the setting key insertion part 68a and the pressing operation of the reset button 68c) is performed. A situation generating means (in the 49th embodiment, a function of making an affirmative determination at step SB114 in the main CPU 63, In the 51st embodiment, the function of making an affirmative determination at step SB614 in the main CPU 63, in the 52nd embodiment, the function of making an affirmative determination in step SB717 of the main CPU 63, and in the 53rd embodiment, the step in the main CPU 63 (a function to make an affirmative determination at SB812, a function to make an affirmative determination at step SC113 in the main CPU 63 in the 54th embodiment);
Generating a notification so that the setting value to be used is notified based on a second setting-related operation (ON operation of the setting key insertion part 68a) when the supply of operating power is started. means (a function of executing a setting confirmation process in the main CPU 63);
The gaming machine according to feature x4, comprising:

According to feature x5, in order to change the setting value to be used, it is necessary to perform a first setting-related operation when the supply of operating power starts, making it possible to make it difficult to illegally change the setting value to be used. In addition, the setting value to be used is notified by performing a second setting-related operation when the supply of operating power starts, making it possible for the manager of the amusement hall to check the setting value to be used as necessary.

Feature x6. A gaming machine according to any one of features x1 to x5, characterized in that the predetermined display control means has a means for displaying information corresponding to the results of game history management on the predetermined display means (a function for executing the processes of steps S8708, S8709, and S9107 in the main CPU 63).

According to feature x6, it becomes possible to notify the gaming hall manager of the gaming history management results. In this case, by having the configuration of feature x1 above and performing a check display on the predetermined display means, it is possible to check whether the information corresponding to the management result of the gaming history is being accurately displayed on the predetermined display means. It becomes possible to confirm.

Note that for the configuration of features x1 to x6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

The invention relating to the above group of features w and group of features x can solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entrance section provided in the gaming area, the gaming ball is paid out from a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known in pachinko gaming machines, in which the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, there is a need for a configuration that allows it to be confirmed whether or not the display on the predetermined display means is being performed accurately, and there is still room for improvement in this regard. be.

<Feature y group>
Feature y1. A setting means for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level (in the forty-ninth embodiment, a function for executing the process of step SB311 in the master CPU 63; in the fifty-third embodiment, a function for executing the process of step SB915 in the master CPU 63);
a status generating means for generating a setting possible status (a status in which a setting value update process is executed) in which the setting value to be used can be changed (in the 49th embodiment, a function for making an affirmative determination at step SB114 in the main CPU 63; in the 51st embodiment, a function for making an affirmative determination at step SB614 in the main CPU 63; in the 52nd embodiment, a function for making an affirmative determination at step SB717 in the main CPU 63; in the 53rd embodiment, a function for making an affirmative determination at step SB812 in the main CPU 63; and in the 54th embodiment, a function for making an affirmative determination at step SC113 in the main CPU 63);
a setting monitoring means for executing a setting monitoring process for monitoring whether or not the setting value of the target to be used is abnormal (a function for executing the process of step SB106 in the main CPU 63 in the 49th embodiment, a function for executing the process of step SB606 in the main CPU 63 in the 51st embodiment, a function for executing the process of step SB705 in the main CPU 63 in the 53rd embodiment, a function for executing the process of step SB806 in the main CPU 63 in the 54th embodiment, and a function for executing the process of step SC106 in the main CPU 63);
Equipped with
A gaming machine characterized in that the setting monitoring process is included in the supply start process executed when the supply of operating power to a control means having the setting means is started (steps SB101 to SB122 in the 49th embodiment, steps SB601 to SB622 in the 51st embodiment, steps SB701 to SB729 in the 52nd embodiment, steps SB801 to SB818 and steps SB823 to SB826 in the 53rd embodiment, and steps SC101 to SC120 and steps SC125 to SC128 in the 54th embodiment).

According to feature y1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Further, since a setting monitoring process is executed to monitor whether or not the setting value to be used is abnormal, it is possible to deal with it if the setting value to be used is abnormal. In addition, since the settings monitoring process is included in the process at the start of supply, it is possible to prevent the process to proceed with the game from starting even though the setting value to be used is abnormal. becomes.

Feature y2. The gaming machine described in feature y1, characterized in that the setting monitoring means executes the setting monitoring process each time a monitoring trigger occurs, even after the processing at the start of the supply has ended.

According to feature y2, after the processing at the start of supply is completed, the setting monitoring process is executed each time a monitoring trigger occurs, making it easier to identify if the setting value of the target to be used is abnormal.

Feature y3. A means for executing periodically activated interrupt processing (a function for executing the first timer interrupt processing in the main CPU 63),
The gaming machine according to feature y2, wherein the interrupt processing includes the setting monitoring processing.

According to feature y3, the setting monitoring process is executed each time the device is started periodically, which makes it possible to increase the frequency of monitoring whether the setting values of the target device are abnormal.

Feature y4. The gaming machine according to any one of features y1 to y3, characterized in that the setting monitoring means includes a restricting means (in the 49th embodiment, a function for executing step SB119 in the master CPU 63; in the 51st embodiment, a function for executing step SB619 in the master CPU 63; in the 52nd embodiment, a function for executing step SB726 in the master CPU 63; in the 53rd embodiment, a function for executing step SB823 in the master CPU 63; and in the 54th embodiment, a function for executing step SC125 in the master CPU 63) that sets the setting monitoring means to a restricted state in which the execution of a predetermined progress process for progressing the game is restricted based on the determination that the setting value of the target to be used is abnormal in the setting monitoring process.

According to feature y4, when it is specified that the setting value to be used is abnormal, execution of a predetermined progress process for advancing the game is regulated, so even if the setting value to be used is abnormal. It becomes possible to prevent the game from being started regardless of the situation.

Feature y5. Means for canceling the restricted state based on the occurrence of the setting possible situation (in the 49th embodiment, a function of executing the process of step SB303 in the main CPU 63, and in the 53rd embodiment, a function of executing step SB904 in the main CPU 63) The gaming machine according to feature y4, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature y5, when the situation where the setting value of the usage target is abnormal is canceled, it is possible to make a new setting of the setting value of the usage target.

Feature y6. The gaming machine according to feature y4 or y5, wherein the regulating means is configured to return to the regulated state when the supply of operating power is resumed even if the supply of operating power is stopped while the gaming machine is in the regulated state.

Feature y6 makes it possible to prevent a state in which the execution of a specified progress process is restricted due to an abnormal setting value of the target device from being released simply by stopping the supply of operating power.

Feature y7. Features y4 to 4, characterized in that the device is provided with means for executing non-restrictive processing different from the predetermined progress processing even in the regulated state (a function for executing the processing of steps S8901 to S8905 in the main CPU 63). The gaming machine according to any one of y6.

According to feature y7, even in a situation where the execution of the predetermined progress process is restricted due to an abnormality in the set value of the usage target, the non-restricted process can be executed. This makes it possible to ensure execution of necessary processing even in a restricted state.

Feature y8. The gaming machine described in feature y7, characterized in that the non-regulated processing includes a power outage monitoring process (step S8901) for monitoring the occurrence of a power outage.

According to feature y8, power outage monitoring processing is performed even in a restricted state, so that if a power outage occurs in a restricted state, it is possible to respond appropriately.

Feature y9. The gaming machine according to any one of features y1 to y8, characterized in that the setting monitoring means includes a means for executing a notification that allows the player to recognize that the setting possible situation should be generated based on the determination that the setting value of the target to be used is abnormal in the setting monitoring process (a function for executing the process of step SB121 in the master CPU 63 in the 49th embodiment, a function for executing the process of step SB621 in the master CPU 63 in the 51st embodiment, a function for executing the process of step SB728 in the master CPU 63 in the 53rd embodiment, a function for executing the process of step SB825 in the master CPU 63, and a function for executing the process of step SC127 in the master CPU 63 in the 54th embodiment).

According to feature y9, when it is determined that the setting value of the target to be used is abnormal, a notification is issued to enable the player to recognize that a setting possible situation should be generated, so that when the setting value of the target to be used becomes abnormal, it is possible to urge the manager of the game hall to resolve the abnormality.

In addition, for the configuration of features y1 to y9, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, Any one or more of the features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied. This allows for a synergistic effect to be achieved by combining the features.

According to the invention related to the above characteristic group y, it is possible to solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entrance section provided in the gaming area, the gaming ball is paid out from a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known in pachinko gaming machines, in which the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in gaming machines such as those exemplified above, it is necessary to suitably manage the setting values that determine the advantage of the gaming machine, and there is still room for improvement in this respect.

<Feature z group>
Feature z1. A predetermined monitoring means for monitoring whether or not a predetermined abnormality has occurred with respect to information stored in a predetermined storage area (work area 221 for specific control) when the supply of operating power is started (in the 33rd embodiment, a function for executing the processes of steps S7906 and S7909 in the main CPU 63, in the 35th embodiment, a function for executing the processes of steps S8807 and S8810 in the main CPU 63, in the 36th embodiment, a function for executing the processes of steps S9408 and S9411 in the main CPU 63, in the 37th embodiment, a function for executing the processes of steps S9506 and S9509 in the main CPU 63, in the 42nd embodiment, a function for executing the processes of steps S9905 and S9908 in the main CPU 63, in the 45th embodiment, a function for executing the processes of steps S1000 and S1000 in the main CPU 63, in the 46th embodiment, a function for executing the processes of steps S1001 and S1001 in the main CPU 63, in the 47th embodiment, a function for executing the processes of steps S1002 and S1002 in the main CPU 63, in the 48th embodiment, a function for executing the processes of steps S1003 and S1003 in the main CPU 63, in the 49th embodiment, a function for executing the processes of steps S1004 and S1004 in the main CPU 63, in the 50th embodiment, a function for executing the processes of steps S1005 and S1006 in the main CPU 63, in the 51st embodiment, a function for executing the processes of steps S1006 and S1009 in the main CPU 63, in the 52nd embodiment, a function for executing the processes of steps S1005 and S1008 in the main CPU 63, in the 52nd in the 46th embodiment, a function of executing the processes of steps SA406 and SA409 in the main CPU 63; in the 49th embodiment, a function of executing the processes of steps SB104 to SB106 in the main CPU 63; in the 51st embodiment, a function of executing the processes of steps SB604 to SB606 in the main CPU 63; in the 52nd embodiment, a function of executing the processes of steps SB703 to SB705 in the main CPU 63; in the 53rd embodiment, a function of executing the processes of steps SB804 to SB806 in the main CPU 63; and in the 54th embodiment, a function of executing the processes of steps SC104 to SC106 in the main CPU 63).
A restricting means for restricting the execution of a predetermined progress process for progressing a game based on the occurrence of the predetermined abnormality being identified by the predetermined monitoring means (a function for executing the process of step S7910 in the master CPU 63 in the 33rd embodiment, a function for executing the process of step S8811 in the master CPU 63 in the 35th embodiment, a function for executing the process of step S9412 in the master CPU 63 in the 37th embodiment, a function for executing the process of step S9510 in the master CPU 63 in the 42nd embodiment, a function for executing the process of step S9909 in the master CPU 63 in the 45th embodiment, in the forty-sixth embodiment, a function for executing the process of step SA410 in the main CPU 63; in the forty-ninth embodiment, a function for executing the process of step SA911 in the main CPU 63; in the forty-ninth embodiment, a function for executing the process of step SB119 in the main CPU 63; in the fifty-first embodiment, a function for executing the process of step SB619 in the main CPU 63; in the fifty-second embodiment, a function for executing the process of step SB726 in the main CPU 63; in the fifty-third embodiment, a function for executing the process of step SB823 in the main CPU 63; and in the fifty-fourth embodiment, a function for executing the process of step SC125 in the main CPU 63).
A means for executing a non-restricted process different from the predetermined progress process even in the restricted state (a function for executing the processes of steps S8201 to S8206 in the main CPU 63 in the 33rd embodiment, a function for executing the processes of steps S8901 to S8905 in the main CPU 63 in the 35th embodiment, and a function for executing the processes of steps SA101 to SA106 in the main CPU 63 in the 42nd embodiment);
A gaming machine comprising:

According to feature z1, when it is determined that a specified abnormality has occurred with respect to information stored in a specified memory area, the execution of a specified progression process for progressing the game is restricted, making it possible to prevent the game from starting despite the occurrence of a specified abnormality. In addition, even in a situation in which the execution of a specified progression process is restricted due to the occurrence of a specified abnormality, it becomes possible to ensure that non-restricted processing is executed. This makes it possible to ensure that necessary processing is executed even in a restricted state.

Feature z2. The gaming machine described in feature z1 is characterized in that the non-regulated process includes a power outage monitoring process (step S8201 in the 33rd embodiment, step S8901 in the 35th embodiment, and step SA102 in the 42nd embodiment) for monitoring the occurrence of a power outage.

According to feature z2, power outage monitoring processing is performed even in a regulated state, making it possible to respond appropriately if a power outage occurs in a regulated state.

Feature z3. The gaming machine according to feature z1 or z2, wherein the regulating means is configured to return to the regulated state when the supply of operating power is resumed even if the supply of operating power is stopped while the gaming machine is in the regulated state.

Feature z3 makes it possible to ensure that the state in which the execution of a specified progress process is restricted due to the occurrence of a specified abnormality is not lifted simply by stopping the supply of operating power.

Feature z4. A setting means for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level (in the forty-ninth embodiment, a function for executing the processing of step SB311 in the master CPU 63; in the fifty-third embodiment, a function for executing the processing of step SB915 in the master CPU 63);
a status generating means for generating a setting possible status (a status in which a setting value update process is executed) in which the setting value to be used can be changed (in the 49th embodiment, a function for making an affirmative determination at step SB114 in the main CPU 63; in the 51st embodiment, a function for making an affirmative determination at step SB614 in the main CPU 63; in the 52nd embodiment, a function for making an affirmative determination at step SB717 in the main CPU 63; in the 53rd embodiment, a function for making an affirmative determination at step SB812 in the main CPU 63; and in the 54th embodiment, a function for making an affirmative determination at step SC113 in the main CPU 63);
A gaming machine according to any one of features z1 to z3, characterized in that it comprises:

According to feature z4, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, if a predetermined abnormality has occurred with respect to the information stored in a predetermined storage area, there is a possibility that an abnormality has also occurred with respect to the set value. On the other hand, with the configuration of feature z1 above, when it is identified that a predetermined abnormality has occurred with respect to information stored in a predetermined storage area, execution of a predetermined progress process for advancing the game is regulated. Therefore, it is possible to prevent the game from being started even though there is a possibility that an abnormality has occurred regarding the set values.

Features z5. Means for executing notification that allows the player to recognize that the settable situation should occur based on the fact that the predetermined abnormality has occurred by the predetermined monitoring means ( In the 49th embodiment, the function of executing step SB121 in the main CPU 63, in the 51st embodiment, the function of executing step SB621 in the main CPU 63, and in the 52nd embodiment, step SB728 in the main CPU 63 (in the 53rd embodiment, the function to execute the process of step SB825 in the main CPU 63; in the 54th embodiment, the function to execute the process in step SC127 in the main CPU 63). The gaming machine according to feature z4, characterized by:

According to feature z5, when it is determined that a specified abnormality has occurred, a notification is issued to enable the player to recognize that a setting possible situation should occur, so that when a specified abnormality occurs, it is possible to prompt the manager of the amusement hall to set the setting value.

Feature z6. A gaming machine according to feature z4 or z5, characterized in that it is provided with a means for releasing the restricted state based on the occurrence of the setting possible state (a function for executing the process of step SB303 in the main CPU 63 in the 49th embodiment, and a function for executing the process of step SB904 in the main CPU 63 in the 53rd embodiment).

According to feature z6, it is possible to make a new setting of the setting value to be used when a situation in which a predetermined abnormality has occurred is canceled.

Note that for the configuration of features z1 to z6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature αA group>
Feature αA1. A predetermined monitoring means for monitoring whether a predetermined abnormality occurs with respect to information stored in a predetermined storage area (work area 221 for specific control) when the supply of operating power is started (in the 49th embodiment, a function for executing the processing of steps SB104 to SB106 in the main CPU 63; in the 51st embodiment, a function for executing the processing of steps SB604 to SB606 in the main CPU 63; in the 52nd embodiment, a function for executing the processing of steps SB703 to SB705 in the main CPU 63; in the 53rd embodiment, a function for executing the processing of steps SB804 to SB806 in the main CPU 63; in the 54th embodiment, a function for executing the processing of steps SC104 to SC106 in the main CPU 63);
a regulating means for, when the occurrence of the specified abnormality is identified by the specified monitoring means, changing the execution content of the process at the start of the supply of operating power to a content different from that executed when the occurrence of the specified abnormality is not identified by the specified monitoring means (in the 49th embodiment, a function for executing the process of step SB119 in the main CPU 63; in the 51st embodiment, a function for executing the process of step SB619 in the main CPU 63; in the 52nd embodiment, a function for executing the process of step SB726 in the main CPU 63; in the 53rd embodiment, a function for executing the process of step SB823 in the main CPU 63; and in the 54th embodiment, a function for executing the process of step SC125 in the main CPU 63);
specific output means for providing a specific output to the outside of the gaming machine based on the occurrence of the specific abnormality being identified by the specific monitoring means (in the forty-ninth embodiment, a function for executing the process of step SB122 in the main CPU 63; in the fifty-first embodiment, a function for executing the process of step SB622 in the main CPU 63; in the fifty-second embodiment, a function for executing the process of step SB729 in the main CPU 63; in the fifty-third embodiment, a function for executing the process of step SB826 in the main CPU 63; and in the fifty-fourth embodiment, a function for executing the process of step SC128 in the main CPU 63);
A gaming machine comprising:

According to feature αA1, when it is determined that a specified abnormality has occurred with respect to information stored in a specified memory area, the execution content of the process at the start of the supply of operating power is different from that when the specified abnormality has not occurred, making it possible to prevent processing from proceeding normally despite the occurrence of a specified abnormality. In addition, a specific output is sent to the outside of the gaming machine based on the determination that a specified abnormality has occurred. This makes it possible to urge the manager of the gaming hall to deal with the occurrence of the specified abnormality.

Feature αA2. The gaming machine according to feature αA1, wherein the specific output means performs the specific output to the outside of the gaming machine even when it is specified that an event different from the predetermined abnormality has occurred.

According to feature αA2, a specific output is sent to the outside of the gaming machine even if an event other than a specified abnormality occurs. This makes it possible to use the same configuration for sending a specific output.

Feature αA3. The specific output means is configured to control the gaming machine when the predetermined abnormality occurs when the supply of operating power is restarted even if the supply of operating power is stopped in a situation where the predetermined abnormality occurs. The gaming machine according to feature αA1 or αA2, characterized in that the specific output is performed externally.

According to feature αA3, in a situation where a predetermined abnormality has occurred, it is possible to perform a specific output to the outside of the gaming machine each time the supply of operating power is restarted. This makes it easier for the game hall manager to recognize that a predetermined abnormality has occurred.

Feature αA4. A gaming machine according to any one of Features αA1 to αA3, characterized in that the regulating means sets a regulated state in which the execution of a predetermined progression process for progressing the game is restricted based on the occurrence of the predetermined abnormality being identified by the predetermined monitoring means.

According to feature αA4, if it is determined that a specified abnormality has occurred with respect to information stored in a specified memory area, the execution of a specified progress process for progressing the game is restricted, making it possible to prevent the game from starting despite the occurrence of a specified abnormality.

Feature αA5. A gaming machine according to feature αA4, characterized in that it is provided with a means for executing non-regulated processing different from the predetermined progression processing even in the regulated state (a function for executing processing of steps S8201 to S8206 in the master CPU 63 in the 33rd embodiment, a function for executing processing of steps S8901 to S8905 in the master CPU 63 in the 35th embodiment, and a function for executing processing of steps SA101 to SA106 in the master CPU 63 in the 42nd embodiment).

According to feature αA5, even in a situation where execution of the predetermined progression process is restricted due to the occurrence of a predetermined abnormality, the non-restricted process can be executed. This makes it possible to ensure execution of necessary processing even in a restricted state.

Feature αA6. The gaming machine described in Feature αA5, characterized in that the non-regulated process includes a power outage monitoring process for monitoring the occurrence of a power outage (step S8201 in the 33rd embodiment, step S8901 in the 35th embodiment, and step SA102 in the 42nd embodiment).

According to feature αA6, the power outage monitoring process is executed even in the restricted state, so that when a power outage occurs in the restricted state, it is possible to appropriately deal with it.

Feature αA7. A gaming machine according to any one of Features αA4 to αA6, characterized in that the regulating means is configured to return to the regulated state when the supply of operating power is resumed even if the supply of operating power is stopped while the regulated state is in effect.

Feature αA7 makes it possible to ensure that the state in which the execution of a specified progress process is restricted due to the occurrence of a specified abnormality is not lifted simply by stopping the supply of operating power.

Feature αA8. A setting means for setting a setting value to be used from among a plurality of setting values corresponding to the player's advantage level (in the forty-ninth embodiment, a function for executing the process of step SB311 in the master CPU 63; in the fifty-third embodiment, a function for executing the process of step SB915 in the master CPU 63);
a status generating means for generating a setting possible status (a status in which a setting value update process is executed) in which the setting value to be used can be changed (in the 49th embodiment, a function for making an affirmative determination at step SB114 in the main CPU 63; in the 51st embodiment, a function for making an affirmative determination at step SB614 in the main CPU 63; in the 52nd embodiment, a function for making an affirmative determination at step SB717 in the main CPU 63; in the 53rd embodiment, a function for making an affirmative determination at step SB812 in the main CPU 63; and in the 54th embodiment, a function for making an affirmative determination at step SC113 in the main CPU 63);
A gaming machine described in any one of features αA4 to αA7, characterized by comprising:

According to feature αA8, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, if a predetermined abnormality has occurred with respect to the information stored in a predetermined storage area, there is a possibility that an abnormality has also occurred with respect to the set value. On the other hand, with the configuration of feature αA1 described above, if it is specified that a predetermined abnormality has occurred with respect to information stored in a predetermined storage area, the execution content of the process at the start of supply of operating power is predetermined. Since the execution contents are different from those when no abnormality has occurred, it is possible to prevent processing from proceeding normally even though there is a possibility that an abnormality has occurred regarding the setting value. Become. In addition, since a specific output is made to the outside of the gaming machine based on the identification of a predetermined abnormality occurring, the gaming machine It becomes possible to prompt the hall manager.

Feature αA9. A gaming machine according to feature αA8, characterized in that it is provided with a means for executing a notification that allows the player to recognize that the settable situation should be generated based on the occurrence of the specified abnormality being identified by the specified monitoring means (in the 49th embodiment, a function for executing the process of step SB121 in the main CPU 63; in the 51st embodiment, a function for executing the process of step SB621 in the main CPU 63; in the 52nd embodiment, a function for executing the process of step SB728 in the main CPU 63; in the 53rd embodiment, a function for executing the process of step SB825 in the main CPU 63; and in the 54th embodiment, a function for executing the process of step SC127 in the main CPU 63).

According to feature αA9, when it is determined that a specified abnormality has occurred, a notification is issued to enable the player to recognize that a setting possible situation should occur, so that when a specified abnormality occurs, it is possible to prompt the amusement hall manager to set the setting value.

Feature αA10. The regulating means, based on the occurrence of the predetermined abnormality being identified by the predetermined monitoring means, sets a regulated state in which execution of a predetermined progression process for progressing a game is restricted;
This gaming machine is a gaming machine described in feature αA8 or αA9, characterized in that it is equipped with a means for releasing the restricted state based on the occurrence of the settable situation (in the 49th embodiment, a function for executing the processing of step SB303 in the main CPU 63, and in the 53rd embodiment, a function for executing the processing of step SB904 in the main CPU 63).

Feature αA10 makes it possible to set new settings for the target setting when the situation in which a specified abnormality occurs is resolved.

Note that for the configuration of features αA1 to αA10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature αB group>
Feature αB1. Means for starting processing at the start of supply of operating power when the supply of operating power is started (steps SB101 to SB122 in the 49th embodiment, steps SB601 to SB622 in the 51st embodiment, steps SB701 to SB729 in the 52nd embodiment, steps SB801 to SB818 and steps SB823 to SB826 in the 53rd embodiment, steps SC101 to SC120 and steps SC125 to SC128 in the 54th embodiment),
A means for executing an interrupt process that is periodically started (a function for executing a first timer interrupt process in the main CPU 63);
A means for executing a profit awarding process in a manner corresponding to a set value set as a target for use from among a plurality of set values corresponding to the player's advantage level (a function for executing the processes of steps S503 and S504 in the master CPU 63);
A setting related execution means (a function of executing a setting value update process or a setting confirmation process in the main CPU 63) that executes a predetermined setting related process related to the setting value as part of the process at the start of the supply of the operating power;
A permission setting means for setting the execution of the interrupt processing from a prohibited state to a permitted state when the predetermined setting-related processing is executed in the processing at the start of the supply of the operating power (a function for executing the processing of step SB201 or step SB301 in the main CPU 63 in the 49th embodiment, and a function for executing the processing of step SB901 in the main CPU 63 in the 53rd embodiment);
A gaming machine comprising:

According to feature αB1, the setting value to be used is set from multiple setting value stages corresponding to the player's degree of advantage, so the player will expect the more advantageous setting value to be used. In addition, the specified setting-related processing related to the setting value is executed as part of the processing at the start of the supply of operating power, making it difficult to perform acts that attempt to execute the specified setting-related processing fraudulently.

In this case, when a predetermined setting-related process is executed in the process at the start of supply of operating power, execution of the interrupt process changes from a prohibited state to a permitted state. That is, while execution of the interrupt process is basically prohibited in the process when the supply of operating power is started, the interrupt process can be activated by interrupting in the predetermined setting-related process. By basically prohibiting execution of interrupt processing in the processing at the start of supply of operating power, it is possible to shorten the time required to complete the processing at the start of supply of operating power. On the other hand, in the predetermined settings-related process, it is assumed that the time required to complete the process will be longer because the process related to the setting value is executed. By allowing the execution of interrupt processing, it is possible to optimize the execution mode of the processing.

Feature αB2. The gaming machine according to feature αB1, wherein the setting-related execution means terminates the predetermined setting-related process based on a termination trigger operation being performed in the predetermined setting-related process.

According to feature αB2, the predetermined setting-related process is continued until an end triggering operation is performed, so the time required to complete the process tends to be long. In this case, with the configuration of feature αB1 described above, execution of interrupt processing is permitted in a situation where a predetermined setting-related process is being executed, so it is possible to make the execution mode of the process suitable. .

Feature αB3. A prohibition setting means (in the forty-ninth embodiment, a prohibition setting means in the main CPU 63 for setting a state in which execution of the interrupt processing is permitted to a state in which execution of the interrupt processing is prohibited when the predetermined setting-related processing is completed) The gaming machine according to feature αB1 or αB2, characterized in that the gaming machine has a function of executing the process of step SB206 or step SB312, or in the 53rd embodiment, a function of executing the process of step SB916 in the main CPU 63.

According to feature αB3, when the predetermined setting-related process ends, execution of the interrupt process is prohibited again. This makes it possible to limit the period during which execution of the interrupt process is permitted in a situation where the process at the start of supply of operating power is being executed to the period during which the predetermined setting-related process is being executed.

Feature αB4. A gaming machine according to any one of Features αB1 to αB3, characterized in that the interrupt process includes a power outage monitoring process (step S8901) for monitoring the occurrence of a power outage.

According to feature αB4, the power outage monitoring process is executed even when a predetermined setting-related process is being executed, so the configuration can take a long time to complete the predetermined setting-related process. However, if a power outage occurs while a predetermined setting-related process is being executed, it becomes possible to appropriately deal with the power outage.

Feature αB5. The interrupt process includes a progress response process (steps S8907 to S8920 in the master CPU 63) that is executed to control the progress of the game,
When the interrupt process is started by interrupting the execution of the predetermined setting-related process, the power outage monitoring process is executed, but the progress response process is not executed,
A gaming machine as described in feature αB4, characterized in that when the interrupt processing is started after the processing at the start of the supply of operating power has been completed, both the power outage monitoring processing and the progress response processing can be executed.

According to feature αB5, in a configuration in which the occurrence of a power outage is periodically monitored in a situation where a predetermined setting-related process is being executed, an interrupt process is interrupted and activated in a situation where a predetermined setting-related process is being executed. Even if there is a problem, it is possible to prevent the progress corresponding processing for controlling the progress of the game from being executed.

Feature αB6. The setting-related execution means includes:
When the supply of operating power is started, the use is performed as the predetermined setting-related process based on the fact that the first setting-related operation (the ON operation of the setting key insertion part 68a and the pressing operation of the reset button 68c) is performed. means for executing a changeable process in which a target setting value can be changed (a function for executing a setting value update process in the main CPU 63);
Based on the fact that the second setting-related operation (the ON operation of the setting key insertion part 68a) is performed when the supply of operating power is started, the setting value to be used is set as the predetermined setting-related process. A means for executing a setting notification process for making the notification (a function for executing a setting confirmation process in the main CPU 63);
Equipped with
The permission setting means sets a state in which execution of the interrupt process is prohibited to a state in which execution of the interrupt process is permitted when the changeable process is executed in the process at the time of starting the supply of operating power. and when the setting notification process is executed in the process at the time of starting the supply of operating power, the interrupt process is set from a state in which execution is prohibited to a state in which execution of the interrupt process is permitted. The gaming machine according to any one of features αB1 to αB5.

According to feature αB6, in order to change the setting value to be used, it is necessary to perform a first setting-related operation when the supply of operating power starts, making it difficult to illegally change the setting value to be used. In addition, the setting value to be used is notified by performing a second setting-related operation when the supply of operating power starts, making it possible for the manager of the amusement hall to check the setting value to be used as necessary.

In addition, for the configuration of features αB1 to αB6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21 , features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied in any one or more configurations. This makes it possible to achieve a synergistic effect by combining the configurations.

The invention relating to the above feature z group, the above feature αA group, and the above feature αB group can solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entrance section provided in the gaming area, the gaming ball is paid out from a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known in pachinko gaming machines, in which the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, processing needs to be performed appropriately when the supply of operating power is started, and there is still room for improvement in this respect.

<Characteristic αC group>
Feature αC1. Means for executing profit granting processing in a manner corresponding to a setting value set to be used from among setting values of multiple stages corresponding to the player's advantage level (processing of step S503 and step S504 in the main CPU 63) ) and
a setting-related execution unit (a function of executing a setting value update process in the main CPU 63) that executes a predetermined setting-related process regarding the setting value when the supply of operating power is started;
A regulation that restricts the execution of a predetermined progression process for advancing the game when the supply of operating power is stopped before the predetermined setting-related process is completed and the supply of operating power is started thereafter. state regulation means (in the 53rd embodiment, the function of making an affirmative determination in step SB808 in the main CPU 63; in the 54th embodiment, the function of making an affirmative determination in step SC108 and step SC116 in the main CPU 63); ,
A gaming machine characterized by comprising:

According to feature αC1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, if the supply of operating power is stopped before completing the predetermined setting-related processing, and the supply of operating power is restarted afterwards, the execution of the predetermined progress processing for advancing the game is regulated. Ru. This makes it possible to prevent the predetermined progress processing for advancing the game from being executed even though the predetermined setting-related processing has not been completed.

Feature αC2. The regulating means may be arranged such that the predetermined setting-related process is executed even if the supply of operating power is stopped before the predetermined setting-related process is completed and the supply of operating power is started thereafter. The gaming machine according to feature αC1, wherein the gaming machine does not enter the restricted state when

Feature αC2 makes it possible to prevent the execution of a predetermined progression process for progressing the game from being restricted even when a predetermined setting-related process is executed when the supply of operating power is resumed.

Feature αC3. Feature αC1 or The gaming machine described in αC2.

Feature αC3 makes it possible to execute non-restricted processes even in a situation where the execution of a specific progress process is restricted. This makes it possible to ensure that necessary processes are executed even in a restricted state.

Feature αC4. The gaming machine described in Feature αC3, characterized in that the non-regulated processing includes a power outage monitoring process (step S8901) for monitoring the occurrence of a power outage.

According to feature αC4, power outage monitoring processing is performed even in a regulated state, making it possible to respond appropriately if a power outage occurs in a regulated state.

Feature αC5. A gaming machine according to any one of Features αC1 to αC4, characterized in that the regulating means causes the regulated state to be restored when the supply of operating power is resumed even if the supply of operating power is stopped while the regulated state is in effect.

According to feature αC5, it is possible to prevent the state in which execution of the predetermined progress process is restricted from being canceled simply by stopping the supply of operating power.

Feature αC6. Means for executing notification that allows the player to recognize that the predetermined setting-related process should be executed based on the regulation state (in the 53rd embodiment, In any one of the features αC1 to αC5, the main CPU 63 has a function of executing the process of step SB825, and in the 54th embodiment, the function of executing the process of step SC127 in the main CPU 63. The game machine described.

Feature αC6 makes it possible to prompt the amusement hall manager to execute a specified setting-related process again if the supply of operating power is stopped before the specified setting-related process is completed.

Feature αC7. The regulating means may prevent specific related operations (setting key insertion part 68a The gaming machine according to any one of features αC1 to αC6, characterized in that the restriction state is not set based on the ON operation of the reset button 68c and the pressing operation of the reset button 68c.

According to feature αC7, even if the supply of operating power is stopped before the completion of the specified setting-related processing, it is possible to prevent the execution of the specified progress processing for progressing the game from being restricted by performing a specific related operation when the supply of operating power is resumed.

Feature αC8. The gaming machine according to feature αC7, wherein the setting-related execution means executes the predetermined setting-related process based on the specific related operation being performed when supply of operating power is started. .

According to feature αC8, it is possible to prevent the execution of a predetermined progress process for advancing the game from being restricted even when a predetermined setting-related process is executed when the supply of operating power is restarted. .

Feature αC9. The specific related operation includes the setting key insertion section (setting key insertion section 68a) being brought into a predetermined compatible state (ON operation state) by the setting key, and other predetermined operations (pressing the reset button 68c). ) is being carried out,
The regulating means may be configured to control whether the other predetermined operation is not performed if the supply of operating power is stopped before the predetermined setting-related process is completed, and if the supply of operating power is subsequently started. The gaming machine according to feature αC8, wherein the setting key insertion portion is not set to the restricted state based on the fact that the setting key insertion portion is in the predetermined compatible state.

According to feature αC9, even if no specific related operation has been performed when the supply of operating power is resumed, the setting key insertion unit is in a predetermined corresponding state, so that the execution of the predetermined progress process for progressing through the game is not restricted. This makes it possible to prevent the execution of the predetermined progress process from being restricted even if the supply of operating power is stopped during the execution of the predetermined setting-related process and the setting key insertion unit is in a predetermined corresponding state but the power is turned on without performing any other predetermined operation.

Feature αC10. When the supply of operating power is started, another related process regarding the setting value is executed based on the setting key insertion section being brought into the predetermined corresponding state in a situation where the other predetermined operation is not performed. The gaming machine according to feature αC9, further comprising a separate related execution means (a function of executing a setting confirmation process in the main CPU 63).

According to feature αC10, even if the supply of operating power is stopped before completing a predetermined setting-related process, by performing an operation to execute another related process when restarting the supply of operating power, It becomes possible to prevent the execution of a predetermined progression process for advancing the game from being restricted.

Feature αC11. When the supply of operating power is stopped before the predetermined setting-related process is completed and the supply of operating power is started thereafter, the setting key insertion section The gaming machine according to feature αC10, wherein the predetermined setting-related process is executed without executing the other related process based on the fact that the setting-related process is set to the predetermined compatible state.

According to feature αC11, when the supply of operating power is stopped before completing a predetermined setting-related process, an operation is performed to cause another related process to be executed when the supply of operating power is restarted. A predetermined setting-related process is executed instead of a separate related process. This makes it possible to give priority to the execution of predetermined setting-related processing.

Feature αC12. The predetermined setting-related process is a process that enables changing the setting value to be used;
The gaming machine described in feature αC11, wherein the other related process is a process for notifying the setting value to be used.

According to feature αC12, if the supply of operating power is stopped while changing a setting value to be used, when the supply of operating power is subsequently resumed, it is possible to prioritize the execution of a process for changing the setting value to be used over a process for notifying the setting value to be used.

Feature αC13. The gaming machine according to any one of features αC1 to αC12, wherein the predetermined setting-related process is a process that allows changing the setting value to be used.

According to feature αC13, if the supply of operating power is stopped during the process of changing the setting value to be used, the execution of the predetermined progress process for progressing the game is restricted when the supply of operating power is subsequently resumed. This makes it possible to prevent the execution of the predetermined progress process for progressing the game even when the change of the setting value has not been completed.

Note that for the configuration of features αC1 to αC13, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to b7, features c1-c21, features d1-d10, features e1-e9, features f1-f6, features g1-g6, features h1-h13, features i1-i7, features j1-j6, features k1-k16, features l1- l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, features αE1 to αE5 One or more configurations may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature αD group>
Feature αD1. A means for executing a profit awarding process in a manner corresponding to a set value set as a use target from among a plurality of set values corresponding to the player's advantage level (a function for executing the processes of steps S503 and S504 in the master CPU 63);
A setting related execution means (a function of executing a setting value update process in the main CPU 63) that executes a predetermined setting related process regarding the setting value based on a specific related operation (an ON operation of the setting key insertion portion 68a and a pressing operation of the reset button 68c) when the supply of operating power is started;
A separate related execution means (a function of executing a setting value update process in the main CPU 63) that executes a predetermined separate related process regarding the setting value based on a predetermined related operation (ON operation of the setting key insertion section 68a) when the supply of operating power is started;
A restricting means for restricting the execution of a predetermined progress process for progressing a game when the supply of operating power is stopped before the completion of the predetermined setting-related process and the supply of operating power is started thereafter (in the 53rd embodiment, a function for making an affirmative determination in step SB808 in the main CPU 63, and in the 54th embodiment, a function for making an affirmative determination in steps SC108 and SC116 in the main CPU 63);
Equipped with
The gaming machine is characterized in that the regulating means does not enter the regulated state based on the fact that the specific related operation has been performed when the supply of operating power is started thereafter, even if the supply of operating power is stopped before the completion of the specified setting-related processing, and does not enter the regulated state based on the fact that the specific related operation has been performed when the supply of operating power is started thereafter, even if the supply of operating power is stopped before the completion of the specified setting-related processing.

According to feature αD1, the setting value to be used is set from among multiple setting values corresponding to the player's degree of advantage, so the player will expect the more advantageous setting value to be used. In this case, if the supply of operating power is stopped before the specified setting-related processing is completed and then the supply of operating power is resumed, the execution of the specified progress processing for progressing the game is restricted. This makes it possible to prevent the specified progress processing for progressing the game from being executed even if the specified setting-related processing has not been completed.

In addition, even if the supply of operating power is stopped before the specified setting-related processing is completed, the execution of the specified progress processing is not restricted by performing a specific related operation when the supply of operating power is resumed. This makes it possible to prevent the execution of the specified progress processing for progressing the game from being restricted even when the specified setting-related processing is executed when the supply of operating power is resumed.

In addition, even if the supply of operating power is stopped before the specified setting-related process is completed, the execution of the specified progress process will be restricted even if the specified related operation is performed when the supply of operating power is resumed. Not done. This makes it possible to prevent the execution of the predetermined progress process from being restricted when an operation for executing a process related to the set value is performed.

Feature αD2. When the supply of operating power is stopped before completing the predetermined setting-related process and the supply of operating power is started thereafter, the other related process is performed based on the predetermined related operation being performed. The gaming machine according to feature αD1, wherein the predetermined setting-related process is executed without being executed.

According to feature αD2, when the supply of operating power is stopped before completing a predetermined setting-related process, an operation is performed to cause another related process to be executed when the supply of operating power is restarted. A predetermined setting-related process is executed instead of a separate related process. This makes it possible to give priority to the execution of predetermined setting-related processing.

Feature αD3. The specific related operation includes the setting key insertion section (setting key insertion section 68a) being brought into a predetermined compatible state (ON operation state) by the setting key, and other predetermined operations (pressing the reset button 68c). ) is being carried out,
Feature αD2, characterized in that the predetermined related operation includes the setting key insertion section being brought into the predetermined corresponding state by the setting key, but does not include the other predetermined operation being performed. The gaming machine described in .

According to feature αD3, even if no specific related operation has been performed when the supply of operating power is resumed, the setting key insertion unit is in a predetermined corresponding state, so that the execution of the predetermined progress process for progressing through the game is not restricted. This makes it possible to prevent the execution of the predetermined progress process from being restricted even if the supply of operating power is stopped during the execution of the predetermined setting-related process and the setting key insertion unit is in a predetermined corresponding state but the power is turned on without performing any other predetermined operation.

Feature αD4. The predetermined setting-related process is a process that enables changing the setting value to be used;
A gaming machine described in any one of features αD1 to αD3, characterized in that the other related process is a process for notifying the setting value to be used.

According to feature αD4, if the supply of operating power is stopped in the middle of the process for changing the setting value to be used, the execution of the predetermined progress process for progressing the game is restricted when the supply of operating power is resumed after that. This makes it possible to prevent the execution of the predetermined progress process for progressing the game even when the change of the setting value has not been completed. In addition, if the supply of operating power is stopped in the middle of changing the setting value to be used, when the supply of operating power is resumed, it becomes possible to prevent the execution of the predetermined progress process from being restricted not only when an operation is performed to execute the process that allows the setting value to be changed to be used, but also when an operation is performed to execute the process to notify the setting value to be used.

Feature αD5. A gaming machine according to any one of features αD1 to αD4, characterized in that it is provided with a means for executing non-regulated processing different from the predetermined progression processing even in the regulated state (a function for executing the processing of steps S8901 to S8905 in the master CPU 63).

According to feature αD5, even in a situation where execution of the predetermined progression process is restricted, the non-restricted process can be executed. This makes it possible to ensure execution of necessary processing even in a restricted state.

Feature αD6. The gaming machine according to feature αD5, wherein the non-regulated processing includes a power outage monitoring process (step S8901) for monitoring the occurrence of a power outage.

According to feature αD6, power outage monitoring processing is performed even in a regulated state, making it possible to respond appropriately if a power outage occurs in a regulated state.

Feature αD7. Features αD1 to αD6, wherein the regulating means is configured to enter the regulated state when the supply of operating power is restarted even if the supply of operating power is stopped in the regulated state. The gaming machine according to any one of the above.

Feature αD7 makes it possible to ensure that the state in which the execution of a specified progress process is restricted is not lifted simply by stopping the supply of operating power.

Feature αD8. Means for executing notification that allows the player to recognize that the predetermined setting-related process should be executed based on the regulation state (in the 53rd embodiment, In any one of the features αD1 to αD7, The game machine described.

According to feature αD8, if the supply of operating power is stopped before completing a predetermined setting-related process, it is possible to prompt the gaming hall manager to re-execute the predetermined setting-related process. Become.

Feature αD9. Means for executing a profit awarding process in a manner corresponding to a set value set as a use target from among a plurality of set values corresponding to the player's advantage level (a function for executing the processes of steps S503 and S504 in the master CPU 63);
A setting related execution means (a function of executing a setting value update process in the main CPU 63) that executes a predetermined setting related process regarding the setting value based on a specific related operation (an ON operation of the setting key insertion portion 68a and a pressing operation of the reset button 68c) when the supply of operating power is started;
A restricting means for restricting the execution of a predetermined progress process for progressing a game when the supply of operating power is stopped before the completion of the predetermined setting-related process and the supply of operating power is started thereafter (in the 53rd embodiment, a function for making an affirmative determination in step SB808 in the main CPU 63, and in the 54th embodiment, a function for making an affirmative determination in steps SC108 and SC116 in the main CPU 63);
Equipped with
The specific related operation includes a first related operation (turning on the setting key insertion section 68a) and a second related operation (pressing the reset button 68c),
The gaming machine is characterized in that the regulating means does not enter the regulated state based on the fact that the specific related operation has been performed when the supply of operating power is started thereafter, even if the supply of operating power is stopped before the specified setting-related processing is completed, and does not enter the regulated state based on the fact that the first related operation of the first related operation and the second related operation has been performed when the supply of operating power is started thereafter, even if the supply of operating power is stopped before the specified setting-related processing is completed.

According to feature αD9, the setting value to be used is set from among multiple setting values corresponding to the player's degree of advantage, so the player will expect the more advantageous setting value to be used. In this case, if the supply of operating power is stopped before the specified setting-related processing is completed and then the supply of operating power is resumed, the execution of the specified progress processing for progressing the game is restricted. This makes it possible to prevent the specified progress processing for progressing the game from being executed even if the specified setting-related processing has not been completed.

In addition, even if the supply of operating power is stopped before the specified setting-related processing is completed, the execution of the specified progress processing is not restricted by performing a specific related operation when the supply of operating power is resumed. This makes it possible to prevent the execution of the specified progress processing for progressing the game from being restricted even when the specified setting-related processing is executed when the supply of operating power is resumed.

Furthermore, even if the supply of operating power is stopped before the predetermined setting-related process is completed, if the first related operation is performed when the supply of operating power is restarted, the execution of the predetermined progress process will be restricted. Not done. This makes it possible to prevent the execution of the predetermined progress process from being restricted when a part of the operation for executing the predetermined setting-related process is performed.

In addition, for the configuration of features αD1 to αD9, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21 , features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied in any one or more configurations. This makes it possible to achieve a synergistic effect by combining the configurations.

<Feature αE group>
Feature αE1. A means for executing a profit awarding process in a manner corresponding to a set value set as a use target from among a plurality of set values corresponding to the player's advantage level (a function for executing the processes of steps S503 and S504 in the master CPU 63);
A situation generating means for generating a setting possible situation (a situation in which a setting value update process is executed) in which the setting value to be used can be changed based on a specific related operation including an operation of a predetermined corresponding operation means when the supply of operating power is started (a function for making an affirmative determination at step SB812 in the main CPU 63 in the 53rd embodiment, and a function for making an affirmative determination at step SC113 in the main CPU 63 in the 54th embodiment);
An operation identification means (a function for executing the process of step SB910 in the main CPU 63) for identifying whether the predetermined corresponding operation means is operated or not;
an operation correspondence storage means (OFF confirmation flag 361) in which a storage state becomes a non-operation corresponding state when it is determined by the operation identification means that the predetermined corresponding operation means is not operated, and a storage state becomes an operation corresponding state when it is determined by the operation identification means that the predetermined corresponding operation means is operated;
A selection object change means (a function for executing the process of step SB914 in the main CPU 63) that changes the setting value to be selected based on the fact that the operation identification means has identified that the predetermined corresponding operation means has been operated in a state in which the storage state of the operation corresponding storage means is the non-operation corresponding state in the settable state;
Equipped with
When a termination trigger occurs in the setting available state, the setting value to be selected is the setting value to be used,
This gaming machine is characterized by being equipped with a state setting means (a function of executing the processing of step SB901 in the main CPU 63 in the 53rd embodiment, and a function of executing the processing of step SC114 in the main CPU 63 in the 54th embodiment) which sets the memory state of the operation-compatible memory means to the operation-compatible state when the settable state is started or when the settable state is started.

According to feature αE1, the setting value to be used is set from among multiple setting values corresponding to the player's advantage, so the player will expect the more advantageous setting value to be the setting value to be used. In addition, in order to create a setting possible situation in which the setting value to be used can be changed, it is necessary to turn on the power in a state in which a specific related operation including the operation of the predetermined corresponding operation means has been performed, so it is possible to make it difficult to illegally change the setting value to be used. In addition, since the setting value to be selected is changed based on the operation of the predetermined corresponding operation means operated to create the setting possible situation, it is possible to reduce the number of operation means required to change the setting value. In addition, in the setting possible situation, the setting value to be selected is changed based on the fact that the predetermined corresponding operation means has been operated in a situation in which the memory state of the operation corresponding storage means is in a non-operation corresponding state, it is possible to prevent the setting value to be selected from being changed multiple times for one operation of the predetermined corresponding operation means.

In this case, when the settable situation starts or when the settable situation has started, the storage state of the operation-compatible storage means is set to the operation-compatible state. This makes it possible to prevent the setting value to be selected from being changed by the operation of the specified corresponding operation means when the operation of the specified corresponding operation means for generating the settable situation continues even after the start of the settable situation.

Feature αE2. The gaming machine described in Feature αE1, wherein the situation generating means determines that the predetermined corresponding operation means is being operated when the detection state of the means for detecting the operation of the predetermined corresponding operation means is an operation detection state, regardless of the storage state of the operation correspondence storage means.

According to feature αE2, when determining whether a specific related operation has been performed, the configuration does not determine whether the specific corresponding operation means has switched from a non-operated state to an operated state, but determines whether the specific corresponding operation means has been operated, so that it is possible to simplify the processing configuration for determining whether a setting possible situation has occurred.

Feature αE3: A setting correspondence storage means (setting reference area 341) for storing setting correspondence information corresponding to the setting value to be used;
a selection correspondence storage means (setting update area 342) for storing selection correspondence information corresponding to the setting value being selected;
Equipped with
the selection target changing means changes the selection correspondence information stored in the selection correspondence storage means so that the setting value that is the selection target is changed, based on the fact that the operation identifying means identifies that the predetermined corresponding operation means has been operated in a situation in which the storage state of the operation correspondence storage means is the non-operation corresponding state in the settable situation,
The gaming machine described in feature αE1 or αE2 is characterized in that the situation generation means sets the setting value that was a selection target in the settable situation as the target for use by storing information corresponding to the selection response information stored in the selection response storage means as the setting response information when the termination trigger occurs in the settable situation.

According to feature αE3, a setting correspondence storage means is provided that stores setting correspondence information corresponding to the setting value to be used, and a selection correspondence storage means is provided that stores selection correspondence information corresponding to the setting value being changed in the setting possible situation, so that it is possible to change the setting value in the setting possible situation while storing and holding information on the setting value that was set before the setting possible situation began.

Feature αE4. Means for displaying the setting values to be selected in the setting possible state on predetermined display means (first to fourth notification display devices 201 to 204) (step SA801 in the main CPU 63) The gaming machine according to any one of features αE1 to αE3, characterized in that the gaming machine has a function of executing the process of step SA803).

According to feature αE4, it is possible to change a setting value while checking the setting value that is being changed in the setting possible situation.

Feature αE5. Means for executing a profit awarding process in a manner corresponding to a set value set as a use target from among a plurality of set values corresponding to the player's advantage level (a function for executing the processes of steps S503 and S504 in the master CPU 63);
A situation generating means for generating a setting possible situation (a situation in which a setting value update process is executed) in which the setting value to be used can be changed based on a specific related operation including an operation of a predetermined corresponding operation means when the supply of operating power is started (a function for making an affirmative determination at step SB812 in the main CPU 63 in the 53rd embodiment, and a function for making an affirmative determination at step SC113 in the main CPU 63 in the 54th embodiment);
An operation identification means (a function for executing the process of step SB910 in the main CPU 63) for identifying whether the predetermined corresponding operation means is operated or not;
A selection object changing means (a function for executing the process of step SB914 in the main CPU 63) that changes the setting value to be selected based on the fact that the operation identification means has identified that the predetermined corresponding operation means has been operated in the setting possible situation;
Equipped with
When a termination trigger occurs in the setting available state, the setting value to be selected is the setting value to be used,
This gaming machine is characterized by being equipped with a means for preventing operation of the specified corresponding operation means when the supply of operating power for generating the settable situation is started from being treated as an operation that triggers a change in the setting value to be selected in the settable situation (in the 53rd embodiment, a function for executing processing of step SB901 in the main CPU 63, and in the 54th embodiment, a function for executing processing of step SC114 in the main CPU 63).

According to feature αE5, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In addition, in order to create a settable situation in which it is possible to change the set value to be used, it is necessary to turn on the power while a specific related operation including the operation of a predetermined corresponding operation means is performed. Therefore, it is possible to make it difficult to illegally change the setting values to be used. In addition, since the setting value of the selection target is changed based on the operation of a predetermined corresponding operation means that is operated to cause a setting possible situation, the number of operation means required to change the setting value is It is possible to suppress it.

In this case, the operation of the predetermined corresponding operation means when the supply of operating power to generate the settable situation is started is not treated as an operation that triggers a change in the setting value that is to be selected in the settable situation. This makes it possible to prevent the operation of the predetermined corresponding operation means from causing a change in the setting value that is to be selected when the operation of the predetermined corresponding operation means to generate the settable situation is continued even after the start of the settable situation.

In addition, for the configuration of features αE1 to αE5, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21 , features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, features j1 to j6, features k1 to k16, features l1 to l5, features m1 to m3, features n1 to n10, features o1 to o7, features p1 to p7, features q1 to q8, features r1 to r7, features s1 to s4, features t1 to t5, features u1 to u10, features v1 to v8, features w1 to w8, features x1 to x6, features y1 to y9, features z1 to z6, features αA1 to αA10, features αB1 to αB6, features αC1 to αC13, features αD1 to αD9, and features αE1 to αE5 may be applied in any one or more configurations. This makes it possible to achieve a synergistic effect by combining the configurations.

According to the invention related to the above feature αC group, the above feature αD group, and the above feature αE group, it is possible to solve the following problems.

Pachinko machines and slot machines are known as gaming machines. For example, a pachinko machine has a tray storage section on the front of the machine that stores gaming balls given to a player, and the gaming balls stored in the tray storage section are guided to a gaming ball launching device and launched toward the gaming area in response to the player's launching operation. Then, for example, when a gaming ball enters a ball entry section provided in the gaming area, the gaming ball is paid out from, for example, a payout device to the tray storage section. In addition, a configuration in which an upper tray storage section and a lower tray storage section are provided as the tray storage section is also known in pachinko gaming machines, in which the gaming balls stored in the upper tray storage section are guided to the gaming ball launching device, and the gaming balls that are surplus in the upper tray storage section are discharged to the lower tray storage section.

In addition, in a slot machine, when medals have been bet and the start lever is operated to start a new game, a lottery process is executed by the control means. When the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation stop control to stop the rotation of the reels. Then, if the stop result after the reels have stopped rotating corresponds to a winning combination in the lottery process, a bonus corresponding to the winning combination is awarded to the player.

Here, in the gaming machine as exemplified above, it is necessary to have a suitable configuration regarding the setting values that determine the advantage of the gaming machine, and there is still room for improvement in this respect.

Below, the basic configuration of a gaming machine to which each of the above features can be applied or is applied to each feature will be shown.

Pachinko game machine: an operating means operated by a player, a game ball firing means that fires a game ball based on the operation of the operating means, a ball path that guides the fired game ball to a predetermined gaming area, A game machine comprising game parts arranged within a region, and giving a bonus to a player when a game ball passes through a predetermined passage part of each game part.

Slot machines and other reel-type gaming machines: gaming machines equipped with a picture display device that variably displays multiple pictures, in which the variable display of the multiple pictures is started by operating a start operation means, the variable display of the multiple pictures is stopped by operating a stop operation means or after a predetermined time has passed, and a bonus is given to the player according to the picture after the stop.

DESCRIPTION OF SYMBOLS 10... Pachinko machine, 12... Game machine main body, 14... Front door frame, 28... Launch operation device, 33... First operating port, 34... Second operating port, 35... Through gate, 49a... Gate detection sensor, 62... MPU, 63... Main side CPU, 65... Main side RAM, 68a... Setting key insertion section, 68b... Update button, 68c... Reset button, 69a... First notification display device, 69b... Second notification display device, 69c ...Third notification display device, 112...Management side CPU, 117...Memory for history, 171...Memory for separate storage, 181-186...Memory for history for settings 1-6, 191...Memory for first history, 192 ...Second history memory, 201...First notification display device, 201a to 201g...Display segment, 202...Second notification display device, 202a to 202g...Display segment, 203...Third notification display device, 204...Fourth notification display device, 221...Work area for specific control, 222...Stack area for specific control, 223...Work area for non-specific control, 224...Stack area for non-specific control, 231...Normal 232... Counter area for opening/closing execution mode, 233... Counter area for high frequency support mode, 234... Calculation result storage area, 241... Management RAM, 251... Reset signal output section, 252... Program monitoring section, 266 ...Display IC, 311...Current area, 312...First history area, 313...Second history area, 314...Third history area, 321-324...Display segment, 325...Setup corresponding storage area, 325a-325f...No. 1 to 6 setting information storage area, 326...Setting corresponding storage area, 326a to 326c...1st to 3rd setting information storage area, 341...Setting reference area, 342...Setting update area, 352...Sound-light side MPU , 353...Audio/light side CPU, 356...RTC, 357...RTC memory, 361...OFF confirmation flag.

Claims (1)

A means for executing a profit awarding process in a mode corresponding to a set value set as a target for use from among a plurality of set values corresponding to the advantage level of a player;
a setting-related execution means for executing a predetermined setting-related process related to the setting value based on a specific related operation being performed when the supply of operating power is started;
a separate related execution means for executing a predetermined separate related process related to the setting value based on a predetermined related operation being performed when the supply of operating power is started;
a restricting means for restricting execution of a predetermined progress process for progressing a game when the supply of operating power is stopped before the completion of the predetermined setting-related process and the supply of operating power is started thereafter;
Equipped with
The gaming machine is characterized in that the regulating means does not enter the regulated state based on the fact that the specific related operation has been performed when the supply of operating power is started thereafter, even if the supply of operating power is stopped before the completion of the specified setting-related processing, and does not enter the regulated state based on the fact that the specific related operation has been performed when the supply of operating power is started thereafter, even if the supply of operating power is stopped before the completion of the specified setting-related processing.

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