JP2024022699A - Information processing device, information processing method and computer program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable search processing to be performed at a high speed.

SOLUTION: An information processing device according to an embodiment of the present invention comprises a search processing unit for performing, on a data structure having a plurality of nodes that include reference information, in which a k-number (k is an integer of 1 or more) of bits to be referred to in a search key are designated, and include one or more transition conditions which define a node of a transition destination in accordance with a value of bits designated by the reference information, search for a node that matches the search key. The one or more transition conditions in one or more of the nodes allow one or more specific bits in the bits designated by the reference information to represent a first value or a second value. The search processing unit specifies, from among the one or more transition conditions, a transition condition that is satisfied by bits designated by the reference information, and performs search for a node that matches the search key by transitioning to a node defined by the specified transition condition.

SELECTED DRAWING: Figure 1

COPYRIGHT: (C)2024,JPO&INPIT

Description

The present disclosure relates to an information processing device, an information processing method, and a computer program.

Network security has become important as the Internet has become an essential infrastructure. Network devices such as firewalls are used to protect information from unauthorized network access.

It is common practice to provide a network access control list (ACL) in a network device as a firewall function and filter packets based on the ACL. ACL is a set of rules for filtering packets using header information of communication protocols of multiple layers. Each rule of the ACL is represented by a bit string on a computer, and the bit string allows a wild card "*" in addition to "0" and "1". Whether the header information of the received packet matches each rule can be generalized as a ternary matching problem.

Existing algorithms divide an ACL rule before and after a wild card, and generate a decision tree using the divided parts. A decision tree is used to determine whether the header information matches each rule (whether or not the rule is satisfied). However, this algorithm has the problem that high performance cannot be obtained using commercially available CPUs, and it takes time to generate a decision tree. TCAM (Ternary Content Addressable Memory) is known as a dedicated device for performing ternary matching, but it has problems in power consumption, cost, expandability, etc. There is a need to develop algorithms that can achieve high performance with commercially available CPUs.

Japanese Patent Application Publication No. 2016-170818

The present disclosure provides an information processing device, an information processing method, and a computer program that can perform search processing at high speed.

The information processing device according to the present embodiment includes reference information that specifies k bits (k is an integer of 1 or more) to be referenced in a search key, and a transition destination based on the value of the bit specified by the reference information. The method includes a search processing unit that searches for a node matching the search key in a data structure having a plurality of nodes including at least one transition condition defining a node. At least one of the transition conditions in at least one node allows at least one particular bit of the bits specified by the reference information to be either a first value or a second value. The search processing unit specifies a transition condition that is satisfied by the bit specified by the reference information among the at least one transition condition, and transitions to a node specified by the specified transition condition, thereby determining the search key. Search for matching nodes.

FIG. 1 is a block diagram of an example of a communication device that is an information processing device according to the present embodiment. The figure which shows an example of a ternary matching table. The figure which shows an example of ACL. The figure which shows an example of a radix tree as a comparative example. The figure which shows an example of Patricia try as a comparative example. FIG. 3 is a diagram showing an example of a palm try according to the present embodiment. The figure which shows an example of the structure of the node in a palm trie. The flowchart which shows an example of the search operation of a palm try. FIG. 3 is a diagram schematically showing a part of a k-bit wide palm trie. The figure which shows the example of a ternary tree as a comparative example. A diagram in which the palm tries of FIG. 9 are superimposed on the tertiary tree of FIG. 10. The figure which shows the example of the data structure which acquires the pointer to a child node in a palm try. The figure which shows the table which showed the relationship between a chunk, the prefix of a chunk, and parameters h and g. The figure which shows an example of the structure of the node in a palm trie of 3 bit width. 7 is a flowchart illustrating an example of a palm try search operation according to the second embodiment. The figure which shows the specific example of the palm try based on 2nd Embodiment. 17 is a diagram showing an example of a subtree T1 in the palm try of FIG. 16. FIG. 17 is a diagram showing an example of a subtree T2 in the palm try of FIG. 16. FIG. 17 is a diagram showing an example of a subtree T3 in the palm try of FIG. 16. FIG. 17 is a diagram showing an example of a subtree T4 in the palm try of FIG. 16 and a subtree T5 connected to the subtree T4. FIG. 17 is a diagram showing an example of a subtree T6 in the palm try of FIG. 16. FIG. 17 is a diagram showing an example of a subtree T7 in the palm try of FIG. 16. FIG. FIG. 17 is a diagram showing an example of a subtree T8 in the palm try of FIG. 16; A diagram showing a pointer indicating a null node with diagonal lines. 25 is a diagram showing a node structure according to modification example 1, which is a compressed version of the node structure in FIG. 24. FIG. 7 is a diagram illustrating an example of a node structure according to modification example 2. FIG. FIG. 1 is a block diagram showing an example of a hardware configuration of an information processing device.

Embodiments of the present disclosure will be described below with reference to the drawings. The drawings schematically illustrate embodiments of the present disclosure as an example, and the embodiments of the present disclosure are not limited to the forms disclosed in the drawings. In the plurality of figures, the same elements are given the same reference numerals, and explanations of already explained elements are omitted as appropriate.

(First embodiment)
In this embodiment, a search key is generated from the header information of a received packet in a communication device such as a firewall or router, and a match is made from a network access control list (ACL) using the generated search key. Search for rules. ACL is a set of rules for processing packets (filtering, etc.) using header information of communication protocols of multiple layers. A search key is data that is a key for a search. Each rule of the ACL includes key data (search target data), which is data to be searched, and a value representing a process (action) to be performed on a packet. The communication device searches for a rule having key data that satisfies the search key. The communication device executes the process indicated by the value indicated in the searched rule. The present embodiment relates to a technique for efficiently or quickly searching for rules that match a search key. However, the application of this embodiment is not limited to rule searches, but can be applied to information searches in general. For example, it is also possible to search an address book for records that include an address that matches a search key.

FIG. 1 is a block diagram of an example of a communication device that is an information processing device according to this embodiment. The communication device 1 in FIG. 1 is a network device such as a firewall or router that relays packets received via a wireless or wired network. The communication device 1 in FIG. 1 includes a receiving section 11, a packet processing section 12, a storage section 13, a search key generation section 14, a search processing section 15, and a transmission section 16.

The receiving unit 11 receives packets via a wireless or wired network. A packet is an example of a unit of information transmission, and can also be read as a frame, segment, datagram, or the like.

The packet processing unit 12 determines the processing to be performed on the received packet, and performs the determined processing on the packet. For example, it determines whether a packet should be relayed (passed) or blocked. However, examples of processing performed on packets are not limited to allowing or blocking relaying; for example, determining the forwarding destination of the packet, encapsulating it in another protocol and forwarding it, and statistical information on packets that match the rules. (number of packets, number of bytes, etc.), determining the priority of packet scheduling during transfer, and determining the queue of packets during transfer. Other possibilities include storing packets for a certain period of time, generating files from data contained in packets, and verifying whether the files are safe. The packet processing unit 12 may include a plurality of engines depending on the type of processing to be performed on the packet. The packet processing unit 12 uses the search key generation unit 14 and the search processing unit 15 to determine processing of the packet.

The search key generation unit 14 generates a search key from information in the header of the received packet. The search processing unit 15 searches the ACL for a matching rule based on the search key, and provides the packet processing unit 12 with information indicating the action (processing) indicated by the searched rule.

The packet processing unit 12 processes the packet based on the information provided from the search processing unit 15. For example, if the information permits relaying, the transfer destination of the packet is determined, a packet to be transmitted to the determined transfer destination is generated, and the packet is provided to the transmitter 16. If the information disallows (blocks) relaying of the packet, the packet is discarded. A response packet indicating that the packet transmission source is not permitted to relay the packet may be generated and the response packet may be provided to the transmitter 16.

The transmitter 16 transmits the packet provided from the packet processor 12 to a wireless or wired network. The receiving section 11 and the transmitting section 16 may include one or more interfaces (ports). The receiving section 11 and the transmitting section 16 may have a common interface, or may have separate interfaces. ACL rule matching and packet processing according to matching rules may be performed using separate ACLs for each interface, or may be performed using a common ACL for multiple or all interfaces. In addition, ACL rule matching may be performed before routing processing is performed on packets received on the receiving interface, after the sending interface is determined in the routing processing, or in both cases. You may go. If performed before routing processing, ACL rule matching is performed on the packet received at the receiving interface, and processing for the packet is determined. If the packet is permitted to pass, the packet is provided to the routing engine of the packet processing unit 12; otherwise, it is passed to the processing engine according to the matching rule. When performing ACL rule matching after the sending interface is determined by routing processing, for example, ACL rule matching related to the sending interface is performed on the packet to be sent, and if passage is allowed, the packet is passed to the sending interface, Otherwise, it is passed to the processing engine according to the matching rule.

When the communication device 1 performs wireless communication, the transmitter 16 and the receiver 11 may be provided with an antenna. The transmitter 16 and the receiver 11 may be physically the same interface or may be separate interfaces.

The storage unit 13 stores ACLs, a data structure for efficiently searching ACLs, a search tree (palm try described below), a routing table for determining a packet transfer destination, and the like. Part or all of the operations of the receiving unit 11, transmitting unit 16, packet processing unit 12, search key generation unit 14, and search processing unit 15 of the communication device 1 can be performed by, for example, causing a processor such as a CPU to execute a computer program. Realized. In this case, the computer program may also be stored in the storage unit 13. The storage unit 13 is any recording medium such as a memory, a hard disk, or an optical storage device.

As described above, this embodiment relates to a technique for efficiently or quickly searching for a rule that matches a search key in an ACL. Each rule of the ACL is represented by a bit string on a computer, and the bit string allows a wild card "*" in addition to "0" and "1". “*” means that it may be “0” or “1”. The bit corresponding to "*" is called a don't care bit. When considering "*", whether or not the header information of the received packet matches each rule can be generalized as a ternary matching problem. Therefore, below, first, an overview of the ternary matching problem and ACL to which the ternary matching problem is applied will be explained.

The ternary matching problem is to search for an entry with the highest priority that matches a search key in a table (ternary matching table) storing a plurality of entries each having a priority.

FIG. 2 shows an example of a ternary matching table. Each entry in the ternary matching table includes an entry ID, key data, a value indicating an action, and a priority.

The entry ID is an ID that identifies each entry. In the illustrated example, nine entries numbered 1 to 9 are shown, but the number of entries may be any number as long as it is 0 or more.

P1 to P9 are shown as the priority of each entry. The priority is represented by PX (X is an integer). The larger the value of X, the higher the priority. In the example of FIG. 2, priority P9 is the highest priority, and priority P1 is the lowest priority.

Key data is represented by a bit string. The bit string includes three types of bit values: "0", "1", and "*". “*” is a don't care bit value, and may be “0” or “1”. For example, key data 011*1000 matches both search keys 01101000 and 01111000. The key data has a bit length of 8, but may be shorter or longer than 8. For example, "0" corresponds to either the first value or the second value, and "1" corresponds to the other.

The search key is a binary bit string containing "0" or "1" and does not contain "*" which is a don't care bit value. The search key may match multiple entries in FIG. 2, and in this case, the entry with the highest priority is obtained as the search result.

The value is a value that identifies a process (action) to be performed when an entry including the value is returned as a search result. For example, "A9" does not allow packets to pass (blocks packets), "A1" relays packets (passes packets), and so on. Nine types of values, A1 to A9, are shown, but it is sufficient if there are two or more types of values.

A specific example of a search using the table of FIG. 2 will be shown below. When the search key is 01110101, the key data matches two entries: 0*1101** and 01110***. The priorities of these two entries are compared and the entry with the highest priority is selected. The priority of the entry 0*1101** is P7, and the priority of the entry 01110*** is P2. Therefore, in this case, the entry 0*1101**, which has a high priority, is obtained as the search result. An action according to the value A7 included in this entry is executed.

When applying ternary matching to ACL, each entry corresponds to each rule (entry) of ACL. Each entry of the ACL is defined, for example, by header information of layers 2 to 4 of the communication protocol. Examples of header information include destination MAC address, source MAC address, EtherType, IEEE802.1Q (VLAN: Virtual Local Area Network) tag information, source IP address, destination IP address, protocol number, source TCP /UDP port number, destination TCP/UDP port number, TCP flags, etc. The value of one or more items selected from these plurality of items is expressed as key data of an entry by a ternary bit string, that is, a bit string of 0, 1, and *. Note that an IP address is usually specified as a subnet by a prefix notation. 192.0.2.0/24 represents the first 24 bits of the 32 bits representing 192.0.2.0. The TCP flag is represented by a ternary bit string of 0, 1, and *.

FIG. 3 shows an example of an ACL. Five entries (rules) are shown. The entry ID of each entry is omitted. Each entry is ordered by priority, with the top entry having the highest priority and decreasing as you go down. Two values are included: packet passage (permit)/blocking (deny). Key data is shown to the right of the value. In the example of FIG. 2, for simplicity, the rules for layer 2 are omitted, and only the rules for layers 3 and 4 are shown. Each entry contains multiple items. The multiple items can include an action, a protocol name (IP or any protocol above IP), a prefix for the source IP address, a source port number (optional), and a range term for Layer 4 (e.g., equal to two of the following: a source port number range (optional) followed by "eq", a destination IP address prefix, a destination port number range (optional) followed by a term representing the range, and a term for the state indicated by the TCP flag. Contains one or more. More details are as follows.

The top entry is all if the protocol name is IP, the source is the internal network at 192.0.2.0/24, and the destination is the network at 0.0.0.0/0. The packets are permitted to pass through. 0.0.0.0/0 means that all 32 bits of 0.0.0.0 are wild cards "*" (the destination IP address can be any).

In the second entry from the top, the protocol name is ICMP, the source is the 0.0.0.0/0 network, and the destination is the internal network 192.0.2.0/24. , permit all packets to pass. 0.0.0.0/0 means that all 32 bits of 0.0.0.0 are wild cards "*" (the source IP address can be any).

The third entry from the top indicates that if the protocol name is UDP and the DNS response packet is port number 53, it will be addressed to the internal network 192.0.2.0/24 regardless of the source IP address. packets are allowed to pass. The fact that the source IP address is 0.0.0.0/0 means that any source IP address is acceptable.

The fourth entry from the top indicates that if the protocol name is TCP and the TCP flag indicates "established", the message is sent to the internal network 192.0.2.0/24, regardless of the source IP address. Allow packets to pass. The TCP flag indicating "established" means that the ACK flag or RST flag is set to 1. That fourth entry can be converted into two ternary matching entries, one containing ***1**** (ACK) and the other containing ***1**** (RST). include. Although not shown in the example of FIG. 2, an entry may indicate a range including multiple port numbers. In this case, the entry can be converted into multiple entries in the same way.

The bottom entry indicates that the protocol name is IP, and if the packet is destined for the internal network 192.0.2.0/24, the packet will be denied passage regardless of the source IP address. do.

A simple way to determine whether a search key matches each entry in the ACL is to search from the topmost entry in the ACL. In this case, a computation amount on the order of n occurs. Therefore, this method is not efficient when the ACL size is large.

A search tree is known as another method of searching for an entry corresponding to a search key. Radix trees and Patricia tries are known as basic data structures of search trees. These search trees are generally called tries. In a trie, the subordinate nodes of a node have a common prefix with that node. Therefore, a trie is also called a prefix tree.

In this embodiment, a search tree named Palmtrie, which will be described later, is introduced. To make it easier to understand palm tries, we will explain radix trees and patrician tries.

FIG. 4 shows an example of a radix tree. Three nodes contain 100,001,010 as key data. A radix tree is a binary tree. Each branch of the radix tree adds one bit to the prefix of its parent node. The left branch of the node is assigned 0, and the right branch is assigned 1. The prefix of a node with depth d is the value of the dth bit from the beginning (upper bit side). In this embodiment, the depth of the root node is set to 0.

Searching the radix tree is performed by traversing the search tree by examining, at each node, the dth bit value from the most significant bit of the search key. The value included in the circled node represents the node ID (entry ID). No number (node ID) is shown for a node with which no entry is associated. Key data 001 of entry 2 corresponds to the node with ID=2, key data 010 of entry 3 corresponds to the node with ID=3, and key data 100 of entry 1 corresponds to the node with ID=1. A square node that is a leaf node represents a null node (empty node). A null node is a node provided for processing convenience. For example, if the search key is 4 bits or more, it is classified as a null node. A configuration without providing a null node is also possible.

FIG. 5 shows an example of a Patricia try. Similar to the example of the radix tree in FIG. 4, 100,001,010 is included as key data in three nodes. A Patricia trie is a tree obtained by compressing a radix tree, and the number of key data (number of entries) matches the number of nodes (excluding leaf nodes). The non-leaf nodes (root node and intermediate nodes) contain a value (action) and a pointer to two lower nodes. Leaf nodes do not contain values, but some leaf nodes contain pointers (see the dashed arrows). A leaf node that does not contain a pointer corresponds to a null node. The value included in the circled node represents the node ID (entry ID).

In Patricia Try, a bit index ("Bit" in the figure) is provided for a node containing key data. The bit index is reference information used to extract bits from the search key and determine the branch direction (left or right). The bit string from the most significant bit to the bit indicated by the bit index in the key data of a node represents the prefix of the corresponding node. When the bit length of the key data is L and the bit index of the node is b, the (L−b) bits from the most significant bit are the prefix of the node. For example, the prefix for node ID=3 is 01.

The search for Patricia tries is defined recursively. The search is performed by checking the bit in the search key that corresponds to the bit index of the node, and branching to the left branch if it is 0 and to the right branch if it is 1. If the bit index of the node advanced by branching is greater than or equal to the bit index (current bit index) of the node before branching, the search ends. The key data of the current node (the node advanced by branching) and the search key are compared, and if they match, information (for example, key data and value) of the node is acquired. Note that the comparison between the key data and the search key may be omitted.

For example, assume that the search key is 001. The bit index of the root node is 2. If the position of the last bit is 0, then the bit at bit index 2 is the leading 0. Therefore, it branches to the left branch from the root node. The bit index at the node after the branch is 1, and the bit at bit index 1 is 0. Therefore, it branches to the left branch and returns to the root node. Bit index 2 of the root node is greater than bit index 1 of the previous node. Therefore, the search is ended and information on the root node is obtained. The node information includes, for example, key data (001 in this example) and value (2 in this example).

Similarly, assume that the search key is 010. The bit index of the root node is 2. The bit at bit index 2 is the leading 0. Therefore, it branches to the left branch from the root node. The bit index at the node after the branch is 1, and the bit at bit index 1 is 1. Therefore, it branches to the right branch and returns to the same node. The bit index 1 of this node is the same as the bit index 1 of the previous node (self node). Therefore, the search is ended and information about the node is acquired. The node information includes, for example, key data (010 in this example) and value (3 in this example).

Similarly, assume that the search key is 100. The bit index of the root node is 2. The bit at bit index 0 is the last 0. Therefore, it branches to the right branch from the root node. The bit index at the node after the branch is 0, and the bit at bit index 0 is 0. Therefore, it branches to the left branch and returns to the same node. The bit index 0 of this node is the same as the bit index 0 of the previous node (self node). Therefore, the search is ended and information about the node is acquired. The node information includes, for example, key data (100 in this example) and value (1 in this example).

When adding a new node to a Patricia trie in accordance with a new entry (including new key data), the Patricia trie may be searched to find a position to add a node containing new key data. Through the search, it is determined whether the prefix of the node matches the key data, and if they do not match, the node is replaced with a new node. The original node is made a child node of the new node. The bit index of the new node is the most significant bit that differs between the key data of the original node and the key data of the new node. If you want to proceed from a new node to a null node, set a pointer to the new node in the null node (or replace the pointer to the null node with a pointer to the new node in the new node), and set the bit index of the new node. Set to 0. Deletion of a node accompanying deletion of an entry may be performed by performing the reverse procedure.

In this embodiment, a new try based on Patricia try, Palm Try, is introduced. A palm trie allows a node to have more than two branches. Each branch can be assigned one bit of ternary values (0, 1, *) or multiple bits containing ternary values. Therefore, Patricia Try can store key data including a bit indicating a wild card "*" which may be either 1 or 0. The bit indicating the wild card "*" is called a don't care bit, and the value of the don't care bit is called a don't care bit value.

FIG. 6 shows an example of a palm try according to this embodiment. The palm try in FIG. 6 is generated based on the nine entries shown in the table in FIG. 2, and each of the nine entries is stored in a node (non-leaf node). A palm trie is a data structure containing multiple nodes. Regarding Palm Try, the same explanation as Patricia Try will be omitted as appropriate. The palm try is stored in the storage unit 13 as a data structure for efficiently or quickly searching for ACL entries.

A palm trie node has three branches. The branch to the left child node is assigned 0, the branch to the center child node is assigned *, and the branch to the right child node is assigned 1. A branch to which a don't care bit value is assigned is called a don't care branch, and a branch to a don't care branch is called a don't care branch. A branch to which 0 or 1 is assigned is called an exact matching branch, and a branch to the exact matching branch is called an exact matching branch. Rectangular nodes are leaf nodes, and round nodes are root nodes or intermediate nodes. Among the leaf nodes, a leaf node with a broken line with an arrow indicates that when transitioning to that leaf node, transition is made to the node indicated by the arrow. A leaf node without a dashed line with an arrow is a null node. Note that no entries are associated with leaf nodes.

FIG. 7 is a diagram illustrating an example of the structure of nodes in a palm try. The illustrated example shows an example of the structure of a node corresponding to entry 7 of the table in FIG.

A palm trie node has pointers to three child nodes for branching into three branches. The three pointers include a pointer to the left branch (left child node), a pointer to the right branch (right child node), and a pointer to the center branch (center child node). The pointers to the left branch and the right branch correspond to pointers for exact matches, and the pointers to the center branch correspond to pointers for don't care branches. The pointers are schematically shown as Ptr1, Ptr2, and Ptr3 in the figure. A pointer is an address in memory of a node to be referenced. In FIG. 6, leaf nodes with dashed lines with arrows hold points only to the nodes indicated by the arrows. The leaf node does not need to hold any items other than pointers.

Below each pointer, transition conditions "0", "1", and "*" corresponding to each pointer are shown as at least one transition condition. The transition condition "0" is satisfied when the bit indicated by the bit index is 0, and the process transitions (goes forward) to the node indicated by the pointer (Ptr1 in the illustrated example) corresponding to the transition condition "0". The transition condition "1" is satisfied when the bit indicated by the bit index is 1, and the pointer (Ptr2 in the illustrated example) corresponding to the transition condition "1" transitions (goes forward) to the node indicated. The transition condition "*" is satisfied when the bit indicated by the bit index is 0, and the process transitions (goes forward) to the node indicated by the pointer (Ptr3 in the illustrated example) corresponding to the transition condition "*". The transition condition "*" is a condition that allows one bit specified by the bit index to be either the first value or the second value. Transition conditions "0" and "1" correspond to the first transition condition, and transition condition "*" corresponds to the second transition condition.

Similarly to the Patricia trie, the palm trie node includes a bit index indicated by "Bit". The bit index specifies the bit to be referenced in the search key. For example, Bit=7 indicates the 7th bit counting from the least significant bit, with the least significant bit being the 0th bit. When the bit length of the search key is 8 bits, Bit=7 indicates the most significant bit. The bit index is an example of reference information that specifies k (k=1 in this embodiment) bits to be referenced in the search key. In this embodiment, k=1.

The palm try node also includes key data, value (action), and priority. The numerical value inside the circle node in the palm try in FIG. 6 represents the entry ID (node ID). Note that the entry ID may be included in the node. The key data is expressed by a set of a binary bit string (key data (binary) in the figure) and a mask bit string (key data (ternary mask) in the figure). As the binary bit string, a bit string obtained by replacing * with 0 in the key data of the entry is stored. The mask bit string stores a bit string in which * in the key data of the entry is set to 1 and all bits other than * are set to 0. Of the binary bit string, the bit corresponding to 1 in the mask bit string is internally interpreted as *. In the illustrated example, in the mask bit string, the * position is represented by 1, but the positions other than * may be represented by 1, and the * position may be represented by 0. In this case, the bit string for masking is 11111100.

The algorithm for adding and deleting nodes to the palm try is basically the same as the Patricia try. When adding and deleting nodes, don't care bits may be treated as ternary values that do not match either 0 or 1.

In this embodiment, a palm try is used as the data structure to be searched. A search key generation unit 14 generates a search key based on the header information of the packet. The search key may be generated based on packet header information in the same format as the key data of the ACL entry. The packet processing unit 12 provides the search processing unit 15 with a search instruction specifying a search key. The search processing unit 15 starts searching for palm tries in accordance with the search instruction, and searches for nodes that match the search key. The search processing unit 15 identifies the transition condition that is satisfied by the bit specified by the bit index in the search key, among the plurality of transition conditions in the target node. Transition to the node specified by the specified transition condition. By starting this operation from the root node and performing it sequentially according to node transitions, a search for a node that matches the search key is performed. If a plurality of transition conditions that are satisfied by the bit specified by the bit index are specified, a transition is made to a node defined by the specified transition condition for each of the plurality of specified transition conditions. For example, two transition conditions are specified: one of transition conditions "0" and "1" and transition condition "*". If the bit index of the transition destination node specifies the same bit as the bit index of the node before transitioning to the node or a bit higher than the bit, the search processing unit 15 searches the information of the transition destination node. Obtained as a search result candidate (search result). At this time, if the search key matches key data held by the transition destination node, information on the transition destination node may be acquired as a search result candidate.

The palm try search algorithm will be described in detail below with reference to FIG. The palm try search differs from the patricia try search because there are don't care bits that match both 0 and 1.

FIG. 8 is a flowchart illustrating an example of a palm try search operation. First, in the target node, the bit indicated by the bit index is specified using the search key (S1). At the start of this flow, the target node is the root note. The bit indicated by the bit index in the root node is specified in the search key.

Regardless of whether the specified bit is 0 or 1, the specified bit matches the don't care bit, so it is sent to the child node via the branch with the don't care bit value "*" (don't care branch). Proceed (step S2A). That is, proceed to the node pointed to by the point corresponding to the don't care bit value. In this example, proceed to the central child node. The operation in step S2A corresponds to a don't care branch. Don't care branching is an action that Patricia Try does not have.

Furthermore, in the above-mentioned target node, use the search key to determine whether the bit indicated by the bit index is 0 or 1, and proceed to the child node to the left or right depending on which bit it matches (S2B ). That is, if the bit indicated by the bit index is 0, the process proceeds to the node pointed to by the pointer corresponding to 0. That is, proceed to the child node on the left. If the bit indicated by the bit index is 1 in the search key, the process proceeds to the node pointed to by the pointer corresponding to 1. In other words, proceed to the child node on the right. The operation in step S2B corresponds to a perfect match branch.

Thus, in step 2A, the process proceeds to the center child node, and in step S2B, the process proceeds to the left or right child node. That is, it branches in multiple directions from one node. This allows multiple searches to be performed in parallel.

At each node to which the process advances in steps S2A and S2B (node after branching), it is determined whether the node is a null node (S3A, S3B). A null node is a node that does not contain a pointer to the next node to proceed to. Null nodes also do not contain key data, values, and priorities. If it is a null node, the search ends (S6A, S6B). In other words, null is returned as the search result.

On the other hand, if the destination node (node after branching) is not a null node, check whether the bit index of the destination node (branch node) is greater than or equal to the bit index of the node before proceeding (pre-branch node). (S4A, S4B). That is, it is determined whether the bit index condition that the bit index of the next node is greater than or equal to the bit index of the previous node is satisfied. However, if the destination node is a leaf node that is not a null node (in the example of FIG. 6, it is a rectangular node with a broken line with an arrow), the process continues to the node pointed to by the leaf node pointer. Then, it is determined whether the bit index of the next node is greater than or equal to the index of the previous node (pre-branch node).

If the bit index of the destination node (node after branching) is smaller than the bit index of the node before proceeding (node before branching) (NO), the process proceeds to step S1 with the node after branching as the target node. return. That is, steps S1, S2A to S4A, S2B to S4B) described above are repeated recursively.

If the bit index of the node after bit branching is greater than or equal to the index before branching (YES), information on the node after branching is acquired as a search result candidate (S5A, S5B), and the main search ends. The node information includes, for example, key data, value, priority, and the like.

It is determined whether all searches have been completed (S7), and if there are searches that have not yet been completed (NO), the process waits. When all searches are completed (YES in S7), the candidate with the highest priority among the acquired search result candidates is set as the search result (S8). That is, when a plurality of search result candidates are obtained through the search, the priorities of the plurality of candidates are compared, and the candidate with the highest priority is selected as the search result. The node containing the search result is the node that matches the search key. If there is one search result candidate, that candidate is acquired as the search result. The search result includes at least the value of the node, and may also include at least one of key data and priority.

Hereinafter, a specific example of the operation of searching for the search key 01110101 based on the palm try in FIG. 6 will be described with reference to the flowchart in FIG. 8 described above. Hereinafter, when a node is written as "node X", it means a node with entry ID (node ID)=X. For example, node 2 is the root node with entry ID=2.

First, in node 2, which is the root node, the bit index is 7 (S1). The process advances to the don't care branch (S2A), and since the destination node is a null node, the main search ends (S3A, S6A).

On the other hand, since the bit indicated by bit index 7 in the search key (01110101) is 0 (value of the most significant bit), the process proceeds from node 2 to node 3 on the left (S2B). Since node 3 is not a null node (NO in S3B) and the bit index (=6) of node 3 is smaller than the bit index (=7) of node 2 (NO in S4B), node 3 is set as the target node. (S1).

The process proceeds from node 3 to node 5 via the don't care branch (S2A). Since node 5 is not a null node (NO in S3A) and the bit index (=0) of node 5 is smaller than the bit index (=6) of node 3 (NO in S4A), node 5 is set as the target node. (S1).

Proceed from node 5 to the child node via the don't care branch (S2A), and since the child node is not a null node (NO in S3A) but a leaf node with a pointer, proceed to the node pointed to by the point (i.e. node 5 itself) . Since the bit index of the node 5 to which the process has proceeded is the same as the bit index of the previous node (node 5 itself) (YES in S4A), information on node 5 is obtained as a candidate for the search result (S5A), The main search ends (S6A). Since other searches have not yet been completed, the process waits (NO in S7).

In the above-described node 5, the bit index is 0, and in the search key (01110101), the value of the bit indicated by the bit index 0 (value of the least significant bit) is 1, so the process proceeds to the child node on the right side (S2B). Since the child node is a null node (YES in S3B), the main search ends (S6B). Since other searches have not yet been completed, the process waits (NO in S7).

In the above-described node 3, the bit index is 6, and the value of the bit indicated by bit index 6 in the search key (01110101) is 1, so the process proceeds to node 7 on the right side (S2B). Node 7 is not a null node (NO in S3B), and the bit index (=5) of node 7 is smaller than the bit index (=6) of node 3 (NO in S4B), so node 7 is set as the target node. (S1).

The process proceeds from node 7 to the child node via the don't care branch (S2A), and since the child node is a null node (YES in S3A), the main search ends (S6A). Since other searches have not yet been completed, the process waits (NO in S7).

In the above-described node 7, the bit index is 5, and the value of the bit indicated by bit index 5 in the search key (01110101) is 1, so the process proceeds to node 8 on the right side (S2B). Since node 8 is not a null node (NO in S3B) and the bit index (=4) of node 8 is smaller than the bit index (=5) of node 7 (NO in S4B), node 8 is set as the target node. (S1).

The process proceeds from node 8 to node 1 via the don't care branch (S2A). Since node 1 is not a null node (NO in S3A) and the bit index (=0) of node 1 is smaller than the bit index (=4) of node 8 (NO in S4A), node 1 is set as the target node. (S1).

Proceeding from node 1 to the child node via the don't care branch (S2A), and since the child node is a null node (YES in S3A), the main search ends (S6A). Since other searches have not yet been completed, the process waits (NO in S7).

In node 1, the bit index is 0, and the value of the bit indicated by bit index 0 in the search key (01110101) (value of the least significant bit) is 1, so the process proceeds to the right child node (S2B). Since the child node is a null node (YES in S3B), the main search ends (S6B). Since other searches have not yet been completed, the process waits (NO in S7).

In the above-mentioned node 8, the bit index is 4, and the value of the bit indicated by bit index 4 in the search key (01110101) is 1, so the process proceeds to the right node (S2B). Since the advanced node is a leaf node that has a pointer, the process returns to the node pointed to by the pointer (that is, the own node 8). The bit index (=4) of the node 8 to which the node 8 returned is the same as the bit index (=4) of the node 8 before the return. Therefore, information on node 8 is acquired as a search result candidate (S5A), and the main search is ended (S6A).

Since all searches have been completed (YES in S7), the priorities of all search result candidates are compared and the candidate with the highest priority is set as the search result (S8). In this example, information on node 5 and information on node 8 are acquired as search result candidates. The priority of node 5 is priority P7 from the table of FIG. On the other hand, the priority of node 8 is priority P2. Therefore, since the priority of node 5 is higher than the priority of node 8, information on node 5 is obtained as a search result. That is, node 5 is a node that matches the search key, and information about node 5 is acquired. The value of the entry of the node 5 is A5, and the information of the value A5 is passed to the packet processing unit 12. The packet processing unit 12 executes the process (action) indicated by the value A5 on the packet.

のオーダーの計算量で済む。またパームトライでは新たなエントリが追加又は既存のエントリが削除される場合にもノードの追加及び削除をパトリシアトライと同様の手法で容易に行うことができ、拡張性にも優れている。 As described above, according to the present embodiment, by generating a palm try as a data structure to be searched and searching the palm try, key data including don't care bits can be searched at high speed with a small amount of calculation. The amount of calculation can be significantly reduced compared to searching the list one by one as shown in FIG. 2 or 3. For example, while a list search requires calculations on the order of n, a search using a palm try requires

The calculation amount is on the order of . In addition, in PalmTrie, even when a new entry is added or an existing entry is deleted, nodes can be easily added and deleted using the same method as in PatriciaTrie, and it is also excellent in expandability.

(Second embodiment)
In the first embodiment, the search is performed by performing ternary determination (0, 1, *) on the search key in units of 1 bit. That is, k of k bits specified by the bit index (reference information) was 1. The second embodiment provides a palm try (extended palm try) that performs a search in units of k or more bit widths (multibit stride). That is, a palm try in which k of k bits specified by the bit index is 2 or more is provided. A group of bits with a bit width of k or more is called a chunk. The chunk specified in the search key is called a key chunk. By using the extended palm try, the depth of the tree (palm try) can be made shallow and the number of search steps can be reduced, so the search speed can be further improved.

A simple way to generate palm tries that support multi-bit widths is to extend the ternary tree to have 3 ^k branches. For example, if k=3, there are three ways for one bit: 0, 1, and *, so a tree is generated that branches in 27 ways from one node. For example, a tree is generated that branches in 27 ways: 000, 001, . . . , 111, 00*, ***, . However, this method has the problem of generating many child nodes.

For example, of the 27 child nodes, 8 nodes are exact match nodes. That is, the eight nodes have binary values (0 or 1) in all three target bits. In other words, the eight nodes are nodes connected to a 3-bit value branch (complete match branch) that does not include the don't care bit value *. Therefore, only one node out of eight nodes is selected for the target 3-bit bit group (3-bit wide key chunk) in the search key. On the other hand, the remaining 19 nodes among the 27 child nodes are nodes that connect to one or more don't care bit branches in the target three bits. Therefore, simply, it is necessary to search for 19 don't care edges (branches where one or more of the 3 bits is a don't care bit*) for a target 3-bit wide key chunk in the search key. . For 11 of the 19 nodes, it is possible to eliminate the search by matching 1 and 0 bits in the key chunk, but for the remaining 7 nodes, lower search is required. .

This embodiment provides a palm try (extended palm try) with a reduced number of child nodes by focusing on the most significant don't care bit among the bits included in the key chunk (three bits if k=3). We provide a method to easily search for don't care branches.

Specifically, a plurality of don't care branches including one or more don't care bits other than the least significant bit in the key chunk are combined into one don't care branch. One combined don't care branch allows having only one don't care bit in the least significant bit. Combined don't care branches lead to subtrees. The bit width size (stride size) of the combined don't care branches is 1 or more and k or less. Which don't care branches are combined may depend on the entry group from which the palm try is generated.

For example, when k=3, the 0*0, 0**, and 0*1 branches are combined to form a 2-bit 0* branch (the most significant bits of the 3 bits are all 0). 0* corresponds to the upper two bits of the three bits.
Also, the 1*0, 1**, and 1*1 branches are combined to form a 2-bit 1* branch (the most significant bit of the 3 bits is all 1). 1* corresponds to the upper two bits of the three bits.
Also, combine *00, *01, *10, *11, *0*, *1*, **0, **1, **** to form a 1-bit branch of * (3-bit The most significant bits are all *). * corresponds to the most significant 1 bit among the 3 bits.
In addition, there remain four branches (00*, 01*, 10*, 11*) having, for example, a don't care bit in the least significant bit of the 3-bit chunk. As a result of the above, 19 don't care branches containing don't care bits are reduced to 7 don't care branches.

FIG. 9 schematically shows a k-bit wide palm trie. In the illustrated example, k=3. Note that the palm try in FIG. 9 is an example for explanation, and the entries in the table in FIG. 2 are not reflected therein.
FIG. 10 shows an example of a ternary tree as a comparative example. In the ternary tree, every node makes a 1-bit determination and branches into three ways (0, 1, *).
FIG. 11 shows the palm trie shown in FIG. 9 superimposed on the tertiary tree shown in FIG. 10 to make it easier to compare the differences in structure between the ternary tree and the palm trie. However, in FIG. 11, the representation of the subtree (triangle indicated by a broken line) in FIG. 9 is omitted for ease of viewing.

In the palm trie of FIG. 9, the eight black circle nodes at the bottom are child nodes that connect the root node to the exact match branch. 000, 001, 010, 011, 100, 101, 110, and 111 are assigned to the eight perfect match branches connecting from the root node to these child nodes in order from the left. That is, in order from the left, these eight nodes have 000,001,010,011,100,101,110,111 as prefixes. A node connected to a perfect match branch is called a perfect match node. In the following description, a child node connected to a branch of XXX (X is 0, 1, or *) may be described as a node of XXX. For example, the node 010 is a child node connected to the branch assigned 010.

The seven hatched circles in the palm try are child nodes connected to the don't care branch (nodes that transition when the don't care transition condition (second transition condition) is satisfied). Don't care branches are shown as solid lines with arrows. A node connected to a don't care branch is called a don't care node. A plurality of bits (3 or less bits) assigned to the don't care branch have a don't care bit at the lowest position.

All or part of the exact match node and all or part of the don't care node include a bit index, pointer, key data, value, and priority. There may also be exact match nodes or don't care nodes that contain only pointers. There may also be nodes (null nodes) that do not include any bit index, pointer, key data, value, or priority. The k bits in the search key from the bit indicated by the bit index toward the higher order side are the k bits (k bit chunk) specified by the bit index. The k bits specified by the bit index become a chunk (k-bit chunk) that is the target of determining whether the transition condition is satisfied in the search key. For example, in the case of bit width k=3, when the search key is 01101000 and the bit index is 5, the 5th to 7th bits, 011, are the k-bit chunk specified by the bit index. In other words, 011 is the 3-bit chunk that is the target of determining whether the transition condition is satisfied or not in the search key. However, the least significant bit is the 0th bit.

When searching the palm try in FIG. 9, one exact match node is selected from eight exact match nodes for the k-bit chunk in the search key at the target node. Further, among the seven don't care nodes, k don't care nodes are searched (the search procedure will be described later). A dashed triangle is shown below some of the nodes (exact match nodes and some don't care nodes), and this triangle represents a subtree whose root node is the some of the nodes. The structure of the palm trie depends on the key data set from which the palm trie is generated, and some of the illustrated subtrees may not exist. The subtree search is performed from the root node of the subtree. The configuration of the subtree is the same as the constituent parts of the tree in FIG. 9 other than the subtree indicated by the broken line.

The solid line with an arrow corresponds to the don't care branch, as described above, and represents the search procedure for the don't care node. For example, if the 3-bit chunk is 011, don't care nodes are searched in the order of 01*, 0*, *. This will be explained in detail as follows. By performing a right bit shift operation on the target 3-bit chunk in the search key, a prefix excluding the lowest * bit among the bits assigned to the don't care branch is obtained.

For example, assume that the target 3-bit chunk in the search key is 011. The right bit shift operation yields 01, and this 01 matches 01* minus *. Therefore, the search for don't care nodes is started from the don't care node of 01*, then the don't care node of 0*, and then the don't care node of *. Note that the search order may be reversed or may be performed in any other order. The figure shows a solid line with an arrow connecting from the exact match node 011 to the don't care node 01*, indicating that after the exact match node 011, proceed to the don't care node 01*. Also, a solid line with an arrow connecting from the don't care node 01* to the don't care node 0* is shown, indicating that the process proceeds to the don't care node 0* after the don't care node 01*. Also, a solid line with an arrow connecting from the don't care node 0* to the don't care node * is shown, indicating that after the don't care node 0*, proceed to the don't care node 0*. In each of 01*, 0*, and *, the least significant bit is a don't care bit (that is, the least significant bit is allowed to be either 1 or 0). Although an example has been shown in which a complete match node is searched first, the present invention is not limited to this, and a don't care node may be searched first.

The bit width size of the don't care branch changes depending on the position of the most significant don't care bit among the k bits of the don't care branches to be combined. When the 0*0, 0**, and 0*1 branches described above are combined to form the 0* branch, the most significant don't care bit is the second from the most significant bit, so the bit width size is 2. When combining 1*0, 1**, and 1*1 branches to form a 1* branch, the most significant don't care bit is the second from the most significant bit, so the bit width size is 2. When combining *00, *01, *10, *11, *0*, *1*, **0, **1, *** to form a branch of *, the top don't care bit is the top Since it is a bit, the bit width size is 1.

However, although the bit width size indicating the chunk of the search key is a fixed length of k bits, during the search, a part of the k bit chunk is used for judgment for bits smaller than the k bit width of the don't care branch. obtain. Therefore, a mismatch regarding the key length (bit width) may occur during determination.

Therefore, in this embodiment, a negative value larger than -k ("-" is a minus) is allowed as the bit index for the lowest chunk (chunk on the lower bit side) in the search key. If k=3, -1 and -2 are allowed. Of the k bits specified by the negative value bit index, bits that do not actually exist are treated as 0 when extracting a chunk from the search key.

The k-bit wide palm trie according to this embodiment has 2 ^k child nodes for exact match edges and 2 ^k -1 child nodes for don't care edges. In order to perform an efficient search, it is desirable to be able to quickly specify the branch to be searched (transition destination node) based on the chunk of the search key or the value calculated from the chunk.

FIG. 12 shows an example of a data structure for acquiring a pointer to a child node in a palm try node according to this embodiment. An example of two contiguous arrays is shown. The upper continuous array in FIG. 12 is for the exact match branch, and the lower continuous array in FIG. 12 is for the don't care branch. A continuous array is an array stored in consecutive areas of memory. A plurality of elements in a continuous array are arranged consecutively in memory with a fixed size. The number in parentheses at the bottom of the continuous array is the index of each element in the continuous array (hereinafter referred to as array index). You can specify an element by specifying an array index. By proceeding to the pointer (address) stored in the specified element, it is possible to proceed to the next node.

In the continuous array for a perfect match edge, one element is specified by the target chunk (if k=3, a 3-bit wide chunk) in the search key. If the target chunk in the search key is "100", the transition condition "100" is satisfied and the process proceeds to the node indicated by the pointer (address) stored in the element "100".

In the continuous array for the don't care branch, the array index (referred to as y) to be specified in the continuous array is calculated using the following equation (1). In other words, the array index used for the k-bit width bit string specified by the bit index is calculated using equation (1): y=2 ^h +g-1 (1)
Define the “chunk prefix” here. The “chunk prefix” is the portion of the k-bit chunk from the beginning until the don't care bit value (*) appears.
h is a parameter indicating the length of the leading binary value (0 or 1) in the chunk prefix. In other words, h is the length (bit length) of the prefix of the chunk from the first bit to before the don't care bit value (*).
g is a parameter indicating a value expressed in decimal notation of the binary part at the beginning of the chunk prefix.

FIG. 13 is a table showing the relationship between chunks, chunk prefixes, h, and g when k=3. For example, in the case of chunk 0*1, the part "0*" from the beginning to * is the chunk prefix. Since the part before * in the chunk prefix is only "0", h is 1. Since "0", which is the part before *, is 0 when expressed in decimal notation, g is 0. Therefore, y=1. Therefore, when proceeding from a certain node to a don't care branch, if the k-bit chunk of the don't care branch is 0*1, proceed to the node indicated by the pointer stored in the element with array index [1] in the don't care continuous array. Bye.
Similarly, when the chunk is 10*, the part "10*" from the beginning to * is the prefix of the chunk. Since the part before * in the chunk prefix is "10", h is 2. Since "10", which is the part before *, is expressed in decimal notation as 2, g is 2. Therefore, y=5. Therefore, when proceeding down a don't care branch from a certain node, if the k-bit chunk of the don't care branch is 10*, if we proceed to the node indicated by the pointer stored in the element with array index [5] in the don't care continuous array, good.

This makes it possible to quickly identify elements that satisfy the transition conditions for don't care branches, making it possible to search for nodes efficiently.

FIG. 14 is a diagram illustrating an example of a node structure in a palm trie with a bit width of k (k=3). The palm try nodes have the above-described continuous array for the exact match branch and the continuous array for the don't care branch. The transition condition for the exact match branch corresponds to a first transition condition that specifies that each of the k bits specified by the bit index has either the first value or the second value. The transition condition for the don't care branch corresponds to a second transition condition that allows at least one specific bit of the bits specified by the bit index to be either the first value or the second value. The bit index is an example of reference information that specifies k (k=3 in this embodiment) bits to be referenced in the search key.

Also, as in the first embodiment, the node stores a bit index, a binary bit string (key data (binary) in the figure), a bit string for a mask (key data (ternary mask) in the figure), a value, and a priority. have In the first embodiment, one bit was specified by a bit index, but in this embodiment, a case is assumed in which three bits are specified. Since the description of other items is the same as in the first embodiment, detailed description will be omitted.

The operation of the search key generation unit 14 is similar to that in the first embodiment. The operation of the search processing unit 15 is also basically the same as in the first embodiment, except for the operation caused by k changing from 1 to 3. In this embodiment, when searching for don't care branches, a maximum of three branches are searched for each subtree using the efficient method described above.

FIG. 15 is a flowchart illustrating an example of a palm try search operation according to the second embodiment. First, in a target node, a k-bit wide bit chunk specified by a bit index is set as a search key chunk (S11). At the start of this flow, the target node is the root node of the palm trie. In this embodiment, a k-bit wide chunk is made up of k consecutive bits, but it is not excluded that k bits arranged discretely can be made into a k-bit chunk.

In the target node, a complete matching node that satisfies the transition condition for the chunk (matches the chunk) is identified, and the process proceeds to the identified exact matching node (S12). Further, don't care nodes (for example, three) that satisfy the transition conditions for the chunk are specified, and the process proceeds to the specified don't care nodes (S12). Don't care nodes are efficiently identified by the method described above.

It is determined whether the nodes advanced from step S12 (complete match nodes and don't care nodes) are null nodes (S13). If the node is a null node (YES in S13), the search for the node is ended (S18). In other words, null is returned as the search result.

On the other hand, if the destination node is not a null node, it is determined whether the node has a subtree (S14). If there is a subtree, the process of this flowchart is recursively executed for the subtree whose root node is the node (S15). If there is no subtree (NO in S14) or after step S15, it is determined whether the bit index of the next node is greater than or equal to the bit index of the previous node (S16). That is, it is determined whether the bit index condition that the bit index of the next node is greater than or equal to the bit index of the previous node is satisfied. However, if the destination node is a leaf node that is not a null node, the process continues to the node pointed to by the leaf node pointer. Then, it is determined whether the bit index of the next node is greater than or equal to the index of the previous node.

If the bit index of the next node is greater than or equal to the previous index (YES in S16), information on the next node is acquired as a search result candidate (S17), and the main search ends. If it is confirmed that the search key matches the key data of the node, it may be acquired as a search result candidate. The node information includes, for example, key data, value, priority, and the like. On the other hand, if the bit index of the next node is smaller than the bit index of the previous node (NO in S16), the process proceeds to step S18.

It is determined whether all searches have been completed (S19), and if there are searches that have not yet been completed (NO), the process waits. When all searches are completed (YES in S19), the candidate with the highest priority among the acquired search result candidates is set as the search result (S20). That is, when a plurality of search result candidates are obtained through the search, the priorities of the plurality of candidates are compared, and the candidate with the highest priority is selected as the search result. The node containing the search result is the node that matches the search key. If there is one search result candidate, that candidate is acquired as the search result. The search result includes at least the value of the node, and may also include at least one of key data and priority.

A specific example of the palm try search according to this embodiment will be described below.

FIG. 16 shows an example of a k-bit wide palm try (extended palm try) generated for multiple entries 1 to 9 of the table shown in FIG. 2. A solid line with an arrow represents an example of a search procedure (search order) for a don't care branch, as in the example of FIG. The node number corresponds to the node ID (entry ID in the table of FIG. 2). “Bit” is a bit index.

FIG. 17 shows an example of the subtree T1 in the palm try of FIG. 16. FIG. 18 shows an example of the subtree T2 in the palm try of FIG. 16. FIG. 19 shows an example of the subtree T3 in the palm try of FIG. 16. FIG. 20 shows an example of subtree T4 in the palm try of FIG. 16 and subtree T5 connected to subtree T4. FIG. 21 shows an example of subtree T6 in the palm try of FIG. 16. FIG. 22 shows an example of the subtree T7 in the palm try of FIG. 16. FIG. 23 shows an example of subtree T8 in the palm try of FIG. 16.

An example of searching for the 8-bit search key 01110101 in the palm try of FIG. 16 will be described.

The bit index of node 2, which is the root node, is 5, and with the least significant bit being the 0th bit, 011, which is the 3rd bit of the 7th to 5th bits, is specified as a chunk in the search key 01110101. Don't care branches assigned 01*, 0*, * are identified as don't care branches to be searched by the method described above, and these don't care branches are searched.

First, the 01* node (that is, the node having a prefix of 01* as the upper 3 bits) only has a pointer to the next node 5 and does not have a subtree, so the process proceeds to 0* node 5.

Node 5 has a prefix of 0* as the upper two bits of the 8 bits. The bit index of node 5 is -2, and 100, which is the 3 bits from bit 0 to bit -2, is specified as a chunk in search key 01110101. The -2nd bit and -1st bit are treated as 0 as described above. When searching for a don't care branch that matches the chunk in the subtree T2 of node 5 (see FIG. 18), a don't care branch to which * is assigned is found. The destination node (leaf node) on this don't care branch indicates the own node 5, and satisfies the bit index condition (the bit index of the node after proceeding is greater than or equal to the bit index before proceeding). Further, the search key matches the key data of node 5. Therefore, information on node 5 is acquired as a candidate for the search result. Proceeding from node 5 to the exact match branch to which 100 is assigned in subtree T2, it becomes a null node and returns null as the search result.

Next, when proceeding from node 2 to the * node (that is, the node having the prefix * as the upper 1 bit), since this node is a null node, null is returned as the search result.

On the other hand, when a complete matching branch is searched from node 2, which is the root node, a branch assigned 011 is found, and the process proceeds to node 8 from this branch. The bit index of node 8 is 2, and 101, which is the 4th to 2nd bits of the search key 01110101, is specified as the chunk of the search key 01110101. When proceeding to the 10* node in the subtree T4 of node 8 (see FIG. 21), the next node (leaf node) is a leaf node that has a pointer indicating the own node 8, and the process returns to the own node 8. The bit index condition is satisfied and the search key matches the key data of node 5. Therefore, information on node 8 is obtained as a candidate for search results. On the other hand, proceeding from node 8 to the exact match branch to which 101 is assigned results in a null node, so null is returned as the search result.

On the other hand, when proceeding from node 8 to node 1*, this node is a null node, and then proceed to node 1 of *. The bit index of node 1 is -1. In the search key 01110101, 101, which is the 1st to -1st bits, is specified. That is, the 1st to 0th bits are 01 of the last two bits. Since the -1st bit does not exist, it is treated as 0 as described above. Therefore, 01 and 0 are combined to become 010. In the subtree T5 connected to the subtree T4, the child nodes for the don't care branch and exact match branch for 010 are all null. Note that in the subtree T5, all don't care nodes are null, so they are omitted.

From the above, two items, information on node 5 and information on node 8, were obtained as search result candidates. Comparing the priorities of these two candidates, the priority P7 of the information on node 5 is higher than the priority P2 of the information on node 8, so the information on node 5 is acquired as the search result.

As described above, according to the present embodiment, by combining multiple don't care branches into one branch, the depth of the tree when searching in units of k (k is an integer greater than or equal to 2) bit width is reduced. Palm try can be achieved. By using this palm try, the number of search steps can be reduced, so the search speed can be improved. Furthermore, since the pointers of the k don't care nodes to be searched can be quickly identified from the chunk of the search key, the search speed can be improved.

(Modification 1)
In modification 1, the size of the node in the second embodiment described above is reduced (the node is compressed). In the node structure shown in FIG. 14 of the second embodiment, the maximum number of pointers for exact match branches and pointers for don't care branches are prepared. Therefore, even if the node indicated by the pointer is a null node, it is necessary to reserve a memory area for the null node. The array size also increases. In this modification, the size of the array is reduced to save the memory area of the null node.

FIG. 24 shows an example in which a pointer indicating a null node is indicated by diagonal lines in a node structure similar to that of the second embodiment.

FIG. 25 shows a node structure according to modification example 1, which is a compressed version of the node structure shown in FIG. A base address (Base1) and a bitmap are provided for the exact match branch. The bitmap has the same order of transition conditions as in FIG. 24, with 0 indicating that the transition destination node is a null node and 1 indicating that it is a non-null node. For example, the leftmost bit of the bitmap corresponds to the transition condition "000", and the transition destination node is a null node. The third bit from the left corresponds to the transition condition "010", and the transition destination node is a non-null node. If the transition destination node is a non-null node, the pointer (address of the transition destination node) is set by adding an offset according to the number of 1s to the left of the bit corresponding to the applicable transition condition to the base address. calculate. The pointer calculation formula is the following formula (2).

Pointer = Base1 + Offset value × (Number of 1s on the left) Formula (2)

For example, in the case of the transition condition "010" corresponding to the third bit from the left of the bitmap, the number of 1's on the left side is zero, so the base address (Base1) becomes the pointer. For example, in the case of the transition condition "100" corresponding to the fifth bit from the left of the bitmap, the number of 1's on the left side is one, so the base address + offset value becomes the pointer. If the transition condition is "001", the transition destination node is determined to be a null node because the bitmap value is 0, and no transition is performed.

In this way, the address of the transition destination node is calculated based on the offset according to the specified order of the transition conditions and the base address (Base1). As a result, there is no need to reserve a memory area for a null node, so the memory area can be saved.

Similarly, a base address (Base2) and a bitmap are provided for the don't care branch. The bitmap has the same order of transition conditions as in FIG. 24, with 0 indicating that the transition destination node is a null node and 1 indicating that it is a non-null node. For example, in the case of the transition condition "0*" corresponding to the second bit from the left of the bitmap, the transition destination node is a null node. In the case of the transition condition "*" corresponding to the leftmost bit of the bitmap, the transition destination node is a non-null node. If the transition destination node is a non-null node, the pointer (transition destination node address). The pointer calculation formula is the following formula (3).

Pointer = Base2 + offset value x (number of 1s on the left) Formula (3)

For example, in the case of the transition condition "*", the number of 1's on the left side is zero, so the base address (Base2) becomes the pointer.

In this way, the address of the transition destination node is calculated based on the offset according to the specified order of the transition conditions and the base address (Base2). As a result, there is no need to reserve a memory area for a null node, so the memory area can be saved.

(Modification 2)
In the present modification example 2, a node holds information on the highest priority among all other nodes that may transition from a certain node. If the maximum priority is lower than the priority of the node, the node does not transition to another node. This eliminates unnecessary searches and speeds up processing.

FIG. 26 shows an example of a node structure according to the second modification. Information about the highest priority among other nodes that may transition from the node is held. In the illustrated example, the maximum priority is P4. When processing progresses to the node, the priority of the node is first compared with the maximum priority, and if the priority of the node is higher than the maximum priority, the subsequent search is omitted. In the illustrated example, since the maximum priority P4 is lower than the node priority P7, no search is performed from this node to other nodes.

As an expanded example of Modification 2, for each transition condition, the maximum priority among all nodes that may transition after the transition destination node according to the transition condition may be held. In this case, node transition is performed only when the transition condition with a higher priority than the own node is satisfied.

(Modification 3)
As described in the second embodiment, when the bit index of the next node is greater than or equal to the previous bit index, the bit index condition is satisfied, and the information of the next node is identified as a search result candidate. Ta. For example, in FIG. 21, when proceeding from leaf node 110 to node 4, information on node 4 is identified as a search result candidate (a node that matches the search key). By storing the information of node 4 in the leaf node 110 and omitting the transition from the leaf node to node 4, the search calculation can be simplified. That is, information about node 4 that matches the search key is included in the node (leaf node 110) before transition to the transition destination node (node 4). The search processing unit 15 acquires information about the node 4 from the nodes 110 without transitioning to the node 4, and identifies a node that matches the search key based on the acquired information.

For example, for node 110 (a leaf node with a transition to a higher-level node), information indicating that the node is a leaf node (information indicating that information on higher-level nodes that matches the search key is held as a search result) and information about node 4 are stored. The information on the node 4 includes, for example, the value and priority of the node 4, and may also include key data. When processing a node, if information indicating that it is a leaf node is stored, search result candidates held in the leaf node are obtained and subsequent searches are omitted. In the example of FIG. 21, when the search processing unit 15 detects that information indicating that it is a leaf node is stored in the processing of the node 110, the search processing unit 15 searches the information of the node 4 stored in the node 110. Obtained as a search result candidate.

(Third embodiment)
Part or all of each device (information processing device or communication device) in the embodiments described above may be configured by hardware, or may be executed by a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc. It may also be configured by information processing of software (program). In the case where the software is configured by software information processing, the software that realizes at least some of the functions of each device in the above-described embodiments may be stored on a flexible disk, CD-ROM (Compact Disc-Read Only Memory), or USB (Universal Software information processing may be executed by storing the information in a non-temporary storage medium (non-temporary computer-readable medium) such as Serial Bus (Serial Bus) memory and reading it into a computer. Further, the software may be downloaded via a communication network. Furthermore, information processing may be performed by hardware by implementing software in a circuit such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array).

The type of storage medium that stores software is not limited. The storage medium is not limited to a removable one such as a magnetic disk or an optical disk, but may be a fixed storage medium such as a hard disk or memory. Further, the storage medium may be provided inside the computer or may be provided outside the computer.

FIG. 27 is a block diagram showing an example of the hardware configuration of each device (information processing device or communication device) in the embodiment described above. Each device includes, for example, a processor 91, a main storage device 92 (memory), an auxiliary storage device 93 (memory), a network interface 94, and a device interface 95, which are connected via a bus 96. It may be realized as a computer 90.

Although the computer 90 in FIG. 27 includes one of each component, it may include a plurality of the same components. Furthermore, although one computer 90 is shown in FIG. 27, the software may be installed on multiple computers, and each of the multiple computers may execute the same or different part of the software. Good too. In this case, a form of distributed computing may be used in which each computer communicates via the network interface 94 or the like to execute processing. In other words, each device (information processing device or communication device) in the embodiments described above is configured as a system that realizes functions by having one or more computers execute instructions stored in one or more storage devices. may be done. Alternatively, the information transmitted from the terminal may be processed by one or more computers provided on the cloud, and the processing results may be sent to the terminal.

Various calculations of each device (information processing device or communication device) in the embodiments described above may be executed in parallel using one or more processors or multiple computers via a network. good. Further, various calculations may be distributed to a plurality of calculation cores within the processor and executed in parallel. Further, a part or all of the processing, means, etc. of the present disclosure may be executed by at least one of a processor and a storage device provided on a cloud that can communicate with the computer 90 via a network. In this way, each device in the embodiments described above may be in the form of parallel computing using one or more computers.

The processor 91 may be an electronic circuit (processing circuit, processing circuitry, CPU, GPU, FPGA, ASIC, etc.) including a computer control device and an arithmetic device. Further, the processor 91 may be a semiconductor device or the like including a dedicated processing circuit. The processor 91 is not limited to an electronic circuit using an electronic logic element, but may be realized by an optical circuit using an optical logic element. Further, the processor 91 may include an arithmetic function based on quantum computing.

The processor 91 can perform arithmetic processing based on data and software (programs) input from each device in the internal configuration of the computer 90, and can output calculation results and control signals to each device. The processor 91 may control each component making up the computer 90 by executing the OS (Operating System) of the computer 90, applications, and the like.

Each device (information processing device or communication device) in the embodiment described above may be realized by one or more processors 91. Here, the processor 91 may refer to one or more electronic circuits arranged on one chip, or one or more electronic circuits arranged on two or more chips or two or more devices. You can also point. When using multiple electronic circuits, each electronic circuit may communicate by wire or wirelessly.

The main storage device 92 is a storage device that stores instructions and various data to be executed by the processor 91, and information stored in the main storage device 92 is read out by the processor 91. The auxiliary storage device 93 is a storage device other than the main storage device 92. Note that these storage devices are any electronic components capable of storing electronic information, and may be semiconductor memories. Semiconductor memory may be either volatile memory or nonvolatile memory. The storage device for storing various data in each device (information processing device or communication device) in the embodiments described above may be realized by the main storage device 92 or the auxiliary storage device 93, and may be realized by the built-in storage device built in the processor 91. It may also be realized by memory. For example, the storage unit in the embodiment described above may be realized by the main storage device 92 or the auxiliary storage device 93.

A plurality of processors may be connected (combined) to one storage device (memory), or a single processor may be connected to one storage device (memory). A plurality of storage devices (memories) may be connected (combined) to one processor. In the case where each device (information processing device or communication device) in the above-described embodiment is composed of at least one storage device (memory) and a plurality of processors connected (coupled) to the at least one storage device (memory) , at least one of the plurality of processors may be connected (coupled) to at least one storage device (memory). Further, this configuration may be realized by a storage device (memory) and a processor included in a plurality of computers. Furthermore, a configuration in which a storage device (memory) is integrated with a processor (for example, a cache memory including an L1 cache and an L2 cache) may be included.

The network interface 94 is an interface for connecting to the communication network 97 wirelessly or by wire. As the network interface 94, an appropriate interface such as one that complies with existing communication standards may be used. The network interface 94 may exchange information with an external device 98A connected via the communication network 97. Note that the communication network 97 may be any one of a WAN (Wide Area Network), a LAN (Local Area Network), a PAN (Personal Area Network), etc., or a combination thereof, and can be used to connect the computer 90 and the external device 98A. It is sufficient that information is exchanged between them. Examples of WAN include the Internet, examples of LAN include IEEE802.11 and Ethernet (registered trademark), and examples of PAN include Bluetooth (registered trademark) and NFC (Near Field Communication).

The device interface 95 is an interface such as a USB that is directly connected to the external device 98B.

The external device 98A is a device connected to the computer 90 via a network. External device 98B is a device directly connected to computer 90.

The external device 98A or the external device 98B may be an input device, for example. The input device is, for example, a device such as a camera, microphone, motion capture, various sensors, keyboard, mouse, or touch panel, and provides the acquired information to the computer 90. Alternatively, the device may be a device including an input section, a memory, and a processor, such as a personal computer, a tablet terminal, or a smartphone.

Further, the external device 98A or the external device 98B may be an output device, for example. The output device may be a display device such as an LCD (Liquid Crystal Display), a CRT (Cathode Ray Tube), a PDP (Plasma Display Panel), or an organic EL (Electro Luminescence) panel, or output audio or the like. It may also be a speaker or the like. Alternatively, the device may be a device including an output unit, a memory, and a processor, such as a personal computer, a tablet terminal, or a smartphone.

Further, the external device 98A or the external device 98B may be a storage device (memory). For example, the external device 98A may be a network storage or the like, and the external device 98B may be a storage such as an HDD.

Further, the external device 98A or the external device 98B may be a device having some functions of the components of each device (information processing device or communication device) in the embodiments described above. That is, the computer 90 may transmit or receive part or all of the processing results of the external device 98A or 98B.

In this specification (including claims), the expression "at least one (one) of a, b, and c" or "at least one (one) of a, b, or c" (including similar expressions) When used, it includes any of a, b, c, a-b, a-c, b-c, or a-b-c. Further, each element may include multiple instances, such as a-a, a-b-b, a-a-b-b-c-c, etc. Furthermore, it also includes adding other elements other than the listed elements (a, b and c), such as having d as in a-b-c-d.

In this specification (including claims), when expressions such as "using data as input/based on data/in accordance with/according to" (including similar expressions) are used, unless otherwise specified, This includes cases where various data itself is used as input, and cases where various data subjected to some processing (for example, noise added, normalized, intermediate representation of various data, etc.) are used as input. In addition, if it is stated that a certain result is obtained "based on/according to/according to data", this includes cases where the result is obtained only based on the data, and other data other than the data, It may also include cases where the results are obtained under the influence of factors, conditions, and/or states. In addition, if it is stated that "data will be output", if there is no special notice, various data itself may be used as output, or data that has been processed in some way (for example, data with added noise, normal This also includes cases in which the output is digitized data, intermediate representations of various data, etc.).

In this specification (including the claims), when the terms "connected" and "coupled" are used, the terms "connected" and "coupled" refer to direct connection/coupling and indirect connection/coupling. , electrically connected/coupled, communicatively connected/coupled, functionally connected/coupled, physically connected/coupled, etc., without limitation. intended as a term. The term should be interpreted as appropriate depending on the context in which the term is used, but forms of connection/coupling that are not intentionally or naturally excluded are not included in the term. Should be construed in a limited manner.

In this specification (including the claims), when the expression "A configured to B" is used, it means that the physical structure of element A is capable of performing operation B. configuration, and includes a permanent or temporary setting/configuration of element A being configured/set to actually perform operation B. good. For example, if element A is a general-purpose processor, the processor has a hardware configuration that can execute operation B, and can perform operation B by setting a permanent or temporary program (instruction). It only needs to be configured to actually execute. In addition, if element A is a dedicated processor or a dedicated arithmetic circuit, the circuit structure of the processor is configured to actually execute operation B, regardless of whether control instructions and data are actually attached. It is sufficient if it has been implemented.

In this specification (including the claims), when terms meaning inclusion or possession (for example, "comprising/including" and "having", etc.) are used, the object of the term It is intended as an open-ended term, including the case of containing or possessing something other than the object indicated. If the object of a term meaning inclusion or possession is an expression that does not specify a quantity or suggests a singular number (an expression with a or an as an article), the expression shall be interpreted as not being limited to a specific number. It should be.

In this specification (including the claims), expressions such as "one or more" or "at least one" are used in some places, and quantities are specified in other places. Even if an expression is used that suggests no or singular (an expression with the article a or an), it is not intended that the latter expression means "one". In general, expressions that do not specify a quantity or imply a singular number (expressions with the article a or an) should be construed as not necessarily being limited to a particular number.

In this specification, if it is stated that a specific effect (advantage/result) can be obtained with respect to a specific configuration of a certain embodiment, unless there is a reason to the contrary, one or more other components having the configuration may be used. It should be understood that the same effect can also be obtained with the embodiment. However, it should be understood that the presence or absence of the said effect generally depends on various factors, conditions, and/or states, and that the said effect is not necessarily obtained by the said configuration. The effect is only obtained by the configuration described in the Examples when various factors, conditions, and/or states, etc. are satisfied, and in the claimed invention that specifies the configuration or a similar configuration. However, this effect is not necessarily obtained.

In this specification (including the claims), when terms such as "maximize" are used, it refers to finding a global maximum value, finding an approximate value of a global maximum value, or finding a local maximum value. and approximating the local maximum value, and should be interpreted as appropriate depending on the context in which the term is used. It also includes finding approximate values of these maximum values probabilistically or heuristically. Similarly, terms such as "minimize" are used to refer to finding a global minimum, finding an approximation to a global minimum, finding a local minimum, and finding a local minimum. It includes approximations of values and should be interpreted as appropriate depending on the context in which the term is used. It also includes finding approximate values of these minimum values probabilistically or heuristically. Similarly, terms such as "optimize" are used to refer to finding a global optimum, finding an approximation to a global optimum, finding a local optimum, and determining a local optimum. It includes approximations of values and should be interpreted as appropriate depending on the context in which the term is used. It also includes finding approximate values of these optimal values probabilistically or heuristically.

In this specification (including claims), when multiple pieces of hardware perform a predetermined process, each piece of hardware may cooperate to perform the predetermined process, or some of the hardware may perform the predetermined process. You may do all of the above. Further, some hardware may perform part of a predetermined process, and another piece of hardware may perform the rest of the predetermined process. In this specification (including claims), when expressions such as "one or more hardware performs the first process, and the one or more hardware performs the second process" are used , the hardware that performs the first processing and the hardware that performs the second processing may be the same or different. In other words, the hardware that performs the first processing and the hardware that performs the second processing may be included in the one or more pieces of hardware. Note that the hardware may include an electronic circuit, a device including an electronic circuit, or the like.

In this specification (including claims), when multiple storage devices (memories) store data, each storage device (memory) among the multiple storage devices (memories) stores only part of the data. It may be stored, or the entire data may be stored.

Although the embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to the individual embodiments described above. Various additions, changes, substitutions, and partial deletions are possible without departing from the conceptual idea and spirit of the present invention derived from the content defined in the claims and equivalents thereof. For example, in all the embodiments described above, when numerical values or formulas are used in the explanation, they are shown as examples, and the invention is not limited to these. Further, the order of each operation in the embodiment is shown as an example, and the order is not limited to this.

1 Information processing device (communication device)
11 Receiving unit 12 Packet processing unit 13 Storage unit 14 Search key generation unit 15 Search processing unit 16 Transmission unit 90 Computer 91 Processor 92 Main storage device 93 Auxiliary storage device 94 Network interface 95 Device interface 96 Bus 97 Communication network 98A External device 98B External Device 140 Temporary storage unit

Claims (16)

Reference information specifying k bits (k is an integer of 1 or more) to be referenced in a search key, and at least one transition condition that defines a transition destination node according to the value of the bit specified by the reference information. , a search processing unit that searches for a node that matches the search key in a data structure having a plurality of nodes including;
At least one of the transition conditions in at least one node allows at least one specific bit of the bits specified by the reference information to be either a first value or a second value;
The search processing unit specifies a transition condition that is satisfied by the bit specified by the reference information among the at least one transition condition, and transitions to a node specified by the specified transition condition, thereby determining the search key. An information processing device that searches for matching nodes. According to claim 1, when there are a plurality of transition conditions satisfied by the bits specified by the reference information, the search processing unit transitions to a node defined by the specified transition condition for each of the plurality of specified transition conditions. The information processing device described. The at least one transition condition includes at least one first transition condition and at least one second transition condition,
The first transition condition specifies that each of the bits specified by the reference information is either a first value or a second value,
The information processing according to claim 1 or 2, wherein the second transition condition allows at least a specific bit of the bits specified by the reference information to be either the first value or the second value. Device. The information processing according to claim 3, wherein the search processing unit specifies the second transition condition satisfied by the bit specified by the reference information based on a right bit shift operation of the bit specified by the reference information. Device. The information processing apparatus according to claim 1, wherein the k bits specified by the reference information are k consecutive bits among a plurality of bits included in the search key. The node has a value and a priority,
The search processing unit acquires values included in a plurality of nodes found by the search as search result candidates;
The information processing device according to any one of claims 1 to 5, wherein the search processing unit selects one of the plurality of candidates as the search result based on the priorities of the plurality of nodes. the at least one transition condition includes a plurality of second transition conditions,
The information processing device according to claim 3, wherein bits that allow the plurality of second transition conditions to be either the first value or the second value are different from each other. The information processing device according to claim 7, wherein the plurality of second transition conditions allow only the least significant bit of the bits specified by the reference information to be either the first value or the second value. . When the reference information of the transition destination node specifies the same bit as the reference information of the node before transitioning to the transition destination node or a bit higher than the bit, the search processing unit specifies the transition destination node. The information processing device according to claim 1, wherein the node is a node that matches the search key. the node has key data;
The information processing apparatus according to any one of claims 1 to 9, wherein the search processing unit sets a node having key data matching the search key as a node matching the search key. The node has the highest priority among the nodes that may transition after the node defined by the transition condition,
The information processing device according to claim 6, wherein the search processing unit does not perform transition to the node defined by the transition condition when the maximum priority is lower than the priority of the node. The node includes information regarding the order of the at least one transition condition and a base address,
The search processing unit calculates an address of a transition destination node defined by the specified transition condition based on an offset according to the specified order of the transition condition and the base address, and executes the transition based on the calculated address. The information processing device according to any one of claims 1 to 11, wherein the information processing device transitions to a previous node. The node before transitioning to the transition destination node includes information about the transition destination node that matches the search key,
The search processing unit acquires information about the transition destination node from a node before transitioning to the transition destination node, and based on the acquired information, determines the transition destination node as a node that matches the search key. The information processing device according to claim 9. a receiving unit that receives the packet;
a generation unit that generates the search key based on the header of the packet;
The search processing unit searches for the node in the data structure based on the search key,
The node includes a value indicating processing to be performed on the packet,
The information processing apparatus according to any one of claims 1 to 13, further comprising a packet processing unit that performs processing on the packet according to a value included in a node found in the search. Reference information specifying k bits (k is an integer of 1 or more) to be referenced in a search key, and at least one transition condition that defines a transition destination node according to the value of the bit specified by the reference information. , a step of searching for a node that matches the search key in a data structure having a plurality of nodes including;
At least one of the transition conditions in at least one node allows at least one of the bits specified by the reference information to be either a first value or a second value;
The step includes identifying a transition condition that is satisfied by the bit specified by the reference information among the at least one transition condition, and transitioning to a node specified by the identified transition condition, thereby matching the search key. An information processing method that searches for nodes. Reference information specifying k bits (k is an integer of 1 or more) to be referenced in a search key, and at least one transition condition that defines a transition destination node according to the value of the bit specified by the reference information. causing a computer to perform a step of searching for a node that matches the search key in a data structure having a plurality of nodes including;
At least one of the transition conditions in at least one node allows at least one specific bit of the bits specified by the reference information to be either a first value or a second value;
The step includes identifying a transition condition that is satisfied by the bit specified by the reference information among the at least one transition condition, and transitioning to a node defined by the identified transition condition, thereby matching the search key. A computer program that searches for nodes.

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