JP2020102443A - Plasma processing apparatus, impedance matching method and plasma processing method - Google Patents

Abstract

To provide a plasma processing apparatus capable of efficiently supplying ions including desired ion energy to a substrate.SOLUTION: In a plasma processing apparatus, a first high-frequency power supply 61 is connected to a lower electrode 18 of a substrate support table 14 provided in a chamber 10 via a first matching unit 63. The first high-frequency power supply 61 supplies the first high frequency power for bias to the lower electrode 18. A second high-frequency power supply 62 is connected to a load via a second matching unit 64. The second high-frequency power supply 62 supplies the second high-frequency power for generating plasma to the load. A controller of the second matching unit 64 sets impedance of a matching circuit of the second matching unit 64 in order to reduce reflection from the load of the second high-frequency power supply 62 in a partial period specified within each frequency of the first high-frequency power.SELECTED DRAWING: Figure 1

Description

The exemplary embodiments of the present disclosure relate to a plasma processing apparatus, an impedance matching method, and a plasma processing method.

Plasma processing equipment is used in the manufacture of electronic devices. The plasma processing apparatus includes a chamber, a substrate support, a first high frequency power supply, a first matching device, a second high frequency power supply, and a second matching device. The substrate support has a lower electrode and is provided in the chamber. The first high frequency power supply supplies the first high frequency power to the lower electrode via the first matching unit. The first matching unit has a matching circuit for matching the load-side impedance of the first high-frequency power supply with the output impedance of the first high-frequency power supply. The first high frequency power is bias high frequency power. The second high frequency power supply supplies the second high frequency power for plasma generation through the second matching unit. The second matching unit has a matching circuit for matching the load-side impedance of the second high-frequency power supply with the output impedance of the second high-frequency power supply. Such a plasma processing apparatus is described in Patent Document 1.

JP, 2016-096342, A

Plasma processing performed using a plasma processing apparatus requires efficiently supplying ions having a desired ion energy to a substrate.

In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support, a first high frequency power supply, a first matching device, a second high frequency power supply, and a second matching device. The substrate support has a lower electrode and is provided in the chamber. The first high frequency power supply is configured to supply the first high frequency power to the lower electrode. The first high frequency power is bias high frequency power. The first matching unit is connected between the first high frequency power supply and the load of the first high frequency power supply. The second high frequency power supply is configured to supply a second high frequency power for plasma generation. The second matching unit is connected between the second high frequency power supply and the load of the second high frequency power supply. The second matching device has a matching circuit and a controller. The matching circuit has a variable impedance. The controller is configured to set the impedance of the matching circuit to reduce reflections from the load of the second high frequency power supply during the designated sub-period within each cycle of the first high frequency power.

According to one exemplary embodiment, ions having a desired ion energy can be efficiently supplied to the substrate.

1 is a diagram schematically showing a plasma processing apparatus according to an exemplary embodiment. It is a figure which shows an example of a structure of the power supply system containing two matching devices of the plasma processing apparatus shown in FIG. It is an example timing chart regarding the high frequency power LF, the high frequency power HF, and the synchronization signal SS. It is a figure which shows another example of a structure of the power supply system containing two matching devices of the plasma processing apparatus shown in FIG. It is an example timing chart showing the potential of the substrate and the potential of the plasma based on the first high-frequency power. 6 is a flow chart illustrating a method of impedance matching according to one exemplary embodiment. 3 is a flowchart illustrating a plasma processing method according to an exemplary embodiment. FIG. 8A is a partially enlarged cross-sectional view of an example substrate, and FIGS. 8B and 8C are states after execution of each of a plurality of steps of the plasma processing method shown in FIG. 7. 3 is a partially enlarged cross-sectional view of an example of the substrate in FIG. 6 is a flowchart illustrating a plasma processing method according to another exemplary embodiment. 10A is a partially enlarged cross-sectional view of an example substrate, and FIGS. 10B to 10E are views after performing each of a plurality of steps of the plasma processing method illustrated in FIG. 9. It is a partially expanded sectional view of an example of a substrate in a state. 6 is a flow chart illustrating a plasma processing method according to yet another exemplary embodiment. FIG. 12A is a partially enlarged cross-sectional view of an example substrate, and FIG. 12B is a part of the example substrate in a state after performing step ST31 of the plasma processing method illustrated in FIG. 11. It is an expanded sectional view. 6 is a flow chart illustrating a plasma processing method according to yet another exemplary embodiment. FIG. 14A is a partially enlarged cross-sectional view of an example substrate, and FIGS. 14B to 14D show after performing each of a plurality of steps of the plasma processing method shown in FIG. 13. FIG. 6 is a partially enlarged cross-sectional view of an example of a substrate in the state of FIG. 6 is a flow chart illustrating a plasma processing method according to yet another exemplary embodiment. FIG. 16A is a partially enlarged cross-sectional view of an example substrate, and FIGS. 16B to 16D are after performing each of a plurality of steps of the plasma processing method shown in FIG. FIG. 6 is a partially enlarged cross-sectional view of an example of a substrate in the state of FIG. 6 is a flow chart illustrating a plasma processing method according to yet another exemplary embodiment. FIG. 18A is a partially enlarged cross-sectional view of an example substrate, and FIGS. 18B and 18C show after performing each of a plurality of steps of the plasma processing method shown in FIG. FIG. 3 is a partially enlarged cross-sectional view of an example of the substrate in the state of It is a figure which shows schematically the plasma processing apparatus which concerns on another exemplary embodiment. It is an example timing chart regarding the output voltage VO of the power supply 61A, the high frequency power HF, and the synchronization signal SS.

Various exemplary embodiments are described below.

In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support, a first high frequency power supply, a first matching device, a second high frequency power supply, and a second matching device. The substrate support has a lower electrode and is provided in the chamber. The first high frequency power supply is configured to supply the first high frequency power to the lower electrode. The first high frequency power is bias high frequency power. The first matching unit is connected between the first high frequency power supply and the load of the first high frequency power supply. The second high frequency power supply is configured to supply a second high frequency power for plasma generation. The second matching unit is connected between the second high frequency power supply and the load of the second high frequency power supply. The second matching device has a matching circuit and a controller. The matching circuit has a variable impedance. The controller is configured to set the impedance of the matching circuit to reduce reflections from the load of the second high frequency power supply during the designated sub-period within each cycle of the first high frequency power.

During a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a positive polarity, the potential difference between the substrate and the plasma is small and the sheath is thin. Therefore, the energy of the ions supplied from the plasma to the substrate is low during the period in which the voltage of the first high-frequency power output from the first high-frequency power source has a positive polarity. On the other hand, in the period in which the voltage of the first high-frequency power output from the first high-frequency power source has a negative polarity, the potential difference between the substrate and the plasma is large and the sheath is thick. Therefore, the energy of the ions supplied from the plasma to the substrate is high during the period in which the voltage of the first high-frequency power output from the first high-frequency power source has a negative polarity. In one exemplary embodiment, reflection is reduced during a sub-period within each cycle of the first high frequency power to increase plasma generation efficiency. On the other hand, in periods other than the partial periods in each cycle of the first high-frequency power, the reflection of the second high-frequency power increases and the plasma generation efficiency decreases. Therefore, in this embodiment, by designating the partial period within each cycle of the first high-frequency power, the ions having the desired ion energy are efficiently generated and supplied to the substrate.

In one exemplary embodiment, the plasma processing apparatus may further include a sensor. The sensor is configured to measure voltage and current in the electrical path between the matching circuit and the second high frequency power supply. The controller determines the load-side impedance of the second high frequency power supply in the partial period from the voltage and the current acquired by the sensor. The controller is configured to set the impedance of the matching circuit to reduce the difference between the determined impedance and the output impedance of the second high frequency power supply.

In another exemplary embodiment, a method of impedance matching performed in a plasma processing apparatus is provided. The matching method includes a step of supplying a first high frequency power, which is a bias high frequency power, from a first high frequency power supply to a lower electrode of a support table provided in a chamber of a plasma processing apparatus via a first matching device. Including. The matching method further includes the step of supplying a second high frequency power for plasma generation from the second high frequency power supply via the second matching unit. The matching method includes the step of setting the impedance of the matching circuit of the second matcher in order to reduce the reflection from the load of the second high frequency power supply in the designated partial period within each cycle of the first high frequency power. Is further included.

In one exemplary embodiment, the load-side impedance of the second high frequency power supply within the partial period is determined from the voltage and current in the electrical path between the matching circuit and the second high frequency power supply. The voltage and current are acquired by the sensor. The impedance of the matching circuit is set to reduce the difference between the determined impedance and the output impedance of the second high frequency power supply.

In one exemplary embodiment, the partial period may be a period within the period in which the voltage of the first high frequency power output from the first high frequency power supply has a negative polarity. According to this embodiment, ions having high energy are efficiently generated and supplied to the substrate.

In one exemplary embodiment, the partial period may be a period within the period in which the voltage of the first high frequency power output from the first high frequency power supply has a positive polarity. According to this embodiment, ions having low energy are efficiently generated and supplied to the substrate.

In yet another exemplary embodiment, a plasma processing method implemented in a plasma processing apparatus is provided. The plasma processing method includes the step of performing the first plasma processing in the chamber of the plasma processing apparatus during the first period. The plasma treatment method further includes performing a second plasma treatment in the chamber during a second period after the first period or subsequent to the first period. Each of the step of performing the first plasma treatment and the step of performing the second plasma treatment is performed on the lower electrode of the support table provided in the chamber from the first high frequency power source via the first matching box. The method includes the step of supplying a first high frequency power which is a bias high frequency power. Each of the step of performing the first plasma treatment and the step of performing the second plasma treatment includes a step of supplying a second high frequency power for plasma generation from a second high frequency power supply via a second matching unit. Is further included. Each of the step of performing the first plasma processing and the step of performing the second plasma processing further includes the step of setting the impedance of the matching circuit of the second matching device. The impedance of the matching circuit of the second matcher is set so as to reduce the reflection from the load of the second high frequency power supply in the specified sub-period within each cycle of the first high frequency power. In one of the step of performing the first plasma treatment and the step of performing the second plasma treatment, the voltage of the first high-frequency power output from the first high-frequency power source has a negative polarity in the partial period. It is a period within the period. In the other of the step of performing the first plasma treatment and the step of performing the second plasma treatment, the voltage of the first high-frequency power output from the first high-frequency power source has a positive polarity in the partial period. It is a period within the period.

In the step of performing the first plasma treatment, the partial period may be a period within a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a negative polarity. In this case, in the step of performing the second plasma treatment, the partial period may be a period within a period in which the voltage of the first high frequency power output from the first high frequency power supply has a positive polarity. ..

In the step of performing the first plasma treatment, the partial period may be a period within a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a positive polarity. In this case, in the step of performing the second plasma treatment, the partial period may be a period within a period in which the voltage of the first high frequency power output from the first high frequency power supply has a negative polarity. ..

In one exemplary embodiment, the substrate may be placed in the chamber for a first time period and a second time period. The substrate may have a base region and a film provided on the base region. In the step of performing the first plasma treatment, the film may be etched using plasma of the treatment gas so as to expose the underlying region. In the step of performing the second plasma treatment, the film may be further etched using plasma of the treatment gas.

In one exemplary embodiment, the substrate may be placed in the chamber for a first time period and a second time period. The substrate can have a first film and a second film. The first film may be provided on the second film. In the step of performing the first plasma treatment, the first film may be etched using plasma of the processing gas. In the step of performing the second plasma treatment, the second film may be etched using plasma of the processing gas.

In one exemplary embodiment, the substrate may be placed in the chamber during the first time period. In the step of performing the first plasma processing, the film of the substrate may be etched using plasma of the processing gas. The substrate may not be placed in the chamber during the second period. The deposit adhered to the inner wall surface of the chamber may be removed by using the plasma of the processing gas in the step of performing the second plasma processing.

In one exemplary embodiment, the substrate may be placed in the chamber for a first time period and a second time period. In the step of performing the first plasma treatment, the plasma of the processing gas may be used to etch the film of the substrate to provide sidewall surfaces. In the step of performing the second plasma treatment, a chemical species from the plasma of the treatment gas or a plasma of another treatment gas from the plasma of the treatment gas is formed on the surface of the substrate whose film is etched in the step of performing the first plasma treatment. A deposit containing the chemical species may be formed. The step of performing the first plasma treatment and the step of performing the second plasma treatment may be alternately repeated.

In one exemplary embodiment, the substrate may be placed in the chamber for a first time period and a second time period. In the step of performing the first plasma treatment, the plasma of the processing gas may be used to etch the film of the substrate to provide sidewall surfaces. In the step of performing the second plasma treatment, the surface of the film etched in the step of performing the first plasma treatment may be modified by using plasma of a processing gas or plasma of another processing gas. The step of performing the first plasma treatment and the step of performing the second plasma treatment may be alternately repeated.

Hereinafter, various exemplary embodiments will be described in detail with reference to the drawings. In each drawing, the same or corresponding parts are designated by the same reference numerals.

FIG. 1 is a schematic diagram of a plasma processing apparatus according to an exemplary embodiment. The plasma processing apparatus 1 shown in FIG. 1 is a capacitively coupled plasma processing apparatus. The plasma processing apparatus 1 includes a chamber 10. The chamber 10 provides an internal space 10s therein.

The chamber 10 includes a chamber body 12. The chamber body 12 has a substantially cylindrical shape. The internal space 10s is provided inside the chamber body 12. The chamber body 12 is made of, for example, aluminum. A film having corrosion resistance is provided on the inner wall surface of the chamber body 12. The film having corrosion resistance may be a film formed of a ceramic such as aluminum oxide or yttrium oxide.

A passage 12p is formed in the side wall of the chamber body 12. The substrate W passes through the passage 12p when being transferred between the internal space 10s and the outside of the chamber 10. The passage 12p can be opened and closed by a gate valve 12g. The gate valve 12g is provided along the side wall of the chamber body 12.

A support portion 13 is provided on the bottom of the chamber body 12. The support portion 13 is made of an insulating material. The support portion 13 has a substantially cylindrical shape. The support portion 13 extends upward from the bottom portion of the chamber body 12 in the internal space 10s. The support 13 supports a substrate support, that is, a support 14. The support base 14 is provided in the internal space 10s. The support table 14 is configured to support the substrate W in the chamber 10, that is, in the internal space 10s.

The support 14 has a lower electrode 18 and an electrostatic chuck 20. The support 14 may further include an electrode plate 16. The electrode plate 16 is made of a conductor such as aluminum and has a substantially disc shape. The lower electrode 18 is provided on the electrode plate 16. The lower electrode 18 is formed of a conductor such as aluminum and has a substantially disc shape. The lower electrode 18 is electrically connected to the electrode plate 16.

The electrostatic chuck 20 is provided on the lower electrode 18. The substrate W is placed on the upper surface of the electrostatic chuck 20. The electrostatic chuck 20 has a main body and electrodes. The main body of the electrostatic chuck 20 has a substantially disc shape and is made of a dielectric material. The electrode of the electrostatic chuck 20 is a film-shaped electrode and is provided inside the main body of the electrostatic chuck 20. The electrode of the electrostatic chuck 20 is connected to the DC power supply 20p via the switch 20s. When a voltage from the DC power supply 20p is applied to the electrodes of the electrostatic chuck 20, an electrostatic attractive force is generated between the electrostatic chuck 20 and the substrate W. The substrate W is attracted to and held by the electrostatic chuck 20 by the generated electrostatic attraction.

The support base 14 supports the focus ring FR. The focus ring FR is arranged so as to surround the edge of the substrate W. The focus ring FR is provided to improve the in-plane uniformity of plasma processing on the substrate W. The focus ring FR can be formed of, but not limited to, silicon, silicon carbide, or quartz.

A channel 18f is provided inside the lower electrode 18. A heat exchange medium (for example, a refrigerant) is supplied to the flow path 18f from a chiller unit 22 provided outside the chamber 10 via a pipe 22a. The heat exchange medium supplied to the flow path 18f is returned to the chiller unit 22 via the pipe 22b. In the plasma processing apparatus 1, the temperature of the substrate W placed on the electrostatic chuck 20 is adjusted by heat exchange between the heat exchange medium and the lower electrode 18.

The plasma processing apparatus 1 is provided with a gas supply line 24. The gas supply line 24 supplies the heat transfer gas (for example, He gas) from the heat transfer gas supply mechanism to the gap between the upper surface of the electrostatic chuck 20 and the back surface of the substrate W.

The plasma processing apparatus 1 further includes an upper electrode 30. The upper electrode 30 is provided above the support base 14. The upper electrode 30 is supported on the upper portion of the chamber body 12 via the member 32. The member 32 is made of an insulating material. The upper electrode 30 and the member 32 close the upper opening of the chamber body 12.

The upper electrode 30 may include a top plate 34 and a support 36. The lower surface of the top plate 34 is the lower surface on the side of the internal space 10s, and defines the internal space 10s. The top plate 34 may be formed of a low-resistance electric conductor or semiconductor with low Joule heat. The top plate 34 is formed with a plurality of gas discharge holes 34a. The plurality of gas discharge holes 34a penetrate the top plate 34 in the plate thickness direction.

The support body 36 detachably supports the top plate 34. The support 36 is formed of a conductive material such as aluminum. A gas diffusion space 36 a is provided inside the support 36. A plurality of gas holes 36b are formed in the support 36. The plurality of gas holes 36b extend downward from the gas diffusion chamber 36a. The plurality of gas holes 36b communicate with the plurality of gas discharge holes 34a, respectively. A gas inlet 36c is formed in the support 36. The gas inlet 36c is connected to the gas diffusion chamber 36a. A gas supply pipe 38 is connected to the gas introduction port 36c.

A gas source group 40 is connected to the gas supply pipe 38 via a valve group 41, a flow rate controller group 42, and a valve group 43. The gas source group 40, the valve group 41, the flow rate controller group 42, and the valve group 43 configure a gas supply unit GS. The gas source group 40 includes a plurality of gas sources. Each of the valve group 41 and the valve group 43 includes a plurality of open/close valves. The flow rate controller group 42 includes a plurality of flow rate controllers. Each of the plurality of flow rate controllers in the flow rate controller group 42 is a mass flow controller or a pressure control type flow rate controller. Each of the plurality of gas sources of the gas source group 40 is connected to a gas supply pipe via a corresponding opening/closing valve of the valve group 41, a corresponding flow rate controller of the flow rate controller group 42, and a corresponding opening/closing valve of the valve group 43. 38.

In the plasma processing apparatus 1, the shield 46 is detachably provided along the inner wall surface of the chamber body 12. The shield 46 is also provided on the outer periphery of the support portion 13. The shield 46 prevents the etching by-product from adhering to the chamber body 12. The shield 46 is formed by forming a film having corrosion resistance on the surface of a member made of aluminum, for example. The corrosion resistant film may be a film formed from a ceramic such as yttrium oxide.

A baffle plate 48 is provided between the support portion 13 and the side wall of the chamber body 12. The baffle plate 48 is formed, for example, by forming a film having corrosion resistance on the surface of a member formed of aluminum. The corrosion resistant film may be a film formed from a ceramic such as yttrium oxide. A plurality of through holes are formed in the baffle plate 48. An exhaust port 12e is provided below the baffle plate 48 and at the bottom of the chamber body 12. An exhaust device 50 is connected to the exhaust port 12e via an exhaust pipe 52. The exhaust device 50 has a vacuum pump such as a pressure control valve and a turbo molecular pump.

In one embodiment, the plasma processing apparatus 1 may further include an emission analyzer 54. The emission analyzer 54 is provided outside the chamber 10. The emission analyzer 54 receives light from the plasma through an optically transparent window member provided in the chamber 10. The emission analyzer 54 acquires emission intensity of one or more wavelengths of plasma. The control unit 80, which will be described later, can terminate the steps of the plasma processing method of various embodiments, which will be described later, based on the emission intensity obtained by the emission analyzer 54.

In one embodiment, the plasma processing apparatus 1 includes a first high frequency power supply 61. The first high frequency power supply 61 is configured to output the first high frequency power, that is, the high frequency power LF. The high frequency power LF is a bias high frequency power. The high frequency power LF has a frequency suitable mainly for attracting ions to the substrate W. The frequency of the high frequency power LF is a frequency within the range of 400 kHz to 13.56 MHz, for example. In one example, the frequency of the high frequency power LF is 400 kHz.

The first high frequency power supply 61 is configured to supply high frequency power LF to the lower electrode 18. The first high frequency power supply 61 is electrically connected to the lower electrode 18 via the first matching unit 63 and the low pass filter 65. FIG. 2 is a diagram showing an example of a configuration of a power supply system including two matching devices of the plasma processing apparatus shown in FIG. As shown in FIG. 2, the first matching unit 63 is connected between the first high frequency power supply 61 and the load of the first high frequency power supply 61. The first matching unit 63 has a matching circuit 63a. The first matching unit 63 further includes a controller 63b and a sensor 63s.

The matching circuit 63a has a variable impedance. The impedance of the matching circuit 63a is set so as to reduce reflection from the load of the first high frequency power supply 61. For example, the impedance of the matching circuit 63a is set so that the impedance on the load side (lower electrode side) of the first high frequency power supply 61 matches the output impedance of the first high frequency power supply 61.

In one embodiment, matching circuit 63a has one or more variable reactance elements to provide variable impedance. The matching circuit 63a may include a capacitor 63c1 and a capacitor 63c2 as one or more variable reactance elements. The matching circuit 63a may further include an inductor 63i. One end of the capacitor 63c1 is connected to the node 63n. The node 63n is provided in an electrical path between the first high frequency power supply 61 and the lower electrode 18. The other end of the capacitor 63c1 is connected to the ground. One end of the capacitor 63c2 is connected to the node 63n. The other end of the capacitor 63c2 is electrically connected to the lower electrode 18 via the inductor 63i.

In another embodiment, the matching circuit 63a may be configured by connecting in parallel a plurality of series circuits each including a fixed impedance element and a switching element to provide a variable impedance. The fixed impedance element is, for example, a fixed capacitor.

The controller 63b is configured to set the impedance of the matching circuit 63a in order to reduce reflection from the load of the first high frequency power supply 61. The controller 63b is composed of, for example, a processor.

In one embodiment, the controller 63b is configured to obtain the load side impedance Z ₁ of the first high frequency power supply 61. The controller 63b sets the impedance of the matching circuit 63a so as to reduce the difference between the acquired impedance Z ₁ and the output impedance of the first high frequency power supply 61. In another embodiment, the controller 63b is configured to acquire the power of the reflected wave from the load of the first high frequency power supply 61. The controller 63b sets the impedance of the matching circuit 63a so that the power of the acquired reflected wave may be reduced.

In one embodiment, the controller 63b sets the reactance of each of the one or more variable reactance elements of the matching circuit 63a to set the impedance of the matching circuit 63a. In one example, each of the capacitors 63c1 and 63c2 is a mechanical variable capacitor. The capacitance of the capacitor 63c1 is adjusted by the motor 63m1. The capacitance of the capacitor 63c2 is adjusted by the motor 63m2. The controller 63b is configured to control the motor 63m1 and the motor 63m2 in order to set the electrostatic capacitance of the capacitor 63c1 and the electrostatic capacitance of the capacitor 63c1. In another embodiment, the controller 63b sets the conduction state of each switching element of the plurality of series circuits of the matching circuit 63a in order to set the impedance of the matching circuit 63a.

In one embodiment, the sensor 63s is configured to measure the voltage on the electrical path between the first high frequency power supply 61 and the matching circuit 63a and the current flowing on the electrical path. The controller 63b is configured to identify the impedance Z ₁ from the voltage and current measured by the sensor 63s.

The impedance Z ₁ is obtained by, for example, V ₁ /I ₁ . V ₁ and I ₁ may be voltage and current acquired by the sensor 63s. V ₁ and I ₁ may be the average value of the voltage and the average value of the current acquired by the sensor 63s. Each of the average voltage value and the average current value may be generated by a sample hold circuit provided between the controller 63b and the sensor 63s. Alternatively, the average value of the voltage may be generated by the controller 63b performing an averaging process on the voltage acquired by the sensor 63s. The average value of the current may be generated by the controller 63b performing an averaging process on the current acquired by the sensor 63s. The time length of the period in which each of the voltages and currents to be averaged is acquired by the sensor 63s may be a predetermined time length.

In another embodiment, the sensor 63s may be configured to obtain a parameter that reflects the power of the reflected wave from the load of the first high frequency power supply 61. The controller 63b sets the impedance of the matching circuit 63a according to the parameter calculated by the sensor 63s so as to reduce the power of the reflected wave.

The plasma processing apparatus 1 further includes a second high frequency power supply 62. The second high frequency power supply 62 is configured to output the second high frequency power, that is, the high frequency power HF. The high frequency power HF is high frequency power for plasma generation. The frequency of the high frequency power HF is higher than the frequency of the high frequency power LF. The frequency of the high frequency power HF is a frequency within the range of 27 MHz to 100 MHz, for example. In one example, the frequency of the high frequency power HF is 40.68 MHz.

The second high frequency power supply 62 is electrically connected to the lower electrode 18 via the second matching unit 64. In another embodiment, the second high frequency power supply 62 may be electrically connected to the upper electrode 30 via the second matching unit 64. The second matching unit 64 has a matching circuit 64a. The second matching box 64 further includes a controller 64b and a sensor 64s. The controller 64b is composed of, for example, a processor.

The matching circuit 64a has a variable impedance. The impedance of the matching circuit 64a is set so as to reduce reflection from the load of the second high frequency power supply 62. For example, the impedance of the matching circuit 64a is set so that the impedance on the load side (lower electrode side) of the second high frequency power source 62 matches the output impedance of the second high frequency power source 62.

In one embodiment, matching circuit 64a has one or more variable reactance elements to provide a variable impedance. The matching circuit 64a may include a capacitor 64c1 and a capacitor 64c2 as one or more variable reactance elements. The matching circuit 64a may further include an inductor 64i. One end of the capacitor 64c1 is connected to the node 64n. The node 64n is electrically provided between the second high frequency power supply 62 and the lower electrode 18. The other end of the capacitor 64c1 is connected to the ground. One end of the capacitor 64c2 is connected to the node 64n. The other end of the capacitor 64c2 is electrically connected to the lower electrode 18 via the inductor 64i.

In another embodiment, matching circuit 64a may be configured by connecting in parallel multiple series circuits, each including a fixed impedance element and a switching element, to provide a variable impedance. The fixed impedance element is, for example, a fixed capacitor.

Hereinafter, FIG. 3 will be referred to together with FIG. 1 and FIG. 2. FIG. 3 is an example timing chart regarding the high frequency power LF, the high frequency power HF, and the synchronization signal SS. The controller 64b adjusts the impedance of the matching circuit 64a in order to reduce the reflection from the load of the second high frequency power supply 62 in the designated partial period P _M (see FIG. 5) within each cycle P _LF of the high frequency power LF. Configured to set. Hereinafter will be described an example in which one partial period P _M is set in each cycle P _LF, two or more partial periods P _M may be set in each period P _LF.

The start time and the time length of the partial period P _M are not limited as long as the partial period P _M is a partial period within each cycle P _LF . The start time and the time length of the partial period P _M can be arbitrarily set by the designation from the control unit 80 described later.

Each cycle P _LF includes a period P _P and a period P _N. The period P _P is a period in which the voltage of the high frequency power HF output from the first high frequency power supply 61 has a positive polarity. The period P _N is a period in which the voltage of the high frequency power HF output from the first high frequency power supply 61 has a negative polarity. In one embodiment, the sub-period P _M is a period within the period P _N. In another embodiment, the partial period P _M is a period within the period P _P.

In one embodiment, the controller 64b uses the synchronization signal SS to identify the partial period P _M. In one example, the synchronization signal SS may be a signal having a synchronization pulse at the start of each period P _LF of the high frequency power LF, as shown in FIG. 3. The synchronization signal SS may be generated by the first high frequency power supply 61 and given to the controller 64b. The synchronization signal SS may be generated by the synchronization signal generator 70 provided between the first high frequency power supply 61 and the controller 64b. The synchronization signal generator 70 is configured to receive a high frequency signal synchronized with the high frequency power LF from the first high frequency power supply 61 and generate a synchronization signal SS from the high frequency signal.

FIG. 4 is a diagram showing another example of the configuration of the power supply system including the two matching units of the plasma processing apparatus shown in FIG. As shown in FIG. 4, the synchronization signal SS may be generated by another synchronization signal generator 72. The synchronization signal SS generated by the synchronization signal generator 72 is given to the first high frequency power supply 61 and the controller 64b. In this example, the first high frequency power supply 61 outputs the high frequency power LF so as to be synchronized with the synchronization signal SS generated by the synchronization signal generator 72.

The controller 64b specifies the partial period P _M using the synchronization signal SS and the delay time and time length given from the control unit 80. The start point of the partial period P _M is specified by the timing of the synchronization pulse of the synchronization signal SS and the delay time given by the control unit 80. The time length of the partial period P _M is specified from the time length given by the control unit 80.

In one embodiment, the controller 64b is configured to obtain the load-side impedance Z ₂ of the second high-frequency power supply 62 in the partial period P _M in each cycle P _LF . The controller 64b sets the impedance of the matching circuit 64a so as to reduce the difference between the impedance Z ₂ in the partial period P _M and the output impedance of the second high frequency power supply 62. In another embodiment, the controller 64b is configured to obtain the power of the reflected wave from the load of the second high frequency power supply 62. The controller 64b sets the impedance of the matching circuit 64a so that the power of the acquired reflected wave may be reduced.

In one embodiment, the controller 64b sets the reactance of each of the one or more variable reactance elements of the matching circuit 64a to set the impedance of the matching circuit 64a. In one example, each of the capacitors 64c1 and 64c2 is a mechanical variable capacitor. The capacitance of the capacitor 64c1 is adjusted by the motor 64m1. The capacitance of the capacitor 64c2 is adjusted by the motor 64m2. The controller 64b is configured to control the motor 64m1 and the motor 64m2 in order to set the capacitance of the capacitor 64c1 and the capacitance of the capacitor 64c1. The reactance of each of the one or more variable reactance elements of the set matching circuit 64a is set to the partial period P _M within one or more cycles P _LF after the reactance of each of the one or more variable reactance elements is set. In addition, it can be maintained in a period other than the partial period P _M.

In another embodiment, the controller 64b sets the conduction state of the switching element of each of the plurality of series circuits of the matching circuit 64a in order to set the impedance of the matching circuit 64a. The conduction state of each switching element of the plurality of series circuits that is set is such that the conduction state of each switching element of the plurality of series circuits is a partial period P within one or more periods P _LF after it is set. _In addition to _M , it can be maintained in a period other than the partial period P _M.

In one embodiment, the sensor 64s is configured to measure the voltage on the electrical path between the second high frequency power supply 62 and the matching circuit 64a and the current flowing on the electrical path. The controller 64b is configured to identify the impedance Z ₂ from the voltage and current measured by the sensor 64s during the partial period P _M.

The impedance Z ₂ is obtained by, for example, V ₂ /I ₂ . V ₂ and I ₂ may be voltages and currents acquired by the sensor 64s in the partial period P _M. V ₂ and I ₂ may be the average value of the voltage and the average value of the current acquired by the sensor 64s in the partial period P _M. Each of the average value of the voltage and the average value of the current may be generated by a sample hold circuit provided between the controller 64b and the sensor 64s. Alternatively, the average value of the voltage may be generated by the controller 64b performing an averaging process on the voltage acquired by the sensor 64s in the partial period P _M. The average value of the current may be generated by the controller 64b performing an averaging process on the current acquired by the sensor 64s in the partial period P _M. Alternatively, V ₂ and I ₂ may be a moving average value of voltage and a moving average value of current acquired by the sensor 64s in some past partial periods P _M.

In another embodiment, the sensor 64s may be configured to determine a parameter that reflects the power of the reflected wave from the load of the second high frequency power supply 62. The controller 64b sets the impedance of the matching circuit 64a according to the parameter calculated by the sensor 64s so as to reduce the reflected wave.

The plasma processing apparatus 1 may further include a controller 80. The control unit 80 may be a computer including a processor, a storage unit such as a memory, an input device, a display device, a signal input/output interface, and the like. The control unit 80 controls each unit of the plasma processing apparatus 1. In the control unit 80, an operator can use the input device to input a command to manage the plasma processing apparatus 1. Further, in the control unit 80, the operating status of the plasma processing apparatus 1 can be visualized and displayed by the display device. Further, the storage unit of the control unit 80 stores a control program and recipe data. The control program is executed by the processor of the control unit 80 in order to execute various processes in the plasma processing apparatus 1. The processor of the control unit 80 executes the control program and controls the respective units of the plasma processing apparatus 1 according to the recipe data, whereby the method MT described later and the plasma processing methods of various embodiments are executed by the plasma processing apparatus 1. ..

Hereinafter, FIG. 5 will be referred to. FIG. 5 is an example timing chart showing the potential of the substrate and the potential of the plasma based on the first high-frequency power. The potential V _{LF of the} substrate W based on the high frequency power LF becomes a positive potential within a period (period P _P ) in which the voltage of the high frequency power LF output from the first high frequency power supply 61 has a positive polarity. In the period P _P , the plasma potential V _P is slightly higher than the potential V _LF . Therefore, in the period P _P , the potential difference between the substrate W and the plasma is small and the sheath (plasma sheath) is thin. Therefore, in the period P _P , the energy of the ions supplied from the plasma to the substrate W is low.

On the other hand, in the period P _N in which the voltage of the high frequency power LF output from the first high frequency power supply 61 has a negative polarity, the potential V _{LF of the} substrate W based on the high frequency power LF becomes a negative potential. In the period P _N , the plasma potential is low but has a positive polarity. Therefore, in the period P _N , the potential difference between the substrate W and the plasma is large and the sheath (plasma sheath) is thick. Therefore, in the period P _N , the energy of the ions supplied from the plasma to the substrate is high.

In the plasma processing apparatus 1, the reflection with respect to the high frequency power HF is reduced in the partial period P _M in each cycle P _LF , and the plasma generation efficiency is increased. On the other hand, in periods other than the partial period P _M in each period P _LF , the reflection to the high frequency power HF increases and the plasma generation efficiency decreases. Thus, in the plasma processing apparatus 1, by specifying the partial periods P _M within each period P _LF radio frequency power LF, ions having a desired ion energy is supplied to the substrate is efficiently generated. Further, since it is possible to realize efficient generation of ions having a desired ion energy by designating the partial period P _M , a plasma processing apparatus having a relatively low cost and a relatively simple configuration is provided.

In one embodiment, the partial period P _M may be a period within the period P _N in which the voltage of the high frequency power LF has a negative polarity. According to this embodiment, ions having high energy are efficiently generated and supplied to the substrate W.

In one embodiment, the partial period P _M may be a period within the period P _P in which the voltage of the high frequency power LF has a positive polarity. According to this embodiment, ions having low energy are efficiently generated and supplied to the substrate.

When the partial period P _M is a period within the period P _N in which the voltage of the high frequency power LF has a negative polarity, the potential based on the high frequency power HF is dominant in the potential of the substrate W. On the other hand, when the partial period P _M is a period within the period P _N in which the voltage of the high frequency power LF has a positive polarity, the potential based on the high frequency power LF becomes dominant in the potential of the substrate W. The higher the frequency of the high-frequency power that has a dominant effect on the potential of the substrate W, the smaller the potential at the edge of the substrate W than the potential at the center of the substrate W. Therefore, the higher the frequency of the high frequency power that has a dominant effect on the potential of the substrate W, the lower the uniformity of the processing speed (eg, etching rate) of the substrate W. As described above, in the plasma processing apparatus 1, the partial period P _M can be designated within each cycle P _LF of the high frequency power LF. Therefore, according to the plasma processing apparatus 1, by specifying the partial periods P _M within each period P _LF radio frequency power LF, uniformity in the radial direction of the processing speed of the substrate W also it can be adjusted.

Regarding the relation between the partial period P _M and the energy of ions and the relation between the partial period P _M and the radial uniformity of the processing speed of the substrate W, the positive plasma in the chamber 10 is This is the relationship when they are created. Positive plasma is plasma in which positive ions predominantly exist with respect to negative ions. On the other hand, each of the relations, the uniformity and in the processing speed in the radial direction of the relationship and the partial period P _M and the substrate W and the energy of the partial period P _M and ion if negative plasma is generated in the chamber 10 Is the reverse of the relationship described above for the case where positive plasma is generated. Negative plasma is plasma in which negative ions predominantly exist with respect to positive ions.

Hereinafter, an impedance matching method according to an exemplary embodiment will be described with reference to FIG. 6. FIG. 6 is a flow chart illustrating an impedance matching method according to an exemplary embodiment. Hereinafter, the impedance matching method shown in FIG. 6 (hereinafter, referred to as “method MT”) will be described by taking the case where the plasma processing apparatus 1 is used as an example.

The substrate W is placed on the support 14 (electrostatic chuck 20) during execution of the method MT. During the execution of the method MT, gas is supplied into the chamber 10 from the gas supply unit GS of the plasma processing apparatus 1. Further, during the execution of the method MT, the pressure inside the chamber 10 is adjusted to the specified pressure by the exhaust device 50.

In step ST1 of the method MT, the high frequency power LF is supplied to the lower electrode 18 from the first high frequency power supply 61 via the first matching unit 63. The step ST2 of the method MT is executed during the execution of the step ST1. In step ST2, the high frequency power HF is supplied from the second high frequency power supply 62 via the second matching unit 64.

In step ST3, in order to reduce the reflection from the load of the second high-frequency power source 62 in the sub-period P _M within each period P _LF radio frequency power LF, as described above, the impedance of the matching circuit 64a is set .. Steps ST1 to ST3 are continuously executed until the plasma processing is completed.

Hereinafter, plasma processing methods according to various exemplary embodiments will be described. FIG. 7 is a flowchart illustrating a plasma processing method according to an exemplary embodiment. FIG. 8A is a partially enlarged cross-sectional view of an example substrate. 8B and 8C are partially enlarged cross-sectional views of the example substrate in a state after execution of each of the plurality of steps of the plasma processing method illustrated in FIG. 7.

The plasma processing method shown in FIG. 7 (hereinafter referred to as “method MT1”) includes a step ST11 and a step ST12. The process ST11 is executed in the first period. The time length of the first period may be m times the time length of one cycle of the high frequency power LF. m is a natural number. In step ST11, the first plasma processing is performed. Process ST12 is executed in the second period. The second period is a period following the first period. In step ST12, the second plasma treatment is performed. The time length of the second period may be n times the time length of one cycle of the high frequency power LF. n is a natural number.

In step ST11 and step ST12, the processing gas is supplied into the chamber 10. In step ST11 and step ST12, the gas supply unit GS is controlled by the control unit 80 to supply the processing gas. In step ST11 and step ST12, the exhaust unit 50 is controlled by the controller 80 so as to set the pressure in the chamber 10 to the designated pressure. The pressure in the chamber 10 is set to a pressure within a range of, for example, several mTorr to 1000 mTorr.

In each of the steps ST11 and ST12, steps ST1 to ST3 are executed. In each of process ST11 and process ST12, the control part 80 controls the 1st high frequency power supply 61, the 2nd high frequency power supply 62, and the 2nd matching device 64 so that process ST1-process ST3 may be performed.

In the process ST11, the partial period P _M is set within the period P _N. In step ST11, the control unit 80 controls the second matching box 64 to set the partial period P _M within the period P _N. In the process ST12, the partial period P _M is set within the period P _P. In step ST12, the control unit 80 controls the second matching box 64 so that the partial period P _M is set within the period P _P.

In step ST11 and step ST12, plasma is formed from the processing gas in the chamber 10. In step ST11, the partial period P _M is set within the period P _N , so that the energy of the ions traveling from the plasma toward the support 14 is relatively high. On the other hand, in step ST12, since the partial period P _M is set within the period P _P , the energy of the ions traveling from the plasma toward the support 14 is relatively low.

As shown in FIG. 8A, the substrate WA to which the method MT1 can be applied has a base region URA and a film FA. The film FA is provided on the base region URA. The substrate WA may further have a mask MKA. The mask MKA is provided on the film FA. The mask MKA is patterned so as to partially expose the film FA. In one example, the underlying region URA is made of silicon, the film FA is made of silicon oxide, and the mask MKA has a multilayer structure including a photoresist film and an antireflection film. The antireflection film of the mask MKA is provided on the film FA. The antireflection film of the mask MKA contains silicon. The photoresist film of the mask MKA is provided on the antireflection film of the mask MKA. The mask MKA may be formed of an amorphous carbon film.

In the method MT1, the substrate WA is placed in the chamber 10 for the first period and the second period. The substrate WA is placed on the support 14 in the chamber 10. The processing gas used in step ST11 and step ST12 may include a fluorocarbon gas such as C ₄ F ₈ gas. The processing gas used in step ST11 and step ST12 may further contain an oxygen-containing gas such as O ₂ gas and/or a rare gas such as argon gas.

As shown in FIG. 8B, in step ST11, the film FA is etched by the ions from the plasma so as to expose the underlying region URA. The step ST11 is ended when it is determined from the emission intensity obtained by the emission analyzer 54 that the etching amount of the film FA has decreased. For example, when the emission intensity of CO acquired by the emission analyzer 54 is determined to be equal to or lower than the predetermined value, the step ST11 is ended. Alternatively, the process ST11 is ended after a lapse of a predetermined time. In step ST11, since ions of high energy are supplied to the substrate WA, the film FA is etched at high speed.

In the subsequent step ST12, the film FA is over-etched as shown in FIG. In step ST12, since ions of low energy are supplied to the substrate WA, overetching of the film FA can be performed while suppressing damage to the base region URA.

Next, FIG. 9, FIG. 10A, FIG. 10B, FIG. 10C, FIG. 10D, and FIG. 10E will be referred to. FIG. 9 is a flowchart illustrating a plasma processing method according to another exemplary embodiment. FIG. 10A is a partially enlarged cross-sectional view of an example substrate. 10B to 10E are partially enlarged cross-sectional views of an example substrate in a state after execution of each of the plurality of steps of the plasma processing method shown in FIG. 9.

The plasma processing method shown in FIG. 9 (hereinafter referred to as “method MT2”) includes a step ST21 and a step ST22. The step ST21 is executed in the first period, like the step ST11 of the method MT1. In step ST21, the first plasma treatment is performed. The process ST22 is executed in the second period, like the process ST12 of the method MT1. The second period is a period following the first period. In step ST22, the second plasma treatment is performed.

Method MT2 may further include step ST23 and step ST24. Process ST23 is executed in the third period. The third period is a period following the second period. The time length of the third period may be p times the time length of one cycle of the high frequency power LF. p is a natural number. In step ST23, the third plasma treatment is performed. Process ST24 is executed in the fourth period. The fourth period is a period following the third period. The time length of the fourth period may be q times the time length of one cycle of the high frequency power LF. q is a natural number. In step ST24, the fourth plasma treatment is performed.

In step ST21, step ST22, step ST23, and step ST24, the processing gas is supplied into the chamber 10. In step ST21, step ST22, step ST23, and step ST24, the gas supply unit GS is controlled by the control unit 80 in order to supply the processing gas. In step ST21, step ST22, step ST23, and step ST24, the exhaust unit 50 is controlled by the controller 80 so as to set the pressure inside the chamber 10 to the designated pressure. The pressure in the chamber 10 is set to a pressure within a range of, for example, several mTorr to 1000 mTorr.

In each of step ST21, step ST22, step ST23, and step ST24, step ST1 to step ST3 are executed. In each of the process ST21, the process ST22, the process ST23, and the process ST24, the control unit 80 performs the process ST1 to the process ST3 by performing the first high-frequency power supply 61, the second high-frequency power supply 62, and the second matching. The device 64 is controlled.

In each of the process ST21 and the process ST23, the partial period P _M is set within the period P _N. In each of the process ST21 and the process ST23, the control unit 80 controls the second matching unit 64 so that the partial period P _M is set within the period P _N. In each of the process ST22 and the process ST24, the partial period P _M is set within the period P _P. In each of the process ST22 and the process ST24, the control unit 80 controls the second matching unit 64 so that the partial period P _M is set within the period P _P.

In each of step ST21, step ST22, step ST23, and step ST24, plasma is formed from the processing gas in the chamber 10. In each of the process ST21 and the process ST23, the partial period P _M is set within the period P _N , so that the energy of ions traveling from the plasma to the support table 14 is relatively high. On the other hand, in each of the processes ST22 and ST24, the partial period P _M is set within the period P _P , so that the energy of the ions traveling from the plasma to the support 14 is relatively low.

As shown in (a) of FIG. 10, the substrate WB to which the method MT2 can be applied has a first film FB1 and a second film FB2. The first film FB1 is provided on the second film FB2. The substrate WB may further include the underlying region URB, the third film FB3, and the mask MKB. The third film FB3 is provided on the base region URB. The second film FB2 is provided on the third film FB3. The mask MKB is provided on the first film FB1. The mask MKB is patterned so as to partially expose the first film FB1. In one example, the underlying region URB is made of silicon. The first film FB1 and the third film FB3 are formed of silicon oxide. The second film FB2 is made of silicon nitride. The mask MKB is formed of a photoresist film. The mask MKB may be formed of an amorphous carbon film.

In the method MT2, the substrate WB is placed in the chamber 10 for the first period to the fourth period. The substrate WB is placed on the support 14 in the chamber 10. The process gas used in the process ST21, the process ST22, the process ST23, and the process ST24 may include a fluorocarbon gas such as a C ₄ F ₈ gas. The process gas used in step ST21, step ST22, step ST23, and step ST24 may further contain an oxygen-containing gas such as O ₂ gas and/or a rare gas such as argon gas.

As shown in FIG. 10B, in step ST21, the first film FB1 is etched so that the ions from the plasma are irradiated to the first film FB1 and the second film FB2 is exposed by chemical ion etching. To be done. The step ST21 is ended when it is determined from the emission intensity obtained by the emission analyzer 54 that the etching amount of the first film FB1 has decreased. For example, in step ST21, when the emission intensity of CO acquired by the emission analyzer 54 is determined to be equal to or less than a predetermined value, or in step ST21, the emission intensity of CN acquired by the emission analyzer 54 is changed. When it is determined that the value is equal to or more than another predetermined value, the process ends. Alternatively, step ST21 is ended after a predetermined time has elapsed.

As shown in (c) of FIG. 10, in step ST22, the second film FB2 is etched so that the ions from the plasma are applied to the second film FB2 and the third film FB3 is exposed by chemical ion etching. To be done. The step ST22 is ended when it is determined from the emission intensity obtained by the emission analyzer 54 that the etching amount of the second film FB2 has decreased. For example, in step ST22, when it is determined that the emission intensity of CN acquired by the emission analyzer 54 is less than or equal to a predetermined value, or in step ST22, the emission intensity of CO acquired by the emission analyzer 54 is decreased. When it is determined that the value is equal to or more than another predetermined value, the process ends. Alternatively, the process ST22 is ended after the elapse of a predetermined time.

As shown in (d) of FIG. 10, in step ST23, ions from the plasma are applied to the third film FB3, and the third film FB3 is etched by chemical ion etching so as to expose the underlying region URB. .. The step ST23 is ended when it is determined from the emission intensity obtained by the emission analyzer 54 that the etching amount of the third film FB3 has decreased. For example, the process ST23 is ended when the emission intensity of CO acquired by the emission analyzer 54 is determined to be equal to or lower than a predetermined value. Alternatively, the process ST23 is ended after the lapse of a predetermined time.

In the subsequent step ST24, as shown in (e) of FIG. 10, overetching of the third film FB3 is performed. In step ST24, since ions of low energy are supplied to the substrate WB, overetching of the third film FB3 can be performed while suppressing damage to the underlying region URB.

According to this method MT2, it is possible to etch a multilayer film that has a film that requires relatively high energy for etching as the first film FB1 and a film that can be etched with relatively low energy as the second film FB2. Becomes In addition, it is possible to etch a multilayer film that further has, as the third film FB3, a film requiring relatively high energy for etching between the second film FB2 and the base region URB.

Next, reference is made to FIGS. 11 and 12A and 12B. FIG. 11 is a flow chart illustrating a plasma processing method according to yet another exemplary embodiment. FIG. 12A is a partially enlarged sectional view of an example substrate. FIG. 12B is a partially enlarged cross-sectional view of the example substrate in the state after performing the step ST31 of the plasma processing method shown in FIG. 11.

The plasma processing method shown in FIG. 11 (hereinafter referred to as “method MT3”) includes a step ST31 and a step ST32. The step ST31 is executed in the first period, like the step ST11 of the method MT1. In step ST31, the first plasma treatment is performed. The step ST32 is executed in the second period, like the step ST12 of the method MT1. The second time period is a time period that follows or follows the first time period. In step ST32, the second plasma treatment is performed.

In step ST31 and step ST32, the processing gas is supplied into the chamber 10. In step ST31 and step ST32, the gas supply unit GS is controlled by the control unit 80 to supply the processing gas. In step ST31 and step ST32, the exhaust unit 50 is controlled by the controller 80 so as to set the pressure in the chamber 10 to the designated pressure.

In each of the process ST31 and the process ST32, the process ST1 to the process ST3 are executed. In each of process ST31 and process ST32, the control part 80 controls the 1st high frequency power supply 61, the 2nd high frequency power supply 62, and the 2nd matching device 64 so that process ST1-process ST3 may be performed.

In the process ST31, the partial period P _M is set within the period P _N. In step ST31, the control unit 80 controls the second matching box 64 so as to set the partial period P _M within the period P _N. In the process ST32, the partial period P _M is set within the period P _P. In step ST32, the control unit 80 controls the second matching box 64 so as to set the partial period P _M within the period P _P.

In step ST31 and step ST32, plasma is formed from the processing gas in the chamber 10. In step ST31, since the partial period P _M is set within the period P _N , the energy of the ions traveling from the plasma toward the support 14 is relatively high. On the other hand, in step ST32, since the partial period P _M is set within the period P _P , the energy of the ions moving from the plasma toward the support 14 is relatively low, and the ions moving relatively toward the inner wall surface of the chamber 10 from the plasma. The energy of becomes high.

As shown in FIG. 12A, the substrate WC to which the method MT3 can be applied has the underlying region URC and the film FC. The film FC is provided on the base region URC. The substrate WC may further have a mask MKC. The mask MKC is provided on the film FC. The mask MKC is patterned so as to partially expose the surface of the film FC. In one example, the underlying region URC is formed of TaN, the film FC is a multi-layered film including several magnetic layers, and the mask MKC is formed of silicon oxide. The multi-layer film of the film FC is, for example, a multi-layer film forming the MRAM element portion, and includes an MTJ (Magnetic Tunnel Junction) structure.

In the method MT3, the substrate WC is placed in the chamber 10 in the first period. The substrate WC is placed on the support 14 in the chamber 10. The processing gas used in step ST31 and step ST32 may be a mixed gas containing a rare gas such as Cl ₂ gas and argon gas, or a mixed gas containing a CO gas and an NH ₃ gas.

As shown in FIG. 12B, in step ST31, the film FC is irradiated with ions from the plasma, and the film FC is etched by chemical ion etching and/or sputtering to expose the underlying region URC. Step ST31 is ended when it is determined from the emission intensity obtained by the emission analyzer 54 that the etching amount of the film FC is decreasing. Alternatively, the process ST31 is ended after the lapse of a predetermined time. In step ST31, since ions of high energy are supplied to the substrate WC, it is possible to etch the film FC formed of the difficult-to-etch material.

The method MT3 may further include the step ST3a. The process ST3a is executed between the process ST31 and the process ST32. In step ST3a, the substrate WC is unloaded from the internal space 10s of the chamber 10. Therefore, the process ST32 can be performed in a state where the substrate WC is not arranged in the chamber 10. The method MT3 may further include the step ST3b. The process ST3b is performed between the process ST3a and the process ST32. In step ST3b, the dummy substrate is loaded into the chamber 10. The dummy substrate is placed on the support base 14. Therefore, the process ST32 may be executed in a state in which the dummy substrate is placed on the support base 14.

In step ST31, the deposit adheres to the inner wall surface of the chamber 10. The deposit can be an etching by-product. In step ST32, the deposits attached to the inner wall surface of the chamber 10 are removed by chemical species such as ions and/or radicals from plasma. In the second period in which the process ST32 is performed, the energy of the ions from the plasma toward the support 14 is low, and the energy of the ions from the plasma toward the inner wall surface of the chamber 10 is relatively high. As a result, the deposit adhered to the inner wall surface of the chamber 10 is efficiently removed.

Next, reference will be made to FIG. 13, FIG. 14(a), FIG. 14(b), FIG. 14(c), and FIG. 14(d). FIG. 13 is a flowchart showing a plasma processing method according to still another exemplary embodiment. FIG. 14A is a partially enlarged cross-sectional view of an example substrate. 14B to 14D are partially enlarged cross-sectional views of an example substrate in a state after execution of each of the plurality of steps of the plasma processing method shown in FIG. 13.

The plasma processing method shown in FIG. 13 (hereinafter, referred to as “method MT4”) includes step ST41 and step ST42. The step ST41 is executed in the first period, like the step ST11 of the method MT1. The first period may be a period having the same time length as the time length of the single cycle P _LF . In step ST41, the first plasma processing is performed. The step ST42 is executed in the second period, like the step ST12 of the method MT1. The second period is a period following the first period. The second period may be a period having the same time length as the time length of the single cycle P _LF . In step ST42, the second plasma treatment is performed.

In step ST41, the processing gas is supplied into the chamber 10. In step ST42, the same processing gas as the processing gas used in step ST41 or another processing gas is supplied into the chamber 10. In step ST41 and step ST42, the gas supply unit GS is controlled by the control unit 80. In step ST41 and step ST42, the exhaust device 50 is controlled by the controller 80 so as to set the pressure in the chamber 10 to the designated pressure. The pressure inside the chamber 10 is set to a pressure within a range of, for example, several mmTorr to 1000 mTorr.

In each of the steps ST41 and ST42, steps ST1 to ST3 are executed. In each of process ST41 and process ST42, the control part 80 controls the 1st high frequency power supply 61, the 2nd high frequency power supply 62, and the 2nd matching device 64 so that process ST1-process ST3 may be performed.

In the process ST41, the partial period P _M is set within the period P _N. In step ST41, the control unit 80 controls the second matching box 64 so as to set the partial period P _M within the period P _N. In the process ST42, the partial period P _M is set within the period P _P. In step ST42, the control unit 80 controls the second matching unit 64 so that the partial period P _M is set within the period P _P.

In steps ST41 and ST42, plasma is formed in the chamber 10. In the step ST41, the partial period P _M is set within the period P _N , so that the energy of the ions traveling from the plasma to the support 14 is relatively high. On the other hand, in step ST42, since the partial period P _M is set within the period P _P , the energy of the ions traveling from the plasma toward the support 14 is relatively low.

In method MT4, the substrate is placed in chamber 10 for a first time period and a second time period. The substrate is placed on a support 14 in the chamber 10. The substrate WD to which the method MT4 can be applied has a base region URD and a film FD, as shown in FIG. The film FD is provided on the base region URD. The substrate WD may further have a mask MKD. The mask MKD is provided on the film FD. The mask MKD is patterned so as to partially expose the surface of the film FD. In one example, the base region URD is formed of silicon oxide, the film FD is an organic film or a silicon oxide film, and the mask MKD has a multilayer structure including a photoresist film and an antireflection film. The antireflection film of the mask MKD is provided on the film FD. The antireflection film of the mask MKD contains silicon. The photoresist film of the mask MKD is provided on the antireflection film of the mask MKD.

The processing gas used in step ST41 may include an oxygen-containing gas such as O ₂ gas when the film FD is an organic film. The processing gas used in step ST41 may further contain a rare gas such as argon gas when the film FD is an organic film. The processing gas used in step ST41 may include a fluorocarbon gas such as C ₄ F ₈ gas when the film FD is a silicon oxide film. The processing gas used in step ST41 includes a fluorocarbon gas such as C ₄ F ₈ gas, an oxygen-containing gas such as O ₂ gas, and a rare gas such as argon gas, regardless of whether the film FD is an organic film or a silicon oxide film. It may be a mixed gas.

The processing gas used in step ST42 may include a fluorocarbon gas such as C ₄ F ₈ gas regardless of whether the film FD is an organic film or a silicon oxide film. The processing gas used in step ST42 may further contain an oxygen-containing gas such as O ₂ gas and a rare gas such as argon gas.

In step ST41, the energy of the ions from the plasma toward the support 14 is relatively high. Therefore, in step ST41, the film FD is irradiated with ions from the plasma, and the film FD is etched by chemical ion etching. As shown in FIG. 14B, in step ST41, the film FD is etched so as to provide a sidewall surface. In step ST42, the energy of the ions from the plasma toward the support 14 is relatively low. In step ST42, as shown in FIG. 14C, the chemical species from the plasma form a film of the deposit DP on the surface of the substrate WD. The film of deposit DP is formed from carbon and/or fluorocarbon species.

In the subsequent step ST43, it is determined whether or not the stop condition is satisfied. In step ST43, the stop condition is determined to be satisfied when the number of executions of the sequence including step ST41 and step ST42 reaches the predetermined number. Alternatively, in step ST43, the stop condition may be determined based on the emission intensity of the predetermined wavelength acquired by the emission analyzer 54, and the stop condition may be a sequence including step ST41 and step ST42 or an execution time length of repetition of the sequence. It may be determined based on. When it is determined in step ST43 that the stop condition is not satisfied, the sequence including step ST41 and step ST42 is executed again. The etching in step ST41 has anisotropy. Therefore, in step ST41, as shown in FIG. 14D, the deposit DP extending on the side wall surface of the substrate WD is left. On the other hand, in step ST41, the deposit DP extending on the other surface (horizontal surface) of the substrate W is removed, and the film FD is further etched. When it is determined in step ST43 that the stop condition is satisfied, the method MT4 ends.

In method MT4, step ST41 and step ST42 are alternately repeated. That is, in the method MT4, formation of the deposit DP (step ST42) and etching of the film FD (step ST41) are alternately performed. According to the method MT4, the sidewall surface of the film FD is protected by the deposit DP during the etching of the film FD.

Next, reference will be made to FIGS. 15 and 16(a), 16(b), 16(c), and 16(d). FIG. 15 is a flowchart showing a plasma processing method according to still another exemplary embodiment. FIG. 16A is a partially enlarged cross-sectional view of an example substrate. 16B to 16D are partially enlarged cross-sectional views of the example substrate in a state after performing each of the plurality of steps of the plasma processing method illustrated in FIG. 15.

The plasma processing method shown in FIG. 15 (hereinafter referred to as “method MT5”) includes step ST51 and step ST52. The step ST51 is executed in the first period, like the step ST51 of the method MT1. The first period may be a period having the same time length as the time length of the single cycle P _LF . In step ST51, the first plasma treatment is performed. The step ST52 is executed in the second period, like the step ST12 of the method MT1. The second period is a period following the first period. The second period may be a period having the same time length as the time length of the single cycle P _LF . In step ST52, the second plasma treatment is performed.

In step ST51, the processing gas is supplied into the chamber 10. In step ST52, the same processing gas as the processing gas used in step ST51 or another processing gas is supplied into the chamber 10. In step ST51 and step ST52, the gas supply unit GS is controlled by the control unit 80. In step ST51 and step ST52, the exhaust device 50 is controlled by the controller 80 so as to set the pressure in the chamber 10 to the designated pressure. The pressure in the chamber 10 is set to a pressure within a range of, for example, several mTorr to 1000 mTorr.

In each of process ST51 and process ST52, process ST1-process ST3 are performed. In each of process ST51 and process ST52, the control part 80 controls the 1st high frequency power supply 61, the 2nd high frequency power supply 62, and the 2nd matching device 64 so that process ST1-process ST3 may be performed.

In the process ST51, the partial period P _M is set within the period P _N. In step ST51, the control unit 80 controls the second matching box 64 to set the partial period P _M within the period P _N. In the process ST52, the partial period P _M is set within the period P _P. In step ST52, the control unit 80 controls the second matching box 64 so that the partial period P _M is set within the period P _P.

In step ST51 and step ST52, plasma is formed in the chamber 10. In step ST51, the partial period P _M is set within the period P _N , so that the energy of the ions traveling from the plasma to the support 14 is relatively high. On the other hand, in step ST52, since the partial period P _M is set within the period P _P , the energy of the ions traveling from the plasma toward the support 14 is relatively low.

In method MT5, the substrate is placed in the chamber 10 for a first time period and a second time period. The substrate is placed on a support 14 in the chamber 10. The substrate WE to which the method MT5 can be applied has a base region URE and a film FE, as shown in FIG. The film FE is provided on the base region URE. The substrate WE can further have a mask MKE. The mask MKE is provided on the film FE. The mask MKE is patterned so as to partially expose the surface of the film FE. In one example, the base region URE is made of silicon oxide, the film FE is made of polycrystalline silicon, and the mask MKE is made of silicon oxide.

The processing gas used in step ST51 may include a halogen-containing gas such as Cl ₂ gas, HBr gas, and SF ₆ gas. The processing gas used in step ST51 may further contain an oxygen-containing gas such as O ₂ gas. The processing gas used in step ST52 may include an oxygen-containing gas such as O ₂ gas when different from the processing gas used in step ST51. The processing gas used in step ST52 may further contain a rare gas such as argon gas.

In step ST51, the energy of the ions from the plasma toward the support 14 is relatively high. Therefore, in step ST51, the film FE is irradiated with ions from the plasma, and the film FE is etched by chemical ion etching. As shown in FIG. 16B, in step ST51, the film FE is etched so as to provide a sidewall surface. In step ST52, the energy of the ions from the plasma toward the support 14 is relatively low. In step ST52, as shown in FIG. 16C, the etching of the film FE is suppressed, the region including the surface of the film FE is altered, and the altered region MR is formed. For example, the altered region MR is formed by oxidizing silicon in a region including the surface of the film FE.

In the subsequent step ST53, it is determined whether or not the stop condition is satisfied. In step ST53, the stop condition is determined to be satisfied when the number of executions of the sequence including step ST51 and step ST52 reaches the predetermined number. Alternatively, in step ST53, the stop condition may be determined based on the emission intensity of the predetermined wavelength acquired by the emission analyzer 54, and the stop condition may be the sequence including step ST51 and step ST52 or the execution time length of the repetition of the sequence. It may be determined based on. When it is determined in step ST53 that the stop condition is not satisfied, the sequence including step ST51 and step ST52 is executed again. When it is determined in step ST53 that the stop condition is satisfied, the method MT5 ends.

In method MT5, step ST51 and step ST52 are alternately repeated. That is, according to the method MT5, the alteration treatment of the film FE (step ST52) and the etching of the film FE (step ST51) are alternately performed. In the method MT5, since the side wall surface of the film FE is altered, the side wall surface etching in the step ST51 is suppressed as shown in FIG.

Next, refer to FIG. 17, FIG. 18(a), FIG. 18(b), and FIG. 18(c). FIG. 17 is a flowchart showing a plasma processing method according to still another exemplary embodiment. FIG. 18A is a partially enlarged cross-sectional view of an example substrate. 18B and 18C are partially enlarged cross-sectional views of an example substrate in a state after performing each of the plurality of steps of the plasma processing method shown in FIG. 17.

The plasma processing method shown in FIG. 17 (hereinafter referred to as “method MT6”) includes a step ST61 and a step ST62. The step ST61 is executed in the first period, like the step ST11 of the method MT1. In step ST61, the first plasma processing is performed. The step ST62 is executed in the second period, like the step ST12 of the method MT1. The second period is a period following the first period. In step ST62, the second plasma treatment is performed.

In step ST61 and step ST62, the processing gas is supplied into the chamber 10. In step ST61 and step ST62, the gas supply unit GS is controlled by the control unit 80 in order to supply the processing gas. In step ST61 and step ST62, the exhaust unit 50 is controlled by the controller 80 so as to set the pressure in the chamber 10 to the designated pressure. The pressure in the chamber 10 is set to a pressure within a range of, for example, several mTorr to 1000 mTorr.

In each of the process ST61 and the process ST62, the process ST1 to the process ST3 are executed. In each of process ST61 and process ST62, the control part 80 controls the 1st high frequency power supply 61, the 2nd high frequency power supply 62, and the 2nd matching device 64 so that process ST1-process ST3 may be performed.

In the process ST61, the partial period P _M is set within the period P _P. In step ST61, the control unit 80 controls the second matching box 64 so that the partial period P _M is set within the period P _P. In step ST62, the partial period P _M is set within the period P _N. In step ST62, the control unit 80 controls the second matching box 64 to set the partial period P _M within the period P _N.

In step ST61 and step ST62, plasma is formed in the chamber 10. In step ST61, since the partial period P _M is set within the period P _P , the energy of the ions traveling from the plasma to the support table 14 becomes relatively low. On the other hand, in step ST62, since the partial period P _M is set within the period P _N , the energy of ions traveling from the plasma toward the support table 14 becomes relatively high.

As shown in FIG. 18A, the substrate WF to which the method MT6 can be applied has a first film FF1 and a second film FF2. The first film FF1 is provided on the second film FF2. The substrate WF may further have a base region URF and a mask MKF. The second film FF2 is provided on the base region URF. The mask MKF is provided on the first film FF1. The mask MKF is patterned so as to partially expose the first film FF1. In one example, the underlying region URF is made of silicon. The first film FF1 is an antireflection film containing silicon. The second film FF2 is formed of silicon oxide. The mask MKF is formed of a photoresist film.

In method MT6, the substrate WF is placed in the chamber 10 for a first period and a second period. The substrate WF is placed on the support 14 in the chamber 10. The processing gas used in step ST61 and step ST62 contains a fluorocarbon gas such as CF ₄ gas. The processing gas used in step ST61 and step ST62 may further contain a rare gas such as argon gas.

As shown in FIG. 18B, in step ST61, the first film FF1 is irradiated with ions from the plasma so as to expose the second film FF2, and the first film FF1 is exposed by chemical ion etching. Is etched. The process ST61 is ended when it is determined from the emission intensity obtained by the emission analyzer 54 that the etching amount of the first film FF1 has decreased. Alternatively, step ST61 is ended after a predetermined time has elapsed.

As shown in (c) of FIG. 18, in step ST62, the second film FF2 is irradiated with ions from the plasma so as to expose the underlying region URF, and the second film FF2 is etched by chemical ion etching. It The step ST62 is ended when it is determined from the emission intensity obtained by the emission analyzer 54 that the etching amount of the second film FF2 has decreased. For example, when it is determined that the emission intensity of CO acquired by the emission analyzer 54 is less than or equal to the predetermined value, step ST62 is ended. Alternatively, step ST62 is ended after a predetermined time has elapsed.

According to this method MT6, it is possible to etch a multilayer film having a film that can be etched with relatively low energy as the first film FF1 and a film that requires relatively high energy for etching as the second film FF2. Becomes

Although various exemplary embodiments have been described above, various omissions, substitutions, and changes may be made without being limited to the exemplary embodiments described above. In addition, elements in different embodiments can be combined to form other embodiments.

For example, the plasma processing apparatus in another embodiment may be any type of plasma processing apparatus other than the capacitive coupling type. Examples of such a plasma processing apparatus include an inductively coupled plasma processing apparatus and a plasma processing apparatus that uses surface waves such as microwaves to generate plasma. Even in such a plasma processing apparatus, in order to reduce the reflection from the load of the second high-frequency power source 62 in the sub-periods P _M, the impedance of the matching circuit 64a is set. For example, the variable reactance of the variable reactance element of the matching circuit 64a is adjusted so as to reduce the difference between the impedance Z ₂ in the partial period P _M and the output impedance of the second high frequency power supply 62. In the inductively coupled plasma processing apparatus, the high frequency power HF from the second high frequency power supply 62 is supplied to the inductively coupled antenna via the second matching unit 64. In a plasma processing apparatus that uses surface waves such as microwaves to generate plasma, the high frequency power HF from the second high frequency power supply 62 is supplied to the lower electrode 18 via the second matching unit 64.

Further, the plasma processing apparatus 1 may include a power supply 61A instead of the first high frequency power supply 61, as shown in FIG. FIG. 19 is a diagram schematically showing a plasma processing apparatus according to another exemplary embodiment. In the plasma processing apparatus 1 shown in FIG. 19, the power supply 61A is electrically connected to the lower electrode 18. The power supply 61A is configured to generate a pulsed negative DC voltage BV.

FIG. 20 is an example timing chart regarding the output voltage VO of the power supply 61A, the high frequency power HF, and the synchronization signal SS. As shown in FIG. 20, the output voltage VO of the power supply 61A includes a pulsed negative DC voltage BV that is periodically generated. That is, the power supply 61A is configured to periodically apply the pulsed negative DC voltage BV to the lower electrode 18. In the example shown in FIG. 20, the power supply 61A periodically applies a pulsed negative DC voltage BV to the lower electrode 18 at a period P _BV . Each cycle P _BV includes a period P _N and a period P _P. In each cycle P _BV , the period P _P is a period after the period P _N. In the period P _N , the power supply 61A applies the pulsed negative DC voltage BV to the lower electrode 18. In the period P _P , the output voltage VO of the power supply 61A may be 0V. Note that in each cycle P _BV , the period P _P may be a period before the period P _N.

Also in the plasma processing apparatus 1 shown in FIG. 19, the controller 64b specifies the partial period P _M using the synchronization signal SS. The synchronization signal SS may be a signal having a synchronization pulse at the start point of each period P _BV of the pulsed negative DC voltage BV. The synchronization signal SS may be generated by the power supply 61A. Alternatively, the synchronization signal SS may be generated by the synchronization signal generator 70. The synchronization signal generator 70 may be configured to receive a signal synchronized with the pulsed negative DC voltage BV from the power supply 61A and generate the synchronization signal SS from the signal. Alternatively, the synchronization signal SS may be generated by the synchronization signal generator 72. The sync signal SS generated by the sync signal generator 72 is supplied to the power supply 61A and the controller 64b. In this example, the power supply 61A periodically outputs a pulsed negative DC voltage BV so as to be synchronized with the synchronization signal SS generated by the synchronization signal generator 72.

Also in the plasma processing apparatus 1 shown in FIG. 19, one or more partial periods P _M may be set within each cycle P _LF . Further, each of the one or more partial periods P _M is not limited in its start time and time length as long as it is a partial period in each cycle P _LF . The start time and the time length of the partial period P _M can be arbitrarily set by the designation from the control unit 80 described later.
Moreover, the partial period P _M may be a period within the period P _N. Alternatively, the partial period P _M may be a period within the period P _P.

The plasma processing apparatus used in the method MT, the method MT1, the method MT2, the method MT3, the method MT4, the method MT5, and the method MT6 may be a plasma processing apparatus of a type other than the capacitive coupling type. For example, the inductively coupled plasma processing apparatus described above or the plasma processing apparatus that uses a surface wave such as a microwave to generate plasma includes a method MT, a method MT1, a method MT2, a method MT3, a method MT4, and a method MT5. And may be used in method MT6.

From the foregoing description, it is understood that various embodiments of the present disclosure are described herein for purposes of illustration and that various changes may be made without departing from the scope and spirit of the disclosure. Will. Therefore, the various embodiments disclosed herein are not intended to be limiting, the true scope and spirit of which is indicated by the appended claims.

DESCRIPTION OF SYMBOLS 1... Plasma processing apparatus, 10... Chamber, 14... Support stand, 18... Lower electrode, 61... 1st high frequency power supply, 62... 2nd high frequency power supply, 63... 1st matching device, 64... 2nd matching , 64a... Matching circuit, 64b... Controller, P _LF ... Cycle, P _M ... Partial period.

Claims (16)

A chamber,
A substrate support having a lower electrode and provided in the chamber;
A first high frequency power supply configured to supply a first high frequency power that is a bias high frequency power to the lower electrode;
A first matching unit connected between the first high frequency power supply and a load of the first high frequency power supply;
A second high frequency power supply configured to supply a second high frequency power for plasma generation;
A second matching unit connected between the second high frequency power supply and a load of the second high frequency power supply;
Equipped with
The second matching unit includes a matching circuit having variable impedance and a controller,
The controller is configured to set the impedance of the matching circuit to reduce reflections from the load of the second high frequency power supply during a designated sub-period within each cycle of the first high frequency power. ing,
Plasma processing equipment. The plasma processing apparatus according to claim 1, wherein the partial period is a period within a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a negative polarity. The plasma processing apparatus according to claim 1, wherein the partial period is a period within a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a positive polarity. Further comprising a sensor configured to measure voltage and current in an electrical path between the matching circuit and the second high frequency power supply,
The controller determines the load-side impedance of the second high-frequency power supply within the partial period from the voltage and the current acquired by the sensor, and determines the determined impedance and the output of the second high-frequency power supply. Configured to set the impedance of the matching circuit to reduce the difference with the impedance,
The plasma processing apparatus according to claim 1. A method for impedance matching performed in a plasma processing apparatus, comprising:
Supplying a first high frequency power, which is a bias high frequency power, from a first high frequency power supply to a lower electrode of a support table provided in a chamber of the plasma processing apparatus, via a first matching unit;
Supplying a second high frequency power for plasma generation from a second high frequency power supply via a second matching unit;
Setting the impedance of the matching circuit of the second matcher to reduce reflections from the load of the second high frequency power supply during a specified sub-period within each cycle of the first high frequency power. ,
Impedance matching method, including: The impedance matching method according to claim 5, wherein the partial period is a period within a period in which a voltage of the first high-frequency power output from the first high-frequency power source has a negative polarity. The impedance matching method according to claim 5, wherein the partial period is a period within a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a positive polarity. The impedance on the load side of the second high frequency power supply in the partial period is the voltage and the current acquired by the sensor, and the voltage and the current in the electric path between the matching circuit and the second high frequency power supply and Determined from the current,
The impedance of the matching circuit is set to reduce the difference between the determined impedance and the output impedance of the second high frequency power supply,
The matching method according to claim 5. A plasma processing method executed in a plasma processing apparatus, comprising:
Performing a first plasma process in a chamber of the plasma processing apparatus in a first period;
Performing a second plasma treatment in the chamber during a second period after the first period or subsequent to the first period;
Including,
Each of the step of performing the first plasma treatment and the step of performing the second plasma treatment is
Supplying a first high frequency power, which is a bias high frequency power, from a first high frequency power supply to a lower electrode of a support provided in the chamber, via a first matching unit;
Supplying a second high frequency power for plasma generation from a second high frequency power supply via a second matching unit;
Setting the impedance of the matching circuit of the second matcher to reduce reflections from the load of the second high frequency power supply during a specified sub-period within each cycle of the first high frequency power. ,
Including,
In one of the step of performing the first plasma treatment and the step of performing the second plasma treatment, the voltage of the first high-frequency power output from the first high-frequency power source is in the partial period. A period within a period of negative polarity,
In the other of the step of performing the first plasma treatment and the step of performing the second plasma treatment, the voltage of the first high frequency power output from the first high frequency power source is in the partial period. A period within a period having a positive polarity,
Plasma processing method. In the step of performing the first plasma treatment, the partial period is a period within a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a negative polarity,
In the step of performing the second plasma treatment, the partial period is a period within a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a positive polarity.
The plasma processing method according to claim 9. In the step of performing the first plasma treatment, the partial period is a period within a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a positive polarity,
In the step of performing the second plasma treatment, the partial period is a period within a period in which the voltage of the first high-frequency power output from the first high-frequency power source has a negative polarity.
The plasma processing method according to claim 9. A substrate is placed in the chamber for the first period of time and the second period of time;
The substrate has a base region and a film provided on the base region,
In the step of performing a first plasma treatment, the film is etched using plasma of a treatment gas to expose the underlying region,
In the step of performing a second plasma treatment, the film is further etched using plasma of the treatment gas,
The plasma processing method according to any one of claims 9 to 11. A substrate is placed in the chamber for the first period of time and the second period of time;
The substrate has a first film and a second film, and the first film is provided on the second film,
In the step of performing the first plasma treatment, the first film is etched using plasma of a treatment gas,
In the step of performing the second plasma treatment, the second film is etched using the plasma of the treatment gas,
The plasma processing method according to any one of claims 9 to 11. A substrate is placed in the chamber during the first period,
In the step of performing the first plasma treatment, the film of the substrate is etched using plasma of a treatment gas,
The substrate is not placed in the chamber during the second period,
Deposits adhering to the inner wall surface of the chamber are removed by using the plasma of the processing gas in the step of performing the second plasma processing,
The plasma processing method according to claim 11. A substrate is placed in the chamber for the first period of time and the second period of time;
In the step of performing a first plasma treatment, the film of the substrate is etched using plasma of a treatment gas to provide sidewall surfaces;
In the step of performing the second plasma treatment, a chemical species or another treatment from the plasma of the treatment gas is applied on the surface of the substrate whose film is etched in the step of performing the first plasma treatment. Deposits containing species from the plasma of gas are formed,
The step of performing the first plasma treatment and the step of performing the second plasma treatment are alternately repeated.
The plasma processing method according to claim 10. A substrate is placed in the chamber for the first period of time and the second period of time;
In the step of performing a first plasma treatment, the film of the substrate is etched using plasma of a treatment gas to provide sidewall surfaces;
In the step of performing the second plasma treatment, the surface of the film etched in the step of performing the first plasma treatment is modified using plasma of the processing gas or plasma of another processing gas,
The step of performing the first plasma treatment and the step of performing the second plasma treatment are alternately repeated.
The plasma processing method according to claim 10.

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