JP2020077817A - Semiconductor light-emitting element - Google Patents

Abstract

To improve the light extraction efficiency of a semiconductor light-emitting element including an active layer having a three-dimensional fine structure.SOLUTION: A semiconductor light-emitting element 100 includes a substrate 110, a plurality of columnar semiconductors 130 on the substrate 110, a buried layer 140 that fills gaps between the plurality of columnar semiconductors 130, and a light extraction surface S1. The light extraction surface S1 has a plurality of convex portions D1. The plurality of columnar semiconductors 130 have a hexagonal columnar shape and are arranged at a first pitch interval J1. The plurality of convex portions D1 are arranged at a second pitch interval J2. The first pitch interval J1 and the second pitch interval J2 are different.SELECTED DRAWING: Figure 2

Description

  The technical field of the present specification relates to a semiconductor light emitting device.

  The semiconductor light emitting device emits light by recombination of holes and electrons in the active layer. Conventionally, a flat sheet-shaped well layer has been used as an active layer. In recent years, active layers having a three-dimensional structure such as a columnar shape have been studied.

  For example, Patent Document 1 discloses a technique in which a hexagonal prism-shaped nanowire semiconductor is formed on a flat semiconductor layer, and a transparent conductive film such as ITO is formed on a side surface of the nanowire semiconductor (Patent Document 1). See claims 1 and 2 and FIGS. 3A and 3B).

Japanese Patent Publication No. 2016-518703

  Such a semiconductor having a nanowire structure is considered to be a minute fine structure itself. Therefore, in Patent Document 1, light is actually going to be extracted from the nanowire structure, which is a fine structure, to the outside.

  However, the earnest studies of the present inventors have revealed that when light is directly extracted from the nanowire structure, total reflection may occur between a material such as ITO and the atmosphere. This is due to the difference in refractive index between these two types of materials. This problem has been clarified for the first time as a result of calculation considering the fine structure.

  The problem to be solved by the technique of the present specification is to provide a semiconductor light emitting device aiming to improve the light extraction efficiency of a semiconductor light emitting device having an active layer having a three-dimensional fine structure.

  The semiconductor light emitting element according to the first aspect includes an underlayer, a plurality of columnar semiconductors on the underlayer, a buried layer filling a gap between the plurality of columnar semiconductors, and a light extraction surface. The light extraction surface has a plurality of convex portions. The plurality of columnar semiconductors have a hexagonal columnar shape and are arranged at a first pitch interval. The plurality of convex portions are arranged at the second pitch interval. The first pitch interval and the second pitch interval are different.

  This semiconductor light emitting device has higher light extraction efficiency than a light emitting device including a conventional nanowire structure.

  The present specification provides a semiconductor light emitting device aiming to improve the light extraction efficiency of a semiconductor light emitting device having an active layer having a three-dimensional fine structure.

It is a perspective view showing a schematic structure of a semiconductor light emitting element of a 1st embodiment. It is sectional drawing which shows the cross section of the semiconductor light-emitting device of 1st Embodiment. It is a schematic block diagram of the columnar semiconductor of the semiconductor light-emitting device of 1st Embodiment. FIG. 4 is a first sectional view showing a IV-IV section in FIG. 3. FIG. 5 is a second cross-sectional view showing a VV cross section of FIG. 3. FIG. 6 is a view (No. 1) for explaining the method for manufacturing the semiconductor light emitting device of the first embodiment. FIG. 6 is a view (No. 2) for explaining the method for manufacturing the semiconductor light emitting device according to the first embodiment. FIG. 7 is a view (No. 3) for explaining the method for manufacturing the semiconductor light emitting device of the first embodiment. FIG. 6 is a view (No. 4) for explaining the method for manufacturing the semiconductor light emitting device according to the first embodiment. FIG. 6 is a view (No. 5) for explaining the method for manufacturing the semiconductor light emitting device according to the first embodiment. It is sectional drawing (the 1) which shows the cross section of the semiconductor light emitting element in the modification of 1st Embodiment. It is sectional drawing (the 2) which shows the cross section of the semiconductor light-emitting device in the modification of 1st Embodiment. It is sectional drawing (the 3) which shows the cross section of the semiconductor light emitting element in the modification of 1st Embodiment. It is sectional drawing which shows the periphery of the columnar semiconductor of the semiconductor light-emitting device of 2nd Embodiment. FIG. 9 is a view (No. 1) for explaining the method for manufacturing the semiconductor light emitting device of the second embodiment. FIG. 6 is a diagram (No. 2) for explaining the method for manufacturing the semiconductor light emitting device of the second embodiment. FIG. 9 is a view (No. 3) for explaining the method for manufacturing the semiconductor light emitting device according to the second embodiment. FIG. 9 is a view (No. 4) for explaining the method for manufacturing the semiconductor light emitting device according to the second embodiment. It is a figure (the 5) for explaining the manufacturing method of the semiconductor light emitting element of a 2nd embodiment. It is a figure which shows schematic structure of the semiconductor light-emitting device of 3rd Embodiment.

  Hereinafter, specific embodiments will be described with reference to the drawings, taking a semiconductor light emitting element as an example. However, the technology of the present specification is not limited to these embodiments. Further, the laminated structure of each layer and the electrode structure of the semiconductor light emitting element described later are examples. In some cases, a laminated structure different from that of the embodiment may be used. The thickness ratio of each layer in each drawing is a conceptual one, and does not indicate an actual thickness ratio.

(First embodiment)
1. Semiconductor Light Emitting Element FIG. 1 is a perspective view showing a schematic configuration of the semiconductor light emitting element 100 of the first embodiment. The semiconductor light emitting device 100 has a three-dimensional active layer. As shown in FIG. 1, the semiconductor light emitting device 100 includes a substrate 110, a mask 120, a columnar semiconductor 130, a buried layer 140, a cathode electrode N1, and an anode electrode P1.

  The substrate 110 is for supporting the mask 120, the columnar semiconductor 130, and the buried layer 140. The substrate 110 has a growth substrate 111, a buffer layer 112, an intermediate layer 113, and an n-type semiconductor layer 114 (see FIG. 3). The growth substrate 111 is for supporting the buffer layer 112, the intermediate layer 113, the n-type semiconductor layer 114, and semiconductor layers above it. The growth substrate 111 is, for example, a sapphire substrate, a GaN substrate, an AlN substrate, or another growth substrate. The buffer layer 112 is, for example, a non-doped GaN layer. The intermediate layer 113 is, for example, an n-type GaN layer. The n-type semiconductor layer 114 is a base layer for growing the columnar semiconductor 130. The n-type semiconductor layer 114 has a first surface 114a for growing the columnar semiconductor 130. The n-type semiconductor layer 114 is, for example, an n-type AlGaN layer. These are examples, and structures other than the above may be used.

The mask 120 is a material in which a semiconductor does not grow from the surface. As will be described later, the mask 120 has a through hole. The mask 120 is preferably a transparent insulating film. In this case, the mask 120 absorbs almost no light. The electric current suitably flows through the columnar semiconductor 130 without passing through the mask 120. Examples of the material of the mask 120 include SiO ₂ , SiNx, and Al ₂ O ₃ .

  As shown in FIG. 1, the columnar semiconductor 130 is a columnar group III nitride semiconductor. The columnar semiconductor 130 is formed on the substrate 110. More specifically, the columnar semiconductor 130 is a semiconductor selectively grown from the surface of the substrate 110 exposed in the opening 120a of the mask 120 (see FIG. 3). The columnar semiconductor 130 has a hexagonal prism shape. A cross section of the columnar semiconductor 130 perpendicular to the central axis direction is a regular hexagon or a flat hexagon.

  The buried layer 140 is a layer for filling the gap between the columnar semiconductors 130. The buried layer 140 covers the columnar semiconductor 130. The material of the buried layer 140 is, for example, p-GaN.

  The cathode electrode N1 is formed on the substrate 110.

  The anode electrode P1 is formed on the buried layer 140. The anode electrode P1 may be formed on a semiconductor other than the buried layer 140.

2. Relationship between columnar semiconductor and light extraction surface 2-1. Arrangement of Columnar Semiconductors FIG. 2 is a conceptual diagram showing a cross section of the semiconductor light emitting device 100. The columnar semiconductors 130 are arranged in a square lattice. As shown in FIG. 2, the plurality of columnar semiconductors 130 are periodically arranged at the first pitch interval J1.

  The height of the columnar semiconductor 130 is, for example, 0.5 μm or more and 5 μm or less. The diameter of the columnar semiconductor 130 is, for example, 50 nm or more and 500 nm or less. Here, the diameter is a distance between facing vertices of a hexagon in a cross section perpendicular to the central axis direction. When there is a long side, it is the distance in the long side direction. The first pitch interval J1 of the columnar semiconductors 130 is, for example, 0.5 μm or more and 5 μm or less. These numerical values are examples and may be numerical values other than the above.

2-2. Light Extraction Surface As shown in FIG. 2, the buried layer 140 has a light extraction surface S1. The light extraction surface S1 has a plurality of convex portions D1. The plurality of convex shaped portions D1 have a conical shape. The plurality of convex shaped portions D1 are arranged in a square lattice shape. The plurality of convex shaped portions D1 are periodically arranged at the second pitch interval J2.

  The diameter of the bottom of the convex portion D1 is, for example, 100 nm or more and 500 nm or less. The height of the convex portion D1 is, for example, 100 nm or more and 500 nm or less. The second pitch interval J2 is, for example, 100 nm or more and 500 nm or less. These numerical values are examples and may be numerical values other than the above.

2-3. Relationship between Columnar Semiconductor and Convex Shaped Part As shown in FIG. 2, the first pitch interval J1 between adjacent columnar semiconductors 130 and the columnar semiconductor 130 is equal to the adjacent convex part D1 and convex part D1. And a second pitch distance J2 between and.

  A first point cloud obtained by projecting the vertices of the plurality of convex portions D1 onto the first surface 114a of the n-type semiconductor layer 114 (underlayer), and the vertices of the plurality of columnar semiconductors 130 through the n-type semiconductor layer 114 (underlayer). If the second point cloud projected onto the first surface 114a of and is virtually set, the probability that the second point cloud will fall within a radius of 0.01 μm from each point in the first point cloud Is 3% or less. More preferably, the second point cloud should not overlap the first point cloud. Here, the apex of the columnar semiconductor 130 is a point on the surface of the columnar semiconductor 130 through which the central axis of the hexagonal column passes.

3. Columnar Semiconductor FIG. 3 is a schematic configuration diagram of the columnar semiconductor 130 of the semiconductor light emitting device 100 of the first embodiment. The columnar semiconductor 130 includes a columnar n-type semiconductor 131, an active layer 132, and a cylindrical p-type semiconductor 133. The side surface of the columnar n-type semiconductor 131 is an m-plane. Alternatively, it is a surface close to the m-plane. The m-plane is a non-polar plane. Therefore, in the active layer 132, there is almost no decrease in luminous efficiency due to piezoelectric polarization.

3-1. Structure of Columnar Semiconductor The columnar n-type semiconductor 131 is a semiconductor layer selectively grown in a columnar shape starting from the n-type semiconductor layer 114 exposed in the opening 120a of the mask 120. As described above, the n-type semiconductor layer 114 is a base layer for growing the columnar semiconductor 130. The columnar n-type semiconductor 131 has a hexagonal prism shape. The cross section of the hexagonal column perpendicular to the axial direction is a regular hexagon or a flat hexagon. The columnar n-type semiconductor 131 actually grows in the lateral direction as well. Therefore, the thickness of the columnar n-type semiconductor 131 is slightly larger than the opening width of the opening 120a of the mask 120. The columnar n-type semiconductor 131 is, for example, an n-type GaN layer.

  The active layer 132 is formed along the outer periphery of the hexagonal columnar columnar n-type semiconductor 131. Therefore, the active layer 132 has a hexagonal tubular shape. The active layer 132 has, for example, one or more and five or less well layers, and barrier layers sandwiching the well layers. The well layer of the active layer 132 is substantially perpendicular to the plate surface of the substrate 110. However, the top of the active layer 132 may cover the top of the columnar n-type semiconductor 131. The top of the active layer 132 may be substantially parallel to the plate surface of the substrate 110. For example, the well layer is an InGaN layer and the barrier layer is an AlGaN layer.

  The tubular p-type semiconductor 133 is formed along the outer periphery of the active layer 132 having a hexagonal tubular shape. Therefore, the tubular p-type semiconductor 133 has a hexagonal tubular shape. Although the cylindrical p-type semiconductor 133 directly contacts the active layer 132, it does not have to directly contact the columnar n-type semiconductor 131. Further, the tubular p-type semiconductor 133 is in contact with the buried layer 140. The tubular p-type semiconductor 133 is, for example, a p-type GaN layer.

3-2. First Cross-sectional Shape FIG. 4 is a first cross-sectional view showing the IV-IV cross section of FIG. FIG. 4 shows a cross section of the columnar semiconductor 130 parallel to the plate surface of the substrate 110. As shown in FIG. 4, the cross section of the columnar semiconductor 130 perpendicular to the axial direction has a regular hexagonal shape. The columnar n-type semiconductor 131, the active layer 132, and the cylindrical p-type semiconductor 133 are arranged from the inside of the hexagonal columnar columnar semiconductor 130.

3-3. Second Cross-sectional Shape FIG. 5 is a second cross-sectional view showing the VV cross section of FIG. FIG. 5 shows a cross section of the columnar semiconductor 130 parallel to the plate surface of the substrate 110. In the cross section parallel to the plate surface of the substrate 110, the cross section of the columnar n-type semiconductor 131 is a flat hexagon.

  The active layer 132 has a pair of long side portions 132a and 132b facing each other and two pairs of short side portions 132c, 132d, 132e and 132f facing each other. The long side portions 132a and 132b and the short side portions 132c, 132d, 132e, and 132f are layers grown from the m-plane of the columnar n-type semiconductor 131. The long side portions 132a and 132b are, of course, portions that form longer sides than the short side portions 132c, 132d, 132e, and 132f. The long side portion 132a faces the long side portion 132b.

  The length W1 of the long side portions 132a, 132b of the active layer 132 in the long side direction K1 is longer than the length W2 of the short side portions 132c, 132d, 132e, 132f of the active layer 132 in the short side direction K2. Here, the length W1 of the long side portion 132a in the long side direction K1 is the length in the long side direction K1 at the central portion of the film thickness of the long side portion 132a. The same applies to the short side portion. The length of the long side portion 132a is equal to the length of the long side portion 132b. The length of the short side portion 132c is equal to the length of the other short side portions 132d, 132e, 132f. Of course, a slight difference may occur due to the problem of crystallinity.

4. Manufacturing method of semiconductor light emitting device 4-1. Substrate Preparation Step As shown in FIG. 6, a substrate 110 is prepared. The substrate 110 is formed by stacking a buffer layer 112, an intermediate layer 113, and an n-type semiconductor layer 114 on a growth substrate 111 in this order.

4-2. Mask Forming Step As shown in FIG. 7, a mask 120 is formed on the n-type semiconductor layer 114 of the substrate 110. Note that FIG. 7 illustrates an opening 120a formed in the opening forming process described below.

4-3. Aperture Forming Step As shown in FIG. 8, a plurality of openings 120a exposing the n-type semiconductor layer 114 are formed in the mask 120. Therefore, a technique such as etching may be used. FIG. 8 is a diagram showing the arrangement of the openings 120 a of the mask 120. FIG. 8 is a diagram of the substrate 110 viewed from a direction perpendicular to the plate surface of the substrate 110. In FIG. 8, the shape of the columnar semiconductor 130 is drawn by a broken line for reference. As shown in FIG. 8, the openings 120a of the mask 120 are circular and arranged in a square lattice.

  The shape of the columnar semiconductor 130 can be controlled by changing the shape of the opening 120a of the mask 120. When the shape of the opening 120a is circular, the columnar semiconductor 130 having a cross-sectional shape close to a regular hexagon can be formed. When the shape of the opening 120a is oval, the columnar semiconductor 130 having a cross-sectional shape close to a flat shape can be formed.

4-4. Columnar Semiconductor Forming Step As shown in FIG. 9, the hexagonal columnar columnar n-type semiconductor 131 is selectively grown starting from the n-type semiconductor layer 114 exposed under the opening 120a of the mask 120. Therefore, a known selective growth technique may be used. In this way, when the semiconductor layer is selectively grown, the m-plane is likely to appear as a facet.

  As described above, since the opening 120a of the mask 120 has a circular shape, the columnar n-type semiconductor 131 having a hexagonal columnar shape whose cross section is close to a regular hexagon grows.

  Next, the active layer 132 is formed around the columnar n-type semiconductor 131. The active layer 132 is formed on the side surface of the columnar n-type semiconductor 131 whose cross section is close to a regular hexagon. The active layer 132 may also be formed on the top of the columnar n-type semiconductor 131.

  Next, a cylindrical p-type semiconductor 133 that covers the outer periphery of the active layer 132 is formed on the active layer 132. The tubular p-type semiconductor 133 has a hexagonal tubular shape. The cylindrical p-type semiconductor 133 is formed on the side surface of the active layer 132. The cylindrical p-type semiconductor 133 may be formed on the top of the columnar n-type semiconductor 131 or the active layer 132. In this way, the columnar semiconductor 130 is formed.

4-5. Step of Forming Buried Layer As shown in FIG. 10, the gap between the columnar semiconductors 130 is filled with the buried layer 140.

4-6. Next, the surface of the embedded layer 140 is roughened by dry etching using ICP, for example. As a result, the plurality of convex portions D1 are formed on the surface of the embedding layer 140.

4-7. Electrode forming step Next, the cathode electrode N1 is formed on the n-type semiconductor layer 114 of the substrate 110. Further, the anode electrode P1 is formed on the buried layer 140.

4-8. Other Steps A heat treatment step, a step of forming a passivation film or the like on the surface of the semiconductor layer, or another step may be performed.

5. Effect of First Embodiment The semiconductor light emitting device 100 of the first embodiment has a higher light extraction efficiency than a conventional light emitting device that directly extracts light from the nanowire to the outside of the device.

  Conventionally, the nanowire (corresponding to the columnar semiconductor 130 of this embodiment) is a fine structure. Therefore, it has been considered that the shape of the nanowire itself improves the light extraction efficiency. However, it was revealed by the present inventors that when light is extracted from the nanowire, total reflection is likely to occur due to the difference in refractive index between the nanowire and air, despite the fine structure. Therefore, the present inventors dared to embed a nanowire, which was conventionally considered to have high light extraction efficiency, as shown in FIG. 2, and set a separate light extraction surface. Therefore, the semiconductor light emitting device 100 of this embodiment has a sufficiently high light extraction efficiency.

6. Modification 6-1. Surface Layer In the present embodiment, the embedded layer 140 has the light extraction surface S1. The light extraction surface S1 may be formed in a layer other than the embedding layer 140.

  As shown in FIG. 11, the surface layer 150 may be formed on the buried layer 140. The surface layer 150 has a light extraction surface S1 on which a plurality of convex portions D1 are formed. The material of the surface layer 150 is, for example, a p-GaN layer having a different doping amount from the buried layer 140. Moreover, the material of the surface layer 150 may be a transparent conductive oxide such as ITO or IZO.

  As shown in FIG. 12, the convex portion D <b> 1 may be formed by forming an uneven shape on the surface of the embedding layer 140 and forming the surface layer 150 on the uneven shape. Here, the buried layer 140 is, for example, a group III nitride semiconductor such as p-GaN. The surface layer 150 is, for example, a transparent conductive oxide such as ITO.

6-2. Arrangement of Columnar Semiconductors and Arrangement of Convex Shaped Portions A plurality of columnar semiconductors 130 may be arranged in a honeycomb shape, and a plurality of convex shape portions D1 may be arranged in a honeycomb shape. It suffices that the pitch interval J1 of the columnar semiconductor 130 and the pitch interval J2 of the convex portion D1 be different.

  The array of the plurality of columnar semiconductors 130 may be a honeycomb shape, and the array of the plurality of convex shaped portions D1 may be a square lattice shape. Further, the array of the plurality of columnar semiconductors 130 may be a square lattice shape, and the array of the plurality of convex shaped portions D1 may be a honeycomb shape. As described above, if the arrangement of the columnar semiconductors 130 and the arrangement of the convex portions D1 are different, the pitch interval J1 and the pitch interval J2 may be the same or different.

  The arrangement of the columnar semiconductors 130 may be changed by changing the arrangement of the openings 120a of the mask 120. The arrangement of the plurality of convex portions D1 can be changed by changing the mask pattern for etching the embedded layer 140.

6-3. Composition of Columnar Semiconductor In this embodiment, the columnar n-type semiconductor 131 is an n-type GaN layer, the well layer is an InGaN layer, the barrier layer is an AlGaN layer, and the cylindrical p-type semiconductor 133 is a p-type GaN layer. is there. These are examples, and other group III nitride semiconductors may be used. Also, other semiconductors may be used.

6-4. Buried Layer Composition In this embodiment, the material of the buried layer 140 is a p-GaN layer. However, as the buried layer 140, a p-AlGaN layer can be used instead of the p-GaN layer. The refractive index of the AlGaN layer is smaller than that of the p-type GaN layer. Therefore, the light extraction efficiency is improved. Alternatively, the buried layer 140 may be another p-AlInGaN layer.

6-5. Current Blocking Layer of Columnar Semiconductor It is preferable to promote current injection from the side surface of the columnar semiconductor 130. For example, as shown in FIG. 13, a transparent insulating film 165 is provided on the top of the columnar semiconductor 130. As a result, the current flowing to the top of the columnar semiconductor 130 is blocked, and the current can be favorably injected from the side surface of the columnar semiconductor 130.

6-6. Textured Substrate The growth substrate 111 of the substrate 110 may be textured. That is, the growth substrate 111 has a concave-convex portion in which irregularities are periodically arranged on the surface on the semiconductor layer side. Examples of the uneven shape include a conical shape and a hemispherical shape. These convex shapes may be arranged in, for example, a square lattice shape or a honeycomb shape. Thereby, the light extraction efficiency is further improved.

  Assuming that the uneven shape is a hemisphere, the diameter of the bottom of the hemisphere is 1 μm or more and 5 μm or less, the height of the hemisphere is 0.5 μm or more and 5 μm or less, and the pitch of the hemisphere is 1 μm or more. The thickness is preferably 15 μm or less. The above numerical range is an example and may be a numerical range other than the above.

6-7. Concave portion Instead of the convex portion D1 of the present embodiment, a concave portion may be formed on the light extraction surface.

6-8. Reflective Layer The semiconductor light emitting device 100 may have a reflective layer on the back surface of the substrate 110 opposite to the mask layer 120.

6-9. Combination The above modifications may be freely combined.

(Second embodiment)
The second embodiment will be described.

1. Semiconductor Light Emitting Element FIG. 14 is a sectional view showing the periphery of the columnar semiconductor 130 of the semiconductor light emitting element 200 of the second embodiment. As shown in FIG. 14, the semiconductor light emitting device 200 has a tunnel junction on the side surface of the columnar semiconductor 130.

The semiconductor light emitting device 200 has a p + layer 271 and an n + layer 272 on the side surface of the columnar semiconductor 130. The p + layer 271 is located between the columnar semiconductor 130 and the n + layer 272. The p + layer 271 is a layer having a high p-type impurity concentration. The Mg concentration of the p + layer 271 is, for example, 2 × 10 ²⁰ cm ⁻³ . The n + layer 272 is a layer having a high n-type impurity concentration. The Si concentration of the n + layer 272 is, for example, 2 × 10 ²⁰ cm ⁻³ .

  The buried layer 140 covers the columnar semiconductor 130, the p + layer 271, and the n + layer 272. The buried layer 140 is an n-GaN layer.

2. Effect of Second Embodiment As a result, the current can be efficiently injected from the side surface of the columnar semiconductor 130. At this time, the buried layer 140 can be composed of an n-type semiconductor layer. Therefore, it is effective in reducing the light absorption loss and the element resistance.

3. Manufacturing method of semiconductor light emitting device 3-1. Substrate Preparation Step As shown in FIG. 15, a substrate 110 is prepared as in the first embodiment.

3-2. Mask forming step The mask layer 120 is formed on the substrate 110 as in the first embodiment.

3-3. Opening Forming Step As shown in FIG. 16, the opening 120a is formed in the mask layer 120 as in the first embodiment.

3-4. Columnar Semiconductor Forming Step Similar to the first embodiment, the columnar n-type semiconductor 131, the active layer 132, and the tubular p-type semiconductor 133 are grown from the n-type semiconductor layer 114 exposed in the opening 120a.

3-5. Tunnel Junction Forming Step Next, the p + layer 271 is formed on the side surface of the cylindrical p-type semiconductor 133 of the columnar semiconductor 130. After that, the n + layer 272 is formed on the side surface of the p + layer 271. The state at this time is shown in FIG. After that, the upper portions of the p + layer 271 and the n + layer 272 are removed by etching. Thereby, as shown in FIG. 18, p + layer 271 and n + layer 272 are formed on the side surface of columnar semiconductor 130.

3-6. Buried Layer Forming Step Next, as shown in FIG. 19, the gap between the columnar semiconductor 130 including the p + layer 271 and the n + layer 272 and the columnar semiconductor 130 is filled with the buried layer 140.

3-7. Concavo-convex shape forming step Next, the surface of the embedding layer 140 is roughened to form a plurality of convex-shaped portions D1.

3-8. Electrode Forming Step Then, the anode electrode P1 is formed on the buried layer 140. Further, the cathode electrode N1 is formed on the n-type semiconductor layer 114.

4. Modifications Modifications of the first embodiment can be used.

(Third Embodiment)
A third embodiment will be described.

1. Semiconductor Light Emitting Element FIG. 20 is a diagram showing a schematic configuration of a semiconductor light emitting element 300 according to the third embodiment. The semiconductor light emitting device 300 includes a substrate 110, a mask layer 120, a columnar semiconductor 130, a transparent conductive film 340, and a buried layer 350.

  The transparent conductive film 340 covers the plurality of columnar semiconductors 130. The material of the transparent conductive film 340 is, for example, a transparent conductive oxide such as ITO. The transparent conductive film 340 is electrically connected to the anode electrode P1.

  The burying layer 350 is a layer that is in contact with the transparent conductive film 340 and fills a gap between the columnar semiconductor 130 having the transparent conductive film 340 and the columnar semiconductor 130. The material of the buried layer 350 is resin. Since the transparent conductive film 340 plays a role of electrically connecting the columnar semiconductor 130 and the anode electrode P1, the resin of the buried layer 350 may be insulative. Further, a plurality of convex shaped portions D1 are formed on the surface of the buried layer 350. That is, the buried layer 350 has the light extraction surface S1.

2. Modification 2-1. Material of Buried Layer The buried layer 350 may be a material having a high electric resistivity other than resin. However, the material of the buried layer 350 is a transparent material.

2-2. Combination In some cases, the first embodiment and the second embodiment may be freely combined with these modified examples.

(simulation)
The light extraction efficiency was calculated by changing the arrangement of the plurality of columnar semiconductors and the plurality of convex portions. The size of the columnar semiconductor is different from that of the convex portion of the light extraction surface. Therefore, in the conventional calculation method, it was not easy to calculate in consideration of the columnar semiconductor and the convex portion.

1. Calculated Structure 1-1. First structure (modification of the first embodiment)
The first structure is the structure shown in Table 1. That is, in the first structure, the uneven substrate is used, and the embedded layer in which the columnar semiconductor is embedded has a plurality of convex portions. The emission wavelength of the light emitting device having the first structure is 405 nm. Further, the conical convex portions are arranged in a honeycomb shape. The diameter of the bottom of the convex portions is 200 nm, the height of the convex portions is 170 nm, and the pitch interval between the convex portions is 200 nm.

  The material of the buried layer is n-GaN, and the height of the buried layer is 2 μm. The columnar semiconductors are arranged in a honeycomb shape, the columnar semiconductors have a height of 1.5 μm, and the columnar semiconductors have a pitch interval of 1.2 μm. The material of the tubular p-type semiconductor is p-GaN, and the film thickness of the tubular p-type semiconductor is 100 nm. The material of the active layer is InGaN, and the film thickness of the active layer is 37 nm. The material of the columnar n-type semiconductor is n-GaN, and the diameter of the columnar n-type semiconductor is 200 nm. Here, the diameter of the columnar n-type semiconductor is the length between the facing vertices of a regular hexagon.

The substrate includes a reflective layer, a sapphire substrate, an n-GaN layer, and an n-Al _0.03 Ga _0.97 N layer stacked in this order from the side farther from the semiconductor. The film thickness of the sapphire substrate is 120 μm. The film thickness of the n-GaN layer is 2.6 μm. The film thickness of the n-Al _0.03 Ga _0.97 N layer is 1.2 μm. The uneven shape of the sapphire substrate has a hemispherical shape and is arranged in a honeycomb shape. The diameter of the unevenness is 2.8 μm, the height of the unevenness is 1.5 μm, and the pitch interval of the unevenness is 6 μm.

[Table 1]
First structure Emission wavelength 405 nm
Convex shape Convex shape Conical Convex shape array Honeycomb (triangular lattice)
Diameter of the bottom of the convex portion is 200 nm
Height of convex part 170nm
Pitch interval 200nm
Buried layer Buried layer material n-GaN
Buried layer height 2 μm
Columnar semiconductor Columnar semiconductor shape Hexagonal column (regular cross section)
Array of columnar semiconductors Honeycomb (triangular lattice)
Columnar semiconductor height 1.5 μm
Pitch interval 1.2 μm
Material of tubular p-type semiconductor p-GaN
Thickness of cylindrical p-type semiconductor 100 nm
Material of active layer InGaN
Thickness of active layer 37nm
Material of columnar n-type semiconductor n-GaN
Diameter of columnar n-type semiconductor 200 nm
Substrate n-Al _0.03 Ga _0.97 N layer 1.2 μm (film thickness)
n-GaN layer 2.6 μm (film thickness)
Sapphire substrate 120 μm (film thickness)
Material of reflective layer Al
Asperity of sapphire substrate Asperity shape Hemisphere shape Asperity array Honeycomb shape (triangular lattice)
Uneven diameter 2.8 μm
Uneven height 1.5 μm
Uneven pitch pitch 6 μm

  Note that the structures that are thought to have a small effect on the analysis results were omitted from the calculation. The omitted structures are, for example, a buffer layer between the sapphire substrate and the n-GaN layer, a p + layer for tunnel junction, and an n + layer. This is because these film thicknesses are very thin.

1-2. Second structure (first embodiment)
The second structure is a structure in which the uneven sapphire substrate in Table 1 is changed to a flat sapphire substrate.

1-3. Third structure (conventional structure)
The third structure is a structure in which the uneven sapphire substrate in Table 1 is changed to a flat sapphire substrate, and the embedded layer is removed to cover the columnar semiconductor with ITO.

2. Calculation Results Table 2 shows the results of the simulation. As shown in Table 2, in the conventional third structure, the light extraction efficiency was 31%. On the other hand, in the first structure corresponding to the modified example of the first embodiment, the light extraction efficiency was 56%. In the second structure corresponding to the first embodiment, the light extraction efficiency was 53%.

[Table 2]
Structure Buried layer Substrate processing Light extraction efficiency First structure Yes Yes 56%
Second structure Yes No No 53%
Third structure None None 31%

  As described above, the light extraction efficiency is higher when the columnar semiconductor is intentionally embedded and a separate light extraction surface is provided than when the light is directly extracted from the columnar semiconductor that should have a fine structure.

(Appendix)
The semiconductor light emitting element according to the first aspect includes an underlayer, a plurality of columnar semiconductors on the underlayer, a buried layer filling a gap between the plurality of columnar semiconductors, and a light extraction surface. The light extraction surface has a plurality of convex portions. The plurality of columnar semiconductors have a hexagonal columnar shape and are arranged at a first pitch interval. The plurality of convex portions are arranged at the second pitch interval. The first pitch interval and the second pitch interval are different.

  A semiconductor light emitting device according to a second aspect, an underlayer having a first surface, a plurality of columnar semiconductors on the underlayer, an embedding layer filling a gap between the plurality of columnar semiconductors, a light extraction surface, Have. The light extraction surface has a plurality of convex portions arranged periodically. The plurality of columnar semiconductors have a hexagonal columnar shape and are periodically arranged. A first point group in which the vertices of the plurality of convex portions are projected onto the first surface of the underlayer and a second point group in which the vertices of the plurality of columnar semiconductors are projected onto the first surface of the underlayer are virtually When set to, the probability that the second point group will fall within a radius of 0.01 μm from each point in the first point group is 3% or less.

  In the semiconductor light emitting device according to the third aspect, the second point cloud does not overlap with the first point cloud.

  In the semiconductor light emitting device according to the fourth aspect, the embedded layer has a light extraction surface.

  The semiconductor light emitting element in the fifth aspect has a surface layer on the embedded layer. The surface layer has a light extraction surface.

  In the semiconductor light emitting device according to the sixth aspect, the embedded layer is an n-GaN layer.

  In the semiconductor light emitting device according to the seventh aspect, the embedded layer is a p-GaN layer.

  The semiconductor light emitting element in the eighth aspect has a transparent conductive film that covers the plurality of columnar semiconductors.

  In the semiconductor light emitting element according to the ninth aspect, the embedded layer is made of resin and is in contact with the transparent conductive film.

  In the semiconductor light emitting device according to the tenth aspect, the plurality of columnar semiconductors are group III nitride semiconductors. The plurality of columnar semiconductors are arranged in a honeycomb shape.

  In the semiconductor light emitting element according to the eleventh aspect, the plurality of convex shaped portions are arranged in a honeycomb shape.

  The semiconductor light emitting element in the twelfth aspect has a substrate that supports the underlayer. The substrate has an uneven portion.

100 ... Semiconductor light emitting element 110 ... Substrate 111 ... Growth substrate 112 ... Buffer layer 113 ... Intermediate layer 114 ... N-type semiconductor layer 114a ... First surface 120 ... Mask 120a ... Opening 130 ... Columnar semiconductor 131 ... Columnar n-type semiconductor 132 ... Active layer 133 ... Cylindrical p-type semiconductor 140 ... Buried layer 150 ... Surface layer N1 ... Cathode electrode P1 ... Anode electrode S1 ... Light extraction surface D1 ... Convex portion

Claims (12)

An underlayer,
A plurality of columnar semiconductors on the underlayer,
A buried layer filling a gap between the plurality of columnar semiconductors,
Light extraction surface,
Have
The light extraction surface is
Has a plurality of convex portions,
The plurality of columnar semiconductors,
While having a hexagonal prism shape,
They are arranged at the first pitch interval,
The plurality of convex shaped portions,
They are arranged at the second pitch interval,
A semiconductor light emitting device characterized in that the first pitch interval and the second pitch interval are different. An underlayer having a first surface,
A plurality of columnar semiconductors on the underlayer,
A buried layer filling a gap between the plurality of columnar semiconductors,
Light extraction surface,
Have
The light extraction surface is
Having a plurality of convex portions arranged periodically,
The plurality of columnar semiconductors,
It has a hexagonal prism shape and is arranged periodically,
A first point group in which the vertices of the plurality of convex portions are projected onto the first surface of the underlayer, and a second point in which the vertices of the plurality of columnar semiconductors are projected onto the first surface of the underlayer. When the group and are virtually set,
A semiconductor light emitting device characterized in that the probability that the second point group falls within a radius of 0.01 μm from each point in the first point group is 3% or less. The semiconductor light emitting device according to claim 2,
The semiconductor light emitting device characterized in that the second point cloud does not overlap with the first point cloud. The semiconductor light emitting device according to any one of claims 1 to 3,
The buried layer is
A semiconductor light emitting device having a light extraction surface. The semiconductor light emitting device according to claim 1, wherein:
A surface layer on the buried layer,
The surface layer is
A semiconductor light emitting device having a light extraction surface. The semiconductor light emitting device according to claim 1, wherein:
A semiconductor light emitting device, wherein the buried layer is an n-GaN layer. The semiconductor light emitting device according to claim 1, wherein:
The semiconductor light emitting device, wherein the buried layer is a p-GaN layer. The semiconductor light emitting device according to claim 1, wherein:
A semiconductor light emitting device comprising a transparent conductive film covering the plurality of columnar semiconductors. The semiconductor light emitting device according to claim 8,
The buried layer is
Being a resin,
A semiconductor light emitting device, which is in contact with the transparent conductive film. The semiconductor light emitting element according to claim 1, wherein:
The plurality of columnar semiconductors is a group III nitride semiconductor,
The plurality of columnar semiconductors,
A semiconductor light emitting device, which is arranged in a honeycomb shape. The semiconductor light emitting device according to claim 1, wherein:
The plurality of convex shaped portions,
A semiconductor light emitting device, which is arranged in a honeycomb shape. The semiconductor light emitting device according to claim 1, wherein:
A substrate supporting the underlayer,
The substrate is
A semiconductor light emitting device having an uneven portion.

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