JP2020038201A - Signal generation device - Google Patents

Abstract

To self-diagnose presence/absence of occurrence of breakage.SOLUTION: A signal generation device comprises: a sample signal output part 8 for outputting a first sample signal Vsp1 which causes a first impedance element 4 to generate a first test signal Vts1 instead of a first voltage signal Vc1 which is generated according to a voltage Va of a coating conducting wire La, and a second sample signal Vsp2 which causes a second impedance element 5 to generate a second test signal Vts2 instead of a second voltage signal Vc2 which is generated according to a voltage Vb of a coating conducting wire Lb; a waveform acquisition part 9 for acquiring waveform data Dv4 of a symbol identification signal Sf which is generated in an output state of respective sample signals Vsp1, Vsp2; and a processing part 11 for comparing a change pattern of the symbol identification signal Sf indicated by the waveform data Dv4 acquired by the waveform acquisition part 9 in the output state of the respective sample signals Vsp1, Vsp2, with a reference change pattern which is acquired in advance, then determining presence/absence of breakage for self-diagnosing a signal generation device 1A.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a signal generation device that generates a code specifying signal capable of specifying a code corresponding to a logic signal based on a two-wire differential voltage type logic signal transmitted via a communication path.

  For example, the following patent document discloses a vehicle data collection device (hereinafter, referred to as a vehicle data collection device) configured to collect and record various CAN frames (control data) transmitted via a serial bus (in-vehicle LAN) for CAN communication. (Also simply referred to as “collection device”). This collecting device is configured to be connectable to a diagnostic connector (connector for diagnostic device connection: hereinafter, also simply referred to as a “connector”) provided on a serial bus so that external devices can be connected for the purpose of failure diagnosis and maintenance. ing. Further, in this collecting device, when the connector is connected to the connector, the collecting device operates by a power supply supplied through the connector, and automatically starts / stops collecting CAN frames from the serial bus in conjunction with operation of an ignition switch. Is executed.

JP 2008-70133 A (Page 4-11, FIG. 1-17)

  However, the connector provided on the serial bus disclosed in the above-mentioned patent document is provided with an external device for the purpose of failure diagnosis and maintenance, that is, a vehicle developer (manufacturer) diagnoses the failure after shipping the vehicle. This is a connector for connecting a device that is assumed to be connected for the purpose of maintenance or the like. Therefore, connecting a diagnostic device or the like assumed by the developer to the connector does not cause a problem. However, when a device that is not assumed by the developer is connected to the connector, an unexpected trouble (serial bus) occurs in the vehicle. (Troubles such as transmission of a logic signal on (communication path) or obstruction of operation of a device connected to the serial bus) may occur.

  Therefore, the applicant of the present application has proposed a CAN frame (code string) that is connected to the serial bus via a probe that is capacitively coupled to the serial bus (communication path) and transmitted via the serial bus without using the connector. ) Have been developed to generate a code specifying signal capable of specifying the code that constitutes.

  As shown in FIG. 10, one of the signal generators 101 includes a first impedance element 102, a second impedance element 103, a differential amplifier 104, and a signal generator 105 to form a pair of communication paths. , A two-wire differential voltage type logic signal Sa transmitted through the covered conductors La and Lb (the voltage Va of the voltage signal Va transmitted to the covered conductor La and the voltage Vb of the voltage signal Vb transmitted to the covered conductor Lb) (For example, the logic signal Sa is a signal conforming to the CAN protocol) corresponding to the logic signal Sa transmitted via the serial bus SB based on the potential difference (Va−Vb) between the logic signal Sa and the logic signal Sa. In some cases, a code specifying signal Sf capable of specifying a CAN frame (code sequence) is generated and output.

  In the signal generating device 101, the first impedance element 102 is connected in parallel between a non-inverting input terminal of an operational amplifier 111a of a first amplifier circuit 111 described later and a reference potential portion (ground G) in the device, for example. It consists of connected resistors and capacitors. The first impedance element 102 is connected to an electrode 22a (an electrode 22a capacitively coupled to the coated conductor La) disposed on one probe PLa attached to one of the pair of coated conductors La and Lb. Connected to generate a first voltage signal Vc1 whose voltage changes according to the voltage Va transmitted to the covered conductor La.

  The second impedance element 103 is composed of, for example, a resistor and a capacitor connected in parallel between a non-inverting input terminal of an operational amplifier 112a of a second amplifier circuit 112 described later and a ground G in the device. The second impedance element 103 is connected to the electrode 22b (the electrode 22b capacitively coupled to the covered conductor Lb) provided on the other probe PLb attached to the other covered conductor Lb, and transmitted to the covered conductor Lb. A second voltage signal Vc2 whose voltage changes according to the voltage Vb is generated.

  As an example, the differential amplifying unit 104 is configured as a non-inverting AC amplifying circuit having an operational amplifier 111a, receives and amplifies the first voltage signal Vc1, and amplifies and outputs the third voltage signal Vc3 as a third voltage signal Vc3. A non-inverting AC amplifying circuit having the same configuration as the first amplifying circuit 111 including the circuit 111 and the operational amplifier 112a is configured to input and amplify the second voltage signal Vc2 and output the amplified signal as the fourth voltage signal Vc4. There is provided a differential amplifier circuit 113 which includes a second amplifier circuit 112 and an operational amplifier 113a, and receives the third voltage signal Vc3 and the fourth voltage signal Vc4 and outputs a difference signal Vd. In this differential amplifier circuit 113, the two input resistors of the operational amplifier 113a are defined to have the same resistance value, and the resistance value of the resistor connected between the non-inverting input terminal of the operational amplifier 113a and the ground G is calculated by It is defined to be the same as the resistance value of the negative feedback resistor of the amplifier 113a. With this configuration, the differential amplifier circuit 113 outputs the respective voltages Vc3 and Vc3 of the third voltage signal Vc3 and the fourth voltage signal Vc4 at an amplification factor defined by the resistance values of the input resistance and the negative feedback resistance of the operational amplifier 113a. It amplifies the difference voltage (Vc4-Vc3) of Vc4 and outputs a difference signal Vd. Also, as described above, the third voltage signal Vc3 is a signal obtained by non-inverting amplification of the first voltage signal Vc1, and the fourth voltage signal Vc4 is a signal obtained by non-inverting amplification of the second voltage signal Vc2. The difference signal Vd is also a signal whose voltage changes according to the difference voltage (Vc2−Vc1) between the voltages Vc1 and Vc2 of the first voltage signal Vc1 and the second voltage signal Vc2.

  As an example, the signal generation unit 105 includes a comparator (not shown), and generates and outputs the code specifying signal Sf by comparing the difference signal Vd with a predetermined threshold voltage and binarizing the difference signal Vd. .

  By the way, in the above-described signal generation device developed by the applicant of the present application, although the generation rate is low in the first impedance element 102, the second impedance element 103, the differential amplification unit 104, the signal generation unit 105, etc., which constitute the device, In some cases, a failure may occur, and it is extremely useful and convenient if a self-diagnosis can be performed for the presence or absence of such a failure without separately preparing a dedicated inspection device.

  The present invention has been made in view of such a problem to be solved, and has a function of generating a code specifying signal capable of specifying a code corresponding to a logic signal transmitted via a communication path, and a function of generating a failure. A main object of the present invention is to provide a signal generation device having a function capable of self-diagnosis of presence / absence.

  In order to achieve the above object, a signal generating device according to claim 1 is provided on a pair of probes respectively attached to a pair of covered conductors forming a communication path for transmitting a logic signal of a two-wire differential voltage system. Connected between one electrode of one probe of the pair of electrodes and a reference potential inside the device, and transmitted to one of the pair of covered conductors capacitively coupled to the one electrode. A first impedance element that generates a first voltage signal whose voltage changes according to the voltage being applied, and is connected between the other electrode of the other probe of the pair of electrodes and the reference potential, A second impedance element that generates a second voltage signal whose voltage changes according to the voltage transmitted to the other coated conductor capacitively coupled to the other electrode of the pair of coated conductors; A differential amplifier that receives the first voltage signal and the second voltage signal and outputs a differential signal whose voltage changes in accordance with a differential voltage between the voltage signals, the code corresponding to the logic signal. A signal generation device that generates a code specifying signal that can specify the first signal based on the difference signal, the first sample being used to generate a first test signal in the first impedance element instead of the first voltage signal. A signal and a sample signal output unit for outputting a second sample signal for generating a second test signal in the second impedance element in place of the second voltage signal, and the sample signal output unit outputs the first sample signal. And a waveform acquisition unit for acquiring waveform data for the code specifying signal generated in a state where the second sample signal is being output; The code indicated by the waveform data acquired in advance by the waveform acquisition unit when the sample signal output unit is outputting the first sample signal and the second sample signal when the device is in a normal state. Using the change pattern of the voltage value of the specifying signal with the passage of time as a reference change pattern, the waveform obtaining section acquires the state in which the sample signal output section outputs the first sample signal and the second sample signal. Comparing the change pattern of the voltage value of the code specifying signal indicated by the waveform data with time and the reference change pattern, and when the change pattern matches the reference change pattern, The self-diagnosis of the signal generating device is determined to be in a normal state, and to determine that the signal generating device is in a failed state when they do not match. And a processing unit for executing a disconnection process.

  According to a second aspect of the present invention, there is provided the signal generation device, wherein a pair of electrodes respectively disposed on a pair of probes respectively attached to a pair of covered conductors forming a communication path for transmitting a logic signal of a two-wire differential voltage system. Is connected between one electrode of one of the probes and a reference potential inside the device, and the voltage transmitted to one of the covered conductors capacitively coupled to the one of the pair of covered conductors. A first impedance element that generates a first voltage signal whose voltage changes according to the first probe, and a first impedance element that is connected between the other electrode of the other probe of the pair of electrodes and the reference potential; A second impedance element for generating a second voltage signal whose voltage changes according to a voltage transmitted to the other coated conductor capacitively coupled to the other electrode of the conductor, and the first voltage signal; And a differential amplifier that receives the second voltage signal and outputs a differential signal whose voltage changes in accordance with the differential voltage of each voltage signal, and that can specify a code corresponding to the logic signal. A signal generation device that generates a specifying signal based on the difference signal, wherein a first sample signal for generating a first test signal in the first impedance element instead of the first voltage signal; A sample signal output unit for outputting a second sample signal for generating a second test signal in the second impedance element in place of the second voltage signal, wherein the sample signal output unit includes the first sample signal and the second sample A waveform obtaining unit that obtains waveform data on the differential signal output from the differential amplifying unit while the signal is being output; The difference indicated by the waveform data previously acquired by the waveform acquisition unit when the sample signal output unit is outputting the first sample signal and the second sample signal when the device is in a normal state. Using the change pattern of the voltage value of the signal over time as a reference change pattern, the change is obtained by the waveform obtaining unit in a state where the sample signal output unit is outputting the first sample signal and the second sample signal. Comparing a change pattern of the voltage value of the difference signal indicated by the waveform data with the passage of time and the reference change pattern, and when the change pattern matches the reference change pattern, the signal generation device Performs a self-diagnosis process of the signal generator, which determines that the signal generator is in a normal state and is in a failure state when they do not match. And a processing unit for performing the processing.

  According to a third aspect of the present invention, there is provided the signal generation device, wherein a pair of electrodes respectively disposed on a pair of probes respectively attached to a pair of covered conductors forming a communication path for transmitting a logic signal of a two-wire differential voltage system. Is connected between one electrode of one of the probes and a reference potential inside the device, and the voltage transmitted to one of the covered conductors capacitively coupled to the one of the pair of covered conductors. A first impedance element that generates a first voltage signal whose voltage changes according to the first probe, and a first impedance element that is connected between the other electrode of the other probe of the pair of electrodes and the reference potential; A second impedance element for generating a second voltage signal whose voltage changes according to a voltage transmitted to the other coated conductor capacitively coupled to the other electrode of the conductor, and the first voltage signal; And a differential amplifier that receives the second voltage signal and outputs a differential signal whose voltage changes in accordance with the differential voltage of each voltage signal, and that can specify a code corresponding to the logic signal. A signal generation device that generates a specifying signal based on the difference signal, wherein the differential amplifier receives the first voltage signal, amplifies the first voltage signal, and outputs the amplified first voltage signal as a third voltage signal; A second amplifier circuit that receives and amplifies the second voltage signal and outputs the amplified signal as a fourth voltage signal, and a differential amplifier circuit that receives the third voltage signal and the fourth voltage signal and outputs the differential signal A first sample signal for generating a first test signal in the first impedance element in place of the first voltage signal, and a second test signal in place of the second voltage signal in response to the second input signal. A sample signal output unit for outputting a second sample signal to be generated by the dancer element, and the third voltage signal while the sample signal output unit is outputting the first sample signal and the second sample signal. A waveform acquisition unit for acquiring the waveform data of the fourth voltage signal as the first waveform data and acquiring the waveform data of the fourth voltage signal as the second waveform data; and The time lapse of the voltage value of the third voltage signal indicated by the first waveform data previously acquired by the waveform acquisition unit when the output unit is outputting the first sample signal and the second sample signal Is used as the first reference change pattern, and the voltage value of the fourth voltage signal indicated by the second waveform data is changed. The change pattern with the passage of time as a second reference change pattern, the second signal obtained by the waveform obtaining unit in a state where the sample signal output unit is outputting the first sample signal and the second sample signal. A change pattern of the voltage value of the third voltage signal indicated by one waveform data with the passage of time is compared with the first reference change pattern, and is indicated by the second waveform data acquired by the waveform acquisition unit. The change pattern of the voltage value of the fourth voltage signal with time is compared with the second reference change pattern, and the change pattern of the third voltage signal matches the first reference change pattern. And when the change pattern of the fourth voltage signal coincides with the second reference change pattern, A normal state, and at least one of the change pattern for the third voltage signal and the change pattern for the fourth voltage signal is a corresponding one of the first reference change pattern and the second reference change pattern. A processing unit that executes a self-diagnosis process of the signal generation device that determines that the signal generation device is in a failure state when the signal generation device does not match the reference change pattern.

  According to a fourth aspect of the present invention, in the signal generation device according to any one of the first to third aspects, a first conductor line connecting the one electrode and the first impedance element and the one conductor line are provided. A first auxiliary conductor capacitively coupled to one of the electrodes; a second conductor line connecting the other electrode to the second impedance element; and a second auxiliary conductor capacitively coupled to one of the other electrodes And the sample signal output unit generates the first test signal in the first impedance element by outputting the first sample signal to the first auxiliary conductor, and outputs the second sample signal to the first impedance element. The second test signal is generated in the second impedance element by outputting to the second auxiliary conductor.

  According to a fifth aspect of the present invention, in the signal generating apparatus according to the fourth aspect, the first impedance element, the second impedance element, and the differential amplifier are mounted on a circuit board, and are mounted on the circuit board. Forms a first conductor pattern that is connected to the first impedance element and forms a part of the first conductor line, and is connected to the second impedance element to form a part of the second conductor line. A second conductor pattern to be formed is formed, the first auxiliary conductor is a first auxiliary conductor pattern formed on the circuit board and capacitively coupled to the first conductor pattern, and the second auxiliary conductor is formed by the circuit A second auxiliary conductor pattern formed on the substrate and capacitively coupled to the second conductor pattern.

  According to a sixth aspect of the present invention, in the signal generating apparatus of the fourth aspect, the first auxiliary conductor is configured to be able to attach the one probe, and the first auxiliary conductor is attached to the one probe. And the second auxiliary conductor is configured to be capable of attaching the other probe, and is capacitively coupled to the other electrode in a state where the other probe is attached.

  According to a seventh aspect of the present invention, in the signal generating apparatus according to the fifth aspect, the sample signal output unit is configured to output the first auxiliary conductor when the first sample signal and the second sample signal are not output. And outputting a signal having the same potential as the reference potential to the second auxiliary conductor.

  The signal generator according to claim 8 is connected to a pair of covered conductors forming a communication path through which a two-wire differential voltage type logic signal is transmitted, and to one of the covered conductors of the pair of covered conductors. A first current detection probe to be connected, and a second current detection probe connected to the other of the pair of covered conductors, and a voltage signal output from the first current detection probe. And a first voltage signal whose voltage value changes according to a current value of a current flowing through the one coated conductor due to a voltage transmitted to the one coated conductor, and from the second current detection probe. A voltage signal to be output, the second voltage signal having a voltage value that changes according to a current value of a current flowing through the other coated conductor due to a voltage transmitted to the other coated conductor is input. Along with A differential amplifying unit that outputs a differential signal whose voltage changes according to a differential voltage between the first voltage signal and the second voltage signal; and a code specifying signal that can specify a code corresponding to the logic signal. A signal generation device that generates a signal based on the difference signal, wherein a first sample signal for inputting a first test signal to the differential amplifier instead of the first voltage signal, and Alternatively, a sample signal output unit that outputs a second sample signal for inputting a second test signal to the differential amplifier unit, and the sample signal output unit outputs the first sample signal and the second sample signal A waveform acquisition unit that acquires waveform data for the code identification signal generated in a state where the signal generation device is in a normal state, and the sample signal output unit is in the normal state. When the one sample signal and the second sample signal are being output, a change pattern of the voltage value of the code specifying signal indicated by the waveform data acquired in advance by the waveform acquisition unit over time is used as a reference change. As a pattern, the voltage value of the code specifying signal indicated by the waveform data acquired by the waveform acquisition unit when the sample signal output unit is outputting the first sample signal and the second sample signal. By comparing the change pattern with the lapse of time and the reference change pattern, the signal generator is in a normal state when the change pattern matches the reference change pattern, and in a failure state when the change pattern does not match. And a processing unit that executes a self-diagnosis process of the signal generation device that determines that there is a signal.

  According to a ninth aspect of the present invention, in the signal generation device, a pair of covered conductors constituting a communication path through which a two-wire differential voltage type logic signal is transmitted is connected to one of the covered conductors. A first current detection probe to be connected, and a second current detection probe connected to the other of the pair of covered conductors, and a voltage signal output from the first current detection probe. And a first voltage signal whose voltage value changes according to a current value of a current flowing through the one coated conductor due to a voltage transmitted to the one coated conductor, and from the second current detection probe. A voltage signal to be output, the second voltage signal having a voltage value that changes according to a current value of a current flowing through the other coated conductor due to a voltage transmitted to the other coated conductor is input. Along with A differential amplifying unit that outputs a differential signal whose voltage changes according to a differential voltage between the first voltage signal and the second voltage signal; and a code specifying signal that can specify a code corresponding to the logic signal. A signal generation device that generates a signal based on the difference signal, wherein a first sample signal for inputting a first test signal to the differential amplifier instead of the first voltage signal, and Alternatively, a sample signal output unit that outputs a second sample signal for inputting a second test signal to the differential amplifier unit, and the sample signal output unit outputs the first sample signal and the second sample signal A waveform acquisition unit that acquires waveform data of the differential signal output from the differential amplifier unit when the signal generation device is in a normal state and the sample signal A change pattern of the voltage value of the difference signal indicated by the waveform data acquired in advance by the waveform acquisition unit with time when the output unit is outputting the first sample signal and the second sample signal. The voltage value of the difference signal indicated by the waveform data acquired by the waveform acquisition unit when the sample signal output unit is outputting the first sample signal and the second sample signal, with Is compared with the reference change pattern, and when the change pattern matches the reference change pattern, the signal generator is in a normal state; when the change pattern does not match, a failure state is detected. And a processing unit that executes a self-diagnosis process of the signal generation device that determines that

  According to a tenth aspect of the present invention, in the signal generation device, a pair of covered conductors forming a communication path through which a two-wire differential voltage type logic signal is transmitted is connected to one of the covered conductors. A first current detection probe to be connected, and a second current detection probe connected to the other of the pair of covered conductors, and a voltage signal output from the first current detection probe. And a first voltage signal whose voltage value changes according to a current value of a current flowing through the one coated conductor due to a voltage transmitted to the one coated conductor, and from the second current detection probe. A voltage signal to be output, the second voltage signal having a voltage value that changes according to a current value of a current flowing through the other coated conductor due to a voltage transmitted to the other coated conductor is input. With A differential amplifier that outputs a differential signal whose voltage changes according to a differential voltage between the first voltage signal and the second voltage signal, and outputs a code specifying signal that can specify a code corresponding to the logic signal; A signal generating device that generates the signal based on the difference signal, wherein the differential amplifier receives the first voltage signal, amplifies the signal, and outputs the amplified signal as a third voltage signal; A second amplifier circuit that receives and amplifies the signal and outputs the amplified signal as a fourth voltage signal; and a differential amplifier circuit that receives the third voltage signal and the fourth voltage signal and outputs the difference signal, A first sample signal for inputting a first test signal to the differential amplifier in place of the first voltage signal, and a second test signal for inputting a second test signal in place of the second voltage signal to the differential amplifier. Second Sun A sample signal output unit that outputs a first signal and a waveform signal of the third voltage signal in a state where the sample signal output unit is outputting the first sample signal and the second sample signal. Acquiring the waveform data of the fourth voltage signal as the second waveform data, and acquiring the first sample signal and the sample signal when the signal generator is in a normal state. When the second sample signal is being output, the change pattern of the voltage value of the third voltage signal indicated by the first waveform data acquired in advance by the waveform acquisition unit over time is represented by a first reference change. A change pattern of the voltage value of the fourth voltage signal indicated by the second waveform data with the passage of time as a second reference. As a change pattern, the third voltage signal indicated by the first waveform data acquired by the waveform acquisition unit in a state where the sample signal output unit is outputting the first sample signal and the second sample signal. A change pattern of the voltage value over time and the first reference change pattern are compared with each other, and the time of the voltage value of the fourth voltage signal indicated by the second waveform data acquired by the waveform acquisition section is compared. By comparing a change pattern with the passage of time and the second reference change pattern, the change pattern of the third voltage signal matches the first reference change pattern, and the change of the fourth voltage signal is changed. When the pattern matches the second reference change pattern, the signal generator is in a normal state, and the third voltage signal is not detected. A failure state when at least one of the change pattern of the first voltage change signal and the corresponding change pattern of the fourth voltage signal does not match the corresponding one of the first reference change pattern and the second reference change pattern. And a processing unit that executes a self-diagnosis process of the signal generation device that determines that

  The signal generating device according to claim 11 is the signal generating device according to any one of claims 1 to 10, further comprising an output unit, wherein the processing unit is in the normal state or the failure state. Is displayed on the output unit.

  According to the signal generation device of the first, second, third, eighth, ninth, and tenth aspects, the user is provided with the sample signal output unit and the waveform acquisition unit, and the processing unit executes the self-diagnosis processing. In addition, it is possible to easily know whether or not a failure has occurred in the signal generation device based on the determination result in the self-diagnosis processing. Therefore, according to this signal generation device, it is possible to prevent the occurrence of a situation in which an incorrect code identification signal is output to the outside when used in a state where a failure has occurred.

  According to the signal generation device of the first and eighth aspects, a failure occurs by comparing the change pattern of the code specifying signal indicated by the waveform data acquired by the waveform acquisition unit with the corresponding reference change pattern. Because of the configuration for determining whether or not there is a failure, at least one of the circuit element from the connection portion of each probe to the differential amplifier, the differential amplifier, and the signal generator in the signal generator has a failure. (In other words, no failure has occurred in any of the circuit elements from the connection portion of each probe in the signal generation device to the differential amplifying unit, and none of the differential amplifying unit and the signal generating unit). It can be determined that the generating device is in the normal state.

  According to the signal generation device of the second and ninth aspects, a change pattern of the difference signal indicated by the waveform data acquired by the waveform acquisition unit is compared with a corresponding reference change pattern to determine whether a failure has occurred. Because of the configuration for determining whether or not a failure has occurred in at least one of the circuit elements from the connection portion of each probe to the differential amplifier in the signal generator and at least one of the differential amplifiers, Can be determined. Therefore, it is possible to avoid using the signal generating device in a state where a failure occurs in the circuit element from the connection portion of each probe to the differential amplifier in the signal generating device and the differential amplifier. .

  According to the signal generation device of the third and tenth aspects, each of the change patterns of the third voltage signal and the fourth voltage signal indicated by the waveform data acquired by the waveform acquisition unit and the reference change pattern corresponding to each of the change patterns. And a circuit element from the connection portion of each probe to the differential amplifier in the signal generator, a first amplifier circuit of the differential amplifier, Also, it can be determined whether or not at least one of the second amplifier circuits of the differential amplifier has a failure. Therefore, it is possible to prevent the signal generating device from being used in a state where the circuit elements from the connection portion of each probe in the signal generating device to the differential amplifier, the first amplifier circuit, and the second amplifier circuit have a failure. can do.

  According to the signal generating device of the fourth aspect, since the first test signal and the second test signal are generated by capacitive coupling to the first conductor line and the second conductor line, each test signal is generated. Can be avoided from being directly connected to the first conductor line and the second conductor line, and it is possible to prevent a situation where the direct connection of the conductor pattern adversely affects the generation of the code specifying signal. it can.

  According to the signal generation device of the fifth aspect, it is possible to perform a self-diagnosis without connecting a pair of probes.

  Further, according to the signal generation device of the sixth aspect, it is possible to execute a failure diagnosis including a failure occurring in a pair of connected probes.

  According to the signal generating device of the present invention, a portion of the first conductor line that is capacitively coupled to the first auxiliary conductor pattern can be guarded by the first auxiliary conductor pattern of the reference potential and the second conductor line. Can be guarded by the second auxiliary conductor pattern of the reference potential.

  Further, according to the signal generation device of the present invention, the processing unit causes the output unit to display the determination result (whether or not a failure has occurred) in the self-diagnosis process, so that the signal generation device has a failure. Can be surely known to the user.

FIG. 2 is a configuration diagram illustrating a configuration of a signal generation device 1A. It is a waveform diagram of code | symbol Cs, voltage Va, Vb, voltage signal Vc1, Vc2, Vc3, Vc4, difference signal Vd, and code identification signal Sf. FIG. 4 is an enlarged perspective view of a main part of a circuit board CB for describing a configuration of a first auxiliary conductor pattern CP3 as a first auxiliary conductor and a second auxiliary conductor pattern CP4 as a second auxiliary conductor. When the first sample signal Vsp1 and the second sample signal Vsp2 are output in a first change pattern (out-of-phase), each sample signal Vsp1, Vsp2, each test signal Vts1, Vts2, each voltage signal Vc3, Vc4, and the difference signal Vd. , And a waveform diagram of the code specifying signal Sf. FIG. 7 is a waveform diagram of each sample signal Vsp1, Vsp2, each test signal Vts1, Vts2, and each voltage signal Vc3, Vc4 when the first sample signal Vsp1 and the second sample signal Vsp2 are output in a second change pattern (in-phase). is there. FIG. 2 is a configuration diagram illustrating a configuration of a signal generation device 1B. FIG. 9 is a configuration diagram for explaining another configuration of probes PLa and PLb that connect the signal generation devices 1A and 1B to covered conductors La and Lb. FIG. 9 is a configuration diagram for explaining another configuration of probes PLa and PLb that connect the signal generation devices 1A and 1B to covered conductors La and Lb. FIG. 3 is a configuration diagram showing a configuration of a signal generation device 1C connected to covered conductors La and Lb via current detection probes PLc and PLd. FIG. 9 is a configuration diagram illustrating a configuration of a conventional signal generation device 101.

  Hereinafter, an embodiment of a signal generation device will be described with reference to the accompanying drawings.

  This signal generation device generates a signal based on a two-wire differential voltage type logic signal transmitted through a communication path (serial bus) including a pair of signal lines (for example, a pair of covered conductors). A code specifying signal capable of specifying a corresponding code is generated. In addition, this signal generation device converts various 2-wire differential signals based on various communication protocols such as “CAN protocol”, “CAN FD”, and “FlexRay (registered trademark)” as a 2-wire differential voltage type logic signal. Dynamic voltage type logic signals "and various" two-wire differential voltage type logic signals "conforming to various communication protocols capable of low-amplitude, low-power-consumption communication by" LVDS "can be targeted. In this case, in the “CAN communication serial bus” of “CAN protocol” and “CAN FD”, the “high-potential-side signal line (CANH) / low-potential-side signal line (CANL)” transmits “logic signal”. In the “Serial bus for FlexRay communication”, the “positive signal line (BP) / negative signal line (BM)” is “a pair of coated conductors for transmitting a logic signal”. In the "serial bus for LVDS communication", the "positive logic side signal line / negative logic side signal line" corresponds to "a pair of covered conductors for transmitting a logic signal". Further, since the signal generating device has a function of generating a code specifying signal for specifying a code corresponding to the logic signal, an analyzer for detecting the logic signal transmitted to the communication path is provided. It can also function as a part, and also function as a part of a recording device (recorder) that stores a detected code string in a memory.

  Hereinafter, as an example, a two-wire differential voltage type logic transmitted to a CAN communication serial bus (CAN communication path; hereinafter, also simply referred to as a communication path) will be described with respect to a “CAN communication serial bus”. A signal generation device that detects a signal and generates a code specifying signal capable of specifying a code corresponding to the logic signal will be described as an example. As a serial bus for CAN communication, a serial bus for connecting a plurality of nodes (electronic control unit: ECU) provided in an automobile and a serial bus for connecting a plurality of devices provided in a factory are available. However, the signal generation device of the present embodiment can be applied to any serial bus.

  The signal generation device 1A shown in FIG. 1 is an example of a “signal generation device”, and includes input terminals 2 and 3, a first impedance element 4, a second impedance element 5, a differential amplifier 6, a signal generator 7, It comprises a sample signal output unit 8, a waveform acquisition unit 9, an operation unit 10, a processing unit 11, an output terminal 12, and an output unit 13. The input terminals 2 and 3, the operation unit 10, the output terminal 12 and the output unit 13 are provided on the surface of a housing (case) HU of the signal generation device 1A so that a user of the signal generation device 1A can operate or visually recognize the user. On the other hand, the first impedance element 4, the second impedance element 5, the differential amplification unit 6, the signal generation unit 7, the sample signal output unit 8, the waveform acquisition unit 9, and the processing unit 11 are provided inside the housing HU. It is arranged in.

  The signal generating device 1A is configured to transmit one of the logic signals Sa (CANHHigh (CANH)) transmitted through a pair of covered conductors La and Lb constituting a serial bus SB for CAN communication provided in an automobile. The voltage Va of the voltage signal transmitted to La (hereinafter, this voltage signal itself is also referred to as a voltage signal Va for easy understanding) and the voltage Vb of the voltage signal transmitted to the other covered conductor Lb of CANLow (CANL). (Hereinafter, for ease of understanding, the voltage signal itself is also referred to as a voltage signal Vb), and a code corresponding to the logic signal Sa (for example, logic When the signal Sa is a signal conforming to the CAN protocol, a code specifying signal Sf capable of specifying a CAN frame (code sequence) is generated and output. .

  The code specifying signal Sf is output to, for example, a code specifying device (not shown) provided separately from the signal generating device 1A, and the code specifying device outputs a serial bus signal based on the code specifying signal Sf. Each code constituting the CAN frame transmitted to the SB is specified, and a code sequence (a code sequence corresponding to a logic signal) composed of this code sequence is output to various CAN communication compatible devices.

  Since the transmission principle of the logic signal Sa via the serial bus SB is publicly known, a detailed description is omitted. Will be described. As shown in FIG. 2, the voltage signals Va and Vb are voltage signals that change in the opposite direction from the base voltage (+2.5 V). When the voltage signal Va is the base voltage, the voltage signal Vb is also changed. The code Cs (logical value) constituting the CAN frame transmitted during this period in which the voltage of the same base becomes the same for the same period and the potential difference (Va−Vb) becomes zero (minimum) indicates “1”. Become. On the other hand, when the voltage signal Va is a specified voltage (+3.5 V) higher than the base voltage, the voltage signal Vb is conversely over the same period and the other specified voltage (+1) lower than the base voltage. .5 V), the code Cs (logical value) constituting the CAN frame transmitted during this period in which the potential difference (Va−Vb) is the maximum indicates “0”. Further, illustration and description of “SG”, which is a signal line serving as a reference potential for transmitting a differential signal on the serial bus SB, and a signal line and a power line provided for purposes other than transmission of the differential signal Is omitted.

  The configuration of the signal generation device 1A will be specifically described.

  A base end of one probe PLa (hereinafter, also referred to as a first probe PLa) of a pair of probes PLa and PLb is connected to the input terminal 2 (fixed or detachably connected), and an input terminal is provided. A base end of the other probe PLb (hereinafter, also referred to as a second probe PLb) is connected to 3 (fixed or detachably connected).

  In this case, the first probe PLa is configured using a shielded cable (for example, a coaxial cable), and is detachably attached (connected) to one of the corresponding covered conductors La (free end). ) Is provided with an electrode portion 21a. In this example, the first probe PLa is configured as a metal non-contact probe. For this reason, the electrode portion 21a contacts (contacts) an insulating coating portion (hereinafter, also simply referred to as a “coating portion”) of the coated conductive wire La (not shown) in a state where the electrode portion 21a is attached to the coated conductive wire La. An electrode (one electrode) 22a capacitively coupled to a metal portion (core wire) not shown of La and a contact portion of the covered portion of the covered conductive wire La with the electrode 22a are covered with the electrode 22a so that the other portion of the electrode 22a is covered. And a shield 23a for preventing capacitive coupling with the metal part (a metal part other than the core wire of the covered conductor La). Further, the electrode 22a is connected to the first impedance element 4 via the core wire of the shielded cable constituting the first probe PLa and the input terminal 2. The shield 23a is connected to a portion (ground G) of the reference potential in the signal generator 1A via the shield of the shielded cable and the input terminal 2.

  In addition, the above-mentioned core wire of the shield cable constituting the first probe PLa is a conductor line connecting the input terminal 2 to which the base end of the first probe PLa is connected and the first impedance element 4 (as described later, The first impedance element 4 is formed on a circuit board, and a conductor line partially including the first conductor pattern CP1 connected to one end of the first impedance element 4). The first conductor line CDL1 connecting the element 4 is formed.

  The second probe PLb is configured using a shielded cable (for example, a coaxial cable), and has an electrode at a distal end (free end) that is detachably attached to (connected to) the other corresponding coated conductor Lb. A portion 21b is provided. In this example, like the first probe PLa, the second probe PLb is configured as a metal non-contact probe. For this reason, the electrode portion 21b contacts (contacts) an unillustrated insulating coating portion (hereinafter, also simply referred to as a “coating portion”) of the coated conductive wire Lb in a state where the electrode portion 21b is attached to the coated conductive wire Lb, and The electrode 22b capacitively coupled to a metal part (core wire) not shown of Lb and the contact area of the electrode 22b in the covering part of the covering conductor Lb are covered including this electrode 22b, so that the other metal part of the electrode 22b (the covering part) A shield 23b for preventing capacitive coupling with the conductive wire Lb (a metal portion other than the core wire). Further, the electrode 22b is connected to the second impedance element 5 via the core wire of the shielded cable constituting the second probe PLb and the input terminal 3. The shield 23b is connected to the ground G via the shield of the shield cable and the input terminal 3.

  In addition, the above-mentioned core wire of the shielded cable constituting the second probe PLb is a conductor line between the input terminal 3 to which the base end of the second probe PLb is connected and the second impedance element 5 (as described later, A conductor line partially formed on the circuit board on which the second impedance element 5 is mounted and connected to one end of the second impedance element 5 and including the second conductor pattern CP2), and the other electrode 22b and the second impedance. The second conductor line CDL2 connecting the element 5 is formed.

  The first impedance element 4 includes a resistor 31a (a resistor having a high resistance value (a high impedance resistor of at least about several MΩ)) and a capacitor 32a connected in parallel to the resistor 31a. The first impedance element 4 has one end (one end of the resistor 31a) connected to the core wire of the shielded cable constituting the first probe PLa via the input terminal 2, and the other end (the other end of the resistor 31a) connected to the ground G. It is connected. With this configuration, the first impedance element 4 generates the first voltage signal Vc1 whose voltage changes in accordance with the voltage Va of the voltage signal Va transmitted to the one covered conductor La capacitively coupled to the electrode 22a of the electrode portion 21a. , Generated between both ends. In this case, when the first probe PLa is connected to the covered conductor La, the first impedance element 4 has a low voltage when the voltage Va is the base voltage, and has a high voltage when the voltage Va is the specified voltage of the high voltage. A first voltage signal Vc1 that changes to a voltage is generated.

  The second impedance element 5 includes a resistor 31b (a resistor having the same resistance value as the resistor 31a (high impedance resistor)) and a capacitor 32b (a capacitor having the same capacitance value as the capacitor 32a) connected in parallel to the resistor 31b. ing. The second impedance element 5 has one end (one end of the resistor 31b) connected to the core wire of the shielded cable constituting the second probe PLb via the input terminal 3, and the other end (the other end of the resistor 31b) connected to the ground G. It is connected. With this configuration, the second impedance element 5 generates the second voltage signal Vc2 whose voltage changes according to the voltage Vb of the voltage signal Vb transmitted to the other coated conductive wire Lb capacitively coupled to the electrode 22b of the electrode portion 21b. , Generated between both ends. In this case, when the second probe PLb is connected to the covered conductor Lb, the second impedance element 5 becomes high when the voltage Vb is the base voltage, and becomes low when the voltage Vb is the specified low voltage. A second voltage signal Vc2 that changes to a voltage is generated. In addition, since both the first voltage signal Vc1 and the second voltage signal Vc2 are signals detected by capacitive coupling, changes in the voltage signals Va and Vb (changes in the pulse lengths of the voltage signals Va and Vb and changes in , The DC level (DC component) changes in accordance with the change in the pulse density).

  The impedance elements 4 and 5 are not limited to the above configuration (a parallel circuit of the resistor 31a and the capacitor 32a, and a parallel circuit of the resistor 31b and the capacitor 32b). For example, a circuit having only the resistors 31a and 31b or a circuit having only the capacitors 32a and 32b may be used. Further, the capacitors 32a and 32b can be composed of discrete components, or the wiring capacitance (between the core and the shield) of the shielded cable constituting the probes PLa and PLb connected via the input terminals 2 and 3. (Capacity formed).

  The differential amplifier 6 receives the first voltage signal Vc1 and the second voltage signal Vc2, and outputs a difference signal Vd whose voltage changes according to a difference voltage (Vc2−Vc1) between the voltage signals Vc1 and Vc2.

  Specifically, the differential amplifier 6 includes, for example, a first amplifier circuit 41, a second amplifier circuit 42, and a differential amplifier circuit 43. The first amplifying circuit 41 includes an operational amplifier 41a operating at a positive power supply voltage and a negative power supply voltage (for example, ± 10 V) (not shown), a resistor 41b connected between an output terminal and an inverting input terminal of the operational amplifier 41a, A resistor 41c and a capacitor 41d are connected in series between the inverting input terminal of the operational amplifier 41a and the ground G, and are configured as a non-inverting AC amplifier circuit. The non-inverting input terminal of the operational amplifier 41a is connected to one end of the first impedance element 4. With this configuration, the first amplifier circuit 41 receives the first voltage signal Vc1 and amplifies the AC component of the first voltage signal Vc1 with an amplification factor defined by the resistance values of the resistors 41b and 41c. It is output as a three voltage signal Vc3.

  The second amplifier circuit 42 includes an operational amplifier 42a operating at the above-described positive power supply voltage and negative power supply voltage, and a resistor 42b (having the same resistance value as the resistor 41b) connected between the output terminal and the inverting input terminal of the operational amplifier 42a. A resistor 42c (a resistor having the same resistance value as the resistor 41c) and a capacitor 42d (a resistor having the same capacitance value as the capacitor 41d) disposed in series between the inverting input terminal of the operational amplifier 42a and the ground G. And a non-inverting type AC amplifier circuit. The non-inverting input terminal of the operational amplifier 42a is connected to one end of the second impedance element 5. With this configuration, the second amplifier circuit 42 receives the second voltage signal Vc2 and converts the AC component of the second voltage signal Vc2 into an amplification factor (the first amplifier circuit) defined by the resistance values of the resistors 42b and 42c. (The same amplification factor as 41) and outputs it as a fourth voltage signal Vc4.

  Note that the first amplifier circuit 41 and the second amplifier circuit 42 are not limited to the above configuration. For example, instead of the series circuit of the resistor 41c and the capacitor 41d, only the resistor 41c is provided between the inverting input terminal of the operational amplifier 41a and the ground G, and the operation is performed in place of the series circuit of the resistor 42c and the capacitor 42d. Various configurations such as a configuration in which only the resistor 42c is disposed between the inverting input terminal of the amplifier 42a and the ground G (a configuration in which the amplifier circuits 41 and 42 are non-inverting DC amplifier circuits) may be employed. A circuit configuration can also be employed.

  The differential amplifier circuit 43 includes an operational amplifier 43a operating at the positive power supply voltage and the negative power supply voltage, a resistor 43b having one end connected to the inverting input terminal of the operational amplifier 43a, and one end connected to the non-inverting input terminal of the operational amplifier 43a. The connected resistor 43c (the resistor having the same resistance value as the resistor 43b), the resistor 43d connected between the output terminal and the inverting input terminal of the operational amplifier 43a, and the non-inverting input terminal of the operational amplifier 43a and the ground G It is provided with a resistor 43e (a resistor having the same resistance value as the resistor 43d) connected therebetween. The other end of the resistor 43b is connected to the output terminal of the first amplifier circuit 41 (the output terminal of the operational amplifier 41a), and the other end of the resistor 43c is connected to the output terminal of the second amplifier circuit 42 (the output terminal of the operational amplifier 42a). Terminal). With this configuration, the differential amplifier circuit 43 receives the third voltage signal Vc3 and the fourth voltage signal Vc4, and converts the difference voltage (Vc4−Vc3) between the two signals Vc3 and Vc4 with the respective resistance values of the resistors 43b and 43d. By amplifying at a specified amplification rate, a difference signal Vd whose voltage value (amplitude) changes according to the difference voltage (Vc4−Vc3) is output. Further, as described above, the third voltage signal Vc3 is a signal obtained by non-inverting amplification of the first voltage signal Vc1, and the fourth voltage signal Vc4 is a signal obtained by non-inverting amplification of the second voltage signal Vc2. The difference signal Vd is also a signal whose voltage changes according to the difference voltage (Vc2−Vc1) between the voltages Vc1 and Vc2 of the first voltage signal Vc1 and the second voltage signal Vc2.

  The signal generation unit 7 includes, for example, a comparator (not shown), and the comparator converts the difference signal Vd to a threshold voltage (a voltage having a predetermined fixed voltage value. In this example, a voltage having the same potential as the ground G). By performing binarization in comparison with, a code specifying signal Sf is generated and output to the output terminal 12.

  In this case, the signal generation unit 7 is configured such that the first probe PLa is connected to the corresponding covered conductor La, the second probe PLb is connected to the corresponding covered conductor Lb, and each of the probes PLa and PLb is normal. Further, when the signal generating device 1A is in a normal state (that is, each of the impedance elements 4 and 5, the differential amplifying unit 6 (the respective amplifying circuits 41 and 42 and the differential amplifying circuit 43), and the signal generating unit 7 itself). In other words, when the signal generation device 1A is in a normal state in which the operation in the normal operation mode described later can be executed without any trouble, the correct code specifying signal Sf, that is, as shown in FIG. During the period when the code Cs (“1”) constituting the CAN frame (code sequence) is transmitted to the SB, the voltage becomes a known high potential side voltage (recessive), and the code Cs (“ ") Generates and outputs a code specifying signal Sf which is a known low-potential-side voltage (dominant) in the period being transmitted.

  The sample signal output unit 8 is controlled by the processing unit 11 so that the first sample signal Vsp1 for generating the first test signal Vts1 in the first impedance element 4 instead of the first voltage signal Vc1, and the second sample signal Vsp1. The second sample signal Vsp2 for generating the second test signal Vts2 in the second impedance element 5 instead of the voltage signal Vc2 is output.

  Specifically, in the signal generation device 1A, the first impedance element 4, the second impedance element 5, the differential amplifier 6, the signal generator 7, the sample signal output unit 8, the waveform acquisition unit 9, and the processing unit 11 Is mounted on a circuit board. In addition, a plurality of conductor patterns that connect electronic components constituting each component such as the first impedance element 4 are formed on the circuit board. As shown in FIG. 3, on one surface CBa of the circuit board CB, a first conductor pattern CP1 connected to one end of the first impedance element 4 is formed as one of the plurality of conductor patterns. In addition, a second conductor pattern CP2 connected to one end of the second impedance element 5 is formed as another one of the plurality of conductor patterns. The first conductor pattern CP1 forms a part of a conductor line connecting the input terminal 2 to which the base end of the first probe PLa is connected and the first impedance element 4. Further, the second conductor pattern CP2 forms a part of a conductor line connecting the input terminal 3 to which the base end of the second probe PLb is connected and the second impedance element 5.

  Further, as shown in FIG. 3, on the back surface of one surface CBa of the circuit board CB (the other surface of the circuit board CB) CBb, a first auxiliary conductor as a first auxiliary conductor facing the first conductor pattern CP1 is provided. The auxiliary conductor pattern CP3 (see also FIG. 1) is formed in a rectangular shape in plan view, and the second auxiliary conductor pattern CP4 as the second auxiliary conductor is opposed to the second conductor pattern CP2 in a rectangular shape in plan view (for example, (The same shape as one auxiliary conductor pattern CP3). In this case, since the circuit board CB is made of an insulating material having a uniform thickness, the first conductor pattern CP1 and the first auxiliary conductor pattern CP3, and the second conductor pattern CP2 and the second auxiliary conductor pattern CP4 are They are parallel to each other, and are opposed to each other with a distance corresponding to the thickness of the circuit board CB. With this configuration, the first auxiliary conductor pattern CP3 is capacitively coupled to the first conductor pattern CP1, and the second auxiliary conductor pattern CP4 is capacitively coupled to the second conductor pattern CP2.

  Further, in this example, as shown in FIG. 3, the portion of the first conductor pattern CP1 facing the first auxiliary conductor pattern CP3 is formed in the same shape (rectangle) as the planar shape of the first auxiliary conductor pattern CP3. At the same time, the portion of the second conductor pattern CP2 facing the second auxiliary conductor pattern CP4 is formed in the same shape (rectangle) as the planar shape of the second auxiliary conductor pattern CP4. With this configuration, a portion of the first conductor pattern CP1 facing the first auxiliary conductor pattern CP3 is formed wider than other portions of the first conductor pattern CP1, and a second auxiliary pattern of the second conductor pattern CP2 is formed. Since the portion facing the conductor pattern CP4 is formed wider than other portions of the second conductor pattern CP2, the degree of capacitive coupling is increased (a large coupling capacitance is secured). In this example, as an example, the area of the region where the first conductor pattern CP1 and the first auxiliary conductor pattern CP3 overlap each other when the circuit board CB is viewed in a plan view, the second conductor pattern CP2 and the second auxiliary conductor pattern CP4, Are configured to be equal in area of the region where the first conductive pattern CP1 and the first auxiliary conductive pattern CP3 are equal to each other, and the capacitance value of the coupling capacitance between the first conductive pattern CP1 and the first auxiliary conductive pattern CP3 and the second conductive pattern CP2 and the second auxiliary The capacitance value of the coupling capacitance with the conductor pattern CP4 is specified to be substantially the same.

  The planar shapes of the first auxiliary conductor pattern CP3 and the second auxiliary conductor pattern CP4 are not limited to the above-described rectangles, and are not shown, but may be various shapes such as a square, a circle, and an ellipse. it can. When the circuit board CB is a multilayer board, the first auxiliary conductor pattern CP3 is arranged close to the first conductor pattern CP1, and the second auxiliary conductor pattern CP4 is arranged close to the second conductor pattern CP2. Is preferred. For this reason, the first auxiliary conductor pattern CP3 is formed in a layer (layer or inner layer on the surface of the circuit board CB) adjacent to the layer on which the first conductor pattern CP1 is formed, and the second auxiliary conductor pattern CP4 is formed in the second conductor pattern CP4. It is preferably formed on a layer adjacent to the layer on which CP2 is formed (layer on the surface of the circuit board CB or an inner layer).

  In this signal generating device 1A, the sample signal output unit 8 outputs the first sample signal Vsp1 to the first auxiliary conductor pattern CP3 at a predetermined amplitude, so that the first auxiliary conductor pattern CP3 and the first conductor pattern CP1 are output. The first test signal Vts1 is generated in the first conductor pattern CP1 (that is, the first impedance element 4 connected to the first conductor pattern CP1) instead of the first voltage signal Vc1 via the coupling capacitance between the first test signal Vts1 and the first test signal Vts1. By outputting the second sample signal Vsp2 to the second auxiliary conductor pattern CP4 at a predetermined amplitude (the same amplitude as the first sample signal Vsp1), the second auxiliary conductor pattern CP4 and the second conductor pattern CP2 are connected to each other. The second test signal Vts2 is replaced by the second voltage signal Vc2 through the second conductor pattern CP2 (that is, the second conductor pattern) via the coupling capacitance between them. Generating a second impedance element 5) connected to the over emissions CP2. When the output of the first sample signal Vsp1 and the output of the second sample signal Vsp2 is stopped (non-output), the sample signal output unit 8 outputs the first auxiliary conductor pattern CP3 and the second auxiliary conductor pattern CP4. On the other hand, a signal having the same potential as the ground G is output.

  The waveform acquisition unit 9 is configured to include an A / D converter and the like, and converts an input analog signal into waveform data Dv indicating an instantaneous value of the analog signal by sampling the analog signal at a specified sampling cycle. Further, the waveform acquisition unit 9 outputs the waveform data Dv obtained (acquired) by this conversion to the processing unit 11. In this example, as an example, the waveform acquisition unit 9 includes the voltage signals Vc3 and Vc4 output from the amplification circuits 41 and 42 included in the differential amplification unit 6, the difference signal Vd output from the differential amplification unit 6, And the code specifying signal Sf output from the signal generator 7 is input as the analog signal, and the waveform data Dv1 and Dv2 for each of the voltage signals Vc3 and Vc4 (the first waveform data Dv1 for the third voltage signal Vc3) , The second waveform data Dv2) for the fourth voltage signal Vc4, the waveform data Dv3 for the difference signal Vd, and the waveform data Dv4 for the code specifying signal Sf, and output them to the processing unit 11.

  The operation unit 10 includes a switch for switching the operation mode of the signal generation device 1A to one of a normal operation mode and a self-diagnosis mode. The operation unit 10 outputs a mode signal Sm indicating the current operation mode switched by the switch to the processing unit 11.

  The processing unit 11 includes, for example, a CPU and a memory, and executes a normal process when the operation mode indicated by the mode signal Sm output from the operation unit 10 is the normal operation mode. When the operation mode is the self-diagnosis mode, the self-diagnosis process is executed using the waveform data Dv output from the waveform acquisition unit 9. The processing unit 11 also includes various prescribed change patterns (changes in voltage values over time) of the first sample signal Vsp1 and the second sample signal Vsp2 to be output from the sample signal output unit 8 in the self-diagnosis processing. The pattern data for (pattern) is stored in advance. Further, in the self-diagnosis processing executed by the signal generating device 1A in the above-described normal state, the processing unit 11 outputs a signal when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the prescribed change patterns. The time-dependent change pattern of the voltage value of the analog signal input to the waveform acquisition unit 9 is set as a reference change pattern, and the pattern data of the reference change pattern is the first sample signal Vsp1 and the second sample signal Vsp2. It is stored in advance corresponding to each defined change pattern.

  In the present example, as an example, as shown in FIG. 4, the processing unit 11 supplies the first sample signal Vsp <b> 1 and the second sample signal Vsp <b> 2 in a phase opposite to each other to a low voltage (for example, zero volt) period and a high voltage. A change pattern in which a period of a voltage (for example, a voltage substantially equal to the high potential of the voltage Va described above) is repeated is defined as one prescribed change pattern (also referred to as a first change pattern for description). As shown in FIG. 5, the pattern data of the change pattern is stored, and the first sample signal Vsp1 and the second sample signal Vsp2 are in phase with each other, and the period of the low voltage (for example, zero volt) and the high voltage (As an example, a change pattern in which the period of the voltage Va is equal to the high potential of the voltage Va) is repeated as another specified change pattern (description). Therefore, the second referred to as a change pattern), the pattern data for the second change patterns are stored.

  Further, in the signal generation device 1A of the present example, the processing unit 11 includes the waveform data Dv1 and Dv2 for the voltage signals Vc3 and Vc4 output from the waveform acquisition unit 9, the waveform data Dv3 for the difference signal Vd, and the code identification The self-diagnosis process is performed using the waveform data Dv4 for the use signal Sf.

  Therefore, the processing unit 11 supplies the third voltage signal Vc3 indicated by the waveform data Dv1 when the sample signal output unit 8 outputs the first sample signal Vsp1 and the second sample signal Vsp2 in the first change pattern. As a reference change pattern corresponding to the first change pattern of the third voltage signal Vc3 (also referred to as a first reference change pattern for the sake of explanation), the pattern data of the first reference change pattern is stored. At the same time, the change pattern for the fourth voltage signal Vc4 indicated by the waveform data Dv2 is defined as a reference change pattern corresponding to the first change pattern for the fourth voltage signal Vc4 (also referred to as a second reference change pattern for explanation). Pattern data for the second reference change pattern is stored. Further, when the sample signal output unit 8 outputs the first sample signal Vsp1 and the second sample signal Vsp2 in the first change pattern, the change pattern of the difference signal Vd indicated by the waveform data Dv3 is converted to the difference signal Vd. As a reference change pattern corresponding to the first change pattern (also referred to as a third reference change pattern for the sake of explanation), the pattern data of the third reference change pattern is stored, and a code identification code indicated by waveform data Dv4 is stored. The change pattern of the signal Sf is set as a reference change pattern (also referred to as a fourth reference change pattern for explanation) corresponding to the first change pattern of the code specifying signal Sf. It is remembered.

  In this case, in a state where the signal generating device 1A is in a normal state and each of the probes PLa and PLb is not attached to the corresponding covered conductor La or Lb, the processing unit 11 executes the self-diagnosis process and executes the sample signal. When the first sample signal Vsp1 and the second sample signal Vsp2 are output to the output unit 8 in the first change pattern with the same specified amplitude, the first sample signal is output to the first impedance element 4 as shown in FIG. A first test signal Vts1 in phase with Vsp1 is generated at a prescribed level, and a second test signal Vts2 in phase with second sample signal Vsp2 is supplied to second impedance element 5 at a prescribed level (a level equivalent to first test signal Vts1). ).

  As a result, in the differential amplifier 6 in the normal state, as shown in FIG. The third voltage signal Vc3 is output (in a change pattern exceeding the threshold voltage Vth1), the second amplifier circuit 42 amplifies the second test signal Vts2 normally, and the amplitude A2 is defined in advance with the specified amplitude A2. A fourth voltage signal Vc4 is output (in a change pattern exceeding the threshold voltage Vth2), and the differential amplifier circuit 43 receives the third voltage signal Vc3 and the fourth voltage signal Vc4 and outputs a difference voltage (Vc4−Vc3). By amplifying, the differential signal Vd is output at a specified amplitude A3 (in a change pattern in which the amplitude A3 exceeds a predetermined threshold voltage Vth3). In addition, the signal generator 7 in the normal state binarizes the differential signal Vd having the specified amplitude A3, so that the first sample signal Vsp1 has a low voltage and the second sample signal Vsp2 has, as shown in FIG. Is a known high potential side voltage during the high voltage period, the first sample signal Vsp1 is a high voltage, and the second sample signal Vsp2 is a known low potential side voltage during the low voltage period, in other words, When a threshold voltage Vth4 is previously defined between a known high potential side voltage and a known low potential side voltage, the voltage becomes higher than the threshold voltage Vth4 during the high voltage period, and becomes higher than the threshold voltage Vth4 during the low voltage period. The code specifying signal Sf is output in a change pattern having a voltage lower than the predetermined voltage.

  On the other hand, in a state in which each probe PLa, PLb is not attached to the corresponding covered conductor La, Lb, the processing unit 11 performs a self-diagnosis process, and performs the first change pattern on the sample signal output unit 8 in the first change pattern. Even if the sample signal Vsp1 and the second sample signal Vsp2 are output, when at least one of the first conductor pattern CP1, the first impedance element 4, and the first amplifier circuit 41 has failed (in a failure state). , The third voltage signal Vc3 is not output at a prescribed amplitude A1 (amplitude exceeding the threshold voltage Vth1), and at least one of the second conductor pattern CP2, the second impedance element 5, and the second amplifier circuit 42 has failed. In some cases, the fourth voltage signal Vc4 is not output at the prescribed amplitude A2 (amplitude exceeding the threshold voltage Vth2). If the third voltage signal Vc3 is not output at the specified amplitude A1 (amplitude exceeding the threshold voltage Vth1) or the fourth voltage signal Vc4 is not output at the specified amplitude A2 (amplitude exceeding the threshold voltage Vth2), the difference is determined. The signal Vd is also not output at the specified amplitude A3 (amplitude exceeding the threshold voltage Vth3).

  Also, regarding the difference signal Vd, even when the first impedance element 4, the first amplifier circuit 41, the second impedance element 5, and the second amplifier circuit 42 are normal, the differential amplifier circuit 43 is out of order. When at least one of the first impedance element 4, the first amplifier circuit 41, the second impedance element 5, the second amplifier circuit 42, and the differential amplifier circuit 43 has failed, the specified amplitude A3 (the threshold voltage Is not output at an amplitude exceeding Vth3). Regarding the code specifying signal Sf, even if the impedance elements 4 and 5 and the differential amplifier 6 (the amplifiers 41 and 42 and the differential amplifier 43) are normal, the signal generator 7 fails. And when at least one of the impedance elements 4 and 5, the differential amplifier 6 (each of the amplifier circuits 41 and 42 and the differential amplifier 43), and the signal generator 7 is out of order, During the period when the one sample signal Vsp1 is at a low voltage and the second sample signal Vsp2 is at a high voltage, the amplitude A4 does not exceed the threshold voltage Vth4, or when the first sample signal Vsp1 is at a high voltage and the second sample signal During the period when Vsp2 is at a low voltage, the amplitude A4 may not be lower than the threshold voltage Vth4.

  Therefore, the processing unit 11 provides the specified amplitude A1 as the pattern data of the first reference change pattern corresponding to the first change pattern of the third voltage signal Vc3 (the threshold voltage Vth1 having a predetermined amplitude is set to the threshold voltage Vth1). Pattern data is stored for the second change pattern corresponding to the first change pattern for the fourth voltage signal Vc4, and has a specified amplitude A2 (the amplitude is specified in advance). Pattern data of the third reference change pattern corresponding to the first change pattern of the difference signal Vd has a specified amplitude A3 (which exceeds the threshold voltage Vth2). Amplitude exceeds a predetermined threshold voltage Vth3). There pattern data of is stored. In addition, the processing unit 11 stores the first sample signal Vsp1 at a low voltage and the second sample signal Vsp2 as the pattern data of the fourth reference change pattern corresponding to the first change pattern of the code specifying signal Sf. A change pattern in which the amplitude exceeds the threshold voltage Vth4 during the high voltage period, and the amplitude falls below the threshold voltage Vth4 during the period when the first sample signal Vsp1 is at the high voltage and the second sample signal Vsp2 is at the low voltage Is stored.

  In addition, the processing unit 11 supplies the third voltage signal Vc3 indicated by the waveform data Dv1 when the sample signal output unit 8 outputs the first sample signal Vsp1 and the second sample signal Vsp2 in the second change pattern. The change pattern is stored as a reference change pattern corresponding to the second change pattern for the third voltage signal Vc3 (also referred to as a fifth reference change pattern for explanation), and the pattern data for the fifth reference change pattern is stored. The change pattern of the fourth voltage signal Vc4 indicated by the waveform data Dv2 is defined as a reference change pattern corresponding to the second change pattern of the fourth voltage signal Vc4 (also referred to as a sixth reference change pattern for explanation). Pattern data on the sixth reference change pattern is stored.

  In this signal generating device 1A, an operation in a state where two voltage signals (first voltage signal Vc1 and second voltage signal Vc2) generated in impedance elements 4 and 5 are in phase is not assumed. Therefore, even if the signal generator 1A is in a normal state or has failed, the sample signal output unit 8 outputs the first sample signal Vsp1 and the second sample signal Vsp2 in the second change pattern. In this case, the difference signal Vd is not always output at the specified amplitude A3 (amplitude exceeding the threshold voltage Vth3). Therefore, the change pattern of the code specifying signal Sf generated by the signal generation unit 7 based on the difference signal Vd is not determined. That is, the processing unit 11 outputs the difference signal Vd and the waveform data Dv4 indicated by the waveform data Dv3 when the sample signal output unit 8 outputs the first sample signal Vsp1 and the second sample signal Vsp2 in the second change pattern. Since the signal generation device 1A cannot determine whether the signal generation device 1A is in a normal state or a failure state, the reference signal corresponding to the second change pattern of the difference signal Vd and the code specification signal Sf can be determined from the reference signal Sf shown in FIG. No change pattern is stored.

  In this case, in a state where the signal generating device 1A is in a normal state and each of the probes PLa and PLb is not attached to the corresponding covered conductor La or Lb, the processing unit 11 executes the self-diagnosis process and executes the sample signal. When the first sample signal Vsp1 and the second sample signal Vsp2 are output to the output section 8 in the second change pattern, as shown in FIG. One test signal Vts1 is generated at a specified level, and a second test signal Vts2 having the same phase as the second sample signal Vsp2 is generated in the second impedance element 5 at a specified level.

  As a result, in the differential amplifier 6 in the normal state, as shown in FIG. 5, the first amplifying circuit 41 amplifies the first test signal Vts1 normally, and sets the amplitude to the specified amplitude A1 (the amplitude A1 is specified in advance). The third voltage signal Vc3 is output (in a change pattern exceeding the threshold voltage Vth1), the second amplifier circuit 42 amplifies the second test signal Vts2 normally, and the amplitude A2 is defined in advance with the specified amplitude A2. A fourth voltage signal Vc4 is output (in a change pattern exceeding the threshold voltage Vth2).

  On the other hand, in a state where the probes PLa and PLb are not attached to the corresponding covered conductors La and Lb, the processing unit 11 performs a self-diagnosis process, and performs the first change on the sample signal output unit 8 in the second change pattern. Even if the sample signal Vsp1 and the second sample signal Vsp2 are output, when at least one of the first conductor pattern CP1, the first impedance element 4, and the first amplifier circuit 41 has failed (in a failure state). , The third voltage signal Vc3 is not output at a prescribed amplitude A1 (amplitude exceeding the threshold voltage Vth1), and at least one of the second conductor pattern CP2, the second impedance element 5, and the second amplifier circuit 42 has failed. In some cases, the fourth voltage signal Vc4 is not output at the specified amplitude A2 (amplitude exceeding the threshold voltage Vth2).

  Therefore, the processing unit 11 provides the specified amplitude A1 as the pattern data of the fifth reference change pattern corresponding to the second change pattern of the third voltage signal Vc3 (the threshold voltage Vth1 having a predetermined amplitude is set to the threshold voltage Vth1). Pattern data of a change pattern of (exceeding) is stored, and becomes a specified amplitude A2 as the pattern data of a sixth reference change pattern corresponding to the second change pattern of the fourth voltage signal Vc4 (the amplitude is specified in advance). (Exceeding the threshold voltage Vth2).

  A connection cable (not shown) for connecting the signal generation device 1A to a code identification device (not shown) provided separately from the signal generation device 1A can be connected to the output terminal 12.

  The output unit 13 includes, for example, a display device such as a display device or a light-emitting diode, and displays (outputs) a self-diagnosis result output from the processing unit 11. With this configuration, the signal generation device 1A can notify the user whether the signal generation device 1A is in a normal state or a failure state. The output unit 13 is preferably provided integrally with the signal generation device 1A, but may be provided as a separate output device connected to the signal generation device 1A via a communication line. Good.

  Next, a usage example of the signal generation device 1A and an operation of the signal generation device 1A at that time will be described with reference to the drawings.

  First, as shown in FIG. 1, the user connects the first probe PLa to the covered conductor La to be connected, and connects the second probe PLb to the covered conductor Lb to be connected. When the operation of the switches of the unit 10 is performed and the operation unit 10 outputs the mode signal Sm indicating the normal operation mode, the processing unit 11 inputs the mode signal Sm and executes the normal processing. In the normal processing, the processing unit 11 stops the output of the first sample signal Vsp1 to the first auxiliary conductor pattern CP3 and the output of the second sample signal Vsp2 to the second auxiliary conductor pattern CP4, and A signal having the same potential as the ground G is output to the conductor pattern CP3 and the second auxiliary conductor pattern CP4.

  Thus, in this normal operation mode, the external noise is reduced from entering the portion of the first conductor pattern CP1 disposed in close proximity to the first auxiliary conductor pattern CP3 and having the same shape as the first auxiliary conductor pattern CP3. In addition, the voltage of the covered conductor La is reduced while reducing the external noise from jumping into a portion of the second conductor pattern CP2 disposed close to and opposed to the second auxiliary conductor pattern CP4 and having the same shape as the second auxiliary conductor pattern CP4. A first voltage signal Vc1 whose voltage changes according to Va is generated in the first impedance element 4, and a second voltage signal Vc2 whose voltage changes according to the voltage Vb of the covered conductor Lb is supplied to the second impedance element 5. It is possible to generate.

  In this state, when the signal generation device 1A is in a normal state, as described above, the first impedance element 4 is connected to the input terminal 2 and the coated probe La connected via the first probe PLa. The first voltage signal Vc1 changes as shown in FIG. 2 (that is, changes to a low voltage when the voltage Va is the base voltage, and changes to a high voltage when the voltage Va is the specified high voltage). Generate. Further, the voltage of the second impedance element 5 changes as shown in FIG. 2 according to the voltage Vb of the covered conductor Lb connected via the input terminal 3 and the second probe PLb (that is, the voltage Vb is based on the base voltage). A second voltage signal Vc2 that changes to a high voltage when the voltage is high and to be a low voltage when the voltage Vb is the specified low voltage.

  Next, in the differential amplifier 6, the first amplifier circuit 41 non-inverts and amplifies the first voltage signal Vc1 to output a third voltage signal Vc3, and the second amplifier circuit 42 non-inverts the second voltage signal Vc2. It inverts and amplifies and outputs the fourth voltage signal Vc4. Also, the differential amplifier circuit 43 amplifies the difference voltage (Vc4-Vc3) between the two signals Vc3 and Vc4, thereby generating the difference signal Vd whose voltage value (amplitude) changes according to the difference voltage (Vc4-Vc3). Output.

  Subsequently, the signal generation unit 7 compares the difference signal Vd with a threshold voltage and binarizes the difference signal Vd, thereby obtaining a correct code specifying signal Sf (a code Cs (a code constituting a CAN frame (code string) on the serial bus SB). A code specifying signal Sf) that becomes a high-potential-side voltage (recessive) during a period when “1”) is transmitted and a low-potential-side voltage (dominant) during a period when a code Cs (“0”) is transmitted. It is generated and output to the output terminal 12. Accordingly, a code identification device (not shown) connected to the signal generation device 1A via the connection cable connected to the output terminal 12 can receive and process the code identification signal Sf.

  In addition, the waveform acquisition unit 9 only needs to operate in at least the self-diagnosis mode of the normal operation mode and the self-diagnosis mode. In the present example, for example, in any one of the normal operation mode and the self-diagnosis mode, Is also operating. In the operation state, the waveform acquisition unit 9 includes the voltage signals Vc3 and Vc4 output from the amplification circuits 41 and 42 included in the differential amplification unit 6, the difference signal Vd output from the differential amplification unit 6, and the signal. The code specifying signal Sf output from the generating unit 7 is input, and the waveform data Dv1 and Dv2 for each of the voltage signals Vc3 and Vc4, the waveform data Dv3 for the difference signal Vd, and the waveform data for the code specifying signal Sf Dv4 is output to the processing unit 11.

  By the way, when the signal generating device 1A is in a normal state, as described above, a correct code specifying signal Sf can be generated and output from the output terminal 12 to an external device such as a code specifying device. Is not in a normal state, the signal becomes a high-potential-side voltage (recessive) in a certain period, and even if a signal that becomes a low-potential-side voltage (dominant) is output in a certain period, this signal is converted to the correct code specifying signal Sf. (That is, the signal generation device 1A may not be able to output the correct code specifying signal Sf to the external device).

  Therefore, the user causes the processing unit 11 of the signal generation device 1A to execute a self-diagnosis process before connecting the probes PLa and PLb to the corresponding covered conductors La and Lb, and the signal generation device 1A is in a normal state. Check whether there is any failure (whether there is no failure).

  In this case, the user operates the switches of the operation unit 10 in a state where the probes PLa and PLb are not connected to the corresponding covered conductors La and Lb, thereby indicating the operation unit 10 in the self-diagnosis mode. The mode signal Sm is output to the processing unit 11. The processing unit 11 receives the mode signal Sm indicating the self-diagnosis mode and executes a self-diagnosis process.

  In the self-diagnosis process, the processing unit 11 first performs the first change pattern (the change pattern of the opposite phase) based on the stored pattern data of the first change pattern (the change pattern shown in FIG. 4). The sample signal Vsp1 and the second sample signal Vsp2 are output from the sample signal output unit 8. The first sample signal Vsp1 is output to the first auxiliary conductor pattern CP3, and the second sample signal Vsp2 is output to the second auxiliary conductor pattern CP4.

  In this case, a portion of the first conductor pattern CP1 facing the first auxiliary conductor pattern CP3 (a portion capacitively coupled to the first auxiliary conductor pattern CP3) and the first impedance element 4 connected to the first conductor pattern CP1 are provided. , The first test signal Vts1 instead of the first voltage signal Vc1 is generated in the same phase as the first sample signal Vsp1 as shown in FIG. A second test signal Vts2 instead of the second voltage signal Vc2 is applied to the opposing part (the part capacitively coupled to the second auxiliary conductor pattern CP4) and the second impedance element 5 connected to the second conductor pattern CP2. As shown in FIG. 4, the signal is generated in the same phase as the second sample signal Vsp2 (the phase opposite to the first test signal Vts1). The change patterns of the third voltage signal Vc3, the fourth voltage signal Vc4, the difference signal Vd, and the code specifying signal Sf generated based on the test signal Vts1 and the second test signal Vts2 are, as described above, the signal generation device 1A. Is in a normal state or a faulty state, and when it is in a faulty state, it depends on which circuit is faulty.

  For this reason, in the self-diagnosis process, the processing unit 11 executes control to output the first sample signal Vsp1 and the second sample signal Vsp2 to the sample signal output unit 8 in the first change pattern. Each of the waveform data Dv1, Dv2, Dv3, and Dv4 output from the waveform obtaining unit 9 is obtained, and the timing of the change of the first sample signal Vsp1 and the second sample signal Vsp2 (for example, each time t1, (t2, t3, t4, t5,...).

  In this case, a configuration may be adopted in which all the waveform data Dv1, Dv2, Dv3, Dv4 over the entire period from one time to the next time are stored, but the respective waveform data Dv1, Dv2, Dv3, A configuration for storing each waveform data Dv1, Dv2, Dv3, Dv4 in a short period immediately before the next time when Dv4 is most stable (a period sufficiently shorter than the period from one time to the next time). Can also be adopted.

  Next, in the self-diagnosis processing, the processing unit 11 performs the first sample in the second change pattern (in-phase change pattern) based on the stored pattern data for the second change pattern (change pattern shown in FIG. 5). The signal Vsp1 and the second sample signal Vsp2 are output from the sample signal output unit 8. The first sample signal Vsp1 is output to the first auxiliary conductor pattern CP3, and the second sample signal Vsp2 is output to the second auxiliary conductor pattern CP4.

  In this case, a portion of the first conductor pattern CP1 facing the first auxiliary conductor pattern CP3 (a portion capacitively coupled to the first auxiliary conductor pattern CP3) and the first impedance element 4 connected to the first conductor pattern CP1 are provided. , The first test signal Vts1 instead of the first voltage signal Vc1 is generated in the same phase as the first sample signal Vsp1, as shown in FIG. A second test signal Vts2 instead of the second voltage signal Vc2 is applied to the opposing portion (the portion that is capacitively coupled to the second auxiliary conductor pattern CP4) and the second impedance element 5 connected to the second conductor pattern CP2. As shown in FIG. 5, the signal occurs in the same phase as the second sample signal Vsp2 (the same state as the first test signal Vts1). As described above, each change pattern of the third voltage signal Vc3 and the fourth voltage signal Vc4 generated based on the test signal Vts1 and the second test signal Vts2 indicates that the signal generation device 1A is in a normal state or a failure state. It depends.

  For this reason, in the self-diagnosis process, the processing unit 11 executes control to output the first sample signal Vsp1 and the second sample signal Vsp2 to the sample signal output unit 8 in the second change pattern. Each of the waveform data Dv1 and Dv2 output from the waveform acquisition unit 9 is acquired, and the timing of the change of the first sample signal Vsp1 and the second sample signal Vsp2 (for example, each time t1, t2, t3 shown in FIG. 5) (t4, t5,...).

  Subsequently, in this self-diagnosis processing, the processing unit 11 is based on the waveform data Dv1 for the third voltage signal Vc3 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern. , A change pattern of the third voltage signal Vc3 with time is calculated and compared with a first reference change pattern stored in advance. When the first conductor pattern CP1 and the first impedance element 4 are in a normal state and the first amplifier circuit 41 constituting the differential amplifier 6 is in a normal state, the obtained change pattern is a corresponding first reference change pattern (specified). (A change pattern in which the amplitude exceeds a predetermined threshold voltage Vth1), but the first conductor pattern CP1, the first impedance element 4, and the first When at least one of the amplifier circuits 41 is out of order (when it is not in a normal state), the obtained change pattern has an amplitude lower than the threshold voltage Vth1, and thus matches the corresponding first reference change pattern. do not do.

  Further, the processing unit 11 determines the third voltage signal Vc3 based on the waveform data Dv1 of the third voltage signal Vc3 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the second change pattern. Is obtained, and is compared with a fifth reference change pattern stored in advance. When the first conductor pattern CP1 and the first impedance element 4 are in a normal state and the first amplifier circuit 41 forming the differential amplifier 6 is in a normal state, the obtained change pattern is a corresponding fifth reference change pattern (specified). (A change pattern in which the amplitude exceeds a predetermined threshold voltage Vth1), but the first conductor pattern CP1, the first impedance element 4, and the first When at least one of the amplifier circuits 41 has failed (is not in a normal state), the obtained change pattern has an amplitude lower than the threshold voltage Vth1, and thus matches the corresponding fifth reference change pattern. do not do.

  Therefore, the processing unit 11 determines that the change pattern of the third voltage signal Vc3 obtained based on the waveform data Dv1 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern is the first change signal. A change pattern for the third voltage signal Vc3 that matches the one reference change pattern and that is obtained based on the waveform data Dv1 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the second change pattern Is equal to the fifth reference change pattern, the first conductor pattern CP1 and the first impedance element 4 (that is, circuit elements from the connection portion of the probe PLa in the signal generation device 1A to the differential amplifier 6) , And that the first amplifier circuit 41 is in a normal state. On the other hand, the processing unit 11 determines that the change pattern for the third voltage signal Vc3 obtained based on the waveform data Dv1 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern is the first change signal. The third voltage signal Vc3 that does not match the one reference change pattern or that is obtained based on the waveform data Dv1 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the second change pattern. If the change pattern does not match the fifth reference change pattern, the first conductor pattern CP1 and the first impedance element 4 (that is, from the connection point of the probe PLa in the signal generation device 1A to the differential amplification unit 6). And at least one of the first amplifier circuits 41 has failed. To determine a, and stores the determination result.

  Further, in the self-diagnosis processing, the processing unit 11 performs processing based on the waveform data Dv2 for the fourth voltage signal Vc4 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern. A change pattern with time of the fourth voltage signal Vc4 is obtained and compared with a second reference change pattern stored in advance. The second conductor pattern CP2 and the second impedance element 5 (that is, circuit elements from the connection portion of the probe PLb in the signal generation device 1A to the differential amplifier 6) are in a normal state, and the differential amplifier 6 is configured. When the second amplifying circuit 42 is in a normal state, the obtained change pattern is a corresponding second reference change pattern (a change pattern having a specified amplitude A2 (an amplitude exceeding a predetermined threshold voltage Vth2)). Although they match, when at least one of the second conductor pattern CP2, the second impedance element 5, and the second amplifier circuit 42 configuring the differential amplifier unit 6 has failed (is not in a normal state), Since the amplitude of the obtained change pattern is lower than the threshold voltage Vth2, it does not match the corresponding second reference change pattern.

  In addition, the processing unit 11 performs processing on the fourth voltage signal Vc4 based on the waveform data Dv2 on the fourth voltage signal Vc4 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the second change pattern. Is obtained and compared with a previously stored sixth reference change pattern. The second conductor pattern CP2 and the second impedance element 5 (that is, circuit elements from the connection portion of the probe PLb in the signal generating device 1A to the differential amplifier 6) are in a normal state, and the differential amplifier 6 is configured. When the second amplifier circuit 42 is in a normal state, the obtained change pattern is a corresponding sixth reference change pattern (a change pattern in which the amplitude becomes a specified amplitude A2 (the amplitude exceeds a predetermined threshold voltage Vth2)). Although they match, when at least one of the second conductor pattern CP2, the second impedance element 5, and the second amplifier circuit 42 configuring the differential amplifier unit 6 is out of order (when it is not in a normal state), Since the obtained change pattern has an amplitude lower than the threshold voltage Vth2, it does not match the corresponding sixth reference change pattern.

  Therefore, the processing unit 11 determines that the change pattern of the fourth voltage signal Vc4 obtained based on the waveform data Dv1 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern is the first change signal. A change pattern for the fourth voltage signal Vc4 that matches the two reference change patterns and that is obtained based on the waveform data Dv1 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the second change pattern. Is equal to the sixth reference change pattern, the second conductor pattern CP2 and the second impedance element 5 (that is, the circuit elements from the connection portion of the probe PLb in the signal generation device 1A to the differential amplification unit 6) , And the second amplifier circuit 42 is in a normal state. On the other hand, the processing unit 11 determines that the change pattern of the fourth voltage signal Vc4 obtained based on the waveform data Dv1 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern is the first change signal. The fourth voltage signal Vc4 that does not match the two reference change patterns or that is obtained based on the waveform data Dv1 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the second change pattern. If the change pattern does not match the sixth reference change pattern, the second conductor pattern CP2 and the second impedance element 5 (that is, from the connection point of the probe PLb in the signal generation device 1A to the differential amplification unit 6) And at least one of the second amplifier circuits 42 has failed. To determine a, and stores the determination result.

  Further, the processing unit 11 has determined that a failure has occurred in at least one of the first conductor pattern CP1, the first impedance element 4, and the first amplifier circuit 41 in the processing so far in the self-diagnosis processing. At this time, or when it is determined that at least one of the second conductor pattern CP2, the second impedance element 5, and the second amplifier circuit 42 has a failure, the failure is output to the output unit 13 and The diagnostic processing ends.

  On the other hand, the processing unit 11 determines that the first conductor pattern CP1, the first impedance element 4, and the first amplifier circuit 41 are all in a normal state in the processing up to this point in the self-diagnosis processing, and When it is determined that the CP2, the second impedance element 5, and the second amplifier circuit 42 are all in the normal state, the self-diagnosis processing is continued and the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern. Based on the waveform data Dv3 for the difference signal Vd stored at the time of the change, a change pattern with time of the difference signal Vd is obtained and compared with a third reference change pattern stored in advance.

  In this case, the first conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, and the second amplifier circuit 42 are in a normal state, and the differential amplifier circuit When the reference pattern 43 is in a normal state, the obtained change pattern matches the corresponding third reference change pattern (a change pattern in which the amplitude becomes a specified amplitude A3 (the amplitude exceeds a predetermined threshold voltage Vth3)). Even if the one conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, and the second amplifier circuit 42 are in a normal state, the differential amplifier circuit 43 fails. In this case, the obtained change pattern has an amplitude lower than the threshold voltage Vth3, and thus does not match the corresponding third reference change pattern.

  Therefore, the processing unit 11 sets the change pattern of the difference signal Vd obtained based on the waveform data Dv3 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern to the third reference pattern. When it matches the change pattern, the differential amplifier circuit is provided together with the first conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, and the second amplifier circuit 42. 43 is also determined to be in a normal state. On the other hand, when the change pattern of the obtained difference signal Vd does not match the third reference change pattern, the processing unit 11 determines that the differential amplifier circuit 43 has failed, and stores the determination result. I do.

  When the processing unit 11 determines that the differential amplifier circuit 43 has failed in the processing up to this point in the self-diagnosis processing, the processing unit 11 outputs the fact to the output unit 13 and performs this self-diagnosis processing. Terminate.

  On the other hand, the processing unit 11 performs the first conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, When it is determined that the amplifier circuit 42 and the differential amplifier circuit 43 are all in a normal state, the self-diagnosis process is continued, and the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern. Based on the stored waveform data Dv4 for the code specifying signal Sf, a change pattern with time of the code specifying signal Sf is obtained and compared with a fourth reference change pattern stored in advance.

  In this case, the first conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, the second amplifier circuit 42, and the differential amplifier circuit 43 are in a normal state. When the signal generation unit 7 is in the normal state, the obtained change pattern is the corresponding fourth reference change pattern (the amplitude is changed during the period when the first sample signal Vsp1 is at a low voltage and the second sample signal Vsp2 is at a high voltage). During the period in which the voltage exceeds the threshold voltage Vth4, the first sample signal Vsp1 is at a high voltage, and the second sample signal Vsp2 is at a low voltage, the amplitude matches a reference change pattern in which the amplitude falls below the threshold voltage Vth4. On the other hand, even if the first conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, the second amplifier circuit 42, and the differential amplifier circuit 43 are in a normal state. When the signal generation unit 7 is out of order, the amplitude falls below the threshold voltage Vth4 during the period when the first sample signal Vsp1 is at a low voltage and the second sample signal Vsp2 is at a high voltage. It does not match the four-reference change pattern.

  Therefore, the processing unit 11 determines that the change pattern for the code specifying signal Sf obtained based on the waveform data Dv4 stored when the first sample signal Vsp1 and the second sample signal Vsp2 are output in the first change pattern is the first change pattern. When they match the four reference change patterns, the first conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, the second amplifier circuit 42, and the differential amplifier Along with the circuit 43, the signal generator 7 is also determined to be in a normal state. On the other hand, when the change pattern of the obtained code specifying signal Sf does not match the fourth reference change pattern, the processing unit 11 determines that the signal generation unit 7 is out of order, and determines the determination result. Remember.

  Further, in the processing up to this point in the self-diagnosis processing, when the processing unit 11 determines that the signal generation unit 7 has failed, the processing unit 11 outputs the fact to the output unit 13 and ends the self-diagnosis processing. . On the other hand, the processing unit 11 includes, together with the first conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, the second amplifier circuit 42, and the differential amplifier circuit 43, When it is determined that the signal generation unit 7 is also in the normal state, the signal generation device 1A is in a normal state as a whole, and that fact is output to the output unit 13 to terminate the self-diagnosis processing.

  In this way, when the operation of the signal generation device 1A is switched to the self-diagnosis mode and the signal generation device 1A is operated, the determination result in the self-diagnosis process executed by the processing unit 11 is output (displayed) to the output unit 13. The user can know whether the signal generation device 1A is in a normal state as a whole or has a failure. Further, in the signal generating device 1A of the present example, a circuit (hereinafter, also referred to as a first circuit for explanation) including the first conductor pattern CP1, the first impedance element 4, and the first amplifier circuit 41 as a whole is in a normal state. Or a failure has occurred, a circuit composed of the second conductor pattern CP2, the second impedance element 5, and the second amplifier circuit 42 (hereinafter also referred to as a second circuit for the sake of description) as a whole is It is determined whether the differential amplifier circuit 43 is in a normal state or a failure has occurred, and whether the signal generation unit 7 is in a normal state or a failure has occurred. Since the determination result of the occurrence is individually output (displayed) to the output unit 13, the user can more specifically determine which circuit has a failure when the signal generation device 1A has a failure. And it is possible to know the dolphin.

  Thereby, the user switches to the normal operation mode only when the signal generation device 1A is in the normal state, attaches the first probe PLa to the corresponding covered conductor La, and attaches the second probe PLb to the corresponding covered conductor La. Since it can be used by attaching to Lb, it is possible to prevent occurrence of a situation in which an incorrect code specifying signal Sf is output to the outside.

  In this signal generation device 1A, as described above, in order to more specifically determine which circuit has a failure, a circuit (upstream side) located on the serial bus SB (covered conductor La, Lb) side is used. From the above-described first circuit and second circuit, the differential amplifier circuit 43 and the signal generation unit 7 are diagnosed in the order of the circuit provided downstream only when it is determined that the circuit is normal. Although the self-diagnosis processing is executed by a procedure of performing a self-diagnosis process (determining whether the state is normal or a failure has occurred), the present invention is not limited to this configuration.

  For example, when a failure has occurred in at least one of the first circuit, the second circuit, the differential amplifier circuit 43, and the signal generator 7, it is impossible to output a correct code specifying signal Sf. Therefore, it may be determined that the signal generation device 1A is out of order. Therefore, instead of the configuration in which the waveform acquiring unit 9 receives the voltage signals Vc3 and Vc4, the difference signal Vd, and the code specifying signal Sf and outputs the corresponding waveform data Dv1, Dv2, Dv3, and Dv4, the waveform acquiring unit 9 acquires the waveform. The unit 9 receives at least one of the voltage signals Vc3 and Vc4, the difference signal Vd, and the code specifying signal Sf, or any one of the signals, and outputs the waveform data Dv1, Dv2, Dv3, and Dv4. A configuration in which only the corresponding waveform data Dv is output may be employed. In this configuration, in the self-diagnosis processing, the processing unit 11 compares the change pattern of the signal indicated by the waveform data Dv with the corresponding reference change pattern to determine whether the signal is in a normal state or has a failure. Is determined.

  As described above, according to this signal generation device 1A, since the processing unit 11 includes the sample signal output unit 8 and the waveform acquisition unit 9 and executes the above-described self-diagnosis processing, the user needs to use the signal generation device 1A. Whether or not a failure has occurred can be easily known. Therefore, according to the signal generation device 1A, it is possible to prevent the occurrence of a situation in which an incorrect code specifying signal Sf is output to the outside when used in a failure state.

  Further, according to the signal generation device 1A, the processing unit 11 performs the self-diagnosis processing in a state where the sample signal output unit 8 outputs the first sample signal Vsp1 and the second sample signal Vsp2 in the first change pattern. The change pattern of the code specifying signal Sf indicated by the waveform data Dv4 acquired by the waveform acquisition section 9 is compared with the corresponding fourth reference change pattern to determine whether or not a failure has occurred in the signal generation device 1A. Therefore, the first conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, the second amplifier circuit 42, the differential amplifier circuit 43, and the signal generation unit 7, it can be determined that a failure has occurred, in other words, that the signal generation device 1A is in a normal state.

  Further, according to the signal generation device 1A, the processing unit 11 performs the self-diagnosis processing in a state where the sample signal output unit 8 outputs the first sample signal Vsp1 and the second sample signal Vsp2 in the first change pattern. A configuration in which a change pattern of the difference signal Vd indicated by the waveform data Dv3 acquired by the waveform acquisition unit 9 is compared with a corresponding third reference change pattern to determine whether or not a failure has occurred in the signal generation device 1A. Therefore, at least one of the first conductor pattern CP1, the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, the second amplifier circuit 42, and the differential amplifier circuit 43 fails. As a result, it can be determined that the circuit in which the failure has occurred is more limited. In the self-diagnosis process, the processing unit 11 outputs the waveform obtained by the waveform obtaining unit 9 while the sample signal output unit 8 outputs the first sample signal Vsp1 and the second sample signal Vsp2 in the first change pattern. When a configuration is adopted in which only the change pattern of the difference signal Vd indicated by the data Dv3 and the corresponding third reference change pattern are compared to determine whether or not a failure has occurred in the signal generation device 1A, the first It is possible to determine whether or not at least one of the impedance element 4, the second impedance element 5, and the differential amplifying unit 6 has a failure. 1A can be avoided from being used.

  Further, according to the signal generation device 1A, in the self-diagnosis processing, the processing unit 11 causes the sample signal output unit 8 to output the first sample signal Vsp1 and the second sample signal Vsp2 in the first change pattern or the second change pattern. In this state, the change pattern of the third voltage signal Vc3 indicated by the waveform data Dv1 acquired by the waveform acquisition unit 9 is compared with the corresponding first reference change pattern, and the waveform acquired by the waveform acquisition unit 9 Since the change pattern of the fourth voltage signal Vc4 indicated by the data Dv2 is compared with the corresponding second reference change pattern to determine whether a failure has occurred in the signal generation device 1A, the first conductor pattern is used. CP1, a first circuit including the first impedance element 4 and the first amplifier circuit 41, a second conductor pattern CP2, a second impedance Results it is possible to determine a failure in the second circuit composed of scan element 5 and the second amplifying circuit 42 has occurred, it is possible to determine with more limited the circuit fault has occurred. In the self-diagnosis process, the processing unit 11 outputs the waveform acquisition unit 9 while the sample signal output unit 8 outputs the first sample signal Vsp1 and the second sample signal Vsp2 in the first change pattern and the second change pattern. Is compared with the first reference change pattern corresponding to the change pattern of the third voltage signal Vc3 indicated by the waveform data Dv1 acquired at the step S4, and the fourth voltage signal indicated by the waveform data Dv2 acquired by the waveform acquisition unit 9. When the configuration of determining whether or not a failure has occurred in the signal generating device 1A is adopted only by comparing the change pattern of Vc4 with the corresponding second reference change pattern, the first circuit and the second circuit Can be determined whether at least one of them has a failure, and thus, No. generator 1A can be prevented from being used.

  In the signal generating device 1A, the first conductor line CDL1 (specifically, a part of the first conductor line CDL1) that connects the electrode (one electrode) 22a of the first probe PLa and the first impedance element 4 is connected. The first auxiliary conductor pattern CP3 as a first auxiliary conductor that is capacitively coupled to the first conductor pattern CP1 constituting the second probe PLb, and the second connecting element 22b (the other electrode) of the second probe PLb to the second impedance element 5. A second auxiliary conductor pattern CP4 as a second auxiliary conductor capacitively coupled to the two conductor line CDL2 (specifically, the second conductor pattern CP2 forming a part of the second conductor line CDL2) is provided. The unit 8 outputs the first sample signal Vsp1 to the first auxiliary conductor pattern CP3, and outputs the second sample signal Vsp2 to the second auxiliary conductor pattern CP3. And outputs it to the CP4.

  Therefore, according to the signal generation device 1A, since the test signals Vts1 and Vts2 are generated by the capacitive coupling to the first conductor line CDL1 and the second conductor line CDL2, the test signals Vts1 and Vts2 are generated. It is possible to avoid directly connecting the conductor pattern to the first conductor line CDL1 and the second conductor line CDL2, and to prevent a situation where the direct connection of the conductor pattern adversely affects the generation of the code specifying signal. Can be. According to the signal generating device 1A, the first auxiliary conductor pattern CP3 capacitively coupled to the first conductor line CDL1 and the second auxiliary conductor pattern CP4 capacitively coupled to the second conductor line CDL2 are provided. The self-diagnosis can be performed without connecting the first probe PLa and the second probe PLb.

  Further, according to the signal generating device 1A, the sample signal output unit 8 outputs the first auxiliary conductor (the first auxiliary conductor pattern CP3 in the above example) when the first sample signal Vsp1 and the second sample signal Vsp2 are not output. In addition, in order to output a signal of the same potential as the reference potential (potential of the ground G) to the second auxiliary conductor (the second auxiliary conductor pattern CP4 in the above example), the first auxiliary pattern of the first conductor pattern CP1 in the normal operation mode. A portion facing the conductor pattern CP3 (main portion that capacitively couples) and a portion of the second conductor pattern CP2 facing the second auxiliary conductor pattern CP4 (main portion that capacitively couples) can be guarded by the reference potential.

  Further, according to the signal generation device 1A, the output unit 13 including the display device is provided, and the processing unit 11 outputs the determination result (whether or not a failure has occurred) in the self-diagnosis process to the output unit 13. , The user can be reliably informed that the signal generating device 1A has a failure.

  In the signal generating device 1A, the first probe PLa and the second probe PLb are not connected to each other, so that a self-diagnosis can be performed without connecting the first probe PLa and the second probe PLb to the first conductor pattern CP1 formed on the circuit board CB. (1) The auxiliary conductor pattern CP3 is formed on the circuit board CB, and the second auxiliary conductor pattern CP4, which is capacitively coupled to the second conductor pattern CP2 formed on the circuit board CB, is formed on the circuit board CB. Adopts a configuration in which the first sample signal Vsp1 is output to the first auxiliary conductor pattern CP3 and the second sample signal Vsp2 is output to the second auxiliary conductor pattern CP4, but is not limited to this configuration.

  For example, the above-described configuration of the signal generating device 1A in which the first auxiliary conductor pattern CP3 as the first auxiliary conductor is formed on the circuit board CB and the second auxiliary conductor pattern CP4 as the second auxiliary conductor is formed on the circuit board CB. Instead, like the signal generation device 1B shown in FIG. 6, the first auxiliary conductor 51 is arranged on the surface of the housing HU so that the first probe PLa can be attached, and the second probe PLb can be attached. A configuration in which the second auxiliary conductor 52 is provided on the surface of the housing HU may be employed. Hereinafter, the signal generation device 1B will be described. However, the configuration other than the first auxiliary conductor 51 and the second auxiliary conductor 52 is the same as that of the signal generation device 1A (the configuration of the first auxiliary conductor pattern CP3 and the second auxiliary conductor pattern CP4). Since the configuration is the same as the configuration except for the configuration, the same configuration is denoted by the same reference numeral and redundant description is omitted.

  The first auxiliary conductor 51 and the second auxiliary conductor 52 are configured by, for example, bending a metal pillar whose entire outer periphery except for both ends is covered with an insulating coating (not shown) into a U-shape. Further, as shown in FIG. 6, the first auxiliary conductor 51 and the second auxiliary conductor 52 are configured such that the portions at both ends bent in a state of being substantially parallel to each other are paired with the housing HU. In a state of being insulated and separated from each other, they are arranged upright on the surface of the housing HU. With this configuration, it is possible to attach the first probe PLa to the corresponding first auxiliary conductor 51 and attach the second probe PLb to the corresponding second auxiliary conductor 52 at the time of self-diagnosis.

  As shown in FIG. 6, the first auxiliary conductor 51 is configured such that one end thereof is connected to the sample signal output unit 8 and the other end is opened, so that the first sample signal Vsp1 can be output. . The second auxiliary conductor 52 is configured such that one end thereof is connected to the sample signal output unit 8 and the other end is open so that the second sample signal Vsp2 can be output.

  With this configuration, in the signal generation device 1B, the electrode (one electrode) 22a of the first probe PLa attached to the first auxiliary conductor 51 is capacitively coupled to the first auxiliary conductor 51 when performing the self-diagnosis processing. The electrode (the other electrode) 22b of the second probe PLb attached to the second auxiliary conductor 52 is capacitively coupled to the second auxiliary conductor 52. Therefore, by outputting the first sample signal Vsp1 from the sample signal output unit 8 to the first auxiliary conductor 51, the first probe PLa is connected to the electrode 22a, and the first probe PLa connects the electrode 22a to the first impedance element 4. The first test signal Vts1 can be generated on the conductor line CDL1 instead of the first voltage signal Vc1, and the second sample signal Vsp2 is output from the sample signal output unit 8 to the second auxiliary conductor 52, so that the second test signal Vsp2 is output. The second test signal Vts2 can be generated instead of the second voltage signal Vc2 on the electrode 22b of the two probes PLb and the second conductor line CDL2 connecting the electrode 22b and the second impedance element 5.

  Therefore, also in this signal generation device 1B, since the same self-diagnosis process as the above-described self-diagnosis process in the signal generation device 1A can be executed, the same effect as the above-described effect in the signal generation device 1A can be obtained. be able to. Also, unlike the signal generation device 1A, in the signal generation device 1B, it is necessary to connect the first probe PLa and the second probe PLb when executing the self-diagnosis process. The failure that has occurred in the second probe PLb can also be determined by the self-diagnosis processing.

  In the signal generators 1A and 1B, in the self-diagnosis processing, the processing unit 11 sends the first sample signal Vsp1 and the second sample signal Vsp2 to the sample signal output unit 8, and outputs the first change pattern and the second change signal. Although the configuration in which the first sample pattern Vsp1 and the second sample signal Vsp2 are output in the first change pattern is adopted as described above, the first conductor pattern CP1, Whether any of the first impedance element 4, the first amplifier circuit 41, the second conductor pattern CP2, the second impedance element 5, the second amplifier circuit 42, the differential amplifier circuit 43, and the signal generator 7 has a failure. (That is, whether the signal generators 1A and 1B as a whole are in a normal state or in a failure state). In the process, it is also possible to process unit 11 adopts a configuration in which output with respect to the sample signal output portion 8 of the first sample signal Vsp1 and the second sample signal Vsp2 only the first change pattern.

  In addition, the signal generators 1A and 1B are both serially connected via probes PLa and PLb having the above-described configuration (a configuration in which the electrode portions 21a and 21b are disposed on the distal end side (free end side)). This is a configuration that is connected to the covered conductors La and Lb forming the bus SB. For this reason, in the signal generation devices 1A and 1B to which the probes PLa and PLb having this configuration are connected, unlike the configuration where the probes having the configuration in which the electrode portions 21a and 21b are integrally formed are connected, FIG. As shown in FIG. 2, any two positions at which the electrode portions 21a and 21b are separated from each other along the longitudinal direction (length direction) W of the serial bus SB (as shown in FIG. Of the twisted (twisted) covered conductors La, Lb, at the first position P1 of the covered conductor La, and at the electrode portion 21b at the second position P2 of the covered conductor Lb constituting the serial bus SB. Can be used by attaching. For this reason, although not shown, the respective electrode portions 21a and 21b are integrally formed, and are attached to the same position along the longitudinal direction W of the serial bus SB (the twisted covered conductors La and Lb are connected to each other). A probe that needs to be unraveled at a position to separate the electrode portions 21a and 21b by a distance that can be attached and to simultaneously attach the electrode portions 21a and 21b to the corresponding covered conductors La and Lb at this position. In contrast to the configuration where is connected, the electrode portions 21a and 21b can be attached by untwisting the covered conducting wires La and Lb at the respective positions P1 and P2 where they can be easily attached. In addition, since the electrode portions 21a and 21b are attached to different positions P1 and P2 along the longitudinal direction W of the serial bus SB, the amount of twisting the twisted covered conductors La and Lb at the positions P1 and P2 is reduced. Can be reduced. Therefore, according to the signal generators 1A and 1B, the electrodes 21a and 21b can be reliably mounted on the serial bus SB, and the time required for mounting can be shortened (mountability can be improved).

  In addition, one common connector is arranged on the base end side of each of the probes PLa and PLb, and connected to the signal generators 1A and 1B via this connector, and each base end of each of the probes PLa and PLb is connected. The part on the side of the part (for example, part X shown in FIG. 7) may be unified (combined) with a heat-shrinkable tube or the like while the parts on the side of the electrode parts 21a and 21b are exposed to some extent. Further, the signal generators 1A and 1B of FIG. 7 employ a configuration in which the base ends of the probes PLa and PLb are connected to the signal generators 1A and 1B, respectively. However, the present invention is not limited to this configuration. Absent.

  For example, like the signal generators 1A and 1B shown in FIG. 8, the bases of the probes PLa and PLb are connected to a connection section 53 such as a connection box connected to the signal generators 1A and 1B via the two-core shielded wire SC. A configuration in which the end portions are connected to each other may be employed. In this configuration, the base end of the two-core shielded wire SC is connected to the signal generators 1A and 1B via a connector (not shown), and the two cores are connected to the signal generators 1A and 1B via the connector. , And a shield (not shown) is connected to a ground G in the signal generators 1A and 1B via a connector. The connecting portion 53 is connected to the free end of the two-core shielded wire SC. In this case, in the connection portion 53, one of the core wires included in the two-core shielded wire SC and connected to the impedance element 4 is connected to the core wire of the shielded cable constituting the corresponding probe PLa, and the two-core shielded wire is connected. The other core wire included in the SC and connected to the impedance element 5 is connected to the core wire of the shielded cable constituting the corresponding probe PLb, and the shield of the two-core shielded wire SC constitutes each of the probes PLa and PLb. A connection circuit (not shown) for connecting to the shield of each shielded cable is built in.

  Also in the signal generation devices 1A and 1B shown in FIG. 8, the electrodes 21a and 21b are arranged on the free ends of a pair of separately formed probes PLa and PLb. The same effect as that of the signal reading system 1 shown in FIG.

  The signal generators 1A and 1B are connected to the covered conductors La and Lb via probes PLa and PLb having electrodes 21a and 21b capacitively coupled to the metal parts (cores) of the covered conductors La and Lb. In addition, voltage signals Vc1 and Vc2 whose voltages change in accordance with the voltages Va and Vb of the voltage signals Va and Vb transmitted to the covered conductors La and Lb are generated, and based on the voltage signals Vc1 and Vc2, Although a configuration for generating a code specifying signal Sf capable of specifying a code Cs corresponding to the voltage signals Va and Vb (that is, a configuration using each of the probes PLa and PLb functioning as a voltage detection probe) is employed. However, the present invention is not limited to this configuration.

  For example, instead of the probes PLa and PLb, a pair of current detection probes PLc and PLd (attached to the covered conductors La and Lb without cutting the covered conductors La and Lb) as in a signal generation device 1C shown in FIG. (Preferably a clamp-type current detection probe that can be used) may be connected to generate a code specifying signal Sf. Various known current detection probes can be used as the current detection probes PLc and PLd. However, in the following, an example is disclosed in Japanese Patent Application Laid-Open No. 2006-343109 which has already been proposed by the present applicant. An example using the current detection probe described above will be described. The same components as those of the above-described signal generators 1A and 1B connecting the probes PLa and PLb are denoted by the same reference numerals, and redundant description will be omitted.

  As shown in FIG. 9, the current detection probes PLc and PLd are formed in a substantially circular shape, and have a clamp portion 61 whose tip is configured to be freely opened and closed. And a current sensor (not shown) composed of a detection coil in which a winding is wound around a core. This current sensor flows through the corresponding covered conductor in a state where the corresponding covered conductor (the covered conductor La for the current detection probe PLc, the covered conductor Lb for the current detection probe PLd) is sandwiched (clamped) at each clamp portion 61. Current (a current Ia flowing through the covered conductor La and a current Ib flowing through the covered conductor Lb), and a current-corresponding signal Vi (current) as a voltage signal whose amplitude is proportional to the current value of the current. The signal Ia is converted into a current-corresponding signal Via as a first voltage signal, and the current Ib is converted into a current-corresponding signal Vib as a second voltage signal, and output to the signal generator 1C. Each of the current detection probes PLc and PLd has a base end connected to the input terminals 2 and 3 (fixed or detachably connected) and a shielded cable (for example, a coaxial cable) having a free end connected to the clamp 61. Cable). Further, as shown in FIG. 9, the circuit structure of the signal generator 1C connected to the base ends of these shielded cables is configured to be equivalent to the circuit structure of the signal generators 1A and 1B (see FIG. 6). I have.

  Note that, unlike the signal generation devices 1A and 1B, each of the impedance elements 4 and 5 of the signal generation device 1C has a resistance value (for example, a low resistance such as 50Ω or 75Ω) that ensures matching with the characteristic impedance of the shielded cable. Value). Although the current detection probes PLc and PLd are configured as AC current detection probes (AC current detection probes) due to the configuration of the clamp section 61 described above, the current detection probes PLc and PLd are not only AC current detection probes but also DC current detection probes. Needless to say, a DC current detection probe (DC current detection probe) that can measure the current may also be employed.

  Since the current value of the current Ia flowing through the insulated wire La changes in accordance with the voltage Va of the voltage signal Va transmitted to the insulated wire La, the current corresponding signal Via changes in accordance with the voltage Va of the voltage signal Va. The voltage value changes. Further, the current value of the current Ib flowing through the insulated wire Lb changes according to the voltage Vb of the voltage signal Vb transmitted to the insulated wire Lb, so that the current-corresponding signal Vib becomes the voltage Vb of the voltage signal Vb. The voltage value changes accordingly. Therefore, also in the signal generation device 1C, the first amplification circuit 41 outputs the third voltage signal Vc3 in the differential amplification unit 6 in the same manner as in the signal generation devices 1A and 1B to which the probes PLa and PLb are connected. Then, the second amplifier circuit 42 outputs the fourth voltage signal Vc4, and the differential amplifier circuit 43 outputs the difference signal Vd. Further, the signal generation unit 7 generates and outputs the code specifying signal Sf.

  Further, in the signal generating device 1C, as shown in FIG. 9, each end of the first auxiliary conductor 51 and the second auxiliary conductor 52, which are open in the signal generating device 1B, is defined at a predetermined potential. In the example, as an example, it is connected to the ground G). Further, in the signal generation device 1B, in order to generate the first test signal Vts1 input to the first amplifier circuit 41 of the differential amplifier 6 and the second test signal Vts2 input to the second amplifier circuit 42, the sample is generated. Although the signal output unit 8 adopts a configuration that outputs the first sample signal Vsp1 and the second sample signal Vsp2 as a voltage signal, in the signal generation device 1C, the sample signal output unit 8A outputs the first signal as a current signal. A configuration for outputting the sample signal Isp1 and the second sample signal Isp2 is employed.

  With this configuration, in the signal generation device 1C, when performing the self-diagnosis process, the current detection probe PLc is clamped to the first auxiliary conductor 51 and the current detection probe PLd is clamped to the second auxiliary conductor 52. By outputting the first sample signal Isp1 from the sample signal output unit 8A to the first auxiliary conductor 51, the current-corresponding signal Via output from the current detection probe PLc to the first conductor line CDL1 is output to the first amplifying unit 6. The first test signal Vts1 can be input to the amplifier circuit 41 instead of the first voltage signal Vc1. Further, by outputting the second sample signal Isp2 from the sample signal output unit 8A to the second auxiliary conductor 52, the current-corresponding signal Vib output from the current detection probe PLd to the second conductor line CDL2 is output from the differential amplifier unit 6. The second amplifier circuit 42 can input the second test signal Vts2 instead of the second voltage signal Vc2.

  Therefore, also in this signal generating device 1C, the same self-diagnostic process as that in the above-described signal generating devices 1A and 1B can be performed, and the same effect as in the above-described signal generating devices 1A and 1B can be obtained. The effect can be achieved. Further, in the signal generation device 1C, the current detection probes PLc and PLd are connected when executing the self-diagnosis processing in the same manner as the signal generation device 1B, so that the current detection probes PLc and PLd are normal. Can also be determined by the self-diagnosis processing.

  Further, in the signal generation device 1C, the first detection signal Vts1 and the second test signal Vts2 are output from the current detection probes PLc and PLd (that is, the first amplification circuit 41 and the second amplification circuit 41 of the differential amplification unit 6). In order to input the first test signal Vts1 and the second test signal Vts2 to the circuit 42), the sample signal output unit 8A supplies the first auxiliary conductor 51 and the second auxiliary conductor 52 for clamping the current detection probes PLc and PLd. Although a configuration for outputting the one sample signal Isp1 and the second sample signal Isp2 is adopted, the present invention is not limited to this configuration. For example, instead of the first auxiliary conductor 51 and the second auxiliary conductor 52, an injection coil which is provided in each of the clamp portions 61 of the current detection probes PLc and PLd and has a magnetic core wound with a winding together with the above detection coil is used. A multi-core shielded cable having two or more cores is used as a shielded cable constituting the current detection probes PLc and PLd, and the sample signal output section 8A is one core wire of the multi-core shielded cable constituting the current detection probes PLc and PLd. , The first sample signal Isp1 and the second sample signal Isp2 are output to the injection coil in each clamp unit 61.

  Also in the signal generation device 1C employing this configuration, the sample signal output unit 8A outputs the first sample signal Isp1 to the injection coil on the current detection probe PLc side, so that the current magnetically coupled to the injection coil is output. By inducing a voltage in the detection coil on the detection probe PLc side, the first test signal Vts1 can be output from the current detection probe PLc, and the sample signal output unit 8A outputs the second sample signal to the injection coil on the current detection probe PLd side. By outputting Isp2, a voltage can be induced in the detection coil on the side of the current detection probe PLd magnetically coupled to the injection coil, and the second test signal Vts2 can be output from the current detection probe PLd. Therefore, even with the signal generation device 1C having this configuration, the same self-diagnosis process as the self-diagnosis process in the above-described signal generation devices 1A and 1B can be performed. The same effect as can be obtained. Also, in the signal generating device 1C having this configuration, when performing the self-diagnosis processing, it is possible to determine whether or not the current detection probes PLc and PLd are normal by the self-diagnosis processing.

  Further, according to the signal generation device 1C using the above-described current detection probes PLc and PLd, each clamp section 61 of the current detection probes PLc and PLd is serially connected in the same manner as in the above-described configuration including the probes PLa and PLb. Any two positions of the bus SB that are separated from each other along the longitudinal direction W (as shown in FIG. 9, the clamp portions 61 of the current detection probe PLc are connected to the twisted (twisted) covered conductors La and Lb. At the first position P1 of the covered conductor La, the clamp portion 61 of the current detection probe PLd can be mounted and used at the second position P2) of the covered conductor Lb constituting the serial bus SB. For this reason, the same effect as the configuration including the first probe PLa and the second probe PLb can be obtained.

1A, 1B, 1C signal generator
4 First impedance element
5 Second impedance element
6. Differential amplifier
8 Sample signal output section
9 Waveform acquisition unit 11 Processing unit 13 Output unit 22a, 22b Electrodes Dv1, Dv2, Dv3, Dv4 Waveform data
G Ground La, Lb Coated conductor PLa, PLb Probe Sa Logic signal Sf Code specifying signal Va, Vb Voltage (voltage transmitted to signal line)
Vc1 First voltage signal Vc2 Second voltage signal Vc3 Third voltage signal Vc3 Fourth voltage signal Vd Difference signal Vsp1, Vsp2 Sample signal Vts1, Vts2 Test signal

Claims (11)

One electrode of one of a pair of electrodes disposed on a pair of probes respectively attached to a pair of covered conductors constituting a communication path for transmitting a two-wire differential voltage type logic signal, and a device. A first voltage signal that is connected between the internal reference potential and changes in voltage according to the voltage transmitted to one of the pair of covered conductors that is capacitively coupled to the one electrode of the pair of covered conductors; A first impedance element to be generated;
The other of the pair of electrodes is connected between the other electrode of the other probe and the reference potential, and is transmitted to the other of the pair of coated conductors that is capacitively coupled to the other electrode. A second impedance element that generates a second voltage signal whose voltage changes according to the voltage that is present;
A differential amplifier that receives the first voltage signal and the second voltage signal and outputs a differential signal whose voltage changes in accordance with a differential voltage between the voltage signals, the code corresponding to the logic signal. A signal generation device that generates a signal for code identification capable of identifying based on the difference signal,
A first sample signal for generating a first test signal in the first impedance element in place of the first voltage signal, and a second test signal in the second impedance element in place of the second voltage signal A sample signal output unit for outputting a second sample signal for
A waveform acquisition unit that acquires waveform data for the code specifying signal generated in a state where the sample signal output unit is outputting the first sample signal and the second sample signal;
When the signal generation device is in a normal state and the sample signal output unit is outputting the first sample signal and the second sample signal, the signal is indicated by the waveform data previously acquired by the waveform acquisition unit. The waveform acquisition is performed while the sample signal output unit is outputting the first sample signal and the second sample signal, using a change pattern of the voltage value of the code specifying signal with time as a reference change pattern. The change pattern of the voltage value of the code specifying signal indicated by the waveform data acquired by the section is compared with the change pattern with the passage of time and the reference change pattern, and the change pattern matches the reference change pattern. The signal generator is in a normal state when the signal is generated, and is determined to be in a failed state when the values do not match. And it has a signal generation device and a processing unit for executing a self-diagnostic process of the device. One electrode of one of a pair of electrodes disposed on a pair of probes respectively attached to a pair of covered conductors constituting a communication path for transmitting a two-wire differential voltage type logic signal, and a device. A first voltage signal that is connected between the internal reference potential and changes in voltage according to the voltage transmitted to one of the pair of covered conductors that is capacitively coupled to the one electrode of the pair of covered conductors; A first impedance element to be generated;
The other of the pair of electrodes is connected between the other electrode of the other probe and the reference potential, and is transmitted to the other of the pair of coated conductors that is capacitively coupled to the other electrode. A second impedance element that generates a second voltage signal whose voltage changes according to the voltage that is present;
A differential amplifier that receives the first voltage signal and the second voltage signal and outputs a differential signal whose voltage changes in accordance with a differential voltage between the voltage signals, the code corresponding to the logic signal. A signal generation device that generates a signal for code identification capable of identifying based on the difference signal,
A first sample signal for generating a first test signal in the first impedance element in place of the first voltage signal, and a second test signal in the second impedance element in place of the second voltage signal A sample signal output unit for outputting a second sample signal for
In a state where the sample signal output unit is outputting the first sample signal and the second sample signal, a waveform acquisition unit that acquires waveform data about the difference signal output from the differential amplifier,
When the signal generation device is in a normal state and the sample signal output unit is outputting the first sample signal and the second sample signal, the signal is indicated by the waveform data previously acquired by the waveform acquisition unit. In the state where the sample signal output unit is outputting the first sample signal and the second sample signal, a change pattern with time of the voltage value of the difference signal is used as a reference change pattern. A change pattern of the voltage value of the difference signal indicated by the acquired waveform data over time is compared with the reference change pattern, and when the change pattern matches the reference change pattern, the signal is compared with the reference change pattern. The signal generator is in a normal state, and if not coincident, it is determined that the signal generator is in a failure state. A signal generation device and a processing unit that executes disconnection processing. One electrode of one of a pair of electrodes disposed on a pair of probes respectively attached to a pair of covered conductors constituting a communication path for transmitting a two-wire differential voltage type logic signal, and a device. A first voltage signal that is connected between the internal reference potential and changes in voltage according to the voltage transmitted to one of the pair of covered conductors that is capacitively coupled to the one electrode of the pair of covered conductors; A first impedance element to be generated;
The other of the pair of electrodes is connected between the other electrode of the other probe and the reference potential, and is transmitted to the other of the pair of coated conductors that is capacitively coupled to the other electrode. A second impedance element that generates a second voltage signal whose voltage changes according to the voltage that is present;
A differential amplifier that receives the first voltage signal and the second voltage signal and outputs a differential signal whose voltage changes in accordance with a differential voltage between the voltage signals, the code corresponding to the logic signal. A signal generation device that generates a signal for code identification capable of identifying based on the difference signal,
The differential amplifying unit receives and amplifies the first voltage signal, and amplifies and outputs the third voltage signal. The first amplifier circuit receives and amplifies the second voltage signal and outputs the same as a fourth voltage signal. A second amplifier circuit, and a differential amplifier circuit that receives the third voltage signal and the fourth voltage signal and outputs the difference signal;
A first sample signal for generating a first test signal in the first impedance element in place of the first voltage signal, and a second test signal in the second impedance element in place of the second voltage signal A sample signal output unit for outputting a second sample signal for
In a state where the sample signal output unit is outputting the first sample signal and the second sample signal, the waveform data of the third voltage signal is obtained as the first waveform data, and the waveform data of the fourth voltage signal is obtained. A waveform acquisition unit that acquires waveform data as second waveform data;
The first waveform data previously acquired by the waveform acquisition unit when the signal generation device is in a normal state and the sample signal output unit is outputting the first sample signal and the second sample signal. A change pattern of the voltage value of the third voltage signal over time, which is indicated by, is set as a first reference change pattern, and the change pattern of the voltage value of the fourth voltage signal indicated by the second waveform data is over time. The change pattern is represented by the first waveform data acquired by the waveform acquisition unit in a state where the sample signal output unit is outputting the first sample signal and the second sample signal, as a second reference change pattern. A change pattern of the voltage value of the third voltage signal over time is compared with the first reference change pattern, and the waveform acquisition is performed. Comparing the change pattern with time of the voltage value of the fourth voltage signal indicated by the second waveform data acquired in the step (c) and the second reference change pattern, and comparing the change with the third voltage signal. When the pattern matches the first reference change pattern and the change pattern for the fourth voltage signal matches the second reference change pattern, the signal generation device is in a normal state, At least one of the change pattern for the three voltage signal and the change pattern for the fourth voltage signal matches the corresponding one of the first reference change pattern and the second reference change pattern. And a processing unit for executing a self-diagnosis process of the signal generation device that determines that the signal generation device is in a failure state when there is no signal. Generating device. A first conductor line that connects the one electrode and the first impedance element, a first auxiliary conductor that capacitively couples with one of the one electrode, and a connection between the other electrode and the second impedance element A second conductor line to be capacitively coupled to one of the second conductor line and the other electrode,
The sample signal output unit generates the first test signal in the first impedance element by outputting the first sample signal to the first auxiliary conductor, and outputs the second sample signal to the second auxiliary conductor. 4. The signal generation device according to claim 1, wherein the second test signal is generated in the second impedance element by outputting the second test signal to the second impedance element. The first impedance element, the second impedance element and the differential amplifier are mounted on a circuit board,
The circuit board is formed with a first conductor pattern that is connected to the first impedance element and forms a part of the first conductor line, and is connected to the second impedance element and is connected to the second conductor line. Is formed, and a second conductor pattern constituting a part of
The first auxiliary conductor is a first auxiliary conductor pattern formed on the circuit board and capacitively coupled to the first conductor pattern,
The signal generator according to claim 4, wherein the second auxiliary conductor is a second auxiliary conductor pattern formed on the circuit board and capacitively coupled to the second conductor pattern. The first auxiliary conductor is configured to be able to attach the one probe, and is capacitively coupled to the one electrode in a state where the one probe is attached,
The signal generation device according to claim 4, wherein the second auxiliary conductor is configured to be able to attach the other probe, and is capacitively coupled to the other electrode in a state where the other probe is attached.   The sample signal output section outputs a signal having the same potential as the reference potential to the first auxiliary conductor pattern and the second auxiliary conductor pattern when the first sample signal and the second sample signal are not output. 5. The signal generating device according to 5. A first current detection probe connected to a pair of covered conductors forming a communication path through which a two-wire differential voltage type logic signal is transmitted, the first current detection probe being connected to one of the covered conductors; A voltage signal output from the first current detection probe connected via a second current detection probe connected to the other of the coated conductors, and transmitted to the one of the coated conductors; A first voltage signal whose voltage value changes according to a current value of a current flowing through the one coated conductor wire due to a voltage that is present, and a voltage signal output from the second current detection probe, A second voltage signal whose voltage value changes according to a current value of a current flowing through the other coated conductor due to a voltage transmitted to the coated conductor is input, and the first voltage signal and the second voltage are input. Faith A signal generating device that includes a differential amplifying unit that outputs a differential signal whose voltage changes according to the differential voltage, and generates a code specifying signal capable of specifying a code corresponding to the logic signal based on the differential signal And
A first sample signal for inputting a first test signal to the differential amplifier in place of the first voltage signal, and a second test signal for inputting the second test signal in place of the second voltage signal. A sample signal output unit for outputting a second sample signal for
A waveform acquisition unit that acquires waveform data for the code specifying signal generated in a state where the sample signal output unit is outputting the first sample signal and the second sample signal;
When the signal generation device is in a normal state and the sample signal output unit is outputting the first sample signal and the second sample signal, the signal is indicated by the waveform data previously acquired by the waveform acquisition unit. The waveform acquisition is performed while the sample signal output unit is outputting the first sample signal and the second sample signal, using a change pattern of the voltage value of the code specifying signal with time as a reference change pattern. The change pattern of the voltage value of the code specifying signal indicated by the waveform data acquired by the section is compared with the change pattern with the passage of time and the reference change pattern, and the change pattern matches the reference change pattern. The signal generator is in a normal state when the signal is generated, and is determined to be in a failed state when the values do not match. And it has a signal generation device and a processing unit for executing a self-diagnostic process of the device. A first current detection probe connected to a pair of covered conductors forming a communication path through which a two-wire differential voltage type logic signal is transmitted, the first current detection probe being connected to one of the covered conductors; A voltage signal output from the first current detection probe connected via a second current detection probe connected to the other of the coated conductors, and transmitted to the one of the coated conductors; A first voltage signal whose voltage value changes according to a current value of a current flowing through the one coated conductor wire due to a voltage that is present, and a voltage signal output from the second current detection probe, A second voltage signal whose voltage value changes according to a current value of a current flowing through the other coated conductor due to a voltage transmitted to the coated conductor is input, and the first voltage signal and the second voltage are input. Faith A signal generating device that includes a differential amplifying unit that outputs a differential signal whose voltage changes according to the differential voltage, and generates a code specifying signal capable of specifying a code corresponding to the logic signal based on the differential signal And
A first sample signal for inputting a first test signal to the differential amplifier in place of the first voltage signal, and a second test signal for inputting the second test signal in place of the second voltage signal. A sample signal output unit for outputting a second sample signal for
In a state where the sample signal output unit is outputting the first sample signal and the second sample signal, a waveform acquisition unit that acquires waveform data about the difference signal output from the differential amplifier,
When the signal generation device is in a normal state and the sample signal output unit is outputting the first sample signal and the second sample signal, the signal is indicated by the waveform data previously acquired by the waveform acquisition unit. In the state where the sample signal output unit is outputting the first sample signal and the second sample signal, a change pattern with time of the voltage value of the difference signal is used as a reference change pattern. A change pattern of the voltage value of the difference signal indicated by the acquired waveform data over time is compared with the reference change pattern, and when the change pattern matches the reference change pattern, the signal is compared with the reference change pattern. The signal generator is in a normal state, and if not coincident, it is determined that the signal generator is in a failure state. A signal generation device and a processing unit that executes disconnection processing. A first current detection probe connected to a pair of covered conductors forming a communication path through which a two-wire differential voltage type logic signal is transmitted, the first current detection probe being connected to one of the covered conductors; A voltage signal output from the first current detection probe connected via a second current detection probe connected to the other of the coated conductors, and transmitted to the one of the coated conductors; A first voltage signal whose voltage value changes according to a current value of a current flowing through the one coated conductor wire due to a voltage that is present, and a voltage signal output from the second current detection probe, A second voltage signal whose voltage value changes according to a current value of a current flowing through the other coated conductor due to a voltage transmitted to the coated conductor is input, and the first voltage signal and the second voltage are input. Faith A signal generating device that includes a differential amplifying unit that outputs a differential signal whose voltage changes according to the differential voltage, and generates a code specifying signal capable of specifying a code corresponding to the logic signal based on the differential signal And
The differential amplifying unit receives and amplifies the first voltage signal, and amplifies and outputs the third voltage signal. The first amplifier circuit receives and amplifies the second voltage signal and outputs the same as a fourth voltage signal. A second amplifier circuit, and a differential amplifier circuit that receives the third voltage signal and the fourth voltage signal and outputs the difference signal;
A first sample signal for inputting a first test signal to the differential amplifier in place of the first voltage signal, and a second test signal for inputting the second test signal in place of the second voltage signal. A sample signal output unit for outputting a second sample signal for
In a state where the sample signal output unit is outputting the first sample signal and the second sample signal, the waveform data of the third voltage signal is obtained as the first waveform data, and the waveform data of the fourth voltage signal is obtained. A waveform acquisition unit that acquires waveform data as second waveform data;
The first waveform data previously acquired by the waveform acquisition unit when the signal generation device is in a normal state and the sample signal output unit is outputting the first sample signal and the second sample signal. A change pattern of the voltage value of the third voltage signal over time, which is indicated by, is set as a first reference change pattern, and the change pattern of the voltage value of the fourth voltage signal indicated by the second waveform data is over time. The change pattern is represented by the first waveform data acquired by the waveform acquisition unit in a state where the sample signal output unit is outputting the first sample signal and the second sample signal, as a second reference change pattern. A change pattern of the voltage value of the third voltage signal over time is compared with the first reference change pattern, and the waveform acquisition is performed. Comparing the change pattern with time of the voltage value of the fourth voltage signal indicated by the second waveform data acquired in the step (c) and the second reference change pattern, and comparing the change with the third voltage signal. When the pattern matches the first reference change pattern and the change pattern for the fourth voltage signal matches the second reference change pattern, the signal generation device is in a normal state, At least one of the change pattern for the three voltage signal and the change pattern for the fourth voltage signal matches the corresponding one of the first reference change pattern and the second reference change pattern. And a processing unit for executing a self-diagnosis process of the signal generation device which determines that the signal generation device is in a failure state when there is no signal. Generating device. With an output section,
The signal generation device according to claim 1, wherein the processing unit causes the output unit to display a determination result of the normal state or the failure state on the output unit.

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