JP2019537274A - ゲート・トレンチと、埋め込まれた終端構造とを有するパワー半導体デバイス、及び、関連方法 - Google Patents
ゲート・トレンチと、埋め込まれた終端構造とを有するパワー半導体デバイス、及び、関連方法 Download PDFInfo
- Publication number
- JP2019537274A JP2019537274A JP2019530787A JP2019530787A JP2019537274A JP 2019537274 A JP2019537274 A JP 2019537274A JP 2019530787 A JP2019530787 A JP 2019530787A JP 2019530787 A JP2019530787 A JP 2019530787A JP 2019537274 A JP2019537274 A JP 2019537274A
- Authority
- JP
- Japan
- Prior art keywords
- region
- conductivity type
- dopant
- semiconductor device
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 226
- 238000000034 method Methods 0.000 title claims description 27
- 239000000463 material Substances 0.000 claims abstract description 32
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 160
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 158
- 239000002019 doping agent Substances 0.000 claims description 94
- 239000000758 substrate Substances 0.000 claims description 38
- 230000007480 spreading Effects 0.000 claims description 29
- 238000003892 spreading Methods 0.000 claims description 29
- 239000010410 layer Substances 0.000 description 204
- 108091006146 Channels Proteins 0.000 description 42
- 238000005468 ion implantation Methods 0.000 description 28
- 230000005684 electric field Effects 0.000 description 19
- 238000010586 diagram Methods 0.000 description 18
- 238000004519 manufacturing process Methods 0.000 description 15
- 239000007943 implant Substances 0.000 description 14
- 230000000903 blocking effect Effects 0.000 description 12
- 238000005530 etching Methods 0.000 description 12
- 150000002500 ions Chemical class 0.000 description 11
- 238000013461 design Methods 0.000 description 10
- 238000002513 implantation Methods 0.000 description 8
- 230000015556 catabolic process Effects 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 5
- 230000036961 partial effect Effects 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- 230000002441 reversible effect Effects 0.000 description 5
- 229910002601 GaN Inorganic materials 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 230000002411 adverse Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000000670 limiting effect Effects 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000011295 pitch Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 108010075750 P-Type Calcium Channels Proteins 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 239000002800 charge carrier Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
- -1 region Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
- H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
- H01L29/0878—Impurity concentration or distribution
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
- H01L29/1037—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure and non-planar channel
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
本発明は、陸軍研究所により資金提供を受けた、協力協定番号W911NF−12−2−0064のもとでの政府助成によって為されたものである。政府は、本発明において所定の権利を有する。
Claims (28)
- 半導体デバイスであって、
ワイド・バンド・ギャップ半導体材料を含むドリフト領域を備える半導体層構造と、
前記半導体デバイスの活性領域内の前記ドリフト領域の上側部分内の遮蔽パターンと、
前記半導体デバイスの終端領域内の前記ドリフト領域の前記上側部分内の終端構造と、
前記半導体層構造の上側表面内へと延在するゲート・トレンチと
を備え、
前記半導体層構造は、前記終端構造の上方に延在し、且つ前記終端構造を少なくとも部分的に被覆する半導体層を含む、半導体デバイス。 - 前記遮蔽パターンの下部は、前記ゲート・トレンチの下部表面が延在するより先へ、前記ドリフト領域内へと下に延在し、前記終端構造は、ガード・リング又は接合終端拡張のうちの1つを備える、請求項1に記載の半導体デバイス。
- 前記ゲート・トレンチの前記下部表面及び側壁を少なくとも部分的に被覆する、前記ゲート・トレンチ内のゲート絶縁層と、
前記ゲート絶縁層上の前記ゲート・トレンチ内のゲート電極と、
前記半導体層構造の前記上側表面上の第1の接触部と、
前記半導体層構造の下側表面上の第2の接触部と
をさらに備え、
前記ドリフト領域の前記上側部分は、前記ドリフト領域の下側部分より少なくとも3倍大きいドーピング濃度を有する電流広がり層を備える、請求項2に記載の半導体デバイス。 - 前記半導体層は、1×1016/cm3未満のドーピング密度を有する、請求項1に記載の半導体デバイス。
- 前記ゲート・トレンチの対向する側部上に第1及び第2のウェル領域をさらに備え、前記ドリフト領域は、第1の導電型を有し、前記ウェル領域は、前記第1の導電型の反対である第2の導電型を有する、請求項1から4までのいずれかに記載の半導体デバイス。
- 前記第1及び第2のウェル領域の上側表面は、前記半導体層の上側表面と同一面である、請求項5に記載の半導体デバイス。
- 前記第1及び第2のウェル領域は、前記第2の導電型を有するドーパントを注入される、注入されたウェル領域を備える、請求項5に記載の半導体デバイス。
- 前記ゲート・トレンチから間をおいて離隔される前記第1のウェル領域の第1の部分は、第1のドーパント濃度を有し、前記ゲート・トレンチに直接的に近接する前記半導体デバイスのチャネルは、前記第1のドーパント濃度より低い第2のドーパント濃度を有する、請求項5に記載の半導体デバイス。
- 前記第1のウェル領域は、前記半導体層構造の下側表面に平行に延在する軸に沿って、前記第2の導電型のドーパントの不均一なドーパント濃度を有する、請求項5に記載の半導体デバイス。
- 前記ドリフト領域は、第1の導電型を有するドーパントによってドープされ、前記終端領域内にある前記半導体層の部分は、1×1015/cm3未満の濃度で前記第1の導電型を有するドーパントによってドープされる、請求項1から9までのいずれかに記載の半導体デバイス。
- 前記ドリフト領域は、第1の導電型を有するドーパントによってドープされ、前記終端領域内にある前記半導体層の部分は、1×1015/cm3未満の濃度で前記第2の導電型を有するドーパントによってドープされる、請求項1から10までのいずれかに記載の半導体デバイス。
- 半導体デバイスであって、
第1の導電型を有するドーパントによってドープされるワイド・バンド・ギャップ半導体材料を含むドリフト領域を備える半導体層構造と、
前記半導体層構造の上側表面内へと延在するゲート・トレンチと、
前記ドリフト領域の上側部分内の、前記第1の導電型の反対である第2の導電型を有するドーパントによってドープされる第1の遮蔽パターンと、
前記ゲート・トレンチの第1の側部上の、前記第1の遮蔽パターンの上方の第1のウェル領域であって、前記第2の導電型を有するドーパントによってドープされる第1のウェル領域と、
前記ドリフト領域の前記上側部分内の、前記第2の導電型を有するドーパントによってドープされる第2の遮蔽パターンと、
前記第1の側部の反対である前記ゲート・トレンチの第2の側部上の、前記第2の遮蔽パターンの上方の第2のウェル領域であって、前記第2の導電型を有するドーパントによってドープされる第2のウェル領域と、
前記ドリフト領域の前記上側部分内の、前記第2の導電型を有するドーパントによってドープされる終端構造と
を備え、
前記第1のウェル領域と前記ゲート・トレンチの前記第1の側部との間にある、前記半導体デバイスのチャネルは、前記第1のウェル領域より低い、前記第2の導電型のドーパントの濃度を有する、半導体デバイス。 - 前記半導体層構造は、前記終端構造の上方に延在し、且つ前記終端構造を少なくとも部分的に被覆する、前記半導体デバイスの終端領域内の半導体層を含む、請求項12に記載の半導体デバイス。
- 前記終端領域内の前記半導体層は、前記第2の導電型を有するドーパントによってドープされる、請求項13に記載の半導体デバイス。
- 前記終端領域内の前記半導体層は、1×1016/cm3未満の前記第2の導電型のドーパントのドーピング密度を有する、請求項14に記載の半導体デバイス。
- 前記終端構造は、複数の終端要素を備え、前記終端要素の下部表面は、前記第1の遮蔽パターンの下部表面と同一面である、請求項12から15までのいずれかに記載の半導体デバイス。
- 前記第1の遮蔽パターンの下部表面は、前記ゲート・トレンチの下部表面が延在するより先へ、前記ドリフト領域内へと下に延在する、請求項12から16までのいずれかに記載の半導体デバイス。
- 前記第1及び第2のウェル領域の上側表面は、前記終端領域内の前記半導体層の上側表面と同一面である、請求項12から17までのいずれかに記載の半導体デバイス。
- 前記第1のウェル領域は、第1の濃度で第2の導電型のドーパントによってドープされる第1の部分と、前記第1の濃度の少なくとも5倍を超過する第2の濃度で第2の導電型のドーパントによってドープされる第2の部分とを含み、前記第2の領域は、前記第1のウェル領域の上部表面から前記第1のウェル領域の下部表面へと延在する、請求項12から18までのいずれかに記載の半導体デバイス。
- 半導体デバイスを形成する方法であって、
ワイド・バンド・ギャップ半導体のドリフト領域を基板上に形成するステップであって、前記ドリフト領域及び前記半導体基板はそれぞれ、第1の導電型を有するドーパントによってドープされる、ステップと、
終端構造を前記半導体デバイスの終端領域内に形成し、且つ遮蔽パターンを前記半導体デバイスの活性領域内に形成するために、第2の導電型のドーパントを前記ドリフト領域の上側表面内へと注入するステップであって、前記第2の導電型は、前記第1の導電型の反対である、ステップと、
半導体層を、エピタキシャル成長によって前記ドリフト領域の前記上側表面上に形成するステップであって、前記半導体層は、成長の際に1×1016/cm3未満のドーパント濃度を有する、ステップと、
第2の導電型のドーパントを、前記活性領域内の前記半導体層内へと注入するステップと、
ゲート・トレンチを、前記半導体層内に形成するステップであって、前記ゲート・トレンチは、前記ドリフト領域の前記上側表面内へと延在する、ステップと、
ゲート絶縁層及びゲート電極を、各ゲート・トレンチ内に順次形成するステップと
を含み、
前記ゲート・トレンチの対向する側部上の前記活性領域内の前記半導体層の部分は、それぞれの第2の導電型ウェル領域を備える、方法。 - 前記半導体層は、第1の導電型のドーパントによってドープされる、請求項20に記載の方法。
- 前記半導体層は、第2の導電型のドーパントによってドープされる、請求項20に記載の方法。
- 前記ゲート・トレンチに近接する前記第2の導電型ウェル領域のそれぞれの部分は、チャネル領域を備え、各チャネル領域は、前記それぞれの第2の導電型ウェル領域の残部より低い、前記第2の導電型のドーパントの濃度を有する、請求項20から22までのいずれかに記載の方法。
- 前記第2の導電型ウェル領域の上側表面は、前記半導体層の上側表面と同一面である、請求項20から23までのいずれかに記載の方法。
- 前記終端構造は、ガード・リング及び接合終端拡張のうちの1つを備える、請求項20から24までのいずれかに記載の方法。
- 前記ゲート・トレンチは、前記第2の導電型のドーパントが前記活性領域内の前記半導体層内へと注入される前に形成される、請求項20から25までのいずれかに記載の方法。
- 前記ゲート・トレンチは、前記第2の導電型のドーパントが前記活性領域内の前記半導体層内へと注入された後に形成される、請求項20から26までのいずれかに記載の方法。
- 前記ワイド・バンド・ギャップ半導体は、炭化ケイ素を含む、請求項20から27までのいずれかに記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/372,505 | 2016-12-08 | ||
US15/372,505 US10861931B2 (en) | 2016-12-08 | 2016-12-08 | Power semiconductor devices having gate trenches and buried edge terminations and related methods |
PCT/US2017/054224 WO2018106326A1 (en) | 2016-12-08 | 2017-09-29 | Power semiconductor devices having gate trenches and buried termination structures and related methods |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020214806A Division JP7182594B2 (ja) | 2016-12-08 | 2020-12-24 | ゲート・トレンチと、埋め込まれた終端構造とを有するパワー半導体デバイス、及び、関連方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2019537274A true JP2019537274A (ja) | 2019-12-19 |
JP2019537274A5 JP2019537274A5 (ja) | 2020-02-06 |
JP6817443B2 JP6817443B2 (ja) | 2021-01-20 |
Family
ID=60043395
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2019530787A Active JP6817443B2 (ja) | 2016-12-08 | 2017-09-29 | ゲート・トレンチと、埋め込まれた終端構造とを有するパワー半導体デバイス、及び、関連方法 |
JP2020214806A Active JP7182594B2 (ja) | 2016-12-08 | 2020-12-24 | ゲート・トレンチと、埋め込まれた終端構造とを有するパワー半導体デバイス、及び、関連方法 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020214806A Active JP7182594B2 (ja) | 2016-12-08 | 2020-12-24 | ゲート・トレンチと、埋め込まれた終端構造とを有するパワー半導体デバイス、及び、関連方法 |
Country Status (6)
Country | Link |
---|---|
US (2) | US10861931B2 (ja) |
EP (1) | EP3552239A1 (ja) |
JP (2) | JP6817443B2 (ja) |
KR (1) | KR102204272B1 (ja) |
CN (1) | CN110036486B (ja) |
WO (1) | WO2018106326A1 (ja) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10355132B2 (en) | 2017-03-20 | 2019-07-16 | North Carolina State University | Power MOSFETs with superior high frequency figure-of-merit |
JP7006280B2 (ja) * | 2018-01-09 | 2022-01-24 | 富士電機株式会社 | 半導体装置 |
US10777670B2 (en) * | 2018-06-25 | 2020-09-15 | Pakal Technologies, Inc. | Vertical insulated gate turn-off thyristor with intermediate p+ layer in p-base formed using epitaxial layer |
US11031461B2 (en) * | 2019-08-25 | 2021-06-08 | Genesic Semiconductor Inc. | Manufacture of robust, high-performance devices |
US20240014255A1 (en) * | 2020-01-03 | 2024-01-11 | Lg Electronics Inc. | Metal-oxide-semiconductor field-effect transistor device, and manufacturing method therefor |
DE102021113470A1 (de) * | 2020-05-26 | 2021-12-02 | Hyundai Mobis Co., Ltd. | Leistungshalbleitervorrichtung und verfahren zur herstellung davon |
KR102531554B1 (ko) * | 2020-07-01 | 2023-05-11 | 서강대학교산학협력단 | 실리콘카바이드 트랜지스터 및 이의 제조방법 |
EP3975266A1 (en) * | 2020-09-28 | 2022-03-30 | Nexperia B.V. | Semiconductor device with improved junction termination extension region |
US20240055472A1 (en) * | 2020-12-18 | 2024-02-15 | mi2-factory GmbH | Electronic semiconductor component, and method for manufacturing a pretreated composite substrate for an electronic semiconductor component |
JP2022168904A (ja) * | 2021-04-27 | 2022-11-09 | 富士電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
US11894455B2 (en) * | 2021-09-22 | 2024-02-06 | Wolfspeed, Inc. | Vertical power devices fabricated using implanted methods |
EP4181212A1 (en) * | 2021-11-11 | 2023-05-17 | Infineon Technologies Dresden GmbH & Co . KG | Semiconductor device |
US11955567B2 (en) * | 2022-02-16 | 2024-04-09 | Leap Semiconductor Corp. | Wide-band gap semiconductor device and method of manufacturing the same |
US20230307529A1 (en) * | 2022-03-24 | 2023-09-28 | Wolfspeed, Inc. | Support shield structures for trenched semiconductor devices |
EP4325577A4 (en) * | 2022-04-14 | 2024-07-17 | Suzhou Loongspeed Semiconductor Tech Co Ltd | TRANSISTOR DEVICE AND METHOD OF MANUFACTURING SAME |
US20230369445A1 (en) * | 2022-05-13 | 2023-11-16 | Wolfspeed, Inc. | Vertical power devices having mesas and etched trenches therebetween |
CN114725090B (zh) * | 2022-05-24 | 2022-09-02 | 深圳芯能半导体技术有限公司 | 一种绝缘栅双极型晶体管及其制备方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008103529A (ja) * | 2006-10-19 | 2008-05-01 | Toyota Central R&D Labs Inc | 半導体装置 |
JP2009033036A (ja) * | 2007-07-30 | 2009-02-12 | Hitachi Ltd | 半導体装置及びこれを用いた電気回路装置 |
JP2014139967A (ja) * | 2013-01-21 | 2014-07-31 | Sumitomo Electric Ind Ltd | 炭化珪素半導体装置およびその製造方法 |
JP2014175518A (ja) * | 2013-03-11 | 2014-09-22 | Sumitomo Electric Ind Ltd | 炭化珪素半導体装置 |
JP2015204411A (ja) * | 2014-04-15 | 2015-11-16 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
JP2016092257A (ja) * | 2014-11-06 | 2016-05-23 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
Family Cites Families (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7221010B2 (en) | 2002-12-20 | 2007-05-22 | Cree, Inc. | Vertical JFET limited silicon carbide power metal-oxide semiconductor field effect transistors |
US7638841B2 (en) * | 2003-05-20 | 2009-12-29 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
US7405452B2 (en) * | 2004-02-02 | 2008-07-29 | Hamza Yilmaz | Semiconductor device containing dielectrically isolated PN junction for enhanced breakdown characteristics |
JP2006005275A (ja) * | 2004-06-21 | 2006-01-05 | Toshiba Corp | 電力用半導体素子 |
JP4356764B2 (ja) * | 2007-04-18 | 2009-11-04 | 株式会社デンソー | 炭化珪素半導体装置 |
US7989882B2 (en) | 2007-12-07 | 2011-08-02 | Cree, Inc. | Transistor with A-face conductive channel and trench protecting well region |
US8164139B2 (en) * | 2008-04-29 | 2012-04-24 | Force Mos Technology Co., Ltd. | MOSFET structure with guard ring |
US8232558B2 (en) | 2008-05-21 | 2012-07-31 | Cree, Inc. | Junction barrier Schottky diodes with current surge capability |
JP5409247B2 (ja) * | 2009-10-13 | 2014-02-05 | 三菱電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP2011091086A (ja) | 2009-10-20 | 2011-05-06 | Mitsubishi Electric Corp | 半導体装置 |
US8415671B2 (en) * | 2010-04-16 | 2013-04-09 | Cree, Inc. | Wide band-gap MOSFETs having a heterojunction under gate trenches thereof and related methods of forming such devices |
JP2013038329A (ja) * | 2011-08-10 | 2013-02-21 | Toshiba Corp | 半導体装置 |
JP5482745B2 (ja) * | 2011-08-10 | 2014-05-07 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
US9431249B2 (en) | 2011-12-01 | 2016-08-30 | Vishay-Siliconix | Edge termination for super junction MOSFET devices |
US8785278B2 (en) * | 2012-02-02 | 2014-07-22 | Alpha And Omega Semiconductor Incorporated | Nano MOSFET with trench bottom oxide shielded and third dimensional P-body contact |
JP2013219161A (ja) | 2012-04-09 | 2013-10-24 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
JP5812029B2 (ja) * | 2012-06-13 | 2015-11-11 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
JP5751213B2 (ja) | 2012-06-14 | 2015-07-22 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
JP5791821B2 (ja) * | 2012-10-18 | 2015-10-07 | 三菱電機株式会社 | 炭化珪素半導体装置およびその製造方法 |
US9496331B2 (en) * | 2012-12-07 | 2016-11-15 | Denso Corporation | Semiconductor device having vertical MOSFET with super junction structure, and method for manufacturing the same |
JP5983415B2 (ja) * | 2013-01-15 | 2016-08-31 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
US9306061B2 (en) | 2013-03-13 | 2016-04-05 | Cree, Inc. | Field effect transistor devices with protective regions |
US9142668B2 (en) | 2013-03-13 | 2015-09-22 | Cree, Inc. | Field effect transistor devices with buried well protection regions |
US9012984B2 (en) * | 2013-03-13 | 2015-04-21 | Cree, Inc. | Field effect transistor devices with regrown p-layers |
CN105190852B (zh) * | 2013-03-15 | 2018-09-11 | 美国联合碳化硅公司 | 改进的vjfet器件 |
JP2014241368A (ja) | 2013-06-12 | 2014-12-25 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
US10868169B2 (en) * | 2013-09-20 | 2020-12-15 | Cree, Inc. | Monolithically integrated vertical power transistor and bypass diode |
DE112014004583T5 (de) | 2013-10-04 | 2016-08-18 | Mitsubishi Electric Corporation | Siliciumcarbidhalbleiterbauteil und Verfahren zu dessen Herstellung |
KR101539880B1 (ko) * | 2014-01-02 | 2015-07-27 | 삼성전기주식회사 | 전력 반도체 소자 |
JP6485034B2 (ja) * | 2014-06-16 | 2019-03-20 | 富士電機株式会社 | 半導体装置の製造方法 |
JP6319454B2 (ja) * | 2014-10-24 | 2018-05-09 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP6479615B2 (ja) * | 2015-09-14 | 2019-03-06 | 株式会社東芝 | 半導体装置の製造方法 |
JP6693131B2 (ja) * | 2016-01-12 | 2020-05-13 | 富士電機株式会社 | 半導体装置 |
CN105977310B (zh) * | 2016-07-27 | 2019-06-04 | 电子科技大学 | 碳化硅功率器件终端结构及其制造方法 |
-
2016
- 2016-12-08 US US15/372,505 patent/US10861931B2/en active Active
-
2017
- 2017-09-29 KR KR1020197015584A patent/KR102204272B1/ko active IP Right Grant
- 2017-09-29 WO PCT/US2017/054224 patent/WO2018106326A1/en unknown
- 2017-09-29 JP JP2019530787A patent/JP6817443B2/ja active Active
- 2017-09-29 CN CN201780074972.7A patent/CN110036486B/zh active Active
- 2017-09-29 EP EP17781346.6A patent/EP3552239A1/en active Pending
-
2020
- 2020-11-19 US US16/952,757 patent/US11837629B2/en active Active
- 2020-12-24 JP JP2020214806A patent/JP7182594B2/ja active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008103529A (ja) * | 2006-10-19 | 2008-05-01 | Toyota Central R&D Labs Inc | 半導体装置 |
JP2009033036A (ja) * | 2007-07-30 | 2009-02-12 | Hitachi Ltd | 半導体装置及びこれを用いた電気回路装置 |
JP2014139967A (ja) * | 2013-01-21 | 2014-07-31 | Sumitomo Electric Ind Ltd | 炭化珪素半導体装置およびその製造方法 |
JP2014175518A (ja) * | 2013-03-11 | 2014-09-22 | Sumitomo Electric Ind Ltd | 炭化珪素半導体装置 |
JP2015204411A (ja) * | 2014-04-15 | 2015-11-16 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
JP2016092257A (ja) * | 2014-11-06 | 2016-05-23 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
JP7182594B2 (ja) | 2022-12-02 |
US10861931B2 (en) | 2020-12-08 |
US11837629B2 (en) | 2023-12-05 |
CN110036486A (zh) | 2019-07-19 |
KR20190072631A (ko) | 2019-06-25 |
WO2018106326A1 (en) | 2018-06-14 |
EP3552239A1 (en) | 2019-10-16 |
CN110036486B (zh) | 2023-05-26 |
JP2021048423A (ja) | 2021-03-25 |
US20180166530A1 (en) | 2018-06-14 |
US20210098568A1 (en) | 2021-04-01 |
JP6817443B2 (ja) | 2021-01-20 |
KR102204272B1 (ko) | 2021-01-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP7182594B2 (ja) | ゲート・トレンチと、埋め込まれた終端構造とを有するパワー半導体デバイス、及び、関連方法 | |
JP7309840B2 (ja) | イオン注入側壁を有するゲート・トレンチを備えるパワー半導体デバイス及び関連方法 | |
US11791378B2 (en) | Superjunction power semiconductor devices formed via ion implantation channeling techniques and related methods | |
US8592894B2 (en) | Method of forming a power semiconductor device and power semiconductor device | |
JP5002148B2 (ja) | 半導体装置 | |
US11961904B2 (en) | Semiconductor device including trench gate structure and buried shielding region and method of manufacturing | |
WO2015015808A1 (ja) | 炭化珪素半導体装置およびその製造方法 | |
US9960268B2 (en) | Semiconductor devices, power semiconductor devices, and methods for forming a semiconductor device | |
US11764295B2 (en) | Gate trench power semiconductor devices having improved deep shield connection patterns | |
US20230147611A1 (en) | Feeder design with high current capability | |
WO2023112547A1 (ja) | 半導体装置 | |
KR101870823B1 (ko) | 전력 반도체 소자 및 그 제조방법 | |
KR20180057064A (ko) | 전력 반도체 소자 및 그 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190607 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20190607 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20200722 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20200722 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20201022 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20201202 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20201224 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6817443 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |