JP2019153647A - Manufacturing method of semiconductor epitaxial wafer - Google Patents

Abstract

To provide a manufacturing method of a semiconductor epitaxial wafer capable of having higher gettering ability even under the same cluster ion implantation condition.SOLUTION: A manufacturing method of a semiconductor epitaxial wafer according to the present invention includes a first step of implanting multi-element cluster ions including three elements of carbon, hydrogen, and oxygen as constituent elements on the surface of the semiconductor wafer and forming a modified layer in which the constituent elements of the multi-element cluster ions are dissolved in a surface layer portion of the semiconductor wafer, a second step of performing a defect formation heat treatment for increasing the defect density of black spot-like defects formed in the modified layer after the first step, and a third step of forming an epitaxial layer on the modified layer of the semiconductor wafer after the second step.SELECTED DRAWING: Figure 5

Description

  The present invention relates to a method for manufacturing a semiconductor epitaxial wafer and a semiconductor epitaxial wafer. The present invention particularly relates to a method of manufacturing a semiconductor epitaxial wafer that exhibits higher gettering ability.

  Metal contamination is a factor that degrades the characteristics of semiconductor devices. For example, in a back-illuminated solid-state imaging device, metal mixed in a semiconductor epitaxial wafer serving as the substrate of this device causes a dark current of the solid-state imaging device to increase and causes a defect called a white defect. The back-illuminated solid-state image sensor has a wiring layer, etc., placed below the sensor part, so that external light can be taken directly into the sensor and clearer images and videos can be taken even in dark places. In recent years, it has been widely used in mobile phones such as digital video cameras and smartphones. Therefore, it is desired to reduce white defect as much as possible.

  Metal contamination in the semiconductor element substrate mainly occurs in the manufacturing process of the semiconductor epitaxial wafer and the manufacturing process (device manufacturing process) of the solid-state imaging device. Metal contamination in the former semiconductor epitaxial wafer manufacturing process is caused by heavy metal particles from the components of the epitaxial growth furnace, or because the chlorine gas is used as the furnace gas during epitaxial growth, the piping material is corroded by metal. The thing by the heavy metal particle to generate | occur | produce is considered. In recent years, these metal contaminations have been improved to some extent by replacing the constituent materials of the epitaxial growth furnace with materials having excellent corrosion resistance, but are not sufficient. On the other hand, in the latter manufacturing process of the solid-state imaging device, there is a concern about heavy metal contamination of the semiconductor epitaxial wafer during each process such as ion implantation, diffusion and oxidation heat treatment.

  For this reason, generally, metal contamination of the semiconductor epitaxial wafer is avoided by forming a gettering layer for capturing metal on the semiconductor epitaxial wafer.

  Here, as a technique for forming the gettering layer, there is a technique of irradiating cluster ions prior to the formation of the epitaxial layer. Patent Document 1 discloses a cluster ion implantation technique including carbon, hydrogen, and oxygen as constituent elements in a method for manufacturing a semiconductor epitaxial wafer. Patent Document 1 discloses a relatively large size black spot-like defect (second black spot-like defect in Patent Document 1) estimated to be caused by interstitial silicon by cluster ion implantation including three elements of carbon, hydrogen, and oxygen. ) Is also disclosed. It is suggested from the experimental results of Patent Document 1 that this black spot defect functions as a powerful gettering site.

JP 2017-157613 A

  By using the cluster ion implantation technique disclosed in Patent Document 1, a semiconductor epitaxial wafer having an extremely excellent gettering capability can be obtained. However, the formation mechanism and characteristics of gettering sites by cluster ion implantation have been clarified to some extent, but are still under study. In particular, there are many unclear points regarding multi-element cluster ions that contain one or more other elements in addition to carbon and hydrogen as constituent elements of cluster ions. Hereinafter, in this specification, when three or more kinds of elements are included in the constituent elements of the cluster ions, they are referred to as “multi-element cluster ions”.

  Here, in order to further increase the gettering capability of the modified layer in Patent Document 1, it is effective to increase the dose of cluster ions, for example. However, if the dose amount is increased too much, many epitaxial defects may occur in the epitaxial layer formed on the modified layer. Thus, there is a limit to the improvement of the gettering ability by increasing the dose.

  Therefore, establishment of a new method for further enhancing the gettering ability is expected from a viewpoint other than the cluster ion implantation conditions.

  Accordingly, an object of the present invention is to provide a method for manufacturing a semiconductor epitaxial wafer that can have higher gettering ability even under the same cluster ion implantation conditions.

  In order to solve the above problems, the present inventor has intensively studied. Then, the present inventor examined whether the gettering ability can be increased by adjusting the epitaxial growth conditions instead of the cluster ion implantation conditions. Here, a general conceptual diagram of a heat treatment sequence accompanying the epitaxial growth process will be described with reference to FIG. This heat treatment sequence includes (i) a temperature rising process from when the semiconductor wafer is put into the epitaxial growth furnace until reaching the epitaxial growth temperature, (ii) an epitaxial growth process for growing an epitaxial layer on the surface of the semiconductor wafer, (iii) epitaxial After the layer formation, the resulting semiconductor epitaxial wafer can be broadly divided into three processes: a temperature lowering process until the semiconductor epitaxial wafer is taken out from the epitaxial growth furnace.

  As a result of intensive studies by the present inventors, it has been found that the number of black spot defects that become gettering sites greatly depends on the above (i) temperature rising process. And, the present inventor can obtain higher gettering ability even if the cluster ion implantation conditions are the same by performing a temperature raising process that also serves as a defect formation heat treatment for increasing the defect density of the black spot-like defects. I found out. The present invention has been completed based on the above findings, and the gist of the present invention is as follows.

(1) A multi-element cluster ion containing three elements of carbon, hydrogen and oxygen as constituent elements is implanted on the surface of the semiconductor wafer, and the constituent elements of the multi-element cluster ion are dissolved in the surface layer of the semiconductor wafer. A first step of forming the modified layer,
After the first step, a second step of performing a defect formation heat treatment for increasing the defect density of black spot-like defects formed in the modified layer;
Subsequent to the second step, a third step of forming an epitaxial layer on the modified layer of the semiconductor wafer includes a method for producing a semiconductor epitaxial wafer.

(2) The heat treatment condition of the defect forming heat treatment in the second step is that a first holding time for holding the semiconductor wafer in a first temperature region below 800 ° C. is 0 second or more and 45 seconds or less, and The method for producing a semiconductor epitaxial wafer according to (1), wherein the second holding time for holding the semiconductor wafer in the second temperature region of 800 ° C. or higher and lower than 1000 ° C. after the temperature is raised from the temperature region is 30 seconds or longer. .

(3) The method for producing a semiconductor epitaxial wafer according to (1) or (2) above, wherein the constituent elements of the multi-element cluster ions are composed of three elements of carbon, hydrogen, and oxygen.

(4) The method for producing a semiconductor epitaxial wafer according to any one of (1) to (3), wherein the semiconductor wafer is a silicon wafer.

  ADVANTAGE OF THE INVENTION According to this invention, even if cluster ion implantation conditions are the same, the manufacturing method of the semiconductor epitaxial wafer which can have higher gettering capability can be provided.

It is a conceptual diagram which shows the general heat processing sequence accompanying epitaxial growth. It is a figure which shows TEM sectional drawing of the board | substrate interface vicinity of the epitaxial silicon wafer in the reference experiment example 1. FIG. It is a figure which shows TEM sectional drawing of the board | substrate interface vicinity of the epitaxial silicon wafer in the reference experiment example 2. FIG. It is a schematic cross section explaining one mode of a heat treatment sequence accompanying epitaxial growth according to an embodiment of the present invention. It is a schematic cross section explaining the manufacturing method of semiconductor epitaxial wafer 100 by one embodiment of the present invention.

  Prior to the detailed description of the embodiments, first, experiments (reference experiment examples 1 and 2) that led to the completion of the present invention will be described.

[Reference Experimental Example 1]
A silicon wafer (diameter: 300 mm, thickness: 725 μm, dopant type: phosphorus, resistivity: 10 Ω · cm) obtained from a CZ single crystal silicon ingot was prepared. Next, using a cluster ion generator (manufactured by Nissin Ion Instruments Co., Ltd., model number: CLARIS (registered trademark)), multi-element cluster ions composed of CH ₃ O obtained by cluster ionizing diethyl ether (C ₄ H ₁₀ O), Implantation was performed on the surface of the silicon wafer under the condition of an acceleration voltage of 80 keV / Cluster. Moreover, the dose amount of the cluster ions was set to 1.0 × 10 ¹⁵ cluster / cm ² .

Next, the silicon wafer was transferred into a rapid heat treatment apparatus (manufactured by Hisol, model number AccuThermo Aw610). Then, in order to perform heat treatment simulating epitaxial growth at 1100 ° C. for 300 seconds (hereinafter, simulated growth heat treatment), the heat treatment was performed under the following conditions in a nitrogen gas atmosphere.
Furnace temperature: 500 ° C
Rate of temperature rise to simulated growth temperature: 60 ° C / s

(Samples 2-4)
Samples 2 to 4 were prepared in the same manner as Sample 1 except that the temperature increase rate of Sample 1 was changed to 15 ° C / s, 8 ° C / s, and 4 ° C / s.

  TEM cross sections before and after performing simulated growth heat treatment for each of samples 1 to 4 were obtained. The results are shown in FIG.

[Reference Experiment Example 2]
(Sample 5)
Under the same conditions as Sample 1, multi-element cluster ions made of CH ₃ O were implanted into the surface of the silicon wafer. Next, in order to perform a simulated growth heat treatment at 800 ° C. for 300 seconds, as in Reference Experimental Example 1, the silicon wafer after the cluster ion implantation is transferred into a high-speed heat treatment apparatus (manufactured by Hisol Corporation), and the heat treatment is performed under the following conditions. went.
Furnace temperature: 500 ° C
Rate of temperature rise to simulated growth temperature: 8 ° C / s

(Samples 6-8)
Samples 6 to 8 were prepared in the same manner as Sample 5, except that the heat treatment temperature 800 ° C. of the simulated growth heat treatment in Sample 5 was changed to 900 ° C., 1000 ° C., and 1100 ° C.

  Each of Samples 5 to 8 was subjected to a heat treatment simulating epitaxial growth, and later obtained TEM cross sections. The results are shown in FIG.

<Consideration of Reference Experiment Examples 1 and 2>
First, based on FIG. 2 according to Reference Experimental Example 1, it is confirmed that the defect density of the black spot-like defects to be formed does not greatly depend on the temperature rising rate before the simulated growth heat treatment at 1100 ° C. for 300 seconds. On the other hand, after the simulated growth heat treatment, although the defect density of the black spot-like defects is reduced, the amount of reduction greatly depends on the temperature increase rate.

  Based on FIG. 3 according to Reference Experimental Example 2, it was confirmed that the amount of black spot defects generated by simulated growth heat treatment at 800 ° C., 900 ° C., and 1000 ° C. was relatively large.

  Considering the above results comprehensively, when a silicon wafer implanted with cluster ions is subjected to a heat treatment of 800 ° C. or more and less than 1000 ° C., black spot defects grow, but at less than 800 ° C., the seeds of black spot defects disappear. It can be hypothesized that black spot defects decompose when subjected to heat treatment at 1000 ° C. or higher. A heat treatment sequence based on this hypothesis is shown in FIG. In Samples 1 to 3, although the transit time of the temperature zone where the seeds of black spot defects of less than 800 ° C. disappear is relatively short, the transit time of the temperature zone where the black spot defects grow is relatively short. In sample 4, although the passage time of the temperature zone in which the seeds of black spot defects below 800 ° C. disappear is relatively long, the time during which black spot defects grow when subjected to heat treatment at 800 ° C. or higher and lower than 1000 ° C. is also long. Therefore, as in the TEM cross-sectional photograph in the upper part of FIG. 2, the defect density of the black spot-like defects is observed in the same level before the simulated heat treatment. Then, as shown in the TEM cross-sectional photograph in the lower part of FIG. 2, it is presumed that after the simulated heat treatment, there is a significant difference in the defect density of the black spot defects.

  Therefore, the present inventor can improve the gettering ability by performing a defect formation heat treatment for increasing the defect density of the black spot defects formed in the modified layer before the epitaxial layer is formed. I found out.

  Based on the above experimental results, an impurity diffusion behavior prediction method for an epitaxial silicon wafer according to an embodiment of the present invention will be described with reference to the above-described heat treatment sequence in FIG. 4 and the schematic cross-sectional view showing the manufacturing flow in FIG. In FIG. 5, for convenience of explanation, the thicknesses of the modified layer 18 and the epitaxial layer 20 are exaggerated with respect to the semiconductor wafer 10, unlike the actual thickness ratio.

(Method of manufacturing semiconductor epitaxial wafer)
In the method of manufacturing a semiconductor epitaxial wafer 100 according to an embodiment of the present invention, a multi-element cluster ion 16 containing three or more elements as constituent elements is implanted into the surface 10A of the semiconductor wafer 10 and the surface layer portion of the semiconductor wafer 10 is injected. The first step (FIGS. 5A and 5B) for forming the modified layer 18 in which the constituent elements of the multi-element cluster ions 16 are dissolved, and the black spots formed in the modified layer 18 after the first step. A second step of performing a defect formation heat treatment for increasing the defect density of the shaped defects D, and a third step of forming an epitaxial layer on the modified layer 18 of the semiconductor wafer (step in FIG. 5) following the second step. C). Here, the constituent elements of the multi-element cluster ion 16 include carbon, hydrogen, and oxygen. Hereinafter, for simplification, a multi-element cluster ion including carbon, hydrogen, and oxygen as constituent elements may be abbreviated as “CHO cluster”. The CHO cluster may contain elements other than carbon, hydrogen and oxygen as constituent elements, but can also be composed of only three elements of carbon, hydrogen and oxygen. Step C in FIG. 5 is a schematic cross-sectional view of the semiconductor epitaxial wafer 100 obtained as a result of this manufacturing method. The epitaxial layer 20 becomes a device layer for manufacturing a semiconductor element such as a back-illuminated solid-state imaging element. An epitaxial silicon wafer in which the semiconductor wafer 10 is a silicon wafer and the epitaxial layer 20 is a silicon epitaxial layer is one preferred embodiment of the semiconductor epitaxial wafer 100. Hereinafter, the details of each process will be described sequentially.

<First step>
In the first step (steps A and B in FIG. 2) in the present invention, as described above, the multi-element cluster ions 16 containing three or more elements as the constituent elements are implanted into the surface 10A of the semiconductor wafer 10, and the semiconductor wafer 10 The modified layer 18 in which the constituent elements of the multi-element cluster ions 16 are dissolved is formed on the surface layer portion. The multi-element cluster ions 16 used in the first step contain carbon, hydrogen, and oxygen as constituent elements as described above.

<< Semiconductor wafer >>
Examples of the semiconductor wafer 10 include a bulk single crystal wafer made of silicon or a compound semiconductor (GaAs, GaN, SiC) and having no epitaxial layer on the surface. When manufacturing a back-illuminated solid-state imaging device, a bulk single crystal silicon wafer is generally used. Moreover, the semiconductor wafer 10 can use what sliced the single crystal silicon ingot grown by the Czochralski method (CZ method) and the floating zone melting method (FZ method) with the wire saw etc. In order to obtain a higher gettering capability, carbon and / or nitrogen may be added to the semiconductor wafer 10. Furthermore, a predetermined concentration of an arbitrary dopant may be added to the semiconductor wafer 10 to form a so-called n + type or p + type, or n− type or p− type substrate.

  Further, as the semiconductor wafer 10, an epitaxial wafer in which a semiconductor epitaxial layer is formed on the surface of a bulk semiconductor wafer may be used. For example, an epitaxial silicon wafer in which a silicon epitaxial layer is formed on the surface of a bulk single crystal silicon wafer. This silicon epitaxial layer can be formed under general conditions by the CVD method. The epitaxial layer preferably has a thickness in the range of 0.1 to 20 μm, and more preferably in the range of 0.2 to 10 μm.

<< Cluster ion irradiation >>
Here, the “cluster ion” in this specification refers to an atomic aggregate of various numbers of atoms by causing electrons to collide with the gaseous molecules and dissociating the bonding of the gaseous molecules by an electron impact method. It is obtained by ionizing the atomic aggregate, mass-separating ionized atomic aggregates having various numbers of atoms, and extracting ionized atomic aggregates having specific mass numbers. In other words, a cluster ion is an ionization that gives a positive or negative charge to a cluster formed by agglomeration of multiple atoms, and is a monoatomic ion such as a carbon ion or a monomolecular ion such as a carbon monoxide ion. Is clearly distinguished.

  When irradiating a silicon wafer as the semiconductor wafer 10 with cluster ions, when the cluster ions are irradiated onto the silicon wafer, the energy instantaneously becomes a high temperature of about 1350 to 1400 ° C. and the silicon melts. Thereafter, the silicon is rapidly cooled, and the constituent elements of cluster ions are dissolved in the vicinity of the surface in the silicon wafer. That is, the “modified layer” in the present specification means a layer in which the constituent elements of the ions to be irradiated are solid-solved at the interstitial position or the substitution position of the crystal on the surface portion of the silicon wafer. For example, when attention is focused on carbon as an example of a constituent element, the concentration profile of carbon in the depth direction of a silicon wafer by secondary ion mass spectrometry (SIMS) depends on the acceleration voltage and cluster size of cluster ions. However, it becomes sharper than in the case of monomer ions, and the thickness of the locally existing carbon (that is, the modified layer) of the irradiated carbon is approximately 500 nm or less (for example, about 50 to 400 nm). Therefore, when the constituent elements of the multi-element cluster ions 16 include an element that contributes to gettering such as carbon, the modified layer 18 functions as a strong gettering site.

  In the present embodiment, the multi-element cluster ions 16 to be implanted are CHO clusters, and contain carbon, hydrogen and oxygen as constituent elements. The carbon atom at the lattice position has a smaller covalent bond radius than that of the silicon single crystal, and a contraction field of the silicon crystal lattice is formed, so that the gettering ability to attract impurities between the lattices is enhanced. And it is thought that the black-spot-like defect D is formed through the heat treatment accompanying the subsequent epitaxial growth by injecting carbon and oxygen in the form of CHO clusters. Hydrogen is also advantageous in that it contributes to improvement of device characteristics when a semiconductor device is formed using the semiconductor epitaxial wafer 100 obtained by the present embodiment by passivating point defects in the silicon epitaxial layer 20.

<Second step>
In the second step after the first step, defect formation heat treatment is performed to increase the defect density of the black spot-like defects D formed in the modified layer 18. As described with reference experimental examples 1 and 2, the defect density of the black spot-like defects D greatly depends on the temperature in the temperature raising process until the epitaxial growth temperature is reached. Therefore, by performing heat treatment for defect formation before the epitaxial layer is formed, the defect density of the black spot-like defects D in the finally obtained semiconductor epitaxial wafer 100 can be increased, and the gettering ability is improved. be able to.

  The heat treatment conditions of the defect formation heat treatment in the second step are not limited as long as the defect density of the black spot defects D can be increased, but the first holding time for holding the semiconductor wafer in the first temperature region below 800 ° C. is 0 second or more 45 Preferably, the second holding time for holding the semiconductor wafer in the second temperature region of 800 ° C. or higher and lower than 1000 ° C. after the temperature rise from the first temperature region is 30 seconds or longer.

  As described above with reference to FIG. 4, the first temperature region corresponds to a temperature zone in which defect seeds disappear, and therefore it is preferable to make the time for passing through this temperature zone as short as possible. Therefore, the first holding time is preferably 45 seconds or less, more preferably 30 seconds or less, further preferably 10 seconds or less, and particularly preferably 5 seconds or less. Further, if the furnace introduction temperature at which the semiconductor wafer 10 is introduced into the epitaxial growth furnace is 800 ° C. or higher, the first holding time can be set to 0 seconds.

  Further, since the second temperature region corresponds to a temperature zone in which defects grow, it is preferable that the time for passing through this temperature zone is relatively long. For this reason, the second holding time is preferably 30 seconds or more, and more preferably 60 seconds or more. Although it is considered that the longer the second holding time is, the upper limit of the second holding time can be set to 300 seconds in consideration of manufacturing efficiency.

  In addition, in FIG. 4, although the aspect hold | maintained at a constant temperature in a 2nd temperature range is illustrated, this invention is not limited to this aspect at all. For example, in the second temperature range, the second holding time may be realized by raising the temperature rising rate at several degrees C / sec (for example, 1 to 3 ° C./sec) or at a slower temperature rising rate. Or, the temperature rise and the holding at a constant temperature may be repeated.

  The defect formation heat treatment in this step is different from the recovery heat treatment for crystallinity recovery. The recovery heat treatment for recovering crystallinity is for recovering the amorphous state formed by cluster ion implantation, and it is necessary to perform a heat treatment at a relatively high temperature for a relatively long time than the defect formation heat treatment.

<Third step>
Subsequent to the second step, a third step of forming the epitaxial layer 20 on the modified layer 18 of the semiconductor wafer 10 is performed (step C in FIG. 5). Examples of the epitaxial layer 18 to be formed include a silicon epitaxial layer, which can be formed under general conditions. In this case, for example, a source gas such as dichlorosilane or trichlorosilane is introduced into the chamber using hydrogen as a carrier gas, and the growth temperature varies depending on the source gas used, but the CVD method is used at a temperature in the range of 1000 to 1200 ° C. Thus, epitaxial growth can be performed on the semiconductor wafer 10. The epitaxial layer 18 preferably has a thickness in the range of 1 to 15 μm. If it is less than 1 μm, the resistivity of the epitaxial layer 18 may change due to outdiffusion of the dopant from the semiconductor wafer 10, and if it exceeds 15 μm, the spectral sensitivity characteristics of the solid-state imaging device are affected. Because there is a fear.

  Although the defect density of the black spot-like defects D after the third process can be lower than the defect density of the black spot-like defects D immediately after the second process, the defect density heat treatment in the second process becomes higher than the defect density formed conventionally. . Therefore, even if the cluster ion implantation conditions are the same, the gettering capability of the obtained semiconductor epitaxial wafer 100 can be made significantly higher than before.

  The black spot defect D in the present specification is a defect observed as a black spot in the modified layer 18 when the cleaved cross section of the semiconductor epitaxial wafer 100 is observed in a bright mode with a TEM. Excludes defects as small as about nm. The size of the black spot defect D is 15 nm or more and 100 nm or less, and “the size of the black spot defect” is the diameter of the defect in the TEM image. When the black spot-like defect D is not circular or has a shape that cannot be regarded as a circle, the diameter is approximated to a circle by using a circumscribed circle having the smallest diameter that includes the black spot-like defect D. Further, the “defect density” of black spot-like defects is defined by the number of defects per predetermined area in the region where black spot-like defects D exist in the TEM image, and the final thickness of the sample used for the TEM observation at that time. The

  Below, the irradiation aspect of the multi-element cluster ion in this embodiment is demonstrated.

  The constituent elements of the multi-element cluster ions 16 to be irradiated are not particularly limited as long as they include carbon, hydrogen, and oxygen. Examples of elements that can be further included as constituent elements of the multi-element cluster ion 16 include boron, phosphorus, arsenic, and antimony.

The compound to ionize is not particularly limited, examples of the compound capable ionization, such as diethyl ether _{(C 4 H} 10 O), ethanol _{(C 2 H} 6 O), and diethyl ketone _{(C 5 H 10} O) Can be used. In particular, clusters C _n H _m O _l (l, m, n are independent of each other, 1 ≦ n ≦ 16, 1 ≦ m ≦ 16, 1 ≦ l ≦ 16) generated from diethyl ether, ethanol, or the like are used. It is preferable. In particular, the number of carbon atoms in the cluster ion is preferably 16 or less, and the number of oxygen atoms in the cluster ion is preferably 16 or less. This is because it is easy to control a small-sized cluster ion beam. For example, if trimethyl phosphite (C ₃ H ₉ O ₃ P) or the like is used, it is possible to include phosphorus in the constituent elements of the multi-element cluster ion 16 in addition to carbon, hydrogen, and oxygen.

  The cluster size can be appropriately set to 2 to 100, preferably 60 or less, more preferably 50 or less. The cluster size can be adjusted by adjusting the gas pressure of the gas ejected from the nozzle, the pressure of the vacuum vessel, the voltage applied to the filament during ionization, and the like. The cluster size can be obtained by obtaining a cluster number distribution by mass spectrometry using a quadrupole high-frequency electric field or time-of-flight mass spectrometry and taking an average value of the number of clusters.

  The acceleration voltage of the cluster ion affects the peak position of the concentration profile in the depth direction of the constituent elements of the cluster ion together with the cluster size. In the present embodiment, the acceleration voltage of the multi-element cluster ions 16 can be greater than 0 keV / Cluster and less than 200 keV / Cluster, preferably 100 keV / Cluster or less, and more preferably 80 keV / Cluster or less. . For adjusting the acceleration voltage, two methods of (1) electrostatic acceleration and (2) high frequency acceleration are generally used. As the former method, there is a method in which a plurality of electrodes are arranged at equal intervals and an equal voltage is applied between them to create an equal acceleration electric field in the axial direction. As the latter method, there is a linear linac method in which ions are accelerated using a high frequency while running linearly.

Moreover, the dose amount of cluster ions can be adjusted by controlling the ion irradiation time. The dose of each element of carbon, hydrogen, and oxygen is determined by the cluster ion species and the dose of the cluster ion (Cluster / cm ² ). In this embodiment, the dose of the multi-element cluster ions 16 can be adjusted so that the dose of carbon is 1 × 10 ¹³ to 1 × 10 ¹⁷ atoms / cm ^2, and preferably the dose of carbon is 5 It is set to x10 ¹³ atoms / cm ² or more and 5 × 10 ¹⁶ atoms / cm ² or less. If the carbon dose is less than 1 × 10 ¹³ atoms / cm ² , sufficient gettering ability may not be obtained. If the carbon dose exceeds 1 × 10 ¹⁶ atoms / cm ² , the epitaxial layer 20 This is because there is a risk of damaging the surface of the film.

  The beam current value of the multi-element cluster ions 16 may be 50 μA or more and 5000 μA or less. Note that the beam current value of cluster ions can be adjusted, for example, by changing the decomposition conditions of the source gas in the ion source.

  The exemplary embodiments of the present invention have been described above, but the present invention is not limited to these embodiments.

(Trial example 1)
A silicon wafer (diameter: 300 mm, thickness: 725 μm, dopant type: phosphorus, resistivity: 10 Ω · cm) obtained from a CZ single crystal silicon ingot was prepared. Next, using a cluster ion generator (manufactured by Nissin Ion Instruments Co., Ltd., model number: CLARIS (registered trademark)), multi-element cluster ions composed of CH ₃ O obtained by cluster ionizing diethyl ether (C ₄ H ₁₀ O), The surface of the silicon wafer was irradiated under an injection condition of an acceleration voltage of 80 keV / Cluster. In addition, the dose amount of the cluster ions was set to 1.0 × 10 ¹⁵ clusters / cm ² (the dose amount of carbon was also 1.0 × 10 ¹⁵ atoms / cm ² ).

  Next, the silicon wafer was transferred into a single wafer epitaxial growth apparatus (Applied Materials) having a furnace temperature of 600 ° C. Next, the temperature rise time up to 800 ° C. is 5 seconds (temperature rise rate 40 ° C./s), and the temperature rise time from 800 ° C. to 1000 ° C. is 5 seconds (temperature rise rate 40 ° C./s). I let you. Subsequently, the temperature is raised to 1120 ° C. in the apparatus, hydrogen baking is performed for 30 seconds at the temperature, hydrogen is used as the carrier gas, trichlorosilane is used as the source gas, and the modified layer of the silicon wafer is formed using the CVD method at 1120 ° C. An epitaxial layer of silicon (thickness: 5 μm, dopant type: phosphorus, resistivity: 50 Ω · cm) was epitaxially grown on the surface on the side on which the silicon oxide was formed, and an epitaxial silicon wafer according to trial example 1 was fabricated.

(Trial examples 2 to 25)
As shown in Table 1 below, the temperature raising time up to 800 ° C. is 5 seconds (temperature raising rate 40 ° C./s), 10 seconds (temperature raising rate 20 ° C./s), 30 seconds (temperature raising rate 6.7 ° C.). / S), 45 seconds (temperature increase rate 6.7 ° C./s), 60 seconds (temperature increase rate 3.3 ° C./s), and the temperature increase time from 800 ° C. to 1000 ° C. is 5 seconds (temperature increase rate). 40 ° C./s), 10 seconds (temperature increase rate 20 ° C./s), 30 seconds (temperature increase rate 6.7 ° C./s), 60 seconds (temperature increase rate 3.3 ° C./s), 300 seconds (increase) Epitaxial silicon wafers according to trial examples 2 to 25 were produced in the same manner as trial example 1 except that the temperature rate was 0.67 ° C./s.

<Evaluation 1: Observation by TEM cross-sectional photograph>
About each of the epitaxial silicon wafer which concerns on trial examples 1-25, the cross section of the board | substrate interface vicinity was observed with TEM (Transmission Electron Microscope: Transmission electron microscope), and the defect density of the black spot-like defect was calculated | required. A defect having a defect size of 15 nm to 100 nm or less observed within a depth of 300 nm from the substrate interface was defined as a black spot defect. The observed defect density is also shown in Table 1.

<Evaluation 2: Evaluation of gettering ability>
The gettering ability was evaluated for each of the epitaxial silicon wafers according to trial examples 1 to 25. First, the surface of the epitaxial layer of each epitaxial silicon wafer was forcibly contaminated by Ni coating liquid (1.0 × 10 ¹³ atoms / cm ² ) by a spin coat contamination method, and then 900 ° C. in a nitrogen atmosphere. A diffusion heat treatment was performed for 30 minutes. After that, SIMS measurement was performed on each epitaxial silicon wafer, and a profile of Ni concentration in the cluster ion implantation region (in this evaluation, 300 nm from the substrate interface for simplicity) was measured. Then, the amount of Ni trapped in the ion implantation region (corresponding to the integrated value of Ni concentration in the SIMS profile) was obtained. Ni traps were classified as follows and used as evaluation criteria. The evaluation results are also shown in Table 1.
A: 9.7 × 10 ¹² atoms / cm ² or more ◯: 9.5 × 10 ¹² atoms / cm ² or more 9.7 × 10 ¹² atoms / cm ^{2 or} less Δ: 9.0 × 10 ¹² atoms / cm ² or more Less than 9.5 × 10 ¹² atoms / cm ² ×: Less than 9.0 × 10 ¹² atoms / cm ²

<Consideration of evaluation results>
First, it is confirmed from Table 1 that there is a clear correlation between the level of gettering ability and the defect density of black spot defects, and the higher the defect density of black spot defects, the higher the gettering ability. It is confirmed. It has also been confirmed that the defect density of the black spot defects increases as the transit time of the temperature zone in which the defect seed is estimated to disappear and the transit time of the temperature zone in which the defect is estimated to grow is longer. It was. Therefore, even if the cluster conditions are the same, it is possible to increase the gettering ability by performing the defect formation heat treatment for increasing the defect density of the black spot defects.

  ADVANTAGE OF THE INVENTION According to this invention, even if cluster ion implantation conditions are the same, the manufacturing method of the semiconductor epitaxial wafer which can have higher gettering capability can be provided.

DESCRIPTION OF SYMBOLS 10 Semiconductor wafer 10A Semiconductor wafer surface 16 Cluster ion 18 Modified layer 20 Epitaxial layer 100 Semiconductor epitaxial wafer D Black spot-like defect

Claims (4)

Implanting multi-element cluster ions containing carbon, hydrogen and oxygen as constituent elements on the surface of a semiconductor wafer, and modifying the constituent elements of the multi-element cluster ions in the surface layer of the semiconductor wafer A first step of forming a layer;
After the first step, a second step of performing a defect formation heat treatment for increasing the defect density of black spot-like defects formed in the modified layer;
Subsequent to the second step, a third step of forming an epitaxial layer on the modified layer of the semiconductor wafer includes a method for producing a semiconductor epitaxial wafer.   The heat treatment condition of the defect formation heat treatment in the second step is that a first holding time for holding the semiconductor wafer in a first temperature region of less than 800 ° C. is not less than 0 seconds and not more than 45 seconds, and from the first temperature region. 2. The method for producing a semiconductor epitaxial wafer according to claim 1, wherein the second holding time for holding the semiconductor wafer in the second temperature region of 800 ° C. or higher and lower than 1000 ° C. after the temperature rise is 30 seconds or longer.   2. The method for producing a semiconductor epitaxial wafer according to claim 1, wherein the constituent elements of the multi-element cluster ions are composed of three elements of carbon, hydrogen, and oxygen. The manufacturing method of the semiconductor epitaxial wafer of any one of Claims 1-3 whose said semiconductor wafer is a silicon wafer.