JP2018110149A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which improves reliability of a sintered junction and suppresses damage to a semiconductor element caused by pressurization.SOLUTION: A manufacturing method of a semiconductor device includes the steps of: preparing a semiconductor element, a buffer member and a circuit board; preparing first and second bonding members each containing sintering metal particles of which the particle diameter is 100 nm or less; preparing a laminate in which the buffer member, the first bonding member, the semiconductor element, the second bonding member and the circuit board are laminated successively; applying a first pressure, from the first and second bonding members, between the buffer member and the circuit board in the laminate at a first temperature lower than a sintering temperature of the sintering metal particles; and forming first and second sintering metal layers by applying a second pressure exceeding the first pressure, from the first and second bonding members, between the buffer member and the circuit board in the laminate at a second temperature that is equal to or higher than the sintering temperature of the sintering metal particles, after the step of applying the first pressure.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which semiconductor elements are bonded using sinterable metal particles.

  Conventionally, a semiconductor device in which a semiconductor element and a circuit board are sintered and bonded using a bonding material containing sinterable metal particles is known. The sintered bonding layer has higher heat resistance and heat dissipation than the solder layer. For this reason, a process for sintering a semiconductor element and a circuit board or the like is employed in a method for manufacturing a semiconductor element that generates a large amount of heat by passing a large current, such as an IGBT.

  Sintering joining is possible only by heating the joining material containing the metal particle which has sinterability. However, from the viewpoint of the reliability of the semiconductor device and the like, the sintered joining is preferably performed by applying pressure simultaneously with heating.

  In Japanese Patent Application Laid-Open No. 2006-143585, a back electrode of a semiconductor element and a circuit board are joined via a first sintered metal layer, and a front electrode of the semiconductor element and a conductive member are joined to a second sintered metal layer. A semiconductor module bonded via a connector is disclosed. Further, in this publication, as a method of manufacturing the semiconductor module, the back electrode of the semiconductor element and the circuit board are heated and pressed through a bonding material containing metal particles and sintered and bonded, and then the front electrode of the semiconductor element And a conductive plate are heated and pressed through a bonding material containing metal particles to be sintered and bonded.

Japanese Patent Laying-Open No. 2006-143585

  However, when the back electrode of the semiconductor element and the circuit board are joined by sintering, the surface of the semiconductor element is directly heated and pressurized. Direct heating and pressurization may cause damage to the semiconductor element that causes destruction of the semiconductor element.

  On the other hand, in order to prevent direct heating and pressurization to the semiconductor element, a bonding member to be a sintered metal layer is disposed between the surface electrode of the semiconductor element and the conductive member, and the back electrode and circuit of the semiconductor element are arranged. It is also conceivable to arrange a joining member to be a sintered metal layer between the substrate and heat and press between the conductive member and the circuit board.

  However, when the laminated body laminated via two joining members is heated and pressed, between the members laminated by sandwiching each joining member by heating and pressing, that is, between the semiconductor element and the conductive member, or between the semiconductor element and the circuit board. There has been a problem that misalignment is likely to occur. The misalignment can be a factor that reduces the reliability of the sintered joint.

  The present invention has been made to solve the above-described problems. A main object of the present invention is to provide a semiconductor device in which a sintered joint has high reliability and damage to a semiconductor element due to pressurization is suppressed.

  A manufacturing method of a semiconductor device according to the present invention includes a step of preparing a semiconductor element, a buffer member, and a circuit board. The semiconductor element has a first surface and a second surface located on the opposite side of the first surface, and is formed on at least one first electrode formed on the first surface and the second surface. 2 electrodes. The method for manufacturing a semiconductor device according to the present invention includes a step of preparing a first bonding member and a second bonding member including sinterable metal particles having a particle size of 100 nm or less, a first electrode of a semiconductor element, and a buffer member The first bonding member is disposed between the second electrode and the circuit board, and the buffer member, the first bonding member, the semiconductor element, the second bonding member, and the second bonding member are disposed between the second electrode of the semiconductor element and the circuit board. A step of preparing a laminate in which circuit boards are sequentially laminated, and a buffer member and a circuit board of the laminate in which the first joining member and the second joining member are at a first temperature lower than the sintering temperature of the sinterable metal particles, The laminated body in which the first joining member and the second joining member are at a second temperature equal to or higher than the sintering temperature of the sinterable metal particles after the step of applying the first pressure and the step of applying the first pressure. A second pressure exceeding the first pressure is applied between the buffer member and the circuit board, Further comprising from 1 junction member to form a first sintered metal layer, and a second joint member and forming a second sintered metal layer.

  ADVANTAGE OF THE INVENTION According to this invention, the reliability of a sintered joining part is high, and the semiconductor device with which the damage to the semiconductor element by pressurization is suppressed can be provided.

1 is a top view of a semiconductor device according to a first embodiment. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. 3 is a flowchart of a method for manufacturing a semiconductor device according to the first embodiment. 8 is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment. FIG. FIG. 6 is a top view of a semiconductor device according to a second embodiment. 4 is a cross-sectional view of a semiconductor device according to a second embodiment. 5 is a flowchart of a method for manufacturing a semiconductor device according to a second embodiment. FIG. 10 is a cross-sectional view showing the method for manufacturing the semiconductor device according to the second embodiment. FIG. 6 is a top view of a semiconductor device according to a third embodiment. FIG. 6 is a cross-sectional view of a semiconductor device according to a third embodiment. 7 is a flowchart of a method for manufacturing a semiconductor device according to a third embodiment. FIG. 6 is a cross-sectional view of a semiconductor module according to a fourth embodiment.

  Embodiments of the present invention will be described below with reference to the drawings. In the following drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated.

Embodiment 1 FIG.
<Configuration of semiconductor device>
The semiconductor device 100 will be described with reference to FIGS. 1 and 2. The semiconductor device 100 mainly includes a plurality of semiconductor elements 1, a plurality of first sintered metal layers 2, a plurality of second sintered metal layers 3, a lead frame 4, and an insulating substrate with circuit 5 (circuit substrate).

  Each of the plurality of semiconductor elements 1 may be any semiconductor element, but is, for example, a power semiconductor element, for example, an IGBT (Insulated Gate Bipolar Transistor). The semiconductor element 1 has a first surface 1A and a second surface 1B located on the opposite side of the first surface 1A. A first electrode (not shown) is formed on at least a part of the first surface 1A of the semiconductor element 1. At least a part of the first electrode is joined to the lead frame 4 via the first sintered metal layer 2. A second electrode (not shown) is formed on at least a part of the second surface 1B of the semiconductor element 1. At least a part of the second electrode is joined to the insulating substrate with circuit 5 via the second sintered metal layer 3. The semiconductor element 1 can operate at a high temperature. Although the material which comprises the semiconductor element 1 should just be arbitrary materials, it is a silicon carbide (SiC), for example. Although the material which comprises an electrode should just be the arbitrary materials which have electroconductivity, for example, at least 1 of aluminum (Al), nickel (Ni), and gold | metal | money (Au) is included.

  Each of the plurality of first sintered metal layers 2 electrically connects the first electrode of one semiconductor element 1 and the lead frame 4. When the first surface 1A is viewed in plan, the planar shape of the first sintered metal layer 2 may be any shape, but is rectangular, for example. The thickness of the 1st sintered metal layer 2 is 30 micrometers or more and 50 micrometers or less, for example.

  Each of the plurality of second sintered metal layers 3 electrically connects the second electrode of one semiconductor element 1 and the first conductor 51 of the insulating substrate 5 with circuit. When the second surface 1B is viewed in plan, the planar shape of the second sintered metal layer 3 may be any shape, for example, a rectangular shape. The thickness of the second sintered metal layer 3 is, for example, 30 μm or more and 50 μm or less.

  Each of the first sintered metal layer 2 and the second sintered metal layer 3 is made of a sintered body. The material which comprises the 1st sintered metal layer 2 and the 2nd sintered metal layer 3 is a sinterable metal, for example, contains silver (Ag) or Cu. A sinterable metal is a metal that can form a sintered body when the powder body is heated at a temperature lower than its melting point. The first sintered metal layer 2 and the second sintered metal layer 3 are paste-like kneaded materials in which sinterable metal particles such as Ag or Cu are dispersed, and are formed into a sheet shape. This is a sintered body obtained by heating and pressurizing 22 and the second joining member 23 (see FIG. 4, details will be described later).

  The lead frame 4 is electrically connected to each first electrode of the plurality of semiconductor elements 1 via each of the plurality of first sintered metal layers 2. The lead frame 4 has a first region that overlaps the first sintered metal layer 2 and a second region that does not overlap the first sintered metal layer 2 when the first surface 1A is viewed in plan. The material constituting the lead frame 4 includes, for example, at least one of Cu and Al. The lead frame 4 may be made of, for example, a Cu alloy or an Al alloy.

The insulating substrate with circuit 5 includes a first conductor 51, a second conductor 52, and an insulating ceramic plate 53. The insulating ceramic plate 53 is sandwiched between the first conductor 51 and the second conductor 52. The first conductor 51 carries the semiconductor element 1. The first conductor 51 is electrically connected to the second electrode of the semiconductor element 1 through the second sintered metal layer 3. A surface of the first conductor 51 located on the opposite side to the surface bonded to the semiconductor element 1 is bonded to the insulating ceramic plate 53. A surface of the insulating ceramic plate 53 located on the side opposite to the surface bonded to the first conductor 51 is bonded to the second conductor 52. The material constituting the first conductor 51 and the second conductor 52 may be any material having electrical conductivity and high thermal conductivity, and is, for example, copper (Cu) or aluminum (Al). The material constituting the insulating ceramic plate 53 may be any material having electrical insulation and high thermal conductivity. For example, silicon nitride (SiN), aluminum nitride (AlN), and alumina ( A material containing at least one of Al ₂ O ₃ ).

  The semiconductor device 100 includes, for example, a plurality of semiconductor elements 1. Each first electrode of the plurality of semiconductor elements 1 is joined to the lead frame 4 via one first sintered metal layer 2. Each second electrode of the plurality of semiconductor elements 1 is joined to the insulating substrate with circuit 5 via one first sintered metal layer 2. In other words, one lead frame 4 is joined to each first electrode of the plurality of semiconductor elements 1 via each of the plurality of first sintered metal layers 2. One insulating substrate with circuit 5 is joined to each second electrode of the plurality of semiconductor elements 1 through each of the plurality of second sintered metal layers 3.

<Method for Manufacturing Semiconductor Device>
Next, a method for manufacturing the semiconductor device according to the first embodiment will be described with reference to FIGS.

  First, a plurality of semiconductor elements 1, a lead frame 4, and an insulating substrate with circuit 5 are prepared (step (S10)). Each of the plurality of semiconductor elements 1 has a first surface 1A and a second surface 1B located on the opposite side of the first surface 1A, and a first electrode and a second surface 1B formed on the first surface 1A. And at least one second electrode formed thereon. The lead frame 4 includes a portion to be bonded to each first electrode of the plurality of semiconductor elements 1 via the first sintered metal layer 2. The insulating substrate with circuit 5 includes a first conductor 51. The first conductor 51 includes a portion to be joined to the second electrode of the semiconductor element 1 via the second sintered metal layer 3.

  Next, a plurality of first joining members 22 and a plurality of second joining members 23 are prepared (step (S20)). Each of the first bonding member 22 and the second bonding member 23 includes sinterable metal particles coated with a first organic polymer and a solvent. The particle size of the sinterable metal particles is 100 nm or less. Sinterable metal particles should just be comprised with the arbitrary metals which have sinterability, for example, are comprised by Ag or Cu. The sintering temperature of the sinterable metal particles is, for example, 200 ° C. or more and 500 ° C. or less. In the first joining member 22 and the second joining member 23, the sinterable metal particles are not sintered. The material constituting the first organic polymer includes, for example, an amine organic material. The material constituting the solvent includes, for example, an organic material mixture including an alcohol type, a glycol type, and a glycol ether type. Each of the first bonding member 22 and the second bonding member 23 has viscosity because it contains the first organic polymer. The first joining member 22 and the second joining member 23 are formed into a sheet shape, for example. The 1st joining member 22 and the 2nd joining member 23 are prepared as follows, for example.

  First, a third joining member and a fourth joining member including sinterable metal particles coated with a second organic polymer having a molecular weight smaller than that of the first organic polymer are prepared (step (S21)). Each of the third bonding member and the fourth bonding member includes sinterable metal particles coated with the second organic polymer and a solvent. The particle size of the sinterable metal particles is 100 nm or less. The sinterable metal particles coated with the second organic polymer can be prepared by any method. As a suitable example of the preparation method, there is a method of stirring sintered metal particles in an organic solvent. The material constituting the second organic polymer includes, for example, an amine organic material. The molecular weight of the second organic polymer is, for example, 100 or more and 400 or less. The material constituting the solvent includes, for example, an organic material mixture including an alcohol type, a glycol type, and a glycol ether type.

  In each of the third bonding member and the fourth bonding member, the sinterable metal particles coated with the second organic polymer are dispersed in a solvent. Each of the third joining member and the fourth joining member is formed into a sheet shape, for example. The thickness of each of the third joining member and the fourth joining member formed into a sheet shape is, for example, 130 μm or more and 150 μm or less. The third joining member and the fourth joining member formed into a sheet shape are reshaped into any shape and any size according to the shape and size of the first sintered metal layer 2 and the second sintered metal layer 3. Can be done. The viscosity of each of the third joining member and the fourth joining member is, for example, 10 Pa · s or more and 60 Pa · s or less.

  Next, the third bonding member and the fourth bonding member are heated to a third temperature lower than the sintering temperature to form the first bonding member 22 and the second bonding member 23 (step (S22)). When the third joining member and the fourth joining member are heated to a third temperature lower than the sintering temperature, the solvent in the third joining member and the fourth joining member evaporates. Furthermore, when the third bonding member and the fourth bonding member are heated to a third temperature lower than the sintering temperature and cooled, at least one of the second organic polymers in the third bonding member and the fourth bonding member is obtained. Part is converted into a first organic polymer. This step (S22) is performed, for example, in an air atmosphere. Thus, the 1st joining member 22 and the 2nd joining member 23 which have the said viscosity are prepared.

  The third temperature is a temperature at which the solvent in the third bonding member and the fourth bonding member can evaporate, and is a temperature at which at least a part of the second organic polymer can be changed to the first organic polymer. The heating time at the third temperature (third heating time) is a time required for the solvent in the third bonding member and the fourth bonding member to evaporate a predetermined amount or more. Each of the third temperature and the heating time at the third temperature (third heating time) can be arbitrarily set, but the third heating time is preferably, for example, not less than 30 minutes and not more than 90 minutes. The temperature is, for example, 120 ° C. or higher and 150 ° C. or lower.

  Although the said heating in this process (S22) may be implemented by arbitrary methods, it is the heating by an atmospheric reflow furnace, or the heating by oven, for example.

  Next, a laminate in which the lead frame 4, the plurality of first bonding members 22, the plurality of semiconductor elements 1, the plurality of second bonding members 23, and the insulating substrate with circuit 5 are sequentially stacked is prepared (step (S30)). . Each first electrode of the plurality of semiconductor elements 1 and the lead frame 4 are arranged with one first joining member 22 interposed therebetween. Each second electrode of the plurality of semiconductor elements 1 and the first conductor 51 of the insulating substrate with circuit 5 are arranged with one second bonding member 23 interposed therebetween.

  Next, a first pressure is applied between the lead frame 4 and the insulating substrate with circuit 5 (step (S40)). As shown in FIG. 4, first, in the laminate, the surface of the lead frame 4 opposite to the surface in contact with the first bonding member 22 is brought into contact with the first pressure member 110, and the circuit is attached. The surface of the insulating substrate 5 that is located on the opposite side of the surface that is in contact with the second bonding member 23 is in contact with the second pressure member 120. The temperature of the first pressure member 110 and the second pressure member 120 in this step (S40) is a first temperature lower than the sintering temperature of the sinterable metal particles of the first bonding member 22 and the second bonding member 23. It is. Next, the first pressure is applied to the laminate in a direction intersecting the first surface 1A by the first pressure member 110 and the second pressure member 120, preferably in a direction perpendicular to the first surface 1A. Applied. Thereby, the plurality of first joining members 22 and the plurality of second joining members are pressurized simultaneously. This step (S40) is performed, for example, in an air atmosphere.

  The first pressure is, for example, 5 MPa or less, preferably 4 MPa or more. The 1st pressurization time which pressurizes a layered product by the 1st pressure is 3 seconds or more and 5 seconds or less, for example. The first temperature is not less than room temperature and less than 245 ° C., preferably not less than 120 ° C. and not more than 160 ° C.

  Referring to FIG. 4, the first pressure member 110 and the second pressure member 120 may be a collet and a stage, for example. The laminated body is disposed on a stage in a heating and pressing apparatus including a collet as the first pressure member 110 and a stage as the second pressure member 120. The surface of the second conductor 52 of the insulating substrate with circuit 5 that is located on the opposite side of the surface in contact with the second bonding member 23 is in contact with the stage. The lead frame 4 is in contact with the collet at a surface located on the opposite side of the surface in contact with the first bonding member 22. The temperature of the collet and stage can be set individually, for example. The temperature of the collet is, for example, 150 ° C. or higher and 160 ° C. or lower. The temperature of the stage is, for example, 130 ° C. or higher and 140 ° C. or lower. The collet and stage held at the temperature pressurize the laminated body at the first pressure for the first load time. At this time, the plurality of first joining members 22 and the plurality of second joining members 23 are heated to the first temperature.

  In this step (S40), before applying the first pressure to the stacked body, along the first surface 1A between the semiconductor element 1 and the lead frame 4 and between the semiconductor element 1 and the insulating substrate 5 with circuit. Preferably, alignment in the selected direction is performed.

  Next, the plurality of first joining members 22 and the plurality of second joining members 23 are sintered (step (S50)). This step (S50) can be performed continuously with the previous step (S40). In this step (S50), the first joining member 22 and the second joining member 23 of the laminated body are heated to a second temperature equal to or higher than the sintering temperature, and the above-mentioned between the lead frame 4 and the insulating substrate with circuit 5 is performed. A second pressure that exceeds the first pressure is applied. The heating and pressurization of the laminate in this step (S50) are performed by the first pressure member 110 that is in contact with the surface of the lead frame 4 that is opposite to the surface that is in contact with the first bonding member 22; And it can be implemented by the second pressure member 120 in contact with the surface located on the opposite side to the surface in contact with the second bonding member 23 of the insulating substrate 5 with circuit.

  In this step (S50), for example, the second pressure is applied between the lead frame 4 of the laminate and the insulating substrate 5 with circuit where the first bonding member 22 and the second bonding member 23 are at a temperature lower than the sintering temperature. A first step to be applied; a second step of heating the first joining member 22 and the second joining member 23 to a second temperature equal to or higher than the sintering temperature in a state where the second pressure is applied; A third step in which a second pressure is applied between the lead frame 4 of the laminate and the insulating substrate with circuit 5 in which the member 22 and the second bonding member 23 are at a second temperature equal to or higher than the sintering temperature. The first step, the second step, and the third step are performed continuously. In the 2nd process and the 3rd process, the heating to the 1st joining member 22 and the 2nd joining member 23 is the 1st pressurizing member 110 and the 2nd pressurizing member 120 which are applying the 2nd pressure to the above-mentioned layered product. Can be implemented.

  Moreover, this process (S50), for example, the 4th process of heating the 1st joining member 22 and the 2nd joining member 23 of a layered product to which pressure is not applied to the 2nd temperature more than the above-mentioned sintering temperature, A fifth step in which a second pressure is applied between the lead frame 4 of the laminate and the insulating substrate 5 with circuit in which the first bonding member 22 and the second bonding member 23 are at a second temperature equal to or higher than the sintering temperature; May be included. The fourth step and the fifth step are performed continuously. In the fourth step and the fifth step, the heating to the first bonding member 22 and the second bonding member 23 is performed by the first pressure member 110 and the second pressure member 120 capable of applying a second pressure to the laminate. Can be implemented.

  Although 2nd temperature should just be more than sintering temperature, it is 245 degreeC or more and 275 degrees C or less, for example. The second pressure is, for example, 20 MPa or more and 40 MPa or less. The time for pressurization with the second pressure (second pressurization time) is, for example, 60 seconds or more and 120 seconds or less.

  Thereby, the plurality of first joining members 22 and the plurality of second joining members are simultaneously heated and pressurized, and the first sintered metal layer 2 and the second sintered metal layer 3 are formed simultaneously. This step (S50) is performed, for example, in an air atmosphere.

  Also in this process (S50), a laminated body can be heated and pressurized with the heating-pressing apparatus shown by FIG. The temperature of the collet as the first pressure member 110 is, for example, not less than 255 ° C. and not more than 275 ° C. The temperature of the stage as the second pressure member 120 is, for example, 245 ° C. or more and 265 ° C. or less. The collet and the stage maintained at the temperature contact the lead frame 4 of the multilayer body and the second conductor of the insulating substrate with circuit 5 and simultaneously pressurize the multilayer body with the second pressure for the second processing time. Thereby, the plurality of first joining members 22 and the plurality of second joining members 23 are heated to the sintering temperature or higher while being pressurized.

<Effect>
The method for manufacturing a semiconductor device according to the first embodiment includes a step (S10) of preparing a plurality of semiconductor elements 1, a buffer member, and an insulating substrate with circuit 5; and sinterable metal particles having a particle size of 100 nm or less; A step (S20) of preparing the first bonding member 22 and the second bonding member 23 including the first organic polymer, the lead frame 4, the first bonding member 22, the semiconductor element, the second bonding member 23, and a circuit. A step of preparing a laminated body in which the substrate with insulating substrate 5 is sequentially laminated (S30), a step of applying a first pressure between the lead frame 4 and the insulating substrate with circuit 5 (S40), and sintered metal particles. And a step (S50) of forming the first sintered metal layer 2 and the second sintered metal layer 3 by sintering. In the step (S30), the first bonding member 22 is disposed between the first electrode of the semiconductor element and the lead frame 4, and the second bonding member 23 is disposed between the second electrode of the semiconductor element and the insulating substrate 5 with circuit. Is done. In the step (S50), the first joining member 22 and the second joining member 23 are heated to a second temperature equal to or higher than the sintering temperature, and a second pressure exceeding the first pressure is applied. The second pressure is applied between the lead frame 4 and the insulating substrate with circuit 5.

  In this way, in the step (S50), the semiconductor element 1, the lead frame 4 and the insulating substrate 5 with circuit can be sintered and bonded together via the first bonding member 22 and the second bonding member 23. it can. In the step (S50), the second pressure is applied between the lead frame 4 and the insulating substrate 5 with circuit. Therefore, the first bonding member 22 and the lead frame 4 disposed between the semiconductor element 1 and the first pressure member 110, and the first bonding member 22 disposed between the semiconductor element 1 and the second pressure member 120. The two bonding member 23 and the insulating substrate with circuit 5 can act as a buffer material for the semiconductor element 1. As a result, according to the manufacturing method of the semiconductor device, even if a relatively strong second pressure is applied to the stacked body in the step (S50), the semiconductor element 1 is destroyed and the reliability of the semiconductor element 1 is reduced. Damage to the semiconductor element 1 is prevented. The degree of buffering action by the first joining member 22, the second joining member 23, the lead frame 4, and the insulating substrate with circuit 5 can be appropriately set according to the thickness and material thereof. Further, since the semiconductor element 1 is not directly pressed by the pressure member, the adhesion of foreign matter is prevented as compared with the case where it is pressed directly.

  Furthermore, in the step (S50), a relatively strong second pressure is applied to the first joining member 22 and the second joining member 23, which is 20 MPa or more and 40 MPa or less, compared to the sintering bonding step of the conventional method for manufacturing a semiconductor device. In this state, the sinterable metal particles are sintered. Therefore, the first sintered metal layer 2 and the second sintered metal layer 3 formed by the step (S50) are more reliable than the sintered metal layer sintered in a state where a pressure of several MPa is applied. High nature.

  Further, in the step (S40), the semiconductor element 1 and the lead frame 4 are connected by the first bonding member 22 by applying a first pressure between the lead frame 4 of the laminate and the insulating substrate with circuit 5. At the same time, the semiconductor element 1 and the insulating substrate with circuit 5 are connected by the second bonding member 23. By preparing the first joining member 22 and the second joining member 23 containing the first organic polymer having a relatively large molecular weight in the step (S20), in the step (S40), depending on the viscosity of the first joining member 22 The relative positional relationship in the direction along the first surface 1A between the semiconductor element 1 and the lead frame 4 connected via the first bonding member 22 can be maintained. Similarly, the relative positional relationship in the direction along the first surface 1A between the semiconductor element 1 connected via the second bonding member 23 and the insulating substrate with circuit 5 due to the viscosity of the second bonding member 23. Can be retained. Therefore, by appropriately adjusting these relative positions before applying the first pressure in the step (S40), in the step (S50), between the semiconductor element 1 and the lead frame 4 and the semiconductor element. 1 and the insulating substrate 5 with circuit can be suppressed, and the semiconductor element 1, the lead frame 4, and the insulating substrate 5 with circuit arranged at appropriate positions can be sinter bonded. Therefore, in the semiconductor device according to the first embodiment, the reliability of the sintered joint is higher than that of the semiconductor device manufactured by the semiconductor device manufacturing method that does not include the step (S40).

  Preferably, in the method of manufacturing the semiconductor device, in the step of preparing the first bonding member 22 and the second bonding member 23 (S20), the first organic polymer is covered with the second organic polymer having a molecular weight smaller than that of the first organic polymer. Preparing a third joining member and a fourth joining member containing sinterable metal particles (S21); heating the third joining member and the fourth joining member to a third temperature lower than the sintering temperature; A step (S22) of forming at least part of the polymer as the first organic polymer and forming the first joining member 22 and the second joining member 23.

  If it does in this way, the 1st joining member 22 and the 2nd joining member 23 containing the 1st organic polymer which have predetermined molecular weight will be used using the 3rd joining member and the 4th joining member prepared by arbitrary methods. It can be easily manufactured.

  Preferably, in the method for manufacturing a semiconductor device, in the step of applying the first pressure (S40), the first bonding member 22 and the second bonding member 23 are heated to a first temperature lower than the sintering temperature. In this case, since the adhesion at the time of temporary attachment is improved as compared with the case where the first bonding member 22 and the second bonding member 23 are not heated to the first temperature in the step (S40), the position at the time of sintering. Misalignment can be prevented.

  Preferably, in the method for manufacturing a semiconductor device, the first temperature is 155 ° C. or lower, the first pressure is 4 MPa or higher and 5 MPa or lower, the second temperature is 245 ° C. or higher and 275 ° C. or lower, and the second pressure is 20 MPa or higher and 40 MPa or lower.

  When the first temperature is 155 ° C. or lower, it is possible to improve the adhesion at the time of temporary attachment without sintering the sinterable metal particles in the step (S40) and to prevent misalignment at the time of sintering. .

  When the first pressure is 4 MPa or more, the relative pressure in the direction along the first surface 1A between the semiconductor element 1 and the lead frame 4 connected via the first bonding member 22 in the step (S40). The positional relationship and the relative positional relationship in the direction along the first surface 1A between the semiconductor element 1 connected via the second bonding member 23 and the insulating substrate with circuit 5 can be appropriately maintained. When the first pressure exceeds 5 MPa, inter-metal sintering is started via the first joining member 22 and the second joining member 23, but the first pressure is necessary for realizing proper inter-metal sintering. When the pressure value is not satisfied, the gaps between the metal particles cannot be filled, and the joint portion includes a large amount of voids. Further, when the step (S50) is performed without performing the step (S40), that is, when a pressure value necessary for realizing appropriate intermetallic sintering is applied as the first pressure, the step There is a possibility that the positional deviation occurs during the pressurization in (S50). On the other hand, the step (S50) is performed after the first pressure of 5 MPa or less is applied in the step (S40), so that the insulation between the semiconductor element 1 and the lead frame 4 and between the semiconductor element 1 and the circuit is insulated. The positional deviation between the substrate 5 and the substrate 5 can be suppressed, and the semiconductor element 1, the lead frame 4, and the insulating substrate 5 with circuit arranged at appropriate positions can be sinter bonded.

  When the second temperature is 245 ° C. or higher, the sinterable metal particles of the first joining member 22 and the second joining member 23 can be sintered. By controlling the second temperature to 275 ° C. or lower, the influence of heating on each member constituting the laminate, for example, alteration of the constituent materials, is suppressed as compared with the case where the second temperature is set to exceed 275 ° C. Can do.

  When the second pressure is 20 MPa or more, the reliability of the first sintered metal layer 2 and the second sintered metal layer 3 formed by the step (S50) is sufficiently enhanced. As described above, the second pressure is applied between the lead frame 4 and the insulating substrate with circuit 5, and at this time, the first bonding member 22 and the lead frame 4 act as a cushioning material. Thereby, even if a 2nd pressure is 20 Mpa or more and 40 Mpa or less, the damage to the semiconductor element 1 by pressurization is suppressed.

  Preferably, in the method for manufacturing a semiconductor device, in the step of forming a sintered metal layer (S50), each of the first sintered metal layer 2 and the second sintered metal layer 3 has a thickness of 30 μm or more and 50 μm or less. The

  Since the thickness of each of the first sintered metal layer 2 and the second sintered metal layer 3 is 30 μm or more, the first sintered metal layer 2 and the second sintered metal layer 2 are compared with the case where the thickness is less than 30 μm. The bonded metal layer 3 can effectively act as a buffer material against the pressure in the vertical direction.

  When the thickness of each of the first sintered metal layer 2 and the second sintered metal layer 3 is 50 μm or less, the first sintered metal layer 2 and the second sintered metal layer 2 are compared with the case where the thickness exceeds 50 μm. Thermal expansion of the bonded metal layer can be suppressed. Therefore, it is possible to reduce the thermal stress applied to the bonding interface between the semiconductor element 1 and the first sintered metal layer 2 and the second sintered metal layer 3 as the semiconductor element 1 generates heat. The risk that the bonding interface is broken can be reduced.

  In the semiconductor device manufacturing method, the buffer member has the lead frame 4. The lead frame 4 includes a portion to be bonded to each first electrode of the plurality of semiconductor elements 1 via the first sintered metal layer 2. Therefore, in the step (S30), a stacked body in which each of the plurality of semiconductor elements 1 and the lead frame 4 are arranged with one first joining member 22 interposed therebetween is prepared, and the step (S40) and the step are performed on the stacked body. By performing (S50), each of the plurality of semiconductor elements 1 can be simultaneously bonded to the lead frame 4 via one first sintered metal layer 2.

  In addition, the 1st sintered metal layer 2 should just be comprised by the 1st joining member 22 of at least 1 or more. Similarly, the 2nd sintered metal layer 3 should just be comprised by the at least 1 or more 2nd joining member 23. FIG.

Embodiment 2. FIG.
<Configuration of semiconductor device>
Next, the semiconductor device 101 according to the second embodiment will be described with reference to FIGS. The semiconductor device 101 according to the second embodiment has basically the same configuration as the semiconductor device 100 according to the first embodiment, but includes a plurality of plate-like members 6 instead of the lead frame as buffer members, and further includes wiring. The difference is that a plurality of wires 7 are provided as members instead of the lead frame. Each of the plurality of plate-like members 6 has basically the same configuration as that of the lead frame 4 (see FIGS. 1 and 2), but one semiconductor element 1 is interposed via one first sintered metal layer 2. It differs in that it is electrically connected to only the first electrode.

  Each of the plurality of plate-like members 6 has only a third region that overlaps with the first sintered metal layer 2 and does not overlap with the first sintered metal layer 2 when the first surface 1A is viewed in plan. I don't have it. The material which comprises the plate-shaped member 6 contains at least any one of Cu and Al, for example. The plate-like member 6 may be made of, for example, a Cu alloy or an Al alloy.

<Method for Manufacturing Semiconductor Device>
Next, a method for manufacturing the semiconductor device 101 according to the second embodiment will be described with reference to FIG. The manufacturing method of the semiconductor device 101 according to the second embodiment has basically the same configuration as the manufacturing method of the semiconductor device 100 according to the first embodiment, but a plurality of plate-like members 6 are provided instead of the lead frame 4. After the point to be prepared and the step (S50) of forming the first sintered metal layer 2 and the second sintered metal layer 3, the plate-like member 6 of the joined body obtained by the step (S50) is used as a wiring member. The point which is further provided with the process (S60) of bonding the wire 7 of this.

  In the step (S10), a plurality of semiconductor elements 1, a plurality of plate-like members 6, and an insulating substrate with circuit 5 are prepared.

  In the step (S30), a laminate is prepared in which a plurality of plate-like members 6, a plurality of first joining members 22, a plurality of semiconductor elements 1, a plurality of second joining members 23, and an insulating substrate with circuit 5 are sequentially laminated. Is done. Each first electrode of each of the plurality of semiconductor elements 1 and each of the plurality of plate-like members 6 are disposed with one first joining member 22 interposed therebetween.

  In the step (S40) and the step (S50), the first pressure and the second pressure are applied between the plurality of plate-like members 6 and the insulating substrate 5 with circuit. The first pressure member 110 is brought into contact with a surface located on the opposite side to the surface in contact with the first joining member 22 of each of the plurality of plate-like members 6. In the step (S50), the temperatures of the plurality of first joining members 22 and the plurality of second joining members 23 are heated to the sintering temperature or higher, and the temperature is increased between the plurality of plate-like members 6 and the insulating substrate 5 with circuit. By applying two pressures, the first sintered metal layer 2 is formed from the first bonding member 22, and the second sintered metal layer 3 is formed from the second bonding member 23. Thereby, each 1st electrode of the some semiconductor element 1 and each of the some plate-shaped member 6 are joined via the 1st sintered metal layer 2 of one. Each second electrode of the plurality of semiconductor elements 1 and the insulating substrate with circuit 5 are joined via one second sintered metal layer 3.

  In the wire bonding step (S60), wire bonding is performed on the plurality of plate-like members 6 bonded to the first electrodes of the plurality of semiconductor elements 1 and the plurality of first sintered metal layers 2, respectively. Is called. Wire bonding is performed on the plurality of plate-like members 6 of the joined body held by a predetermined method. Thereby, the plurality of plate-like members 6 are electrically connected by the wires 7.

<Effect>
The manufacturing method of the semiconductor device 101 according to the second embodiment has basically the same configuration as the manufacturing method of the semiconductor device 100 according to the first embodiment. Therefore, the same effect as the method for manufacturing semiconductor device 100 according to the first embodiment can be obtained.

  Furthermore, by providing the step (S60), any plate-like member 6 among the plurality of plate-like members 6 can be electrically connected by the wire 7. At this time, pressure, ultrasonic vibration, and the like are applied to the plate-like member 6 to be wire-bonded by wire bonding. On the other hand, the pressure and ultrasonic vibration are not directly applied to the semiconductor element 1 but are applied via the plate-like member 6 and the first sintered metal layer 2. Therefore, as compared with the semiconductor device in which the wire is directly bonded to the first electrode of the semiconductor element, the semiconductor device 101 has less damage to the semiconductor element due to pressurization.

  Further, as described above, damage to the semiconductor element 1 due to pressurization is suppressed in the step (S40) and the step (S50). That is, in the step (S60), the pressure, ultrasonic vibration, and the like by wire bonding are indirectly applied to the semiconductor element 1 in which damage due to pressurization is suppressed in the previous steps. Therefore, compared with the semiconductor device in which the wire is directly bonded to the first electrode of the semiconductor element sintered and bonded to the insulating substrate with circuit, the semiconductor device 101 is suppressed from being damaged by the pressurization. . Thereby, in the semiconductor device 101, the wire bonding conditions can be set so that the reliability of the joint between the plate-like member 6 and the wire 7 can be sufficiently secured. Therefore, the reliability of the semiconductor device 101 is improved as compared with the semiconductor device in which the wire is directly bonded to the first electrode of the semiconductor element sintered and bonded to the insulating substrate with circuit.

  In the semiconductor device 101, the distances in the vertical direction between the first surfaces 1A of the plurality of semiconductor elements 1 and the insulating substrate with circuit 5 may be different. In the semiconductor device 101, the distance in the perpendicular direction between the upper surface located on the opposite side to the surface joined to the first sintered metal layer 2 of each plate-like member 6 and the insulating substrate with circuit 5 is different. It may be.

  In this case, in the manufacturing method of the semiconductor device 101, in the step (S40) and the step (S50), for example, as shown in FIG. 8, between each of the plurality of plate-like members 6 and the insulating substrate with circuit 5 individually. A first pressure and a second pressure are applied to. At this time, the first pressure member 110 is in contact with the upper surface of one plate-like member 6. Further, for example, among the plurality of plate-like members 6, the first pressure between the at least one plate-like member 6 having the same distance between the upper surface and the circuit-insulated substrate 5 and the circuit-insulated substrate 5 and the first pressure and A second pressure may be applied. At this time, the first pressure member 110 is brought into contact with at least one or more plate-like members 6 having the same distance between the upper surface of each plate-like member 6 and the insulating substrate with circuit 5. Even if it does in this way, there can exist an effect similar to the manufacturing method of the said semiconductor device 101. FIG.

Embodiment 3 FIG.
<Configuration of semiconductor device>
Next, the semiconductor device 102 according to the third embodiment will be described with reference to FIGS. The semiconductor device 102 according to the third embodiment has basically the same configuration as that of the semiconductor device 100 according to the first embodiment, but includes a plurality of plate-like members 6 instead of the lead frame as buffer members, and further includes wiring. The difference is that a plurality of ribbons 8 are provided as members instead of the lead frame. In other words, the semiconductor device 102 according to the third embodiment has basically the same configuration as the semiconductor device 101 according to the second embodiment, but differs in that a ribbon 8 is provided instead of the wire 7 as a wiring member.

  Each of the plurality of plate-like members 6 has only a third region that overlaps with the first sintered metal layer 2 and does not overlap with the first sintered metal layer 2 when the first surface 1A is viewed in plan. I don't have it. The material which comprises the plate-shaped member 6 contains at least any one of Cu and Al, for example. The plate-like member 6 may be made of, for example, a Cu alloy or an Al alloy.

<Method for Manufacturing Semiconductor Device>
Next, a method for manufacturing the semiconductor device 102 according to the third embodiment will be described with reference to FIG. The manufacturing method of the semiconductor device 102 according to the third embodiment has basically the same configuration as the manufacturing method of the semiconductor device 100 according to the first embodiment, but a plurality of plate-like members 6 are provided instead of the lead frame 4. After the point to be prepared and the step (S50) of forming the first sintered metal layer 2 and the second sintered metal layer 3, ribbon bonding is performed on the plate-like member 6 of the joined body obtained by the step (S50). The difference is that it further includes a step (S70) of performing. That is, the manufacturing method of the semiconductor device 102 according to the third embodiment has basically the same configuration as the manufacturing method of the semiconductor device 101 according to the second embodiment, but ribbon bonding is used instead of the wire bonding step. It differs in the point provided with the process (S70) to perform.

  In the ribbon bonding step (S70), ribbon bonding is performed on the plurality of plate-like members 6 bonded to the first electrodes of the plurality of semiconductor elements 1 and the plurality of first sintered metal layers 2, respectively. Is called. Ribbon bonding is performed on the plurality of plate-like members 6 of the joined body held by a predetermined method. Thereby, the plurality of plate-like members 6 are electrically connected by the ribbon 8.

<Effect>
The method for manufacturing the semiconductor device 102 according to the third embodiment has basically the same configuration as the method for manufacturing the semiconductor device according to the first embodiment. Therefore, the same effect as the method for manufacturing semiconductor device 100 according to the first embodiment can be obtained.

  Furthermore, by providing the step (S70), any plate-like member 6 among the plurality of plate-like members 6 can be electrically connected by the ribbon 8. At this time, pressure, ultrasonic vibration, and the like are applied to the plate-like member 6 to be ribbon-bonded by ribbon bonding. On the other hand, the pressure and ultrasonic vibration are not directly applied to the semiconductor element 1 but are applied via the plate-like member 6 and the first sintered metal layer 2. Therefore, as compared with the semiconductor device in which the ribbon is directly bonded to the first electrode of the semiconductor element, the semiconductor device 102 is suppressed from being damaged by the pressurization.

  Further, as described above, damage to the semiconductor element 1 due to pressurization is suppressed in the step (S40) and the step (S50). That is, in the above step (S70), the pressure, ultrasonic vibration, and the like due to ribbon bonding are indirectly applied to the semiconductor element 1 in which damage due to pressurization is suppressed in the previous steps. Therefore, compared with the semiconductor device in which the ribbon is directly bonded to the first electrode of the semiconductor element that is sintered and bonded to the insulating substrate with circuit, the semiconductor device 102 is suppressed from being damaged by the pressurization. . Thereby, in the semiconductor device 102, the ribbon bonding conditions can be set so that the reliability of the joint between the plate-like member 6 and the ribbon 8 can be sufficiently secured. Therefore, the reliability of the semiconductor device 102 is improved as compared with the semiconductor device in which the ribbon is directly bonded to the first electrode of the semiconductor element sintered and bonded to the insulating substrate with circuit.

Embodiment 4 FIG.
<Configuration of semiconductor module>
Next, a semiconductor module 200 according to the fourth embodiment will be described with reference to FIG. The semiconductor module 200 includes at least one of the semiconductor devices 100, 101, and 102. FIG. 12 is a cross-sectional view of a semiconductor module 200 including the semiconductor device 101.

  As shown in FIG. 12, the second conductor 52 of the insulating substrate with circuit 5 is joined to the heat radiating portion 9 via the solder 10. The insulating substrate with circuit 5 includes a first conductor 51 and a third conductor 54 that are bonded to a surface of the insulating ceramic plate 53 that is opposite to the surface that is bonded to the second conductor 52. Yes. The first conductor 51 is joined to each second electrode of the plurality of semiconductor elements 1 via each of the plurality of second sintered metal layers 3. The third conductor 54 is disposed at a distance from the first conductor 51 in the direction along the first surface 1A. The third conductor 54 is joined to the external electrode terminal 11 via the solder 12. The semiconductor device 101 is disposed in a space formed inside the heat radiating portion 9 and the lid portion 13 connected to the heat radiating portion 9. The space is filled with a sealing body 14. That is, the semiconductor device 101 is sealed with the sealing body 14. A through hole for inserting the external electrode terminal 11 is formed in the lid portion 13. A part of the external electrode terminal 11 is disposed outside the lid portion 13. The material constituting the heat radiating portion 9 has a higher thermal conductivity than the material constituting the sealing body 14, and is, for example, Cu or Al. The material constituting the external electrode terminal 11 may be any material having conductivity, such as Cu or Al. The material constituting the lid portion 13 may be any material having electrical insulation, for example, resin. The material constituting the sealing body 14 may be any material having electrical insulating properties, such as silicone gel.

<Effect>
Since the semiconductor module 200 includes the semiconductor device 101 described above, the semiconductor module 200 has high reliability. Similarly, the semiconductor module 200 has high reliability even when it includes the semiconductor device 100 or the semiconductor device 102 described above.

  Although the embodiments of the present invention have been described above, the embodiments disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

DESCRIPTION OF SYMBOLS 1 Semiconductor element, 1A 1st surface, 1B 2nd surface, 2nd 1st sintered metal layer, 3rd 2nd sintered metal layer, 4 lead frame, 5 Insulated substrate with a circuit, 6 Plate-shaped member, 7 Wire, 8 Ribbon , 9 Heat radiation part, 10, 12 Solder, 11 External electrode terminal, 13 Lid part, 14 Sealed body, 22 1st joining member, 23 2nd joining member, 51 1st conductor, 52 2nd conductor, 53 Insulating ceramic plate , 54 Third conductor, 100, 101, 102 Semiconductor device, 110 First pressure member, 120 Second pressure member, 200 Semiconductor module.

Claims (6)

A step of preparing a semiconductor element, a buffer member, and a circuit board;
The semiconductor element has a first surface and a second surface located opposite to the first surface, and is formed on at least one first electrode formed on the first surface and the second surface. A second electrode being
Preparing a first joining member and a second joining member including sinterable metal particles having a particle size of 100 nm or less;
The first bonding member is disposed between the first electrode of the semiconductor element and the buffer member, and the second bonding member is disposed between the second electrode of the semiconductor element and the circuit board. Preparing a laminate in which the buffer member, the first joining member, the semiconductor element, the second joining member, and the circuit board are sequentially laminated;
A first pressure is applied between the buffer member and the circuit board of the laminate in which the first joining member and the second joining member are at a first temperature lower than the sintering temperature of the sinterable metal particles. Process,
After the step of applying the first pressure, the buffer member and the circuit of the laminate in which the first joining member and the second joining member are at a second temperature equal to or higher than the sintering temperature of the sinterable metal particles. A second pressure exceeding the first pressure is applied to the substrate to form a first sinterable metal layer from the first joint member, and a second sinterable metal layer from the second joint member And a step of forming a semiconductor device. The first joining member and the second joining member include a first organic polymer,
In the step of preparing the first joining member and the second joining member,
Preparing a third joining member and a fourth joining member including the sinterable metal particles coated with a second organic polymer having a molecular weight smaller than that of the first organic polymer;
Heating the third joining member and the fourth joining member to a third temperature lower than the sintering temperature to convert at least a part of the second organic polymer into the first organic polymer, A method for manufacturing a semiconductor device according to claim 1. The first temperature is 135 ° C. or more and 155 ° C. or less, the first pressure is 4 MPa or more and 5 MPa or less,
3. The method of manufacturing a semiconductor device according to claim 1, wherein the second temperature is 245 ° C. or more and 275 ° C. or less, and the second pressure is a pressure of 20 MPa or more and 30 MPa or less.   In the step of forming the first sintered metal layer and the second sintered metal layer, each thickness of the first sintered metal layer and the second sintered metal layer is 30 μm or more and 50 μm or less. The manufacturing method of the semiconductor device of any one of 1-3.   The method of manufacturing a semiconductor device according to claim 1, wherein the buffer member includes a lead frame. The buffer member has a plate-like member,
The manufacturing method of the semiconductor device of any one of Claims 1-4 further equipped with the process of bonding a wiring member to the said plate-shaped member after the process of forming the said sintered metal layer.

Images