JP2016171653A - Individual operation detection system, individual operation detection method, and individual operation detector - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an individual operation detection system capable of controlling the dealing for the individual operation of a plurality of inverters in a unified manner.SOLUTION: A plurality of inverters in an individual operation detection system has an inverter circuit, an individual operation detector, and a first communication unit. The inverter circuit converts a DC power, supplied from a DC power supply, into an AC power supplied to a load. The individual operation detector detects individual operation based on a change in the frequency of the AC power. The first communication unit transmits the individual operation detection results to a centralized controller. The centralized controller has a second communication unit, and a control unit. The second communication unit receives the individual operation detection results. The control unit controls the plurality of inverters so as to interrupt the inverter circuit and a system power supply, based on the individual operation detection results received from one or a plurality of inverters, out of the plurality of inverters.SELECTED DRAWING: Figure 6

Description

  Embodiments described herein relate generally to an isolated operation detection system, an isolated operation detection method, and an isolated operation detection device.

  Conventionally, an inverter device that converts direct current power supplied from a direct current power source such as a solar cell or a fuel cell into alternating current and supplies power to a load together with the system power source is disconnected from the system power source and operates independently. An isolated operation detection device for detecting is known. The isolated operation detection device detects an isolated operation based on a change in the frequency of AC power supplied from the system power supply. In addition, a plurality of inverter devices may be connected to the system power supply, and the individual operation detection device may detect the individual operation in each inverter device. However, when there is a variation in the detection sensitivity of each individual operation detection device, there is a possibility that the timing at which the inverter device and the system power supply are cut off may vary.

U.S. Pat. No. 8,405,367 US Patent No. 8077437 US Patent No. 8423312 US Pat. No. 7,982,434 U.S. Pat. No. 8842454 Japanese Patent Laid-Open No. 10-094174

  The problem to be solved by the present invention is to provide an isolated operation detection system, an isolated operation detection method, and an isolated operation detection device capable of uniformly controlling the handling of isolated operations in a plurality of inverter devices.

  The isolated operation detection system of the embodiment has a plurality of inverter devices and a centralized control device. The plurality of inverter devices include an inverter circuit, a frequency detection unit, an isolated operation detection unit, and a first communication unit. The inverter circuit converts DC power supplied from a DC power source into AC power and supplies the AC power to a load connected to the system power source. The frequency detection unit detects the frequency of AC power supplied from the inverter circuit to the load or AC power supplied from the system power supply to the load. The isolated operation detection unit detects the isolated operation of the own device based on the change in the frequency detected by the frequency detection unit. A circuit breaker interrupts | blocks the said inverter circuit and the said system | strain power supply, when the independent operation is detected by the said independent operation detection part. The first communication unit transmits an isolated operation detection result by the isolated operation detection unit to the centralized control device. The centralized control apparatus has a second communication unit and a control unit. The second communication unit receives the isolated operation detection result transmitted by the first communication unit. The control unit is configured to cause the plurality of inverters to be disconnected from the inverter circuit and the system power supply by the circuit breaker based on an isolated operation detection result received from one or a plurality of inverter devices among the plurality of inverter devices. Control the device.

The block diagram of the independent operation detection system 1 of 1st Embodiment. 1 is a block diagram illustrating a configuration of a centralized control device 10 according to a first embodiment. The block diagram which shows the structure of the inverter apparatus 20 of 1st Embodiment. The figure which shows the relationship with the reactive power output by the inverter apparatus 20 with respect to the frequency deviation of alternating current power in 1st Embodiment. The figure which shows the relationship between the frequency deviation of alternating current power, and the reactive power absorbed by the load 140 in 1st Embodiment. The flowchart which shows the process sequence in the centralized control apparatus 10 of 1st Embodiment. The block diagram which shows the structure of the control part 14 in the isolated operation detection system 1 of 1st Embodiment. The block diagram which shows the other structure of the control part 14 in the isolated operation detection system 1 of 1st Embodiment. The block diagram which shows the other structure of the control part 14 in the isolated operation detection system 1 of 1st Embodiment. The block diagram which shows the other structure of the control part 14 in the isolated operation detection system 1 of 1st Embodiment. The block diagram of the isolated operation detection system 1A of 2nd Embodiment. The block diagram which shows the structure of the inverter apparatus 20 (M) in 2nd Embodiment. The block diagram which shows the structure of the master process part 200 in 2nd Embodiment. The block diagram which shows the structure of the master control part 204 in 1 A of independent operation detection systems of 2nd Embodiment. The block diagram which shows the other structure of the master control part 204 in the independent operation detection system 1A of 2nd Embodiment. The block diagram which shows the other structure of the master control part 204 in the independent operation detection system 1A of 2nd Embodiment. The block diagram which shows the other structure of the master control part 204 in the independent operation detection system 1A of 2nd Embodiment. The block diagram of several inverter apparatus 20 # in the independent operation detection system 1B of 3rd Embodiment. The block diagram which shows the structure of the communication part 210 in 3rd Embodiment. The block diagram which shows the other structure of the communication part 210 in 3rd Embodiment. The block diagram of the isolated operation detection system 1C of the 1st modification of embodiment. The block diagram which shows the structure of inverter apparatus 20 # -2 of the 2nd modification of embodiment.

Hereinafter, an isolated operation detection system, an isolated operation detection method, and an isolated operation detection device of an embodiment will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a configuration diagram of an isolated operation detection system 1 according to the first embodiment. The isolated operation detection system 1 includes a central control device 10 and a plurality of inverter devices 20A, 20B, 20C, 20D, 20E, 20E, 20F, and 20G. DC power supplies 100A, 100B, 100C, 100D, 100E, 100E, 100F, and 100G are connected to the plurality of inverter devices 20A, 20B, 20C, 20D, 20E, 20E, 20F, and 20G, respectively. Hereinafter, the inverter device is referred to as an inverter device 20 when it is not distinguished from other inverter devices. Further, the DC power source is described as a DC power source 100 when not distinguished from other DC power sources.

  The isolated operation detection system 1 connects a plurality of DC power supplies 100 and a system power supply 110 via an inverter device 20. Each inverter device 20 converts the DC power generated by the DC power supply 100 into AC power and supplies it to the power line 1a. On the other hand, the system power supply 110 supplies AC system power to the power line 1a. As a result, the isolated operation detection system 1 links the plurality of DC power supplies 100 and the system power supply 110 to supply AC power to the load 140.

  The DC power supply 100 generates DC power and supplies it to the inverter device 20. The DC power supply 100 is a solar cell panel, for example. Each DC power source 100 is, for example, one solar cell panel among a plurality of solar cell panels installed on the roof of a house. Although FIG. 1 shows a solar cell panel as the DC power source 100, the DC power source 100 is not limited to the solar cell panel, and may be another type of power generation device such as a fuel cell, a lead storage battery, A power storage device equipped with a nickel metal hydride battery or a lithium ion battery may be used. In addition, although one inverter device 20 is provided for each DC power source 100, the present invention is not limited to this, and one inverter device 20 may be provided for a plurality of DC power sources 100. A plurality of inverter devices 20 may be provided for one DC power supply 100.

  A system power supply 110 and a system breaker 120 are connected to the power line 1 a in the isolated operation detection system 1. The centralized control device 10 controls the relay control circuit 130 to control the opening / closing operation of the system breaker 120. When the system breaker 120 is controlled to be closed (on state), AC power is supplied from the system power supply 110 to the power line 1a. When the system breaker 120 is controlled in the open state (off state), the AC power supplied from the system power supply 110 is interrupted.

  FIG. 2 is a block diagram illustrating the configuration of the centralized control device 10 according to the first embodiment. The centralized control device 10 includes a communication unit 12 and a control unit 14. The communication unit 12 is a communication interface circuit. As shown in FIG. 1, the communication unit 12 is connected to each of the plurality of inverter devices 20 via a communication line 1 d. The communication unit 12 communicates with the inverter device 20 according to a predetermined communication method. The control unit 14 may be a software function unit that functions when a processor such as a CPU (Central Processing Unit) as an arithmetic circuit and a control circuit executes a program stored in a memory, or an LSI (Large Scale) Integration) and hardware function units such as ASIC (Application Specific Integrated Circuit).

  The control unit 14 centrally controls the plurality of inverter devices 20 based on the information received by the communication unit 12. The control unit 14 disconnects the connection between the system power supply 110 and the inverter device 20 when detecting the single operation state of the inverter device 20. For this purpose, the control unit 14 outputs a relay control signal for opening the system breaker 120 to the relay control circuit 130. The “single operation state” is an operation state of the inverter device 20 in which the power supply 110 stops supplying power and the inverter device 20 supplies power to the load 140 alone.

FIG. 3 is a block diagram illustrating a configuration of the inverter device 20 according to the first embodiment.
The inverter device 20 includes a communication unit 22, a relay control circuit 24, a connection breaker 26, an inverter circuit 30, a drive unit 40, a phase control unit 50, and an abnormality processing unit 70. The inverter circuit 30 in the inverter device 20 is connected between the DC power supply 100 and the load 140. The load 140 is an electric device including a capacitor C, a reactor L, and a resistor R. The load 140 operates by consuming AC power supplied from the system power supply 110 or AC power supplied from the inverter circuit 30.

  The communication unit 22 is a communication interface circuit that communicates with the centralized control device 10 via the communication line 1d. The communication unit 22 transmits the isolated operation detection result (AIS or PIS) output by the phase control unit 50 to the central control device 10. Further, the communication unit 22 outputs the received isolated operation detection result to the abnormality processing unit 70 in response to receiving the isolated operation detection result transmitted by the central control device 10.

  The relay control circuit 24 controls the interconnection breaker 26 to an open state in response to the supply of the gate block signal GB output from the abnormality processing unit 70. Thereby, the relay control circuit 24 interrupts the connection relationship between the load 140 and the system power supply 110 and the inverter device 20.

  The inverter circuit 30 includes a capacitor 32, an inverter bridge 34, a filter 36, and a current detection unit 38. Capacitor 32 is connected in parallel with DC power supply 100. Capacitor 32 smoothes the DC power generated by DC power supply 100. Inverter bridge 34 is connected in parallel with DC power supply 100 and capacitor 32. The inverter bridge 34 includes a switch unit 34a and a switch unit 34b, and a switch unit 34c and a switch unit 34d. The inverter bridge 34 performs on / off control of the plurality of switch units 34a, 34b, 34c, and 34d in accordance with the gate control signal output by the drive unit 40. Thereby, the inverter bridge 34 converts DC power into AC power. The filter 36 is an LC filter including a reactor 36a and a capacitor 36b. The AC power output from the inverter bridge 34 includes high-frequency noise accompanying PWM control. The filter 36 removes noise included in the AC power supplied by the inverter bridge 34. The current detection unit 38 detects an alternating current supplied from the filter 36 to the load 140. The supply current value Ifdk detected by the current detection unit 38 is read by the drive unit 40.

  The drive unit 40 includes an amplifier 41, a reference current generation unit 42, an amplifier 43, a PWM (Pulse Width Modulation) control unit 44, a gate drive unit 45, a voltage detection unit 46, and a PLL (Phase Locked Loop) circuit. 47, a phase shift circuit 48, and a sine wave circuit 49.

  The amplifier 41 receives a voltage value (DC voltage value) Vfck and a reference voltage value Vref of DC power generated by the DC power supply 100. The amplifier 41 amplifies the difference between the DC voltage value Vfck and the reference voltage value Vref. The amplifier 41 outputs the amplified signal VRout to the reference current generator 42. The reference current generator 42 outputs the signal VRout from the amplifier 41 and the sine wave signal Vsin from the sine wave circuit 49. The reference current generator 42 outputs the product of the signal VRout and the sine wave signal Vsin to the amplifier 43 as a reference current Iref. The amplifier 43 outputs the reference current Iref and the current value Ifdk from the current detector 38. The amplifier 43 amplifies the difference between the reference current Iref and the supply current value Ifdk and outputs the amplified difference to the PWM control unit 44. Based on the signal output from the amplifier 43, the PWM control unit 44 calculates the on / off times of the switch units 34a, 34b, 34c, and 34d in the inverter bridge 34 so that the supply current value Ifdk approaches the reference current Iref. The PWM control unit 44 generates a PWM signal based on the on / off times of the switch units 34 a, 34 b, 34 c and 34 d and outputs the PWM signal to the gate drive unit 45. The gate drive unit 45 turns on / off the switch units 34a, 34b, 34c and 34d according to the PWM signal generated by the PWM control unit 44.

  The voltage detector 46 detects the voltage value of the AC power supplied to the load 140. The AC power supplied to the load 140 is one or both of AC power supplied from the inverter circuit 30 and AC power supplied from the system power supply 110. The PLL circuit 47 generates a PLL signal synchronized with the phase of the AC voltage detected by the voltage detector 46 and outputs the PLL signal to the phase shift circuit 48. The phase shift circuit 48 outputs a PLL signal and is supplied with a signal (phase shift amount signal) indicating a phase shift amount from the phase control unit 50. The phase shift circuit 48 shifts the phase of the PLL signal by the shift amount of the phase shift amount signal. The sine wave circuit 49 generates a sine wave signal Vsin based on the PLL signal whose phase is shifted by the phase shift circuit 48 and outputs the sine wave signal Vsin to the reference current generator 42.

  The phase control unit 50 includes a PLL frequency detection unit 51, a function generation unit 52, a frequency detection unit 53, a frequency measurement processing unit 54, a voltage measurement unit 55, a fundamental voltage calculation unit 56, and a high frequency voltage measurement unit. 57, a high frequency voltage calculation unit 58, a frequency deviation calculation unit 59, a reactive power injection amount calculation unit 60, a step injection condition determination unit 61, a step injection amount calculation unit 62, adders 63 and 64, active A system independent operation detection unit 65 and a passive system independent operation detection unit 66 are provided.

  The PLL frequency detector 51 detects the frequency of the AC power supplied from the inverter bridge 34 to the load 140 based on the PLL signal output from the PLL circuit 47. The function generator 52 calculates the phase angle based on, for example, a predetermined characteristic function. The function generator 52 calculates the advance amount and delay amount of the phase angle based on the relationship between the frequency of the AC power detected by the PLL frequency detector 51 and the reference frequency (rated frequency). The advance amount and delay amount of the phase angle calculated by the function generator 52 are output to the adder 64. As a result, the function generator 52 shifts the phase of the sine wave signal Vsin and controls the reactive power (Ifdk × Vsin θ) output from the inverter bridge 34.

  The frequency detection unit 53 detects the frequency of the AC power supplied to the load 140. The frequency measurement processing unit 54 measures the value of the frequency of the AC power detected by the frequency detection unit 53. The frequency deviation calculation unit 59 accumulates a plurality of frequency values measured in time series by the frequency measurement processing unit 54. The frequency deviation calculation unit 59 calculates the moving average value of the past AC power frequency and the moving average value of the current AC power frequency. The frequency deviation calculation unit 59 calculates a deviation (frequency deviation) between the moving average value of the past AC power frequency and the moving average value of the current AC power frequency. The frequency deviation signal DLTF calculated by the frequency deviation calculation unit 59 is output to the reactive power injection amount calculation unit 60 and the communication unit 22.

The reactive power injection amount calculation unit 60 calculates the amount of reactive power to be output to the inverter circuit 30 based on the frequency deviation calculated by the frequency deviation calculation unit 59. FIG. 4 is a diagram illustrating the relationship between the frequency deviation of the AC power and the reactive power output by the inverter device 20 in the first embodiment. FIG. 5 is a diagram illustrating a relationship between the reactive power absorbed by the load 140 and the frequency deviation of the AC power in the first embodiment.
According to FIG. 4, the reactive power phase increases in the advance direction as the frequency deviation increases. The reactive power injection amount calculation unit 60 calculates the reactive power value along a gentle gain characteristic when the frequency deviation is within a predetermined range Δf1. The reactive power injection amount calculation unit 60 calculates the value of reactive power along high gain characteristics when the frequency deviation exceeds a predetermined range Δf1. The value of the reactive power calculated by the reactive power injection amount calculation unit 60 is regulated to a value within the range from + Rpu to -Rpu.

  The reactive power injection amount calculation unit 60 causes the inverter device 20 to output reactive power exceeding the reactive power absorbed by the load 140 illustrated in FIG. 5. Thereby, the reactive power injection amount calculating unit 60 can prompt the frequency shift of the system power. The reactive power injection amount signal Qref calculated by the reactive power injection amount calculation unit 60 is output to the adder 63 and the communication unit 22.

  The voltage measurement unit 55 measures the voltage of AC power supplied to the load 140. The fundamental wave voltage calculation unit 56 calculates the voltage value of the fundamental wave component of the AC power from the voltage of the AC power measured by the voltage measurement unit 55. The high frequency voltage measurement unit 57 measures the voltage of the harmonic component included in the voltage value of the AC power. The high frequency voltage calculation unit 58 calculates the voltage value of the harmonic component of the AC power from the voltage value of the harmonic component measured by the high frequency voltage measurement unit 57.

  The step injection condition determination unit 61 outputs the frequency of the AC power output from the frequency measurement processing unit 54, the voltage value of the fundamental wave component of AC power output from the fundamental wave voltage calculation unit 56, and the output from the high frequency voltage calculation unit 58. A change in AC power is detected based on the voltage value of the harmonic component of the AC power. Step injection condition determination unit 61 injects into load 140 when the frequency of AC power, the voltage value of the fundamental component of AC power, or the voltage value of the harmonic component of AC power changes beyond a predetermined threshold. It is determined that a condition (step injection condition) for increasing the reactive power stepwise is satisfied. Note that the step injection condition determination unit 61 may determine the step injection condition based on changes in the frequency of the AC power and the harmonic component of the AC power. The step injection condition determination unit 61 outputs a timing signal QFLG to the communication unit 22 at the timing when it is determined that the step injection condition is satisfied.

  Based on the result determined by the step injection condition determining unit 61, the step injection amount calculating unit 62 calculates the amount by which the reactive power is increased stepwise. The step injection amount signal calculated by the step injection amount calculation unit 62 is output to the adder 63 and the communication unit 22.

  The reactive power value calculated by the reactive power injection amount calculation unit 60 and the reactive power increase amount calculated by the step injection condition determination unit 61 are added by the adder 63 and output to the adder 64. The reactive power value added by the adder 63 is added to the output value of the function generator 52 by the adder 64 and is output to the phase shift circuit 48.

  The frequency of the AC power measured by the frequency measurement processing unit 54 is output to the passive system independent operation detection unit 66. The passive single operation detection unit 66 monitors the frequency of the AC power. Passive type isolated operation detection unit 66 detects the isolated operation state of inverter device 20 when it is determined that the state of the value, frequency, phase, or the like of the AC power exceeds the normal range.

  The frequency of the AC power measured by the frequency measurement processing unit 54 is output to the active type isolated operation detection unit 65. The active independent operation detection unit 65 monitors the change in the frequency of the AC power due to the control of the phase of the amount of reactive power output by the inverter circuit 30. The active type isolated operation detection unit 65 detects the isolated operation state of the inverter device 20 when it is determined that the change in the AC power is excessive.

  The abnormality processing unit 70 includes an abnormality detection unit 72, a voltage relay 74, a frequency relay 76, and a frequency change rate relay 78. The voltage relay 74 detects an abnormality in the value of the AC voltage supplied to the load 140. When the voltage relay 74 detects an abnormality in the value of the AC voltage, it outputs a voltage abnormality signal OVUV to the abnormality detection unit 72. The frequency relay 76 detects an abnormality in the frequency of the AC voltage supplied to the load 140. When the frequency relay 76 detects an abnormality in the frequency of the AC voltage, the frequency relay 76 outputs a frequency abnormality signal OFUF to the abnormality detection unit 72. The frequency change rate relay 78 detects an abnormality in the frequency change rate of the AC voltage supplied to the load 140. The frequency change rate relay 78 outputs a frequency change rate abnormality signal df / dt to the abnormality detection unit 72 when detecting an abnormality in the frequency change rate of the AC voltage.

  The abnormality detector 72 outputs a voltage abnormality signal OVUV, a frequency abnormality signal OFUF, and a frequency change rate abnormality signal df / dt. The abnormality detection unit 72 outputs the gate block signal GB to the gate driving unit 45 and the relay control circuit 24 when the voltage abnormality signal OVUV, the frequency abnormality signal OFUF, or the frequency change rate abnormality signal df / dt is output. Thereby, the abnormality detection unit 72 stops the operation of the inverter bridge 34 and controls the interconnection breaker 26 to the open state.

  In addition, the anomaly detection unit 72 is output with an isolated operation detection signal AIS by the active isolated operation detection unit 65 and an isolated operation detection signal PIS is output by the passive method isolated operation detection unit 66. The abnormality detection unit 72 outputs the gate block signal GB to the gate drive unit 45 and the relay control circuit 24 when the isolated operation detection signal AIS or PIS is output.

  Further, the abnormality detection unit 72 is supplied with the external gate block signal EXTGB from the communication unit 22. The external gate block signal EXTGB is output from the communication unit 22 in accordance with the control of the central control device 10. The abnormality detection unit 72 outputs the gate block signal GB to the gate drive unit 45 and the relay control circuit 24 when the external gate block signal EXTGB is output.

  Isolated operation detection signals AIS and PIS are output to the communication unit 22. The communication unit 22 transmits the isolated operation detection result to the central control device 10 in response to the output of the isolated operation detection signals AIS and PIS. Further, the communication unit 22 includes a frequency deviation signal DLTF, a reactive power injection amount signal Qref, a step injection timing signal QFLG, a gate block signal GB, a voltage abnormality signal OVUV, a frequency abnormality signal OFUF, and a frequency change rate abnormality signal df / dt is output. The communication unit 22 outputs a frequency deviation signal DLTF, a reactive power injection amount signal Qref, a step injection timing signal QFLG, a gate block signal GB, a voltage abnormality signal OVUV, a frequency abnormality signal OFUF, and a frequency change rate abnormality signal df / dt. In response to this, the central control device 10 may be transmitted.

  The signal transmitted by the communication unit 22 is received by the central control device 10. FIG. 6 is a flowchart illustrating a processing procedure in the centralized control device 10 according to the first embodiment. The centralized control device 10 stands by until it receives the isolated operation detection result transmitted by the inverter device 20, and responds to the reception of one or more isolated operation detection results (step S100). It transmits to the inverter apparatus 20 (step S102). Furthermore, the central control device 10 transmits the isolated operation detection result to the inverter device 20 and outputs a relay control signal to the relay control circuit 130. Thereby, the centralized control device 10 outputs the external gate block signal EXTGB from the communication unit 22 in the other inverter device 20 to stop the operation of the inverter circuit 30, and also connects the interconnection breaker 26 and the system breaker 120. Control to open state.

  As described above, according to the isolated operation detection system 1 of the first embodiment, the inverter circuit 30 is based on the isolated operation detection result transmitted from one or a plurality of inverter devices 20 and received by the central control device 10. Since the plurality of inverter devices 20 are controlled so as to shut off the central control device 10, the plurality of inverter devices 20 are controlled in response to the detection of the single operation by the inverter device 20 having high sensitivity to the change in AC power. can do. As a result, according to the isolated operation detection system 1 of the first embodiment, it is possible to uniformly control the countermeasures for the isolated operation in the plurality of inverter devices.

  In the isolated operation detection system 1 of the first embodiment, the centralized control device 10 transmits the isolated operation detection results to the other inverter devices 20 based on the number of isolated operation detection signals AIS transmitted by the plurality of inverter devices 20. May be. FIG. 7 is a block diagram illustrating a configuration of the control unit 14 in the isolated operation detection system 1 according to the first embodiment. The control unit 14 includes an adder circuit 14a and a comparator 14b. The adder circuit 14a adds the reception numbers of the plurality of islanding operation detection signals AIS-1, AIS-2,..., And AIS-n transmitted from the plurality of inverter devices 20 and received by the communication unit 12. The adder circuit 14a outputs the addition result SUMAIS to the comparator 14b. The comparator 14b inputs the addition result SUMAIS through the a terminal and inputs a preset number threshold value through the b terminal. As the number threshold, the number of inverter devices 20 serving as a determination condition for transmitting the independent operation detection result to the other inverter devices 20 among the plural (n) inverter devices 20 is set. The comparator 14b causes the communication unit 12 to transmit the isolated operation detection result FIXAIS to the other inverter device 20 in response to the addition result SUMAIS reaching the number threshold. Note that the central control device 10 may transmit the isolated operation detection result to the inverter device 20 based on the number of received independent operation detection signals PIS instead of the isolated operation detection signal AIS.

  As a result, according to the centralized control device 10, according to the fact that the single operation is detected by the plurality of inverter devices 20 among the plurality of inverter devices 20 that are highly sensitive to changes in AC power, The isolated operation detection result can be transmitted. Thereby, according to the isolated operation detection system 1, even if an isolated operation is detected by mistake, it is possible to suppress immediate control of the other inverter device 20.

  In the isolated operation detection system 1 according to the first embodiment, the control unit 14 uses other inverter devices 20 based on the amount and polarity of reactive power calculated by any one of the plurality of inverter devices 20. May be controlled. The control unit 14 is supplied with the reactive power injection amount signal Qref transmitted from the inverter device 20 by the communication unit 12. The control unit 14 transmits the reactive power injection amount signal Qref to the other inverter device 20 in response to the reactive power injection amount signal Qref being supplied. Thereby, the centralized control apparatus 10 can arrange | position the injection amount and polarity of reactive power in the some inverter apparatus 20, and can accelerate | stimulate the frequency shift of alternating current power in each inverter apparatus 20. FIG.

  FIG. 8 is a block diagram illustrating another configuration of the control unit 14 in the isolated operation detection system 1 of the first embodiment. The control unit 14 includes a maximum reactive power detection unit 14c. The maximum reactive power detection unit 14c outputs a plurality of reactive power injection amount signals Qref-1, Qref-2,..., And Qref-n transmitted by the plurality of inverter devices 20 and received by the communication unit 12. The maximum reactive power detection unit 14c detects a signal having the maximum amount of reactive power among the plurality of reactive power injection amount signals Qref. At this time, the maximum reactive power detection unit 14c detects the reactive power injection amount signal Qref having the maximum absolute value of the amount of reactive power. The maximum reactive power detection unit 14c outputs the detected reactive power injection amount signal Qref to the other inverter device 20 as an output signal (Qref-out). Thereby, the centralized control apparatus 10 can shift the phase of the reactive signal of the other inverter apparatus 20 according to the maximum amount and polarity of reactive power.

  As a result, according to the isolated operation detection system 1, by further promoting the frequency shift of the AC power in each inverter device 20, each inverter device 20 can detect the isolated operation at a higher speed, and a plurality of inverters Variations in the detection timing of the isolated operation in the device 20 can be suppressed. Moreover, according to the independent operation detection system 1, since the polarity of the invalid signal in each inverter apparatus 20 can be made uniform, it can be avoided that the amount of reactive power is reduced by canceling the polarity.

  In the isolated operation detection system 1 of the first embodiment, the control unit 14 controls the other inverter device 20 based on the frequency deviation calculated by any one of the plurality of inverter devices 20. Also good. The other inverter device 20 calculates the reactive power injection amount signal Qref to be output by the inverter circuit 30 based on the received frequency deviation in response to receiving the frequency deviation signal DLTF transmitted from the centralized control device 10.

  FIG. 9 is a block diagram illustrating another configuration of the control unit 14 in the isolated operation detection system 1 according to the first embodiment. The control unit 14 includes a maximum frequency deviation detection unit 14d. The maximum frequency deviation detection unit 14d outputs a plurality of frequency deviation signals DLTF-1, DLTF-2,..., And DLTF-n transmitted by the plurality of inverter devices 20 and received by the communication unit 12. The maximum frequency deviation detector 14d detects a signal having the maximum frequency deviation among the plurality of frequency deviation signals DLTF. The maximum frequency deviation detector 14d outputs the detected frequency deviation signal DLTF to the other inverter device 20 as an output signal (DLTFout). Thereby, the centralized control device 10 can cause the other inverter device 20 to calculate the reactive power injection amount signal Qref in accordance with the maximum frequency deviation and shift the phase of the reactive signal. As a result, according to the independent operation detection system 1, it is possible to suppress variations in the detection timing of the independent operation in the plurality of inverter devices 20 by further promoting the frequency shift of the AC power in each inverter device 20.

  In the isolated operation detection system 1 according to the first embodiment, the control unit 14 receives a step injection timing signal QFLG transmitted from any one of the plurality of inverter devices 20. The timing of step injection of the inverter device 20 may be synchronized. FIG. 10 is a block diagram illustrating another configuration of the control unit 14 in the isolated operation detection system 1 according to the first embodiment. The control unit 14 includes an OR circuit 14e. Timing signals QFLG-1, QFLG-2,..., And QFLG-n received by the communication unit 12 are output to the OR circuit 14e. In response to the supply of any timing signal QFLG, the OR circuit 14e causes the other inverter device 20 to transmit the timing signal QFLGout for step injection. Thereby, the centralized control device 10 can synchronize the timing of outputting the reactive power by the inverter circuit 30 by synchronizing the timing of the step injection by the step injection amount calculation unit 62 in the plurality of inverter devices 20. Thereby, according to the independent operation detection system 1, the dispersion | variation in the detection timing of the independent operation in the some inverter apparatus 20 can be suppressed.

  In the isolated operation detection system 1 according to the first embodiment, the control unit 14 transmits the abnormality detection signal from any one of the plurality of inverter devices 20 to another inverter device 20. An abnormality detection signal may be transmitted. The abnormality detection signal is any one of a voltage abnormality signal OVUV, a frequency abnormality signal OFUF, or a frequency change rate abnormality signal df / dt. Thereby, the centralized control device 10 outputs the external gate block signal EXTGB from the communication unit 22 in the other inverter device 20 to stop the operation of the inverter circuit 30, and also connects the interconnection breaker 26 and the system breaker 120. Control to open state. Thereby, according to the centralized control device 10, the gate block signal GB can be generated in the other inverter device 20 in response to the abnormality detected by any one of the plurality of inverter devices 20. .

(Second Embodiment)
Hereinafter, the isolated operation detection system 1A of the second embodiment will be described. The same parts as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. FIG. 11 is a configuration diagram of an isolated operation detection system 1A according to the second embodiment.
In the isolated operation detection system 1A of the second embodiment, instead of the centralized control device 10, any one of the plurality of inverter devices 20 has the authority of the master. The inverter devices 20 other than the inverter device 20 having the master authority (hereinafter referred to as the inverter apparatus 20 (M)) have the slave authority. The inverter device 20 having the authority of the slave (hereinafter referred to as the inverter device 20 (S)) operates according to the information transmitted by the inverter device 20 (M). Since the inverter device 20 (S) operates in the same manner as the inverter device 20 of the first embodiment described above, description thereof will be omitted.

  The authority of the master and the authority of the slave are set according to predetermined setting conditions. As for the predetermined condition, for example, the inverter device 20 that is activated first among the plurality of inverter devices 20 acquires the authority of the master. As a result, the inverter devices 20 other than the inverter device 20 that has acquired the authority of the master acquire the authority of the slave.

  FIG. 12 is a block diagram showing a configuration of the inverter device 20 (M) in the second embodiment. The inverter device 20 (M) includes a master processing unit 200 instead of the communication unit 22. FIG. 13 is a block diagram illustrating a configuration of the master processing unit 200 according to the second embodiment. The master processing unit 200 includes a communication unit 202 and a master control unit 204. Communication unit 202 is connected to a plurality of inverter devices 20 (S) and relay control circuit 130 via communication line 1d. The communication unit 202 communicates with the inverter device 20 (S) according to a predetermined communication method.

  Master control unit 204 controls a plurality of inverter devices 20 (S) based on the information received by communication unit 202. The master control unit 204 disconnects the connection between the system power supply 110 and the plurality of inverter devices 20 when the single operation state is detected inside the master control unit 204 or by the inverter device 20 (S).

  FIG. 14 is a block diagram illustrating a configuration of the master control unit 204 in the isolated operation detection system 1A of the second embodiment. The master control unit 204 includes an addition circuit 204a and a comparator 204b. The adder circuit 204a is the single operation detection signal AIS-1, AIS-2,..., And AIS-n transmitted to the plurality of inverter devices 20 (S), and the single operation output by the active single operation detection unit 65. The number of received operation detection signals AIS is added. The comparator 204b transmits the isolated operation detection result FIXAIS to the other inverter device 20 (S) in response to the addition result SUMAIS reaching the unit number threshold. In addition, the master control unit 204 outputs the external gate block signal EXTGB to the abnormality detection unit 72 and causes the abnormality detection unit 72 to output the gate block signal GB.

  In the isolated operation detection system 1A of the second embodiment, the master control unit 204 may control the inverter device 20 (S) based on the frequency deviation calculated by the inverter device 20 (S). FIG. 15 is a block diagram illustrating another configuration of the master control unit 204 in the isolated operation detection system 1A of the second embodiment. The master control unit 204 includes a maximum reactive power detection unit 204c. The maximum reactive power detection unit 204c receives a plurality of reactive power injection amount signals Qref-1, Qref-2,..., And Qref-n from the plurality of inverter devices 20 (S), and the reactive power injection amount calculation unit 60 To output a reactive power injection amount signal Qref. The maximum reactive power detection unit 204c detects a signal having the maximum amount of reactive power among the plurality of reactive power injection amount signals Qref, and outputs the detected reactive power injection amount signal Qref as an output signal (Qref-out). To the inverter device 20 (S). Thereby, inverter device 20 (M) can shift the phase of the invalid signal of inverter device 20 (S) according to the maximum amount and polarity of reactive power.

  In the isolated operation detection system 1A of the second embodiment, the master control unit 204 may control the inverter device 20 (S) based on the frequency deviation calculated by the inverter device 20 (S). FIG. 16 is a block diagram illustrating another configuration of the master control unit 204 in the isolated operation detection system 1A of the second embodiment. The master control unit 204 includes a maximum frequency deviation detection unit 204d. The maximum frequency deviation detection unit 204d receives a plurality of frequency deviation signals DLTF-1, DLTF-2,..., And DLTF-n from the inverter device 20 (S). Is output. The maximum frequency deviation detector 204d detects a signal having the maximum frequency deviation from among the plurality of frequency deviation signals DLTF, and outputs the signal as an output signal (DLTFout) to the inverter device 20 (S). Thereby, the inverter apparatus 20 (M) can cause the inverter apparatus 20 (S) to calculate the reactive power injection amount according to the maximum frequency deviation, and shift the phase of the invalid signal.

  In the islanding operation detection system 1A of the second embodiment, the master control unit 204 receives the step injection timing signal QFLG transmitted from the inverter device 20 (S), and receives the step injection timing signal QFLG from the inverter device 20 (S). The timing of step injection may be synchronized. FIG. 17 is a block diagram illustrating another configuration of the master control unit 204 in the isolated operation detection system 1A of the second embodiment. The control unit 14 includes an OR circuit 204e. Timing signals QFLG-1, QFLG-2,..., And QFLG-n are transmitted from the inverter device 20 (S) to the OR circuit 204e, and the timing signal QFLG is output from the step injection condition determination unit 61. The OR circuit 204e causes the inverter device 20 (S) to transmit the step injection timing signal QFLGout in response to the supply of any timing signal QFLG. Thereby, inverter device 20 (M) synchronizes the timing of step injection in inverter device 20 (S).

  In the isolated operation detection system 1A of the second embodiment, the master control unit 204 responds to an abnormality detection signal transmitted from the inverter device 20 (S), and transmits an abnormality detection signal to the other inverter devices 20 (S). May be sent. The abnormality detection signal is any one of a voltage abnormality signal OVUV, a frequency abnormality signal OFUF, or a frequency change rate abnormality signal df / dt. Thereby, the centralized control device 10 outputs the external gate block signal EXTGB from the communication unit 22 in the other inverter device 20 to stop the operation of the inverter circuit 30, and also connects the interconnection breaker 26 and the system breaker 120. Control to open state.

  As described above, according to the islanding operation detection system 1A of the second embodiment, based on the islanding operation detection result transmitted from one or a plurality of inverter devices 20 (S) and received by the inverter device 20 (M). Since the plurality of inverter devices 20 are controlled so that the inverter circuit 30 and the centralized control device 10 are disconnected, other inverters are detected in response to the detection of the single operation by the inverter device 20 having high sensitivity to changes in AC power. The device 20 (S) can be controlled. As a result, according to the isolated operation detection system 1 </ b> A of the second embodiment, it is possible to uniformly control the countermeasures for the isolated operation in the plurality of inverter devices 20.

(Third embodiment)
Hereinafter, the isolated operation detection system 1B of the third embodiment will be described. The same parts as those in the embodiment described above are denoted by the same reference numerals, and detailed description thereof is omitted. An isolated operation detection system 1B of the third embodiment has the same system configuration as that of FIG. 11, and each inverter device 20 is different from that of the second embodiment.
In the isolated operation detection system 1B of the third embodiment, the plurality of inverter devices 20 communicate with each other, and the isolated operation is performed based on the processing result in the inverter device 20 and information transmitted by the other inverter devices 20. To detect.

  FIG. 18 is a configuration diagram of a plurality of inverter devices 20 # in the isolated operation detection system 1B of the third embodiment. The inverter device 20 # does not include the adder 63 in the phase control unit 50, and the reactive power injection amount signal Qref calculated by the reactive power injection amount calculation unit 60 is transmitted to the communication unit 210. The step injection amount calculation unit 62 It differs from the first embodiment in that the calculated step injection amount signal QSTP is output to the communication unit 210.

  Each inverter device 20 # includes a communication unit 210 that communicates with another inverter device 20 #. The isolated operation detection signals AIS and PIS are output to the communication unit 210 as in the communication unit 22 of the first embodiment. Communication unit 210 transmits an isolated operation detection result to another inverter device 20 # in response to output of isolated operation detection signals AIS and PIS. Communication unit 210 outputs external gate block signal EXTGB to abnormality detection unit 72 in response to the reception of the isolated operation detection result transmitted from other inverter device 20 #. Thereby, inverter device 20 # causes gate block signal GB to be generated by abnormality detector 72.

  In addition, the communication unit 210 includes the isolated operation detection signals AIS and PIS output from the active isolated operation detection unit 65 and the passive isolated operation detection unit 66, and the isolated operation detection signal AIS transmitted from the other inverter device 20 #. In addition, it may be determined that the total number of PISs and PISs exceeds the number threshold. The communication unit 210 outputs an external gate block signal EXTGB to the abnormality detection unit 72 when the total number of the independent operation detection signals AIS and PIS exceeds the number threshold.

  FIG. 19 is a block diagram illustrating a configuration of the communication unit 210 according to the third embodiment. The communication unit 210 may include a maximum reactive power detection unit 210a. The maximum reactive power detection unit 210a includes a plurality of reactive power injection amount signals Qref-1, Qref-2,..., And Qref-n transmitted by the other inverter device 20 #, and a reactive power injection amount calculation unit 60. Among the output reactive power injection amount signals Qref, a signal having the maximum reactive power amount is detected. The communication unit 210 outputs a value Qout obtained by adding the detected reactive power injection amount signal and the step injection amount signal QSTP output from the step injection amount calculation unit 62 to the adder 64. Thereby, inverter apparatus 20 # can shift the phase of the reactive power output by inverter circuit 30 by Qout.

  Furthermore, communication unit 210 may detect the maximum frequency deviation signal DLTF among the plurality of frequency deviation signals DLTF output by other inverter device 20 # and frequency deviation calculation unit 59. The communication unit 210 supplies the detected maximum frequency deviation signal DLTF to the reactive power injection amount calculation unit 60. Accordingly, the communication unit 210 can calculate the reactive power injection amount signal Qref based on the maximum frequency deviation signal DLTF.

  FIG. 20 is a block diagram illustrating another configuration of the communication unit 210 according to the third embodiment. The communication unit 210 may include an OR circuit 210b. The OR circuit 210b outputs a timing signal QFLGA in response to any of the step injection timing signals QFLG transmitted by the other inverter device 20 # being supplied. The timing signal QFLGA is output to an OR circuit 61a connected between the step injection condition determination unit 61 and the step injection amount calculation unit 62. The OR circuit 61a causes the step injection amount calculation unit 62 to calculate the step injection amount at the timing when the timing signal QFLGA from the communication unit 210 or the timing signal QFLG is supplied from the step injection condition determination unit 61.

  As described above, according to the islanding operation detection system 1B of the third embodiment, since the islanding operation is detected based on the islanding operation detection result transmitted by the other inverter device 20 #, the sensitivity to the change in the AC power is detected. The other inverter device 20 # can be controlled in response to the fact that the single operation is detected by the inverter device 20 # having a high value. As a result, according to the isolated operation detection system 1 </ b> B of the third embodiment, it is possible to uniformly control a countermeasure for the isolated operation in the plurality of inverter devices 20.

(First modification)
FIG. 21 is a configuration diagram of an isolated operation detection system 1C according to a first modification of the embodiment. In the isolated operation detection system 1C of the first modification, the system power supply 110 is a three-phase AC system power supply. System breakers 120a, 120b and 120c and power lines 1a, 1b and 1c are connected to system power supply 110 corresponding to each phase of the system power. The system breakers 120a, 120b and 120c are on / off controlled in accordance with the control of the centralized control device 10, respectively. For example, the plurality of inverter devices 20A, 20D, and 20E form a three-phase AC bridge circuit that outputs AC power to the power lines 1a, 1b, and 1c corresponding to the three-phase phases. Further, for example, the plurality of inverter devices 20B, 20F, and 20C form a three-phase AC bridge circuit that outputs AC power to the power lines 1a, 1b, and 1c corresponding to the three-phase phases, respectively.

(Second modification)
FIG. 22 is a block diagram illustrating a configuration of the inverter device 20 according to the second modified example of the embodiment. The inverter device 20 # -2 of the second modification is different from the inverter device 20 in the first embodiment in that the abnormality processing unit 70 is not provided. Inverter device 20 # -2 of the second modified example transmits isolated operation detection signals AIS and PIS, frequency deviation signal DLTF, reactive power injection amount signal Qref, and timing signal QFLG via communication unit 22. The communication unit 22 is supplied with the external gate block signal EXTGB from the central control device 10 or the inverter device 20 (M). The communication unit 22 outputs the gate block signal GB to the inverter circuit 30 and the relay control circuit 24 in response to the supply of the external gate block signal EXTGB. Thus, the communication unit 22 stops the operation of the inverter circuit 30 and controls the interconnection breaker 26 to an open state. According to the inverter device 20 # -2 of the second modified example, when the isolated operation is detected based on the external gate block signal EXTGB transmitted by the central control device 10 or the inverter device 20 (M) described above. Similar operations can be performed.

  According to at least one embodiment described above, when the independent operation detection result is transmitted by any one of the plurality of inverter devices 20, the relay control circuit 24 causes the inverter device 20, the system power supply 110, Since the central control device 10 that controls the other inverter device 20 so as to shut off the inverter device 20, even if there is an inverter device 20 with a low sensitivity in which the frequency of the AC power changes among the plurality of inverter devices 20, The coping with respect to the single operation in the plurality of inverter devices can be controlled uniformly.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and the equivalents thereof.

DESCRIPTION OF SYMBOLS 1, 1A, 1B, 1C ... Isolated operation detection system, 10 ... Central control device, 12 ... Communication part, 14 ... Control part, 14a ... Adder circuit, 14b ... Comparator, 14c ... Maximum reactive power detection part, 14d ... Maximum Frequency deviation detection unit, 14e ... OR circuit, 20 ... inverter device, 22 ... communication unit, 24 ... relay control circuit, 26 ... interconnection breaker, 30 ... inverter circuit, 40 ... drive unit, 45 ... gate drive unit, 46 DESCRIPTION OF SYMBOLS ... Voltage detection part 48 ... Phase shift circuit 50 ... Phase control part 53 ... Frequency detection part 54 ... Frequency measurement processing part 55 ... Voltage measurement part 56 ... Fundamental voltage calculation part 57 ... High frequency voltage measurement part 58 ... high frequency voltage calculation unit, 59 ... frequency deviation calculation unit, 60 ... reactive power injection amount calculation unit, 61 ... step injection condition determination unit, 62 ... step injection amount calculation unit, 65 ... active system single operation detection unit, 6 ... Passive single operation detection unit, 70 ... Abnormal processing unit, 100 ... DC power supply, 110 ... System power supply, 120 ... System breaker, 130 ... Relay control circuit, 140 ... Load, 200 ... Master processing unit, 210 ... Communication Part

Claims (9)

An isolated operation detection system comprising a plurality of inverter devices and a centralized control device,
An inverter circuit that converts DC power supplied from a DC power source into AC power and supplies it to a load connected to a system power source, AC power supplied from the inverter circuit to the load, or from the system power source to the load A frequency detection unit that detects the frequency of the supplied AC power, a single operation detection unit that detects a single operation of the device itself based on a change in the frequency detected by the frequency detection unit, and a single operation detection unit A circuit breaker that shuts off the inverter circuit and the system power supply when operation is detected, and a first communication unit that transmits an isolated operation detection result by the isolated operation detection unit to the centralized control device. An inverter device,
Based on a second communication unit that receives the isolated operation detection result transmitted by the first communication unit, and an isolated operation detection result received from one or a plurality of inverter devices among the plurality of inverter devices, A control unit that controls the plurality of inverter devices so as to interrupt the inverter circuit and the system power supply by a circuit breaker;
An isolated operation detection system comprising: The control unit shuts off the inverter circuit and the system power supply by the circuit breaker when the second communication unit receives an isolated operation detection result by a predetermined number or more of the plurality of inverter devices. Controlling the inverter device to
The isolated operation detection system according to claim 1. The plurality of inverter devices include a frequency deviation calculation unit that calculates a frequency deviation detected by the frequency detection unit, and an invalid output that is output by the inverter circuit based on the frequency deviation calculated by the frequency deviation calculation unit. Reactive power injection amount calculation unit that calculates the amount and polarity of power,
The first communication unit transmits the amount and polarity of reactive power calculated by the reactive power injection amount calculation unit to the central control device,
When the control unit receives the amount and polarity of reactive power transmitted by any one of the plurality of inverter devices by the second communication unit, the control unit receives the invalidity received by the second communication unit. Controlling other inverter devices to cause the inverter circuit to output reactive power of the amount and polarity of power,
The isolated operation detection system according to claim 1. The first communication unit transmits the frequency deviation calculated by the frequency deviation calculation unit to the central control device,
When the frequency deviation transmitted by any one of the plurality of inverter devices is received by the second communication unit, the control unit is based on the frequency deviation received by the second communication unit. Control other inverter devices so as to calculate reactive power by the reactive power injection amount calculation unit,
The isolated operation detection system according to claim 3. The plurality of inverter devices are:
A step injection condition determination unit for determining a condition for increasing the reactive power injected into the load stepwise based on a change in frequency detected by the frequency detection unit;
Based on the result determined by the step injection condition determination unit, a step injection amount calculation unit that calculates an amount to increase the reactive power to be supplied to the load stepwise,
With
The first communication unit transmits a timing signal determined to increase the reactive power stepwise by the step injection condition determination unit to the centralized control device,
In response to receiving the timing signal transmitted from any one of the plurality of inverter devices by the second communication unit, the control unit steps reactive power in another inverter device. Synchronize the timing to increase,
The isolated operation detection system according to claim 1. The plurality of inverter devices include an abnormality detection unit that detects an abnormality of AC power supplied to the load,
The first communication unit transmits an abnormality detection result by the abnormality detection unit to the central control device,
When the abnormality detection result transmitted from any one of the plurality of inverter devices is received by the second communication unit, the control unit causes the circuit breaker to connect the inverter circuit and the system power source. Control other inverter devices to shut off,
The isolated operation detection system according to any one of claims 1 to 5. The system power supply is a three-phase AC system power supply,
A three-phase AC bridge circuit is formed by the plurality of inverter devices, and the three-phase AC bridge circuit supplies each phase power to the load.
The isolated operation detection system according to any one of claims 1 to 6. A single operation detection method for a centralized control system comprising a plurality of inverter devices and a centralized control device,
When each inverter device detects the independent operation of its own device based on the change in the frequency of the alternating current power supplied from the inverter circuit to the load or the alternating current power supplied from the system power supply to the load, the independent operation detection result is obtained. Transmitting to the centralized control device;
The central control device is configured to disconnect the inverter circuit and the system power supply based on an isolated operation detection result received from one or a plurality of inverter devices among the plurality of inverter devices. Controlling step;
A single operation detection method for a centralized control system. An independent operation detection device for an inverter device connected to a system power supply together with a plurality of inverter devices,
An inverter circuit that converts DC power supplied from a DC power source into AC power and supplies the AC power to a load connected to the system power source;
A frequency detector that detects a change in frequency of AC power supplied from the inverter circuit to the load or AC power supplied from the system power supply to the load;
An isolated operation detecting unit for detecting an isolated operation of the own device based on a change in frequency detected by the frequency detecting unit;
A communication unit that transmits an isolated operation detection result to another inverter device when an isolated operation is detected by the isolated operation detection unit, and receives an isolated operation detection result transmitted by the other inverter device;
When isolated operation is detected by the isolated operation detection unit or when an isolated operation detection result is received by the communication unit, a control unit that cuts off the inverter circuit and the system power supply,
An isolated operation detection device.

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