JP2014116604A - Light emitting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light emitting device which is reduced in manufacturing time and cost, and improved in light extraction efficiency.SOLUTION: A light emitting device 100A includes: a substrate 110; a plurality of light emitting cells D1 arranged apart from each other on the substrate, each of the light emitting cells including a light emitting structure 120a including lower and upper semiconductor layers 122a and 126a and an active layer 124a, an upper electrode 134a, and a lower electrode 132a; a conductive interconnection layer 150 electrically connecting a lower electrode of a first one of the adjacent light emitting cells and an upper electrode of a second one of the light emitting cells; and a current blocking layer 140A disposed to extend from between the upper electrode and the upper semiconductor layer of the second light emitting cell to the space between the adjacent light emitting cells and the conductive interconnection layer. Each of the light emitting cells further includes a conductive layer 160a arranged to extend from between the upper electrode of the second light emitting cell and the current blocking layer to the upper part of the upper semiconductor layer of the second light emitting cell to electrically connect the upper electrode of the second light emitting cell to the upper semiconductor layer of the second light emitting cell.

Description

  Embodiments relate to a light emitting device.

  Based on the development of gallium nitride (GaN) metal organic chemical vapor deposition method and molecular beam growth method, there are red, green and blue light emitting diodes (LEDs) capable of realizing high brightness and white light. It has been developed.

  Such LEDs do not contain environmentally hazardous substances such as mercury (Hg) used in existing lighting fixtures such as incandescent lamps and fluorescent lamps, so they have excellent environmental performance, long life, low power consumption characteristics, etc. As such, it replaces the existing light source. The core competitive element of such an LED element is a high-efficiency and high-power chip, and a high luminance implementation by packaging technology.

  It is important to increase the light extraction efficiency in order to realize high brightness. In order to increase the light extraction efficiency, a flip-chip structure, surface texturing, surface sapphire substrate (PSS: Patterned Sapphire Substrate), photonic crystal technology, and Various methods using an anti-reflection layer structure have been studied.

  FIG. 1 is a cross-sectional view of a general light emitting device.

  Referring to FIG. 1, the light emitting device includes a plurality of light emitting cells D <b> 1 and D <b> 2. Each light emitting cell D <b> 1 and D <b> 2 includes a substrate 10, light emitting structures 20 and 40, first electrodes 32 and 52, and second electrodes 34. , 54, a passivation layer 60 and a metal coupling layer 70.

  The light emitting structures 20 and 40 include n-type semiconductor layers 22 and 42, active layers 24 and 44, and p-type semiconductor layers 26 and 46 disposed on the substrate 10. The metal coupling layer 70 electrically connects the first electrode 32 of one D1 and the second electrode 54 of the other D2 among the adjacent light emitting cells D1, D2. At this time, the passivation layer 60 electrically insulates the metal connection layer 70 and the light emitting structure 40 of the light emitting cell D2 from each other, electrically insulates the adjacent light emitting cells D1 and D2 from each other, and the n of the light emitting cell D1. The type semiconductor layer 22 and the metal coupling layer 70 are electrically insulated from each other.

  In the case of the general light emitting device illustrated in FIG. 1, since a separate process for forming the passivation layer 60 is further required, the manufacturing time and cost of the light emitting device are increased.

  Embodiments according to the present invention provide a light-emitting element that can be used in an external lighting device with reduced manufacturing time and cost, improved light extraction efficiency, and the like.

  A light emitting device according to an embodiment is arranged on a substrate; horizontally spaced apart from each other on the substrate, and the lower and upper semiconductor layers having different conductivity types are disposed between the lower and upper semiconductor layers, respectively. A plurality of light emitting cells including a light emitting structure having an active layer formed thereon, an upper electrode disposed on the upper semiconductor layer, and a lower electrode disposed on the lower semiconductor layer; A conductive interconnection layer electrically connecting a lower electrode of one of the first light emitting cells and an upper electrode of the other second light emitting cell among the plurality of adjacent light emitting cells; Each of the plurality of light emitting cells includes a current blocking layer disposed between the plurality of adjacent light emitting cells and the conductive interconnection layer from between the upper electrode and the upper semiconductor layer. The second light emitting cell The upper electrode of the second light emitting cell and the upper semiconductor layer of the second light emitting cell are electrically connected between the upper electrode and the current blocking layer so as to extend on the upper semiconductor layer of the second light emitting cell. A conductive layer may be further included.

  The current blocking layer is formed between the lower semiconductor layer of the first light emitting cell and the conductive interconnect layer, between the substrate and the conductive interconnect layer, and the light emitting structure of the second light emitting cell. It can be disposed between the conductive interconnection layers.

  The upper electrode of the second light emitting cell has a lower surface facing the upper semiconductor layer of the second light emitting cell, and the current is disposed between the upper electrode and the upper semiconductor layer of the second light emitting cell. The blocking layer has an upper surface facing the upper electrode, and the area of the upper surface of the current blocking layer may be greater than or equal to the entire area of the lower surface of the upper electrode.

  The upper electrode of the second light emitting cell, the lower electrode of the first light emitting cell, and the conductive interconnection layer may be integrated.

  The integrated layer has a lower surface facing the upper semiconductor layer of the second light emitting cell, and the current blocking layer is disposed between the integrated layer and the upper semiconductor layer of the second light emitting cell. Has an upper surface facing the integrated layer, and the area of the upper surface of the current blocking layer can be equal to or larger than the entire area of the lower surface of the integrated layer.

  The area of the conductive layer disposed on the upper semiconductor layer may be less than or equal to the area of the upper surface of the upper semiconductor layer.

  The conductive layer includes ITO (Indium Tin Oxide), TO (Tin Oxide), IZO (Indium Zinc Oxide), IZTO (Indium Zinc Tin Oxide), IAZO (Indium Aluminum Zinc Oxide), and IGZO (Indium Oxium Oxide). (Indium Gallium Tin Oxide), AZO (Aluminum Zinc Oxide), ATO (Aluminum Tin Oxide), GZO (Gallium Zinc Oxide), IrOx, RuOx, RuOx / ITO, Ni, Ag / Ni / Or / O / r Arranged in a single layer or multiple layers using at least one of Au / ITO Can be placed.

  The current blocking layer may include a material having electrical insulation.

  The current blocking layer may be a distributed Bragg reflective layer.

  The dispersion Bragg reflection layer may include an insulating material in which first and second layers having different refractive indexes are alternately stacked at least once.

  The upper electrode includes a first adhesive layer and a first bonding layer that overlap each other, and a reflective layer may not be interposed between the first adhesive layer and the first bonding layer.

  The upper electrode may further include a first barrier layer disposed between the first adhesive layer and the first bonding layer.

  The lower electrode includes a second adhesive layer and a second bonding layer that overlap each other, and a reflective layer may not be interposed between the second adhesive layer and the second bonding layer.

  The lower electrode may further include a second barrier layer disposed between the second adhesive layer and the second bonding layer.

  The plurality of light emitting cells may be connected in series with each other by the conductive interconnection layer.

  The conductive interconnect layer includes a third adhesive layer and a third bonding layer that overlap each other, and a reflective layer may not be interposed between the third adhesive layer and the third bonding layer.

  The conductive interconnection layer may further include a third barrier layer disposed between the third adhesive layer and the third bonding layer.

  The conductive interconnection layer, the upper electrode, the conductive layer, and the current blocking layer may be disposed to overlap in a vertical direction.

  A light emitting device according to another embodiment is disposed on a substrate; and is spaced apart from each other in a horizontal direction on the substrate, and the light emitting devices are disposed between the lower and upper semiconductor layers having different conductivity types, and the lower and upper semiconductor layers, respectively. A plurality of light emitting cells including a light emitting structure having an active layer formed thereon, an upper electrode disposed on the upper semiconductor layer, and a lower electrode disposed on the lower semiconductor layer; A conductive interconnection layer electrically connecting a lower electrode of one of the first light emitting cells and an upper electrode of the other second light emitting cell among the plurality of adjacent light emitting cells; a current blocking layer; The current blocking layer includes a first part disposed between an upper electrode and an upper semiconductor layer of the second light emitting cell; and the plurality of adjacent light emitting cells from the first part and the conductive layer. Placed between the mold interconnect layers Each of the plurality of light emitting cells further includes a conductive layer electrically connecting the upper electrode of the second light emitting cell and the upper semiconductor layer of the second light emitting cell; The conductive layer extends from the second part to an upper semiconductor layer of the second light emitting cell from a second part disposed between the upper electrode of the second light emitting cell and the current blocking layer. And a second other portion disposed in a row.

  The second part may partially cover the upper surface of the first part.

  In the light emitting device according to the embodiment, the current blocking layer is disposed so as to serve as a passivation layer, so that it is not necessary to separately perform a step of forming the passivation layer, which can reduce manufacturing time and cost. By implementing a current blocking layer with a dispersion Bragg reflective layer and increasing the reflection efficiency, the light extraction efficiency can be improved, and the upper and lower electrodes and the conductive interconnection layer can be implemented without a reflective layer. Because it is resistant to corrosion, it can also be used for external lighting.

Embodiments will be described in detail with reference to the following drawings. In the drawings, the same reference numerals are assigned to the same components.
It is sectional drawing of a common light emitting element. It is sectional drawing of the light emitting element which concerns on one Embodiment. It is sectional drawing of the light emitting element which concerns on other embodiment. FIG. 4 is a cross-sectional view of at least one embodiment of a lower electrode, an upper electrode, a conductive interconnection layer, and an integral layer illustrated in FIG. 2 or FIG. 3. It is sectional drawing of the light emitting element which concerns on other embodiment. It is a top view of the light emitting element concerning other embodiments. FIG. 7 is an enlarged view of a portion “K” illustrated in FIG. 6. It is sectional drawing cut | disconnected along the AA 'line of the light emitting element illustrated in FIG. It is sectional drawing cut | disconnected along the BB 'line | wire of the light emitting element shown in FIG. FIG. 7 is a circuit diagram of the light emitting element shown in FIG. 6. It is sectional drawing of the light emitting element which concerns on other embodiment. It is a disassembled perspective view of the illuminating device containing the light emitting element package embodied by the light emitting element which concerns on embodiment. 1 is a view showing a display device including a light emitting device package embodied by a light emitting device according to an embodiment.

  Hereinafter, the present invention will be described in detail with reference to embodiments, and in order to facilitate understanding of the present invention, it will be described in detail with reference to the accompanying drawings. However, the embodiments according to the present invention can be modified in various forms, and the scope of the present invention should not be construed as being limited to the embodiments described in detail below. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art.

  In the description of the embodiment of the present invention, when it is described as being formed “on / under” of each component, “on / under” or “on or under” ")" Includes all two components being in direct contact with each other and one or more other components being formed indirectly between the two components.

  In addition, when expressed as “upper / upper or lower / under”, it may include not only the upper direction but also the lower direction meaning based on one component.

  FIG. 2 shows a cross-sectional view of a light emitting device 100A according to an embodiment.

  The light emitting device 100A illustrated in FIG. 2 includes a substrate 110, a plurality of light emitting cells D1, D2, and D3, a current blocking layer 140A, and a conductive interconnection layer 150.

The substrate 110 can be formed of a material suitable for growth of a semiconductor material, a carrier wafer. Further, the substrate 110 can be formed of a material having excellent thermal conductivity, and may be a conductive substrate or an insulating substrate. In addition, the substrate 110 may be made of a light-transmitting material, and does not cause warpage of the entire nitride light emitting structures 120a and 120b of the light emitting cells D1 to D3, and also includes a scribing process and a braking process. ) Have sufficient mechanical strength to allow good separation into separate chips throughout the process. For example, the substrate 110 may be a material including at least one of sapphire (Al ₂ O ₃ ), GaN, SiC, ZnO, Si, GaP, InP, Ga ₂ O ₃ , GaAs, and Ge. The top surface of the substrate 110 may have a concavo-convex pattern shape. For example, although not shown, the substrate 110 may be a PSS (Patterned Sapphire Substrate).

  In addition, a buffer layer (not shown) may be disposed between the substrate 110 and the light emitting structures 120a and 120b. The buffer layer can be formed using a compound semiconductor of a III-V group element. The buffer layer serves to reduce a difference in lattice constant between the substrate 110 and the light emitting structures 120a and 120b. For example, the buffer layer may include, but is not limited to, AlN or undoped nitride. The buffer layer may be omitted depending on the type of the substrate 110 and the types of the light emitting structures 120a and 120b.

  The plurality of light emitting cells D1 to D3 are arranged on the substrate 110 so as to be spaced apart from each other in the horizontal direction. Here, for convenience of explanation, the case where the number of the light emitting cells D1 to D3 is three is shown, but this embodiment is not limited to this, and the number of the light emitting cells is two, or four or more. In some cases, the same can be applied.

  The first light emitting cell D1 is disposed in the first region A1 of the substrate 110, the second light emitting cell D2 is disposed in the second region A2 of the substrate 110, and the third light emitting cell D3 is disposed in the third region A3 of the substrate 110. The The adjacent first and second light emitting cells D1 and D2 are spaced apart from each other by a fixed distance d, and the second and third light emitting cells D2 and D3 are spaced apart from each other by a fixed distance d. For example, the separation distance d may be 2 μm to 7 μm, for example, 5 μm.

  Each of the light emitting cells D1 and D2 includes light emitting structures 120a and 120b, lower electrodes 132a and 132b, upper electrodes 134a and 134b, and conductive layers 160a and 160b disposed on the substrate 110.

  The light emitting structures 120a and 120b include lower semiconductor layers 122a and 122b, active layers 124a and 124b, and upper semiconductor layers 126a and 126b, which are sequentially disposed on the substrate 110. The lower semiconductor layers 122a and 122b and the upper semiconductor layers 126a and 126b may have different conductivity types.

The lower semiconductor layers 122a and 122b are disposed between the substrate 110 and the active layers 124a and 124b, may include a semiconductor compound, and may be implemented with a compound semiconductor such as a III-V group or a II-VI group. The first conductivity type dopant may be doped. For example, the lower semiconductor layers 122a and 122b are formed of a semiconductor material having a composition formula of Al _x In _y Ga _(1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), Any one or more of InAlGaN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP may be included. The lower semiconductor layers 122a and 122b may be first conductivity type semiconductor layers. If the lower semiconductor layers 122a and 122b are n-type semiconductor layers, the first conductivity type dopant may include an n-type dopant such as Si, Ge, Sn, Se, or Te. The lower semiconductor layers 122a and 122b may have a single layer or a multilayer structure, but are not limited thereto.

  The active layers 124a and 124b are disposed between the lower semiconductor layers 122a and 122b and the upper semiconductor layers 126a and 126b, and have a single well structure, a double hetero structure, a multiple well structure, and a single quantum well. It may include any one of a structure, a multiple quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure. The active layers 124a and 124b are made of a group III-V element compound semiconductor material, and a well layer and a barrier layer, for example, InGaN / GaN, InGaN / InGaN, GaN / AlGaN, InAlGaN / GaN, GaAs (InGaAs) / AlGaAs. , GaP (InGaP) / AlGaP may have one or more pair structures, but is not limited thereto. The well layer may be made of a material having an energy band gap smaller than that of the barrier layer.

The upper semiconductor layers 126a and 126b are disposed on the active layers 124a and 124b and may include a semiconductor compound. The upper semiconductor layer 126a, 126b is, III-V group, be embodied in a compound semiconductor such as group II-VI, _{e.g., In x Al y Ga 1-} x-y N (0 ≦ x ≦ 1,0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), or any one or more of AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP.

  Unlike the lower semiconductor layers 122a and 122b, which are first conductive semiconductor layers, the upper semiconductor layers 126a and 126b may be second conductive semiconductor layers, or may be doped with a second conductive dopant. When the upper semiconductor layers 126a and 126b are p-type semiconductor layers, the second conductivity type dopant may be a p-type dopant such as Mg, Zn, Ca, Sr, or Ba. The upper semiconductor layers 126a and 126b may have a single layer or a multilayer structure, but are not limited thereto.

  The lower semiconductor layers 122a and 122b are n-type semiconductor layers, and the upper semiconductor layers 126a and 126b are implemented as p-type semiconductor layers, or the lower semiconductor layers 122a and 122b are p-type semiconductor layers, and the upper semiconductor layers 126a and 126b 126b may be implemented by an n-type semiconductor layer. Accordingly, the light emitting structures 120a and 120b may include at least one of an np junction, a pn junction, an npn junction, and a pnp junction structure.

  The lower electrodes 132a and 132b are disposed on the lower semiconductor layers 122a and 122b, and the upper electrodes 134a and 134b are disposed on the upper semiconductor layers 126a and 126b. In order to dispose the lower electrodes 132a and 132b on the lower semiconductor layers 122a and 122b, the light emitting structures 120a and 120b may expose a part of the lower semiconductor layers 122a and 122b. That is, part of the upper semiconductor layers 126a and 126b, the active layers 124a and 124b, and the lower semiconductor layers 122a and 122b may be etched by mesa etching to expose part of the lower semiconductor layers 122a and 122b. it can. At this time, the exposed surfaces of the lower semiconductor layers 122a and 122b may be positioned lower than the lower surfaces of the active layers 124a and 124b. The upper electrodes 134a and 134b and the lower electrodes 132a and 132b will be described later in detail with reference to FIG.

  On the other hand, a part of the current blocking layer 140A is disposed between the upper electrode 134b and the upper semiconductor layer 126b of each of the plurality of light emitting cells (for example, D2). The current blocking layer 140A arranged in this manner allows the carriers from the upper electrode 134b toward the active layer 124b to diffuse better, thereby contributing to the improvement of the luminous intensity of the active layer 124b.

The upper electrode 134b of the second light emitting cell D2 has a lower surface facing the upper semiconductor layer 126b of the second light emitting cell D2, and is disposed between the upper electrode 134b and the upper semiconductor layer 126b of the second light emitting cell D2. It is assumed that the current blocking layer 140A has an upper surface facing the upper electrode 134b. At this time, in order for the current blocking layer 140A to play a role of diffusing carriers as described above, the area of the upper surface of the current blocking layer 140A disposed on the upper semiconductor layer 126b is lower than the upper electrode 134b. The area of the entire surface can be set. That is, in the cross-sectional shape illustrated in FIG. 2, the width W1 can be 0 or more. Therefore, the current blocking layer 140A can be formed of an insulating material such as silicon oxide (SiO ₂ ).

  In each of the light emitting cells (for example, D1 and D2), the conductive layers 160a and 160b are arranged to extend from between the upper electrodes 134a and 134b and the current blocking layer 140A onto the upper semiconductor layers 126a and 126b. The upper electrodes 134a and 134b are electrically connected to the upper semiconductor layers 126a and 126b.

  The conductive layers 160a and 160b not only reduce total reflection but also have good translucency, so that the extraction efficiency of light emitted from the active layers 124a and 124b and passing through the upper semiconductor layers 126a and 126b can be increased. . The conductive layers 160a and 160b are made of a transparent oxide material having a high transmittance with respect to the emission wavelength, for example, ITO (Indium Tin Oxide), TO (Tin Oxide), IZO (Indium Zinc Oxide), IZTO (Indium Zinc Tin). Oxide), IAZO (Indium Aluminium Zinc Oxide), IGZO (Indium Gallium Zinc Oxide), IGTO (Indium Gallium Tin Oxide), AZO (Aluminum Zinc Oxide), ATO (AluGin Oxide) RuOx, RuOx / ITO, Ni, Ag, Ni / IrOx / Au or Ni / IrOx / Au / ITO may be used to form a single layer or a multilayer using at least one of them.

  The areas of the conductive layers 160a and 160b disposed on the upper semiconductor layers 126a and 126b may be equal to or smaller than the area of the upper surface of the upper semiconductor layers 126a and 126b. Therefore, as illustrated in FIG. 2, the width W2 can be 0 or more.

  Meanwhile, the conductive interconnection layer 150 serves to connect two adjacent light emitting cells (for example, D1 and D2) in the plurality of light emitting cells D1 to D3. That is, the conductive interconnect layer 150 includes the lower electrode 132a of the first light emitting cell D1 that is one of the two adjacent light emitting cells D1 and D2, and the second light emitting that is the other of the adjacent light emitting cells D1 and D2. It plays the role of electrically connecting the upper electrode 134b of the cell D2. As illustrated in FIG. 2, the two light emitting cells D <b> 1 and D <b> 2 may be electrically connected to each other in series by the conductive interconnection layer 150, but are not limited thereto. That is, the light emitting cells D1 and D2 may be electrically connected to each other in parallel by the conductive interconnection layer 150.

  The conductive interconnect layer 150 may be formed of the same or different structure and the same or different materials from the lower electrodes 132a and 132b and / or the upper electrodes 134a and 134b. Further, the thickness of the conductive interconnection layer 150 may be the same as or different from the thickness of the lower electrodes 132a and 132b and / or the upper electrodes 134a and 134b. The conductive interconnection layer 150 may include at least one of Cr, Rd, Au, Ni, Ti, or Pt, but is not limited thereto.

  On the other hand, according to the present embodiment, the current blocking layer 140A includes the light emitting cells D1 and D2 and the conductive interconnection layer 150 adjacent to each other from between the upper electrode 134b and the upper semiconductor layer 126b of the light emitting cell (eg, D2). Between the two. That is, the current blocking layer 140A emits light between the lower semiconductor layer 122a of the first light emitting cell D1 and the conductive interconnection layer 150, between the substrate 110 and the conductive interconnection layer 150, and between the second light emitting cell D2. It can be disposed between the structure 120b and the conductive interconnection layer 150. Therefore, it can be seen that the current blocking layer 140A illustrated in FIG. 2 serves as the passivation layer 60 illustrated in FIG. Therefore, as described above, the current blocking layer 140A may be made of an insulating material.

  As described above, the current blocking layer 140A serves as the passivation layer 60 in the light emitting device 100A according to the present embodiment, instead of providing the additional passivation layer 60 in the light emitting device shown in FIG. That is, the current blocking layer 140A can not only play a role specific to the current blocking layer, but can also play a role of the passivation layer 60. Therefore, manufacturing cost can be reduced and process time can be shortened.

  FIG. 3 is a cross-sectional view of a light emitting device 100B according to another embodiment.

  In the light emitting device 100A illustrated in FIG. 2, the current blocking layer 140A is implemented as a single layer. On the other hand, according to another embodiment, as illustrated in FIG. 3, the current blocking layer 140B may be implemented as a distributed Bragg reflector (DBR). The dispersion Bragg reflection layer means a layer that enhances reflectivity by being generated by alternately laminating two or more insulating layers having different refractive indexes. Since the dispersion Bragg reflection layer 140B has a higher reflectance than the reflection layer having a reflectance of 90% or less, for example, a reflectance of 98%, it can function as a reflection layer more efficiently.

  In the case of FIG. 3, the first layer 142 and the second layer 144 having different refractive indexes are alternately stacked once. However, the layers may be stacked more than once.

The first layer 142 is a low refractive index layer, and is made of, for example, silicon oxide (SiO ₂ ) having a refractive index of 1.4 or aluminum oxide (Al ₂ O ₃ ) having a refractive index of 1.6. Can be. The second layer 144 is a high refractive index layer, for example, silicon nitride (Si ₃ N ₄ ) having a refractive index of 2.05 to 2.25, and titanium nitride having a refractive index of 2 or more. (TiO ₂ ), or Si—H having a refractive index of 3 or more.

  In the distributed Bragg reflection layer 140B, each of the first layer 142 and the second layer 144 may have a thickness of λ / (4n). Here, λ represents the wavelength of light emitted from the active layer 124b, and n represents the refractive index of the corresponding layer.

  Further, in the light emitting device 100A illustrated in FIG. 2, the lower electrode 132a of the first light emitting cell D1 which is one of the adjacent light emitting cells (for example, D1 and D2) and the other one of the adjacent light emitting cells. The upper electrode 134b of the two light-emitting cells D2 and the conductive interconnection layer 150 that electrically connects these (D1, D2) are formed separately. On the other hand, according to another embodiment, as illustrated in FIG. 3, the conductive interconnection layer 150, the lower electrode 132 a of the first light emitting cell D 1, and the upper electrode 134 b of the second light emitting cell D 2 are integrated with each other. It may be embodied as 170A.

  If the integrated layer 170 has a lower surface facing the upper semiconductor layer 126b above the second light emitting cell D2, a current blocking layer 140B disposed between the integrated layer 170A and the upper semiconductor layer 126b is provided. When the upper surface facing the integrated layer 170A is provided, the area of the upper surface of the current blocking layer 140B can be equal to or larger than the entire lower surface of the integrated layer 170A. As illustrated in FIG. 3, when the upper electrode 134b of the second light emitting cell D2 and the conductive interconnection layer 150 are implemented as an integrated layer 170A, the integrated layer 170A and the upper semiconductor layer 126b are separated from each other. As described above, the current blocking layer 140 </ b> B disposed in the middle serves to better diffuse carriers supplied from the integrated layer 170 </ b> A to the active layer 124 b and to block current. It is.

  Except for the difference between FIG. 2 and FIG. 3 described above, the light emitting element 100B illustrated in FIG. 3 is the same as the light emitting element 100A illustrated in FIG. 2, and thus detailed description thereof will be omitted.

  FIG. 4 is a cross-sectional view of at least one embodiment of the lower electrodes 132a and 132b, the upper electrodes 134a and 134b, the conductive interconnection layer 150, and the integrated layer 170A illustrated in FIG. 2 or FIG.

  4 corresponds to the lower electrodes 132a and 132b, the base layer 180 corresponds to the lower semiconductor layers 122a and 122b, and when the layer 190 corresponds to the upper electrodes 134a and 134b, the base layer 180 corresponds to the conductive layer 160a. 160b, and the layer 190 corresponds to the conductive interconnection layer 150 or the integral layer 170A, the base layer 180 corresponds to the current blocking layers 140A and 140B.

  Referring to FIG. 4, the layer 190 may include an adhesive layer 192 and a bonding layer 196 that overlap each other. That is, the adhesive layer 192 can be disposed on the base layer 180, and the bonding layer 196 can be disposed on the adhesive layer 192. At this time, a reflective layer (not shown) may or may not be interposed between the adhesive layer 192 and the bonding layer 196.

  The adhesive layer 192 may include a material that is in ohmic contact with the base layer 180. For example, the adhesive layer 192 may be formed of a single layer or a multilayer structure using at least one material of Cr, Rd, and Ti. Further, the thickness T1 of the adhesive layer 192 may be at least 5 nm to 15 nm. For example, the adhesive layer 192 can have a thickness T1 of 2 nm to 10 nm.

  The bonding layer 196 may be disposed in contact with the adhesive layer 192. However, as illustrated in FIG. 4, when the barrier layer 194 is interposed, the bonding layer 196 may be disposed on the barrier layer 194. The bonding layer 196 may include Au, and may have a thickness T2 of 100 nm to 180 nm, for example, a thickness of 140 nm.

  The layer 190 may further include a barrier layer 194 disposed between the adhesive layer 192 and the bonding layer 196, but the barrier layer 194 may be omitted. The barrier layer 194 can be disposed in contact with the adhesive layer 192 and the bonding layer 196, respectively.

  The barrier layer 194 is made of a material containing at least one of Ni, Cr, Ti, and Pt, and can be formed in a single layer or multiple layers. For example, the barrier layer 194 can be made of an alloy of Cr and Pt. Further, the barrier layer 194 can have a thickness T3 of 200 nm to 300 nm, for example, 250 nm.

  If the layer 190 is the upper electrodes 134a and 134b and the reflective layer is interposed between the adhesive layer 192 and the barrier layer 194, the reflective layer reflects the light emitted from the active layers 124a and 124b. Thus, the amount of light absorbed by the metal of the layer 190 can be reduced. However, when the reflective layer is interposed between the adhesive layer 192 and the barrier layer 194, the bonding layer 196 made of Au and the reflective layer made of Al are mutually diffused with the barrier layer 194 made of Ni interposed therebetween (inter-diffusion). ).

  In order to obtain sufficient reflectivity, the reflective layer can be usually formed to a thickness of 50 nm to 300 nm. Due to the presence of such a thick reflective layer, the adhesive layer 192 may be formed with a thickness less than 2 nm, for example, and the adhesive force between the layer 190 and the light emitting structures 120a and 120b may be reduced.

  However, in the case where no reflective layer is interposed between the adhesive layer 192 and the bonding layer 196, the adhesive layer 192 can be formed thicker by the thickness not including the reflective layer. Adhesive force can be improved, and the possibility of mutual diffusion between the reflective layer and the bonding layer 196 can be eliminated. At this time, the adhesive layer 192 may have a thick thickness T1 of 2 nm or more.

  In addition, when the above-described light emitting elements 100A and 100B are used for illumination, aluminum which is a reflective layer can be corroded. Therefore, in this embodiment, when no reflective layer is interposed, such a corrosion problem can be prevented in advance, so that the light emitting elements 100A and 100B can be used for external illumination.

  FIG. 5 is a cross-sectional view of a light emitting device 100C according to still another embodiment.

  In the light emitting device 100B illustrated in FIG. 3, the integrated layer 170A is a single layer, whereas the integrated layer 170B of the light emitting device 100C illustrated in FIG. 5 includes an adhesive layer 172, a barrier layer 174, and a bonding layer 176. Can do. Except for this, the light emitting element 100C illustrated in FIG. 5 is the same as the light emitting element 100B illustrated in FIG. 3, and thus detailed description thereof will be omitted. The adhesive layer 172, the barrier layer 174, and the bonding layer 176 illustrated in FIG. 5 correspond to the adhesive layer 192, the barrier layer 194, and the bonding layer 196 shown in FIG. 4, respectively, and thus detailed description thereof will be omitted. . In the case of FIG. 5, the barrier layer 174 may be omitted from the integrated layer 170B.

  6 is a plan view of a light emitting device 100D according to still another embodiment, FIG. 7 is an enlarged view of a 'K' portion shown in FIG. 6, and FIG. 8 is shown in FIG. FIG. 9 is a cross-sectional view taken along the line AA ′ of the light emitting element 100D, and FIG. 9 is a cross-sectional view taken along the line BB ′ of the light emitting element 100D shown in FIG.

  Referring to FIGS. 6 to 9, the light emitting device 100D includes M light emitting regions P1 to PM (natural numbers where M> 1). For convenience of explanation, as shown in FIG. 6 to FIG. 9, it is assumed that M = 9. However, even when M is smaller than or larger than 9, the embodiment is equally applied. Can do.

  The light emitting device 100D includes a substrate 110, light emitting structures 120-1 to 120-9 divided as a plurality of light emitting regions P1 to P9, current blocking layers 140A-1 to 140A-9, and integrated layers 170A-1 to 170A-. 8, the first electrode 152, the second electrode 154, and the conductive layers 160-1 to 160-9.

  Since the substrate 110 and the light emitting structures 120-1 to 120-9 correspond to the substrate 110 and the light emitting structures 120a and 120b of FIG. 2 or 3, respectively, detailed description thereof will be omitted. Each of the light emitting structures 120-1 to 120-9 includes a lower semiconductor layer 122- corresponding to the lower semiconductor layers 122a and 122b, the active layers 124a and 124b, and the upper semiconductor layers 126a and 126b shown in FIGS. 1 to 122-9, active layers 124-1 to 124-9, and upper semiconductor layers 126-1 to 126-9.

  Hereinafter, the embodiment will be described on the assumption that each of the lower semiconductor layers 122-1 to 122-9 is an n-type semiconductor layer and each of the upper semiconductor layers 126-1 to 126-9 is a p-type semiconductor layer. The embodiment is not limited to this. In other words, the present embodiment can also be applied to the case where each of the lower semiconductor layers 122-1 to 122-9 is a p-type semiconductor layer and each of the upper semiconductor layers 126-1 to 126-9 is an n-type semiconductor layer. is there.

  The light emitting structures 120-1 to 120-9 of one chip can be divided into a plurality of light emitting regions P1 to P9 according to the boundary region S. The boundary region S may be a region located around each of the light emitting regions P1 to P9, or may be the substrate 110. The areas of the plurality of light emitting regions P1 to P9 may be the same, but are not limited thereto.

  Since each of the current blocking layers 140A-1 to 140A-9 is the same as the current blocking layer 140A shown in FIG. 2, a detailed description thereof will be omitted. However, among the current blocking layers 140A-1 to 140A-9, the current blocking layer 140A-1 does not play the role of the passivation layer 60, and allows carriers from the first electrode 152 toward the active layer 124-1 to diffuse. Thus, it plays only the role of making it possible to contribute to the improvement of the luminous intensity of the active layer 124-1.

  Referring to FIGS. 6 and 8, the first electrode 152 is disposed on the upper semiconductor layer 126-1 of any one of the plurality of light emitting regions P1 to P9 (for example, P1). The first electrode 152 can be in electrical contact with the upper semiconductor layer 126-1 via the conductive layer 160-1. For example, the first electrode 152 may be in contact with the conductive layer 160-1 in the first light emitting region (for example, P1) among the light emitting regions P1 to P9 connected in series. The first electrode 152 may be bonded to a wire (not shown) for providing a first power source.

  Referring to FIGS. 6 and 9, the second electrode 154 is disposed on the lower semiconductor layer 122-9 in any one of the light emitting regions P <b> 1 to P <b> 9 (for example, P <b> 9). Can contact -9. The second electrode 154 may be bonded with a wire (not shown) for providing a second power source.

  The integrated layers 170A-1 to 170A-8 are disposed on the current blocking layers 140A-2 to 140A-9, respectively, and electrically connect the plurality of light emitting regions P1 to P9 in series. For example, the integrated layers 170A-1 to 170A-8 have a plurality of light emitting regions P1 with a first light emitting region P1 where the first electrode 152 is located as a start point and a ninth light emitting region P9 where the second electrode 154 is located as an end point. ~ P9 can be connected in series.

  Since each of the integrated layers 170A-1 to 170A-8 is the same as the integrated layer 170A shown in FIG. 3, a detailed description thereof will be omitted. Each integrated layer (for example, 170A-1) includes a lower semiconductor layer 122-1 in one of the adjacent light emitting regions (for example, P1 and P2) and the remaining light emitting region (for example, P2). ) Conductive layer 160-2 can be electrically connected to each other.

  Referring to FIGS. 6 to 8, a current blocking layer (eg, 140A-3) disposed between the monolithic layer (eg, 170A-2) and the upper surface of the upper semiconductor layer (eg, 126-3). Has an upper surface facing the integral layer 170A-2. The integrated layer 170A-2 has a lower surface facing the upper semiconductor layer 126-3. At this time, the area of the upper surface of the current blocking layer 140A-3 can be equal to or larger than the area of the entire lower surface of the integrated layer 170A-2. This is because the current blocking layer 140A-3 disposed between the integrated layer 170A-2 and the upper semiconductor layer 126-3 is supplied from the integrated layer 170A-2 to the active layer 124-3. This is because the current is interrupted by diffusing carriers. At this time, the upper surface of the current blocking layer 140A-3 can be made larger than the lower surface of the integrated layer 170A-2. In this case, as illustrated in FIG. 7, the current blocking layer 140A-3 is wider by d1 + d2 in the first direction than the width of the integrated layer 170A-2, and as illustrated in FIG. It can be made wider by W1 in two directions.

  The plurality of light emitting regions P1 to P9 connected in series included in the light emitting element 100D are sequentially referred to as a first light emitting region to a ninth light emitting region. That is, the light emitting region where the first electrode 152 is located is called a first light emitting region P1, and the light emitting region where the second electrode 154 is located is called a ninth light emitting region. Here, the “adjacent light emitting region” can be the kth light emitting region and the k + 1 light emitting region, and the kth integrated layer electrically connects the kth light emitting region and the k + 1 light emitting region in series. 1 ≦ k ≦ (M−1).

  That is, the k-th integrated layer can electrically connect the lower semiconductor layer 122-k in the k-th light emitting region and the conductive layer 160- (k + 1) in the k + 1 light-emitting region. For example, referring to FIG. 8, the second integrated layer 170A-2 may be located on the second light emitting region P2, the third light emitting region P3, and the boundary region S therebetween. The second integrated layer 170A-2 electrically connects the upper semiconductor layer 126-3 via the lower semiconductor layer 122-2 in the second light emitting region P2 and the conductive layer 160-3 in the third light emitting region P3. Connect to.

  At this time, the (k + 1) th current blocking layer 140A- (k + 1) is between the kth integrated layer 170A-k and the kth lower semiconductor layer 122-k, and between the kth integrated layer 170A-k and the substrate 110. , Between the kth integrated layer 170A-k and the (k + 1) th lower semiconductor layer 122- (k + 1), between the kth integrated layer 170A-k and the (k + 1) th active layer 124- (k + 1), and the kth integrated type. The layers 170-k and the (k + 1) -th upper semiconductor layer 126- (k + 1) may be electrically insulated from each other.

  Unlike those illustrated in FIG. 8 or FIG. 9, the current blocking layers 140 </ b> A- 1 to 140-9 can be implemented as a distributed Bragg reflection layer 140 </ b> B as illustrated in FIG. 3. In this case, the light emission efficiency can be improved by blocking the loss of light that is absorbed by the first electrode 152 and the integrated layers 170A-1 to 170A-8.

  FIG. 10 is a circuit diagram of the light emitting device 100D shown in FIG.

  Referring to FIGS. 6 and 10, the light emitting device 100 </ b> D may have a common (+) terminal 152 and a common (−) terminal 154.

  FIG. 11 shows a cross-sectional view of a light emitting device 100E according to yet another embodiment.

  Referring to FIG. 11, the light emitting device 100 </ b> E includes a submount 204, a first metal layer 232, a second metal layer 234, a first bump unit 210, a second bump unit 220, and a light emitting device 240.

  The light emitting device 100E of FIG. 11 is an example embodied in a flip chip form, but the embodiment is not limited thereto, and the light emitting devices 100A to 100C according to other embodiments are illustrated in FIG. The flip chip may be embodied as described above.

  The submount 204 mounts the light emitting element 240. The submount 204 may be implemented as a package body or a printed circuit board, and may have various forms in which the light emitting device 240 can be flip chip bonded. .

  The light emitting element 240 is disposed on the submount 204 and is electrically connected to the submount 204 by the first bump part 210 and the second bump part 220. A light emitting device 240 shown in FIG. 11 has the same cross section as the first and ninth light emitting regions P1 and P9 of the light emitting device 100D shown in FIG. Therefore, detailed description of the same parts is omitted.

  The submount 204 includes a resin such as polyphthalamide (PPA), liquid crystal polymer (LCP), polyamide 9T (Polyamide 9T, PA9T), a metal, a photosensitive glass, It may include sapphire, ceramic, printed circuit board, and the like. However, the submount 204 according to the embodiment is not limited to these materials.

  The first metal layer 232 and the second metal layer 234 are spaced apart from each other in the horizontal direction on the upper surface of the submount 204. Here, the upper surface of the submount 204 may be a surface facing the light emitting element 240. The first metal layer 232 and the second metal layer 234 may be a conductive metal such as aluminum (Al) or rhodium (Rh).

  The first bump part 210 and the second bump part 220 are disposed between the submount 204 and the light emitting element 240. The first bump part 210 can electrically connect the second electrode 154 and the first metal layer 232. The second bump part 220 can electrically connect the first electrode 152 and the second metal layer 234.

  The first bump part 210 includes a first diffusion preventing adhesive layer 212, a first bumper 214, and a second diffusion preventing adhesive layer 216. The first bumper 214 is located between the second electrode 154 and the first metal layer 232. The first diffusion preventing adhesive layer 212 is located between the second electrode 154 and the first bumper 214, and joins the first bumper 214 and the second electrode 154 to each other. That is, the first diffusion preventing adhesive layer 212 improves the adhesive force between the first bumper 214 and the second electrode 154, and ions included in the first bumper 214 pass through the second electrode 154 to the light emitting structure 120-9. It serves to prevent penetration or diffusion.

  The second diffusion preventing adhesion layer 216 is disposed between the first bumper 214 and the first metal layer 232 and joins the first bumper 214 and the first metal layer 232. The second anti-diffusion adhesive layer 216 improves the adhesive force between the first bumper 214 and the first metal layer 232, and ions contained in the first bumper 214 penetrate or diffuse into the submount 204 through the first metal layer 232. It plays a role to prevent you from doing.

  The second bump part 220 includes a third diffusion prevention adhesive layer 222, a second bumper 224, and a fourth diffusion prevention adhesion layer 226. The second bumper 224 is located between the first electrode 152 and the second metal layer 234.

  The third anti-diffusion adhesive layer 222 is located between the first electrode 152 and the second bumper 224 and joins them together. That is, the third diffusion preventing adhesive layer 222 plays a role of improving adhesion and preventing ions included in the second bumper 224 from penetrating or diffusing into the light emitting structure 120-1 through the first electrode 152. .

  The fourth anti-diffusion adhesive layer 226 is disposed between the second bumper 224 and the second metal layer 234, and bonds the second bumper 224 and the second metal layer 234 together. The fourth diffusion preventing adhesive layer 226 improves the adhesive force between the second bumper 224 and the second metal layer 234, and ions contained in the second bumper 224 penetrate or diffuse into the submount 204 through the second metal layer 234. It plays a role to prevent you from doing.

  The first to fourth diffusion preventing adhesion layers 212, 216, 222, and 226 may be at least one of Pt, Ti, W / Ti, and Au, or an alloy thereof. The first bump 214 and the second bump 224 are made of titanium (Ti), copper (Cu), nickel (Ni), gold (Au), chromium (Cr), tantalum (Ta), platinum (Pt), and tin. At least one of (Sn) may be included.

  A plurality of light emitting devices according to the above-described embodiments can be arranged as a light emitting device package on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, or the like, which is an optical member, is disposed on the light path of the light emitting device package. Can do. Such a light emitting device package, a substrate, and an optical member can function as a backlight unit.

  Still other embodiments can be embodied as a display device, a pointing device, or a lighting system including the light emitting device or the light emitting device package described in the above embodiments. For example, the lighting system includes a lamp and a streetlight. Can do.

  FIG. 12 is an exploded perspective view of a lighting apparatus including a light emitting device package embodied by the light emitting device according to the above-described embodiment. Referring to FIG. 12, the lighting device includes a light source 750 that projects light, a housing 700 in which the light source 750 is incorporated, a heat radiating unit 740 that emits heat from the light source 750, and a light source 750 and a heat radiating unit 740. A holder 760 to be coupled.

  The housing 700 includes a socket coupling portion 710 coupled to an electrical socket (not shown), and a body portion 730 coupled to the socket coupling portion 710 and incorporating a light source 750. One air flow port 720 may be formed through the body portion 730.

  A plurality of air flow ports 720 may be provided on the body portion 730 of the housing 700, and one or a plurality of air flow ports 720 may be provided. The air flow ports 720 can be arranged radially in the body portion 730 or in various forms.

  The light source 750 includes a plurality of light emitting device packages 752 provided on the substrate 754. The substrate 754 may have a shape that can be inserted into the opening of the housing 700, and may be made of a material having high thermal conductivity in order to transfer heat to the heat radiating unit 740, as will be described later. The plurality of light emitting device packages may include the light emitting device described above.

  A lower portion of the light source 750 is provided with a holder 760. The holder 760 may include a frame and other air flow ports. Although not illustrated, an optical member is provided below the light source 750 so that light projected from the light emitting element package 752 of the light source 750 can be diffused, scattered, or converged.

  FIG. 13 illustrates a display device including a light emitting device package embodied by the light emitting device according to the above-described embodiment.

  Referring to FIG. 13, a display device 800 is disposed in front of a bottom cover 810, a reflector 820 disposed on the bottom cover 810, light emitting modules 830 and 835 that emit light, and the reflector 820. A light guide plate 840 for guiding the light emitted from the light emitting modules 830 and 835 to the front of the display device, an optical sheet including the prism sheets 850 and 860 disposed in front of the light guide plate 840, and a front of the optical sheet. A display panel 870, an image signal output circuit 872 connected to the display panel 870 and supplying an image signal to the display panel 870, and a color filter 880 disposed in front of the display panel 870. Here, the bottom cover 810, the reflection plate 820, the light emitting modules 830 and 835, the light guide plate 840, and the optical sheet can form a backlight unit.

  The light emitting module includes a light emitting device package 835 on a substrate 830. Here, a PCB or the like can be used as the substrate 830. The light emitting device package 835 may include the light emitting device according to the above-described embodiment.

  The bottom cover 810 can house the components in the display device 800. The reflector 820 may be provided as a separate component as shown in the figure, or may be provided in the form of coating the rear surface of the light guide plate 840 or the front surface of the bottom cover 810 with a highly reflective material. .

  Here, the reflector 820 can be made of a material that has a high reflectivity and can be formed to be ultra-thin, and can use polyethylene terephthalate (PET).

  The light guide plate 840 can be formed of polymethylmethacrylate (PMMA), polycarbonate (PolyCarbonate; PC), polyethylene (PolyEthylene; PE), or the like.

  The first prism sheet 850 can be formed of a transparent and elastic polymer material on one surface of the support film. The polymer is a prism in which a plurality of three-dimensional structures are repeatedly formed. Can have layers. Here, as shown in the figure, the plurality of patterns may be provided with crests and valleys repeatedly in stripes.

  In the second prism sheet 860, the direction of peaks and valleys on one side of the support film can be perpendicular to the direction of peaks and valleys on the side of the support film in the first prism sheet 850. This is because the light transmitted from the light emitting module and the reflection sheet is uniformly distributed over the entire surface of the display panel 870.

  Although not shown, a diffusion sheet may be disposed between the light guide plate 840 and the first prism sheet 850. The diffusion sheet may be made of polyester and polycarbonate series materials, and the light incident angle from the backlight unit can be maximized through refraction and scattering. The diffusion sheet is formed on the support layer including the light diffusing agent, the light emitting surface (first prism sheet direction) and the light incident surface (reflecting sheet direction), and the first layer and the first layer not including the light diffusing agent. Two layers can be included.

  In the embodiment, the diffusion sheet, the first prism sheet 850, and the second prism sheet 860 constitute an optical sheet. However, the optical sheet may be composed of other combinations, for example, a microlens array. A combination with a lens array or a combination of one prism sheet and a microlens array may be used.

  As the display panel 870, a liquid crystal display panel (Liquid crystal display) may be arranged, but in addition to the liquid crystal display panel, other types of display devices that require a light source may be provided.

  Although the embodiment has been mainly described above, this is merely an example and is not intended to limit the present invention. Any person having ordinary knowledge in the field to which the present invention belongs can be used. It will be understood that various modifications and applications not exemplified above are possible without departing from the characteristics. For example, each component specifically shown in the embodiment can be modified. Such differences in modification and application should be construed as being included in the scope of the present invention as defined in the appended claims.

Claims (10)

A substrate,
A light emitting structure that is horizontally spaced apart from each other on the substrate, each having a lower and upper semiconductor layer of different conductivity types, and an active layer disposed between the lower and upper semiconductor layers; A plurality of light emitting cells including an upper electrode disposed on the upper semiconductor layer and a lower electrode disposed on the lower semiconductor layer;
A conductive interconnection layer that electrically connects a lower electrode of one first light emitting cell among the plurality of adjacent light emitting cells and an upper electrode of the other second light emitting cell among the plurality of adjacent light emitting cells; ,
A current blocking layer disposed between the plurality of adjacent light emitting cells and the conductive interconnection layer from between the upper electrode and the upper semiconductor layer of the second light emitting cell;
Each of the plurality of light emitting cells is
An upper electrode of the second light emitting cell and an upper portion of the second light emitting cell are disposed extending between the upper electrode of the second light emitting cell and the current blocking layer on the upper semiconductor layer of the second light emitting cell. A light emitting device further comprising a conductive layer electrically connecting the semiconductor layer. The current blocking layer is
Between the lower semiconductor layer of the first light emitting cell and the conductive interconnect layer, between the substrate and the conductive interconnect layer, and the light emitting structure of the second light emitting cell and the conductive interconnect layer. The light emitting device according to claim 1, which is disposed between the two. The upper electrode of the second light emitting cell has a lower surface facing the upper semiconductor layer of the second light emitting cell,
The current blocking layer disposed between the upper electrode of the second light emitting cell and the upper semiconductor layer has an upper surface facing the upper electrode;
3. The light emitting device according to claim 1, wherein an area of an upper surface of the current blocking layer is equal to or greater than an area of an entire lower surface of the upper electrode.   4. The light emitting device according to claim 1, wherein the upper electrode of the second light emitting cell, the lower electrode of the first light emitting cell, and the conductive interconnection layer are integrated layers. The integrated layer has a lower surface facing the upper semiconductor layer of the second light emitting cell;
The current blocking layer disposed between the integrated layer and the upper semiconductor layer of the second light emitting cell has an upper surface facing the integrated layer;
The light emitting device according to claim 4, wherein an area of the upper surface of the current blocking layer is equal to or larger than an area of the entire lower surface of the integrated layer.   The light emitting device according to claim 1, wherein an area of the conductive layer disposed on the upper semiconductor layer is equal to or less than an area of an upper surface of the upper semiconductor layer.   The light emitting device according to claim 1, wherein the current blocking layer is a dispersion Bragg reflection layer.   The light emitting device according to claim 7, wherein the dispersed Bragg reflective layer includes an insulating material in which first and second layers having different refractive indexes are alternately stacked at least once. The upper electrode is
9. The light emitting device according to claim 1, comprising a first adhesive layer and a first bonding layer that overlap each other, wherein no reflective layer is interposed between the first adhesive layer and the first bonding layer. . The lower electrode is
10. The light emitting device according to claim 1, comprising a second adhesive layer and a second bonding layer overlapping each other, wherein no reflective layer is interposed between the second adhesive layer and the second bonding layer. .

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