JP2014049604A - Mounting board and circuit device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve such a problem that the process is complicated to cause increase in cost when trying to obtain a thick conductive pattern for a large current and a thin conductive pattern for a small current on a substrate, and such a problem that a fine pattern cannot be drawn on the substrate when trying to use a thick conductive pattern for a large current also as a thin conductive pattern for a small current, because the film thickness is thick.SOLUTION: A mounting board has a core layer 52 composed of insulation resin, a first conductive pattern 53 provided on the surface side of the core layer 52, and a second conductive pattern 54 provided on the back side of the core layer 52. Interval d of the second conductive patterns 54 is set on the basis of the voltage being applied, and the second conductive pattern 54 is expanded to have a uniform interval on the basis of the set value. Consequently, the area of a conductive pattern on the back side is enlarged and heat dissipation effect is magnified.

Description

  The present invention relates to a mounting board and a circuit device using the mounting board.

  Due to environmental problems, reduction of electric power is required and various measures are taken. Among them, when a power source, particularly a motor, used in an air conditioner, a washing machine, a vacuum cleaner, or the like is employed, the power can be reduced by increasing its efficiency.

  Specifically, the power is reduced by reducing the circuit and improving the heat dissipation of the semiconductor elements used in the power supply circuit and driving with high efficiency. The latter is because when the semiconductor element self-heats and the temperature of itself increases, the drive current decreases.

  In recent years, light-emitting elements such as LEDs are the same, and the drive current can be further increased by cooling.

  Recently, electronic devices have been around, and various information can be obtained by taking them out of a pocket or back. This is due to the fact that mobile devices have become smaller and lighter. Business card-sized mobile phones and smartphones with about two business cards have appeared, enabling information processing anywhere in the world.

  There are various factors that have realized this reduction in size and weight, and the first factor is the enhancement of the functionality of the IC. Various functions are built into the IC chip, and it is small. And since this miniaturized IC chip is highly functional, the number of terminals is increased and the terminal size is also reduced.

Subsequently, the second factor for reducing the size and weight is the interposer for mounting the IC chip. This interposer is inserted between the set substrate 1 and the IC chip.
This is to alleviate the difference in coefficient of thermal expansion α between the chip and the set substrate.

  This interposer (hereinafter referred to as “mounting substrate”) is based on an insulating resin, and for adjusting α, granular fillers such as oxidized Si and oxidized aluminum, and fibrous fillers such as glass or carbon are kneaded. Yes.

  FIG. 5 shows the mounting substrate 10. As an example, a two-layer substrate is shown, and 11 is a core layer made of an insulating resin. A conductive pattern is provided on the front and back surfaces of the core layer 11. A first conductive pattern 12 is provided on the front side of the core layer 11, and a second conductive pattern 13 is provided on the back side. The first conductive pattern 12 is made up of chip mounting islands, bonding pads, wirings, or the like, and the second conductive pattern 13 is provided with solder ball electrode pads for connection to the set substrate 1. It has been.

JP 01-266786 A

In recent years, as the mounting substrate 10 has a higher function, a thin conductive pattern 12A for a small current and a thick conductive pattern 12B for a large current are required on the mounting substrate. Patent Document 1 is applied to a metal substrate, and a thick conductive pattern and a thin conductive pattern are realized by two etchings.

  For example, the inverter module has a transistor 14 through which a large current flows and a control IC 15 that controls the transistor 14 as shown in FIG. The transistor 14 requires a thick conductive pattern 12B because a large current flows, and the control IC 15 requires a thin conductive pattern 12A because it does not require much current.

  However, providing conductive patterns having different thicknesses on the mounting substrate 10 causes an increase in the number of manufacturing steps as described above. That is, it is necessary to prepare a thick Cu foil in advance and perform etching twice to prepare a thick film and a thin film.

  As another method, the conductive pattern 12A for small current may be substituted with the same film thickness as the thick conductive pattern 12 without intentionally reducing the thickness. However, in this case, there are the following problems.

  In general, the Cu pattern is realized by wet etching from the viewpoint of cost. Therefore, in the case of a thick Cu pattern that is isotropically etched, there is a problem in that the fine pattern cannot be formed because the etching in the lateral direction also advances accordingly. That is, if etching is performed with a thin conductive pattern, the fine pattern can be arranged at a higher density, but if this thick conductive pattern is used instead, this amount is sacrificed.

  FIG. 6 shows a mounting board 20 composed of four conductive patterns. If the outermost conductive pattern 21A on the front side is 70 μm, for example, the L / S is about 140 to 150 μm because the film thickness is large as described above. However, recently, from the viewpoint of noise and processing speed, the flip-chip mounting is preferred for the control IC, and if the flip-chip mounting is used, a metal wire is not required, and the wiring length through which a signal flows can be shortened.

  However, in this flip chip mounting, the number of terminals is increased and the terminal density is considerably high. Therefore, in recent years, L / S is required to be about 100 μm. Therefore, when a Cu foil having a film thickness of 70 μm is used, L / S of 100 μm cannot be realized due to the thick film thickness, and flip chip mounting may be difficult.

  Therefore, if it is intended to realize the conductive pattern 21A with a copper foil (for example, 50 μm) thinner than 70 μm, a large current flowing from the power transistor 14 cannot be flowed. Therefore, as shown in FIG. 6A, an attempt was made to flow a large current via Via 22. In this case, however, the Via 22 is buried by opening the mounting substrate 20 with a drill and plating the Via 22. However, since a processing step such as a drill is added, the electrode 22A immediately above the Via has irregularities and bonding is difficult.

  Therefore, as shown in FIG. 6B, wire bonding is performed on the conductive pattern 22B formed on the flat surface of the mounting substrate 20 while avoiding the position directly above the Via 22.

  However, the conductive pattern 22 </ b> B here is a 50 μm copper foil and has a resistance, and if the current of the transistor 14 is passed, the conductive pattern melts or the mounting substrate 20 itself has a temperature rise.

  In the case of the mounting substrates 10 and 20, the insulating resin itself has a high thermal resistance, and the conductive pattern of each layer used has a problem that the substrate rises because of insufficient heat dissipation measures.

The present invention includes a core layer made of an insulating resin,
A plurality of first conductive patterns provided on the front side of the core layer;
A plurality of second conductive patterns provided on the back side of the core layer;
A multilayer mounting board having a through hole for electrically connecting the first conductive pattern and the second conductive pattern;
The plurality of second conductive patterns can be solved by expanding the plurality of second conductive patterns so as to have a constant interval between each other.

  Since the conductive pattern is formed on the back side of the mounting substrate, the heat radiation effect is increased.

  Further, if the back side is made thicker than the front side, it also has a function as a heat sink having a thickness, and heat dissipation is further improved.

  In addition, in a power circuit having a small signal system and a large signal system, since the large signal system is caused to flow on the back side, there is no need to prepare a thick film and a thin film on the front side. Therefore, the structure and the manufacturing method are simplified, and the structure is advantageous in terms of cost.

It is a figure explaining the mounting board | substrate or circuit device of this invention. It is a figure explaining the mounting board | substrate or circuit device of this invention. It is a figure explaining the mounting board | substrate or circuit device of this invention. It is a figure which shows an example of the circuit employ | adopted as the mounting board | substrate or circuit device of this invention. It is a figure explaining the conventional mounting board | substrate or a circuit device. It is a figure explaining the conventional mounting board | substrate or a circuit device.

  Examples of the present invention will be described below.

  First, the present invention will be described with respect to names of a mounting board and a circuit device. Here, the circuit device 50A employs the mounting substrate 50 of the present invention. If semiconductor elements and passive elements are employed, a hybrid integrated circuit device is generally used. However, when only a semiconductor element is mounted on the mounting substrate, it is generally a semiconductor device. When an LED is mounted, it is a light emitting device or a lighting device, and further, a power transistor and its control IC are mounted, and if it is an inverter module, it is a power module. Here, these are collectively referred to as a circuit device. Further, a board module 51 is obtained by mounting this circuit device on a set board 1 such as a metal board, a printed board or a ceramic board.

  Now, the mounting board 50 including the two-layer board shown in FIG. 1, the circuit device 50A using the mounting board 50, and the board module 51 will be described.

FIG. 1A is a circuit device 50 </ b> A in which a circuit element is mounted on the front side of the mounting substrate 50. FIG. 1B shows a conductive pattern on the back side as seen from the front side of the mounting substrate 50. Further, FIG. 1C shows a board module 51 mounted on the board 1 for setting.

First, the core layer 52 of the mounting substrate 50 is made of an insulating resin, and is made of a thermosetting thermoplastic resin. As an example, it is made of polyimide, epoxy resin, aramid resin, bis-mylide resin, phenol resin, etc., but it is not particularly concerned with the material. Further, as described in the conventional example, a filler may be mixed in the resin. The filler is granular, crushed, or fibrous, and is made of oxidized Si, oxidized Al, glass, or the like. Here, a glass epoxy resin in which glass fibers are woven is employed, and the thickness is about 100 μm. Carbon fiber may be woven. It is a so-called interposer that is mixed in order to reduce the difference in thermal expansion coefficient α between the set substrate 1 and the semiconductor element to be mounted.

  Next, the conductive pattern will be described. The first conductive pattern 53 on the front side and the second conductive pattern 54 on the back side have a film thickness of, for example, about 30 μm to 50 μm, and the material thereof is Cu, a metal containing Cu as a main material, or Cu as a main material. Made of alloy or the like. As a method, a mounting substrate may be generated by plating, or a Cu foil made of these materials may be prepared in advance and bonded to the core layer 52. Here, the bonding type Cu foil may be one grown by plating or rolled Cu obtained by rolling a plating film.

  The first conductive pattern 53 in the front surface of the mounting substrate 50 is a pattern as shown in FIG. Specifically, first and second islands 56A and 56B for mounting a semiconductor element, here, a power transistor 55A and a control IC 55B for controlling the power transistor 55A are provided. In addition, pads that are electrically connected to the semiconductor element, bonding pads 57A to 57C if bonding wires are used, and bonding pads for solder ball connection if flip chip mounting are provided. Are connected to the input / output terminal 59 via wirings 58A and 58B. Note that the input / output terminal 59 may be connected to a lead by soldering.

  Next, the second conductive pattern 54 on the back surface of the mounting substrate 50 will be described. The conductive pattern 54 has a function of an external electrode or wiring that is electrically connected to the conductive pattern of the substrate 1 for setting. As will be described later with reference to FIG. 3, the first backside electrodes 54A and 54B, which are electrically connected to the back sides of the islands 56A and 56B via the through holes, and the back sides of the input / output terminals 59 are provided via the through holes. The back electrode 54C, the first back electrode (54A or 54B), or the second back electrode 54C itself, which is disposed in an electrically connected state, functions as a wiring and further serves as an extended portion for heat dissipation.

  The feature of the present invention resides in the second conductive pattern 54. In FIG. 1B, five electrodes are illustrated, but these conductive patterns functioned as electrodes or wirings, and at the same time expanded to enhance the heat dissipation function of the conductive pattern on the back surface of the mounting substrate 50. It is in. If the electrode is expanded, the area is expanded, and a heat transfer path and a heat storage amount can be secured. Further, depending on the case, it is possible to store heat transiently by forming the thickness further thicker than the conductive pattern in the table.

FIG. 4 shows a circuit formed on the mounting substrate 50 as an example. If the power supply voltage is 400 V, the interval between the conductive patterns 54 is set to about 0.4 mm. If it is 600V, it was set to about 0.6 mm, and the intervals between the conductive patterns were substantially equal.
As a result, a certain level of breakdown voltage can be secured, and the electrodes and wiring are expanded after that.

  In general, the inverter circuit has a mainstream of 200V to 600V, and is considered to have a 1000V breakdown voltage with a width of 1 mm, and the interval between the conductive patterns is selected from about 0.2 mm to 0.6 (or 0.7) mm. For the convenience of pattern arrangement, the conductive patterns are not exactly the same at the selected intervals, but most of the intervals are desired to be the same.

  As a result, for example, since the power supply is 400 V, 0.4 mm is selected, and the back surface of the mounting substrate is arranged by etching the slits between the second conductive patterns 54 at intervals of 0.4 mm. Therefore, the second conductive pattern is expanded, and heat conduction is improved accordingly.

  In other words, the remaining rate of the second conductive pattern on the back of the mounting substrate 50 is larger than the remaining rate of the first conductive pattern in the table. Since the mounting substrate itself has a larger Cu pattern area on the back side, the mounting substrate 50 warps convexly toward the back side. However, the mounting substrate 50 is used for setting a metal substrate or a thick and large printed circuit board. Since it is bonded to the substrate 1, the mounting substrate 50 is flat.

  Further, if the mounting substrate 50 is a ceramic substrate such as an alumina sintered body, the warpage is reduced because the rigidity of the ceramic substrate is large.

  In FIG. 1A and FIG. 1B, the dotted line on the outside shows the substrate 1 for setting.

  Next, bonding with the set substrate 1 will be described with reference to FIG. As in the previous example, FIG. 2B is a view seen through from the front side.

  Circles indicated by dotted lines in FIG. 2A are through holes 70 and 71 provided in the mounting substrate 50, and rectangles indicated by dotted lines in FIG. 2B are solder application portions. A solder resist 72 is provided on the back surface of the mounting substrate 50, the rectangular portion is removed by etching, and the second conductive pattern 54 is exposed. These rectangles and circles are used for distinction and may be either rectangles or circles.

  FIG. 2C shows a drawing in which the mounting substrate is attached to the set substrate 1. The rectangular third conductive pattern 73 indicated by the dotted line provided on the set substrate 1 is the same as the second conductive pattern 54, but is not particularly limited. Corresponding to the five electrodes 54 provided in FIG. 2B, a third conductive pattern 73 to be electrically connected is provided, and each of the third conductive patterns 73 is an input shown in FIG. 2A. Connected to the output terminal 59. And this terminal is provided with a lead separately and becomes a circuit module with a lead.

  Each of the third conductive patterns 73 may be extended to the upper side of the substrate by the wiring 74 and may be electrically connected to the input / output terminal 75. In addition, when the board | substrate 1 for a setting is a metal substrate, it affixes on the insulating layer provided in the whole surface.

  In this case, as the substrate module, at least one of the input / output terminals on the mounting substrate 50 side and the input / output terminals 75 on the setting substrate 1 side may be provided. For example, when the input / output terminal 59 on the mounting board 50 side is selected, the set board 1 does not have the terminal 75. It flows into the conductive pattern 54C from the back surface of the chip 55 through the through hole 70, and returns to the input / output terminal 59A through 71A. In this case, the wiring on the back side is expanded. The input / output terminal 59B flows into the conductive pattern 54A on the back side through the through hole through hole 70B, and is electrically connected to the front electrode through the through conductive pattern and through hole 71B. It is connected with the electrode for. In this case, the electrode or wiring is expanded.

  Next, a case where the inverter circuit of FIG. 4 is mounted will be described with reference to FIG.

First, FIG.
The operation of the inverter circuit device and its control circuit will be briefly described with reference to FIG. A control circuit 80 constituted by a microcomputer or DSP receives a reference signal having a frequency corresponding to the rotation speed setting signal, and three pulse width modulated sine waves each having a phase difference of 120 degrees and the pulse width modulation. Three pulses that are 180 degrees out of phase with respect to the generated sine wave are generated. Three pulse width modulated sine waves each having a phase difference of 120 degrees are input to the control electrodes of the switching elements Q1, Q2 and Q3 of the upper arm constituting the inverter circuit via the driver circuit 80. The switching elements ON / OFF control.

  Further, the pulse width modulated sine wave whose phase is delayed by 180 degrees with respect to the pulse width modulated sine wave similarly controls the switching elements Q4, Q5, and Q6 of the lower arm on and off. The diodes D1, D2, D3, D4, D5, and D6 connected to the switching elements Q1, Q2, Q3, Q4, Q5, and Q6 are regenerative diodes.

  Therefore, three pulse width modulated sine waves each having a phase difference of 120 degrees and three pulse width modulated sine waves each delayed by 180 degrees relative to the pulse width modulated sine wave The output terminals of the inverter circuit to be controlled off, that is, the switching elements Q1 and Q4, the switching elements Q2 and Q5, and the connection points U, V, and W of the switching elements Q3 and Q6 have three-phase pulse width modulated sinusoidal voltages. The resulting load current flowing through the motor M approximates a sine wave.

  3 is mounted on the mounting substrate 50, and is illustrated using the element symbols Q1 to Q6, D1 to D6, and IC 80 attached in FIG. 3A is a front view of the mounting substrate 50, and FIG. 3B is a perspective view of the back side of the mounting substrate 50 as viewed from the front side. As described above, the second conductive patterns 90 on the back surface of the mounting substrate 50 are formed so as to be expanded.

  First, FIG. 3A shows not all patterns but main ones. In the drawing, in particular, islands 81 to 85, electrodes, wires extending integrally with the electrodes or the islands, and input / output terminals 86 to which leads are attached are shown.

  On the other hand, in FIG. 3B, in FIG. 4, a through hole indicated by a black circle is provided in a region through which a large current passes, and a second conductive pattern 90 provided on the back side is provided through the through hole. It has been. As in the previous embodiment, the second conductive pattern on the back side of the mounting substrate 50 is a pattern that is expanded while the substantial distance d is provided, with the distance d selected in consideration of the withstand voltage.

  If only heat dissipation is taken into consideration, the front and back sides may have substantially the same film thickness. However, in this embodiment, the wiring pattern in the table is thin, and a small voltage low voltage and small current are mainly passed. This is because it is a thin film and can be configured with a high density and fine pattern. On the other hand, since the configuration is such that a large current flows to the back side, a through-hole is provided directly under the chip and directly under the wire bond, and the back side conductive pattern is made thicker than the front conductive pattern, so that a large current is flowed to the back side. It was set as the flow structure. Specifically, the front side is 30 to 50 μm, and the back side is about 70 to 100 μm.

  By doing so, it is not necessary to provide a thick pattern and a thin conductive pattern on the front side. As a result, the conductive patterns in the table need only be etched once. As a result, it leads to cost reduction. Specifically, a large current generation location, the back side of the transistors Q1 to Q6, and a thick line contact portion through which a large current flows is provided with a plurality of through-holes directly below, and the resistance value is reduced, so that the thin conductive pattern It flows to the back side.

The island 81A is connected to the current inflow electrode portions (chip back surface) of Q1 to Q3, and is connected to the electrode 92A on the back surface side through a through hole. The electrode 92A is formed integrally with the electrode 93B via the wiring 93A, and the electrode 93B is connected to the front-side input / output terminal 86 via a through hole. The wiring 94 in the table may be removed. In FIG. 4, the collector grounding portion has a thick conductive pattern on the back side, and the through hole is directly underneath. Go.

  The islands 82A, 83A, and 84A are connected to the current inflow electrode portions (chip back surface) of Q4, Q5, and Q6, and are connected to the electrodes 92B, 92C, and 92D on the back side via through holes directly below, respectively. It extends to the electrodes 93C to 93D on the lower side while surrounding 92A counterclockwise. This electrode is connected to the input / output terminal 86 through a through hole.

  In this way, the wiring and electrodes on the back surface side are expanded at the selected interval d and are provided on almost the entire surface of the mounting substrate. It can be seen that the area of the conductive pattern in the table is considerably widened. Moreover, since there is also a thickness of the conductive pattern on the back side, it can have a function as a heat sink. In addition, a large current can flow through the conductive pattern on the back side from the position of the through hole.

  Therefore, if the substrate for setting is a metal substrate and a conductive pattern is provided on it, the large current of the mounting substrate can be extended to any place by rewiring on the back side of the mounting substrate. It is possible to connect to the conductive pattern on the metal substrate side. Furthermore, heat can be radiated well from the conductive pattern on the back surface to the metal substrate.

  As is clear from FIG. 3B, the periphery of the substrate has a margin area slightly wider than d, and is arranged in this margin.

Claims (3)

A core layer made of insulating resin,
A plurality of first conductive patterns provided on the front side of the core layer;
A plurality of second conductive patterns provided on the back side of the core layer;
A multilayer mounting board having a through hole for electrically connecting the first conductive pattern and the second conductive pattern;
The mounting substrate, wherein the plurality of second conductive patterns are extended so as to have a constant interval between each other.   The mounting substrate according to claim 1, wherein the second conductive pattern thickness is formed to be thicker than the first conductive pattern. A circuit device using the mounting substrate,
The circuit device constitutes an inverter circuit having a power supply voltage of about 200V to 600V,
The space is uniformly disposed at a space selected within a range of 0.2 mm to 0.7 mm, and the second conductive pattern is expanded and disposed within a surrounding margin. The circuit device according to claim 2.

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