JP2014011187A - Nitride semiconductor light-emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a nitride semiconductor light-emitting element which improves electrostatic voltage withstanding characteristics and suppresses increase in Vf.SOLUTION: In a nitride semiconductor light-emitting element having a structure in which an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer are sequentially laminated, the p-type nitride semiconductor layer includes a p-type clad layer, a p-type contact layer and a p-side non-doped layer arranged between the p-type clad layer and the p-type contact layer, and the p-side non-doped layer has a superlattice structure.

Description

  The present invention relates to a nitride semiconductor light emitting device formed using a semiconductor layer in which nitride semiconductors are stacked.

  For the purpose of improving the electrostatic withstand voltage characteristics of nitride semiconductor light emitting devices having many threading dislocations, a Zener diode (protective device) is attached, or layers having different thicknesses with different resistances are applied to nitride semiconductors. It is known to insert into a layer (see Patent Documents 1 to 3).

JP 2000-232237 A JP 2006-120964 A International Publication No. 98/31055

  However, the use of the protection element leads to an increase in cost, and the use of the protection element is limited due to a problem that there is no space for mounting the protection element in a small product.

  In addition, each layer of the nitride semiconductor layer of the light emitting element is usually reduced in resistance in order to lower the forward voltage Vf. Therefore, when implementing a method of inserting layers having different resistances into the nitride semiconductor layer, high resistance It is necessary to insert a current layer and perform current diffusion. The thicker the high resistance layer, the more current diffusion is promoted and the electrostatic withstand voltage characteristics are improved. However, there is a problem that Vf also increases due to the high resistance.

  Therefore, it is required that the electrostatic withstand voltage characteristics be improved but the cost is not increased and the characteristics are not deteriorated.

  The present invention has been made to solve the above-described problems, and nitride semiconductors in which electrostatic withstand voltage characteristics are improved and increase in Vf is suppressed by promoting current diffusion in the nitride semiconductor layer. An object is to provide a light-emitting element.

  The nitride semiconductor light emitting device of the present invention has a structure in which an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer are sequentially stacked, and the p-type nitride semiconductor layer includes a p-type cladding layer and , A p-type contact layer, and a p-side non-doped layer disposed between the p-type cladding layer and the p-type contact layer, wherein the p-side non-doped layer has a superlattice structure.

The p-side non-doped layer has a superlattice structure in which a well layer represented by a composition formula In _x Ga _1-x N (0 <x <1) and a barrier layer represented by a composition formula GaN are alternately stacked. It is preferable to have.

The active layer has a multiple quantum well structure in which a well layer represented by a composition formula In _y Ga _1-y N (0 <y ≦ 1) and a barrier layer represented by a composition formula GaN are alternately stacked. When it has, it is preferable that said x and said y satisfy | fill the relationship of x <y.

  The number of well layers and barrier layers in the p-side non-doped layer is preferably 3 or more and 20 or less, respectively.

  The total thickness of the superlattice structure in the p-side non-doped layer is preferably 500 to 2000 mm.

  In the p-side non-doped layer, the well layer is preferably thinner than the barrier layer.

  The nitride semiconductor light emitting device of the present invention has excellent electrostatic withstand voltage characteristics due to the above characteristics, and an increase in Vf is suppressed.

FIG. 1 is a schematic cross-sectional view of a nitride semiconductor light emitting device according to an embodiment of the present invention. FIGS. 2A to 2C are graphs showing breakdown rates when a voltage of 300 V is applied to the nitride semiconductor light emitting devices of the examples and comparative examples of the present invention. FIG. 3A is a graph showing the breakdown rate when a voltage of 200 V or 300 V is applied to the nitride semiconductor light emitting devices of the examples and comparative examples of the present invention, and FIG. It is a graph which shows the breakdown voltage and 1500V nondestructive rate of the nitride semiconductor light emitting element of an example and a comparative example. FIG. 4A is a graph showing the breakdown rate when a voltage of 200 V or 300 V is applied to the nitride semiconductor light emitting devices of the examples and comparative examples of the present invention, and FIG. It is a graph which shows the breakdown voltage and 1500V nondestructive rate of the nitride semiconductor light emitting element of an example and a comparative example. FIG. 5A is a graph showing a breakdown rate when a voltage of 200 V is applied to the nitride semiconductor light emitting device of the embodiment of the present invention, and FIG. 5B is a nitride semiconductor of the embodiment of the present invention. It is a graph which shows the breakdown voltage and 1500V nondestructive rate of a light emitting element. FIG. 6A is a graph showing the breakdown rate when a voltage of 200 V or 300 V is applied to the nitride semiconductor light emitting devices of the examples and comparative examples of the present invention, and FIG. It is a graph which shows the breakdown voltage and 1500V nondestructive rate of the nitride semiconductor light emitting element of an example and a comparative example. FIG. 7A is a graph showing a breakdown rate when a voltage of 200 V or 300 V is applied to the nitride semiconductor light emitting device of the embodiment of the present invention, and FIG. 7B is a nitridation of the embodiment of the present invention. It is a graph which shows the breakdown voltage and 1500V nondestructive rate of a physical-semiconductor light-emitting device.

  Hereinafter, embodiments of the invention will be described with reference to the drawings. However, the embodiment described below is for embodying the technical idea of the present invention, and does not limit the present invention. In particular, the dimensions, materials, shapes, relative arrangements, and the like of the components described below are merely illustrative examples, and are not intended to limit the scope of the present invention unless otherwise specified. Note that the size, positional relationship, and the like of the members shown in each drawing may be exaggerated for clarity of explanation. Furthermore, each element constituting the present invention may be configured such that a plurality of elements are constituted by the same member and the plurality of elements are shared by one member, and conversely, the function of one member is constituted by a plurality of members. It can also be realized by sharing.

  FIG. 1 is a schematic cross-sectional view of a nitride semiconductor light emitting device according to an embodiment of the present invention. The nitride semiconductor light emitting device shown in FIG. 1 includes an n-type nitride semiconductor layer 2 containing an n-type impurity such as Si, an active layer 3 and a p-type nitride semiconductor containing a p-type impurity such as Mg on a substrate 1. The layer 4 is laminated in order. The p-type nitride semiconductor layer 4 includes a p-type cladding layer 5, a p-type contact layer 7, and a p-side non-doped layer 6 disposed between the p-type cladding layer 5 and the p-type contact layer 7. A p-side electrode 8 is formed on the p-type nitride semiconductor layer 4, and the n-type nitride semiconductor layer 2 exposed by removing a part of the nitride semiconductor layer from the p-type nitride semiconductor layer 4 by etching. An n-side electrode 9 is formed on the surface.

  The p-side non-doped layer 6 has a superlattice structure. The superlattice structure is obtained by stacking different types of semiconductor layers. Piezoelectric fields are generated at the interfaces between different types of stacked semiconductor layers due to differences in their lattice constants. By generating a piezoelectric field, carrier scattering (impurity scattering) due to impurities is suppressed (screening effect), and as a result, carrier mobility is improved. Hereinafter, the improvement of the carrier mobility due to the generation of the piezoelectric field is also referred to as a “piezo effect”. Such a piezo effect improves lateral carrier mobility at the interface between different types of semiconductors, thereby improving current diffusivity. As a result, local current concentration in the active layer, which is relatively crystalline, is relaxed, and the electrostatic withstand voltage characteristics are improved.

In this specification, the nitride semiconductor layer being “non-doped” means that the layer is formed without introducing impurities. Specifically, it means a layer having an impurity concentration of about 1.0 × 10 ¹⁷ / cm ³ or less.

Hereinafter, each example of the configuration of the nitride semiconductor light emitting device according to the present invention will be described in detail. However, not all the components described below are essential, and some of them may be omitted or changed. it can.
The nitride semiconductor light emitting device of the present invention is formed by sequentially laminating an n-type nitride semiconductor layer 2, an active layer 3, and a p-type nitride semiconductor layer 4 on a substrate 1, and a p-type nitride semiconductor layer. The p-side electrode 8 is formed on the n-type nitride semiconductor layer 4, and the n-side electrode 9 is formed on the surface of the n-type nitride semiconductor layer 2 exposed by etching away a part of the nitride semiconductor layer from the p-type nitride semiconductor layer 4. Is formed.

[Substrate 1]
As the substrate 1, an insulating substrate such as spinel (MgAl ₂ O ₄ ), a semiconductor substrate such as SiC, ZnS, ZnO, GaAs, and GaN can be used in addition to the C-plane, R-plane, and A-plane of sapphire.

[N-type nitride semiconductor layer 2]
The n-type nitride semiconductor layer 2 in this embodiment includes at least a buffer layer, an n-type contact layer, and an n-type multilayer film layer in order from the substrate 1 side.

(Buffer layer)
The buffer layer is formed on the substrate 1 and is a low-temperature growth layer for relaxing a mismatch in lattice constant between the substrate 1 and the nitride semiconductor and forming a highly crystalline nitride semiconductor layer thereon. is there. The buffer layer can finally be removed or can itself be omitted. Such a buffer layer is preferably formed by growing AlGaN, GaN, AlN or the like at a temperature of 500 ° C. to 800 ° C. to a thickness of 10 nm to 50 nm.

  Further, a second buffer layer may be further formed on the buffer layer. The second buffer layer has a smaller doping amount of n-type impurities than an n-type contact layer, which will be described later, or a nitride semiconductor not doped with n-type impurities, such as AlGaN, GaN, AlN, etc., than the first buffer layer described above. The film is grown at a high temperature, for example, 800 ° C. to 1300 ° C. to a thickness of 0.5 μm to 3.0 μm. The second buffer layer has high crystallinity because the impurity doping amount is small (or zero). Therefore, an n-type contact layer with high crystallinity can be formed thereon.

(N-type contact layer)
The composition of the n-type contact layer is not particularly limited. For example, the n-type contact layer is preferably AlGaN or GaN having an Al ratio of 0.2 or less. With such a composition, it is easy to obtain a nitride semiconductor layer with few crystal defects. In addition, since the n-type contact layer has such a composition, an excellent ohmic contact with the electrode material can be obtained. The n-type contact layer contains an n-type impurity such as Si, and its concentration is preferably high enough not to deteriorate the crystallinity of the nitride semiconductor. The concentration of the n-type impurity is preferably, for example, from 1 × 10 ¹⁸ / cm ^{3 to} 5 × 10 ²¹ / cm ³ . The n-type contact layer is formed by growing on the buffer layer at a temperature of 900 ° C. to 1300 ° C. The thickness of the n-type contact layer is preferably 4.0 μm to 8.0 μm.

(N-type multilayer film layer)
The n-type multilayer film layer is provided to reduce the forward voltage Vf of the element. The n-type multilayer film layer is represented by, for example, a first layer represented by Al _p Ga _1-p N (0 ≦ p <1) and In _q Ga _1-q N (0 <q <1). It is preferable to have a superlattice structure in which the second layers are alternately stacked. In the first layer, the smaller the p is, that is, the smaller the aluminum content, the better the crystallinity. Therefore, it is preferable that p = 0, that is, GaN. In the second layer, q is preferably 0.5 or less, and more preferably q is 0.2 or less. In particular, in the n-type multilayer film layer, it is preferable that the first layer is GaN, the second layer is In _q Ga _1-q N, and q is 0.2 or less. The thicknesses of the first layer and the second layer constituting the n-type multilayer film layer are not particularly limited, but it is suitable that the thickness of at least one of the layers is 10 nm or less, preferably 7 nm or less, 5 nm or less is more preferable. More specifically, a first layer made of GaN having a thickness of 1 to 5 nm is grown on the n-type contact layer, and a second layer made of InGaN and having a thickness of 0.5 to 3 nm is formed thereon. After this is repeated 5 to 30 times, GaN is further grown to a thickness of 1 to 5 nm to form an n-type multilayer film having a total thickness of 31 to 165 nm. By reducing the thickness of the single layer in this way, the n-type multilayer film layer has a superlattice structure, and becomes less than the critical critical thickness, and the crystallinity of each single layer in the n-type multilayer film layer is improved. . Therefore, as the stacking progresses, the crystallinity can be further improved and the light output can be improved.

[Active layer 3]
The active layer 3 is a nitride semiconductor containing at least In, preferably a multiple quantum well structure or a single layer having a well layer represented by a composition formula In _y Ga _1-y N (0 <y ≦ 1) and a barrier layer. A single quantum well structure can be used. The active layer 3 is a multiple quantum well in which, for example, a well layer represented by a composition formula In _y Ga _1-y N (0 <y ≦ 1) and a barrier layer represented by a composition formula GaN are alternately stacked. Can have a structure.
The thickness of the well layer and the barrier layer is 30 nm or less, preferably 20 nm or less. In particular, the well layer is preferably thin, and is preferably 10 nm or less, more preferably 1 to 5 nm. Thereby, the active layer 3 excellent in quantum efficiency is obtained. When the active layer 3 has a multiple quantum well structure, it is possible to improve the output and lower the oscillation threshold. If well layers and barrier layers are alternately stacked, the first and last layers may be well layers or barrier layers. Further, in the multiple quantum well structure, the barrier layer sandwiched between the well layers is not limited to a single layer (well layer / barrier layer / well layer), and two or more barrier layers. A plurality of barrier layers having different compositions, impurity amounts, and the like may be provided as “well layer / barrier layer (1) / barrier layer (2) /... / Well layer”. The barrier layer is not particularly limited, and a nitride semiconductor having a lower In content than the well layer, a nitride semiconductor containing GaN, Al, or the like can be used. More preferably, it contains InGaN, GaN, or AlGaN. The thickness and composition of the barrier layer need not all be the same in the quantum well structure.

[P-type nitride semiconductor layer 4]
The p-type nitride semiconductor layer 4 in this embodiment includes at least a p-type cladding layer 5, a p-side undoped layer 6, and a p-type contact layer 7 in this order from the active layer 3 side.

(P-type cladding layer 5)
The p-type cladding layer 5 is represented by, for example, a composition formula In _r Al _s Ga _1-rs N (0 ≦ r ≦ 1, 0 ≦ s ≦ 1, 0 ≦ r + s ≦ 1) containing a p-type impurity. And a laminated structure of at least two layers having different band gap energies. Among these, a single layer represented by a composition formula Al _r Ga _1-r N (0 ≦ r ≦ 1) or a stacked structure of at least two layers having different band gap energies is preferable. The thickness of the p-type cladding layer 5 is not particularly limited, but is preferably 10 nm to 15 nm. When the p-type cladding layer 5 has a laminated structure, the thickness of each layer may be about 10 nm or less, and may be about 7 nm or less and about 5 nm or less. By forming such a thin film, the p-type cladding layer 5 has a superlattice structure, so that the crystallinity can be improved. As a result, when a p-type impurity is added, a layer having a high carrier concentration and a low resistivity is obtained, and the Vf, threshold voltage, and the like of the light emitting element tend to decrease.
The p-type cladding layer 5 preferably has a p-type impurity concentration of, for example, about 1 × 10 ²² / cm ³ or less, and more preferably about 5 × 10 ²⁰ / cm ³ or less. The lower limit of the p-type impurity concentration is not particularly limited, but about 5 × 10 ¹⁶ / cm ³ or more is suitable. However, when the p-type cladding layer 5 has a laminated structure, the p-type impurities may not be contained in all the layers.

(P-side non-doped layer 6)
By providing a p-side non-doped layer 6 having a superlattice structure between the above-described p-type cladding layer 5 and a p-type contact layer 7 described later, the electrostatic withstand voltage characteristics of the light emitting element can be improved. The superlattice structure is obtained by stacking different types of semiconductor layers. Piezoelectric fields are generated at the interfaces between different types of stacked semiconductor layers due to differences in their lattice constants. Generation of a piezoelectric field suppresses carrier scattering (impurity scattering) due to impurities (screening effect), and as a result, improves carrier mobility (piezo effect). Such a piezo effect improves the lateral carrier mobility at the interface between different types of semiconductors, thereby improving the current diffusivity. As a result, local current concentration in the active layer, which is relatively crystalline, is relaxed, and the electrostatic withstand voltage characteristics are improved. If the p-side non-doped layer 6 is arranged between the p-type cladding layer 5 and the p-type contact layer 7, the effect of improving the electrostatic withstand voltage characteristics can be obtained. The p-side non-doped layer 6 may or may not be in contact with the p-type cladding layer 5 and / or the p-type contact layer 7.

The p-side non-doped layer 6 has a superlattice structure in which well layers represented by a composition formula In _x Ga _1-x N (0 <x <1) and barrier layers represented by a composition formula GaN are alternately stacked. It is preferable to have.
When the p-side non-doped layer 6 includes only _one In _x Ga _1-x N layer (hereinafter also simply referred to as an InGaN layer), the thicker the InGaN layer, the greater the stress at the GaN / InGaN interface, thereby increasing the piezo effect. Since it becomes large, it is necessary to increase the thickness of the InGaN layer in order to obtain a sufficient piezoelectric effect. However, when the InGaN layer is thickened, crystal defects increase, which may be a factor of deteriorating electrostatic withstand voltage characteristics.
By alternately laminating InGaN layers (well layers) and GaN layers (barrier layers), it is possible to obtain a sufficient piezo effect while thinning each layer and suppressing the occurrence of crystal defects.

In the well layer In _x Ga _1-x N (0 <x <1) of the p-side non-doped layer 6, the smaller the value of x, the more the generation of dislocations (crystal defects) in the InGaN layer is suppressed. Withstand voltage characteristics are improved. However, if the value of x is too small, the characteristics of the p-side non-doped layer 6 tend to approach the characteristics of a GaN single film not having a superlattice structure, so that the effect of improving the electrostatic withstand voltage characteristics is reduced. This tendency is particularly remarkable when the number of well layers and barrier layers in the p-side non-doped layer 6 is small. Therefore, the value of x is preferably adjusted as appropriate so that it is small enough to prevent the occurrence of dislocations in the InGaN layer and large enough not to approach the characteristics of the GaN single film.
The more preferable composition of the well layer of the p-side non-doped layer 6 in the present invention includes other conditions such as the thickness of the p-side non-doped layer 6, the number of well layers and barrier layers stacked, and the thickness of the barrier layer. It can be appropriately adjusted according to the thickness ratio and the like.

Further, as described above, the active layer 3 is formed by alternately stacking the well layer represented by the composition formula In _y Ga _1-y N (0 <y ≦ 1) and the barrier layer represented by the composition formula GaN. In the case of having a multiple quantum well structure, it is preferable that x and y satisfy the relationship x <y. When x <y, the value of x can be set to a value that is small enough to suppress the occurrence of crystal defects in the InGaN layer.

The number of stacked well layers and barrier layers in the p-side non-doped layer 6 is preferably 3 or more and 20 or less, respectively. When the number of stacked layers is within the above range, the electrostatic withstand voltage characteristic can be improved while suppressing an increase in Vf.
More preferable number of layers of the well layer and the barrier layer includes other conditions such as the thickness of the p-side non-doped layer 6, the composition of the well layer In _x Ga _1-x N (0 <x <1), and the thickness of the barrier layer. The thickness can be appropriately adjusted according to the ratio of the thickness of the well layer to the thickness. For example, when the ratio of the thickness of the well layer to the thickness of the barrier layer is relatively small, the electrostatic withstand voltage characteristics tend to improve as the number of stacked layers increases. On the other hand, when the ratio of the thickness of the well layer to the thickness of the barrier layer is relatively large, the electrostatic withstand voltage characteristic tends to improve as the number of stacked layers decreases. The improvement effect may be reduced.

  The total thickness of the superlattice structure in the p-side non-doped layer 6 is preferably 50 nm to 200 nm. When the total thickness of the superlattice structure is within the above range, the electrostatic withstand voltage characteristic can be improved while suppressing an increase in Vf.

In the p-side non-doped layer 6, when the thickness of the well layer is w and the thickness of the barrier layer is b, the ratio of the thickness of the well layer to the thickness of the barrier layer is expressed by w / b.
In the p-side non-doped layer 6, when the well layer (InGaN layer) is thinner than the barrier layer (GaN layer), that is, when w / b <1, the generation of crystal defects in the InGaN layer tends to be suppressed. It is preferable because the electrostatic withstand voltage characteristic tends to be improved.
More preferable values of w / b include other conditions such as the thickness of the p-side non-doped layer 6, the composition of the well layer In _x Ga _1-x N (0 <x <1), the stack of the well layer and the barrier layer. It can be appropriately adjusted according to the number and the like. For example, when the number of well layers and barrier layers is relatively large, the electrostatic withstand voltage characteristic tends to improve as the value of w / b decreases. On the other hand, when the number of stacked well layers and barrier layers is relatively small, the electrostatic breakdown voltage characteristics tend to improve as the value of w / b increases.

  The thicknesses of the well layer and the barrier layer can be appropriately adjusted based on the total thickness of the p-type non-doped layer 6 described above, the number of stacked well layers and barrier layers, and a preferable numerical range of w / b. The thickness of the well layer is preferably 1 nm to 12 nm, more preferably 2 nm to 9 nm. The thickness of the barrier layer is preferably 2 nm to 20 nm, more preferably 3.5 nm to 15 nm.

(P-type contact layer 7)
As the p-type contact layer 7, a nitride semiconductor layer represented by a composition formula In _t Al _u Ga _1-tu N (0 ≦ t ≦ 1, 0 ≦ u ≦ 1, 0 ≦ t + u ≦ 1) can be given. Among them, a layer made of GaN, AlGaN having an Al ratio of 0.2 or less, and InGaN having an In ratio of 0.2 or less is preferable, and a layer made of GaN is more preferable. When the p-type contact layer 7 has such a composition, a good ohmic contact with the electrode material can be obtained.
The thickness of the p-type contact layer 7 is not particularly limited. For example, the thickness is preferably about 50 nm or more, and more preferably about 60 nm or more.
The impurity concentration can be, for example, 1 × 10 ¹⁸ / cm ³ or more and 5 × 10 ²¹ / cm ³ or less.

[P-side electrode 8 and n-side electrode 9]
The p-side electrode 8 and the n-side electrode 9 are not particularly limited, and any of those known in the art can be adopted.
For example, the p-side electrode 8 according to this embodiment is configured by sequentially forming a p-side translucent electrode and a p-side pad electrode on the p-type contact layer 7. The p-side translucent electrode is preferably formed of a material that does not absorb light emitted from the active layer 3 in consideration of light extraction efficiency. For example, a conductive oxide (ITO, ZnO, or the like) or the like is used. Is mentioned.
The n-side electrode 9 is formed on the exposed surface of the n-type contact layer by removing a part of the nitride semiconductor layer by etching from the p-type nitride semiconductor layer 4 to expose the n-type contact layer.

  The nitride semiconductor light-emitting device obtained in this manner has excellent electrostatic withstand voltage characteristics by suppressing current diffusion in the p-side non-doped layer 6 and suppresses an increase in Vf.

  Examples of the present invention will be described below, but the present invention is not limited to the following examples.

[Example 1]
The nitride semiconductor light emitting device of Example 1 was fabricated according to the following procedure.

(substrate)
A substrate made of sapphire (C-plane) was set in a MOVPE (organic metal vapor phase epitaxy) reaction vessel, and the temperature of the substrate was raised to 1050 ° C. while flowing hydrogen to clean the substrate.

(Buffer layer)
Subsequently, the temperature is lowered to 600 ° C., and AlGaN is grown to a thickness of about 200 mm on the substrate using hydrogen as the carrier gas, ammonia gas as the source gas, TMG (trimethylgallium) and TMA (trimethylaluminum). A first buffer layer was formed.

(Second buffer layer)
After forming the first buffer layer, only TMG was stopped and the temperature was raised to 1050 ° C. After reaching 1050 ° C., non-doped GaN was grown to a thickness of about 2 μm using ammonia gas and TMG as source gases to form a second buffer layer.

(N-type contact layer)
Subsequently, at 1050 ° C., GaN doped with 1.0 × 10 ¹⁹ / cm ^{3 of} Si is grown to a thickness of 3 μm by using ammonia gas and TMG as source gas and silane gas as impurity gas, and n-type A contact layer was formed.

(N-type multilayer film layer)
Next, at a similar temperature, using ammonia gas and TMG as a source gas, a first layer made of undoped GaN is grown to about 1.5 nm, and then the temperature is set to 800 ° C., and TMG, TMI are used as source gases. A second layer made of undoped In _0.1 Ga _0.9 N was grown by about 1 nm using ammonia gas. Then, by repeating these operations, 20 layers are alternately stacked, and finally a first nitride semiconductor layer made of GaN is grown by about 1.5 nm to have a total thickness of about 51. A 5 nm n-type multilayer film layer was formed.

(Active layer 3)
After growing GaN doped with Si by 1.0 × 10 ¹⁹ / cm ³ at a temperature of about 900 ° C. to 1300 ° C. using ammonia gas and TMG as source gas and silane gas as impurity gas, about 3.5 nm Only the silane gas was stopped, and GaN was grown about 1.5 nm to form a barrier layer having a thickness of about 5 nm.
Next, a well layer made of undoped In _0.15 Ga _0.85 N is grown to a thickness of about 3 nm using TMG, TMI and ammonia gas as source gases at a temperature of about 600 ° C. to 1000 ° C. Subsequently, a barrier layer made of undoped GaN was grown to a thickness of about 5 nm using TMG and ammonia gas. Then, nine well layers and nine barrier layers are stacked alternately in the order of well + barrier + well + barrier +... + Barrier, and has an active structure having a multiple quantum well structure with a total thickness of about 80 nm. Layer 3 was formed.

(P-type cladding layer 5)
Next, at a temperature of about 900 to 1000 ° C., TMG, TMA, and ammonia gas are used as the source gas, and Cp ₂ Mg (bis (cyclopentadienyl) magnesium) is used as the impurity gas. ^A p-type cladding layer 5 was formed by growing ²⁰ / cm ³ -doped p-type Al _0.17 Ga _0.83 N with a thickness of 10 nm.

(P-side non-doped layer 6)
Next, the temperature is set to 900 ° C., and a well layer made of non-doped In _0.025 Ga _0.975 N is grown to a thickness of 1.7 nm using TMG, TMI, and ammonia gas as source gases. Only the TMI was stopped and a barrier layer made of non-doped GaN was grown to a thickness of 3.3 nm. These operations were repeated, and 10 layers were alternately laminated in the order of the well layer and the barrier layer to form the p-side non-doped layer 6 having a superlattice structure and a total thickness of 50 nm. Assuming that the ratio of the thickness of the well layer to the thickness of the barrier layer in the p-side non-doped layer 6 is w / b, the value of w / b was ½.

(P-type contact layer 7)
Subsequently, at 900 ° C., p-type GaN doped with Mg of 5 × 10 ¹⁹ / cm ³ or less is grown to a thickness of 70 nm using TMG and ammonia gas as source gases and Cp ₂ Mg as impurity gas, Then, p-type GaN doped with 5 × 10 ¹⁹ / cm ³ or more of Mg was grown to a thickness of 15 nm to form the p-type contact layer 7.

  After completion of the reaction, the wafer is taken out from the reaction container, a mask having a predetermined shape is formed on the surface of the uppermost p-type contact layer 7, and etching is performed from the p-type contact layer 7 side using an RIE (reactive ion etching) apparatus. To expose the surface of the n-type contact layer. A p-side translucent electrode made of ITO is formed on almost the entire surface of the p-type contact layer 7, and then p is formed on the formed p-side translucent electrode and on the n-type contact layer exposed by etching. A side pad electrode and an n-side electrode were formed. Finally, the wafer was cut into chips to obtain the nitride semiconductor light emitting device of Example 1.

[Example 2]
Example 2 is the same as Example 2 except that the p-side non-doped layer 6 is formed by alternately stacking 5 layers of 3.3 nm thick well layers and 6.7 nm thick barrier layers. A nitride semiconductor light emitting device was produced. The value of w / b was 1/2.

[Example 3]
Example 3 is the same as Example 1 except that the p-side non-doped layer 6 is formed by alternately stacking three layers of 5.6 nm thick well layers and 11.1 nm thick barrier layers. A nitride semiconductor light emitting device was produced. The value of w / b was 1/2.

[Example 4]
The nitride semiconductor of Example 4 is the same as that of Example 1 except that the p-side non-doped layer 6 is formed by alternately stacking 10 well layers having a thickness of 1 nm and barrier layers having a thickness of 4 nm. A light emitting element was manufactured. The value of w / b was 1/4.

[Example 5]
Example 5 is the same as Example 1 except that a p-side non-doped layer 6 is formed by alternately stacking seven layers of well layers having a thickness of 1.4 nm and barrier layers having a thickness of 5.7 nm. A nitride semiconductor light emitting device was produced. The value of w / b was 1/4.

[Example 6]
Example 6 is the same as Example 6 except that a p-side non-doped layer 6 is formed by alternately stacking three well layers having a thickness of 3.3 nm and barrier layers having a thickness of 13.3 nm. A nitride semiconductor light emitting device was produced. The value of w / b was 1/4.

[Comparative Example 1]
Instead of the p-side non-doped layer 6 having a superlattice structure, a p-side non-doped layer having no super-lattice structure is grown at a temperature of 900 ° C. by using TMG ammonia gas as a source gas to grow non-doped GaN to a thickness of 50 nm. A nitride semiconductor light emitting device of Comparative Example 1 was fabricated in the same procedure as in Example 1 except that the layer 6 was formed.

[Example 7]
The p-side non-doped layer 6 is formed by alternately laminating 10 layers of a well layer made of non-doped In _0.05 Ga _0.95 N having a thickness of 1.7 nm and a barrier layer made of non-doped GaN having a thickness of 3.3 nm. A nitride semiconductor light emitting device of Example 7 was fabricated in the same procedure as in Example 1 except for the formation. The value of w / b was 1/2.

[Example 8]
A nitride semiconductor light emitting device of Example 8 was fabricated in the same procedure as in Example 7 except that the composition of the well layer in the p-side non-doped layer 6 was changed to In _0.10 Ga _0.90 N.

[Example 9]
A nitride semiconductor light emitting device of Example 9 was fabricated in the same procedure as in Example 7, except that the composition of the well layer in the p-side non-doped layer 6 was changed to In _0.12 Ga _0.88 N.

[Example 10]
A nitride semiconductor light emitting device of Example 10 was fabricated in the same procedure as in Example 7, except that the composition of the well layer in the p-side non-doped layer 6 was changed to In _0.15 Ga _0.85 N.

[Comparative Example 2]
Instead of the p-side non-doped layer 6 having a superlattice structure, a p-side non-doped layer having no super-lattice structure is grown at a temperature of 900 ° C. by using TMG ammonia gas as a source gas to grow non-doped GaN to a thickness of 50 nm. A nitride semiconductor light emitting device of Comparative Example 2 was fabricated in the same procedure as in Example 7 except that the layer 6 was formed.

  About the light emitting element of Examples 1-10 and Comparative Examples 1 and 2, the destruction rate at the time of applying the voltage of 300V was measured, and the electrostatic withstand voltage characteristic was evaluated. The breakdown rate measurement results for each light-emitting element are shown in FIGS. Further, the composition of the well layer in the p-side non-doped layer 6 of the nitride semiconductor light emitting devices according to Examples 1 to 10 and Comparative Examples 1 and 2, the number of well layers and barrier layers, and the thickness of the well layer relative to the thickness of the barrier layer Table 1 shows the thickness ratio w / b and the total thickness of the p-side non-doped layer 6. 2A to 2C, when the total thickness of the p-side non-doped layer 6 is the same, the light emitting elements of Examples 1 to 10 are 300 V compared to the light emitting elements of Comparative Examples 1 and 2. It can be seen that the destruction rate is decreasing.

FIG. 2 (a) shows the change in the breakdown rate when the value of w / b is fixed to ½ and the number of well layers and barrier layers is changed. As shown in FIG. 2A, when the value of w / b is ½, the smaller the number of well layers and barrier layers, the lower the destruction rate. It can be seen that tends to be small.
In the case of w / b = 1/2, the reason why the destruction rate decreases as the number of stacked layers decreases is as follows. Since the total thickness of the p-side non-doped layer 6 is fixed, when the number of stacked layers is reduced, the thickness of the InGaN layer per layer increases, thereby increasing the stress at the interface between the GaN layer and the InGaN layer. . As a result, the obtained piezo effect is increased, and the destruction rate is considered to be reduced.
In the case of w / b = 1/2, the reason why the effect of reducing the destruction rate is reduced when the number of stacked layers is too small may be as follows. If the number of stacked layers is too small, the thickness of each InGaN layer increases, thereby increasing crystal defects. As a result, the effect of improving electrostatic withstand voltage characteristics is reduced, and the effect of reducing the breakdown rate is reduced. It is thought.

  FIG. 2B shows the change in the breakdown rate when the value of w / b is fixed to ¼ and the number of well layers and barrier layers is changed. FIG. 2B shows that when the value of w / b is ¼, the breakdown rate tends to decrease as the number of well layers and barrier layers increases.

  2A and 2B, the value of w / b is relatively large, that is, the thickness of the well layer is relatively large, and the value of w / b is relatively small, that is, the thickness of the well layer. It can be seen that the tendency of the preferred number of layers is different when the thickness is relatively thin.

  2A and 2B, when Example 1 and Example 4 in which the number of well layers and barrier layers are both 10 are compared, an example in which the value of w / b is 1/4 is compared. The light emitting element of 4 had a lower breakdown rate than the light emitting element of Example 1 in which the value of w / b was 1/2. On the other hand, when Examples 3 and 6 in which the number of stacked layers is both 3 are compared, the light emitting element of Example 3 in which the value of w / b is 1/2 has a value of 1/4 in w / b. Thus, the breakdown rate was lower than that of the light emitting device of Example 6. Therefore, when the number of stacked layers is relatively large, it is preferable that the value of w / b is small, and when the number of stacked layers is relatively small, it is preferable that the value of w / b is large.

FIG. 2C shows the composition of the well layer In _x Ga _1-x N (0 <x <1) with the number of well layers and barrier layers being 10 and the value of w / b being fixed to ½. The change of the destruction rate when changing is shown. The breakdown rate of the light emitting device of Example 1 where x = 0.025 was the highest, and the breakdown rate of the light emitting device of Example 10 where x = y = 0.15 was the second highest. FIG. 2 (c) shows that the smaller the value of x, the lower the destruction rate. However, when x is too small, the effect of reducing the destruction rate tends to decrease. The reason why the fracture rate decreases as the value of x decreases is considered to be that the generation of crystal defects is suppressed as the value of x decreases. The reason why the effect of reducing the breakdown rate is reduced when x is too small is that the characteristics of the p-side non-doped layer 6 approach the characteristics of a GaN single film not having a superlattice structure, and as a result, the obtained piezo effect is reduced. it is conceivable that.

The number of well layers and barrier layers in the p-side non-doped layer 6, the ratio w / b of the thickness of the well layer to the thickness of the barrier layer, and the composition of the well layer In _x Ga _1-x N (0 <x <1) In order to investigate further in detail, the following nitride semiconductor light emitting devices of Examples 11 to 19 and Comparative Example 3 were fabricated.

[Example 11]
Seven well layers composed of 1.8 nm thick non-doped In _0.03 Ga _0.97 N and 5.4 nm thick non-doped GaN layers are alternately stacked to give a total thickness of 50 nm. The nitride semiconductor light emitting device of Example 11 was fabricated in the same procedure as in Example 1 except that the p-side non-doped layer 6 was formed. The value of w / b was 1/3.

[Example 12]
Except that a well layer having a thickness of 4.2 nm and a barrier layer having a thickness of 12.5 nm were alternately stacked in three layers to form a p-side non-doped layer 6 having a total thickness of 50 nm, which was the same as in Example 11. The nitride semiconductor light emitting device of Example 12 was fabricated by the procedure described above. The value of w / b was 1/3.

[Example 13]
A procedure similar to that in Example 11 was performed except that a 5 nm thick well layer and a 5 nm thick barrier layer were alternately stacked to form a p-side non-doped layer 6 having a total thickness of 50 nm. The nitride semiconductor light emitting device of Example 13 was produced. The value of w / b was 1.

[Example 14]
Except that a well layer having a thickness of 1.3 nm and a barrier layer having a thickness of 8.8 nm were alternately stacked to form a p-type non-doped layer 6 having a total thickness of 50 nm. The nitride semiconductor light emitting device of Example 14 was fabricated by the procedure described above. The value of w / b was 1/7.

[Example 15]
A well layer made of non-doped In _0.01 Ga _0.99 N having a thickness of 2.5 nm and a barrier layer made of non-doped GaN having a thickness of 7.5 nm are alternately stacked to form a total thickness of 50 nm. The nitride semiconductor light emitting device of Example 15 was fabricated in the same procedure as in Example 11 except that the p-side non-doped layer 6 was formed. The value of w / b was 1/3.

[Example 16]
A nitride semiconductor light emitting device of Example 16 was fabricated in the same procedure as in Example 15 except that the composition of the well layer in the p-side non-doped layer 6 was changed to In _0.05 Ga _0.95 N.

[Example 17]
Example 11 except that an 8.3 nm thick well layer and an 8.3 nm thick barrier layer were alternately laminated to form a p-side non-doped layer 6 having a total thickness of 50 nm. The nitride semiconductor light emitting device of Example 17 was fabricated by the procedure described above. The value of w / b was 1.

[Example 18]
A procedure similar to that in Example 11 was performed except that a well layer having a thickness of 2 nm and a barrier layer having a thickness of 14.6 nm were alternately stacked to form a p-side non-doped layer having a total thickness of 50 nm. A nitride semiconductor light emitting device of Example 18 was produced. The value of w / b was 1/7.

[Example 19]
A well layer made of non-doped In _0.05 Ga _0.95 N having a thickness of 4.2 nm and a barrier layer made of non-doped GaN having a thickness of 12.5 nm are alternately stacked in three layers, for a total thickness of 50 nm. The nitride semiconductor light emitting device of Example 19 was fabricated in the same procedure as in Example 11 except that the p-side non-doped layer 6 was formed. The value of w / b was 1/3.

[Comparative Example 3]
Instead of the p-side non-doped layer 6 having a superlattice structure, a p-side non-doped layer having no super-lattice structure is grown at a temperature of 900 ° C. by using TMG ammonia gas as a source gas to grow non-doped GaN to a thickness of 50 nm. A nitride semiconductor light emitting device of Comparative Example 3 was fabricated in the same procedure as in Example 11 except that the layer 6 was formed.

  For the light emitting devices of Examples 11 to 19 and Comparative Example 3, the breakdown rate when applying a voltage of 200 V and 300 V, the breakdown voltage, and the non-destructive rate when applying a voltage of 1500 V were measured respectively. The characteristics were evaluated. Further, the forward voltage Vf was measured for each light emitting element. The measurement result regarding each light emitting element is shown in FIGS. Further, the composition of the well layer, the number of well layers and the number of the barrier layers in the p-side non-doped layer 6 of the nitride semiconductor light emitting devices according to Examples 11 to 19 and Comparative Example 3, the thickness of the well layer relative to the thickness of the barrier layer Table 2 shows the measurement results of the ratio w / b, the total thickness of the p-side non-doped layer 6 and the forward voltage Vf. 3 to 7, when the p-side non-doped layer 6 has the same thickness, the light emitting elements of Examples 11 to 19 have a lower breakdown rate at 200 V and 300 V than the light emitting element of Comparative Example 3. It can also be seen that the breakdown voltage has increased. In addition, the higher the breakdown voltage, the higher the non-destructive rate at 1500V. From Table 2, when the thickness of the p side non-dope layer 6 is the same, it turns out that the light emitting element of Examples 11-19 has the forward voltage Vf equivalent to the comparative example 3. FIG.

FIG. 3 (a) shows a case where the number of well layers and barrier layers are varied while the composition of the well layer is In _0.03 Ga _0.97 N and the value of w / b is fixed to 1/3. FIG. 3 (b) shows changes in breakdown voltage and 1500V non-destruction rate. 3 (a) and 3 (b), under this condition, the light emitting device of Example 12 with the number of stacked layers is 200 V and the light emitting device of Example 11 with the number of stacked layers of 7V. It can be seen that the breakdown rate at 300 V is low, and the breakdown voltage and the 1500 V non-destructive rate are high.

FIG. 4A shows the breakdown rate when the composition of the well layer is In _0.03 Ga _0.97 N, the number of well layers and barrier layers is fixed to 5, and the value of w / b is changed. FIG. 4B shows changes in the breakdown voltage and the 1500 V non-destructive rate. 4 (a) and 4 (b), under the conditions of this example, the light emitting element of Example 13 in which the value of w / b is 1, and the example in which the value of w / b is 1/7. It can be seen that the breakdown rate at 200 V and 300 V, the breakdown voltage, and the 1500 V non-destructive rate are approximately the same for the 14 light-emitting elements. From the above, under the conditions of this example, the thickness of the well layer is equal to the thickness of the barrier layer. Therefore, the increase in crystal defects due to the relatively thick well layer adversely affects the electrostatic withstand voltage characteristics of the light emitting device. It is thought that it is not so remarkable as to affect.

FIG. 5A shows the change in the breakdown rate when the number of well layers and barrier layers is 5 and the value of w / b is fixed to 1/3 and the composition of the well layer is changed. FIG. 5B shows changes in breakdown voltage and 1500 V non-destructive rate. 5A and 5B, under this condition, the light emitting device of Example 15 in which the composition of the well layer is In _0.01 Ga _0.99 N has a well layer composition of In _0.05. Compared to the light emitting element of Example 16 which is Ga _0.95 N, it can be seen that the breakdown rate at 200 V is low, and the breakdown voltage and the 1500 V non-destructive rate are high.

FIG. _6A shows the breakdown rate when the composition of the well layer is In _0.03 Ga _0.97 N, the number of well layers and barrier layers is fixed to 3, and the value of w / b is changed. FIG. 6B shows changes in breakdown voltage and 1500 V non-destructive rate. From FIG. 6A, it can be seen that, under the conditions of this example, the breakdown rate at 200 V and 300 V was lowest when the value of w / b was 1. Further, as can be seen from FIG. 6B, the breakdown voltage and the 1500 V non-destructive rate were almost equal regardless of the value of w / b. From the above, under the conditions of this example, the thickness of the well layer is equal to the thickness of the barrier layer. Therefore, the increase in crystal defects due to the relatively thick well layer adversely affects the electrostatic withstand voltage characteristics of the light emitting device. Rather, the stress at the GaN / InGaN interface increases due to the relatively thick well layer, which increases the piezoelectric effect, which contributes to the improvement of electrostatic withstand voltage characteristics. Conceivable.

  The results of Examples 12, 17 and 18 shown in FIG. 6 (a) showed a tendency different from the results of Examples 13 and 14 shown in FIG. 4 (a). This is presumably because the number of well layers and barrier layers in Examples 12, 17 and 18 are smaller than those in Examples 13 and 14.

FIG. 7A shows the change in the breakdown rate when the number of well layers and barrier layers is 3 and the value of w / b is fixed to 1/3 and the composition of the well layer is changed. FIG. 7B shows changes in breakdown voltage and 1500 V non-destructive rate. 7A and 7B, under this condition, the light emitting device of Example 19 in which the composition of the well layer is In _0.05 Ga _0.95 N has the composition of the well layer of In _0.03. Compared with the light emitting element of Example 12 which is Ga _0.97 N, the breakdown voltage and the 1500 V non-destructive rate are the same, but the breakdown rate at 200 V and 300 V is low. This result shows a tendency different from the results of Examples 15 and 16 shown in FIGS. This is considered to be due to the fact that in the light emitting elements of Examples 12 and 19, the number of stacked well layers and barrier layers of the p-side non-doped layer 6 is smaller than that of the light emitting elements of Examples 15 and 16. When the number of stacked layers is small, when the value of x in the composition In _x Ga _1-x N (0 <x <1) of the well layer is reduced, the p-side non-doped layer 6 has characteristics of a GaN single film not having a superlattice structure. Tend to approach.

  The nitride semiconductor light emitting device of the present invention has excellent electrostatic withstand voltage characteristics.

1 substrate 2 n-type nitride semiconductor layer 3 active layer 4 p-type nitride semiconductor layer 5 p-type cladding layer 6 p-side non-doped layer 7 p-type contact layer 8 p-side electrode 9 n-side electrode

Claims (6)

  A nitride semiconductor light emitting device having a structure in which an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer are laminated in order, wherein the p-type nitride semiconductor layer includes a p-type cladding layer, a p-type cladding layer, A nitride semiconductor comprising: a contact layer; and a p-side non-doped layer disposed between the p-type cladding layer and the p-type contact layer, wherein the p-side non-doped layer has a superlattice structure. Light emitting element. The p-side non-doped layer has a superlattice structure in which a well layer represented by a composition formula In _x Ga _1-x N (0 <x <1) and a barrier layer represented by a composition formula GaN are alternately stacked. The nitride semiconductor light-emitting device according to claim 1, comprising: The active layer has a multiple quantum well structure in which a well layer represented by a composition formula In _y Ga _1-y N (0 <y ≦ 1) and a barrier layer represented by a composition formula GaN are alternately stacked. The nitride semiconductor light emitting device according to claim 2, wherein x and y satisfy a relationship of x <y.   4. The nitride semiconductor light emitting device according to claim 2, wherein the number of stacked well layers and barrier layers in the p-side non-doped layer is 3 or more and 20 or less. 5.   The nitride semiconductor light emitting element according to any one of claims 1 to 4, wherein a total thickness of the superlattice structure in the p-side non-doped layer is 500 to 2000 mm.   5. The nitride semiconductor light-emitting element according to claim 2, wherein in the p-side non-doped layer, the thickness of the well layer is thinner than the thickness of the barrier layer.

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