JP2013102674A - Multilevel power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilevel power converter which reduces the number of necessary semiconductor elements, and can reduce the size and the cost of the converter without using a voltage uniform circuit.SOLUTION: The multilevel power converter comprises: a direct current power source V; capacitors C3 and C4 connected in series between positive and negative electrode ends of the V; switching elements S5 and S6, capacitors C1 and C2 and switching elements S7 and S8 which are sequentially connected in series between the positive and negative electrode ends of the V; switching elements S1 to S4 connected in series between a common connection point between S6 and C1 and a common connection point between C2 and S7; diodes D1 and D2 connected in series between a common connection point between S1 and S2 and a common connection point between S3 and S4; and D3 and S11, and D4 and S12 connected in series between a common connection point NP' between C1 and C2 and a common connection point NP between C3 and C4. The common connection point between the elements S2 and S3 and the common connection point between C3 and C4 serve as AC output ends at a plurality of voltage levels.

Description

  The present invention relates to a power conversion circuit capable of outputting a multi-level phase voltage and operating with a single DC voltage source, and a multi-level power converter that generates an AC output converted from a DC power source into a plurality of voltage levels. About.

  Conventionally, as a multilevel power converter, for example, a 5-level inverter described in Non-Patent Document 1 is known. FIG. 7 shows a configuration diagram of one phase of the main circuit of the 5-level inverter described in Non-Patent Document 1. In the circuit of FIG. 7, four DC link capacitors Cdc1 to Cdc4 are connected in series in order to divide the DC output voltage of the diode rectifier 2 provided on the DC side of the five-level inverter 1 by 5 and stored in these capacitors Cdc1 to Cdc4. Using the generated energy, the inverter 1 generates an AC output having a potential of five levels corresponding to the five partial pressures.

The operation of the 5-level inverter 1 will be described. Assuming that the neutral point of the voltage divided by the capacitors Cdc1 to Cdc4 is M point, the output end of the inverter 1 is A point, and the voltage obtained by uniformly dividing the DC voltage by 4 is E, the switching elements S1 to S8 are By controlling by a combination of on / off pattern control (switching modes SM1 to SM5), a five-level voltage output is generated at the terminal AM.
(SM1) When S1, S2, S3 and S4 are on and S5, S6, S7 and S8 are off, the voltage + 2E is output to the inter-terminal AM.

  (SM2) When S2, S3, S4 and S5 are on and S1, S6, S7 and S8 are off, the voltage + E is output to the inter-terminal AM.

  (SM3) When S3, S4, S5 and S6 are on, and S1, S2, S7 and S8 are off, voltage 0 is output to the inter-terminal AM.

  (SM4) When S4, S5, S6 and S7 are on and S1, S2, S3 and S8 are off, the voltage -E is output to the inter-terminal AM.

  (SM5) When S5, S6, S7 and S8 are on and S1, S2, S3 and S4 are off, the voltage -2E is output to the inter-terminal AM.

Moreover, the thing of patent document 1 was proposed as an example of the conventional power converter device. FIG. 8 shows the configuration of one phase of the power conversion device described in Patent Document 1. A series circuit of capacitors C1 and C2 and a series circuit of semiconductor switches S ₁ and S ₂ are connected in parallel to the DC power source E, and a series circuit of semiconductor switches S ₅ and S ₆ are connected to the capacitor C3, and S ₇ , A series circuit of S _{8 and} a series circuit of bidirectional switches S _3D and S _4D are connected in parallel.

The common connection point of the switches S ₁ and S _{2 and} the common connection point of S ₅ and S ₆ are connected in common, and the common connection point of the switches S ₇ and S _{8 and} the common connection point of the bidirectional switches S _3D and S _4D. Are commonly connected to the terminal U, and a common connection point M (middle point) of the capacitors C ₁ and C ₂ is commonly connected to the terminal U.

When the voltage of the DC power source E is E _d , the voltage of the capacitor C ₁ is V _C1 , the voltage of the capacitor C ₂ is V _C2 , and the voltage of the capacitor C ₃ is V _C3 , the output voltage V _UM observed from the midpoint M and each The relationship between the switches S ₁ , S ₂ , S _3D , S _4D , S _{5 to} S _{8 and} the on / off states is as shown in FIG.

In FIG. 9, the operation modes corresponding to the on / off states of the switches S ₁ , S ₂ , S _3D , S _4D , and S _{5 to} S ₈ are mode 1 to 12, respectively. Based on FIG. 9, when an appropriate switch in FIG. 8 is selected and turned on / off, the output voltage V _UM becomes nine voltage levels (V _C1 + V _C3 , V _C1 , V _C1 − V _C3 , V _C3 , 0, −V _C3 , −V _C2 + V _C3 , −V _C2 , −V _C2 −V _C3 ), and the average voltage is a sinusoidal waveform.

Kazunori Hasegawa, Hirohumi Akagi, "Voltage Balancing of the Four Split DC Capacitors for a Five-Level Diode-Clanped PWM Inverter with a Front-End Diode Rectifier", international Power Electronics Conference (IPEC), IEEJ / IEEE, pp. 734-739, Jun, 2010

JP 2010-246189 A

In the configuration shown in FIG. 7, four DC link capacitors C _{dc1 to} C _dc4 are connected in series to _divide the power supply voltage (output voltage of the diode rectifier 2) on the DC side of the five-level inverter by four. A five-level voltage AC output is generated using the energy stored in the capacitor.

In principle, since the active power flows into or out of the five-level inverter so that the voltage level matches the output voltage waveform, the average values of the DC voltages generated in the four capacitors C _{dc1 to} C _dc4 are not equal. A problem occurs. In order to make all the wave heights for each level of the AC output equal, it is necessary to control so that the average values of the DC voltages generated in the capacitors C _{dc1 to} C _dc4 are all equal.

Therefore, in the circuit of Non-Patent Document 1 shown in FIG. 7, the voltage uniform circuit 3 for making the average value of the DC voltages generated in the capacitors C _{dc1 to} C _dc4 uniform by the step-up / step-down chopper operation is provided on the DC side of the inverter 1. Provided. This voltage equalization circuit 3 requires a large DC reactor L _C having a coupled winding and a backflow prevention diode in addition to the semiconductor switch, and the increase in these circuit elements increases the size and cost of the device. There was a problem.

  In addition to the semiconductor switch, the 5-level inverter 1 shown in FIG. 7 requires a large number of clamping diodes having a high withstand voltage and a large current capacity, which cause an increase in circuit size and cost.

  In FIG. 15 showing the switching mode in the circuit of FIG. 8, there are two modes for outputting zero voltage: mode 6 and mode 7. Therefore, for example, when the voltage command value is given as a sine wave, it is necessary to switch between the zero voltage used in the positive half cycle of the voltage command value and the zero voltage used in the negative half cycle. That is, since the switching mode is switched while the zero voltage is output, there arises a problem that the control becomes complicated.

  SUMMARY OF THE INVENTION The present invention solves the above problems, and an object of the present invention is to provide a multilevel power converter that can reduce the required number of semiconductor elements, reduce the size of the device, and reduce the cost without using a voltage uniform circuit. It is in. Further, the control is simplified with the only mode that outputs zero voltage.

  The multi-level power converter according to claim 1 for solving the above-described problem is a multi-level power converter that generates an AC output obtained by converting a voltage of a DC power source into a plurality of voltage levels, the DC power source, A switching element series circuit in which first to fourth switching elements are connected in series, and first and second switching elements that are sequentially connected in series between a first switching element side end and a fourth switching element side end of the switching element series circuit. A first capacitor sequentially connected in series between a second capacitor, a common connection point of the first switching element and the second switching element, and a common connection point of the third switching element and the fourth switching element. And a second diode, third and fourth capacitors sequentially connected in series between the positive and negative terminals of the DC power supply, a positive electrode of the DC power supply, A fifth switching element connected between the first capacitor and the common connection point of the first switching element, a negative electrode of the DC power supply, and a common connection point of the second capacitor and the fourth switching element A sixth switching element connected to each other, a diode series circuit in which a third diode and a fourth diode are connected in series, and a seventh and an eighth series connected between both ends of the diode series circuit. A switching element; and a control means for outputting a plurality of voltage levels by on / off control of the first to eighth switching elements; a common connection point of the first and second diodes; A common connection point of the two capacitors and a common connection point of the third and fourth diodes, and the common of the seventh and eighth switching elements. The connection point is connected to a common connection point of the third and fourth capacitors, the first common connection point of the second switching element and the third switching element, and the third capacitor and the fourth capacitor. The two common connection points are AC output terminals having a plurality of voltage levels.

  According to the above configuration, it is possible to realize a multilevel power converter that outputs a voltage of 5 levels with a small number of component elements.

  A multilevel power converter according to a second aspect of the present invention is the multilevel power converter according to the first aspect, wherein the first to eighth switching elements, the first and second capacitors, and the first to fourth diodes perform multilevel voltage conversion. A multi-level voltage converter is provided in each phase of the three-phase alternating current, and the multi-level voltage converter of the three-phase each phase is connected in common with the second common connection point as a neutral point. The first common connection point is an output end of each of the U phase, V phase, and W phase.

  According to the above configuration, it is possible to realize a three-phase multi-level power converter that outputs a five-level voltage with a small number of component elements. Further, not limited to three phases, any number of phases and any connection method such as Δ connection or Y connection are possible.

  Further, the multi-level power converter according to claim 3 is the control mode according to claim 1 or 2, wherein the on / off control of the control means is a control mode in which the capacitor is charged and discharged in the same voltage level output. It is characterized by having.

  According to the above configuration, the first and second capacitors can each be adjusted to an arbitrary voltage by selecting the control mode.

  The multilevel power converter according to claim 4 is the multilevel power converter according to any one of claims 1 to 3, wherein the on / off control of the control means has a single control mode for outputting a zero level voltage. It is characterized by that.

  According to the above configuration, only one mode for outputting the zero voltage is required, so that the control can be simplified.

(1) According to the first to fourth aspects of the present invention, since the voltages of the first and second capacitors can be controlled without using a conventional voltage uniform circuit, the peak values of each voltage level of the AC output Can be made equal, and a multilevel power converter can be realized with a small number of elements. As a result, it is possible to reduce the size and cost of the apparatus.
(2) According to the invention described in claim 2, a three-phase multilevel power converter can be realized with a small number of elements.
(3) According to the invention described in claim 3, the first and second capacitors can be adjusted to arbitrary voltages by selecting the control mode.
(4) According to the invention described in claim 4, since the mode for outputting the zero voltage is only the single control mode, the control performed by the control means can be simplified.

1 is a circuit diagram of a five-level power converter according to a first embodiment of the present invention. The characteristic view which shows the relationship between the switching mode of the circuit of FIG. 1, and the voltage _VAB between A and B. FIG. The circuit diagram of the 5-level power converter of Example 2 of this invention. The circuit diagram of the 5-level power converter of Example 3 of this invention. The circuit diagram of the 5-level power converter of Example 4 of this invention. The control block diagram of the control means in embodiment of this invention. The circuit diagram which shows an example of the conventional multilevel power converter. The circuit diagram which shows the other example of the conventional multilevel power converter. The figure which shows the relationship between the switching mode of the circuit of FIG. 8, and an output voltage. FIG. 9 is a waveform diagram of an output voltage in the circuit of FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited to the following embodiments.

  FIG. 1 shows a circuit configuration of Embodiment 1 of the present invention. In FIG. 1, a switching element series circuit is configured by sequentially connecting first to fourth switching elements S1 to S4 in series. First and second capacitors C1 and C2 are sequentially connected in series between the first switching element S1 side end and the fourth switching element S4 side end of the switching element series circuit.

  First and second diodes D1 and D2 are sequentially connected in series to the common connection point of the switching elements S1 and S2 and the common connection point of the switching elements S3 and S4.

V _DC is a DC power source, and switching elements S5 and S6 constituting the fifth switching element are sequentially arranged in series between the positive electrode of the DC power source V _DC and the common connection point of the switching element S1 and the capacitor C1. It is connected. Switching elements S8 and S7 constituting a sixth switching element are sequentially connected in series between the negative electrode of the DC power source V _DC and the common connection point of the switching element S4 and the capacitor C2.

Third and fourth capacitors C3 and C4 are sequentially connected in series between the positive and negative ends of the DC power supply V _DC .

  The third and fourth diodes D3 and D4 are sequentially connected in series to form a diode series circuit. A seventh switching element S11 and an eighth switching element S12 are sequentially connected in series between both ends of the diode series circuit.

  The common connection point of the diode D3 and the switching element S11 is connected to the common connection point of the switching element S6 and the capacitor C1 via the switching element S13, and the common connection point of the diode D4 and the switching element S12 is the switching element S14. Is connected to a common connection point of the switching element S7 and the capacitor C2.

  The common connection point of the diodes D3 and D4 is connected to the common connection point NP ′ (floating middle point) of the capacitors C1 and C2, and the common connection point of the switching elements S11 and S12 is the common connection point NP (middle of the capacitors C3 and C4). Connected to the sex point).

  A common connection point (first common connection point) of the switching elements S2 and S3 is an output terminal A, and the neutral point NP (second common connection point) is an output terminal B.

  The fifth switching element (S5, S6) and the sixth switching element (S7, S8) may each be composed of one switching element in the case of using a high breakdown voltage switching element.

  The switching elements S1 to S8 and S11 to S14 are composed of, for example, a bidirectional switch, an IGBT, or the like.

  The switching elements S1 to S8 and S11 to S14 are on / off controlled by a control unit (control means) (not shown) according to a switching pattern for outputting a five-level voltage, and as a result, between the output terminals A and B. A five-level voltage is output.

The power source voltage of the DC power source V _DC may be fixed or variable.

In the above configuration, when the voltage of the DC power source V _DC is 4E, for example, the capacitors C3 and C4 are charged with a voltage of 2E.

  On / off of switching elements S1 to S8 and S11 to S14 is controlled according to a switching pattern having mode 1 to mode 7 shown in Table 1, for example.

Table 1 shows the voltage V _AB output between the output terminals A and B according to the on / off modes 1 to 7 (represented as Mode 1 to 7 in Table 1) of the switching elements S1 to S8 and S11 to S14. The presence / absence of charge / discharge of the capacitors C1 and C2 is shown.

When the voltage of the DC power source V _DC is 4E and the voltages of the capacitors C3 and C4 are 2E, the voltage between the output terminals A and B can output 5 levels of voltages of 2E, E, 0, -E, and -2E. .

Here, the path of the current I between each mode 1 to mode 7 of the switching pattern of Table 1 and the output terminals A and B will be described below. Table 1 shows the case where the current I> 0, and in the following description, the positive end of the DC power source V _DC in the capacitor C3 is P, and the negative end of the DC power source V _DC in the capacitor C4 Is expressed as N.

<Mode 1>
Switching elements S3, S4, S7, S8, S11, and S13 are turned off, switching elements S1, S2, S5, S6, S12, and S14 are turned on, and current I is output terminal B → NP → C3 → P → S5. → S6 → S1 → S2 → Output terminal A The voltage between the output terminals A and B is 2E.

<Mode 2>
Switching elements S1, S4, S7, S8, S11, and S13 are turned off, switching elements S2, S3, S5, S6, S12, and S14 are turned on, and current I is output terminal B → NP → C3 → P → S5. → S6 → C1 → D1 → S2 → Output terminal A The voltage between the output terminals A and B is E. In this mode 2, the capacitor C1 is charged.

<Mode 3>
Switching elements S3 to S8, S13, and S14 are turned off, switching elements S1, S2, S11, and S12 are turned on, and current I is output terminal B → NP → S12 → D4 → C1 → S1 → S2 → output terminal A. It flows in the route. The voltage between the output terminals A and B is E. In this mode 3, the capacitor C1 is discharged.

<Mode 4>
Switching elements S1, S4 to S8, S13, and S14 are turned off, switching elements S2, S3, S11, and S12 are turned on, and current I is output from output terminal B → NP → S10 → S12 → D4 → D1 → S2 → output. It flows through the route of terminal A. The voltage between the output terminals A and B is zero.

<Mode 5>
Switching elements S1, S2, S5 to S8, S13, and S14 are turned off, switching elements S3, S4, S11, and S12 are turned on, and current I is output terminal B → NP → S12 → D4 → C2 → S4 → S3 → Flows along the path of output terminal A. The voltage between the output terminals A and B is -E. In this mode 5, the capacitor C2 is charged.

<Mode 6>
Switching elements S1, S4, S5, S6, S12, and S14 are turned off, switching elements S2, S3, S7, S8, S11, and S13 are turned on, and current I is output terminal B → NP → C4 → N → S8. → S7 → C2 → D1 → S2 → Output terminal A The voltage between the output terminals A and B is -E. In this mode 6, the capacitor C2 is discharged.

<Mode 7>
Switching elements S1, S2, S5, S6, S12, and S14 are turned off, switching elements S3, S4, S7, S8, S11, and S13 are turned on, and current I is output terminal B → NP → C4 → N → S8. → S7 → S4 → S3 → Output terminal A The voltage between the output terminals A and B is −2E.

  When the voltages of the capacitors C3 and C4 are 2E by the on / off control by the switching patterns of the modes 1 to 7, the voltage between the output terminals A and B is 5 levels of 2E, E, 0, −E, and −2E. It is possible to output a voltage.

The relationship between the modes 1 to 7 and the voltage V _AB between the output terminals A and B is as shown in FIG.

  In addition, since the mode for charging the capacitor C1 (mode 2) and the mode for discharging (mode 3) can be selected when the voltage between A and B is E, the voltage of the capacitor C1 can be arbitrarily adjusted. .

  Similarly, the mode for charging the capacitor C2 (mode 5) and the mode for charging (mode 6) when the voltage between A and B is −E can be selected, so that the voltage of the capacitor C2 can be arbitrarily adjusted. It is.

  The charge / discharge polarity of the capacitors C1 and C2 varies depending on the polarity of the current I. Table 1 shows the case where the current I> 0.

Further, since the only mode in which the voltage V _AB between A and B is zero is the mode 4 in Table 1, the control can be simplified. For example, when there are many modes that output zero voltage, a switching pattern that outputs zero has to be selected from a plurality of modes, which causes a problem of complicated control.

Further, when the circuit of FIG. 1 is applied to a low voltage application, the withstand voltage is low (for example, a withstand voltage of 1/2 of the voltage of the DC power source V _DC ), two switching elements S5 and S6 (fifth switching element) and 2 Since the individual switching elements S7 and S8 (sixth switching element) can be used, the cost can be reduced.

  As described above, according to the first embodiment, a five-level power converter can be realized with only one DC power source, twelve switching elements, four capacitors, and four diodes.

  FIG. 3 shows a circuit configuration of the second embodiment. In the second embodiment, the switching elements S13 and S14 are removed from the circuit of the first embodiment (FIG. 1), and other portions are configured in the same manner as in FIG.

  The switching elements S1 to S8, S11, and S12 are on / off controlled by a control unit (control means) (not shown) according to a switching pattern for outputting a five-level voltage, and as a result, between the output terminals A and B. A five-level voltage is output.

  On / off of the switching elements S1 to S8, S11, and S12 is controlled according to a switching pattern having mode 1 to mode 7 shown in Table 2, for example.

Table 2 shows the voltage V _AB output between the output terminals A and B according to the on / off modes 1 to 7 of the switching elements S1 to S8, S11 and S12 (indicated as Modes 1 to 7 in Table 2). The presence / absence of charge / discharge of the capacitors C1 and C2 is shown.

When the voltage of the DC power source V _DC is 4E and the voltages of the capacitors C3 and C4 are 2E, the voltage between the output terminals A and B can output 5 levels of voltages of 2E, E, 0, -E, and -2E. .

Here, the path of the current I between each mode 1 to mode 7 of the switching pattern of Table 2 and the output terminals A and B will be described below. Table 2 shows the case where the current I> 0, and in the following description, the positive end of the DC power source V _DC in the capacitor C3 is P, and the negative end of the DC power source V _DC in the capacitor C4 Is expressed as N.

<Mode 1>
Switching elements S3, S4, S7, S8, S11, and S12 are turned off, switching elements S1, S2, S5, and S6 are turned on, and current I is output from terminal B → NP → C3 → P → S5 → S6 → S1. → S2 → Output terminal A The voltage between the output terminals A and B is 2E.

<Mode 2>
Switching elements S1, S4, S7, S8, S11, and S12 are turned off, switching elements S2, S3, S5, and S6 are turned on, and current I is output terminal B → NP → C3 → P → S5 → S6 → C1. → D1 → S2 → Output terminal A The voltage between the output terminals A and B is E. In this mode 2, the capacitor C1 is charged.

<Mode 3>
The switching elements S3 to S8 are turned off, the switching elements S1, S2, S11, and S12 are turned on, and the current I flows through the path of the output terminal B → NP → S12 → D4 → C1 → S1 → S2 → output terminal A. . The voltage between the output terminals A and B is E. In this mode 3, the capacitor C1 is discharged.

<Mode 4>
The switching elements S1, S4 to S8 are turned off, the switching elements S2, S3, S11, S12 are turned on, and the current I flows through the path of the output terminal B → NP → S12 → D4 → D1 → S2 → output terminal A. . The voltage between the output terminals A and B is zero.

<Mode 5>
Switching elements S1, S2, S5 to S8 are turned off, switching elements S3, S4, S11 and S12 are turned on, and current I is output terminal B → NP → S12 → D4 → C2 → S4 → S3 → output terminal A. It flows in the route. The voltage between the output terminals A and B is -E. In this mode 5, the capacitor C2 is charged.

<Mode 6>
Switching elements S1, S4, S5, S6, S11, and S12 are turned off, switching elements S2, S3, S7, and S8 are turned on, and current I is output terminal B → NP → C4 → N → S8 → S7 → C2. → D1 → S2 → Output terminal A The voltage between the output terminals A and B is -E. In this mode 6, the capacitor C2 is discharged.

<Mode 7>
Switching elements S1, S2, S5, S6, S11, and S12 are turned off, switching elements S3, S4, S7, and S8 are turned on, and current I is output terminal B → NP → C4 → N → S8 → S7 → S4. → S3 → Output terminal A The voltage between the output terminals A and B is −2E.

  When the voltages of the capacitors C3 and C4 are 2E by the on / off control by the switching patterns of the modes 1 to 7, the voltage between the output terminals A and B is 5 levels of 2E, E, 0, −E, and −2E. It is possible to output a voltage.

The relationship between the modes 1 to 7 and the voltage V _AB between the output terminals A and B is as shown in FIG.

  In addition, since the mode for charging the capacitor C1 (mode 2) and the mode for discharging (mode 3) can be selected when the voltage between A and B is E, the voltage of the capacitor C1 can be arbitrarily adjusted. .

  Similarly, the mode for charging the capacitor C2 (mode 5) and the mode for charging (mode 6) when the voltage between A and B is −E can be selected, so that the voltage of the capacitor C2 can be arbitrarily adjusted. It is.

  The charge / discharge polarity of the capacitors C1 and C2 varies depending on the polarity of the current I. Table 2 shows the case where the current I> 0.

Further, since the mode in which the voltage V _AB between A and B is zero is only mode 4 in Table 2, the control can be simplified. For example, when there are many modes that output zero voltage, a switching pattern that outputs zero has to be selected from a plurality of modes, which causes a problem of complicated control.

Further, when the circuit of FIG. 3 is applied to a low voltage application, the two switching elements S5 and S6 (fifth switching element) and 2 have a low breakdown voltage (for example, a 1/2 breakdown voltage of the voltage of the DC power supply V _DC ). Since the individual switching elements S7 and S8 (sixth switching element) can be used, the cost can be reduced.

  As described above, according to the second embodiment, a five-level power converter can be realized with only one DC power source, ten switching elements, four capacitors, and four diodes.

FIG. 4 shows a circuit configuration of the third embodiment. In the third embodiment, the switching elements S1 to S8 and S11 to S14, the diodes D1 to D4, and the capacitors C1 and C2 of the first embodiment (FIG. 1) constitute a five-level voltage converter 400, and the five-level voltage converter 400 is provided in three phases (400 U, 400 V, 400 W) and connected to the Y connection based on the neutral point of the capacitor divided into two with respect to the DC power supply V _DC .

  4, the same parts as those in FIG. 1 are denoted by the same reference numerals.

  The output terminals B of the three-phase five-phase voltage converters 400U, 400V, and 400W are commonly connected as a neutral point NP, and the output terminal A is used as the output terminals U, V, and W of the three-phase each phase.

In the configuration of FIG. 4, no separate DC power supply is required for each of the three phases, and only one DC power supply V _DC is required.

  Each operation of the five-level voltage converters 400U, 400V, and 400W in FIG. 4 is the same as the circuit in FIG.

  In the circuit of FIG. 4, an arbitrary five-level voltage (2E, E, 0-E, -2E) is output to the three phases U, V, W based on the neutral point NP of the capacitor divided by two. Can do.

  As described above, according to the third embodiment, a three-phase five-level power converter can be realized by one DC power source, 36 switching elements, 8 capacitors, and 12 diodes.

FIG. 5 shows a circuit configuration of the fourth embodiment. In the fourth embodiment, the switching elements S1 to S8, S11 and S12, the diodes D1 to D4 and the capacitors C1 and C2 of the second embodiment (FIG. 3) constitute a five-level voltage conversion unit 500, and the five-level voltage conversion unit 500 is provided in three phases (500 U, 500 V, 500 W) and connected to the Y connection with reference to the neutral point of the capacitor divided into two with respect to the DC power supply V _DC .

  In FIG. 5, the same parts as those in FIG. 3 are denoted by the same reference numerals.

  The output terminals B of the three-level five-phase voltage converters 500U, 500V, and 500W are commonly connected as a neutral point NP, and the output terminal A is used as the output terminals U, V, and W of the three-phase each phase.

In the configuration of FIG. 5, no separate DC power source is required for each of the three phases, and only one DC power source V _DC is required.

  Each operation of the five-level voltage converters 500U, 500V, and 500W in FIG. 5 is the same as the circuit in FIG.

  In the circuit of FIG. 5, an arbitrary five-level voltage (2E, E, 0-E, -2E) is output to the three phases U, V, W based on the neutral point NP of the capacitor divided by two. Can do.

  As described above, according to the fourth embodiment, a three-phase five-level power converter can be realized by one DC power source, thirty switching elements, eight capacitors, and twelve diodes.

  The switching elements S5 and S6 constituting the fifth switching element are constituted by one bidirectional switch having a higher withstand voltage than the elements S5 and S6, and the switching elements S7 and S7 constituting the sixth switching element. S8 may be composed of one bidirectional switch having a higher breakdown voltage than the elements S7 and S8.

  When configured in this manner, a five-level power converter with a small number of elements can be realized at the time of high-voltage output.

  Here, an example of a control unit (control means) for controlling the switching elements S1 to S8, S11, and S12 in the fourth embodiment (FIG. 5) in which the present invention is applied to a three-phase circuit will be described with reference to FIG. FIG. 6 shows a control block diagram of a switching pattern generation circuit 300 for switching the five-level voltage as an example of the control unit.

In FIG. 6, the five-level voltage switching switching pattern generation circuit 300 includes three-phase voltage command values V _U ^* , V _V ^* , V _W ^* and five-level voltage conversion units 500U, 500V, 500W. The detection voltage values VC _U1 , VC _V1 and VC _W1 of the capacitor C1 and the detection voltage values VC _U2 , VC _V2 and VC _{W2 of} each capacitor C2 are input.

The detected voltage values VC _U1 , VC _V1 , VC _W1 , VC _U2 , VC _V2 , VC _W2 are _deviated from V _DC / 2, and these deviations and voltage command values V _U ^* , V _V ^* , V _W ^* are taken ^. Thus, a switching pattern for outputting a voltage of 5 levels is selected from Table 2, for example, and gate commands for the switching elements S1 to S8, S11, and S12 are output.

  Further, the control unit (control means) for controlling the switching elements S1 to S8 and S11 to S14 in the third embodiment (FIG. 4) is configured in the same manner as in FIG. 6, and in the switching pattern generation circuit 300 in FIG. The gate command of S13 and S14 is further output.

300 ... 5 level voltage switching switching pattern generation circuit 400U, 400V, 400W, 500U, 500V, 500W ... 5 level voltage converter S1 to S14 ... switching element V _DC ... DC power supply C1 to C4 ... capacitor D1 to D4 ... diode A , B ... Output terminals

Claims (4)

A multi-level power converter that generates an AC output obtained by converting a voltage of a DC power source into a plurality of voltage levels,
DC power supply,
A switching element series circuit in which the first to fourth switching elements are connected in series;
A first capacitor and a second capacitor sequentially connected in series between a first switching element side end and a fourth switching element side end of the switching element series circuit;
First and second diodes sequentially connected in series between a common connection point of the first switching element and the second switching element and a common connection point of the third switching element and the fourth switching element ,
Third and fourth capacitors sequentially connected in series between the positive and negative ends of the DC power supply;
A fifth switching element connected between a positive electrode of the DC power source and a common connection point of the first capacitor and the first switching element;
A sixth switching element connected between a negative electrode of the DC power supply and a common connection point of the second capacitor and the fourth switching element;
A diode series circuit in which a third diode and a fourth diode are connected in series;
Seventh and eighth switching elements connected in series between both ends of the diode series circuit;
Control means for outputting a plurality of voltage levels by on / off control of the first to eighth switching elements,
Connecting a common connection point of the first and second diodes, a common connection point of the first and second capacitors, and a common connection point of the third and fourth diodes;
Connecting a common connection point of the seventh and eighth switching elements to a common connection point of the third and fourth capacitors;
The first common connection point of the second switching element and the third switching element and the second common connection point of the third capacitor and the fourth capacitor are AC output terminals having a plurality of voltage levels. Multi-level power converter characterized by The first to eighth switching elements, the first and second capacitors, and the first to fourth diodes constitute a multi-level voltage conversion unit, and the multi-level voltage conversion unit is provided for each phase of three-phase AC. And providing a common connection between the two common connection points of the three-phase multi-phase voltage conversion units as neutral points, and outputting the first common connection point as a U-phase, V-phase, and W-phase output. The multilevel power converter according to claim 1, wherein the multilevel power converter is an end. 3. The multilevel power according to claim 1, wherein the on / off control of the control means has a control mode for charging the capacitor and a control mode for discharging the capacitor when outputting at the same voltage level. converter. The multilevel power converter according to any one of claims 1 to 3, wherein the on / off control of the control means has a single control mode for outputting a zero level voltage. .

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