JP2012156177A - Charge detection device, charge transfer device, solid-state imaging device, imaging device, and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technology capable of suppressing a phenomenon that surplus charge overflows to a charge input part provided to a charge-to-electric signal conversion part with a simple structure.SOLUTION: A horizontal transfer path 210 (a charge transfer part) has a final stage horizontal transfer register 214 (a charge output part) outputting electric charges in a charge transfer direction. A charge-to-electric signal conversion part 16 has an FD part 250 (a charge input part) receiving the electric charges inputted from the final stage horizontal transfer register 214. Preferably, a small signal barrier 220 is provided on the horizontal transfer path 210, and an outlet 222 thereof is opposed to the charge input part. Preferably, a surplus charge discharging part 270 configured by a horizontal overflow barrier 272 and a horizontal overflow drain 276 is arranged adjacently to the horizontal transfer path 210. The charge input part is arranged at a position that is shifted from the center part of the final stage horizontal transfer register 214 in a second direction (a width direction) intersecting with the charge transfer direction (preferably, on the surplus charge discharging part 270 side).

Description

  The present invention relates to a charge detection device, a charge transfer device, a solid-state imaging device, an imaging device, and an electronic apparatus.

  A charge detection device, a charge transfer device, a solid-state imaging device, or an imaging device is used in various electronic devices. For example, it is generated based on changes in electromagnetic waves, pressure, and other various physical properties such as sensitivity to electromagnetic waves input from outside such as light and radiation, or detection of electric charges generated based on pressure changes. Unit component elements (for example, unit pixels) having a charge detection function for detecting charges are arranged in a linear or matrix form, and a physical quantity distribution (for example, pressure distribution) converted into an electric signal by the unit component is electrically converted. 2. Description of the Related Art Physical quantity distribution detection semiconductor devices that read out as signals or solid-state imaging devices that handle image information as physical quantity distributions are used in various fields. For example, in the field of video equipment, a CCD (Charge Coupled Device) type, a MOS (Metal Oxide Semiconductor) type, or a CMOS (Complementary Metal-oxide Semiconductor) type solid state imaging device that detects light in a physical quantity is used. These read out, as an electrical signal, a physical quantity distribution converted into an electrical signal by a unit component (a pixel in a solid-state imaging device).

  In order to convert the charge into an electric signal, for example, the charge detected by the charge detection unit having a photoelectric conversion function is input (passed) to the charge input unit of the charge / electric signal conversion unit. The charge / electrical signal conversion unit acquires an electric signal based on a change in the amount of charge input to the charge input unit. For example, in a CCD type solid-state imaging device, charges detected by a charge detection unit are transferred to a charge input unit provided in a charge / electrical signal conversion unit via a vertical transfer unit and a horizontal transfer unit, and the charge input unit The change in the amount of charge is detected by a transistor, and this is converted into an electric signal and amplified to be output as an image pickup signal (see Japanese Patent Laid-Open No. 62-154881).

JP-A-62-154881

  Here, for example, in the case of a large signal when a large amount of light is incident, the amount of charge that can be transferred through the transfer path is exceeded, and the influence of the excess charge (surplus charge) may appear in the image. As a countermeasure, in Japanese Patent Laid-Open No. 62-154881, an overflow barrier (also referred to as an overflow gate) and an overflow drain are provided adjacent to the transfer path.

  In this technical field, there is a need for a new technology capable of suppressing the phenomenon that excess charge overflows the charge input unit provided in the charge / electrical signal conversion unit beyond the amount of charge that can be handled by the charge output unit. ing.

  The present disclosure provides a new technique capable of suppressing a phenomenon in which excess charge overflows in a charge input unit provided in a charge / electrical signal conversion unit beyond the amount of charge that can be handled by a charge output unit. With the goal.

  The solid-state imaging device according to the first aspect includes an element unit in which a charge detection unit for detecting a charge generated based on a change in physical characteristics is arranged in a fixed direction, and a transfer register arranged in correspondence with the charge detection unit And a charge transfer unit that transfers the charge using the transfer register, and a charge / electric signal conversion unit that generates an electric signal corresponding to the amount of the charge transferred by the charge transfer unit. The charge transfer unit includes a charge output unit that outputs charges in a first direction that is a charge transfer direction. The charge / electrical signal conversion unit includes a charge input unit that receives the charge input from the charge output unit. The charge input part is arranged at a position shifted from the center part of the charge output part in the second direction intersecting the first direction.

  The solid-state imaging device according to the second aspect includes an element unit provided with a charge detection unit that detects a charge generated based on a change in physical characteristics, and a charge input unit that receives the charge input from the charge detection unit. And a charge / electrical signal conversion unit that generates an electric signal corresponding to the amount of the received charge. The element unit includes a charge output unit that outputs the charge detected by the charge detection unit in a first direction that is a charge transfer direction. The charge / electrical signal conversion unit includes a charge input unit that receives the charge input from the charge output unit. The charge input unit is disposed at a position shifted from the center of the charge detection unit in the second direction intersecting the first direction in which charge is input from the charge detection unit to the charge input unit.

  Each solid-state imaging device described in the dependent claims of the solid-state imaging device according to the first or second aspect defines a further advantageous specific example of the solid-state imaging device according to the first or second aspect.

  A charge detection device according to a third aspect receives a charge output unit that outputs a charge detected by a charge detection unit that detects a charge generated based on a change in physical characteristics, and a charge input from the charge output unit. A charge / electrical signal conversion unit that has an electric charge input unit and generates an electric signal corresponding to the amount of electric charge received. The charge input part is disposed at a position shifted from the center part of the charge output part in the second direction intersecting the first direction in which charge is input from the charge output part to the charge input part. In the charge detection device according to the third aspect, each technique and method described in the dependent claims of the solid-state imaging device according to the first or second aspect can be applied in the same manner, A further advantageous specific example of the charge detection device according to the third aspect will be defined.

  In the charge transfer device according to the fourth aspect, a plurality of transfer registers are arranged, a charge transfer unit that transfers charges by the transfer register, and a charge that generates an electric signal corresponding to the amount of charges transferred by the charge transfer unit -An electric signal conversion part is provided. The charge transfer unit includes a charge output unit that outputs charges in a first direction that is a charge transfer direction. The charge / electrical signal conversion unit includes a charge input unit that receives the charge input from the charge output unit. The charge input part is arranged at a position shifted from the center part of the charge output part in the second direction intersecting the first direction. In the charge transfer device according to the fourth aspect, each technique and method described in the dependent claims of the solid-state imaging device according to the first or second aspect can be applied in the same manner, A further advantageous specific example of the charge transfer device according to the fourth aspect is defined.

  An image pickup apparatus according to a fifth aspect includes an element unit in which a charge detection unit for detecting a charge generated based on a change in physical characteristics is arranged in a certain direction, and a transfer register arranged in correspondence with the charge detection unit A charge transfer unit that transfers charges by a transfer register, a charge / electric signal conversion unit that generates an electrical signal corresponding to the amount of charge transferred by the charge transfer unit, and an incident system that guides electromagnetic waves to the charge detection unit, Is provided. The charge transfer unit includes a charge output unit that outputs charges in a first direction that is a charge transfer direction, and the charge / electrical signal conversion unit includes a charge input unit that receives charges input from the charge output unit. And the charge input portion is disposed at a position shifted from the central portion of the charge output portion in the second direction intersecting the first direction. The imaging device according to the fifth aspect can similarly apply each technique and method described in the dependent claims of the solid-state imaging device according to the first or second aspect, and the configuration to which the technique / method is applied is Further advantageous specific examples of the imaging apparatus according to the fifth aspect are defined.

  In the electronic device according to the sixth aspect, an element unit in which a charge detection unit for detecting a charge generated based on a change in physical characteristics is arranged in a fixed direction, and a transfer register is arranged corresponding to the charge detection unit, The solid-state imaging device includes: a charge transfer unit that transfers charges using a transfer register; and a charge / electric signal conversion unit that generates an electric signal corresponding to the amount of charge transferred by the charge transfer unit. The charge transfer unit includes a charge output unit that outputs charges in a first direction that is a charge transfer direction. The charge / electrical signal conversion unit includes a charge input unit that receives the charge input from the charge output unit. The charge input part is arranged at a position shifted from the center part of the charge output part in the second direction intersecting the first direction. In the electronic device according to the sixth aspect, the respective technologies and techniques described in the dependent claims of the solid-state imaging device according to the first or second aspect can be similarly applied, and the configuration to which the technique / method is applied is Further advantageous specific examples of the electronic device according to the sixth aspect are defined.

  In short, the solid-state imaging device according to the first aspect, the solid-state imaging device according to the second aspect, the charge detection device according to the third aspect, the charge transfer device according to the fourth aspect, and the imaging apparatus according to the fifth aspect. In any of the electronic devices according to the sixth aspect, the charge input unit is arranged at a position shifted from the center of the charge output unit. Compared with the case where the charge input part is arranged at the center of the charge output part, the surplus charge tends to overflow to the outside, so that the phenomenon that the surplus charge overflows to the charge input part is alleviated.

  A solid-state imaging device according to the first aspect, a solid-state imaging device according to the second aspect, a charge detection device according to the third aspect, a charge transfer device according to the fourth aspect, an imaging apparatus according to the fifth aspect, and According to the electronic device of the sixth aspect, the phenomenon of surplus charge overflowing in the charge input portion is suppressed with a simple structure in which the charge input portion is arranged at a position shifted from the central portion of the charge output portion. Can do. Since leakage of surplus charges into the charge input portion can be suppressed, various high-performance devices and devices (for example, high-quality solid-state imaging devices and electronic devices that handle captured images) can be provided.

FIG. 1 is a schematic configuration diagram illustrating an embodiment of an imaging apparatus. FIG. 2 is a schematic configuration diagram of the solid-state imaging device. FIGS. 3A to 3B ((B1) to (B4)) are diagrams illustrating a connection structure of a comparative example with respect to the first embodiment. 4A ((A1) to (A2)) to FIG. 4B ((B1) to (B2)) are diagrams illustrating the connection structure of the first embodiment. FIG. 5A to FIG. 5A are diagrams for explaining a method for setting the arrangement position of the charge input portion. 6A ((A1) to (A2)) to FIG. 6B ((B1) to (B2)) are diagrams illustrating a connection structure according to the second embodiment. FIG. 7A ((A1) to (A2)) to FIG. 7B ((B1) to (B2)) are diagrams illustrating the connection structure of the third embodiment. FIG. 8A to FIG. 8C are diagrams illustrating the connection structure of the fourth embodiment. FIG. 9 is a diagram illustrating a first modification. FIG. 10 is a diagram illustrating a second modification. FIG. 11A to FIG. 11B are diagrams showing a third modification. FIG. 12 is a diagram illustrating a fourth modification. 13A to 13E are diagrams illustrating an example of an electronic device to which the technique proposed in the present disclosure is applied.

  Hereinafter, embodiments of the technology disclosed in this specification will be described in detail with reference to the drawings. When distinguishing each functional element by form, add an alphabetic reference such as A, B, C,..., And omit this reference when explaining without distinction. Describe. The same applies to the drawings.

The description will be made in the following order.
1. Overall overview 2. Overall configuration of imaging apparatus CCD type solid-state imaging device and peripheral outline (area sensor)
4). Connection Structure with Charge Input Unit Example 1: Arranged on the overflow drain side opposite to the imaging area Example 2: Arranged on the overflow drain side on the imaging area side Example 3: Example 1 + Example 2
Example 4: Remove the small signal barrier from Example 3. Modified Example First Modified Example: CCD-type Solid-State Imaging Device & Linear Sensor Second Modified Example: Application to the Configuration of the Charge Detection Device alone Third Modified Example: Application to the configuration of the charge transfer device alone Fourth Modification: CMOS Application of a Solid-state Imaging Device of a Type to an Application Example of Other Electronic Equipment

<Overview>
[Solid-state imaging device, charge detection device, charge transfer device, imaging device, electronic apparatus]
First, basic items will be described below. A solid-state imaging device according to the first and second aspects, a charge detection device according to the third aspect, a charge transfer device according to the fourth aspect, an imaging apparatus according to the fifth aspect, and a sixth aspect In the configuration of the present embodiment corresponding to the electronic device, the charge input unit is arranged at a position shifted from the center of the charge output unit. With such a simple structure, it is possible to suppress a phenomenon in which excess charges overflow in the charge input portion. Incidentally, the charge / electrical signal conversion unit includes, in addition to the charge input unit, an amplifier circuit having a charge / electrical signal conversion function, which is configured by, for example, a transistor. The charge input unit is typically a floating diffusion, a floating gate, or the like, but is not limited thereto.

  In the first solid-state imaging device according to the configuration of the present embodiment, a transfer register is arranged corresponding to the charge detection unit, and includes a charge transfer unit that transfers charges by the transfer register, and is transferred by the charge transfer unit. A charge / electrical signal conversion unit that generates an electric signal corresponding to the amount of electric charge is also provided. The charge output unit is provided so as to output charges in a first direction which is a charge transfer direction in the charge transfer unit. The charge transfer unit is typically a CCD type, for example, but is not limited to this, and may be of any structure that sequentially transfers charges. Etc.

  In the configuration including such a charge transfer unit, it is preferable that the charge transfer unit is provided with a barrier that plays a role of collecting charges at the time of small signal transfer. It may be arranged at a position facing the charge input portion. In this configuration, the charge / electrical signal conversion efficiency is particularly good when the signal is small.

  The first solid-state imaging device according to the configuration of the present embodiment may be a so-called linear sensor including an element unit in which charge detection units are arranged in series. “Serial” means that the entire shape is long. For example, the charge detection units are typically arranged in a straight line in one example. Alternatively, the charge detection units may be provided in a straight line over a plurality of columns such as three columns, or the charge detection units may be arranged in a staggered manner regardless of the number of columns.

  The first solid-state imaging device according to the configuration of the present embodiment may be a so-called area sensor including an element unit in which charge detection units are arranged in a matrix. “Matrix” means that the charge detectors are arranged two-dimensionally as a whole. For example, a form in which the charge detectors are arranged in one column in the vertical direction and the horizontal direction is a typical example. Not limited to this, an oblique lattice shape, a honeycomb shape, or the like may be used. In these cases, the charge transfer unit is provided for each vertical column of the charge detection unit, the vertical transfer unit transfers the charge output from the charge detection unit in the vertical direction, and the charge is transferred from the vertical transfer unit. A horizontal transfer unit for transferring the generated charges in the horizontal direction. The charge / electric signal converter generates an electric signal corresponding to the amount of charge transferred by the horizontal transfer unit. That is, it is the same as the area sensor in the second solid-state imaging device described later in that it is an area sensor. It is different.

  For example, a CCD type area sensor is representative, but the present invention is not limited to this. Incidentally, since the CCD transfer unit has a function to detect electromagnetic waves, when it is used as a signal transfer path, if a signal is transferred by an element that is exposed to electromagnetic waves, a so-called smear phenomenon is caused. The noise called is generated. In order to avoid this, for example, IT-CCD (Interline Transfer CCD), FIT-CCD (Frame Interline Transfer CCD), FT-CCD (FrameTransfer CCD), and FFT-CCD using a digital shutter with a mechanical shutter. (Full Frame Transfer CCD) and the like, but the first solid-state imaging device in the configuration of the present embodiment is applied to any of these.

  In the second solid-state imaging device in the configuration of the present embodiment, the arrangement form of the charge detection units in the element unit may be either serial or matrix. “Serial” and “matrix” are the same as those in the first solid-state imaging device. The charge / electrical signal conversion unit is configured such that the charge input unit individually receives charges from the charge output unit corresponding to each charge detection unit. Alternatively, a so-called pixel sharing structure may be employed in which the charge input unit is configured to receive charges from the charge output unit corresponding to each charge detection unit in a time-sharing manner. Regardless of the charge / electric signal converter, the charge / electric signal converter generates an electric signal corresponding to the amount of charge received by each charge input unit.

  If the charge detection units are arranged in series, a so-called linear sensor is obtained, and if the charge detection units are arranged in a matrix, a so-called area sensor is obtained. However, unlike the first solid-state imaging device, the vertical transfer unit and the horizontal transfer unit are not provided, and there is a charge input unit that receives the charge input from the charge detection unit, and an electric power corresponding to the amount of the received charge. A charge / electrical signal converter for generating a signal is provided. That is, in the relationship between the second solid-state imaging device and the linear sensor or area sensor in the first solid-state imaging device described above, a charge output unit and a charge / electrical signal conversion unit (also a charge input unit) are provided in the element unit. It is different in point.

  For example, in recent years, an amplification type solid-state imaging device, such as a CMOS image sensor, which is more advantageous than a CCD image sensor in terms of reducing power consumption and system size, has been widely used. In such an amplification-type solid-state imaging device, in order to read out a pixel signal to the outside, address control is performed on a pixel unit in which a plurality of unit pixels are arranged, and signals from individual unit pixels are determined to addresses. Read in the order of or arbitrarily. That is, the amplification type solid-state imaging device is an example of an address control type solid-state imaging device. Alternatively, in the form in which the unit pixels are arranged in a matrix, the pixels are configured using active elements (MOS transistors) such as a MOS structure so that the pixels themselves have an amplification function. For example, signal charges (photoelectrons and holes) accumulated in a photodiode that is a photoelectric conversion element are amplified by an active element and read out as image information. In this type of address control type solid-state imaging device, for example, a pixel unit is configured by arranging a large number of pixel transistors in a two-dimensional matrix, and signal charges corresponding to incident light are accumulated for each line (row) or for each pixel. Is started, and a current or voltage signal based on the accumulated signal charge is sequentially read out from each pixel by addressing. Here, in the MOS (including CMOS) type, as an example of address control, a system (so-called column readout system) in which one row is simultaneously accessed and a pixel signal is read from the pixel unit in units of rows is often used. . The second solid-state imaging device in the configuration of the present embodiment is applied to such an amplification type or address control type solid-state imaging device.

  In the configuration of the present embodiment, it is preferable that a surplus charge sweeping unit that can sweep out unnecessary charges in the charge output unit in the second direction is further provided (provided). It is preferable to provide a so-called lateral overflow drain structure. In this case, the charge input unit may be arranged at a position shifted to the surplus charge sweeping unit side from the central part of the charge output unit in the second direction. If the charge input unit is arranged at a position deviated from the central part of the charge output unit without actively providing the surplus charge sweeping unit, a sufficient amount of unnecessary charge is not swept away in the second direction. Although it is difficult to obtain a sufficient effect, it is easy to suppress leakage of unnecessary charges to the charge input portion by providing a surplus charge sweeping portion and arranging the charge input portion in the vicinity thereof. Incidentally, the potential of the first barrier (barrier, gate part) provided between the charge output part and the charge input part and the first part provided between the charge output part and the surplus charge sweeping part (especially the overflow drain). It is preferable to make a difference from the potential of the two barriers and make the second barrier lower than the first barrier.

  When the charge detection unit is provided over a plurality of columns, when a surplus charge sweeping unit is provided, a surplus charge sweeping unit may be provided for each column, or one column of surplus charge sweeping unit may be disposed. The part may be configured to be shared by a plurality of columns. For example, when the charge detection units are arranged over two columns, the surplus charge sweeping unit may be arranged so as to form a column between the two columns.

  In the configuration of the present embodiment, the surplus charge sweeping section may be disposed on the opposite side of the charge output section from the element section. Alternatively, the charge output unit may be disposed on the opposite side to the element unit. Specifically, when the transfer register is disposed up to the excess region exceeding the element portion, the surplus charge sweeping portion may be disposed on the element portion side in the excess region. By using both of these, a surplus charge sweeping unit may be disposed on the side opposite to the element unit and on the element unit side. It may be arranged only on one side, or may be arranged on both surplus charge sweeping unit sides, that is, the charge input units may be arranged at a plurality of locations. In this case, an amplifier circuit may be provided for each charge input unit, or one amplifier circuit may be shared by a plurality of charge input units. Incidentally, the configuration described here is defined by the relationship with the element portion, and is applicable only to the first solid-state imaging device.

  The solid-state imaging device is roughly divided into a surface incident type (also referred to as a surface irradiation type) that takes incident light from the surface side and a side on which the wiring layer is arranged, when the side on which the wiring layer is arranged is the front side. It is broadly classified into a back-side incident type (also referred to as a back-side illumination type) that captures incident light from the opposite back side. In the configuration of the present embodiment, it is preferable that a back-illuminated structure be used. This configuration has a great advantage when combined with a configuration including a surplus charge sweeper.

  In the configuration of the present embodiment, when the width in the second direction of the charge output portion is 2 · W and the distance from the central portion of the charge output portion to the charge input portion in the second direction is P, the distance P Is longer than W / 5 (P> W / 5), preferably the distance P is longer than W / 2 (P> W / 2), more preferably the distance P is 3 · W / 4. Is also good (P> 3 · W / 4). Alternatively, the distance in the first direction from the charge output unit to the charge input unit and the distance in the second direction from the position where the charge input unit is projected onto the charge output unit to the surplus charge sweeping unit are approximately the same. It is good to set (generally equal). It is “similarly (substantially equal)”, does not need to be exactly equal, and may have a slight distance difference within the range of common sense.

  The solid-state imaging device includes a charge detection unit (typically a photoelectric conversion unit) that is sensitive to electromagnetic waves, and can be applied to an image capture unit that captures an image using the charge detection unit, It is mounted and used in general imaging devices and electronic devices that use the solid-state imaging device. For example, it is used in an imaging device (camera system) such as a digital still camera or a video camera. As an electronic device, a mobile terminal device having an imaging function such as a mobile phone, a solid-state imaging device or an imaging device is used as an image reading unit. Examples thereof include a copying machine to be used. As described above, the solid-state imaging device and the imaging device include a linear sensor and an area sensor. That is, the solid-state imaging device is a physical quantity distribution detection semiconductor device in which a plurality of unit components (for example, pixels) that are sensitive to electromagnetic waves input from the outside such as light and radiation are arranged in a line or matrix form. The imaging apparatus can also be regarded as an aspect of a physical information acquisition apparatus (physical quantity distribution detection apparatus) using a physical quantity distribution detection semiconductor device.

  The configuration of this embodiment is not limited to a solid-state imaging device including a charge detection unit that is sensitive to electromagnetic waves input from the outside such as light and radiation, but detects changes in various physical quantities as changes in charge amount. Applicable to everything you do. For example, information relating to fingerprints can be applied to other devices that detect physical changes, such as fingerprint authentication devices that detect fingerprint images based on changes in electrical characteristics or changes in optical characteristics based on pressure. For example, the technology of the present disclosure can be applied to a detection unit in a touch panel. Alternatively, in the field of computer equipment, fingerprint authentication devices that detect fingerprint images based on changes in electrical characteristics or changes in optical characteristics based on pressure are used for information related to fingerprints. A physical quantity distribution converted into an electric signal by an element (a pixel in a solid-state imaging device) is read out as an electric signal, and the technique of the present disclosure can be applied. A camera module mounted on an electronic device may be referred to as an imaging device. The configuration described below is representatively described with a solid-state imaging device and an imaging device equipped with the solid-state imaging device, but is not limited thereto, and is applicable to various electronic devices having an imaging function. As will be understood from this, the physical quantity distribution detection semiconductor device or the physical information acquisition having the same functional unit as the charge detection device, the charge transfer device, or the solid-state imaging device is not limited to the technology described in the claims. An apparatus can also be extracted as a technique proposed by the present disclosure. Incidentally, in this specification, unless otherwise specified (for example, the points described in this section), the physical quantity distribution detecting semiconductor device is described as a representative solid-state imaging device (in other words, the physical quantity distribution detecting semiconductor device is The physical information acquisition device is representatively described as an imaging device (in other words, the physical information acquisition device includes the imaging device).

<Overall configuration of imaging device>
FIG. 1 is a schematic configuration diagram illustrating an embodiment of an imaging apparatus 1 applied as a digital still camera or the like. The imaging device 1 is applied as a camera that can capture a color image during a still image capturing operation. The imaging device 1 includes an imaging device module 3 having a solid-state imaging device 10, an imaging lens 50, and a drive control unit 96, and a main body unit 4. The drive control unit 96 is an example of a drive device that drives and controls the solid-state imaging device 10. The main unit 4 has a functional part that generates a video signal based on an imaging signal obtained by the imaging device module 3 and outputs the video signal to a monitor or stores an image in a predetermined storage medium.

  As the solid-state imaging device 10, for example, a CCD type, MOS (Metal Oxide Semiconductor) or CMOS (Complementary Metal-oxide Semiconductor) type solid-state imaging device is used, but is not limited thereto. Hereinafter, the CCD type will be described.

  The drive controller 96 includes a timing signal generator 40 (TG), a driver 42 including a vertical driver 42V (VDr) and a horizontal driver 42H (HDr), and a drive power supply 46. The timing signal generation unit 40 generates various pulse signals for driving the solid-state imaging device 10. The driver 42 receives the pulse signal from the timing signal generation unit 40 and converts it into a drive pulse for driving the solid-state imaging device 10. The drive power supply 46 supplies power to the solid-state imaging device 10, the driver 42, and the like.

  In this example, the solid-state imaging device 2 is configured by the solid-state imaging device 10 and the drive control unit 96 in the imaging device module 3. Only the solid-state imaging device 10 may be handled as the solid-state imaging device 2. The solid-state imaging device 2 is preferably provided as the solid-state imaging device 10 and the drive control unit 96 arranged on a single circuit board.

  The processing system of the imaging apparatus 1 is roughly divided into an optical system 5, a signal processing system 6, a recording system 7, a display system 8, and a control system 9. Although not shown, there is also provided a power supply system that appropriately supplies various power supplies serving as operation power supplies to the supply targets of these systems. The imaging device module 3 and the main unit 4 are accommodated in an exterior case (not shown), and an actual product (finished product) is finished.

  The optical system 5 includes a solid-state imaging device 10 and an imaging lens 50. The imaging lens 50 is an example of an incident system that guides electromagnetic waves (light in this example) to the charge detection unit (in this example, the sensor unit of the solid-state imaging device 10). And an aperture 56 for adjusting the light quantity of the optical image. The optical system 5 takes in incident light (image light) from a subject and forms an image on the imaging surface of the solid-state imaging device 10. The solid-state imaging device 10 photoelectrically converts the optical image collected by the lens 54 into an electrical signal. The mechanical shutter 52 is a mechanical shutter having a function of stopping charge accumulation in the sensor unit (charge generation unit) of the solid-state imaging device 10. Light L from the subject Z passes through the shutter 52 and the lens 54, is adjusted by the diaphragm 56, and enters the solid-state imaging device 10 with appropriate brightness. At this time, the lens 54 adjusts the focal position so that an image composed of the light L from the subject Z is formed on the solid-state imaging device 10.

  The signal processing system 6 includes a buffer unit 60 (CCD BUFF), an analog front end 61 (AFE) including a preamplifier unit 62 and an AD conversion unit 64 (Analog / Digital Converter), and an image processing unit 66.

  The buffer unit 60 is a part having a delivery function for supplying the CCD output signal output from the solid-state imaging device 10 to the analog front end 61 without deterioration, and is an integrated circuit different from the solid-state imaging device 10. (IC). The preamplifier unit 62 includes, for example, a CDS (Correlated Double Sampling) circuit that reduces noise by sampling an imaging signal from the solid-state imaging device 10, an amplification amplifier that amplifies the imaging signal, and an imaging signal. A clamp circuit for clamping (CLAMP) is included. The AD conversion unit 64 converts the analog signal output from the preamplifier unit 62 into a digital signal.

  The image processing unit 66 performs predetermined image processing on the digital signal input from the AD conversion unit 64. The image processing unit 66 includes, for example, a signal separation unit, a color signal processing unit (C-proc), a luminance signal processing unit (Y-proc), and the like. The signal separation unit converts the digital image pickup signal supplied from the AD conversion unit 64 when a color filter other than the primary color filter is used as an R (red) signal, a G (green) signal, and a B (blue) signal ( And a primary color separation function that separates the primary color signals RGB).

  The color signal processing unit performs signal processing on the color signal C based on the fresh primary color signal RGB separated by the signal separation unit. For example, white balance correction, gamma correction, color difference matrix processing, and the like are performed. The luminance signal processing unit performs signal processing on the luminance signal Y based on the primary color signals RGB separated by the signal separation unit. For example, high frequency luminance signal generation processing, low frequency luminance signal generation processing, luminance signal generation processing, and the like are performed. In the high-frequency luminance signal generation process, a luminance signal YH including even a component having a relatively high frequency is generated based on the primary color signal RGB supplied from the signal separation unit. In the low-frequency luminance signal generation process, a luminance signal YL including only a component having a relatively low frequency is generated based on the primary color signal RGB whose white balance has been adjusted. In the luminance signal generation process, the luminance signal Y is generated based on the two types of luminance signals YH and luminance signals YL. The luminance signal YL is also used for exposure control.

  The recording system 7 includes a memory 72 and a CODEC 74 (CODEC: an abbreviation for Code / Decode or Compression / Decompression), and records a moving image or a still image captured by the solid-state imaging device 10 in the memory 72. The memory 72 is composed of a recording medium such as a flash memory that stores image signals. Instead of the memory 72, a recording medium such as a video tape or a DVD (Digital Versatile Disc) may be used. The CODEC 74 encodes the image signal processed by the image processing unit 66, records it in the memory 72, reads it, decodes it, and supplies it to the image processing unit 66.

  The display system 8 includes a DA converter 82, a video encoder 84, and a video monitor 86. As an example, the image processing unit 66 and the DA conversion unit 82 are collectively configured by a DSP (Digital Signal Processor). The DA converter 82 converts the image data (Y data and C data) processed by the image processor 66 into analog signals. The video encoder 84 encodes the image signal analogized by the DA converter 82 into a video signal in a format suitable for the video monitor 86 in the subsequent stage. For example, the color difference signal RY and the color difference signal BY corresponding to the color signal subcarrier are combined with the luminance signal Y and converted into a video signal V (= Y + S + C: S is a synchronization signal, and C is a chroma signal). At this time, a signal synchronization process or the like may be performed using a CCD delay line (CCD-DL), which is an example of a charge transfer device, as a signal delay element, if necessary.

  The video monitor 86 has a panel type display device such as a liquid crystal display (LCD) or an organic EL (Electro Luminescence) display device, and is imaged by the solid-state imaging device 10 corresponding to the input video signal V. Displayed moving images or still images.

  The control system 9 includes a camera control unit 92, an exposure controller 94 (exposure control unit), a drive control unit 96, and an operation unit 98. The camera control unit 92 can be read / written at any time by a central control unit 92a configured by a CPU (Central Processing Unit) or a microprocessor and a ROM (Read Only Memory) which is a read-only storage unit. The storage unit 92b includes a RAM (Random Access Memory) that is a memory, and other peripheral members that are not illustrated. The central control unit 92a is similar to the central control unit 92a that is the center of an electronic computer whose representative example is a CPU that integrates the computation and control functions performed by a computer into an ultra-small integrated circuit.

  The camera control unit 92 controls the entire system. For example, the camera control unit 92 controls the image processing unit 66, the CODEC 74, the memory 72, the exposure controller 94, and the timing signal generation unit 40 connected to the bus 99 of the imaging apparatus 1. . The ROM stores a control program for the camera control unit 92 and the like. The RAM stores data for the camera control unit 92 to perform various processes. The camera control unit 92 may be configured to be able to insert and remove a recording medium such as a memory card, or to be connected to a communication network such as the Internet. For this purpose, although not illustrated, for example, the camera control unit 92 includes a memory reading unit and a communication I / F (interface) in addition to the central control unit 92a and the storage unit 92b.

  The exposure controller 94 controls the shutter 52 and the diaphragm 56 so that the brightness of the image sent to the image processing unit 66 is maintained at an appropriate level. The drive control unit 96 includes a timing signal generation unit 40 (timing generator; TG) that controls the operation timing of each functional unit from the solid-state imaging device 10 to the image processing unit 66, a driver 42, and a drive power supply 46. The analog front end 61, the timing signal generation unit 40, and the driver 42 are collectively referred to as a CCD camera front end.

  The operation unit 98 is a user interface for the user to input shutter timing and other commands, and issues operation commands for various functions of the imaging apparatus 1 under the operation of the user. The video monitor 86 also serves as a finder for the imaging apparatus 1. When the user presses the shutter button included in the operation unit 98, the camera control unit 92 captures the image signal immediately after the shutter button is pressed into the timing signal generation unit 40, and thereafter the image processing unit 66 is illustrated. The signal processing system 6 is controlled so that the image signal is not overwritten in the image memory that is not to be overwritten. Thereafter, the image data written in the image memory of the image processing unit 66 is encoded by the CODEC 74 and recorded in the memory 72. By the operation of the imaging apparatus 1 as described above, the acquisition of one piece of image data is completed.

  The imaging apparatus 1 includes automatic control devices such as auto focus (AF), auto white balance (AWB), and automatic exposure (AE). These controls are processed using an output signal obtained from the solid-state imaging device 10. For example, the exposure controller 94 has its control value set by the camera control unit 92 so that the brightness of the image sent to the image processing unit 66 is kept at an appropriate level, and controls the diaphragm 56 according to the control value. For example, the camera control unit 92 acquires an appropriate number of luminance value samples from the image held in the image processing unit 66, and the aperture 56 is set so that the average value falls within a predetermined appropriate luminance range. Set the control value. The timing signal generation unit 40 is controlled by the camera control unit 92, generates timing pulses necessary for the operations of the solid-state imaging device 10, the preamplifier unit 62, the AD conversion unit 64, the image processing unit 66, and the like, and supplies the timing pulses to the respective units. To do. The operation unit 98 is operated when the user operates the imaging apparatus 1.

  In the illustrated example, the preamplifier unit 62 and the AD conversion unit 64 of the signal processing system 6 are built in the imaging apparatus module 3. The structure provided in can also be taken. Although the timing signal generation unit 40 is built in the imaging device module 3, the configuration is not limited to such a configuration, and a configuration in which the timing signal generation unit 40 is provided in the main unit 4 can also be adopted. The timing signal generation unit 40 and the driver 42 are separate components, but the configuration is not limited to this, and the timing signal generation unit 40 and the driver 42 may be integrated (timing generator with built-in driver). By doing so, a more compact (small) imaging device 1 can be configured. The timing signal generation unit 40 and the driver 42 may be configured by individual discrete members, but may be provided as an IC (Integrated Circuit) formed on a single semiconductor substrate. . By doing so, it is possible not only to be compact, but also to handle the members easily, and both can be realized at low cost. The imaging device 1 can be easily manufactured.

  The timing signal generator 40 and the driver 42 which are strongly related to the solid-state imaging device 10 to be used are integrated by mounting on the same substrate as the solid-state imaging device 10 or mounted in the imaging device module 3. If they are integrated with each other, handling and management of the members become simple. Since these are integrated as a module, the imaging device 1 (completed product) can be easily manufactured. The imaging device module 3 may be configured only from the optical system 5.

<Outline of solid-state imaging device and peripheral part>
FIG. 2 is a schematic configuration diagram of the solid-state imaging device 2 including the solid-state imaging device 10 and an embodiment of the drive control unit 96 that drives the solid-state imaging device 10. As an example, the solid-state imaging device 2 includes an interline type CCD solid-state imaging device 10 (IT-CCD) in which vertical charge transfer units are arranged between sensor units (vertical direction) in four phases. The case of driving will be described as an example.

  In FIG. 2, a drain voltage Vdd and a reset drain voltage Vrd are applied to the solid-state imaging device 10 from the drive power supply 46, and a predetermined voltage is also supplied to the driver 42. The CCD solid-state imaging device 10 constituting the solid-state imaging device 2 includes a charge sensor unit 11 (photosensitive unit) including a photodiode as an example of a light receiving element corresponding to a pixel (unit cell) on a semiconductor substrate 21. A large number of photocells are arranged in a two-dimensional matrix in the vertical (column) direction and the horizontal (row) direction. These sensor units 11 are an example of a charge detection unit, detect incident light incident from the light receiving surface, acquire a charge of a charge amount corresponding to the light amount (intensity) (generally referred to as photoelectric conversion), The acquired charge is accumulated in the sensor unit 11.

  The solid-state imaging device 10 is also referred to as a vertical transfer unit 13 (vertical CCD, V register unit, or vertical charge transfer unit) in which a plurality of vertical transfer electrodes 24 corresponding to N-phase driving are provided for each vertical column of the sensor unit 11. Are arranged. In this example, four vertical transfer electrodes 24 (represented by reference elements _1, _2, _3, and _4, respectively) per two unit cells are an example of a charge transfer unit in order to support four-phase driving. Arranged on the vertical transfer unit 13.

  For example, on the vertical transfer unit 13 (on the light receiving surface side), four types of vertical transfer electrodes 24 are arranged in a predetermined order in the vertical direction so as to be common to the vertical transfer units 13 at the same vertical position in each column. It arrange | positions so that an opening part may be formed in the light-receiving surface of the sensor part 11. FIG. The vertical transfer electrode 24 is wired so as to extend in the horizontal direction, that is, to traverse in the horizontal direction while forming an opening on the light receiving surface side of the sensor unit 11.

  The four types of vertical transfer electrodes 24 are formed so that the two vertical transfer electrodes 24 correspond to one sensor unit 11, and four types of vertical drive pulses (ΦV_1, ΦV_2) supplied from the driver 42 of the drive control unit 96. , [Phi] V_3, [Phi] V_4), the charge is transferred and driven in the vertical direction. That is, the two sensor units 11 are combined into one set, and vertical drive pulses (ΦV_1, ΦV_2, ΦV_3, ΦV_4) are applied to the four vertical transfer electrodes 24 from the driver 42 of the drive control unit 96, respectively.

  In the solid-state imaging device 10, the main transfer direction of charge (the direction from right to left in the drawing) is adjacent to each transfer destination side end of the plurality of vertical transfer units 13, that is, adjacent to the vertical transfer unit 13 in the last row. The horizontal transfer unit 15 is provided with a plurality of horizontal transfer registers 212 extending. In the illustrated example, the horizontal transfer register 212 is arranged up to an area exceeding the imaging area 14 (element part). The horizontal transfer unit 15 includes a horizontal transfer path 210 (also referred to as a horizontal CCD, an H register unit, or a horizontal charge transfer unit) in which a plurality of horizontal transfer registers 212 are arranged in the transfer direction, and a vertical transfer of the horizontal transfer path 210. And a surplus charge sweeping unit 270 arranged in parallel to the side opposite to the unit 13 (imaging area 14). The horizontal transfer paths 210 are not limited to one line but may be provided for a plurality of lines. In that case, the surplus charge sweeping unit 270 is arranged to match the number of horizontal transfer paths 210.

  The horizontal transfer path 210 is driven by horizontal drive pulses (ΦH1, ΦH2) based on, for example, two-phase horizontal transfer clocks (H1, H2), and charges for one line transferred from a plurality of vertical transfer units 13 In the horizontal scanning period after the horizontal blanking period, the data is sequentially transferred in the horizontal direction. For this reason, a plurality (two) of horizontal transfer electrodes 29-1 and horizontal transfer electrodes 29-2 (collectively horizontal transfer electrodes 29) corresponding to two-phase driving are provided. Incidentally, the last-stage horizontal transfer register 212 which is the end in the transfer direction is referred to as a last-stage horizontal transfer register 214 (LHreg).

  Here, in the illustrated example, four vertical transfer electrodes 24 are provided for each set corresponding to one set (one packet) of the vertical transfer unit 13 defined by four electrodes in the vertical direction. The sensor unit 11 located at the top in the vertical direction corresponds to the vertical transfer electrode 24_1 to which the vertical drive pulse ΦV_1 is applied. Further, the vertical drive pulse ΦV_2 is applied to the vertical transfer electrode 24_2 one stage before (from the horizontal transfer section 15 side), and the vertical drive pulse ΦV_3 is applied to the vertical transfer electrode 24_3 one stage before (from the horizontal transfer section 15 side). And the vertical drive pulse ΦV_4 is applied to the vertical transfer electrode 24_4 closest to the horizontal transfer unit 15.

  The transfer direction of the vertical transfer unit 13 is a vertical (column) direction in the figure, the vertical transfer unit 13 is provided in this direction, and a plurality of vertical transfer electrodes 24 are provided in a direction (horizontal direction, row direction) orthogonal to this direction. Are lined up. Further, a read gate 12 (ROG) is interposed between the vertical transfer unit 13 and each sensor unit 11. On the readout gate 12 of each pixel, of the four vertical transfer electrodes 24_1 to 24_4, the corresponding one of the vertical transfer electrode 24_1 and the vertical transfer electrode 24_3 is also provided as the readout electrode. A channel stop CS is provided at the boundary of each unit cell. An imaging area 14 (imaging unit) is configured by a plurality of vertical transfer units 13 that are provided for each vertical column of the sensor units 11 and vertically transfer charges read from the sensor units 11 by the readout gate unit 12. Yes.

  The charges accumulated in the sensor unit 11 are read out to the vertical transfer unit 13 when a read drive pulse ΦRG corresponding to the read pulse RG is applied to the read gate unit 12. Reading of charges from the sensor unit 11 to the vertical transfer unit 13 is also referred to as field shift. The vertical transfer unit 13 is driven to transfer by the vertical drive pulse ΦV1 to the vertical drive pulse ΦV4 based on the four-phase vertical transfer clock V1 to the vertical transfer clock V4, and the read charge is 1 in a part of the horizontal blanking period. The portions corresponding to the scanning lines (one line) are sequentially transferred in the vertical direction. This vertical transfer of charges for each line is also called a line shift.

  At the transfer destination end (final stage horizontal transfer register 214) of the horizontal transfer unit 15, charge / electrical signal conversion for converting the electric charge horizontally transferred by the horizontal transfer unit 15 into an electric signal and outputting it as an analog imaging signal A portion 16 is provided. A connection point of the charge / electrical signal conversion unit 16 to the final horizontal transfer register 214 is referred to as a charge input unit 17. The last-stage horizontal transfer register 214 is an example of a charge output unit that outputs charges to the charge / electrical signal conversion unit 16. The electrical signal acquired by the charge / electrical signal converter 16 is derived as a CCD output (Vo) corresponding to the amount of incident light from the subject. The interline type solid-state imaging device 10 is configured as described above.

  The charge / electrical signal converter 16 only needs to be able to detect fluctuations in the electric signal in accordance with the amount of charge in the charge input unit 17, and can take various configurations. For example, an amplifying circuit having a floating diffusion amplifier (FDA) configuration using a floating diffusion (FD section), which is a diffusion layer having a parasitic capacitance, as a charge input section 17 (in this example, a charge storage section). Are typically used. However, the present invention is not limited to this, and various configurations can be adopted as long as the charge input unit 17 has a charge / electrical signal conversion function, such as a configuration using a floating gate. The charge / electrical signal conversion unit 16 includes a transistor connected to the charge input unit 17 in order to perform a charge / electrical signal conversion function. Is generated at the output end. For example, when a floating diffusion is used for the charge input unit 17, assuming that the capacitance of the floating diffusion is C, the voltage change ΔV (Vo) is expressed by ΔV = ΔQ / C.

  The surplus charge sweeping unit 270 prevents charges from leaking into unnecessary portions. In this example, the surplus charge sweeping unit 270 is arranged along the transfer direction of the horizontal transfer path 210 on the side opposite to the imaging area 14 of the horizontal transfer path 210. An installed (adjacent) horizontal type (lateral type, horizontal direction) is used. Incidentally, as another configuration of the surplus charge sweeping section, there is a vertical structure in which the potential barrier is set lower than the potential barrier under the transfer gate in the depth direction of the semiconductor, and the excess charge is thrown away to the substrate side. . The vertical type is easy to apply to the front-illuminated type, but difficult to apply to the back-illuminated type, while the horizontal type is easy to apply to both the front-side incident type and the back-side incident type. This is because the back-illuminated type has no substrate.

  The solid-state imaging device 2 is supplied from the timing signal generation unit 40 that generates various pulse signals (binary of “L” level and “H” level) for driving the solid-state imaging device 10, and the timing signal generation unit 40. And a driver 42 that supplies the various pulses thus generated to the solid-state imaging device 10 as drive pulses of a predetermined level. For example, the timing signal generation unit 40 reads out the readout pulse RG for reading out the charges accumulated in the sensor unit 11 of the solid-state imaging device 10 based on the horizontal synchronization signal (HD) and the vertical synchronization signal (VD), and the readout charges. Is transferred from the vertical transfer unit 13 to the horizontal transfer unit 15 by vertical transfer clock V1 to vertical transfer clock Vn (n indicates the number of phases during driving; for example, V4 during four-phase driving). A horizontal transfer clock H1, a horizontal transfer clock H2, a reset pulse RG, and the like for transferring and driving the generated charges in the horizontal direction and passing them to the charge / electrical signal converter 16 are generated and supplied to the driver 42. When the solid-state imaging device 10 corresponds to an electronic shutter, the timing signal generation unit 40 also supplies an electronic shutter pulse XSG to the driver 42.

  The driver 42 converts various clock pulses supplied from the timing signal generation unit 40 into voltage signals (drive pulses) of a predetermined level, or converts them into other signals and supplies them to the solid-state imaging device 10. For example, the four-phase vertical transfer clock V1 to the vertical transfer clock V4 generated from the timing signal generation unit 40 are converted into the vertical drive pulse ΦV1 to the vertical drive pulse ΦV4 via the driver 42, and correspond to each other in the solid-state imaging device 10. The voltage is applied to predetermined vertical transfer electrodes (24-1 to 24-4). The read pulse RG is combined with the vertical transfer clock V1 and the vertical transfer clock V3 through the driver 42 to form a ternary level vertical drive pulse ΦV1 and vertical drive pulse ΦV3 including the read voltage, and the corresponding vertical transfer electrode 24- 1 and the vertical transfer electrode 24-3. The horizontal transfer clock H1 and the horizontal transfer clock H2 are converted into a drive pulse ΦH1 and a drive pulse ΦH2 through the driver 42, and are applied to the corresponding horizontal transfer electrode 29-1 and horizontal transfer electrode 29-2 in the solid-state imaging device 10. The

  Here, as described above, the driver 42 combines the read pulse RG with the vertical transfer clock V1 and the vertical transfer clock V3 of the four-phase vertical transfer clock V1 to the vertical transfer clock V4 to obtain a ternary level. Are supplied to the solid-state imaging device 10 as a vertical drive pulse ΦV1 and a vertical drive pulse ΦV3. That is, the vertical drive pulse ΦV1 and the vertical drive pulse ΦV3 are used not only for the original vertical transfer operation but also for reading the electric charge.

  An outline of a series of operations of the solid-state imaging device 10 having such a configuration is as follows. First, the timing signal generator 40 generates various pulse signals such as the vertical transfer clock V1 to the vertical transfer clock V4 and the read pulse RG. These pulse signals are converted into drive pulses of a predetermined voltage level by the driver 42 and then input to predetermined terminals of the solid-state imaging device 10.

  The charges accumulated in each of the sensor units 11 are applied to the transfer channel terminal electrode of the read gate unit 12 by the read pulse RG generated from the timing signal generation unit 40, and the potential below the transfer channel terminal electrode is deepened. The data is read to the vertical transfer unit 13 through the read gate unit 12. Then, the vertical transfer unit 13 is driven based on the four-phase vertical drive pulse ΦV1 to the vertical drive pulse ΦV4, and sequentially transferred to the horizontal transfer unit 15.

  The horizontal transfer unit 15 includes a two-phase horizontal drive pulse ΦH1 and a horizontal drive pulse ΦH2 in which the two-phase horizontal transfer clock H1 and the horizontal transfer clock H2 generated from the timing signal generation unit 40 are converted to a predetermined voltage level by the driver 42. Based on the above, the charges corresponding to one line vertically transferred from each of the plurality of vertical transfer units 13 are sequentially horizontally transferred to the charge / electrical signal conversion unit 16 side. In the figure, the horizontal transfer unit 15 is shown as one system, but depending on the element configuration, a plurality of horizontal transfer units 15 may be provided. In this case, the charge / electrical signal conversion unit 16 is provided for each horizontal transfer unit 15, and the buffer unit 60 is configured to interface with each charge / electrical signal conversion unit 16.

  The charge / electrical signal conversion unit 16 accumulates the charges injected in order from the horizontal transfer unit 15 (specifically, the final stage charge packet or register, hereinafter referred to as “final stage packet”) in a floating diffusion (not shown). The electric charge is converted into a signal voltage, and is output as an imaging signal Vo (CCD output signal) via, for example, an output circuit having a source follower configuration (not shown). The source follower at the output stage of the charge / electrical signal converter 16 does not have sufficient driving capability. Therefore, the imaging signal Vo output from the charge / electrical signal conversion unit 16 is first input to the buffer unit 60 and the analog front end via the buffer unit 60 so that the CCD output signal amplified by the source follower does not deteriorate. 61.

  That is, in the solid-state imaging device 10, the vertical transfer unit 13 provided corresponding to the vertical column of each sensor unit 11 detects the charges detected in the imaging area 14 in which the sensor units 11 are two-dimensionally arranged vertically and horizontally. Then, the vertical transfer is performed to the horizontal transfer unit 15, and thereafter, charges are transferred in the horizontal direction by the horizontal transfer unit 15 based on the two-phase horizontal drive pulse H1 and the horizontal drive pulse H2. Then, the operation of converting the electric potential / electrical signal conversion unit 16 into a potential corresponding to the electric charge from the horizontal transfer unit 15 and outputting it is repeated.

<Connection structure with charge input section>
A specific aspect of a connection structure between the horizontal transfer unit 15 and a CCD output stage (charge / electrical signal conversion unit 16) having an FD amplifier structure will be described below.

  3 to 4 are diagrams illustrating a connection structure according to the first embodiment. Here, FIG. 3 is a diagram illustrating the connection structure of the comparative example with respect to Example 1, FIG. 3A is a schematic plan view illustrating the connection structure of the comparative example, and FIG. FIG. 4 is a potential diagram of FIG. FIG. 4 is a diagram for explaining the connection structure of the first embodiment, FIG. 4 (A) is a schematic plan view for explaining the connection structure of the first embodiment, and FIG. 4 (B) is FIG. 4 (A). FIG.

  In both the comparative example shown in FIG. 3A and the first embodiment shown in FIG. 4A, the horizontal transfer unit 15 includes a plurality of horizontal transfer registers 212 (Hreg) in the transfer direction (the horizontal transfer register 212 in the final stage). Is described in the last-stage horizontal transfer register 214). The horizontal transfer path 210 is provided up to an excess region beyond the imaging area 14 and includes more horizontal transfer registers 212 than the portion connected to the vertical transfer unit 13 of the imaging area 14. A portion where the horizontal transfer register 212 in the excess area is disposed is referred to as a dummy horizontal transfer path 211. A small signal barrier 220 (HSB: Hreg Small signal Barrier) is formed in the horizontal transfer register 212 on the dummy horizontal transfer path 211 side so as to gradually narrow toward the final stage horizontal transfer register 214 (the width becomes narrower). Has been. The small signal barrier 220 on the horizontal transfer register 212 is a transfer path that plays a role of collecting charges during small signal transfer, and the width of the deep potential portion in the horizontal transfer register 212 becomes closer to the final horizontal transfer register 214 side. The narrowed portion serves as an outlet 222 and serves to collect charges on the outlet 222 side during small signal transfer.

  In the horizontal transfer unit 15, a horizontal output gate 230 (HOG: Hreg Output Gate) is disposed on the charge / electrical signal conversion unit 16 side of the final-stage horizontal transfer register 212 (hereinafter referred to as the final-stage horizontal transfer register 214). In addition, a floating diffusion portion 250 (FD: Floating Diffusion) is disposed at a connection point between the charge / electrical signal converter 16 and the horizontal output gate 230. An outlet 222 of the small signal barrier 220 is disposed at a position facing the floating diffusion portion 250. The exit 222 of the small signal barrier 220 is set to about 2 micrometers, for example. The floating diffusion section 250 is connected to the gate of a transistor forming the charge / electrical signal conversion section 16 (not shown).

  The horizontal transfer unit 15 further includes a horizontal overflow barrier 272 (HOB: Hreg Overflow Barrier) and a horizontal overflow drain 276 (HOD: Hreg Overflow Drain /). The horizontal overflow barrier 272 is an example of a surplus charge barrier, the horizontal overflow drain 276 is an example of a surplus charge well, and the horizontal overflow drain 276 (surplus charge barrier) and the horizontal overflow drain 276 (surplus charge well) A charge sweeper is configured. On the side opposite to the imaging area 14 (vertical transfer unit 13), it is arranged in parallel with the horizontal transfer path 210 (in parallel with the transfer direction of the horizontal transfer register 212). The horizontal overflow drain 276 is further arranged outside the HOG 272 in parallel with the horizontal overflow barrier 272 (in parallel with the transfer direction of the horizontal transfer register 212). The horizontal overflow barrier 272 and the horizontal overflow drain 276 have a function for discharging excess charges saturated in the horizontal transfer path (horizontal transfer path 210).

  Here, in the horizontal transfer section 15Z of the comparative example shown in FIG. 3A, the charge input section 17 (in this example, the floating diffusion section 250) is disposed at the center in the width direction of the horizontal transfer path 210. In the case of such a connection structure of the comparative example, when the signal is large (for example, when a large amount of light is incident), the charge amount that can be accumulated in the horizontal transfer path 210 may be exceeded. Normally, the charge that exceeds the signal amount that can be accumulated in the horizontal transfer path is discharged to the horizontal overflow drain 276. For example, when the charge overflows in the last horizontal transfer register 214 of the horizontal transfer path 210, the horizontal overflow barrier The charge may overflow to the floating diffusion section 250 beyond the horizontal output gate 230 without being discarded to the horizontal overflow drain 276 beyond 272. When the electric signal based on the electric charge is acquired by the electric charge / electrical signal converter 16, the horizontal output gate 230 is opened and the electric charge accumulated in the final stage horizontal transfer register 214 is discharged to the floating diffusion unit 250 side. However, if there is a charge “overflowing to the floating diffusion section 250 beyond the horizontal output gate 230 (hereinafter also referred to as“ surplus charge ”) before that, the surplus charge is also charged to the charge / electrical signal conversion section 16. Can be converted into an electrical signal. Since signal processing is performed based on the premise that excessive charge is always discharged to the horizontal overflow drain 276 when it is transferred through the horizontal transfer path 210, such a phenomenon that excess charge overflows to the floating diffusion section 250 side. If there is, the image quality deteriorates due to the signal leakage caused by this, and it becomes a problem as an image.

  In order to suppress this phenomenon, for example, it is conceivable that the horizontal overflow barrier 272 is made lower than the horizontal output gate 230. However, if the horizontal output gate 230 is lowered, the amount of charge (denoted as saturation charge amount) that can be accumulated in the final stage horizontal transfer register 214 is reduced, and the so-called dynamic range is narrowed. Further, it has been found that just because the horizontal output gate 230 is lowered, it is not always possible to suppress the phenomenon that electric charges overflow to the floating diffusion portion 250 side. For this reason, it is difficult to ensure a certain amount of saturation charge in the final stage horizontal transfer register 214 and to suppress the phenomenon of charges overflowing to the floating diffusion section 250, and it is necessary to make a trial for that purpose. Become.

  For example, FIG. 3B shows a point A (floating diffusion portion 250 side) to a point B (the center portion in the width direction and the longitudinal direction of the final stage horizontal transfer register 214) shown in FIG. A potential diagram of a portion of ~ C point (horizontal overflow drain 276 side) is shown. As described above, the horizontal overflow barrier 272 is set lower than the horizontal output gate 230 during horizontal transfer (see FIG. 3B1). Since the floating diffusion portion 250 is disposed at the center in the width direction of the horizontal transfer path 210, the distance BC from the point B to the point C becomes longer than the distance AB from the point A to the point B. As an example, the distance BC is several times or more than the distance AB, and when the saturation charge amount is increased, it is often ten times or more. For example, the distance AB is set to about 2 micrometers, and the distance BC is set to about 10 to 30 micrometers.

  In such a case, at the time of a small signal with a small amount of light, as shown in FIG. Incidentally, since the small signal barrier 220 is provided and the outlet 222 thereof is disposed at a position facing the floating diffusion portion 250, the charge is not in the final stage horizontal transfer register 214 but in the vicinity of the floating diffusion portion 250. To be collected. On the other hand, for example, in the case of a large signal with a large amount of light, charges are accumulated in the entire final stage horizontal transfer register 214. If the potential of the horizontal overflow barrier 272 is lower than the potential of the horizontal output gate 230, ideally, when the charge amount at the time of a large signal exceeds the saturation charge amount of the final stage horizontal transfer register 214, FIG. As shown in B3), all excess charge should be discarded to the horizontal overflow drain 276.

  However, even if a surplus charge sweeping unit (overflow barrier and overflow drain) is provided adjacent to the charge output unit such as the transfer path, the surplus charge overflows into the charge input unit provided in the charge / electrical signal conversion unit. It was found that the effect may appear in the image. In the case of the comparative example, even if the horizontal overflow barrier 272 is lower than the horizontal output gate 230, it may overflow into the floating diffusion section 250 before being discarded to the horizontal overflow drain 276.

  Even if the horizontal overflow barrier 272 is lower than the horizontal output gate 230, the floating diffusion portion 250 overflows because the floating diffusion portion 250 is centered in the width direction of the horizontal transfer path 210 (B This is considered to be a factor. This is considered because the final stage horizontal transfer register 214 a on the opposite side of the horizontal overflow drain 276 from the floating diffusion portion 250 is closer to the floating diffusion portion 250 than the horizontal overflow drain 276. Specifically, even though surplus charges in the final horizontal transfer register 214b on the horizontal overflow drain 276 side from the floating diffusion portion 250 can be discharged to the horizontal overflow drain 276, what is the horizontal overflow drain 276 from the floating diffusion portion 250? In order to discharge the surplus charge in the final horizontal transfer register 214a on the opposite side to the horizontal overflow drain 276, it passes through the vicinity of the floating diffusion section 250. It is considered that the amount of accumulated charges in the vicinity increases locally and exceeds the horizontal output gate 230 as shown in FIG. 3 (B4).

  Therefore, in this embodiment (not only in Example 1 but also in other examples), the surplus charge is exceeded in the charge input unit provided in the charge / electrical signal conversion unit exceeding the amount of charge that can be handled by the charge output unit. We propose a technology that can suppress the phenomenon that overflows with a simple structure. For example, the horizontal transfer unit 15A according to the first embodiment illustrated in FIG. 4A is configured so that the charge input unit 17 (in this example, the floating diffusion unit 250) is not located near the center in the width direction of the horizontal transfer path but on the upper side (imaging area). 14 side) or the lower side (opposite the imaging area 14). Specifically, in the horizontal transfer unit 15A according to the first embodiment, the floating diffusion unit 250 is disposed at a position deviated (shifted) from the center in the width direction of the horizontal transfer path 210 and on the horizontal overflow drain 276 side. Has been.

  Although it is “not near the center of the horizontal transfer path”, when the surplus charge sweeping unit 270 is provided, the charge input unit is provided on the side opposite to the horizontal overflow drain 276 (that is, on the imaging area 14 side). The arrangement of 17 (floating diffusion portion 250) is meaningless for the reason described later. In other words, in the case of the horizontal transfer unit 15A of the first embodiment in which the surplus charge sweeping unit 270 is provided, the charge output unit (final stage horizontal transfer register 214) to the charge input unit (floating diffusion unit 250). Deviation from the central portion of the final stage horizontal transfer register 214 (that is, the horizontal transfer register 212 of the horizontal transfer path 210) in the width direction, which is the second direction intersecting (perpendicular to) the first direction in which charges are input. The floating diffusion portion 250 is disposed at a position closer to the horizontal overflow drain 276 disposed on the opposite side of the imaging area 14 (outside: the same applies hereinafter for the sake of clarity). There are features. The position of the floating diffusion portion 250 is moved to the horizontal overflow drain 276 side, preferably the potential of the horizontal overflow barrier 272 is adjusted, and the barrier is set deeper than the horizontal output gate 230.

  Preferably, the distance AB from the central portion (point B in the figure) of the final stage horizontal transfer register 214 to the floating diffusion section 250 (specifically, the boundary between the final stage horizontal transfer register 214 and the floating diffusion section 250) is A distance BC (distance between the outlet 222 of the small signal barrier 220) from the point B in the figure of the final stage horizontal transfer register 214 to the horizontal overflow drain 276 (specifically, the boundary between the horizontal overflow barrier 272 and the horizontal overflow drain 276) and The arrangement position of the floating diffusion portion 250 is set so as to be approximately the same. It may be “same level” and may be a little longer or shorter. For example, the distance between the horizontal overflow barrier 272 and the small signal barrier 220 (that is, the outlet 222 of the small signal barrier 220) is set to about 2 micrometers.

  Here, in the horizontal transfer unit 15A_1 of the first example shown in FIG. 4A1, the outlet 222 of the small signal barrier 220 is arranged near the center in the width direction of the horizontal transfer path as in the comparative example. On the other hand, in the second example shown in FIG. 4 (A2), the outlet 222 of the small signal barrier 220 is disposed at a position facing the floating diffusion portion 250. That is, the horizontal transfer unit 15A_2 of the second example changes the shape of the small signal barrier 220 that plays a role of collecting charges during small signal transfer in accordance with the change of the position of the floating diffusion unit 250 with respect to the comparative example. is doing. The horizontal transfer unit 15A_2 of the second example is easier to collect charges in the vicinity of the floating diffusion unit 250 than the horizontal transfer unit 15A_1 of the first example (particularly in the case of a small signal), so that the efficiency of QV conversion is better. It is.

  For example, FIG. 4B shows a point A (floating diffusion portion 250 side) to a point B (the central portion in the width direction of the final stage horizontal transfer register 214 and the horizontal overflow in the longitudinal direction) shown in FIG. A potential diagram of a portion from a drain 276 side) to a point C (horizontal overflow drain 276 side) is shown. In both cases of the first example and the second example, the potential of the horizontal overflow barrier 272 is adjusted so that the horizontal overflow barrier 272 is deeper than the horizontal output gate 230. Since the floating diffusion portion 250 is disposed closer to the horizontal overflow drain 276 than the center in the width direction of the horizontal transfer path 210 (final stage horizontal transfer register 214), the signal overflowed during a large signal is transferred to the horizontal overflow drain. It becomes easy to throw away to 276 side, and the phenomenon which overflows to the floating diffusion part 250 can be suppressed.

  When surplus charges in the final stage horizontal transfer register 214a on the opposite side of the horizontal overflow drain 276 from the floating diffusion portion 250 are discharged to the horizontal overflow drain 276, it passes through the vicinity of the floating diffusion portion 250 so that the vicinity of the floating diffusion portion 250 Electric charge concentrates on. However, since the horizontal overflow drain 276 is arranged closer to the floating diffusion portion 250 than in the comparative example, even if the accumulated charge amount locally increases in the vicinity of the floating diffusion portion 250, the horizontal overflow becomes larger than in the comparative example. It is easy to discharge to the drain 276 side. For example, when a large signal is transferred and the amount of saturation charge is insufficient, excess charge leaks to the floating diffusion portion 250 side by overflowing excess charge to the horizontal overflow drain 276 before overflowing to the floating diffusion portion 250. You can avoid it. It is possible to prevent overflow of surplus charges generated at the time of large signal transfer to the floating diffusion portion 250 side and signal leakage due to the overflow. This advantage makes it easy to secure the amount of charge that can be stored in the final stage of the horizontal transfer path, and the number of trials can be reduced. Incidentally, although the charge transfer length L1 of Example 1 is longer than the charge transfer length L0 of the comparative example, there is no problem.

  In consideration of the above points, as shown in the drawing, the floating diffusion unit 250 (specifically, the final horizontal transfer register 214 and the floating diffusion unit 250 from the central portion (point B in the figure) of the final horizontal transfer register 214). The distance AB to the horizontal overflow drain 276 (specifically, the boundary between the horizontal overflow barrier 272 and the horizontal overflow drain 276) is approximately the same as the distance BC from the point B in the figure of the final stage horizontal transfer register 214 to the horizontal overflow drain 276. As a result, a signal overflowing at the time of a large signal can be more reliably discarded to the horizontal overflow drain 276 side, and the phenomenon of overflowing to the floating diffusion section 250 can be more reliably suppressed.

  Incidentally, in the technique proposed in the first embodiment or the like, it is not essential that the horizontal surplus charge sweeping unit 270 is provided adjacent to the horizontal transfer path 210, but the effect of the present disclosure is obtained. In order to make it large, it is better to provide the surplus charge sweeping portion 270.

[Charge input position]
FIG. 5 is a diagram for explaining a method for setting the arrangement position of the charge input unit 17. According to this figure, the charge input unit 17 (in this example, the floating diffusion unit 250) is disposed closer to the surplus charge sweeping unit 270 than near the center in the width direction of the horizontal transfer path 210 (final stage horizontal transfer register 214). The way of thinking is shown.

  As understood from the above description, the arrangement position of the charge input unit 17 (in this example, the floating diffusion unit 250) is the main flow direction of charge (in this example, the transfer direction which is the longitudinal direction of the horizontal transfer path 210). Is a side closer to the surplus charge sweeping unit 270 than the center in the direction perpendicular to the horizontal direction (in this example, the width direction of the final horizontal transfer register 214 of the horizontal transfer register 212). As long as it is located, it may be placed at any location.

  For example, the width of the horizontal transfer path 210 (final stage horizontal transfer register 214) is 2 · W, and the distance from the central portion CL1 in the width direction to the arrangement position of the charge input portion 17 in the width direction (in other words, from the central portion). P is the degree of deviation to the outside). The distance from the central portion CL1 to the surplus charge sweeping portion 270 in the width direction is W. Further, a manufacturing variation range on the surplus charge sweeping unit 270 side of the arrangement position of the charge input unit 17 in the horizontal transfer unit 15Z of the comparative example is denoted by ΔP. The manufacturing variation range ΔP may be, for example, σ or 3 · σ when the standard deviation is σ. In this case, the distance P in the horizontal transfer portion 15V only needs to be larger than the manufacturing variation range ΔP (ΔP <P ≦ W or ΔP ≦ P ≦ W) as in the first example shown in FIG. ). In this specification, “greater than” may include “equal sign (=)”. By doing so, it is possible to reliably discard the signal overflowing at the time of a large signal to the surplus charge sweeping unit 270 as compared with the comparative example, and to reliably suppress the phenomenon of overflowing to the charge input unit 17 side.

  Further, as in the second example shown in FIG. 5B, the distance P may be defined by the ratio to the distance W to the surplus charge sweeping portion 270 without being limited by the manufacturing variation range ΔP. For example, it is larger than 1/5 (W / 5 <P ≦ W or W / 5 ≦ P ≦ W: “No. 1” in the figure), preferably larger than 1/2 (W / 2). <P ≦ W or W / 2 ≦ P ≦ W: “No. 2 in the figure”, more preferably 3/4 (3 · W / 4 <P ≦ W or 3 · W / 4 ≦ P ≦ W: “No. 3” in the figure). Normally, in the case of the comparative example, the manufacturing variation range ΔP may be considered to be W / 5 or less, and the signal overflowed at the time of a large signal can be more reliably discarded to the surplus charge sweeping unit 270 than the comparative example. The phenomenon of overflowing to the charge input unit 17 side can be reliably suppressed. By the way, to make it larger than 1/2 (W / 2 <P ≦ W or 4 · W / 5 <P ≦ W) means that it is intermediate from the central portion CL1 in the width direction to the surplus charge sweeping portion 270. When the point is CL2, it means that the charge input unit 17 is arranged not on the center part CL1 side of the intermediate point CL2 but on the surplus charge sweeper 270 side of the intermediate point CL2.

  5A and 5B, the distance P between the charge input unit 17 and the surplus charge sweeping unit 270 may be set as follows for easy understanding. . First, in FIG. 4, a point obtained by projecting the midpoint A of the charge input unit 17 (floating diffusion unit 250) onto the intermediate line of the last-stage horizontal transfer register 214 (a line in the width direction passing through the midpoint in the transfer direction). Let it be point B. As for the distance from the charge output unit (final stage horizontal transfer register 214) to the charge input unit 17 in the first direction (charge transfer direction), the middle point of the charge input unit 17 and the final stage horizontal transfer register 214 The distance to the point (distance from point A to point B in FIG. 4), the distance from the middle point of the charge input unit 17 to the boundary between the horizontal output gate 230 and the final horizontal transfer register 214, the final horizontal transfer register 214 The distance from the middle point to the boundary between the horizontal output gate 230 and the charge input unit 17 or the length of the horizontal output gate 230 in the transfer direction (gate length) may be used. With respect to the distance from the position where the charge input unit 17 is projected to the charge output unit (final stage horizontal transfer register 214) to the surplus charge sweeping unit 270, the surplus charge sweeping unit 270 (particularly the horizontal overflow drain 276) of the point B is used. The distance to the middle point, the distance from the point B to the middle point of the surplus charge sweeper 270 (particularly the horizontal overflow drain 276), or the distance from the point B to the boundary between the horizontal overflow barrier 272 and the horizontal overflow drain 276 It is good to use. As the most preferable distance, on the charge input unit 17 side, the distance from the middle point (point B in FIG. 4) of the final stage horizontal transfer register 214 to the boundary between the horizontal output gate 230 and the charge input unit 17; For the surplus charge sweeping unit 270 side, the distance is from the midpoint of the final stage horizontal transfer register 214 (point B in FIG. 4) to the boundary between the horizontal overflow barrier 272 and the horizontal overflow drain 276.

  FIG. 6 is a diagram for explaining a connection structure according to the second embodiment. Here, FIG. 6A is a schematic plan view illustrating the connection structure of the second embodiment, and FIG. 6B is a potential diagram of FIG.

  The horizontal transfer unit 15B according to the second embodiment includes a horizontal overflow barrier 274 and a horizontal overflow drain 278 in addition to the horizontal overflow barrier 272 and the horizontal overflow drain 276. The horizontal overflow barrier 274 is a dummy horizontal transfer path 211 on the imaging area 14 (vertical transfer unit 13) side with respect to the horizontal transfer register 212 (that is, the dummy horizontal transfer path 211) on the rear side of the portion connected to the vertical transfer unit 13. (In parallel with the transfer direction of the horizontal transfer register 212). The horizontal overflow drain 278 is further arranged outside the horizontal overflow barrier 274 in parallel with the horizontal overflow barrier 274 (in parallel with the transfer direction of the horizontal transfer register 212). Similar to the horizontal overflow barrier 272 and the horizontal overflow drain 276, the horizontal overflow barrier 274 and the horizontal overflow drain 278 have a function of discharging excess charges saturated in the horizontal transfer path 210.

  The horizontal transfer portion 15B according to the first embodiment is characterized in that the floating diffusion portion 252 is disposed at a position deviated from the center portion in the width direction of the horizontal transfer path 210 and on the horizontal overflow drain 278 side. There is. The floating diffusion section 252 is connected to the gate of a transistor that forms a charge / electrical signal conversion section 16 (not shown). This is the same as the first embodiment in that the floating diffusion portion 252 is disposed closer to the HOD than the center of the horizontal transfer path. Preferably, the distance from the central portion (point B in the figure) of the final stage horizontal transfer register 214 to the floating diffusion section 252 (specifically, the boundary between the final stage horizontal transfer register 214 and the floating diffusion section 252) is the final The distance from the center of the horizontal transfer register 214 (point B in the figure) to the horizontal overflow drain 278 (specifically, the boundary between the horizontal overflow barrier 274 and the horizontal overflow drain 278) is equal to or less than the distance. The arrangement position of the floating diffusion portion 252 is set.

  Here, in the horizontal transfer unit 15B_1 of the first example shown in FIG. 6A1, the outlet 222 of the small signal barrier 220 is arranged near the center in the width direction of the horizontal transfer path as in the comparative example. On the other hand, the horizontal transfer unit 15B_2 of the second example shown in FIG. 6A2 is arranged such that the outlet 222 of the small signal barrier 220 faces the floating diffusion unit 252. That is, in the second example, the shape of the small signal barrier 220 that plays a role of collecting charges at the time of small signal transfer is changed in accordance with the change of the position of the floating diffusion portion 252 with respect to the comparative example. The horizontal transfer unit 15B_2 of the second example is easier to collect charges in the vicinity of the floating diffusion unit 252 than the horizontal transfer unit 15B_1 of the first example (especially at the time of a small signal), so that the efficiency of QV conversion is good It is.

  In the second embodiment, as in the first embodiment, surplus charges overflowing at the time of a large signal can be discarded to the horizontal overflow drain 278 without overflowing to the floating diffusion portion 252, and the surplus charges generated at the time of large signal transfer can be floated. Overflow to the diffusion portion 252 side and signal leakage due to this can be prevented. Incidentally, since the charge transfer length L2 of the second embodiment is shorter than the charge transfer length L1 of the first embodiment, the transfer efficiency is better than that of the first embodiment.

  FIG. 7 is a diagram (planar schematic diagram) illustrating a connection structure according to the third embodiment. I omit the potential diagram. As can be seen from the figure, the horizontal transfer section 15C of the third embodiment has a configuration in which the first embodiment and the second embodiment are used in combination, at a position deviated from the center in the width direction of the horizontal transfer path 210, and horizontally. A floating diffusion portion 250 is disposed on the overflow drain 276 side, and a floating diffusion portion 252 is also disposed on the horizontal overflow drain 278 side. The floating diffusion section 250 is connected to the gate of a transistor forming the first charge / electric signal conversion section 16 (not shown), and the floating diffusion section 252 is the gate of the transistor forming the second charge / electric signal conversion section 16 (not shown). Connected to.

  Preferably, the distance from the first central portion (point B1 in the figure) of the final stage horizontal transfer register 214 to the floating diffusion section 250 (specifically, the boundary between the final stage horizontal transfer register 214 and the floating diffusion section 250). Is approximately equal to the distance from the first central portion (point B 1 in the figure) of the final stage horizontal transfer register 214 to the horizontal overflow drain 276 (specifically, the boundary between the horizontal overflow barrier 272 and the horizontal overflow drain 276) or The arrangement position of the floating diffusion section 250 is set so as to be less than that. Further, the distance from the second central portion (point B2 in the figure) of the final stage horizontal transfer register 214 to the floating diffusion section 252 (specifically, the boundary between the final stage horizontal transfer register 214 and the floating diffusion section 252) is The distance from the second central portion (B point 2 in the figure) of the final stage horizontal transfer register 214 to the horizontal overflow drain 278 (specifically, the boundary between the horizontal overflow barrier 274 and the horizontal overflow drain 278) or the same The arrangement position of the floating diffusion portion 252 is set so as to be as follows.

  In the horizontal transfer unit 15C_1 of the first example shown in FIG. 7A, the outlet 222 of the small signal barrier 220 is arranged near the center in the width direction of the horizontal transfer path, as in the comparative example. On the other hand, in the second example horizontal transfer unit 15C_2 shown in FIG. 6B, the small signal barrier 220 is provided with two outlets 222_1 and 222_2, and the outlet 222_1 is located at a position facing the floating diffusion unit 250. The outlet 222_2 is disposed at a position facing the floating diffusion portion 252. That is, in the second example, the shape of the small signal barrier 220 that plays a role of collecting charges at the time of small signal transfer in accordance with the change of the positions of the floating diffusion portion 250 and the floating diffusion portion 252 with respect to the comparative example. It has changed.

  The horizontal transfer unit 15C according to the third embodiment includes floating diffusions at two locations of the floating diffusion unit 250 on the horizontal overflow drain 276 side and the floating diffusion unit 252 on the horizontal overflow drain 278 side. Overflow of surplus charges to the floating diffusion side and signal leakage due to this can be prevented more reliably than in the first and second embodiments.

  FIG. 8 is a diagram (planar schematic diagram) illustrating a connection structure according to the fourth embodiment. I omit the potential diagram. As can be seen from the figure, the horizontal transfer unit 15D of the fourth embodiment is configured by removing the small signal barrier 220 from the first, second, or third embodiment.

  A horizontal transfer unit 15D_1 of the first example shown in FIG. 8A is a modification of the first example, and is located at a position deviating from the center in the width direction of the horizontal transfer path 210 and on the horizontal overflow drain 276 side. A floating diffusion portion 250 is disposed. A horizontal transfer unit 15D_2 of the second example illustrated in FIG. 8B is a modification of the second example, and is located at a position outside the central portion in the width direction of the horizontal transfer path 210 and on the horizontal overflow drain 278 side. A floating diffusion portion 252 is disposed. A horizontal transfer unit 15D_3 of the third example shown in FIG. 8C is a modification of the third example, and is located away from the center in the width direction of the horizontal transfer path 210 and on the horizontal overflow drain 276 side. A floating diffusion portion 250 is disposed, and a floating diffusion portion 252 is disposed on the horizontal overflow drain 278 side.

  In the horizontal transfer unit 15D of the fourth embodiment, since the small signal barrier 220 is not provided in the horizontal transfer path 210, the effect of collecting charges on the outlet 222 side at the time of the small signal transfer cannot be obtained. As in FIG. 3, it is possible to prevent overflow of surplus charges generated at the time of large signal transfer to the floating diffusion side and signal leakage due to this.

  As described above, the present disclosure has been described using the embodiment (or example: the same applies below), but the technical scope of the present disclosure is not limited to the scope described in the embodiment. Various changes or improvements can be added to the above-described embodiments without departing from the gist, and embodiments to which such changes or improvements are added are also included in the technical scope of the present disclosure.

  Further, the embodiments do not limit the technology according to the claims (claims), and furthermore, all the combinations of features described in the embodiments are the solution of the technology proposed in the present disclosure. It is not always essential. The above-described embodiments include technologies at various stages, and various modified technologies can be extracted by appropriately combining a plurality of disclosed constituent elements. Even if some configuration requirements are deleted from all the configuration requirements shown in the embodiment, a configuration in which some of the configuration requirements are deleted is proposed in the present disclosure as long as the effect to be obtained by the present disclosure is obtained. Can be extracted as a technique.

[First Modification]
For example, in the above-described embodiment, as an example of a so-called area sensor, the horizontal transfer unit in the CCD solid-state imaging device and the charge / electrical signal conversion unit connected to the final stage thereof have been described. The scope of application of the technology is not limited to this. For example, as in the first modification shown in FIG. 9, the CCD solid-state imaging device may be a linear sensor. In this example, the charge detection parts are arranged in two lines in a straight line, in other words, two element parts are provided. A charge transfer unit is provided for each column, and a transfer register Reg is provided corresponding to each charge detection unit of the charge transfer unit of each column. The final stage transfer register Reg is referred to as a final stage register LReg. The final stage register LReg is connected to the floating diffusion section 250 of the charge / electrical signal conversion section via the read gate ROG. Further, one column of surplus charge sweeping units is provided in parallel with the charge transfer unit, and this one column of surplus charge sweeping units is shared by two columns of charge transfer units. Specifically, an overflow barrier is provided for each element portion, and two rows of overflow barriers sandwich the overflow drain. In such a structure, the technique proposed in the above embodiment can be similarly applied to the connection structure between the charge transfer path provided in the linear sensor and the charge input section of the charge / electrical signal conversion section. For example, if necessary, small signal barriers 220 for collecting charges at the time of small signal transfer are provided at several stages on the final stage side of the charge transfer unit, and the charge output unit side outlet of the small signal barrier 220 is charged. You may arrange | position in the position facing a part.

[Second Modification]
The solid-state imaging device or the charge detection device as a member constituting the imaging device is not limited to the charge detection device or the charge transfer device. For example, as in the second modification shown in FIG. The proposed technology can be applied as well. Incidentally, the charge transfer device of the second modification has a configuration similar to, for example, a linear sensor. In other words, in the illustrated configuration, the charge detection units are arranged in a line in a straight line, in other words, one element unit is provided. A transfer register Reg is provided corresponding to each charge detection unit of the charge transfer unit. The final stage transfer register Reg is referred to as a final stage register LReg. The final stage register LReg is connected to the floating diffusion section 250 of the charge / electrical signal conversion section via the read gate ROG. A surplus charge sweeping unit is provided in parallel with the charge transfer unit. In such a structure, the technique proposed in the above embodiment can be similarly applied to the connection structure between the charge transfer path provided in the linear sensor and the charge input section of the charge / electrical signal conversion section. For example, if necessary, small signal barriers 220 for collecting charges at the time of small signal transfer are provided at several stages on the final stage side of the charge transfer unit, and the charge output unit side outlet of the small signal barrier 220 is charged. You may arrange | position in the position facing a part.

[Third Modification]
Alternatively, as in the third modification shown in FIG. 11, the technique proposed in the above embodiment can be similarly applied to a single charge transfer device. For example, in the first example shown in FIG. 11A, the charge generation unit (an example of the charge detection unit) may be regarded as a configuration that also serves as the charge output unit, or a read gate and a reset gate (charge / electricity not shown). (Provided in the signal conversion unit 16) may be regarded as a charge output unit. In the illustrated configuration, one charge generation unit is connected to the floating diffusion unit 250 of the charge / electrical signal conversion unit via the read gate ROG. A surplus charge sweeping unit is provided in parallel with the charge generation unit and the readout gate ROG. In such a structure, the technique proposed in the above embodiment can be similarly applied to the connection structure between the charge transfer path provided in the linear sensor and the charge input section of the charge / electrical signal conversion section. For example, if necessary, small signal barriers 220 for collecting charges at the time of small signal transfer are provided at several stages on the final stage side of the charge transfer unit, and the charge output unit side outlet of the small signal barrier 220 is charged. You may arrange | position in the position facing a part.

  On the other hand, the second example shown in FIG. 11B is a form in which the charge transfer unit is used for delaying an analog signal (shift register that handles an analog amount), and is applied as a CCD delay line, for example. At one end (right side in the figure) of the transfer register Reg in the charge transfer unit, there is an electric signal / charge conversion unit that converts an electric signal into charge, and an injection gate that injects the converted charge into the charge transfer unit. Is provided. The other end (left side in the figure) of the transfer register Reg in the charge transfer unit is connected to the floating diffusion unit 250 of the charge / electrical signal conversion unit via the read gate ROG. If necessary, small signal barriers for collecting charges at the time of small signal transfer are provided for several stages on the final stage side of the charge transfer unit, and the exit on the charge output unit side of the small signal barrier is opposed to the charge input unit. You may arrange in a position. The charge input through the injection gate is taken out from the opposite end with a delay corresponding to the number of transfers corresponding to the number of elements in the transfer register, thereby operating as a delay line (delay line).

[Fourth Modification]
As in the fourth modification shown in FIG. 12, a charge is applied to each pixel of the element portion (or element area portion) in which the charge detection portion is arranged, such as a CMOS type linear sensor or an area sensor (CMOS image sensor). The technique proposed in the above embodiment can be similarly applied to the configuration in which the electric signal conversion unit is arranged. For example, in a CMOS image sensor, a plurality of pixels including a photoelectric conversion unit (an example of a charge detection unit) are arranged in a two-dimensional array. Each pixel includes, in addition to the photoelectric conversion unit, a number of components (for example, transistors) constituting a transfer gate unit, a reset gate unit, an amplification unit (an example of a charge / electric signal conversion unit), and the like. Have in the area. In such a structure, the technique proposed in the above embodiment can be similarly applied to the connection structure between the photoelectric conversion unit and the amplification unit. Incidentally, in this case, the photoelectric conversion unit may be regarded as a configuration that also serves as a charge output unit, or the transfer gate unit and the reset gate unit may be regarded as a charge output unit.

  For example, FIG. 12 is a simple circuit configuration diagram of the CMOS image sensor 1001 focusing on AD conversion (Analog to Digital Conversion) processing and CDS (Correlated Double Sampling) processing. As an AD conversion method, various methods are considered from the viewpoint of circuit scale, processing speed (high speed), resolution, etc. As an example, a reference signal comparison type, a slope integration type, a ramp signal comparison type, etc. The AD conversion method called is adopted. Since this method can realize an AD converter with a simple configuration, it has a feature that the circuit scale does not increase even if it is provided in parallel. In the reference signal comparison type AD conversion, the count operation effective period Ten is determined based on the time from the conversion start (comparison process start) to the conversion end (comparison process end) (here, a count enable indicating the period). The signal to be processed is converted into digital data based on the number of clocks in that period. This will be specifically described below.

  The unit pixel 1003 includes four transistors (a read selection transistor 1034, a reset transistor 1036, a vertical selection transistor 1040, and an amplification transistor 1042) in addition to the charge generation unit 1032 as an example of the charge / electric signal conversion unit. It is provided as a basic element constituting a certain pixel signal generation unit 1005. The read selection transistor 1034 is driven by the transfer signal TRG. The reset transistor 1036 constituting the initialization unit is driven by a reset signal RST. The vertical selection transistor 1040 is driven by a vertical selection signal VSEL.

  The charge generation unit 1032 is an example of a detection unit that includes a light receiving element such as a photodiode. In the charge generation unit 1032, the anode of the light receiving element is connected to the reference potential Vss on the low potential side, and the cathode side is connected to the source of the read selection transistor 1034. The reference potential Vss may be the ground potential GND. Read selection transistor 1034 (transfer gate) has a drain connected to a connection node to which reset transistor 1036, floating diffusion 1038, and amplification transistor 1042 are connected. The reset transistor 1036 has a source connected to the floating diffusion 1038 and a drain connected to a reset power supply Vrd (usually shared with the power supply Vdd).

  For example, the vertical selection transistor 1040 has a drain connected to the source of the amplifying transistor 1042, a source connected to the pixel line 1051, and a gate (particularly referred to as a vertical selection gate SELV) connected to the vertical selection line 1052. The amplifying transistor 1042 has a gate connected to the floating diffusion 1038, a drain connected to the power supply Vdd, a source connected to the pixel line 1051 via the vertical selection transistor 1040, and the pixel line 1051 connected to the vertical signal line 1019. Connected. As another connection example, the drain of the vertical selection transistor 1040 may be connected to the power supply Vdd, the source may be connected to the drain of the amplification transistor 1042, and the source of the amplification transistor 1042 may be connected to the pixel line 1051.

  One end of the vertical signal line 1019 extends to the column portion 1026 side, and the read current source portion 1024 is connected to the path. The current source 1240 in each column of the operating current supply unit 1024 has a load MOS transistor with respect to the vertical column, and the gates are connected between the reference current source unit 1248 and the load MOS transistor that are commonly used in each column. Thus, a current mirror circuit is configured to function as a constant current source 1242 for the vertical signal line 1019. A source follower configuration is employed in which a substantially constant operating current (readout current) is supplied to the amplifying transistor 1042.

  The reference signal generation unit 1027 includes a DA conversion unit 1270 and a resistance unit 1340. Although not shown, the DA conversion unit 1270 includes a current source unit configured by a combination of constant current sources, a counter unit, an offset generation unit, a current source control unit, and a reference current source unit that sets a specified current I_0. It is an output type DA converter. A resistor 1340 having a resistance value R_1340 is connected to the current output terminal of the current source unit as a current-voltage converter. The current source unit, the current source control unit, and the resistance unit 1340 constitute a current-voltage conversion unit, and a voltage generated at a connection point between the current source unit and the resistance unit 1340 is used as the reference signal SLP_ADC.

  The vertical signal line 1019 of each column is connected to one terminal (an inverting input terminal in this example) of the comparison processing unit 1322. Accordingly, the pixel signal voltage Vx is supplied to the AD conversion unit 1250 of the column unit 1026 via the vertical signal line 1019. In the AD conversion unit 1250, the pixel signal voltage Vx read from the unit pixel 1003 to the vertical signal line 1019 is compared with the reference signal SLP_ADC by the comparison processing unit 1322 of the AD conversion unit 1250. Then, a counter control signal generation unit (not shown) operates the count processing unit 1351 based on the count enable signal EN, changes the reference signal potential while taking a one-to-one correspondence with the count operation, and generates the vertical signal line 1019. The pixel signal voltage Vx is converted into digital data.

  In the CMOS image sensor 1001 having such a structure, regarding a connection structure between the charge generation unit 1032 provided in the unit pixel 1003 and the floating diffusion 1038 (charge input unit) of the pixel signal generation unit 1005 (charge / electrical signal conversion unit), The technique proposed in the above embodiment can be similarly applied.

[Examples of application to other electronic devices]
FIG. 13 is a diagram illustrating an example of an electronic device to which the technique proposed in the present disclosure (the technique proposed in the embodiment) is applied.

  The charge detection device, the charge transfer device, the solid-state imaging device, or the imaging device proposed in the above embodiments is used in various electronic devices such as game machines, electronic books, electronic dictionaries, and mobile phones. The present invention can be applied to the case where the phenomenon of surplus charges overflowing in the charge input portion provided in FIG.

  For example, FIG. 13A illustrates an example of an external appearance in the case where the electronic device 600 is a television receiver 602 that uses a display module 604 (a liquid crystal display device or an organic EL display device) that is an example of an image display device. It is. The television receiver 602 has a structure in which a display module 604 is disposed in front of a front panel 603 supported by a pedestal 606, and a filter glass 605 is provided on the display surface. The television receiver 602 uses a CCD delay line (an example of a charge transfer device) (not shown), and in the signal delay processing using the CCD delay line, the technique proposed in the embodiment can be applied as it is. is there.

  FIG. 13B is a diagram illustrating an appearance example when the electronic apparatus 600 is a digital camera 612. The digital camera 612 includes a display module 614, a control switch 616, a shutter button 617, and others. The digital camera 612 is equipped with a solid-state imaging device (not shown), and the solid-state imaging device proposed in the embodiment or the technology of the imaging device can be applied as it is.

  FIG. 13C is a diagram illustrating an appearance example when the electronic apparatus 600 is a video camera 622. The video camera 622 is provided with an imaging lens 625 for imaging a subject in front of the main body 623, and further, a display module 624, a shooting start / stop switch 626, and the like are arranged. The video camera 622 is equipped with a solid-state imaging device (not shown), and the solid-state imaging device proposed in the above embodiment or the technology of the imaging device can be applied as it is.

  FIG. 13D illustrates an example of an external appearance when the electronic device 600 is a mobile phone 632. The cellular phone 632 is a foldable type, and includes an upper housing 633a, a lower housing 633b, a display module 634a, a sub display 634b, a camera 635, a connecting portion 636 (in this example, a hinge portion), a picture light 637, and the like. Yes. The technique of the solid-state imaging device or the imaging device proposed in the above embodiment can be applied as it is to the camera 635 of the mobile phone 632.

  FIG. 13E illustrates an example of an external appearance when the electronic apparatus 600 is a computer 642. The computer 642 includes a lower casing 643a, an upper casing 643b, a display module 644, a Web camera 645, a keyboard 646, and the like. And regarding the Web camera 645 of the computer 642, the technique of the solid-state imaging device or the imaging device proposed in the above embodiment can be applied as it is.

  DESCRIPTION OF SYMBOLS 1 ... Imaging device, 10 ... Solid-state imaging device, 11 ... Sensor part, 13 ... Vertical transfer part, 14 ... Imaging area, 15 ... Horizontal transfer part, 16 ... Charge-electric signal conversion part, 17 ... Charge input part, 2 ... Solid-state imaging device 210 ... Horizontal transfer path 211 ... Dummy horizontal transfer path 212 ... Horizontal transfer register 214 ... Last stage horizontal transfer register 220 ... Small signal barrier 222 ... Exit 230 ... Horizontal output gate 250 ... Floating Diffusion part 252 Floating diffusion part 270 Excess charge sweeping part 272 Horizontal overflow barrier 274 Horizontal overflow barrier 276 Horizontal overflow drain 278 Horizontal overflow drain 3 Imaging device module 4 ... Main unit 40 ... Timing signal generator 42 ... Driver 46 ... Dynamic power, 5 ... optical system, 6 ... signal processing system, 7 ... recording system, 8 ... display system, 9 ... control system

Claims (20)

An element unit in which a charge detection unit for detecting a charge generated based on a change in physical characteristics is arranged in a certain direction;
A transfer register corresponding to the charge detection unit, and a charge transfer unit configured to transfer charges by the transfer register;
A charge-electric signal converter that generates an electric signal corresponding to the amount of charge transferred by the charge transfer unit;
And
The charge transfer unit includes a charge output unit that outputs charge in a first direction that is a charge transfer direction,
The charge / electrical signal conversion unit has a charge input unit that receives charges input from the charge output unit,
The charge input unit is a solid-state imaging device arranged at a position shifted from a central part of the charge output unit in a second direction intersecting the first direction. A barrier that plays the role of collecting charges during small signal transfer is provided in the charge transfer unit,
The solid-state imaging device according to claim 1, wherein the outlet on the charge output portion side of the barrier is disposed at a position facing the charge input portion. The element unit has a charge detection unit arranged in series,
The charge transfer unit is provided for each column of the charge detection unit,
The solid-state imaging device according to claim 1, wherein the charge / electrical signal conversion unit generates an electric signal corresponding to the amount of charge transferred by the charge transfer unit of each column. The element part has a charge detection part arranged in a matrix,
The charge transfer unit is provided for each vertical column of the charge detection unit, and the vertical transfer unit transfers the charge output from the charge detection unit in the vertical direction, and the charge is transferred from the vertical transfer unit. It consists of a horizontal transfer unit that transfers in the horizontal direction,
The solid-state imaging device according to claim 1, wherein the charge / electrical signal conversion unit generates an electric signal corresponding to the amount of the charge transferred by the horizontal transfer unit. An element portion provided with a charge detection portion for detecting a charge generated based on a change in physical characteristics;
A charge / electrical signal conversion unit that has a charge input unit that receives a charge input from the charge detection unit and generates an electrical signal corresponding to the amount of the received charge;
And
The element unit includes a charge output unit that outputs the charge detected by the charge detection unit in the first direction, which is the charge transfer direction,
The charge / electrical signal conversion unit has a charge input unit that receives charges input from the charge output unit,
The charge input unit is disposed at a position shifted from the center of the charge detection unit in the second direction intersecting the first direction in which charge is input from the charge detection unit to the charge input unit. . In the element part, the charge detection parts are arranged in series or in a matrix,
The charge / electrical signal conversion unit is configured so that the charge input unit separately receives charges from the charge output unit corresponding to each charge detection unit, or the charge input unit corresponds to each charge detection unit. The solid-state imaging device according to claim 5, wherein the solid-state imaging device is configured to receive the charge from the output unit in a time-sharing manner and generates an electrical signal corresponding to the amount of charge received by each charge input unit. A surplus charge sweeping unit capable of sweeping away unnecessary charges from the charge output unit in the second direction is provided in parallel with the charge output unit,
The solid-state imaging according to any one of claims 1 to 6, wherein the charge input unit is disposed at a position shifted toward the surplus charge sweeping unit side from the central part of the charge output unit in the second direction. apparatus. The solid-state imaging device according to claim 7, wherein the surplus charge sweeping unit is disposed on a side opposite to the element unit of the charge output unit. The solid-state imaging device according to claim 7 or 8, wherein the surplus charge sweeping section is disposed on the element section side of the charge output section. 10. The solid-state imaging according to claim 7, wherein the element portion has a back-illuminated structure that takes in electromagnetic waves from a side opposite to the side on which the wiring layer is disposed with respect to the charge detection portion. apparatus. The distance P is longer than W / 5, where the width of the charge output portion in the second direction is 2 · W and the distance from the central portion of the charge output portion to the charge input portion in the second direction is P. The solid-state imaging device according to any one of claims 1 to 10. The solid-state imaging device according to claim 11, wherein the distance P is longer than 3 · W / 4. The distance in the first direction from the charge output unit to the charge input unit and the distance in the second direction from the position where the charge input unit is projected onto the charge output unit to the surplus charge sweeping unit are set to be approximately the same. The solid-state imaging device according to any one of claims 7 to 10. A charge output unit that outputs a charge detected by a charge detection unit that detects a charge generated based on a change in physical characteristics;
A charge / electrical signal conversion unit that has a charge input unit that receives a charge input from the charge output unit and generates an electrical signal corresponding to the amount of the received charge;
And
The charge input unit is disposed at a position shifted from the center of the charge output unit in the second direction intersecting the first direction in which charge is input from the charge output unit to the charge input unit. . A surplus charge sweeping unit capable of sweeping away unnecessary charges in the charge output unit in the second direction;
Further comprising
The charge detection device according to claim 14, wherein the charge input unit is disposed at a position shifted from the central part of the charge output unit in the second direction toward the surplus charge sweeping unit. A plurality of transfer registers, and a charge transfer unit that transfers charges by the transfer registers;
A charge-electric signal converter that generates an electric signal corresponding to the amount of charge transferred by the charge transfer unit;
And
The charge transfer unit includes a charge output unit that outputs charge in a first direction that is a charge transfer direction,
The charge / electrical signal conversion unit has a charge input unit that receives charges input from the charge output unit,
The charge transfer device is a charge transfer device arranged at a position shifted from the center of the charge output unit in the second direction intersecting the first direction. A surplus charge sweeping unit capable of sweeping unnecessary charges in the charge output unit in the second direction is provided in parallel with the plurality of transfer registers and the charge output unit,
The charge transfer device according to claim 16, wherein the charge input unit is disposed at a position shifted toward the surplus charge sweeping unit side with respect to the central portion of the charge output unit in the second direction. A barrier that plays the role of collecting charges during small signal transfer is provided in the charge transfer unit,
18. The charge transfer device according to claim 16, wherein the outlet on the charge output unit side of the barrier is disposed at a position facing the charge input unit. An element unit in which a charge detection unit for detecting a charge generated based on a change in physical characteristics is arranged in a certain direction;
A transfer register corresponding to the charge detection unit, and a charge transfer unit configured to transfer charges by the transfer register;
A charge-electric signal converter that generates an electric signal corresponding to the amount of charge transferred by the charge transfer unit;
An incident system that guides electromagnetic waves to the charge detector,
And
The charge transfer unit includes a charge output unit that outputs charge in a first direction that is a charge transfer direction,
The charge / electrical signal conversion unit has a charge input unit that receives charges input from the charge output unit,
The image pickup apparatus, wherein the charge input unit is disposed at a position shifted from a central part of the charge output unit in the second direction intersecting the first direction. An element unit in which a charge detection unit for detecting a charge generated based on a change in physical characteristics is arranged in a certain direction;
A transfer register corresponding to the charge detection unit, and a charge transfer unit configured to transfer charges by the transfer register;
A charge-electric signal converter that generates an electric signal corresponding to the amount of charge transferred by the charge transfer unit;
An electronic device comprising a solid-state imaging device having
The charge transfer unit includes a charge output unit that outputs charge in a first direction that is a charge transfer direction,
The charge / electrical signal conversion unit has a charge input unit that receives charges input from the charge output unit,
The electronic device in which the charge input unit is arranged at a position shifted from the central part of the charge output unit in the second direction intersecting the first direction.

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