JP2012147140A - Image processing apparatus, image formation apparatus, image processing method, image processing program and storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To appropriately detect existence of malfunction in image processing performed on image data in a plurality of image processing modules.SOLUTION: In each of image processing modules 17a-17n mounted on an image processing ASIC of an image formation apparatus, a hash calculation part 23 creates a feature amount from input image data, and a feature amount read-out part 22 reads a feature amount added to the image data from the image data input to each of the image processing modules 17a-17n. A comparison part 25 compares the feature amount created by the hash calculation part 23 and the feature amount read by the feature amount read-out part 22 to determine whether malfunction exists in the input image data. When determining that malfunction does not exist, a hash calculation part 27 creates a feature amount from image data image processed by an image processing part 26 and a feature amount addition part 29 adds the feature amount to the image data after the image processing.

Description

  The present invention relates to an image processing apparatus, an image forming apparatus, an image processing method, an image processing program, and a recording medium, and more specifically, a micro that appropriately determines whether or not there is an abnormality in image processing for image data in a plurality of image processing modules. The present invention relates to an image processing apparatus such as a computer, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an image forming apparatus, an image processing method, an image processing program, and a recording medium.

  In image processing apparatuses that process image data, such as multifunction devices, facsimile machines, copying machines, printers, computers, etc., the software and hardware configuration to be installed becomes large-scale and complicated as the functions become higher, causing problems. Although it has become difficult to investigate the cause of the occurrence, an immediate investigation of the cause is required in order to respond to market demands in a timely manner.

  Recently, a semiconductor integrated circuit for high-performance image processing, for example, an ASIC is mounted on the image processing apparatus, and the ASIC has a plurality of image processing modules mounted therein, and image processing is performed by these plurality of modules. Output the image data to the outside.

  However, the conventional ASIC only knows the states of the input image data and the output image data, and cannot grasp the state of the image data being processed in the ASIC. As a result, when the intended image data is not output, it is impossible to grasp which image processing module in the ASIC has the problem.

  Conventionally, regarding the identification of a cause location at the time of occurrence of an abnormal image, a CRC is calculated for each image processing module, and a failure location is identified by comparing with a calculation result value that is calculated and prepared in advance. There is.

  However, in this prior art, it is necessary to prepare the calculation result for each image processing module with respect to the original image data in advance, and if the image data is not a predetermined image data such as a test pattern, the abnormal image occurrence cause location is confirmed. I can't. As a result, there is a problem in that when a general image is processed by an actual apparatus such as an image forming apparatus, an abnormal image can not be dealt with.

  Conventionally, out of image data transferred through an image path between a plurality of image processing means, image data flowing through the image path between designated image processing means is extracted and debugged using a dedicated bus for debugging. A technique has been proposed (see Patent Document 1).

  However, in the above prior art, image data flowing through a designated image path out of a plurality of image paths is taken out and debugged using a dedicated bus for debugging, so that it is constituted by a semiconductor integrated circuit such as an ASIC. It is necessary to install an interface dedicated for debugging on the image processing apparatus, and it is impossible to compare and debug data values at multiple locations. In order to perform high debugging, it is necessary to improve, and it can be confirmed only with a fixed image such as a test pattern, etc., and it can not cope when an abnormal image occurs when printing a general image with a real machine, There was a problem.

  Therefore, the present invention can perform debugging with high accuracy and efficiency by checking the occurrence of abnormal image data in real time in each image processing module without using a dedicated debug interface. An object is to provide an image processing apparatus, an image forming apparatus, an image processing method, an image processing program, and a recording medium.

  In order to achieve the above object, the present invention generates a feature amount from image data input to each image processing module that performs image processing on the input image data in an appropriate order. The feature amount added to the image data is read from the input image data, and the generated feature amount is compared with the read feature amount to determine whether the input image data is abnormal. Is determined, the feature amount is generated from the image data after image processing, and the feature amount is added to the image data after image processing.

  In addition, the present invention may be characterized in that when it is determined that there is an abnormality in the image data, a signal notifying the occurrence of the abnormality is output to the outside.

  Furthermore, the present invention may be characterized in that each of the feature amounts generated from image data before image processing is held.

  Further, the present invention may be characterized in that the feature amount is a hash value related to the image data.

  Furthermore, the present invention may be characterized in that when it is determined that there is an abnormality in the image data, the image data is replaced with white data or pattern data specifying the image processing module to which the abnormal image data is input.

  According to the present invention, it is possible to confirm the occurrence of abnormal image data in real time in each image processing module without using a dedicated debug interface, and to perform debugging with high accuracy and efficiency. Can do.

1 is a block diagram of a main part of an image forming apparatus to which an embodiment of the present invention is applied. The block diagram of image processing ASIC. The block block diagram of an image processing module. The block block diagram of a hash calculation part. FIG. 4 is a diagram illustrating a flow of data processing in the image forming apparatus. The flowchart which shows the effective area calculation process of the image data by an effective area calculation part. The figure which shows the result determination timing in a data format and an effective area | region calculation part. The flowchart which shows a result determination process. The block block diagram of the image processing module in the case of judging abnormality by a check pattern. The figure which shows the example of the check pattern added to valid data. FIG. 6 is a diagram illustrating a flow of data processing in the image forming apparatus when an abnormality is determined using a check pattern.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In addition, since the Example described below is a suitable Example of this invention, various technically preferable restrictions are attached | subjected, However, The range of this invention is unduly limited by the following description. However, not all the configurations described in the present embodiment are essential constituent elements of the present invention.

  1 to 11 are diagrams showing an embodiment of an image processing apparatus, an image forming apparatus, an image processing method, an image processing program, and a recording medium according to the present invention. FIG. 1 shows an image processing apparatus and an image according to the present invention. 1 is a block diagram of a main part of an image forming apparatus 1 to which an embodiment of a forming apparatus, an image processing method, an image processing program, and a recording medium are applied.

  1, an image forming apparatus 1 includes an image reading unit 2, an image processing ASIC (Application Specific Integrated Circuit) 3, a hard disk (HDD) 4, a memory control unit 5, a CPU (Central Processing Unit) 6, an external I / F 7, A memory 8 and an image writing unit 9 are provided.

  For example, a line image sensor using a CCD (Charge Coupled Device) or a CIS (Contact Image Sensor) is used as the image reading unit 2, and generally includes an ADF (Auto Document Feeder). A plurality of originals are set in the ADF, and the ADF feeds the set originals one by one to the original reading position of the image reading unit 2. The image reading unit 2 scans a document conveyed from the ADF, reads an image of the document with a predetermined resolution, converts it into a digital image, and then converts it into RGB (R: red, G: green, B: blue) image data. Is output to the image processing ASIC 3.

  As will be described later, the image processing ASIC (image processing apparatus) 3 is equipped with a plurality of image processing modules, and via image data of a document sent from the image reading unit 2 and a network I / F (not shown). Various image processing for image data received from an external device of the computer, for example, image correction processing, gradation processing necessary for image formation by the image writing unit 9, image processing processing (magnification processing, rotation processing, editing processing) Etc.), image compression / decompression control processing, and HDD control for writing and reading image data to and from the hard disk 4 are performed.

  The hard disk 4 stores code data obtained by compressing image data, log data, a program of the image forming apparatus 1, and the like.

  The memory control unit 5 controls writing (writing) / reading (reading) of image data and other data to the memory 8.

  The memory 8 is composed of a RAM (Random Access Memory) or the like, and is used as a temporary storage of image data before compression, a temporary storage of code data that is compressed image data, a temporary storage of a program, and a work memory of the CPU 6. .

  The CPU 6 develops a program stored in the hard disk 4 or a ROM (Read Only Memory) (not shown) in the RAM 8 and controls the entire image forming apparatus 1 using the RAM 8 as a work memory based on the program. In addition to executing basic processing as the image forming apparatus 1, an image processing method for checking in real time whether or not an abnormal image has occurred in each image processing module of the image processing ASIC of the present invention is executed.

  That is, the image forming apparatus 1 includes a ROM, an EEPROM (Electrically Erasable and Programmable Read Only Memory), an EPROM, a flash memory, a flexible disk, a CD-ROM (Compact Disc Read Only Memory), a CD-RW (Compact Disc Rewritable), and a DVD. (Digital Versatile Disk), SD (Secure Digital) card, MO (Magneto-Optical Disc), etc. read a debug program for executing the image processing method of the present invention recorded on a computer-readable recording medium, By being installed in the hard disk 4 or the like, the image forming apparatus 1 is built with an image processing apparatus that executes an image processing method for confirming in real time whether or not an abnormal image has occurred in each image processing module of the image processing ASIC 3 described later. ing. This debug program is a computer-executable program written in a legacy programming language such as assembler, C, C ++, C #, Java (registered trademark) or an object-oriented programming language, and is stored in the recording medium. Can be distributed.

  The external I / F 7 is connected to a network such as a LAN (Local Area Network), and exchanges signals and data with an external device such as a computer connected to the network under the control of the CPU 6.

  The image writing unit 9 is, for example, an electrophotographic optical writing unit, and emits laser light modulated based on image data and a control signal transmitted from the image processing ASIC 3 from an LD (Laser Diode) to a photosensitive member. An electrostatic latent image is formed on the photoconductor. In other words, the image writing unit 9 is, for example, an optical writing unit of an electrophotographic plotter. The plotter includes various units necessary for forming an image on a sheet by an electrophotographic method in addition to the optical writing unit. Note that the plotter, that is, the image writing unit 9, is not limited to the electrophotographic system, but other image forming systems, for example, a thermal recording apparatus including a thermal element, an ink jet recording apparatus, or the like. There may be.

  As shown in FIG. 2, the image processing ASIC 3 includes an I / F (interface) 11, a feature amount reading unit 12, a hash calculation unit 13, a result holding register 14, a comparison unit 15, an interrupt control unit 16, and a plurality of The image processing modules 17a to 17n and the I / F 18 are mounted. In FIG. 2, a plurality of image processing modules 17 a to 17 n are shown connected in series. However, the image processing modules 17 a to 17 n are connected in parallel or combined in series and parallel. You may connect suitably.

  The image processing ASIC 3 receives image data and code data from the image reading unit 2, the hard disk 4, and the memory control unit 5, and the image processing ASIC 3 stores image data or code data image-processed by the image processing modules 17a to 17n. The data is output to the control unit 5 and the image writing unit 9.

  The I / F 11, the feature amount reading unit 12, and the hash calculation unit 13 receive image data and code data from the image reading unit 2, the hard disk 4, and the memory control unit 5, and the I / F 11 stores the input image data and The code data is output to the image processing modules 17a to 17n. The image data and code data include feature data as well as effective data.

  A feature amount reading unit (basic feature amount reading unit) 12 extracts feature amount data transmitted together with effective data from image data or code data, and outputs the feature amount data to the comparison unit 15.

  The hash calculation unit (basic feature value generation means) 13 is an image processing module 17a-17n to which image data is first input among the image processing modules 17a-17n mounted in series or in parallel in the image processing ASIC 3. And a hash value is calculated (generated) from valid data of image data input from the previous device, and the calculation result is stored in the result storage register 14.

  The result storage register 14 stores a hash value of valid data calculated by the hash calculation unit 13 and is read by the comparison unit 15 and the CPU 6.

  The comparison unit (basic determination unit) 15 compares the feature amount read by the feature amount reading unit 12 with the hash value calculated by the hash calculation unit 13 to determine whether or not an abnormality has occurred in the image data. The determination result is output to the interrupt control unit 16.

  If the comparison result of the comparison unit 15 is inconsistent, the interrupt control unit (notification unit) 16 outputs an interrupt signal for notifying abnormality detection (error) to the CPU 6 outside the image processing ASIC 3, and the CPU 6 Recognizing the occurrence of an abnormality in the image data, preset abnormality handling processing (for example, stopping printing, displaying the abnormality on the operation panel, converting the image data into predetermined data, etc.) is performed.

  The image processing modules 17a to 17n have a block configuration as shown in FIG. 3, and include a feature amount removal unit 21, a feature amount reading unit 22, a hash calculation unit 23, a result storage register 24, a comparison unit 25, and an image processing unit. 26, a hash calculation unit 27, a result storage register 28, a feature amount addition unit 29, and the like. Image data or code data, which is valid data including feature data, is input to the feature amount removal unit 21 and the hash calculation unit 23 of the image processing modules 17a to 17n from the previous image processing modules 17a to 17n or from the outside.

  The feature quantity removal unit (removal unit) 21 removes the feature quantity from the image data or the code data, outputs only the valid data to the image processing unit 26, and outputs the removed feature quantity data to the feature quantity reading unit 22. .

  The feature amount reading unit (feature amount reading unit) 22 reads the feature amount data removed by the feature amount removing unit 21 and outputs the feature amount data to the comparison unit 25.

  A hash calculation unit (pre-processing feature value generation means) 23 calculates (generates) a hash value of valid data from image data or code data, and outputs the calculation result to the result storage register 24.

  The result storage register (holding means) 24 stores a hash value of valid data calculated by the hash calculation unit 23 and is read by the comparison unit 25 and the CPU 6.

  The comparison unit (determination unit) 25 compares the feature amount read by the feature amount reading unit 22 with the hash value calculated by the hash calculation unit 23 to determine whether there is an abnormality in the image data. Then, an interrupt signal indicating abnormality detection is output to the interrupt control unit 16 and the feature amount adding unit 29. When an interrupt signal is input from the comparison unit 25, the interrupt control unit 16 outputs an interrupt signal indicating abnormality detection to the CPU 6 outside the image processing ASIC 3.

  The image processing unit 26 performs image processing on the effective data input from the feature amount removing unit 21 according to the register value set by the CPU 6, and the effective data after the image processing is added to the feature amount adding unit 29 and the hash. Output to the calculation unit 27.

  A hash calculation unit (post-processing feature value generation means) 27 calculates (generates) a hash value of valid data image-processed by the image processing unit 26, stores the calculation result in the result storage register 28, and adds a feature value. To the unit 29.

  The result storage register 14 stores a hash value of valid data after image processing calculated by the hash calculation unit 13 and is read out by the CPU 6.

  The feature amount adding unit (adding unit) 29 adds the hash value calculated by the hash calculating unit 27 to the effective data processed by the image processing unit 26 as a feature amount, and writes the image processing modules 17b to 17n in the subsequent stage or image writing. To the unit 9 or the memory control unit 5.

  Note that the image forming apparatus 1 deletes the feature amount by the image writing unit 9 and prints it out on a sheet by a plotter using only valid data. When the image forming apparatus 1 transmits image data to the external apparatus via the external I / F 7, the CPU 6 converts the image data to JPEG (Joint Picture Engineering Group), TIFF (Tagged Image File Format), or the like. At the time of conversion, the feature amount is deleted from the image data, and only valid data is converted into JPEG or TIFF and transmitted to the external device.

  The hash calculation units 13, 23, and 27 have a block configuration as shown in FIG. 4 and include an effective area calculation unit 31 and a CRC (Cyclic Redundancy Check) unit 32.

  The hash calculators 13, 23, and 27 include a clock, a line synchronization signal MFlag [1], an image end signal MFlag [0], image data SData, a data control signal MCmd, a data size data_size, a reset signal reset, and a data reset selection signal. clearmode is input, and among these signals, a clock other than image data SData, line synchronization signal MFlag [1], image end signal MFlag [0], data control signal MCmd, data size data_size, reset signal reset, and data reset selection The signal clearmode is input to the effective area calculation unit 31.

  The valid area calculation unit 31 generates a calculation target area signal Valid and a reset signal Clr from the input signals, that is, parameters and commands, and outputs them to the CRC unit 32.

  In addition to the calculation target region signal Valid and the reset signal Clr from the effective region calculation unit 31, the CRC unit 32 receives a clock, image data SData, and a data control signal MCmd, and based on these signals and the image data SData, A CRC 32-bit code is generated as a hash value. That is, the CRC unit 3 receives the data SData in a state where the calculation target region signal Valid is asserted with the calculation target region signal Valid, the data control signal MCmd, the image data SData, the clock and the reset signal Clr as input signals. Then, a CRC32 code of the input data string is generated, and the generation result is stored in the result storage registers 14, 24 and 28. When the reset signal reset is asserted, the hash calculators 13, 23, and 27 clear the data held in the CRC unit 32.

  The result storage registers (feature amount holding means) 14, 24, and 28 are outside the hash calculators 13, 23, and 27, are connected to the CRC unit 32, and hold the CRC 32 code output from the CRC unit 32.

  Next, the operation of this embodiment will be described. The image forming apparatus 1 according to the present embodiment enables debugging by checking in real time whether or not an abnormality has occurred in the image data input to each of the image processing modules 17a to 17n of the image processing ASIC 3.

  That is, as shown in FIG. 5, the image forming apparatus 1 sends the image data of the document read by the image reading unit 2 to the image processing ASIC 3, and the image processing ASIC 3 performs shading correction processing, printer correction as scanner image processing. Processing, color correction processing, and the like are performed and temporarily stored in the memory 8 via the memory control unit 5. The image forming apparatus 1 reads out the image data temporarily stored in the memory 8 from the memory 8 to the image processing ASIC 3 via the memory control unit 5 in order to store the image data in the hard disk 4 as a backup or the like when a jam occurs. One of the image processing modules 17a to 17n of the ASIC 3 functions as a compressor and is compressed as code data by a predetermined compression method, and is stored again in the memory 8 via the memory control unit 5, and is further stored in the image processing ASIC 3 One of the image processing modules 17 a to 17 n is caused to function as a hard disk controller (HDC), and code data is read from the memory 8 via the memory control unit 5 and stored in the hard disk 4.

  Further, when print data is sent from an external device, the image forming apparatus 1 receives the print data via the external I / F 7, and the CPU 6 translates the print data and stores the print data via the memory control unit 5. 8 is stored as drawing data. The image forming apparatus 1 causes one of the image processing modules 17a to 17n to function as a compressor, and sends the image data stored in the memory 8 to the image processing ASIC 3 via the memory 5, and uses a predetermined compression method. The data is compressed as code data, stored again in the memory 8 via the memory control unit 5, and further, one of the image processing modules 17a to 17n of the image processing ASIC 3 is made to function as a hard disk controller (HDC). The code data is read out from the memory 8 via 5 and stored in the hard disk 4.

  The image forming apparatus 1 functions as one of the image processing modules 17a to 17n as a hard disk controller (HDC) when the code data stored in the hard disk 4 is printed on a sheet by a plotter using the image writing unit 9. The code data is read out from the hard disk 4 and temporarily stored in the memory 8 via the memory control unit 5, and one of the image processing modules 17a to 17n is made to function as an expander and stored in the memory 8. The data is decoded (decompressed) into image data and temporarily stored in the memory 8 again.

  When performing image processing such as rotation on the decompressed image data, the image forming apparatus 1 causes one of the image processing modules 17a to 17n to function as a functional module that performs the image processing to be performed, for example, a rotator. Then, the image data in the memory 8 is read out via the memory control unit 5, subjected to image processing such as rotation, and temporarily stored in the memory 8 again.

  When performing the necessary image processing, the image forming apparatus 1 causes one of the image processing modules 17a to 17n to function as a plotter image processor, and the image data in the memory 8 is transferred to the image processing ASIC 3 via the memory control unit 5. , And image processing necessary for performing printing processing using a plotter, such as gradation processing and γ correction, is output to the image writing unit 9 by the plotter image processor. The image writing unit 9 emits a laser beam modulated based on the image data and control signal sent from the image processing ASIC 3 from the LD to the photosensitive member of the plotter to form an electrostatic latent image on the photosensitive member. In this case, the electrostatic latent image on the photosensitive member is developed with toner, the toner image is transferred onto the paper, the toner image transferred onto the paper is fixed onto the paper, and the image is formed on the paper.

  In addition, when the image forming apparatus 1 transfers the code data stored in the hard disk 4 to the external apparatus using the external I / F 7, the image forming apparatus 1 uses the code data stored in the hard disk 4 for image processing of the image processing ASIC 3. One of the modules 17 a to 17 n is caused to function as a hard disk controller (HDC), reads the code data from the hard disk 4, and temporarily stores it in the memory 8 via the memory control unit 5. The image forming apparatus 1 causes one of the image processing modules 17 a to 17 n to function as an expander, decodes (decompresses) the code data stored in the memory 8 into image data, and temporarily stores the code data in the memory 8 again. .

  The image forming apparatus 1 sends the image data in the memory 8 to the CPU 6 via the memory control unit 5, and the CPU 6 deletes the feature amount from the image data and performs image conversion (for example, JPEG or TIFF) necessary only for valid data. ) Etc., and then transmitted to the external device via the external I / F 7.

  In the image forming apparatus, as described above, each of the image processing modules 17a to 17n of the image processing ASIC 3 is connected to various modules and devices to perform various data processing. In this image processing, an abnormal image is generated. There are things to do. However, conventionally, the occurrence of this abnormal image is detected in real time, and whether the cause is a setting error caused by software, a malfunction of an image processing algorithm, or an image transfer abnormality due to external noise. It was difficult to identify the cause of the problem. In addition, when an abnormal image occurs during printing in large quantities, a sheet on which the abnormal image is printed is mixed into the printed matter, which may cause the reliability of the image forming apparatus 1 to be impaired.

  Therefore, the image forming apparatus 1 according to the present exemplary embodiment includes the feature amount reading unit 12, the hash calculation unit 13, and the comparison unit 15 in the image processing ASIC 3, and the feature amount transmitted from the outside of the image processing ASIC 3 together with the effective data. An abnormality is determined based on the data, and if it is determined that there is an abnormality, an interrupt signal is generated in the interrupt control unit 16 and notified to the CPU 6. Each of the image processing modules 17a to 17n of the image processing ASIC 3 includes a feature amount reading unit 22, a hash calculation unit 23, and a comparison unit 25, and feature amount data sent to the image processing modules 17a to 17n together with effective data. If an abnormality is determined based on the above, and it is determined that there is an abnormality, an interrupt signal is sent to the interrupt control unit 16 to cause the CPU 6 to output an interrupt signal. Further, each of the image processing modules 17a to 17n of the image processing ASIC 3 includes a feature amount removal unit 21, a hash calculation unit 27, and a feature amount addition unit 29, and extracts only valid data from valid data to which feature amount data is added. In addition to performing the necessary image processing, the feature amount generated (calculated) by the hash calculation unit 27 is added to the image data after the image processing and output to the next stage.

  The hash calculation units 13, 23, and 27 include an effective region calculation unit 31 and a CRC unit 32. The effective region calculation unit 31 calculates the calculation target region signal Valid and the reset signal Clr of the CRC unit 32 from parameters and commands. Is generated and output to the CRC unit 32. The CRC unit 32 receives the calculation target region signal Valid, the reset signal Clr, the data control signal MCmd, the image data SData, and the clock from the effective region calculation unit 31 as input signals, and the calculation target region signal Valid is asserted. When the data SData is input, a CRC32 code of the input data string is generated, and the generation result is stored in the result storage registers 14, 24, and 28. When the reset signal reset is asserted, the hash calculators 13, 23, and 27 clear the data held in the CRC unit 32.

  The operation processing flow of the effective area calculation unit 31 of the hash calculation units 13, 23, and 27 can be shown as shown in FIG. 6. When the effective area calculation unit 31 starts the operation, first, the data counter x stores “ "0" is set (step S101), and it is checked whether the data control signal MCmd is a write command (step S102). That is, the effective area calculation unit 31 starts the operation with a data control signal MCmd based on OCP (Open Core Protocol) being transmitted as a “WR command” (write command).

  When the data control signal MCmd is in an idle state in step S102, the valid area calculation unit 31 repeatedly performs the process of checking whether the data control signal MCmd is a write command, and when the data control signal MCmd becomes a write command. Then, the calculation target area signal Valid is asserted, the data counter x is counted up, and it is checked whether the data counter x exceeds the transfer data size-4 (data_size-4) (step S103). That is, as shown in FIG. 7A, since the transferred data includes 4 bytes of data as the feature data, the effective data size is the transfer data (image data or code data). Is subtracted (−4) by the amount of feature data (4 bytes).

  If the data counter x is less than the transfer data size −4 (data_size−4) in step S103, the valid area calculation unit 31 sets the calculation target area signal Valid to “true” (step S104), and the data counter x Is incremented (x = x + 1) (step S105), and it is checked whether the line synchronization signal MFlag [1] is eol (End of Line) or the image end signal MFlag [0] is eof (step S106).

  In step S103, if the data counter x is equal to or larger than the transfer data size −4 (data_size−4), the valid area calculation unit 31 sets the calculation target area signal Valid to “false” (step S107), and the line It is checked whether the synchronization signal MFlag [1] is eol (End of Line) (step S106).

  When the line synchronization signal MFlag [1] is not eo in step S106, the effective area calculation unit 31 returns to step S101 and performs the same processing as above (steps S101 to S107). In step S106, the line synchronization signal If MFlag [1] is eol, it is checked whether the image end signal MFlag [0] is eof (step S108).

  If the image end signal MFlag [0] is not eof in step S108, the effective area calculation unit 31 returns to step S101 and performs the same processing (steps S101 to S108). In step S108, the image end signal MFlag [0] If [0] is eof, it is checked whether the data reset selection signal clearmode is “1” (step S109).

  When the data reset selection signal clearmode is not “1” in step S109, the effective area calculation unit 31 returns to step S101 and performs the same processing as above (steps S101 to S109). In step S109, the data reset selection signal clearmode If “1” is “1”, the reset signal reset to the CRC unit 32 is asserted, the process returns to step S101, and the same processing is performed (steps S101 to S110). That is, the effective area calculation unit 31 sets the data counter x when the line synchronization signal MFlag [1] is asserted or the image end signal MFlag [0] is asserted in steps S106 and S108 to S110. Reset is performed, but if the line synchronization signal MFlag [1] and the image end signal MFlag [0] are not asserted and the data reset selection signal clearmode is “1”, a pulse of the reset signal reset is transmitted to the CRC unit 32. Then, the data counter x is reset.

  That is, the transfer data (image data or code data) sent from the previous stage is obtained by adding 4 bytes of feature data to the effective data as shown in FIG. It is transmitted / received between 17a-17n and between image processing modules 17n-I / F18. Here, the type of transfer data size (data_size) to be set includes a line-unit data size (when line processing is performed: image data, etc.), a page-unit data size (code data, etc.), and a block-unit data size ( Divided code data, transfer data to the hard disk 4, and the like). As shown in FIG. 7B, in the CRC32 code, the calculation target area signal Valid in the transfer unit is determined by negation, and the feature amount data is extracted by the char_wind signal (feature amount reading signal in the transfer unit). ) To confirm. Further, the effective area calculation unit 31 compares the feature amounts at the negation timing of the image end signal MFlag [0] (eof signal) or the line synchronization signal MFlag [1] (eol signal) of the data in the transfer unit. The comparison result is notified to the interrupt control unit 16 as an interrupt signal.

  The image processing modules 17a to 17n perform the inspection process as shown in FIG. 8, but the image processing modules 17a to 17n will be described below as they are the same in the image processing ASIC 3. That is, in the image processing modules 17a to 17n, as shown in FIG. 8, when the hash calculation unit 23 generates a CRC32 code (step S201), the comparison unit 25 reads feature amount data from the feature amount reading unit 22. (Step S202), the hash calculation unit 23 checks whether the CRC32 code calculated and stored in the result storage register 24 matches the feature data (Step S203).

  If the CRC32 code matches the feature amount data in step S203, the comparison unit 25 assumes that no abnormality has occurred, clears the CRC32 code (step S204), returns to step S201, and performs the same processing as above. This is performed (steps S201 to S204).

  If the CRC32 code and the feature data are different in step S203, it is determined that an abnormality has occurred, and an error (error) interrupt is generated in the interrupt control unit 16 (step S205), and the image forming apparatus 1 has a preset abnormality. Corresponding processing is executed (step S206).

  The error handling process after the occurrence of the error interrupt includes, for example, error display on the operation panel, stop of the printing process, stop of transmission of image data, stop of reading of the document by the image reading unit 2, and error to the operation panel. Display of location, storage of error information to hard disk 4, suppress toner consumption, and make it possible to visually check the timing of error occurrence. In order to make it possible to visually check the image processing modules 17a to 17n, a process of replacing the image data after the error occurrence time with a pattern specific to the image processing modules 17a to 17n is performed. In this case, the image data replacement process is performed by the feature amount adding unit 29 of each of the image processing modules 17a to 17n under the control of the CPU 6.

  In the above description, the presence / absence determination of image data abnormality is performed using the CRC32 code. However, the abnormality occurrence presence / absence determination is not limited to the method using the CRC32 code. For example, the image processing module 17a 9 to 17n are equipped with a pattern reading unit 41, a comparison unit 42, a result storage register 43, a MUX (multiplexer) 44, etc., as shown in FIG. The presence or absence may be determined.

  That is, in FIG. 9, the image processing modules 17a to 17n receive image data Dg in which the check pattern Pt is added to the effective data Da as shown in FIG. 10 from the preceding device or the image processing modules 17a to 17n-1. Is input to the image processing unit 26 and the pattern reading unit 41.

  As the check pattern Pt, for example, as shown in FIG. 10, a pattern composed of white 4 bytes and black 4 bytes in the main scanning direction can be used. As shown in FIG. 10A, the main scanning of the effective data Da is performed. It is added to the rear end of the direction, or as shown in FIG. 10B, it is added to the front end of the effective data Da in the main scanning direction. However, when adding the black and white check pattern Pt, in order to prevent the influence of image processing, a white pattern is arranged closer to the effective data Da and a black pattern is arranged farther from the effective data Da.

  The pattern size can be set according to the bus width of the image forming apparatus 1, and FIG. 10 shows a check pattern Pt when the data bus width is 64 bits and black and white is 4 bytes. When the data bus width is 128 bits, the check pattern Pt is white 8 bytes + black 8 bytes.

  The image processing unit 26 receives the image data Dg in which the check pattern Pt is added to the valid data Da. The image processing unit 26 does not distinguish between the valid data Da and the check pattern Pt, and the image data Dg of all regions. The image processing is performed and output to the MUX 44. Regarding the check pattern Pt, the image writing unit 9 deletes the check pattern Pt when the printing process is performed, and the CPU 6 deletes the check pattern Pt when the transfer process is performed. .

  In the detection pattern setting register 33, the check pattern Pt added to the valid data Da is set by the CPU 6 and output to the comparison unit 42.

  The pattern reading unit 41 reads the check pattern Pt from the input image data Dg and outputs it to the comparison unit 42. The comparison unit 42 checks the check pattern Pt from the pattern reading unit 41 and the check from the detection pattern setting register 33. When the patterns Pt are compared and they do not match, an interrupt signal is output to the interrupt control unit 16 and the MUX 44 to notify an error.

  When there is an error notification from the comparison unit 42 as an interrupt signal, the MUX 44 replaces the image data Dg input from the image processing unit 26 with white data or module specific pattern data that can specify the image processing modules 17a to 17n. Output to stage.

  In FIG. 9, among the image processing modules 17a to 17n for performing image processing, for example, input image data of a compressor, input / output image data of a rotator, output image data of a decompressor, input / output of an image editor For the image data and the input / output image data of the image processor for the plotter, the presence / absence of occurrence of abnormality is determined based on the check pattern Pt. However, the check pattern Pt itself is also encoded for the module that handles the code data. Not applicable.

  When the check pattern Pt is used as described above, the image forming apparatus 1 adds the check pattern Pt to the image data (valid data) Dg as shown in FIG. 11, and the image data to which the check pattern Pt is added. Image processing is performed using Dg as an image processing target, and whether or not an abnormality has occurred is determined based on whether the check pattern Pt matches the reference check pattern Pt. FIG. 11 shows a processing flow in the case of performing print processing by printing the print data sent from the external device. In the following description, the print data sent from the external device is processed. Although the case of printing will be described, the same applies to the case of image data of a document read by the image reading unit 2.

  That is, as shown in FIG. 11, the image forming apparatus 1 receives print data sent from an external apparatus by an external I / F 7, and the CPU 6 translates the print data and passes through the memory control unit 5. It is stored in the memory 8 as drawing data. The image forming apparatus 1 generates a check pattern Pt by the pattern generator of the image processing ASIC 3 and adds it to the drawing data in the memory 8 as shown in FIG.

  The image forming apparatus 1 causes one of the image processing modules 17 a to 17 n of the image processing ASIC 3 to function as a compressor, and sends the image data Dg to which the check pattern Pt is added to the image processing ASIC 3 via the memory 5. The data is compressed into code data by a predetermined compression method, stored again in the memory 8 via the memory control unit 5, and one of the image processing modules 17a to 17n of the image processing ASIC 3 functions as a hard disk controller (HDC). The code data is read from the memory 8 via the memory control unit 5 and stored in the hard disk 4.

  The image forming apparatus 1 causes one of the image processing modules 17a to 17n to function as a hard disk controller (HDC) when the code data stored in the hard disk 4 is printed on a sheet by a plotter using the writing unit 9. The code data is read out from the hard disk 4 and temporarily stored in the memory 8 via the memory control unit 5. One of the image processing modules 17 a to 17 n functions as an expander and is stored in the memory 8. Is decoded (decompressed) into image data Dg and temporarily stored in the memory 8 again.

  When performing image processing such as rotation on the decompressed image data Dg, the image forming apparatus 1 causes one of the image processing modules 17a to 17n to function as a functional module that executes the image processing to be performed, for example, a rotator. Then, the image data Dg in the memory 8 is read out via the memory control unit 5, subjected to image processing such as rotation, and temporarily stored in the memory 8 again.

  When performing the necessary image processing, the image forming apparatus 1 causes one of the image processing modules 17 a to 17 n to function as a plotter image processor, and reads the image data Dg to the image processing ASIC 3 via the memory control unit 5. The plotter image processor performs image processing necessary for printing processing such as gradation processing and γ correction, and then outputs the processed image to the image writing unit 9. The image writing unit 9 emits laser light modulated based on the image data Dg sent from the image processing ASIC 3 and the control signal from the LD to the photoconductor of the plotter to form an electrostatic latent image on the photoconductor, The plotter sequentially develops the electrostatic latent image on the photosensitive member with toner, transfers the toner image onto the paper, and fixes the transferred toner image onto the paper to form an image on the paper.

  In addition, when the image forming apparatus 1 transfers the code data stored in the hard disk 4 to the external apparatus using the external I / F 7, the image forming apparatus 1 uses the code data stored in the hard disk 4 for image processing of the image processing ASIC 3. One of the modules 17 a to 17 n is caused to function as a hard disk controller (HDC), reads the code data from the hard disk 4, and temporarily stores it in the memory 8 via the memory control unit 5. The image forming apparatus 1 causes one of the image processing modules 17 a to 17 n to function as an expander, decodes (decompresses) the code data stored in the memory 8 into image data Dg, and temporarily stores the code data in the memory 8 again. To do.

  The image forming apparatus 1 sends the image data Dg in the memory 8 to the CPU 6 via the memory control unit 5, and the CPU 6 converts only valid data from which the feature amount has been deleted from the image data into JPEG or TIFF), etc. Transmit to the external device via the I / F 7.

  Then, when image processing is performed on the image data Dg by the image processing modules 17a to 17n of the image processing ASIC 3, it is determined whether an abnormality has occurred in the image processing based on the check pattern Pt. When this is detected, an interrupt signal is sent to the interrupt control unit 16 to issue an interrupt signal from the interrupt control unit 16 to the CPU 6, or the MUX 44 replaces the image data Dg with white data or a module specific pattern.

  As described above, in the image forming apparatus 1 according to the present embodiment, the image processing ASIC 3 includes a plurality of image processing modules 17a to 17n that perform image processing on input image data in an appropriate order. In the modules 17a to 17n, the hash calculation unit 23 generates a feature amount from the input image data, and the feature amount reading unit 22 uses the image data input to the image processing modules 17a to 17n. The feature amount added to the image data is read. Then, the comparison unit 25 of each of the image processing modules 17a to 17n compares the feature amount generated by the hash calculation unit 23 with the feature amount read by the feature amount reading unit 22, and determines whether there is an abnormality in the input image data. When it is determined that there is no abnormality, the hash calculation unit 27 generates a feature amount from the image data image-processed by the image processing unit 26, and the feature amount addition unit 29 adds the feature amount to the image data after the image processing. It is added.

  Therefore, without using a dedicated debug interface, each image processing module 17a to 17n inspects the feature amount data sent together with the image data from the previous stage, thereby obtaining image data for each image processing module 17a to 17n. Whether or not there is an abnormality can be determined appropriately and in real time, and debugging can be performed with high accuracy and efficiency.

  In the image processing ASIC 3 of the image forming apparatus 1 according to the present embodiment, when the comparison unit 25 determines that there is an abnormality in the image data, the interrupt control unit 16 outputs an interrupt signal for notifying the occurrence of the abnormality to the external CPU 6.

  Accordingly, the CPU 6 recognizes that an abnormality has occurred in the image data due to the interrupt signal, displays an error on the operation panel, stops the printing process, stops transmitting the image data, stops reading the document by the image reading unit 2, Display error locations on the operation panel, save error information to the hard disk 4, reduce toner consumption, and make it possible to visually check the timing of error occurrence. In order to make it possible to visually confirm the image processing modules 17a to 17n in which the replacement and the error have occurred, necessary abnormality handling processing such as replacement processing of image data after the error occurrence to a pattern specific to the image processing modules 17a to 17n is performed. It is possible to improve the usability.

  Further, the image processing ASIC 3 of the image forming apparatus 1 according to the present embodiment includes a result holding register 24 that holds the feature amounts generated from the image data before the image processing by each of the image processing modules 17a to 17n.

  Therefore, by reading the feature value data held in the result holding register 24 by a debugging device or the like, it is possible to easily analyze at which stage an abnormality has occurred.

  Further, the image processing ASIC 3 of the image forming apparatus 1 of the present embodiment uses a hash value related to image data as a feature amount.

  Therefore, highly accurate debugging processing can be performed with a small amount of data.

  Further, in the image processing ASIC 3 of the image forming apparatus 1 according to the present embodiment, when each of the image processing modules 17a to 17n determines that the comparison unit 25 has an abnormality, the interrupt control unit 16 generates an interrupt signal for notifying the occurrence of the abnormality. In addition, the feature amount adding unit 29 replaces the image data with white data or pattern data for specifying the image processing modules 17a to 17n to which the abnormal image data is input.

  Therefore, it is possible to prevent the influence of image processing of abnormal image data, and to analyze at which stage an abnormality has occurred appropriately and with high accuracy.

  Further, the image processing ASIC 3 of the image forming apparatus 1 according to the present embodiment is input to the hash calculation unit (basic feature amount generation unit) 13 that generates a feature amount from the image data input to the image processing ASIC 3 and the image processing ASIC 3. A feature amount reading unit (basic feature amount reading unit) 12 that reads a feature amount added to image data from image data, a feature amount generated by the hash calculation unit 13 and a feature amount read by the feature amount reading unit 12 are compared. When the comparison unit 15 (basic determination unit) 15 that determines whether there is an abnormality in the image data and the comparison unit 15 determine that there is an abnormality, an interrupt control unit 16 that outputs an interrupt signal for notifying the occurrence of the abnormality to the external CPU 6 is provided. Yes.

  Therefore, it is possible to appropriately determine whether or not there is an abnormality in the image data by inspecting the feature amount sent together with the image data input from the preceding device to the image processing ASIC 3 itself without using a dedicated debug interface. The determination can be made in real time, and debugging can be performed with high accuracy and efficiency.

  In addition, the image processing ASIC 3 of the image forming apparatus 1 according to the present embodiment causes one of the image processing modules 17a to 17n to function as a pattern adding unit with respect to input image data to check pattern data (predetermined Pattern data), the pattern data is held in the detection pattern setting register (holding means) 33, and the check pattern data is added to the check pattern data input to the image processing modules 17a to 17n. Is read by the pattern reading unit 31. Then, each of the image processing modules 17 a to 17 n compares the check pattern data held in the detection pattern setting register 33 with the check pattern data read by the pattern reading unit 31, and the comparison unit 32 determines whether there is an abnormality in the image data.

  Therefore, whether or not there is an abnormality in the image data can be determined appropriately and in real time based on the check pattern set as appropriate, and debugging can be performed with high accuracy and efficiency.

  Further, in the image processing ASIC 3 of the image forming apparatus 1 according to the present embodiment, when the comparison unit 32 determines that there is an abnormality, the interrupt control unit 16 notifies the external CPU 6 of an interruption signal for notifying the occurrence of the abnormality, and the MUX 34 The image data is replaced with white data or pattern data specifying the image processing modules 17a to 17n to which the abnormal image data is input.

  Therefore, it is possible to prevent the influence of image processing of abnormal image data, and to analyze at which stage an abnormality has occurred appropriately and with high accuracy.

  The invention made by the present inventor has been specifically described based on the preferred embodiments. However, the present invention is not limited to that described in the above embodiments, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.

  The present invention relates to a semiconductor integrated circuit such as an image processing ASIC that performs image processing with a plurality of image processing modules, a composite apparatus including the semiconductor integrated circuit, an image forming apparatus such as a copying apparatus, an image processing method, an image processing program, and a recording medium. Can be used.

DESCRIPTION OF SYMBOLS 1 Image forming apparatus 2 Image reading part 3 Image processing ASIC
4 Hard disk (HDD)
5 Memory control unit 6 CPU
7 External I / F
8 Memory 9 Image writing unit 11 I / F
12 Feature value reading unit 13 Hash calculation unit 14 Result holding register 15 Comparison unit 16 Interrupt control unit 17a to 17n Image processing module 18 I / F
DESCRIPTION OF SYMBOLS 21 Feature-value removal part 22 Feature-value reading part 23 Hash calculation part 24 Result storage register 25 Comparison part 26 Image processing part 27 Hash calculation part 28 Result storage register 29 Feature-value addition part 31 Effective area calculation part 32 CRC part 41 Pattern reading part 42 Comparison Unit 43 Result Save Register 44 MUX

JP 2007-43571 A

Claims (12)

In an image processing apparatus in which a plurality of image processing modules perform predetermined image processing in an appropriate order and output the input image data,
Pre-process feature quantity generating means for generating a feature quantity from image data input to each of the image processing modules;
Removing means for removing feature values added to the image data from the image data input to the image processing modules;
Feature quantity reading means for reading the feature quantity removed by the removing means;
A determination unit that compares the feature amount generated by the pre-processing feature amount generation unit with the feature amount read by the feature amount reading unit to determine whether the image data is abnormal;
A post-processing feature quantity generating means for generating a feature quantity from image data that has been subjected to image processing after the feature quantity has been removed by the removing means;
When the determination unit determines that there is no abnormality, an addition unit that adds the feature amount generated by the post-processing feature amount generation unit to the image data after image processing;
An image processing apparatus comprising: The image processing apparatus includes:
The image processing apparatus according to claim 1, further comprising: a notification unit that outputs a signal for notifying the occurrence of an abnormality when the determination unit determines that there is an abnormality. The image processing apparatus includes:
The image processing apparatus according to claim 1, further comprising a feature amount holding unit that holds the feature amount generated by each of the pre-processing feature amount generation units.   The image processing apparatus according to claim 1, wherein the feature amount is a hash value related to the image data. The image processing apparatus includes:
When the determination means determines that there is an abnormality, it further comprises data replacement means for replacing the image data with white data or pattern data for specifying the image processing module to which the abnormal image data is input. The image processing apparatus according to claim 1. The image processing apparatus includes:
Basic feature value generating means for generating a feature value from image data input to the image processing device;
Basic feature amount reading means for reading a feature amount added to the image data from the image data input to the image processing apparatus;
Basic determination means for comparing the feature quantity generated by the basic feature quantity generation means with the feature quantity read by the basic feature quantity reading means to determine whether the image data is abnormal;
When the basic determination means determines that there is an abnormality, basic notification means for outputting a signal to notify the occurrence of abnormality to the outside,
The image processing apparatus according to claim 1, further comprising: In an image processing apparatus in which a plurality of image processing modules perform predetermined image processing in an appropriate order and output the input image data,
Pattern adding means for adding predetermined pattern data to the input image data;
Holding means for holding the pattern data;
Pattern reading means for reading the pattern data from the image data added with the pattern data input to each of the image processing modules;
A determination unit that compares the pattern data held by the holding unit with the pattern data read by the pattern reading unit to determine whether the image data is abnormal;
An image processing apparatus comprising: The image processing apparatus includes:
When the determination means determines that there is an abnormality, a notification means for outputting a signal notifying the occurrence of abnormality to the outside,
When the determination unit determines that there is an abnormality, the data replacement unit replaces the image data with white data or pattern data specifying the image processing module to which the abnormal image data is input;
The image processing apparatus according to claim 7, further comprising: In an image forming apparatus for forming an image on a recording medium based on at least the image data after performing predetermined image processing on an input image data with an image processing apparatus equipped with a plurality of image processing modules.
An image forming apparatus comprising the image processing apparatus according to claim 1 as the image processing apparatus. An image processing method in an image processing apparatus in which a plurality of image processing modules perform predetermined image processing in an appropriate order on input image data, and output the image data.
A pre-process feature quantity generation processing step for generating a feature quantity from image data input to each of the image processing modules;
A removal processing step of removing feature amounts added to the image data from the image data input to the image processing modules;
A feature amount reading processing step for reading the feature amount removed in the removal processing step;
A determination processing step of comparing the feature amount generated in the pre-processing feature amount generation processing step with the feature amount read in the feature amount reading processing step to determine whether there is an abnormality in the image data;
A post-processing feature value generation processing step for generating a feature value from image data that has been subjected to image processing after the feature value has been removed in the removal processing step;
When it is determined that there is no abnormality in the determination processing step, an addition processing step of adding the feature amount generated in the post-processing feature amount generation processing step to the image data after image processing;
An image processing method characterized by comprising: An image processing program installed in an image processing apparatus that outputs a plurality of image processing modules that perform predetermined image processing in an appropriate order on input image data,
On the computer,
Pre-processing feature value generation processing for generating feature values from image data input to each of the image processing modules;
A removal process for removing a feature amount added to the image data from the image data input to each of the image processing modules;
A feature reading process for reading the feature removed by the removal process;
A determination process for comparing the feature quantity generated in the pre-process feature quantity generation process with the feature quantity read in the feature quantity reading process to determine whether the image data is abnormal;
A post-processing feature value generation process that generates a feature value from image data that has undergone image processing after the feature value has been removed in the removal process;
When it is determined that there is no abnormality in the determination process, an addition process for adding the feature quantity generated in the post-process feature quantity generation process to the image data after the image process;
An image processing program for executing   A computer-readable recording medium on which the image processing program according to claim 11 is recorded.

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