JP2012083728A - Driving method for input/output device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve contrast of a display image.SOLUTION: Each of a plurality of photodetection circuits generates first optical data. An image processing circuit generates image data using the first optical data, and stores the image data in a memory circuit. A CPU reads out the image data from the memory circuit, and inputs the image data into an input output section as image signal. The input output section generates a display data signal from the image signal. The generated display data signal is inputted into a display circuit. While the display circuit is in a displaying state based on the image data, each of the plurality of photodetection circuits generates second optical data.

Description

One embodiment of the present invention relates to an input / output device.

In recent years, technological development of an apparatus (also referred to as an input / output apparatus) having a function of outputting information and a function of inputting information by incidence of light has been advanced.

The input / output device includes a plurality of display circuits arranged in a matrix direction and a plurality of photodetection circuits (also referred to as photosensors) in the pixel unit, and detects the illuminance of light incident on the photosensor to thereby detect the pixel unit An input / output device having a function (also referred to as a coordinate detection function) for detecting the coordinates of an object to be read superimposed on the image and a function (reading function) for generating image data of the object to be read (for example, Patent Document 1). For example, a function as a touch panel can be added to the input / output device by a coordinate detection function. The reading function can add a function as a scanner to the input / output device, and an image based on image data generated by the reading function can be displayed in the pixel portion.

JP 2010-109467 A

The conventional input / output device has a problem that the contrast of the image read by the reading function is low.

For example, in a conventional input / output device, an object to be read is read with a maximum light transmittance in the display circuit. In this case, the light reflected by the object to be read is easily incident on the light detection circuit as it is, but the contrast in, for example, a black image portion is lowered.

An object of one embodiment of the present invention is to improve the contrast of a display image when a read image is displayed on a pixel portion.

According to one embodiment of the present invention, first light data corresponding to the illuminance of incident light is generated by a light detection circuit, image data is generated using the first light data, and the image data generated by the display circuit is generated. The second optical data corresponding to the illuminance of the incident light is generated by the light detection circuit while displaying the image based on the pixel portion. Thereby, the reading operation of the reading object is performed while controlling the illuminance of the light incident on the light detection circuit to a value corresponding to the image, and the contrast of the read image is improved.

One embodiment of the present invention includes an input / output unit including a pixel portion, an image processing circuit, a storage circuit storing a plurality of programs, and a data processing unit including a CPU. The pixel portion has a display selection signal A display data signal is input in accordance with a display selection signal, and a plurality of display circuits that are in a display state corresponding to the data of the input display data signal, and optical data that is data corresponding to the illuminance of incident light, respectively. A plurality of photodetector circuits, and a first optical data is generated by each of the plurality of photodetector circuits when an object to be read is superimposed on the pixel portion. Image data is generated by the image processing circuit using the optical data of 1 and stored in the storage circuit. The image data is read from the storage circuit by the CPU and input to the input / output unit as image signals. The input / output unit generates a plurality of display data signals from the image signal, sequentially inputs the generated plurality of display data signals to each of the plurality of display circuits, and the plurality of display circuits provide a plurality of display data to the pixel unit. By displaying an image in accordance with the signal data, an image having a mirror image relationship with the object to be read is displayed in the region of the pixel portion that overlaps the object to be read, and includes an image having a mirror image relationship with the object to be read. This is a driving method of an input / output device that generates second optical data by each of a plurality of photodetector circuits while an image is displayed.

Another embodiment of the present invention includes an input / output unit including a pixel portion, an image processing circuit, a memory circuit in which a plurality of programs are stored, and a data processing unit including a CPU. The display data signal is input in accordance with the display selection signal, the display circuit is in a display state corresponding to the input display data signal data, and the light is data corresponding to the illuminance of the incident light. A method of driving an input / output device comprising a plurality of light detection circuits for generating data, wherein a button image is displayed on a pixel portion, and a plurality of light detections are performed when a first object to be read is superimposed on the pixel portion. First optical data is generated by each of the circuits, image data is generated by the image processing circuit using the first optical data and held in the storage circuit, and the image data is read from the storage circuit by the CPU, Image data is input to the input / output unit as an image signal, and the input / output unit generates a plurality of display data signals from the image signal, and sequentially inputs the generated plurality of display data signals to each of the plurality of display circuits. By displaying an image corresponding to the data of the plurality of display data signals on the pixel portion, the display circuit displays an image obtained by mirror-inversion of the read object in the region of the pixel portion that does not overlap with the read object. When the second object to be read is superimposed on the area of the pixel portion where the button image is displayed, an image having a relationship between the object to be read and a mirror image is displayed on the area of the pixel portion to be overlapped with the object to be read. A driving method of an input / output device, characterized in that second optical data is generated by each of a plurality of photodetection circuits while an image including an image having a mirror image relationship with an object to be read is displayed. .

According to one embodiment of the present invention, the contrast of a read image can be improved.

FIG. 3 illustrates an input / output device in Embodiment 1; FIG. 6 illustrates a function example of an input / output device in Embodiment 2. FIG. 9 illustrates a function example of an input / output device in Embodiment 3. FIG. 5 illustrates a light detection circuit in Embodiment 4; 6A and 6B illustrate a display circuit in Embodiment 5. FIG. 10 is a schematic cross-sectional view illustrating a structural example of a transistor described in Embodiment 6; FIG. 7 is a schematic cross-sectional view illustrating a method for manufacturing the transistor illustrated in FIG. FIG. 9 is a schematic diagram illustrating an example of an electronic device in Embodiment 7.

An example of an embodiment for explaining the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited to the description of the embodiments described below.

Note that the contents of the embodiments can be combined with each other as appropriate. Further, the contents of the embodiments can be replaced with each other.

In addition, terms using ordinal numbers such as first and second are given to avoid confusion between components, and each component is not limited to an ordinal number.

(Embodiment 1)
In this embodiment, an example of an input / output device (also referred to as an input / output system) that can output information by displaying an image and can input information by incident light is described.

An example of the input / output device in this embodiment is described with reference to FIGS. FIG. 1 is a diagram for describing an example of an input / output device according to this embodiment.

First, a structure example of the input / output device in this embodiment is described with reference to FIG. FIG. 1A is a schematic diagram illustrating a configuration example of an input / output device in this embodiment.

An input / output device illustrated in FIG. 1A includes an input / output unit (also referred to as I / O) 101, an input / output control unit (also referred to as I / OCTL) 102, a data processing unit (also referred to as DataP) 103, including.

The input / output unit 101 inputs and outputs data.

The input / output control unit 102 controls input operations and output operations in the input / output unit 101. For example, the input operation is generation of data according to the illuminance of incident light, and the output operation is display of an image. Note that the input / output control unit 102 is not necessarily provided, and the operation of the input / output unit 101 may be controlled from the outside.

The data processing unit 103 performs processing according to the input data signal. Further, the data processing unit 103 has a function of executing a program selected according to data of an input data signal as necessary. For example, the data processing unit 103 detects the coordinates of an object to be read or generates image data based on data input from the input / output unit 101.

Further, the input / output unit 101, the input / output control unit 102, and the data processing unit 103 will be described below.

The input / output unit 101 includes a display circuit control unit 101a, a light detection circuit control unit 101b, a light source unit 101c, and a pixel unit 101d.

The display circuit control unit 101a includes a display drive circuit (also referred to as DISPDRV) 111 and a display data signal output circuit (also referred to as DDOUT) 112.

The photodetection circuit control unit 101b includes a photodetection drive circuit (also referred to as PSDRV) 113 and a readout circuit 116.

The light source unit 101 c includes a light unit (also referred to as LIGHT) 114.

The pixel portion 101d includes a plurality of display circuits (also referred to as DISP) 115d and a plurality of photodetector circuits (also referred to as PS) 115p. The pixel portion 101d includes a pixel including the display circuit 115d. Note that one pixel is constituted by one or more display circuits 115d. One or more light detection circuits 115p may be included in the pixel. The plurality of display circuits 115d are arranged in the matrix direction in the pixel portion 101d. The plurality of light detection circuits 115p are arranged in the matrix direction in the pixel portion 101d.

The display driver circuit 111 has a function of outputting a plurality of display selection signals (also referred to as a signal DSEL) that are pulse signals.

The display drive circuit 111 includes a shift register, for example. The display driving circuit 111 can output a display selection signal by outputting a pulse signal from the shift register.

The display data signal output circuit 112 receives an image signal representing an image as an electrical signal. The display data signal output circuit 112 has a function of generating a display data signal (also referred to as a signal DD) that is a voltage signal based on the input image signal and outputting the generated display data signal.

The display data signal output circuit 112 includes a switching transistor, for example.

Note that in the input / output device, the transistor includes two terminals and a current control terminal that controls a current flowing between the two terminals by an applied voltage. Note that not only a transistor but also a terminal in which current flowing between elements is controlled is referred to as a current terminal, and each of the two current terminals is also referred to as a first current terminal and a second current terminal.

In the input / output device, for example, a field effect transistor can be used as the transistor. In the case of a field effect transistor, the first current terminal is one of a source and a drain, the second current terminal is the other of the source and the drain, and the current control terminal is a gate.

In general, a voltage refers to a difference in potential between two points (also referred to as a potential difference). However, the values of voltage and potential are both expressed in volts (V) in circuit diagrams and the like, and thus are difficult to distinguish. Therefore, in this specification, a potential difference between a potential at one point and a reference potential (also referred to as a reference potential) may be used as the voltage at the one point unless otherwise specified.

The display data signal output circuit 112 can output image signal data as a display data signal when the switching transistor is on. The switching transistor can be controlled by inputting a control signal which is a pulse signal to the current control terminal. Note that when there are a plurality of display circuits 115d, image signal data may be output as a plurality of display data signals by selectively turning on or off a plurality of switching transistors.

The light detection driver circuit 113 has a function of outputting a light detection reset signal (also referred to as a signal PRST) that is a pulse signal. Note that the light detection drive circuit 113 outputs a charge accumulation control signal (also referred to as a signal TX) that is a pulse signal, or an output selection signal (also referred to as a signal OSEL) that is a pulse accumulation signal and a pulse signal, as necessary. You may make it the structure which has.

The photodetection drive circuit 113 includes a shift register, for example. At this time, the photodetection drive circuit 113 outputs a pulse signal from the shift register, thereby causing a photoreset signal, a photodetection reset signal and a charge accumulation control signal, or a photodetection reset signal, a charge accumulation control signal, and an output selection signal. Can be output.

The light unit 114 is a light emitting unit including a light source.

As the light source, for example, a cold cathode tube or a light emitting diode can be used. The light-emitting diode is a light-emitting diode that emits light having a wavelength in the visible light region (for example, a region where the wavelength of light is 360 nm to 830 nm). As the light emitting diode, for example, a white light emitting diode can be used. The number of light emitting diodes of each color may be plural. As the light emitting diode, for example, a red light emitting diode, a green light emitting diode, and a blue light emitting diode may be used. By using the red light emitting diode, the green light emitting diode, and the blue light emitting diode, for example, one or more of the red light emitting diode, the green light emitting diode, and the blue light emitting diode are sequentially switched according to the display selection signal during one frame period. By emitting light, a driving method (field sequential driving method) for displaying a full-color image can be used, and reading of an object to be read in full color can be performed.

Note that, for example, a control circuit that controls lighting of the light-emitting diode is provided, which is a pulse signal, and lighting of the light-emitting diode can be controlled in accordance with a control signal input to the control circuit.

The display circuit 115 d is superimposed on the light unit 114. For example, light from the light unit 114 is reflected by an object to be read, and the reflected light enters the display circuit 115d. In addition, a display selection signal that is a pulse signal is input to the display circuit 115d, and a display data signal is input in accordance with the input display selection signal. The display circuit 115d has a function of entering a display state according to the data of the input display data signal.

The display circuit 115d includes a display selection transistor and a display element, for example.

The display selection transistor has a function of selecting whether or not to input display data signal data to the display element.

The display element has a function of entering a display state corresponding to the data of the display data signal when the data of the display data signal is input according to the display selection transistor.

As the display element, for example, a liquid crystal element or the like can be used.

In addition, as a display method of an input / output device including a liquid crystal element, a TN (Twisted Nematic) mode, an IPS (In Plane Switching) mode, an STN (Super Twisted Nematic) mode, a VA (Vertical Alignment Alignment) mode, and an ASM (Axially Aligned Alignment) mode are used. Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (Anti-Ferroelectric Liquid Crystal) mode, MVA (Multi-Antual Liquid Crystal mode) PVA (Patterned Vertical Alignment) mode, ASV (Advanced Super View) mode, FFS (Fringe Field Switching) mode, or the like may be used.

The light detection circuit 115 p is superimposed on the light unit 114. For example, when there is an object to be read in the pixel portion 101d, the light irradiated from the light unit 114 is reflected by the object to be read, and the reflected light enters the light detection circuit 115p. A light detection reset signal and a charge accumulation control signal are input to the light detection circuit 115p. In addition, a light detection circuit 115p for red, green, and blue can be provided. For example, red, green, and blue color filters are provided, and light data is generated by the light detection circuit 115p for each color via the red, green, and blue color filters, and the plurality of generated light data are combined. Then, full-color image data can be generated by generating image data.

The photodetection circuit 115p has a function of generating voltage data (also referred to as optical data or PDATA) according to the illuminance of incident light according to the photodetection circuit control unit.

The photodetection circuit 115p has a function of entering a reset state in accordance with a photodetection reset signal.

The photodetection circuit 115p has a function of generating optical data in accordance with the charge accumulation control signal.

The photodetection circuit 115p has a function of outputting the generated optical data as an optical data signal in accordance with the output selection signal.

The photodetection circuit 115p includes, for example, a photoelectric conversion element, an amplification transistor, and an output selection transistor.

The photoelectric conversion element has a function of causing a current (also referred to as a photocurrent) to flow according to the illuminance of incident light when light enters the photoelectric conversion element.

An output selection signal is input to the current control terminal of the output selection transistor. The output selection transistor has a function of selecting whether or not to output optical data from the light detection circuit 115p as an optical data signal.

Note that the photodetection circuit 115p outputs optical data as an optical data signal via the first current terminal or the second current terminal of the amplification transistor.

The readout circuit 116 has a function of selecting the photodetection circuit 115p that reads out optical data and reading out the optical data from the selected photodetection circuit 115p.

The read circuit 116 is configured using, for example, a selection circuit. For example, the selection circuit includes a switching transistor, and optical data can be read by inputting an optical data signal from the photodetection circuit 115p according to the switching transistor.

The input / output control unit 102 includes a display circuit control unit (also referred to as DCTL) 121 and a light detection circuit control unit (also referred to as PDCTL) 122.

The display circuit control unit 121 controls the display operation in the display circuit 115d. The display circuit control unit 121 exchanges data with each circuit in the input / output unit 101 and the data processing unit 103.

The photodetection circuit controller 122 controls the optical data generation operation and the read operation in the photodetection circuit 115p. The photodetection circuit control unit 122 exchanges data with each circuit in the input / output unit 101 and the data processing unit 103.

The data processing unit 103 includes an image processing circuit (also referred to as IMGP) 131, a storage circuit (also referred to as MEMORY) 132, and a CPU (Central Processing Unit) 133.

The image processing circuit 131 generates image data using the input light data.

The memory circuit 132 includes a RAM (Random Access Memory) and a ROM (Read Only Memory). A plurality of RAMs may be used. The ROM stores program data for performing a predetermined operation. The number of programs can be set as appropriate.

The CPU 133 receives the command signal and executes a program corresponding to the input command signal.

Next, as an example of a method for driving the input / output device in this embodiment, an example of a method for driving the input / output device illustrated in FIG. 1A will be described with reference to FIG. FIG. 1B is a flowchart for describing an example of a method for driving the input / output device illustrated in FIG.

In the example of the driving method of the input / output device shown in FIG. 1A, a display data signal is input to the display circuit 115d in accordance with the pulse of the display selection signal, and the display circuit 115d displays data corresponding to the input display data signal data. In this state, the pixel unit 101d displays an image.

In the example of the driving method of the input / output device illustrated in FIG. 1A, the operations in Steps S11 to S14 illustrated in FIG. Each operation will be described below.

First, as step S11, first optical data generation (also referred to as first optical data generation) is performed.

As an operation in generating the first optical data, a plurality of first optical data corresponding to the illuminance of light incident on each of the plurality of light detection circuits 115p is generated. Note that before generating the plurality of first optical data, each of the plurality of photodetection circuits 115p is reset according to the photodetection reset signal. Further, when the first optical data is generated, the light transmittance in the display circuit 115d may be maximized.

Further, in accordance with the output selection signal, the first optical data generated by the plurality of photodetector circuits 115p is sequentially output as an optical data signal. Further, the optical data signals are sequentially output to the data processing unit 103 by sequentially reading out and outputting the first optical data output from the plurality of photodetector circuits 115p by the readout circuit 116.

When the optical data signal is input to the data processing unit 103, the data of the optical data signal (first optical data) is sequentially stored in the designated memory address of the RAM in the storage circuit 132. Further, the coordinate information of each first optical data may be stored in the RAM as coordinate data. Further, when the optical data signal is an analog signal, the optical data signal may be converted into a digital signal.

Next, as step S12, image data generation (also referred to as image data generation) is performed.

As the image data generation operation, the image processing circuit 131 generates image data using the first light data, and stores the generated image data in the storage circuit 132 as appropriate.

Next, as step S13, an image is displayed (also referred to as image display).

As an image display operation, the CPU 133 reads out image data generated based on the first optical data from the storage circuit 132 and inputs the image data to the input / output unit 101 as an image signal. Further, a display data signal output circuit 112 generates a display data signal from an image signal including image data generated based on the first light data. Further, the generated display data signal is sequentially input to each of the plurality of display circuits 115d, and an image based on the image data generated using the first light data is displayed in the pixel portion 101d. Note that the image processing circuit 131 may perform image processing on the generated image data before displaying the image. Examples of the image processing include noise removal processing or color correction processing.

Next, as step S14, second optical data generation (also referred to as second optical data generation) is performed.

As an operation for generating the second optical data, light incident on each of the plurality of photodetector circuits 115p while an image based on the image data generated using the first optical data is displayed on the pixel unit 101d. A plurality of second optical data corresponding to the illuminance of the light is generated. Note that before generating the plurality of second optical data, the photodetection circuit 115p is reset according to the photodetection reset signal. The value of the second light data generated by the image based on the image data generated using the first light data is set based on the image data generated using the first light data. That is, the value of the second optical data is adjusted according to the value of the first optical data.

For example, when the object to be read is superimposed on the pixel portion 101d, the first optical data is generated, and an image based on the first optical data is displayed, so that the pixel portion 101d on which the object to be read overlaps the region 101d. An image having a mirror image relationship with the object to be read is displayed. Further, the second optical data is generated while an image having a mirror image relationship with the object to be read is displayed. As a result, it becomes difficult for light to enter the light detection circuit 115p in the portion where the gradation value of the image that has a relationship between the object to be read and the mirror image is low, and the value of the second optical data becomes low.

Further, in accordance with the output selection signal, the plurality of second optical data generated by the plurality of photodetection circuits 115p are sequentially output as optical data signals. Further, the readout circuit 116 sequentially reads out and outputs a plurality of second optical data output from the plurality of photodetector circuits 115 p, thereby outputting an optical data signal to the data processing unit 103.

Further, after that, the image processing circuit 131 generates image data based on the second optical data using the data of the optical data signal input to the data processing unit 103, and is generated based on the second optical data. A display data signal is generated from an image signal including image data, the generated display data signal is sequentially input to the display circuit 115d, and an image based on the image data generated using the second light data in the pixel unit 101d is generated. It may be displayed. At this time, the value of the optical data of the image based on the image data generated using the second optical data is adjusted according to the image based on the image data generated using the first optical data. The contrast is higher than that of an image based on image data generated using one optical data.

As described with reference to FIG. 1, an example of the input / output device according to the present embodiment generates first optical data, generates and displays an image using the first optical data, and The second optical data is generated while an image based on the first optical data is displayed. In the case of the above configuration, when generating the second optical data, the illuminance of the light incident on the photodetection circuit is a value corresponding to the display image of the adjacent display circuit, that is, a value corresponding to the first optical data. Become. Therefore, it is possible to generate the second optical data while controlling the illuminance of the light incident on the light detection circuit according to the first optical data. Therefore, for example, when an image is generated and displayed using the second optical data, the contrast of the image can be improved.

(Embodiment 2)
In this embodiment, an example of functions of the input / output device described in Embodiment 1 is described.

An example of functions of the input / output device in this embodiment will be described with reference to FIG. FIG. 2 is a schematic diagram for explaining an example of functions of the input / output device according to the present embodiment.

First, as shown in FIG. 2A, the read object 142a is superimposed on the pixel portion 101d. As an example, characters are described in the read object 142a. In FIG. 2, as an example, there is a gap between the read object 142a and the pixel portion 101d. However, the present invention is not limited to this, and the read object 142a may be in contact with the pixel portion 101d. At this time, the first optical data is generated by the photodetection circuit 115p in the pixel portion 101d.

Further, the image processing circuit 131 generates image data from the generated first optical data. Further, the image data is used as an image signal, a display data signal is generated from the image signal, and the generated display data signal is sequentially input to the display circuit 115d. As shown in FIG. Based on the above, the object image 144a to be read is displayed in the area of the pixel portion 101d that overlaps the object 142a to be read. The read object image 144a has a mirror image relationship with the read object 142a. The size of the read object image 144a is preferably the same as the size of the read object 142a. Further, the image processing circuit 131 may perform the image processing of the image data based on the first optical data, so that the size of the read object image 144a may be the same as the size of the read object 142a.

At this time, as shown in FIG. 2B, the read object image 144b may be displayed in a different area from the area of the pixel portion 101d that overlaps the read object 142a. At this time, the read object image 144b may be an image obtained by inverting the read object 142a. The read object image 144b has a function as a preview image. Note that the size of the read object image 144b is set as appropriate.

Further, while the object to be read 142a is superimposed on the pixel portion 101d and the object image 144a to be read is displayed, second light data is generated by the light detection circuit 115p in the pixel portion 101d. At this time, the light incident on the light detection circuit 115p has an illuminance corresponding to the light transmittance of the display circuit 115d.

For example, the closer the display state of the display circuit 115d is to black, the less light is transmitted through the display circuit 115d, and the lower the illuminance of light incident on the light detection circuit 115p adjacent to the display circuit 115d. For example, light is hardly transmitted through the display circuit 115d in a character portion in the read object image 144a.

Further, image data is generated from the generated second light data, and as shown in FIG. 2C, the object image is read in the region of the pixel portion 101d that is superimposed on the object 142a based on the image data. 144d is displayed. The read object image 144d has a mirror image relationship with the read object 142a. Note that the contrast of the read object image 144d is higher than the contrast of the read object image 144b.

At this time, the read object image 144c may be displayed in the region of the pixel portion 101d that overlaps the read object 142a. At this time, the read object image 144c has a mirror image relationship with the read object 142a, and the size of the read object image 144c is preferably the same as the size of the read object 142a. The contrast of the read object image 144d is higher than the contrast of the read object image 144b.

Further, after displaying the read object image 144c, the operation of generating the optical data and displaying the image based on the image data corresponding to the optical data may be performed a plurality of times.

At this time, the number of operations for generating data and displaying an image based on the optical data can be set according to the gradation value of the generated image data.

For example, coordinate data and gradation data in each of the image data based on the generated light data are stored in the storage circuit 132. Further, the CPU 133 sequentially reads out the image data. At this time, when the gradation of the image data representing the darkest gradation is 0, the image data is written in the storage circuit 132. If the gradation of the image data representing the darkest gradation is not 0, the generation of light data and the image display operation based on the image data are repeated again, and the gradation of the image data representing the darkest gradation is determined. When it changes to 0 or more than the reference value from the initial value, the image data is written into the storage circuit 132. For example, image data representing the darkest gradation can be selected by sequentially comparing a plurality of image data using a comparison circuit or the like.

As described with reference to FIG. 2, the input / output device described in Embodiment 1 generates first optical data when an object to be read is superimposed, and is read based on the first optical data. A configuration in which an image having a mirror image relationship with the object to be read is displayed in the pixel part region where the object is superimposed, and the second optical data is generated while an image having a mirror image relationship with the object to be read is displayed It is. With the above configuration, when generating the second optical data, the illuminance of light incident on the light detection circuit can be set to a value corresponding to the display image, so that the contrast of the image of the object to be read is improved. Can be made.

(Embodiment 3)
In this embodiment, an example of functions of the input / output device described in Embodiment 1 is described. In the function examples of the input / output device in this embodiment, the description of the function example of the input / output device in Embodiment 2 is used as appropriate for the same portions as those in the description of the function example of the input / output device in Embodiment 2. To do.

An example of functions of the input / output device in this embodiment will be described with reference to FIG. FIG. 3 is a schematic diagram for explaining an example of functions of the input / output device according to the present embodiment.

First, as shown in FIG. 3A, the read object 142a is superimposed on the pixel portion 101d on which the button image 143 is displayed. As an example, characters are described in the read object 142a. In FIG. 3, as an example, there is a gap between the read object 142a and the pixel portion 101d, but the present invention is not limited to this, and the read object 142a may be in contact with the pixel portion 101d. At this time, the first optical data is generated by the photodetection circuit 115p in the pixel portion 101d.

Further, the image processing circuit 131 generates image data from the generated first optical data. Further, the image data is used as an image signal, a display data signal is generated from the image signal, and the generated display data signal is sequentially input to the display circuit 115d. As shown in FIG. The read object image 144b is displayed in a region different from the region of the pixel portion 101d superimposed on 142a. At this time, the read object image 144b is an image obtained by inverting the mirror image of the read object 142a. The read object image 144b has a function as a preview image. Note that the size of the read object image 144b is set as appropriate.

Next, as shown in FIG. 3C, the read object 142b is superimposed on the button image 143 as necessary. Then, the image processing circuit 131 generates image data from the generated first light data, and as shown in FIG. 3C, based on the image data, the pixel unit 101d to be superimposed on the read object 142a. The read object image 144a is displayed in the area. Note that examples of the read object 142b include a finger and a pen.

Further, while the object to be read 142a is superimposed on the pixel portion 101d and the object image 144a to be read is displayed, second light data is generated by the light detection circuit 115p in the pixel portion 101d. At this time, the light incident on the light detection circuit 115p has an illuminance corresponding to the light transmittance of the display circuit 115d.

For example, the closer the display state of the display circuit 115d is to black, the less light is transmitted through the display circuit 115d, and the lower the illuminance of light incident on the light detection circuit 115p adjacent to the display circuit 115d. For example, light is hardly transmitted through the display circuit 115d in a character portion in the read object image 144a.

Further, image data is generated from the generated second light data, and as shown in FIG. 3D, based on the image data, an area different from the area of the pixel portion 101d superimposed on the read object 142a. The read object image 144d is displayed on the screen. The read object image 144d has a mirror image relationship with the read object 142a. Note that the contrast of the read object image 144d is higher than the contrast of the read object image 144b.

At this time, the read object image 144c may be displayed in the region of the pixel portion 101d that overlaps the read object 142a. At this time, the read object image 144c has a mirror image relationship with the read object 142a, and the size of the read object image 144c is preferably the same as the size of the read object 142a. The contrast of the read object image 144d is higher than the contrast of the read object image 144b.

Further, after displaying the read object image 144c, the operation of generating the optical data and displaying the image based on the image data corresponding to the optical data may be performed a plurality of times.

At this time, the number of operations for generating optical data and displaying an image based on the optical data can be set according to the gradation value of the generated image data.

For example, coordinate data and gradation data in each of the image data based on the generated light data are stored in the storage circuit 132. Further, the CPU 133 sequentially reads the image data. At this time, when the gradation of the image data representing the darkest gradation is 0, the image data is written in the storage circuit 132. If the gradation of the image data representing the darkest gradation is not 0, the generation of light data and the image display operation based on the image data are repeated again, and the gradation of the image data representing the darkest gradation is determined. When it changes to 0 or more than the reference value from the initial value, the image data is written into the storage circuit 132. For example, image data representing the darkest gradation can be selected by sequentially comparing a plurality of image data using a comparison circuit or the like.

As described with reference to FIG. 3, the input / output device described in Embodiment 1 generates first optical data when an object to be read is superimposed, and is read based on the first optical data. A configuration in which an image having a mirror image relationship with the object to be read is displayed in the pixel part region where the object is superimposed, and the second optical data is generated while an image having a mirror image relationship with the object to be read is displayed It is. With the above configuration, when generating the second optical data, the illuminance of light incident on the light detection circuit can be set to a value corresponding to the display image, so that the contrast of the image of the object to be read is improved. Can be made.

Further, the input / output device described in Embodiment 1 is configured to be able to select whether or not to generate optical data again while confirming the displayed object image to be read. With the above configuration, the viewer can set an optimal image contrast of the object to be read.

(Embodiment 4)
In this embodiment, an example of a photodetector circuit in the input / output device of the above embodiment will be described.

An example of the photodetector circuit in this embodiment will be described with reference to FIGS. FIG. 4 is a diagram for describing an example of the photodetector circuit in this embodiment.

First, structural examples of the photodetector circuit of this embodiment will be described with reference to FIGS. 4A to 4C are diagrams each illustrating an example of a structure of the photodetector circuit in this embodiment.

The photodetector circuit illustrated in FIG. 4A includes a photoelectric conversion element (also referred to as PCE) 151a, a transistor 152a, and a transistor 153c.

Note that in the photodetector circuit illustrated in FIG. 4A, the transistor 152a and the transistor 153a are field-effect transistors.

The photoelectric conversion element 151a has a first current terminal and a second current terminal, and a signal PRST is input to the first current terminal of the photoelectric conversion element 151a.

The gate of the transistor 152a is electrically connected to the second current terminal of the photoelectric conversion element 151a.

One of a source and a drain of the transistor 153a is electrically connected to one of a source and a drain of the transistor 152a, and a signal OSEL is input to a gate of the transistor 153a.

Note that the voltage Va is input to the other of the source and the drain of the transistor 152a and the other of the source and the drain of the transistor 153a.

Further, the photodetector circuit illustrated in FIG. 4A outputs optical data as an optical data signal from the other of the source and the drain of the transistor 152a and the other of the source and the drain of the transistor 153a.

The light detection circuit illustrated in FIG. 4B includes a photoelectric conversion element 151b, a transistor 152b, a transistor 153b, a transistor 154, and a transistor 155.

Note that in the photodetector circuit illustrated in FIG. 4B, the transistor 152b, the transistor 153b, the transistor 154, and the transistor 155 are field-effect transistors.

The photoelectric conversion element 151b has a first current terminal and a second current terminal, and the voltage Vb is input to the first current terminal of the photoelectric conversion element 151b.

One of a source and a drain of the transistor 154 is electrically connected to a second current terminal of the photoelectric conversion element 151b, and a charge accumulation control signal is input to a gate of the transistor 154. The charge accumulation control signal is a pulse signal.

The gate of the transistor 152b is electrically connected to the other of the source and the drain of the transistor 154.

A voltage Va is input to one of a source and a drain of the transistor 155, the other of the source and the drain of the transistor 155 is electrically connected to the other of the source and the drain of the transistor 154, and a signal is supplied to the gate of the transistor 155. PRST is input.

One of a source and a drain of the transistor 153b is electrically connected to one of a source and a drain of the transistor 152b, and a signal OSEL is input to a gate of the transistor 153b.

Note that the voltage Va is input to the other of the source and the drain of the transistor 152b and the other of the source and the drain of the transistor 153b.

In addition, the photodetector circuit illustrated in FIG. 4B outputs optical data as an optical data signal from the other of the source and the drain of the transistor 152b and the other of the source and the drain of the transistor 153b.

Note that in the case where a plurality of photodetector circuits illustrated in FIG. 4B are provided, the same charge accumulation control signal can be input to all the photodetector circuits. A driving method in which the same charge accumulation control signal is input to all the light detection circuits to generate optical data is also referred to as a global shutter method.

The light detection circuit illustrated in FIG. 4C includes a photoelectric conversion element 151c, a transistor 152c, and a capacitor 156.

The photoelectric conversion element 151c has a first current terminal and a second current terminal, and a signal PRST is input to the first current terminal of the photoelectric conversion element 151c.

The capacitor 156 includes a first capacitor electrode and a second capacitor electrode. A signal OSEL is input to the first capacitor electrode of the capacitor 156, and the second capacitor electrode of the capacitor 156 has a photoelectric capacity. It is electrically connected to the second current terminal of the conversion element 151c.

The voltage Va is input to one of a source and a drain of the transistor 152c, and a gate of the transistor 152c is electrically connected to a second current terminal of the photoelectric conversion element 151c.

Note that the photodetector circuit illustrated in FIG. 4C outputs optical data as an optical data signal from the other of the source and the drain of the transistor 152c.

Further, each component of the photodetector circuit illustrated in FIGS. 4A to 4C will be described.

As the photoelectric conversion elements 151a to 151c, for example, photodiodes or phototransistors can be used. In the case of a photodiode, one of the anode and the cathode of the photodiode corresponds to the first current terminal of the photoelectric conversion element, the other of the anode and the cathode of the photodiode corresponds to the second current terminal of the photoelectric conversion element, In the case of a transistor, one of the source and the drain of the phototransistor corresponds to the first current terminal of the photoelectric conversion element, and the other of the source and the drain of the phototransistor corresponds to the second current terminal of the photoelectric conversion element.

The transistors 152a to 152c function as amplification transistors.

The transistor 154 functions as a charge accumulation control transistor. The charge accumulation control transistor has a function of controlling whether or not the voltage of the gate of the amplification transistor is set to a value corresponding to the photocurrent flowing through the photoelectric conversion element. Note that in the photodetector circuit of this embodiment, the transistor 154 is not necessarily provided; however, by providing the transistor 154, when the gate of the transistor 152b is in a floating state, the voltage of the gate of the transistor 152b is fixed for a certain period. The value can be maintained.

The transistor 155 functions as a light detection reset transistor. The photodetection reset transistor has a function of selecting whether or not the gate voltage of the amplification transistor is set to a reference value.

The transistors 153a and 153b function as output selection transistors.

Note that as the transistor 152a, the transistor 152b, the transistor 153a, the transistor 153b, the transistor 154, and the transistor 155, for example, a semiconductor layer or oxide in which a channel is formed and a Group 14 semiconductor (such as silicon) in the periodic table is included. A transistor including a semiconductor layer can be used. For example, with the use of the transistor including the oxide semiconductor layer, variation in gate voltage due to leakage current of the transistors 152a, 152b, 153a, 153b, 154, and 155 can be suppressed.

Next, an example of a method for driving the photodetector circuit illustrated in FIGS. 4A to 4C is described.

First, an example of a method for driving the photodetector circuit illustrated in FIG. 4A will be described with reference to FIG. FIG. 4D is a timing chart for explaining an example of a method for driving the photodetector circuit illustrated in FIG. 4A, and shows states of the signal PRST, the signal OSEL, and the transistor 153 a. Here, as an example, a case where the photoelectric conversion element 151a is a photodiode will be described.

In the example of the method for driving the photodetector circuit illustrated in FIG. 4A, first, a pulse of a signal PRST (also referred to as pls) is input in a period T31. Further, a pulse of the signal PCTL is input from the period T31 to the period T32. Note that in the period T <b> 31, the input start timing of the signal PRST may be earlier than the input start timing of the signal PCTL pulse.

At this time, the photoelectric conversion element 151a enters a state where current flows in the forward direction, and the transistor 153a is turned off (also referred to as OFF).

At this time, the voltage of the gate of the transistor 152a is reset to a constant value.

Next, in a period T32 after the pulse of the signal PRST is input, the photoelectric conversion element 151a is in a state where a voltage is applied in a direction opposite to the forward direction, and the transistor 153a remains in an off state.

At this time, a photocurrent flows between the first current terminal and the second current terminal of the photoelectric conversion element 151a in accordance with the illuminance of light incident on the photoelectric conversion element 151a. Further, the voltage value of the gate of the transistor 152a changes in accordance with the photocurrent. At this time, the value of the channel resistance between the source and drain of the transistor 152a changes.

Next, in a period T33, a pulse of the signal OSEL is input.

At this time, the photoelectric conversion element 151a remains in a state where a voltage is applied in a direction opposite to the forward direction, the transistor 153a is turned on (also referred to as ON), the source and drain of the transistor 152a, and the transistor 153a Current flows through the source and drain. The current flowing through the source and drain of the transistor 152a and the source and drain of the transistor 153a depends on the value of the gate voltage of the transistor 152a. Therefore, the optical data has a value corresponding to the illuminance of light incident on the photoelectric conversion element 151a. Further, the photodetector circuit illustrated in FIG. 4A outputs an optical data signal from the other of the source and the drain of the transistor 152a and the other of the source and the drain of the transistor 153a. The above is the example of the method for driving the photodetector circuit illustrated in FIG.

Next, an example of a method for driving the photodetector circuit illustrated in FIG. 4B will be described with reference to FIG. FIG. 4E is a timing chart illustrating an example of a method for driving the photodetector circuit illustrated in FIG.

In the example of the method for driving the photodetector circuit illustrated in FIG. 4B, first, a pulse of the signal PRST is input in the period T41, and a pulse of the signal PCTL is input from the period T41 to the period T42. Note that in the period T41, the input start timing of the pulse of the signal PRST may be earlier than the input start timing of the pulse of the signal PCTL.

At this time, in the period T41, the photoelectric conversion element 151b enters a state in which a current flows in the forward direction, and the transistor 154 is turned on, whereby the gate voltage of the transistor 152b is reset to a value equivalent to the voltage Va. .

Further, in a period T42 after the pulse of the signal PRST is input, a voltage is applied to the photoelectric conversion element 151b in a direction opposite to the forward direction, the transistor 154 is kept on, and the transistor 155 is turned on. Turns off.

At this time, a photocurrent flows between the first current terminal and the second current terminal of the photoelectric conversion element 151b in accordance with the illuminance of light incident on the photoelectric conversion element 151b. Further, the voltage value of the gate of the transistor 152b changes in accordance with the photocurrent. At this time, the value of the channel resistance between the source and drain of the transistor 152b changes.

Further, in the period T43 after the pulse of the signal PCTL is input, the transistor 154 is turned off.

At this time, the voltage of the gate of the transistor 152b is held at a value corresponding to the photocurrent of the photoelectric conversion element 151b in the period T42. Note that the period T43 is not necessarily provided, but by providing the period T43, the timing at which the data signal is output can be set as appropriate in the photodetector circuit. Can be set as appropriate.

Further, in a period T44, a pulse of the signal OSEL is input.

At this time, a voltage is applied to the photoelectric conversion element 151b in a direction opposite to the forward direction, and the transistor 153b is turned on.

Further, at this time, current flows through the source and drain of the transistor 152b and the source and drain of the transistor 153b, and the photodetector circuit illustrated in FIG. 4B operates in the other of the source and drain of the transistor 152b and the transistor 153b. The optical data is output as a data signal from the other of the other of the source and the drain. The above is the example of the method for driving the photodetector circuit illustrated in FIG.

Next, an example of a method for driving the photodetector circuit illustrated in FIG. 4C will be described with reference to FIG. FIG. 4F is a timing chart for describing an example of a method for driving the photodetector circuit illustrated in FIG.

In the example of the method for driving the photodetector circuit illustrated in FIG. 4C, first, a pulse of the signal PRST is input in a period T51.

At this time, a current flows in the photoelectric conversion element 151c in the forward direction, and the voltage of the gate of the transistor 152c is reset to a constant value.

Next, in a period T52 after the pulse of the signal PRST is input, the photoelectric conversion element 151c is in a state where a voltage is applied in a direction opposite to the forward direction.

At this time, a photocurrent flows between the first current terminal and the second current terminal of the photoelectric conversion element 151c in accordance with the illuminance of light incident on the photoelectric conversion element 151c. Further, the voltage of the gate of the transistor 152c changes according to the photocurrent.

Next, in a period T53, a pulse of the signal OSEL is input.

At this time, the photoelectric conversion element 151c remains in a state where a voltage is applied in a direction opposite to the forward direction, and a current flows between the source and the drain of the transistor 152c, and the photodetector circuit illustrated in FIG. Outputs optical data as a data signal from the other of the source and the drain of the transistor 152c. The above is the example of the method for driving the photodetector circuit illustrated in FIG.

As described with reference to FIGS. 4A to 4F, an example of the photodetector circuit in this embodiment includes a photoelectric conversion element and an amplifying transistor, generates optical data, and operates according to an output selection signal. In this configuration, optical data is output as a data signal. With the above configuration, optical data can be generated and output by the photodetection circuit.

(Embodiment 5)
In this embodiment, an example of a display circuit in the input / output device of the above embodiment is described.

Examples of the display circuit in this embodiment will be described with reference to FIGS. FIG. 5 is a diagram for describing an example of the display circuit in this embodiment.

First, structural examples of the display circuit of this embodiment will be described with reference to FIGS. 5A and 5B are diagrams each illustrating an example of a structure of the display circuit in this embodiment.

The display circuit illustrated in FIG. 5A includes a transistor 161a, a liquid crystal element 162a, and a capacitor 163a.

Note that in the display circuit illustrated in FIG. 5A, the transistor 161a is a field-effect transistor.

In the input / output device, the liquid crystal element includes a first display electrode, a second display electrode, and a liquid crystal layer. The light transmittance of the liquid crystal layer changes according to the voltage applied between the first display electrode and the second display electrode.

In the input / output device, the capacitor includes a first capacitor electrode, a second capacitor electrode, and a dielectric layer overlapping with the first capacitor electrode and the second capacitor electrode. The capacitor accumulates electric charge according to a voltage applied between the first capacitor electrode and the second capacitor electrode.

A signal DD is input to one of a source and a drain of the transistor 161a, and a signal DSEL is input to the gate of the transistor 161a.

The first display electrode of the liquid crystal element 162a is electrically connected to the other of the source and the drain of the transistor 161a, and the voltage Vc is input to the second display electrode of the liquid crystal element 162a. The value of the voltage Vc can be set as appropriate.

The first capacitor electrode of the capacitor 163a is electrically connected to the other of the source and the drain of the transistor 161a, and the voltage Vc is input to the second capacitor electrode of the capacitor 163a.

The display circuit illustrated in FIG. 5B includes a transistor 161b, a liquid crystal element 162b, a capacitor 163b, a capacitor 164, a transistor 165, and a transistor 166.

Note that in the display circuit illustrated in FIG. 5B, the transistor 161b, the transistor 165, and the transistor 166 are field-effect transistors.

A signal DD is input to one of a source and a drain of the transistor 165, and a write selection signal (also referred to as a signal WSEL) which is a pulse signal is input to the gate of the transistor 165.

The first capacitor electrode of the capacitor 164 is electrically connected to the other of the source and the drain of the transistor 165, and the voltage Vc is input to the second capacitor electrode of the capacitor 164.

One of a source and a drain of the transistor 161b is electrically connected to the other of the source and the drain of the transistor 165, and a signal DSEL is input to a gate of the transistor 161b.

The first display electrode of the liquid crystal element 162b is electrically connected to the other of the source and the drain of the transistor 161b, and the voltage Vc is input to the second display electrode of the liquid crystal element 162b.

The first capacitor electrode of the capacitor 163b is electrically connected to the other of the source and the drain of the transistor 161b, and the voltage Vc is input to the second capacitor electrode of the capacitor 163b. The value of the voltage Vc is appropriately set according to the specifications of the display circuit.

A reference voltage is input to one of the source and the drain of the transistor 166, the other of the source and the drain of the transistor 166 is electrically connected to the other of the source and the drain of the transistor 161b, and the gate of the transistor 166 is connected to the gate of the transistor 166. A display reset signal (also referred to as a signal DRST) which is a pulse signal is input.

Further, each component of the display circuit illustrated in FIGS. 5A and 5B will be described.

The transistors 161a and 161b function as display selection transistors.

As the liquid crystal layer in the liquid crystal element 162a and the liquid crystal element 162b, a liquid crystal layer that transmits light when a voltage applied to the first display electrode and the second display electrode is 0 V can be used. A refractive liquid crystal (also referred to as an ECB liquid crystal), a liquid crystal to which a dichroic dye is added (also referred to as a GH liquid crystal), a polymer dispersed liquid crystal, a liquid crystal layer including a discotic liquid crystal, or the like can be used. A liquid crystal layer exhibiting a blue phase may be used as the liquid crystal layer. The liquid crystal layer exhibiting a blue phase is composed of, for example, a liquid crystal composition including a liquid crystal exhibiting a blue phase and a chiral agent. A liquid crystal exhibiting a blue phase has a response speed as short as 1 msec or less and is optically isotropic. Therefore, alignment treatment is unnecessary and viewing angle dependency is small. Therefore, the operation speed can be improved by using a liquid crystal exhibiting a blue phase.

The capacitor 163a functions as a storage capacitor in which a voltage according to the signal DD is applied between the first capacitor electrode and the second capacitor electrode according to the transistor 161a. . Although the capacitor 163a and the capacitor 163b are not necessarily provided, the provision of the capacitor 163a and the capacitor 163b suppresses fluctuations in the voltage applied to the liquid crystal element due to the leakage current of the display selection transistor. Can do.

The capacitor 164 functions as a storage capacitor in which a voltage corresponding to the signal DD is applied between the first capacitor electrode and the second capacitor electrode in accordance with the transistor 165.

The transistor 165 functions as a write selection transistor that selects whether the signal DD is input to the capacitor 164.

The transistor 166 functions as a display reset selection transistor that selects whether to reset the voltage applied to the liquid crystal element 162b.

Note that as the transistor 161a, the transistor 161b, the transistor 165, and the transistor 166, for example, a transistor in which a channel is formed and a semiconductor layer or an oxide semiconductor layer containing a Group 14 semiconductor (such as silicon) in the periodic table is included. Can be used.

Next, an example of a method for driving the display circuit illustrated in FIGS. 5A and 5B is described.

First, an example of a method for driving the display circuit illustrated in FIG. 5A will be described with reference to FIG. FIG. 5C is a timing chart for explaining an example of a method for driving the display circuit illustrated in FIG. 5A, and shows states of the signal DD and the signal DSEL.

In the example of the method for driving the display circuit illustrated in FIG. 5A, when the pulse of the signal DSEL is input, the transistor 161a is turned on.

When the transistor 161a is turned on, the signal DD is input to the display circuit, and the voltage of the first display electrode of the liquid crystal element 162a and the first capacitor electrode of the capacitor 163a becomes equal to the voltage of the signal DD.

At this time, the liquid crystal element 162a is in a writing state (also referred to as a state wt) and has a light transmittance according to the signal DD. As a result, the display circuit enters a display state corresponding to the data of the signal DD (data D1 to data DQ (Q is a natural number of 2 or more)).

After that, the transistor 161a is turned off, the liquid crystal element 162a is in a holding state (also referred to as a state hld), and a voltage applied between the first display electrode and the second display electrode is then applied to the signal DSEL. Until the first pulse is input, the fluctuation amount from the initial value is held so as not to be larger than the reference value. When the liquid crystal element 162a is in the holding state, the light unit in the input / output device of the above embodiment is in a lighting state.

Next, an example of a method for driving the display circuit illustrated in FIG. 5B will be described with reference to FIG. FIG. 5D is a timing chart for explaining an example of a method for driving the display circuit illustrated in FIG.

In the example of the method for driving the display circuit illustrated in FIG. 5B, when the pulse of the signal DRST is input, the transistor 166 is turned on, and the first display electrode of the liquid crystal element 162b and the first of the capacitor 163b are turned on. The voltage of the capacitor electrode is reset to a reference voltage.

When the pulse of the signal WSEL is input, the transistor 165 is turned on, the signal DD is input to the display circuit, and the first capacitor electrode of the capacitor 164 has a value equivalent to the voltage of the signal DD.

After that, when a pulse of the signal DSEL is input, the transistor 161b is turned on, and the voltage of the first display electrode of the liquid crystal element 162b and the first capacitor electrode of the capacitor 163b is changed to the first capacitor of the capacitor 164. The value is equivalent to the voltage of the electrode.

At this time, the liquid crystal element 162b is in a writing state and has a light transmittance according to the signal DD. As a result, the display circuit enters a display state corresponding to the data of the signal DD (data D1 to data DQ, respectively).

After that, the transistor 161b is turned off, the liquid crystal element 162b is in a holding state, a voltage applied between the first display electrode and the second display electrode, and then a pulse of the signal DSEL are input. Until the fluctuation amount from the initial value does not become larger than the reference value. When the liquid crystal element 162b is in the holding state, the light unit in the input / output device of the above embodiment is in a lighting state.

As described with reference to FIGS. 5A and 5B, an example of the display circuit of this embodiment includes a display selection transistor and a liquid crystal element. With the above structure, the display circuit can be brought into a display state corresponding to the display data signal.

As described with reference to FIG. 5B, an example of the display circuit of this embodiment includes a write selection transistor and a capacitor in addition to the display selection transistor and the liquid crystal element. With the above structure, while the liquid crystal element is set to a display state corresponding to the data of a certain display data signal, data of the next display data signal can be written to the capacitor element. Therefore, the operation speed of the display circuit can be improved.

(Embodiment 6)
In this embodiment, a transistor that can be used as a transistor in the input / output device described in the above embodiment is described.

In the input / output device described using the above embodiment, a transistor includes, for example, a channel formed and a semiconductor layer or an oxide semiconductor layer containing a Group 14 semiconductor (such as silicon) in the periodic table Can be used. Note that a layer in which a channel is formed is also referred to as a channel formation layer.

Note that the semiconductor layer may be a single crystal semiconductor layer, a polycrystalline semiconductor layer, a microcrystalline semiconductor layer, or an amorphous semiconductor layer.

Further, in the input / output device described using the above embodiment, a transistor including an oxide semiconductor layer that can be used as a transistor can be intrinsic (also referred to as an I-type) or substantially, for example, by being highly purified. A transistor having an intrinsic oxide semiconductor layer can be used.

An example of a structure of the transistor including the oxide semiconductor layer will be described with reference to FIGS. FIG. 6 is a schematic cross-sectional view illustrating a structural example of a transistor in this embodiment.

The transistor illustrated in FIG. 6A is one of bottom-gate transistors and is also referred to as an inverted staggered transistor.

The transistor illustrated in FIG. 6A includes a conductive layer 401a, an insulating layer 402a, an oxide semiconductor layer 403a, a conductive layer 405a, and a conductive layer 406a.

The conductive layer 401a is provided over the substrate 400a.

The insulating layer 402a is provided over the conductive layer 401a.

The oxide semiconductor layer 403a overlaps with the conductive layer 401a with the insulating layer 402a interposed therebetween.

Each of the conductive layers 405a and 406a is provided over part of the oxide semiconductor layer 403a.

Further, in FIG. 6A, part of the top surface of the oxide semiconductor layer 403a of the transistor (a portion where the conductive layer 405a and the conductive layer 406a are not provided on the top surface) is in contact with the insulating layer 407a.

The insulating layer 407a is in contact with the insulating layer 402a through the conductive layer 405a, the conductive layer 406a, and the oxide semiconductor layer 403a.

The transistor illustrated in FIG. 6B includes a conductive layer 408a in addition to the structure illustrated in FIG.

The conductive layer 408a overlaps with the oxide semiconductor layer 403a with the insulating layer 407a interposed therebetween.

The transistor illustrated in FIG. 6C is one of bottom-gate transistors.

The transistor illustrated in FIG. 6C includes a conductive layer 401b, an insulating layer 402b, an oxide semiconductor layer 403b, a conductive layer 405b, and a conductive layer 406b.

The conductive layer 401b is provided over the substrate 400b.

The insulating layer 402b is provided over the conductive layer 401b.

The conductive layer 405b and the conductive layer 406b are provided over part of the insulating layer 402b.

The oxide semiconductor layer 403b overlaps with the conductive layer 401b with the insulating layer 402b interposed therebetween.

Further, in FIG. 6C, an upper surface and a side surface of the oxide semiconductor layer 403b in the transistor are in contact with the insulating layer 407b.

The insulating layer 407b is in contact with the insulating layer 402b through the conductive layer 405b, the conductive layer 406b, and the oxide semiconductor layer 403b.

Note that in FIGS. 6A and 6C, a protective insulating layer may be provided over the insulating layer.

The transistor illustrated in FIG. 6D includes a conductive layer 408b in addition to the structure illustrated in FIG.

The conductive layer 408b overlaps with the oxide semiconductor layer 403b with the insulating layer 407b interposed therebetween.

A transistor illustrated in FIG. 6E is one of top-gate transistors.

The transistor illustrated in FIG. 6E includes a conductive layer 401c, an insulating layer 402c, an oxide semiconductor layer 403c, a conductive layer 405c, and a conductive layer 406c.

The oxide semiconductor layer 403c is provided over the substrate 400c with the insulating layer 447 provided therebetween.

The conductive layer 405c and the conductive layer 406c are provided over the oxide semiconductor layer 403c, respectively.

The insulating layer 402c is provided over the oxide semiconductor layer 403c, the conductive layer 405c, and the conductive layer 406c.

The conductive layer 401c overlaps with the oxide semiconductor layer 403c with the insulating layer 402c interposed therebetween.

Further, each component illustrated in FIGS. 6A to 6E will be described.

As the substrates 400a to 400c, for example, a light-transmitting substrate can be used, and as the light-transmitting substrate, for example, a glass substrate or a plastic substrate can be used.

Each of the conductive layers 401a to 401c functions as a gate of the transistor. Note that a layer functioning as a gate of a transistor is also referred to as a gate electrode or a gate wiring.

As the conductive layers 401a to 401c, for example, a layer of a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material containing any of these materials as its main component can be used. . Alternatively, the conductive layers 401a to 401c can be formed by stacking layers of materials that can be used for forming the conductive layers 401a to 401c.

Each of the insulating layers 402a to 402c functions as a gate insulating layer of the transistor.

As the insulating layers 402a to 402c, for example, a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, an aluminum oxide layer, an aluminum nitride layer, an aluminum oxynitride layer, an aluminum nitride oxide layer, or hafnium oxide Layers can be used. Alternatively, the insulating layers 402a to 402c can be formed by stacking layers of materials that can be used for the insulating layers 402a to 402c.

As the insulating layers 402a to 402c, for example, an insulating layer formed using a material containing a Group 13 element and an oxygen element in the periodic table can be used. In the case where the oxide semiconductor layers 403a to 403c contain a Group 13 element, an insulating layer containing a Group 13 element is used as an insulating layer in contact with the oxide semiconductor layers 403a to 403c. The state of the interface between the insulating layer and the oxide semiconductor layer can be improved.

Examples of the material containing a Group 13 element include gallium oxide, aluminum oxide, aluminum gallium oxide, and gallium aluminum oxide. Aluminum gallium oxide refers to a substance having an aluminum content (atomic%) higher than the gallium content (atomic%), and gallium aluminum oxide refers to an aluminum gallium oxide (atomic%) containing aluminum. A substance with a content (atomic%) or more.

For example, by using an insulating layer containing gallium oxide as the insulating layers 402a to 402c, hydrogen or hydrogen ions at the interface between the insulating layers 402a to 402c and the oxide semiconductor layers 403a to 403c can be used. Can be reduced.

Further, for example, by using an insulating layer containing aluminum oxide as the insulating layers 402a to 402c, hydrogen at the interface between the insulating layers 402a to 402c and the oxide semiconductor layers 403a to 403c or Accumulation of hydrogen ions can be reduced. In addition, since the insulating layer containing aluminum oxide is less likely to pass water, the use of the insulating layer containing aluminum oxide can suppress entry of water into the oxide semiconductor layer through the insulating layer.

As the insulating layers 402a to 402c, for example, Al ₂ O _x (x = 3 + α, α is a value larger than 0 and smaller than 1), Ga ₂ O _x (x = 3 + α, α is larger than 0 and smaller than 1). Value), or Ga _x Al _2−x O _{3 + α} (where x is a value greater than 0 and less than 2, and α is a value greater than 0 and less than 1). Alternatively, the insulating layers 402a to 402c can be formed by stacking layers of materials that can be used for the insulating layers 402a to 402c. For example, the insulating layers 402a to 402c may be formed by stacking a plurality of layers containing gallium oxide represented by Ga ₂ O _x . Alternatively, the insulating layers 402a to 402c may be formed by stacking an insulating layer containing gallium oxide represented by Ga ₂ O _x and an insulating layer containing aluminum oxide represented by Al ₂ O _x .

The insulating layer 447 functions as a base layer for preventing diffusion of an impurity element from the substrate 400c. Note that the insulating layer 447 may be provided in the transistor having the structure illustrated in FIGS.

As the insulating layer 447, for example, a layer of a material that can be used for the insulating layers 402a to 402c can be used. Alternatively, the insulating layer 447 may be a stack of layers formed using materials that can be used for the insulating layers 402a to 402c.

Each of the oxide semiconductor layers 403a to 403c functions as a layer in which a channel of the transistor is formed. Note that a layer functioning as a layer in which a channel of the transistor is formed is also referred to as a channel formation layer. As an oxide semiconductor that can be used for the oxide semiconductor layers 403a to 403c, for example, an In-based oxide, a Sn-based oxide, a Zn-based oxide, or the like can be used. As the metal oxide, for example, a quaternary metal oxide, a ternary metal oxide, or a binary metal oxide can be used. Note that the metal oxide that can be used as the oxide semiconductor may contain gallium as a stabilizer for reducing variation in characteristics. Further, the metal oxide applicable as the oxide semiconductor may contain tin as the stabilizer. The metal oxide applicable as the oxide semiconductor may include hafnium as the stabilizer. In addition, the metal oxide that can be used as the oxide semiconductor may contain aluminum as the stabilizer. Further, the metal oxide applicable as the oxide semiconductor is, as the stabilizer, lanthanoid, lanthanum, cerium, praseodymium, neodymium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and One or more of lutetium may be included. The metal oxide that can be used as the oxide semiconductor may contain silicon oxide. For example, as a quaternary metal oxide, for example, an In—Sn—Ga—Zn oxide, an In—Hf—Ga—Zn oxide, an In—Al—Ga—Zn oxide, an In—Sn—Al A —Zn-based oxide, an In—Sn—Hf—Zn-based oxide, an In—Hf—Al—Zn-based oxide, or the like can be used. Examples of the ternary metal oxide include In—Ga—Zn-based oxide (also referred to as IGZO), In—Sn—Zn-based oxide (also referred to as ITZO), In—Al—Zn-based oxide, and Sn—Ga. -Zn oxide, Al-Ga-Zn oxide, Sn-Al-Zn oxide, In-Hf-Zn oxide, In-La-Zn oxide, In-Ce-Zn oxide In-Pr-Zn-based oxide, In-Nd-Zn-based oxide, In-Sm-Zn-based oxide, In-Eu-Zn-based oxide, In-Gd-Zn-based oxide, In-Tb -Zn oxide, In-Dy-Zn oxide, In-Ho-Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In-Yb-Zn oxide Alternatively, an In—Lu—Zn-based oxide or the like can be used. Examples of binary metal oxides include In-Zn oxides, Sn-Zn oxides, Al-Zn oxides, Zn-Mg oxides, Sn-Mg oxides, and In-Mg oxides. In-Sn oxide, In-Ga oxide, or the like can be used. The metal oxide that can be used as the oxide semiconductor may contain silicon oxide.

In the case of using an In—Zn-based oxide, for example, In: Zn = 50: 1 to In: Zn = 1: 2 (in terms of molar ratio, In ₂ O ₃ : ZnO = 25: 1 to In ₂ O ₃ : ZnO = 1: 4), preferably In: Zn = 20: 1 to In: Zn = 1: 1 (in terms of molar ratio, In ₂ O ₃ : ZnO = 10: 1 to In ₂ O ₃ : ZnO = 1 : 2), more preferably In: Zn = 15: 1 to In: Zn = 1.5: 1 (in terms of molar ratio, In ₂ O ₃ : ZnO = 15: 2 to In ₂ O ₃ : ZnO = 3 An In—Zn-based oxide semiconductor layer can be formed using an oxide target having a composition ratio of 4). For example, a target used for forming an In—Zn-based oxide semiconductor has R> 1.5P + U when the atomic ratio is In: Zn: O = P: U: R. By increasing the amount of In, the mobility of the transistor can be improved.

For the oxide semiconductor, a material represented by InMO ₃ (ZnO) _m (m is larger than 0) can also be used. M in InMO ₃ (ZnO) _m represents one or more metal elements selected from Ga, Al, Mn, and Co.

Each of the conductive layers 405a to 405c and the conductive layers 406a to 406c functions as a source or a drain of the transistor. Note that a layer functioning as the source of the transistor is also referred to as a source electrode or a source wiring, and a layer functioning as the drain of the transistor is also referred to as a drain electrode or a drain wiring.

As the conductive layers 405a to 405c and the conductive layers 406a to 406c, for example, a metal material such as aluminum, chromium, copper, tantalum, titanium, molybdenum, or tungsten, or an alloy material containing any of these metal materials as a main component Layers can be used. Alternatively, the conductive layers 405a to 405c and the conductive layers 406a to 406c can be formed by stacking layers of materials that can be used for the conductive layers 405a to 405c and the conductive layers 406a to 406c. it can.

Alternatively, the conductive layers 405a to 405c and the conductive layers 406a to 406c can be formed using a layer containing a conductive metal oxide. As the conductive metal oxide, for example, indium oxide, tin oxide, zinc oxide, an indium tin oxide alloy, or an indium zinc oxide alloy can be used. Note that the conductive metal oxide which can be used for the conductive layers 405a to 405c and the conductive layers 406a to 406c may contain silicon oxide.

As the insulating layers 407a and 407b, for example, an insulating layer formed using a material containing a Group 13 element and an oxygen element in the periodic table can be used as in the insulating layers 402a to 402c. For the insulating layer 407a and the insulating layer 407b, for example, a material represented by Al ₂ O _x , Ga ₂ O _x , or Ga _x Al _2−x O _{3 + α} can be used.

For example, the insulating layers 402a to 402c and the insulating layers 407a and 407b may be formed using an insulating layer containing gallium oxide represented by Ga ₂ O _x . One of the insulating layers 402a to 402c and the insulating layers 407a and 407b is formed using an insulating layer containing gallium oxide represented by Ga ₂ O _x , and the insulating layers 402a to 402c and the insulating layers The other of the layer 407a and the insulating layer 407b may be formed using an insulating layer containing aluminum oxide represented by Al ₂ O _x .

Each of the conductive layers 408a and 408b functions as a gate of the transistor. Note that in the case where the transistor has a structure including the conductive layer 408a and the conductive layer 408b, one of the conductive layer 401a and the conductive layer 408a or one of the conductive layer 401b and the conductive layer 408b is formed as a back gate, a back gate electrode, or a back gate. Also called wiring. By providing a plurality of layers having a function as a gate through a channel formation layer, the threshold voltage of the transistor can be controlled.

As the conductive layer 408a and the conductive layer 408b, for example, a metal material such as aluminum, chromium, copper, tantalum, titanium, molybdenum, or tungsten, or an alloy material layer containing these metal materials as a main component can be used. Alternatively, each of the conductive layers 408a and 408b can be a stack of layers formed using materials that can be used for the conductive layers 408a and 408b.

Alternatively, the conductive layer 408a and the conductive layer 408b can be a layer containing a conductive metal oxide. As the conductive metal oxide, for example, indium oxide, tin oxide, zinc oxide, an indium tin oxide alloy, or an indium zinc oxide alloy can be used. Note that the conductive metal oxide which can be used for the conductive layers 408a and 408b may contain silicon oxide.

Note that the transistor in this embodiment includes an insulating layer over part of the oxide semiconductor layer functioning as a channel formation layer, and overlaps with the oxide semiconductor layer with the insulating layer interposed therebetween. Alternatively, a structure including a conductive layer functioning as a drain may be employed. In the case of the above structure, the insulating layer functions as a layer for protecting a channel formation layer of the transistor (also referred to as a channel protective layer). As the insulating layer functioning as a channel protective layer, a layer of a material that can be used for the insulating layers 402a to 402c can be used, for example. Alternatively, an insulating layer functioning as a channel protective layer may be formed by stacking layers of materials that can be used for the insulating layers 402a to 402c.

Note that as illustrated in FIGS. 6A to 6E, the transistor of this embodiment is not necessarily provided with a structure in which the entire oxide semiconductor layer overlaps with a conductive layer functioning as a gate electrode. However, by using a structure in which the entire oxide semiconductor layer overlaps with the conductive layer functioning as the gate electrode, incidence of light on the oxide semiconductor layer can be suppressed.

Further, as an example of a method for manufacturing the transistor of this embodiment, an example of a method for manufacturing the transistor illustrated in FIG. 6A will be described with reference to FIGS. 7A to 7E are schematic cross-sectional views for describing an example of a method for manufacturing the transistor illustrated in FIG.

First, as shown in FIG. 7A, a substrate 400a is prepared, a first conductive film is formed over the substrate 400a, and a part of the first conductive film is etched to form a conductive layer 401a. To do.

For example, the first conductive film can be formed by forming a film of a material that can be used for the conductive layer 401a by a sputtering method. Alternatively, the first conductive film can be formed by stacking films of materials applicable to the conductive layer 401a.

Note that by using a high-purity gas from which impurities such as hydrogen, water, a hydroxyl group, or hydride are removed as the sputtering gas, the impurity concentration of the formed film can be reduced.

Note that before the film is formed by a sputtering method, preheating treatment may be performed in a preheating chamber of a sputtering apparatus. By performing the preheating treatment, impurities such as hydrogen and moisture can be eliminated.

Further, before forming a film using a sputtering method, for example, in an argon, nitrogen, helium, or oxygen atmosphere, a voltage is applied to the substrate side using an RF power source without applying a voltage to the target side, You may perform the process (it is also called reverse sputtering) which forms a plasma and modify | reforms a to-be-formed surface. By performing reverse sputtering, powdery substances (also referred to as particles or dust) attached to the formation surface can be removed.

In the case where a film is formed by a sputtering method, residual moisture in the deposition chamber in which the film is formed can be removed using an adsorption-type vacuum pump or the like. As an adsorption-type vacuum pump, for example, a cryopump, an ion pump, a titanium sublimation pump, or the like can be used. Further, residual moisture in the deposition chamber can be removed using a turbo molecular pump provided with a cold trap.

In addition, in the example of the method for manufacturing the transistor of this embodiment, as in the method for forming the conductive layer 401a, when a layer is formed by etching part of the film, for example, part of the film is formed by a photolithography process. A layer can be formed by forming a resist mask thereon and etching the film using the resist mask. In this case, the resist mask is removed after the formation of the layer.

Further, a resist mask may be formed using an inkjet method. By using the ink jet method, a photomask is not necessary, so that manufacturing cost can be reduced. Alternatively, a resist mask may be formed using an exposure mask having a plurality of regions with different transmittances (also referred to as a multi-tone mask). By using a multi-tone mask, a resist mask having regions with different thicknesses can be formed, so that the number of resist masks used for manufacturing a transistor can be reduced.

Next, as illustrated in FIG. 7B, the insulating layer 402a is formed by forming a first insulating film over the conductive layer 401a.

For example, the first insulating film can be formed by forming a film of a material that can be used for the insulating layer 402a by a sputtering method, a plasma CVD method, or the like. Alternatively, the first insulating film can be formed by stacking films of materials that can be used for the insulating layer 402a. Further, by forming a film of a material that can be used for the insulating layer 402a by using a high-density plasma CVD method (for example, a high-density plasma CVD method using μ waves (for example, μ waves having a frequency of 2.45 GHz)), The insulating layer 402a can be made dense and the withstand voltage of the insulating layer 402a can be improved.

Next, as illustrated in FIG. 7C, an oxide semiconductor film is formed over the insulating layer 402a, and then part of the oxide semiconductor film is etched, whereby the oxide semiconductor layer 403a is formed.

For example, the oxide semiconductor film can be formed by forming a film of an oxide semiconductor material that can be used for the oxide semiconductor layer 403a by a sputtering method. Note that the oxide semiconductor film may be formed in a rare gas atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen.

An oxide semiconductor film can be formed using an oxide target having a composition ratio of In ₂ O ₃ : Ga ₂ O ₃ : ZnO = 1: 1: 1 [molar ratio] as a sputtering target. For example, the oxide semiconductor film may be formed using an oxide target having a composition ratio of In ₂ O ₃ : Ga ₂ O ₃ : ZnO = 1: 1: 2 [molar ratio].

Further, when the oxide semiconductor film is formed by a sputtering method, the substrate 400a may be in a reduced pressure state, and the substrate 400a may be heated to 100 ° C to 600 ° C, preferably 200 ° C to 400 ° C. By heating the substrate 400a, the impurity concentration of the oxide semiconductor film can be reduced, and damage to the oxide semiconductor film due to a sputtering method can be reduced.

Next, as illustrated in FIG. 7D, a second conductive film is formed over the insulating layer 402a and the oxide semiconductor layer 403a, and part of the second conductive film is etched, whereby the conductive layer 405a is formed. Then, a conductive layer 406a is formed.

For example, the second conductive film can be formed by forming a film of a material that can be used for the conductive layers 405a and 406a by a sputtering method or the like. Alternatively, the second conductive film can be formed by stacking films of materials applicable to the conductive layers 405a and 406a.

Next, as illustrated in FIG. 7E, an insulating layer 407a is formed so as to be in contact with the oxide semiconductor layer 403a.

For example, by forming a film applicable to the insulating layer 407a using a sputtering method in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen, the insulating layer 407a can be formed. By forming the insulating layer 407a by a sputtering method, reduction in resistance of the oxide semiconductor layer 403a functioning as a back channel of the transistor can be suppressed. The substrate temperature at the time of forming the insulating layer 407a is preferably room temperature or higher and 300 ° C. or lower.

Further, before the insulating layer 407a is formed, plasma treatment using a gas such as N ₂ O, N ₂ , or Ar is performed to remove adsorbed water or the like attached to the exposed surface of the oxide semiconductor layer 403a. May be. In the case where plasma treatment is performed, the insulating layer 407a is preferably formed without being exposed to the air thereafter.

Further, in the example of the method for manufacturing the transistor illustrated in FIG. 6A, heat treatment is performed at a temperature of, for example, 400 ° C. to 750 ° C., or 400 ° C. to less than the strain point of the substrate. For example, after an oxide semiconductor film is formed, a part of the oxide semiconductor film is etched, a second conductive film is formed, a part of the second conductive film is etched, or the insulating layer 407a After the formation, the above heat treatment is performed.

Note that as the heat treatment apparatus for performing the above heat treatment, an apparatus for heating an object to be processed by heat conduction or heat radiation from a heating element such as an electric furnace or a resistance heating element can be used, for example, GRTA (Gas Rapid) An RTA (Rapid Thermal Annealing) apparatus such as a Thermal Annealing (RTA) apparatus or an LRTA (Lamp Rapid Thermal Annealing) apparatus can be used. The LRTA apparatus is an apparatus that heats an object to be processed by radiation of light (electromagnetic waves) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. A GRTA apparatus is an apparatus that performs heat treatment using a high-temperature gas. As the high-temperature gas, for example, a rare gas or an inert gas (for example, nitrogen) that does not react with an object to be processed by heat treatment can be used.

In addition, after performing the above heat treatment, a high purity oxygen gas or a high purity N ₂ O gas is supplied to the same furnace as that in which the heat treatment is performed while maintaining the heating temperature or in the process of lowering the temperature from the heating temperature. Alternatively, ultra-dry air (an atmosphere having a dew point of −40 ° C. or lower, preferably −60 ° C. or lower) may be introduced. At this time, the oxygen gas or the N _{2 O} gas, water, preferably contains no hydrogen, and the like. Further, the purity of the oxygen gas or N ₂ O gas introduced into the heat treatment apparatus is 6 N or more, preferably 7 N or more, that is, the impurity concentration in the oxygen gas or N ₂ O gas is 1 ppm or less, preferably 0.1 ppm or less. It is preferable that Oxygen is supplied to the oxide semiconductor layer 403a by the action of oxygen gas or N ₂ O gas, so that defects due to oxygen deficiency in the oxide semiconductor layer 403a can be reduced.

Further, separately from the heat treatment, after the insulating layer 407a is formed, heat treatment (preferably 200 ° C. to 400 ° C., for example, 250 ° C. to 350 ° C.) is performed in an inert gas atmosphere or an oxygen gas atmosphere. You may go.

Alternatively, oxygen doping treatment with oxygen plasma may be performed after the insulating layer 402a is formed, the oxide semiconductor film is formed, the conductive layer to be the source or drain electrode is formed, the insulating layer is formed, or after the heat treatment. For example, the oxygen doping process may be performed with a high-density plasma of 2.45 GHz. Alternatively, oxygen doping treatment may be performed using an ion implantation method or ion doping. By performing the oxygen doping treatment, variation in electric characteristics of the manufactured transistor can be reduced. For example, oxygen doping treatment is performed so that one or both of the insulating layer 402a and the insulating layer 407a has a higher oxygen content than the stoichiometric composition ratio. Accordingly, excess oxygen in the insulating layer is easily supplied to the oxide semiconductor layer 403a. Accordingly, oxygen defects in the oxide semiconductor layer 403a, or one or both of the insulating layer 402a and the insulating layer 407a, and the interface between the oxide semiconductor layer 403a can be reduced; therefore, the carrier concentration of the oxide semiconductor layer 403a Can be further reduced.

For example, in the case where an insulating layer containing gallium oxide is formed as one or both of the insulating layer 402a and the insulating layer 407a, oxygen can be supplied to the insulating layer and the composition of gallium oxide can be changed to Ga ₂ O _x .

In the case where an insulating layer containing aluminum oxide is formed as one or both of the insulating layer 402a and the insulating layer 407a, oxygen can be supplied to the insulating layer so that the composition of the aluminum oxide can be Al ₂ O _x .

In the case where an insulating layer containing gallium aluminum oxide or aluminum gallium oxide is formed as one or both of the insulating layer 402a and the insulating layer 407a, oxygen is supplied to the insulating layer, and the composition of gallium aluminum oxide or aluminum gallium oxide is changed. it can be a _{Ga x Al 2-x O 3} + α.

Through the above steps, impurities such as hydrogen, water, a hydroxyl group, or a hydride (also referred to as a hydrogen compound) are excluded from the oxide semiconductor layer 403a and oxygen is supplied to the oxide semiconductor layer 403a, whereby the oxide semiconductor layer 403a The semiconductor layer can be highly purified.

Note that although an example of a method for manufacturing the transistor illustrated in FIG. 6A is described, the present invention is not limited to this, and for example, each component illustrated in FIGS. 6B to 6E has a name illustrated in FIG. ) And at least part of the functions are the same as those of each component illustrated in FIG. 6A, the description of the example of the method for manufacturing the transistor illustrated in FIG. can do.

As described with reference to FIGS. 6 and 7, an example of the transistor in this embodiment includes a conductive layer having a function as a gate, an insulating layer having a function as a gate insulating layer, and a gate insulating layer. An oxide semiconductor layer which overlaps with a conductive layer having a function as a gate through a functional insulating layer and is electrically connected to the oxide semiconductor layer and functions as one of a source and a drain And a conductive layer that is electrically connected to the oxide semiconductor layer and functions as the other of the source and the drain.

An example of the transistor in this embodiment is an oxide semiconductor layer through an oxide semiconductor layer, a conductive layer that functions as one of a source and a drain, and a conductive layer that functions as the other of a source and a drain. The insulating layer in contact with the insulating layer is in contact with the insulating layer functioning as a gate insulating layer. With the above structure, the oxide semiconductor layer, the conductive layer functioning as one of the source and the drain, and the insulating layer and gate insulating in which the conductive layer functioning as the other of the source and the drain is in contact with the oxide semiconductor layer Since the oxide semiconductor layer, the conductive layer functioning as one of the source and the drain, and the conductive layer functioning as the other of the source and the drain, impurities are intruded because the insulating layer functions as a layer. Can be suppressed.

In addition, the concentration of alkali metal contained in the oxide semiconductor layer in which a channel is formed is preferably low. For example, in the case where an oxide semiconductor layer in which a channel is formed contains sodium, the concentration of sodium contained in the oxide semiconductor layer in which a channel is formed is 5 × 10 ¹⁶ / cm ³ or less, and further, 1 × 10 ¹⁶ / Cm ³ or less, more preferably 1 × 10 ¹⁵ / cm ³ or less. For example, in the case where an oxide semiconductor layer in which a channel is formed contains lithium, the concentration of lithium contained in the oxide semiconductor layer in which a channel is formed is 5 × 10 ¹⁵ / cm ³ or less, and further 1 × It is preferable that it is 10 ¹⁵ / cm ³ or less. For example, in the case where the oxide semiconductor layer in which a channel is formed contains potassium, the concentration of potassium contained in the oxide semiconductor layer in which a channel is formed is 5 × 10 ¹⁵ / cm ³ or less, and further 1 × It is preferable that it is 10 ¹⁵ / cm ³ or less. For example, when an insulating layer in contact with the oxide semiconductor layer is an oxide, sodium enters the oxide insulating layer, and deterioration of transistor characteristics (for example, shift in threshold voltage, decrease in mobility, or the like) occurs. Further, it causes variation in characteristics among a plurality of transistors. Therefore, by reducing the concentration of alkali metal contained in the oxide semiconductor layer in which a channel is formed, deterioration in characteristics of the transistor due to alkali metal can be suppressed.

As described above, an oxide semiconductor layer in which a channel is formed is an oxide semiconductor layer that is i-type or substantially i-type by being highly purified. By highly purifying the oxide semiconductor layer, the carrier concentration of the oxide semiconductor layer is less than 1 × 10 ¹⁴ / cm ³ , preferably less than 1 × 10 ¹² / cm ³ , and more preferably 1 × 10 ¹¹ / cm ^3. It is possible to suppress the change in characteristics due to a temperature change. Further, with the above structure, the off current per channel width of 1 μm is set to 10 aA (1 × 10 ⁻¹⁷ A) or less, and further the off current per channel width of 1 μm is 1 aA (1 × 10 ⁻¹⁸ A). Hereinafter, the off current per channel width of 1 μm is 10 zA (1 × 10 ⁻²⁰ A) or less, further the off current per channel width of 1 μm is 1 zA (1 × 10 ⁻²¹ A) or less, and further per 1 μm of channel width. The off current can be made 100yA (1 × 10 ⁻²² A) or less. The lower the off-state current of the transistor, the better. However, the lower limit value of the off-state current of the transistor of this embodiment is estimated to be about 10 ⁻³⁰ A / μm.

The transistor including the oxide semiconductor layer of this embodiment is, for example, one of the display circuit, the display driver circuit, the display data signal output circuit, the photodetector circuit, and the photodetector circuit of the input / output device of the above embodiment. By using it for a plurality of transistors, the reliability of the input / output device can be improved.

(Embodiment 7)
In this embodiment, examples of electronic devices each including the input / output device in the above embodiment are described.

Configuration examples of the electronic device of this embodiment will be described with reference to FIGS. FIG. 8A to FIG. 8D are schematic views for describing structural examples of the electronic device of this embodiment.

The electronic device illustrated in FIG. 8A is an example of a portable information terminal. An information terminal illustrated in FIG. 8A includes a housing 1001a and a display portion 1002a provided in the housing 1001a.

Note that one or more of a connection terminal for connecting to an external device and a button for operating the portable information terminal illustrated in FIG. 8A may be provided on the side surface 1003a of the housing 1001a.

A portable information terminal illustrated in FIG. 8A includes, in a housing 1001a, a CPU, a storage circuit, an image processing circuit, an external device, a CPU, a storage circuit, and the like in the input / output device of the above embodiment. An interface for transmitting / receiving a signal to / from an image processing circuit and an antenna for transmitting / receiving a signal to / from an external device are provided. Note that one or more integrated circuits having a specific function may be provided in the housing 1001a.

The portable information terminal illustrated in FIG. 8A has functions as one or more of a telephone set, an e-book reader, a personal computer, and a game machine, for example.

The electronic device illustrated in FIG. 8B is an example of a foldable portable information terminal. A portable information terminal illustrated in FIG. 8B includes a housing 1001b, a display portion 1002b provided in the housing 1001b, a housing 1004, a display portion 1005 provided in the housing 1004, and a housing 1001b. And a shaft portion 1006 for connecting the housing 1004.

In the portable information terminal illustrated in FIG. 8B, the housing 1001 b can be overlapped with the housing 1004 by moving the housing 1001 b or the housing 1004 with the shaft portion 1006.

Note that one or a plurality of connection terminals for connecting to an external device on the side surface 1003b of the housing 1001b or the side surface 1007 of the housing 1004 and buttons for operating the portable information terminal illustrated in FIG. It may be provided.

Further, different images or a series of images may be displayed on the display portion 1002b and the display portion 1005. Note that the display portion 1005 is not necessarily provided, and a keyboard which is an input device may be provided instead of the display portion 1005.

A portable information terminal illustrated in FIG. 8B includes a CPU, a storage circuit, an image processing circuit, an external device, a CPU in the input / output device of the above embodiment, in the housing 1001b or the housing 1004. And an interface for transmitting and receiving signals to and from the storage circuit and the image processing circuit. One or more integrated circuits having a specific function may be provided in the housing 1001b or the housing 1004. Alternatively, the portable information terminal illustrated in FIG. 8B may be provided with an antenna that transmits and receives signals to and from the outside.

The portable information terminal illustrated in FIG. 8B functions as one or more of a telephone set, an e-book reader, a personal computer, and a game machine, for example.

The electronic device illustrated in FIG. 8C is an example of a stationary information terminal. A stationary information terminal illustrated in FIG. 8C includes a housing 1001c and a display portion 1002c provided in the housing 1001c.

Note that the display portion 1002c can be provided on the deck portion 1008 of the housing 1001c.

8C includes a CPU, a storage circuit, an image processing circuit, an external device, a CPU, and a storage circuit in the input / output device of the above embodiment in a housing 1001c. And an interface for transmitting and receiving signals to and from the image processing circuit. Note that one or more integrated circuits having a specific function may be provided in the housing 1001c. Alternatively, the stationary information terminal illustrated in FIG. 8C may be provided with an antenna that transmits and receives signals to and from the outside.

Furthermore, you may provide one or more of the ticket output part which outputs a ticket etc. to the side surface 1003c of the housing | casing 1001c in the installation type information terminal shown in FIG.8 (C), a coin insertion part, and a banknote insertion part.

The installed information terminal illustrated in FIG. 8C has a function as, for example, an automatic teller machine, an information communication terminal (also referred to as a multimedia station) for ordering a ticket, or a gaming machine.

FIG. 8D illustrates an example of a stationary information terminal. A stationary information terminal illustrated in FIG. 8D includes a housing 1001d and a display portion 1002d provided in the housing 1001d. Note that a support base for supporting the housing 1001d may be provided.

Note that one or a plurality of connection terminals for connecting to an external device and buttons for operating the stationary information terminal illustrated in FIG. 8D may be provided on the side surface 1003d of the housing 1001d.

8D includes a CPU, a storage circuit, an image processing circuit, an external device, a CPU, and a storage circuit in the input / output device of the above embodiment in a housing 1001d. And an interface for transmitting and receiving signals to and from the image processing circuit. One or more integrated circuits having a specific function may be provided in the housing 1001d. Alternatively, the stationary information terminal illustrated in FIG. 8D may be provided with an antenna that transmits and receives signals to and from the outside.

The stationary information terminal illustrated in FIG. 8D functions as a digital photo frame, an input / output monitor, or a television device, for example.

The input / output unit and the input / output control unit in the input / output device of the above embodiment are used, for example, as a display unit of an electronic device. For example, the display units 1002a to 1002d illustrated in FIGS. Used as Alternatively, the input / output portion in the input / output device of the above embodiment may be used as the display portion 1005 illustrated in FIG.

As described with reference to FIG. 8, an example of the electronic device of this embodiment has a structure including a display portion in which the input / output device of the above embodiment is used. With the above configuration, the electronic device can be operated or information can be input to the electronic device using, for example, a finger or a pen.

In an example of the electronic device of this embodiment, the housing includes one or more of a photoelectric conversion unit that generates a power supply voltage according to incident illuminance and an operation unit that operates the input / output device. May be. For example, the provision of the photoelectric conversion unit eliminates the need for an external power supply, and thus the electronic device can be used for a long time even in a place where there is no external power supply.

101 Input / Output Unit 101a Display Circuit Control Unit 101b Light Detection Circuit Control Unit 101c Light Source Unit 101d Pixel Unit 102 Input / Output Control Unit 103 Data Processing Unit 111 Display Drive Circuit 112 Display Data Signal Output Circuit 113 Photodetection Drive Circuit 114 Light Unit 115d Display Circuit 115p Photodetection circuit 116 Circuit 121 Display circuit control unit 122 Photodetection circuit control unit 131 Image processing circuit 132 Memory circuit 133 CPU
142a Read object 142b Read object 143 Button image 144a Read object image 144b Read object image 144c Read object image 144d Read object image 151a Photoelectric conversion element 151b Photoelectric conversion element 151c Photoelectric conversion element 152a transistor 152b transistor 152c transistor 153a Transistor 153b Transistor 153c Transistor 154 Transistor 155 Transistor 156 Capacitor 161a Transistor 161b Transistor 162a Liquid crystal element 162b Liquid crystal element 163a Capacitor 163b Capacitor 164 Capacitor 165 Transistor 166 Transistor 400a Substrate 400b Substrate 400c Substrate 401a Conductive layer 401c Conductive layer 401c 402a Insulating layer 402b Insulating layer 02c insulating layer 403a oxide semiconductor layer 403b oxide semiconductor layer 403c oxide semiconductor layer 405a conductive layer 405b conductive layer 405c conductive layer 406a conductive layer 406b conductive layer 406c conductive layer 407a insulating layer 407b insulating layer 408a conductive layer 408b conductive layer 447 insulating Layer 1001a Case 1001b Case 1001c Case 1001d Case 1002a Display unit 1002b Display unit 1002c Display unit 1002d Display unit 1003a Side surface 1003b Side surface 1003c Side surface 1003d Side surface 1004 Case 1005 Display unit 1006 Shaft unit 1007 Side surface 1008 Deck unit

Claims (5)

An input / output unit including a pixel unit;
An image processing circuit, a storage circuit storing a plurality of programs, and a data processing unit including a CPU,
The pixel portion is
A plurality of display circuits that receive a display selection signal, receive a display data signal according to the display selection signal, and enter a display state according to the data of the input display data signal;
A driving method of an input / output device comprising a plurality of light detection circuits that generate optical data that is data corresponding to the illuminance of each incident light,
When an object to be read is superimposed on the pixel portion, first light data is generated by each of the plurality of light detection circuits, and image data is generated by the image processing circuit using the first light data. The image data is held in the storage circuit, read out from the storage circuit by the CPU, the image data is input to the input / output unit as an image signal, and a plurality of display data is output from the image signal by the input / output unit. A signal is generated, and the generated plurality of display data signals are sequentially input to each of the plurality of display circuits, and an image corresponding to the data of the plurality of display data signals is displayed on the pixel portion by the plurality of display circuits. By displaying, an image having a mirror image relationship with the object to be read is displayed in an area of the pixel portion that overlaps the object to be read, and the relationship between the object to be read and the mirror image is displayed. The driving method of the input and output device between, and generates a second optical data by each of the plurality of light detection circuit that displays an image including an image to be. An input / output unit including a display circuit control unit, a photodetection circuit control unit, and a pixel unit;
An image processing circuit, a storage circuit storing a plurality of programs, and a data processing unit including a CPU,
The display circuit controller is
A display driving circuit for outputting a display selection signal;
A display data signal output circuit that receives an image signal and outputs a plurality of display data signals from the input image signal;
The photodetection circuit driver is
Including the photodetection drive circuit;
The pixel portion is
A plurality of display circuits that are inputted with the display selection signal, and in which one of the plurality of display data signals is inputted in accordance with the display selection signal, and in a display state according to the data of the inputted display data signal;
According to the photodetection drive circuit, a plurality of photodetection circuits that generate optical data that is data corresponding to the illuminance of each incident light, and a driving method for an input / output device comprising:
When an object to be read is superimposed on the pixel portion, first light data is generated by each of the plurality of light detection circuits, and image data is generated by the image processing circuit using the first light data. The image data is held in the storage circuit, read out from the storage circuit by the CPU, the image data is input to the display data signal output circuit as an image signal, and from the image signal by the display data signal output circuit. A plurality of display data signals are generated, and the generated plurality of display data signals are sequentially input to each of the plurality of display circuits, and the plurality of display circuits convert the data of the plurality of display data signals into the pixel portion. By displaying a corresponding image, an image having a mirror image relationship with the object to be read is displayed in an area of the pixel portion that overlaps the object to be read. The second optical data is generated by each of the plurality of light detection circuits while an image including an image having a mirror image relationship with the object to be read is displayed. . In claim 1 or claim 2,
The plurality of display circuits display an image corresponding to the data of the plurality of display data signals on the pixel unit, so that the object to be read is mirror-inverted in an area of the pixel unit that does not overlap with the object to be read. A method for driving an input / output device, characterized in that a displayed image is displayed. An input / output unit including a pixel unit;
An image processing circuit, a storage circuit storing a plurality of programs, and a data processing unit including a CPU,
The pixel portion is
A plurality of display circuits that receive a display selection signal, receive a display data signal according to the display selection signal, and enter a display state according to the data of the input display data signal;
A driving method of an input / output device comprising a plurality of light detection circuits that generate optical data that is data corresponding to the illuminance of each incident light,
A button image is displayed on the pixel portion;
When a first object to be read is superimposed on the pixel portion, first light data is generated by each of the plurality of light detection circuits, and image data is generated by the image processing circuit using the first light data. Generated and held in the storage circuit, the CPU reads the image data from the storage circuit, inputs the image data as an image signal to the input / output unit, and the input / output unit outputs a plurality of images from the image signal. The plurality of display data signals are sequentially input to each of the plurality of display circuits, and the plurality of display circuits respond to data of the plurality of display data signals to the pixel portion. Displaying an image obtained by mirror-inversion of the read object in a region of the pixel portion that does not overlap with the read object,
After that, when a second object to be read is superimposed on the area of the pixel portion where the button image is displayed, a relationship between the object to be read and a mirror image is formed on the area of the pixel portion to be overlapped with the object to be read. And the second optical data is generated by each of the plurality of photodetection circuits while displaying an image including an image having a mirror image relationship with the object to be read. Driving method of input / output device. An input / output unit including a display circuit control unit, a photodetection circuit control unit, and a pixel unit;
An image processing circuit, a storage circuit storing a plurality of programs, and a data processing unit including a CPU,
The display circuit controller is
A display driving circuit for outputting a display selection signal;
A display data signal output circuit that receives an image signal and outputs a plurality of display data signals from the input image signal;
The photodetection circuit driver is
Including the photodetection drive circuit;
The pixel portion is
A plurality of display circuits that are inputted with the display selection signal, and in which one of the plurality of display data signals is inputted in accordance with the display selection signal, and in a display state according to the data of the inputted display data signal;
According to the photodetection drive circuit, a plurality of photodetection circuits that generate optical data that is data corresponding to the illuminance of each incident light, and a driving method for an input / output device comprising:
A button image is displayed on the pixel portion;
When a first object to be read is superimposed on the pixel portion, first light data is generated by each of the plurality of light detection circuits, and image data is generated by the image processing circuit using the first light data. Generated and held in the storage circuit, the CPU reads the image data from the storage circuit, inputs the image data as an image signal to the input / output unit, and the input / output unit outputs a plurality of images from the image signal. The plurality of display data signals are sequentially input to each of the plurality of display circuits, and the plurality of display circuits respond to data of the plurality of display data signals to the pixel portion. Displaying an image obtained by mirror-inversion of the read object in a region of the pixel portion that does not overlap with the read object,
After that, when a second object to be read is superimposed on the area of the pixel portion where the button image is displayed, a relationship between the object to be read and a mirror image is formed on the area of the pixel portion overlapping the object to be read. The second optical data is generated by each of the plurality of photodetector circuits while an image is displayed and an image including an image having a mirror image relationship with the object to be read is displayed. Driving method of output device.

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