JP2011237266A - Cell voltage detection device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a cell voltage detection device in which the calculation accuracy of cell voltage is improved.SOLUTION: A cell voltage detection device comprises: a reference voltage circuit 50 for applying reference voltage Vref so that the output value of an operational amplifier 40 is increased to the plus side; object potential difference acquisition means for obtaining an output from an AD converter circuit 60 during inputting the potential difference of a detection object cell into the operational amplifier 40 as an object potential difference output value Vobj; output value acquisition means for correction for obtaining an output from an AD converter circuit 60 during inputting a negative electrode of a detection object cell into the operational amplifier 40 as an output value for correction Vcom; and cell voltage calculation means for calculating a cell voltage Vcell of a detection object cell based on the obtained object potential difference output value Vobj and the output value for correction Vcom.

Description

  The present invention relates to a cell voltage detection device that detects a potential difference between a positive electrode and a negative electrode for each of a plurality of battery cells connected in series as a cell voltage.

  Conventionally, it is known that a plurality of battery cells such as lithium storage batteries are connected in series to constitute one battery device. In this case, control (equalization control) is performed so that the potential difference (cell voltage Vcell) of each battery cell is the same, or control is performed so that all battery cells are within the upper and lower limits of the operating voltage range (with respect to the upper and lower limit voltages). Protection control) to suppress deterioration of the lithium storage battery. In order to perform these controls with high accuracy, it is necessary to detect the cell voltage Vcell of each battery cell with high accuracy.

  An apparatus for detecting the cell voltage Vcell is disclosed in Patent Document 1 and the like, and is configured by an operational amplifier 40 (differential amplifier circuit), an AD converter circuit 60, and switching means 20x and 30x as illustrated in FIG. .

  The operational amplifier 40 outputs an analog signal corresponding to the potential difference applied to its own positive input terminal 41 and negative input terminal 42. The AD conversion circuit 60 converts the analog signal output from the operational amplifier 40 into a digital signal. The positive electrode switching unit 20 x performs switching so that a location (potential) selected from the positive electrodes and the negative electrodes of the plurality of battery cells 11 to 15 is connected to the positive electrode input terminal 41 of the operational amplifier 40. The negative electrode changeover switch 30 x performs switching so that a location (potential) selected from the positive electrodes and the negative electrodes of the plurality of battery cells 11 to 15 is connected to the negative input terminal 42 of the operational amplifier 40.

  And while connecting the positive electrode of the battery cell (detection object cell) used as detection object to positive electrode input terminal 41, the negative electrode of detection object cell is connected to negative electrode input terminal 42, and the output of AD conversion circuit 60 at that time is connected. Obtained as the target potential difference output value Vobj.

  Here, for example, when the fourth battery cell 14 is a detection target cell, the target potential difference output value Vobj obtained by connecting the positive electrode V4 and the negative electrode V3 of the fourth battery cell 14 to the input terminals 41 and 42 is An error (common-mode voltage error) generated according to the total cell voltage Vn (common-mode voltage) of the first to third battery cells is included. Therefore, in Patent Document 1, the negative electrode of the detection target cell is connected to both input terminals 41 and 42, the output of the AD conversion circuit 60 at that time is acquired as a correction output value Vcom, and Vcom is subtracted from Vobj. The cell voltage Vcell is calculated. According to this, it becomes unnecessary to provide a plurality of operational amplifiers corresponding to each of the plurality of battery cells, and the cell voltage Vcell of each of the battery cells 11 to 15 can be detected.

  Furthermore, in the cell voltage detection device described in Patent Document 1, by setting the values of resistors R1 to R4 such as a negative feedback resistor connected to the operational amplifier 40 so that the output value of the operational amplifier 40 becomes a positive voltage, It is possible to employ an AD conversion circuit 60 that can AD-convert only a positive voltage analog signal (that is, an inexpensive AD conversion target limited to a positive voltage).

JP-A-11-237455

  However, in the case of the AD conversion circuit 60 in which the object of AD conversion is limited to a positive voltage in this way, the AD conversion accuracy decreases when the output value of the operational amplifier 40 is near zero. Then, when the negative electrode of the detection target cell is connected to both input terminals 41 and 42 in order to obtain the correction output value Vcom, the output value of the operational amplifier 40 becomes a minute voltage close to zero. The detection accuracy is lowered, and as a result, the calculation accuracy of the cell voltage Vcell is lowered.

  To solve this problem, the present inventor increases the output value of the operational amplifier 40 when obtaining the correction output value Vcom by setting the resistors R1 to R4 so as to raise the output value of the operational amplifier 40 to the plus side. In this case, it was found that the following problems occur.

  That is, the target potential difference output value Vobj includes an error (offset current error) generated according to the offset current of the operational amplifier 40 in addition to the above-described common-mode voltage error. This offset current error is an inherent error of the operational amplifier 40 itself. When R1 to R4 are set as described above, it has been found that an offset current error (an operational amplifier inherent error) included in the target potential difference output value Vobj increases, resulting in a decrease in calculation accuracy of the cell voltage Vcell.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a cell voltage detection device that improves the calculation accuracy of the cell voltage. Another object of the present invention is to provide a cell voltage detection device that reduces the cell voltage calculation processing load.

  Hereinafter, means for solving the above-described problems and the operation and effects thereof will be described.

  According to the first aspect of the present invention, in the cell voltage detection device that detects the potential difference between the positive electrode and the negative electrode of each of the plurality of battery cells connected in series as the cell voltage, the cell voltage is applied to its own positive input terminal and negative input terminal. A differential amplifier circuit that outputs an analog signal corresponding to a potential difference; an AD converter circuit that converts a positive signal of the analog signals output from the differential amplifier circuit into a digital signal; and positive electrodes of the plurality of battery cells And a positive electrode switching means for switching a portion selected from among the negative electrodes to be connected to the positive electrode input terminal, and a portion selected from among the positive electrodes and the negative electrodes of the plurality of battery cells are switched to be connected to the negative electrode input terminal. And a negative electrode switching means.

  Then, a reference voltage applying means for applying a reference voltage so that the output value of the differential amplifier circuit is pulled up to the plus side, and one of the positive electrode and the negative electrode of the battery cell to be detected is connected to the positive input terminal Target potential difference output value acquisition means for operating the positive electrode switching means and the negative electrode switching means to connect the other to the negative electrode input terminal, and acquiring the output of the AD conversion circuit at that time as a target potential difference output value; The positive electrode switching means and the negative electrode switching means are operated so as to connect the negative electrode of the battery cell to be detected to the positive electrode input terminal and the negative electrode input terminal, respectively, and the output of the AD converter circuit at that time is Based on the correction output value acquisition means for acquiring the correction output value, the target potential difference output value and the correction output value, the detection target And the cell voltage calculating means for calculating a cell voltage is the potential difference ponds cells, characterized in that it comprises a.

  According to this, by providing the reference voltage application means, the output value of the differential amplifier circuit is raised to the plus side by the amount of the reference voltage, and the output value of the differential amplifier circuit becomes a minute voltage close to zero. Can be avoided. Therefore, even when the negative electrode of the detection target cell is connected to both front input terminals so as to be acquired as a correction output value, it is possible to avoid the output value of the differential amplifier circuit from becoming a minute voltage. Therefore, even if the AD conversion target is an inexpensive AD conversion circuit limited to a positive voltage, it is possible to suppress a decrease in AD conversion accuracy.

  In addition, since the output value of the differential amplifier circuit is pulled up by the reference voltage application means, it is possible to eliminate the need for setting a resistor that increases the offset current error (op-amp inherent error) included in the target potential difference output value.

  As described above, according to the present invention, it is possible to acquire a correction output value with high AD conversion accuracy without increasing the offset current error included in the target potential difference output value, thereby improving the calculation accuracy of the cell voltage. be able to.

  According to a second aspect of the present invention, the cell voltage calculation means is obtained by subtracting the correction output value Vcom (see FIG. 3A) from the target potential difference output value Vobj (see FIG. 3B). Based on the value, the cell voltage Vcell of the battery cell to be detected is calculated.

  On the other hand, in the invention according to claim 3, the positive electrode switching means is configured to be switchable so that the positive electrode input terminal is also connected to the ground, and the negative electrode switching means is connected to the negative electrode input terminal to the ground. The positive switching means and the negative switching means are operated so as to connect a ground to each of the positive input terminal and the negative input terminal, and the output of the AD conversion circuit at that time is converted to the differential amplification. The inherent error Vgnd (see FIG. 3D) acquired by the circuit and the reference voltage applying means, and the inherent error Vgnd (=) from the correction output value Vcom (see FIG. 3C). The value obtained by subtracting Verr2) is acquired as the common-mode voltage error Verr1 generated according to the cell voltage of the battery cell located on the lower potential side than the battery cell to be detected. Common-mode voltage error acquisition means, and the cell voltage calculation means subtracts the common-mode voltage error Verr1 and the intrinsic error Vgnd (= Verr2) from the target potential difference output value Vobj (see FIG. 3 (e)). Based on the obtained value, the cell voltage Vcell of the battery cell to be detected is calculated.

  Here, as shown in FIG. 2, the output voltage Vout of the differential amplifier circuit includes at least various errors (B) to (F) described below in addition to the value (A) to be originally obtained. The present inventor obtained the following knowledge. That is, the common-mode voltage error (B) generated according to the common-mode voltage Vn, the offset voltage error (C) generated according to the offset voltage Vos, the offset current error (D) generated according to the offset current Ios, and the bias current Ibp This is a bias current error (E) that occurs, and a reference voltage error (F) that occurs according to the machine difference variation of the reference voltage Vref. As shown in FIG. 3, the target potential difference output value Vobj includes all of the above (A) to (F), and the correction output value Vcom includes various errors (B) to (F). Everything is included.

  According to the second aspect of the invention in view of this point, since the cell voltage Vcell of the detection target cell is calculated on the basis of “Vobj−Vcom”, the various advantages (B) to (F) are originally removed. The desired value (A), that is, the cell voltage Vcell of the detection target cell can be calculated with high accuracy. Further, according to the third aspect of the invention, since the cell voltage Vcell of the detection target cell is calculated based on “Vobj−Verr1−Verr2”, it is originally desired to obtain various errors (B) to (F). The value (A) can be calculated with high accuracy.

  Here, in the method described in claim 2, since it is necessary to acquire two of Vobj and Vcom every time the detection target cell changes, the number of switching operations of both switching means increases. For example, when there are 10 battery cells, switching 10 times for acquiring Vobj and switching 10 times for acquiring Vcom are required, so a total of 20 switching is required. Then, since it takes a long time to calculate the cell voltage Vcell for all the plurality of battery cells, the response delay of the cell voltage Vcell calculated value becomes large. Then, when the cell voltage changes transiently due to charge / discharge, the above-described control (protection control for the upper and lower limit voltages) such that all cells fall within the upper and lower limits of the usable voltage range can not be performed with high accuracy. There is a concern that the effect of suppressing the deterioration of the battery cell cannot be sufficiently obtained.

  In response to this concern, the method according to claim 3 can reduce the number of switching operations of both switching means for the following reason. That is, among the various errors (B) to (F) described above, the common-mode voltage error (B) changes according to the cell voltage of the battery cell located on the lower potential side than the detection target cell. The offset voltage error (C), the offset current error (D), and the bias current error (E) are inherent errors of the differential amplifier circuit itself. Even if selected, these errors (C) to (E) should have the same value. Further, since the reference voltage error (F) is an inherent error of the reference voltage application unit itself, the error (E) should be the same value regardless of which detection target cell is selected.

  Then, the cell voltage Vcell (1) is calculated using the battery cell located at the lowest potential among the plurality of battery cells as the detection target cell first, then the cell voltage Vcell (2) having the second lowest potential, and then the third. If the cell voltage Vcell (3) is calculated in turn, for example, the cell voltage Vcell (3) is included in Vcom (3) based on the cell voltages Vcell (1) and Vcell (2). The common-mode voltage error (B) can be grasped. Therefore, for Vcell (2) and later, the cell voltage Vcell can be calculated simply by obtaining Vobj of the detection target cell.

  As described above, according to the method of claim 3, if three battery cells Vobj, Vcom, and Vgnd are obtained by using the battery cell positioned at the lowest potential as the detection target cell first, Since the cell voltage Vcell can be calculated simply by acquiring Vobj, the number of switching operations of both switching means can be reduced. For example, when there are 10 battery cells, a total of 12 times of switching, that is, 10 times for acquiring Vobj and 2 times for acquiring Vcom and Vgnd are sufficient. Therefore, since the time required to calculate the cell voltage Vcell for all the plurality of battery cells can be shortened, the response delay of the cell voltage Vcell calculated value can be reduced, and the above-described protection control for the upper and lower limit voltages can be performed with high accuracy. become.

  According to a fourth aspect of the present invention, there is provided a cell voltage detecting device for detecting a potential difference between a positive electrode and a negative electrode for each of a plurality of battery cells connected in series as a cell voltage, and an analog corresponding to the potential difference between the positive electrode input terminal and the negative electrode input terminal. A differential amplifier circuit that outputs a signal, an AD converter circuit that converts an analog signal output from the differential amplifier circuit into a digital signal, and a location selected from the positive electrode, the negative electrode, and the ground of the plurality of battery cells A positive electrode switching means for switching a connection location so as to be connected to the positive electrode input terminal; and a negative electrode for switching a connection location so as to connect a location selected from the positive electrode, the negative electrode, and the ground of the plurality of battery cells to the negative electrode input terminal. And a switching means.

  Then, the positive electrode switching unit and the negative electrode switching unit are operated so that one of the positive electrode and the negative electrode of the battery cell to be detected is connected to the positive electrode input terminal and the other is connected to the negative electrode input terminal, A target potential difference output value acquisition means for acquiring the output of the AD converter circuit as a target potential difference output value, and a negative electrode of the battery cell to be detected are connected to the positive input terminal and the negative input terminal, respectively. The positive polarity switching means and the negative polarity switching means are operated, and the correction output value acquisition means for acquiring the output of the AD conversion circuit at that time as the correction output value, and each of the positive input terminal and the negative input terminal The positive electrode switching unit and the negative electrode switching unit are operated so as to connect the ground, and the output of the AD conversion circuit at that time is converted to the differential amplification circuit. A battery cell that is located on a lower potential side than the battery cell that is the detection target, and a value obtained by subtracting the inherent error from the correction output value. Based on a value obtained by subtracting the common-mode voltage error and the intrinsic error from the target potential difference output value, the detection target is obtained. Cell voltage calculation means for calculating a cell voltage of the battery cell.

  Here, as shown in FIG. 2, the output voltage Vout of the differential amplifier circuit includes at least various errors (B) to (E) described below in addition to the value (A) to be originally obtained. The present inventor obtained the following knowledge. That is, the common-mode voltage error (B) generated according to the common-mode voltage Vn, the offset voltage error (C) generated according to the offset voltage Vos, the offset current error (D) generated according to the offset current Ios, and the bias current Ibp The resulting bias current error (E). As shown in FIG. 3, the target potential difference output value Vobj includes all of the above (A) to (E), and the correction output value Vcom includes various errors (B) to (E). Everything is included.

  In view of this point, in the invention according to claim 4, since the cell voltage Vcell of the detection target cell is calculated based on “Vobj−Verr1−Verr2”, it is inherently obtained that various errors (B) to (E) are removed. The desired value (A) can be calculated with high accuracy.

  Moreover, according to the fourth aspect of the present invention, the number of switching operations of both switching means can be reduced for the following reason. That is, among the various errors (B) to (E) described above, the common-mode voltage error (B) changes according to the cell voltage of the battery cell located on the lower potential side than the detection target cell. The offset voltage error (C), the offset current error (D), and the bias current error (E) are inherent errors of the differential amplifier circuit itself. Even if selected, these errors (C) to (E) should have the same value.

  Then, the cell voltage Vcell (1) is calculated with the battery cell located at the lowest potential among the plurality of battery cells as the detection target cell first, then the cell voltage Vcell (2) at the lower potential, and then at the lower potential. If the cell voltage Vcell (3) is calculated sequentially, for example, when calculating the cell voltage Vcell (3), the common-mode voltage error included in Vcom (3) based on the cell voltages Vcell (1) and Vcell (2) (B) can be grasped. Therefore, for Vcell (2) and later, the cell voltage Vcell can be calculated simply by obtaining Vobj of the detection target cell.

  As described above, according to the fourth aspect of the present invention, if three battery cells Vobj, Vcom, and Vgnd are obtained by using the battery cell located at the lowest potential as the detection target cell first, Since the cell voltage Vcell can be calculated simply by acquiring Vobj, the number of switching operations of both switching means can be reduced. For example, when there are 10 battery cells, a total of 12 times of switching, that is, 10 times for acquiring Vobj and 2 times for acquiring Vcom and Vgnd are sufficient. Therefore, since the time required to calculate the cell voltage Vcell for all the plurality of battery cells can be shortened, the response delay of the cell voltage Vcell calculated value can be reduced, and the above-described protection control for the upper and lower limit voltages can be performed with high accuracy. become.

  According to a fifth aspect of the present invention, the target potential difference output value acquiring means connects the negative electrode of the battery cell to be detected to the positive input terminal and connects the positive electrode to the negative input terminal. And the negative electrode switching means is operated, and the output of the AD conversion circuit at that time is acquired as a target potential difference output value.

  According to this, the characteristic (see FIG. 6) showing the relationship between the input voltage to the AD converter circuit (output voltage Vout of the differential amplifier circuit) and the output voltage from the AD converter circuit is shown by a two-dot chain line in FIG. Inverted as shown in Therefore, if the output voltage Vout is raised by a reference voltage or the like as shown by the solid line in FIG. 6, the negative electrode of the detection target cell is connected to both front input terminals so as to obtain it as a correction output value. However, it can be avoided that the output voltage Vout of the differential amplifier circuit becomes a very small voltage. In addition, as shown by the solid line in FIG. 5, compared to the case of pulling up without being inverted, according to the present invention, which is pulled up after being inverted, the output when the negative electrode of the detection target cell is connected to both front input terminals Since the voltage Vout can be increased, sufficient AD conversion accuracy for the correction output value can be ensured even when the AD conversion target is an inexpensive AD conversion circuit limited to a positive voltage.

1 is a circuit diagram showing a cell voltage detection device and a battery device 10 according to a first embodiment of the present invention. The figure explaining the various errors contained in the output voltage Vout of an operational amplifier. The figure explaining the method of calculating cell voltage Vcell accurately in 1st Embodiment. 5 is a flowchart showing a procedure for calculating a cell voltage Vcell in the first embodiment. FIG. 3 is a characteristic diagram showing a relationship between an input voltage to the AD conversion circuit and an output voltage from the AD conversion circuit in the first embodiment. The characteristic view which shows the relationship between the input voltage to an AD converter circuit, and the output voltage from an AD converter circuit in 2nd Embodiment of this invention. 9 is a flowchart showing a procedure for calculating an in-phase voltage error Verr1 and an intrinsic error Verr2 in the third embodiment of the present invention. 9 is a flowchart showing a procedure for calculating a cell voltage Vcell in the third embodiment. The circuit diagram which shows the conventional cell voltage detection apparatus.

  Hereinafter, embodiments in which a cell voltage detection device according to the present invention is applied to an in-vehicle battery device will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are denoted by the same reference numerals in the drawings, and the description of the same reference numerals is used.

(First embodiment)
FIG. 1 is a circuit diagram showing a cell voltage detection device and a battery device 10 according to the first embodiment of the present invention. The battery device 10 is configured by connecting a plurality of battery cells 11 to 15 in series. Specific examples of the battery cells 11 to 15 include a storage battery (high performance storage battery) having a higher output and a higher energy density than a lead storage battery such as a lithium storage battery or a nickel storage battery, and a capacitor. Lithium storage batteries are employed for the battery cells 11 to 15 of the present embodiment.

  In particular, the deterioration of the lithium storage battery is significantly promoted when the amount of stored electricity exceeds the appropriate range due to overcharge, or when the amount of stored electricity decreases below the appropriate range due to overdischarge. Therefore, it is necessary to control the charge / discharge state (SOC proper control) so that the SOC (State of charge: the ratio of the actual charge amount to the charge amount at full charge) representing the charge state falls within an appropriate range. However, such SOC proper control is generally performed based on the SOC calculated based on the terminal voltage of the battery device 10 (that is, the total voltage of the battery cells 11 to 15). Therefore, when the variation in the storage amount of the plurality of battery cells 11 to 15 is large, it becomes difficult to control the SOC within an appropriate range for all of the individual battery cells 11 to 15, and the deterioration is promoted. .

  Therefore, in the present embodiment, control (uniformization control) is performed in which the individual cell voltages of the battery cells 11 to 15 are equalized by a homogenization circuit (not shown). And by detecting the individual cell voltages with high accuracy by the cell voltage detection device described below, the above homogenization control is performed with high accuracy, and the deterioration of the battery cells 11 to 15 is suppressed. Yes.

  The cell voltage detection device according to the present embodiment includes a positive electrode switching unit 20, a negative electrode switching unit 30, an operational amplifier 40 (differential amplifier circuit), resistors R1 to R4 connected to the operational amplifier 40, and a reference voltage circuit 50 described below. (Reference voltage applying means), an AD conversion circuit 60, a microcomputer (microcomputer 70), and the like.

  The positive electrode switching unit 20 includes a plurality of switches 21 to 27 controlled by the microcomputer 70, and an operational amplifier 40 selects a location selected from the positive electrode, the negative electrode, and the ground of the plurality of battery cells 11 to 15. Are switched to be connected to the positive input terminal 41.

  The negative electrode switching means 30 includes a plurality of switches 31 to 37 controlled by the microcomputer 70, and an operational amplifier 40 selects a location selected from the positive and negative electrodes and the ground of the plurality of battery cells 11 to 15. To be connected to the negative input terminal 42.

  The operational amplifier 40 is an IC chip that constitutes a differential amplifier circuit. The operational amplifier 40 amplifies the potential difference signal input to both the input terminals 41 and 42 with a gain corresponding to the resistors R1 to R4 functioning as negative feedback resistors, and outputs the amplified signal. To do.

  The reference voltage circuit 50 applies a reference voltage Vref, which is a known voltage, to the positive input terminal 41 via the resistor R4. As a result, the output voltage Vout of the operational amplifier 40 is raised to the plus side by an amount corresponding to the reference voltage Vref.

  The AD conversion circuit 60 converts the output voltage Vout (analog signal) output from the operational amplifier 40 into a digital signal. However, the AD conversion circuit 60 according to the present embodiment cannot perform AD conversion when the input analog signal is a negative voltage (that is, an inexpensive AD conversion target limited to a positive voltage). Stuff). For example, in the example shown in FIG. 5, the range of the input voltage to the AD conversion circuit 60 capable of AD conversion is 0 to 5 V, and a digital signal of 0 to 4 V corresponding to this input voltage range of 0 to 5 V is output.

  The microcomputer 70 calculates the cell voltage Vcell of each of the battery cells 11 to 15 based on various output values (a target potential difference output value Vobj and a correction output value Vcom described in detail later) output from the AD conversion circuit 60.

  Next, a method for accurately calculating the cell voltage Vcell by the microcomputer 70 will be described with reference to FIGS. 2 and 3A and 3B.

  As shown in FIG. 2B, the output voltage Vout of the operational amplifier 40 includes at least various errors (B) to (F) described below in addition to the value (A) that is originally desired.

  First, the common-mode voltage error (B) will be described. For example, when the fifth battery cell 15 is a detection target cell, the output voltage Vout when the positive electrode V5 and the negative electrode V4 of the fifth battery cell 15 are connected to the input terminals 41 and 42 is the first to fourth battery cells. The error (common-mode voltage error) generated according to the total cell voltage (common-mode voltage Vn) is included.

  Next, the offset voltage error (C) will be described. In the case of an ideal operational amplifier, if the same voltage is applied to both input terminals 41 and 42, the output voltage Vout should be zero. However, in practice, the output voltage Vout does not become zero but an offset voltage is generated. In other words, it can be said that the voltage indicated by the symbol Vos in the figure is constantly applied. An error (offset voltage error) according to the offset voltage Vos is included in the output voltage Vout.

  Next, the offset current error (D) and the bias current error (E) will be described. As indicated by the alternate long and short dash line in FIG. 2A, even if a voltage is applied to the input terminal of an ideal operational amplifier, no current flows. However, in reality, current flows as indicated by the symbols Ibp and Ibm in the figure. This current is called a bias current, and an error (offset current error) corresponding to the difference Ios between the bias currents Ibp and Ibm and an error (bias current error) corresponding to the bias current Ibp are included in the output voltage Vout.

  Further, since the machine voltage variation occurs in the reference voltage circuit 50, the output voltage Vout includes an error (reference voltage error) corresponding to the variation of the actual value with respect to the design value of the reference voltage Vref. Incidentally, if the resistors R1 to R4 are ideal resistors, the common-mode voltage error (B) and the offset current error (D) should be zero in calculation, but the actual resistors R1 to R4 have a difference in machine differences. Therefore, the common-mode voltage error (B) and the offset current error (D) are generated.

  FIGS. 3A and 3B show calculation examples of the cell voltage Vcell when the fifth cell 15 is set as a detection target cell by the method of the present embodiment, and the AD conversion shown in FIG. The measured value Vcom of the circuit 60 is a measured value when the switching means 20 and 30 are operated so that the negative electrode V4 of the fifth cell is connected to the input terminals 41 and 42. Specifically, it is a measured value when the switch 26 and the switch 36 are turned on and all other switches are turned off. Therefore, the measured value Vcom at this time does not include the cell voltage Vcell corresponding to the originally desired value (A), but includes only the error Verr corresponding to the various errors (B) to (F) described above. Will be.

  Further, the measured value Vobj of the AD conversion circuit 60 shown in FIG. 3B operates the positive electrode switching means 20 so that the positive electrode V5 of the fifth cell is connected to the positive electrode input terminal 41, and the negative input terminal 42 It is a measured value when the negative electrode switching means 30 is operated so that the negative electrode V4 of the fifth cell is connected. Specifically, it is a measured value when the switch 27 and the switch 36 are turned on and all other switches are turned off. Therefore, the measured value Vobj at this time includes both the cell voltage Vcell corresponding to the value (A) originally desired and the error Verr corresponding to various errors (B) to (F).

  Therefore, the value obtained by subtracting Vcom from Vobj represents the cell voltage Vcell with the error Verr removed. Therefore, when the measurement value Vobj of the AD conversion circuit 60 obtained when the positive electrode and the negative electrode of the detection target cell are input to the operational amplifier 40 is acquired, and the negative electrode of the detection target cell is input to both the input terminals 41 and 42. If the measurement value Vcom of the obtained AD conversion circuit 60 is acquired, the microcomputer 70 can calculate the cell voltage Vcell of the detection target cell by calculating “Vcell = Vobj−Vcom”.

  FIG. 4 is a flowchart showing a processing procedure of the calculation by the microcomputer 70, and the processing is repeatedly executed at a predetermined cycle (for example, a calculation cycle of the microcomputer 70).

  First, in step S10 shown in FIG. 4, the operation of both switching means 20, 30 is controlled so that the input to both input terminals 41, 42 becomes the negative electrode of the detection target cell. In the subsequent step S11 (correction output value acquisition means), the measurement value Vcom output from the AD conversion circuit 60 is acquired. In the subsequent step S12, the measurement value Vcom acquired in step S11 is set as the error Verr.

  In the subsequent step S13, the operation of both switching means 20 and 30 is controlled so that the input to the positive electrode input terminal 41 is the positive electrode of the detection target cell and the input to the negative electrode input terminal 42 is the negative electrode of the detection target cell. In the subsequent step S14 (target potential difference output value acquisition means), the measurement value Vobj output from the AD conversion circuit 60 is acquired. In the subsequent step S15, a value obtained by subtracting the error Verr set in step S12 from the measured value Vobj obtained in step S14 is calculated as the cell voltage Vcell of the detection target cell.

  And if calculation of cell voltage Vcell of a detection object cell is completed by the above-mentioned processing S10-S15, the above-mentioned processing S10-S15 will be carried out similarly, changing a detection object cell to other cells. And the process of S10-S15 is repeatedly performed with a predetermined period about each of the some battery cells 11-15.

  FIG. 5 is a characteristic diagram showing the relationship between the input voltage to the AD conversion circuit 60 (the output voltage Vout of the operational amplifier 40) and the output voltage (measured value) from the AD conversion circuit 60. According to the present embodiment, since the reference voltage circuit 50 is provided, the output voltage Vout of the operational amplifier 40 is raised to the plus side by an amount corresponding to the reference voltage Vref. That is, the characteristic indicated by the one-dot chain line in FIG. 5 is raised to the characteristic indicated by the solid line.

  Therefore, it can be avoided that the output voltage Vout when switching is performed as in step S10 is a minute voltage close to zero. Therefore, it can suppress that the AD conversion precision of the measured value Vcom acquired by step S11 falls. In addition, the output voltage Vout is not raised by adjusting the resistors R1 to R4, but the output voltage Vout is raised by the reference voltage circuit 50, so that the offset current error included in the measured value Vobj obtained in step S14 increases. Can be avoided.

  As described above, according to the present embodiment, the measurement value Vcom with high AD conversion accuracy can be acquired without increasing the offset current error included in the measurement value Vobj, so that the cell voltage calculation accuracy can be improved.

(Second Embodiment)
In the first embodiment, in step S13 of FIG. 4, control is performed so that the input to the positive electrode input terminal 41 is the positive electrode of the detection target cell and the input to the negative electrode input terminal 42 is the negative electrode of the detection target cell. In contrast, in the present embodiment, the positive electrode and the negative electrode are inverted so that the input to the positive electrode input terminal 41 is the negative electrode of the detection target cell and the input to the negative electrode input terminal 42 is the positive electrode of the detection target cell.

  Therefore, the characteristic indicated by the one-dot chain line in FIG. 6 is reversed as indicated by the two-dot chain line. Then, when the reference voltage circuit 50 is pulled up to the plus side, the characteristic shown by the solid line in FIG. 6 is obtained.

  As described above, according to the present embodiment, the characteristics indicating the relationship between the input voltage to the AD conversion circuit 60 (the output voltage Vout of the operational amplifier 40) and the output voltage (measured value) from the AD conversion circuit 60 are shown in FIG. It can be in the form shown by the solid line. Therefore, the value of the reference voltage Vref can be set larger than in the case where the inversion is not performed as in the first embodiment. Therefore, since the output voltage Vout at the time of switching as in step S10 can be set to a larger value, the AD conversion accuracy of the measurement value Vcom acquired in step S11 can be improved.

  In addition, the output voltage Vout is not raised by adjusting the resistors R1 to R4, but the output voltage Vout is raised by the reference voltage circuit 50, so that the offset current error included in the measured value Vobj obtained in step S14 increases. Can be avoided.

  As described above, according to the present embodiment, it is possible to further promote the acquisition of the measurement value Vcom having a high AD conversion accuracy without increasing the offset current error included in the measurement value Vobj. It can be further improved.

(Third embodiment)
FIGS. 3C, 3D and 3E show calculation examples of the cell voltage Vcell when the fifth cell 15 is set as a detection target cell by the method of the present embodiment, and are shown in FIG. The measured value Vcom of the AD conversion circuit 60 is a measured value when the switching means 20 and 30 are operated so that the negative electrode V4 of the fifth cell is connected to both the input terminals 41 and 42, as shown in FIG. ). However, the error corresponding to the common-mode voltage error is represented by the symbol Verr1, and the other errors are represented by the symbol Verr2.

  Also, the measured value Vgnd of the AD conversion circuit 60 shown in FIG. 3D is a measured value when both the switching means 20 and 30 are operated so that the ground is connected to both the input terminals 41 and 42. Specifically, it is a measured value when the switch 21 and the switch 31 are turned on and all other switches are turned off. Therefore, the measured value Vgnd at this time does not include the cell voltage Vcell and the common-mode voltage error Verr1 corresponding to the value (A) to be originally obtained, and corresponds to various other errors (C) to (F). Only error Verr2 is included.

  Further, the measured value Vobj of the AD conversion circuit 60 shown in FIG. 3 (e) operates the positive electrode switching means 20 so that the positive electrode V5 of the fifth cell is connected to the positive electrode input terminal 41, and the negative input terminal 42 The measured value when the negative electrode switching means 30 is operated so that the negative electrode V4 of the fifth cell is connected, and is the same as FIG. 3B.

  Therefore, the measured value Vobj of the AD conversion circuit 60 obtained when the positive electrode and the negative electrode of the detection target cell are input to the operational amplifier 40, and the measured value Vgnd of the AD conversion circuit 60 obtained when the ground is input to the operational amplifier 40. (= Verr2) and the measured value Vcom of the AD conversion circuit 60 obtained when the negative electrode of the detection target cell is input to both input terminals 41 and 42, the microcomputer 70 obtains “Verr1 = Vcom−Verr2”. The common-mode voltage error Verr1 can be calculated. The cell voltage Vcell of the detection target cell can be calculated by calculating “Vcell = Vobj−Verr1-Verr2”.

  Here, among the various errors (B) to (F) described above, the common-mode voltage error (B) changes according to the cell voltage of the battery cell located on the lower potential side than the detection target cell. On the other hand, since the offset voltage error (C), the offset current error (D), and the bias current error (E) are inherent errors of the operational amplifier 40 itself, any one of the plurality of battery cells 11 to 15 is detected. These errors (C) to (E) should be the same value. Further, since the reference voltage error (F) is an inherent error of the reference voltage circuit 50 itself, the error (E) should be the same value regardless of which detection target cell is selected.

  Then, the cell voltage Vcell (1) is calculated with the battery cell 11 positioned at the lowest potential among the plurality of battery cells 11 to 15 as the detection target cell first, and then the cell voltage Vcell (2) having the second lowest potential. Then, if the cell voltage Vcell (3) of the third low potential is sequentially calculated, for example, the cell voltage Vcell (3) is calculated based on the cell voltages Vcell (1) and Vcell (2). The common-mode voltage error (B) included in 3) can be grasped. Therefore, for Vcell (2) and later, the cell voltage Vcell can be calculated simply by obtaining Vobj of the detection target cell.

  As described above, if three battery cells Vobj, Vcom, and Vgnd are first acquired as the detection target cell with the battery cell 11 positioned at the lowest potential, the cell voltage Vcell can be obtained only by acquiring Vobj for the subsequent detection target cells. Therefore, the number of switching operations of both switching means 20 and 30 can be reduced.

  FIG. 7 is a flowchart showing the calculation processing procedure of “Verr1 = Vcom−Verr2” by the microcomputer 70, and this process is repeatedly executed at a predetermined cycle (for example, the calculation cycle of the microcomputer 70).

  First, in step S20 shown in FIG. 7, the operation of both switching means 20, 30 is controlled so that the input to both input terminals 41, 42 becomes the negative electrode of the detection target cell. In the subsequent step S21 (common-mode voltage error acquisition means (correction output value acquisition means)), the measurement value Vcom output from the AD conversion circuit 60 is acquired.

  In subsequent step S22, the operation of both switching means 20, 30 is controlled so that the input to both input terminals 41, 42 becomes ground. In the subsequent step S23 (inherent error acquisition means (correction output value acquisition means)), the measurement value Vgnd output from the AD conversion circuit 60 is acquired. In the subsequent step S24, the measurement value Vcom acquired in step S11 is set as the error Verr2.

  In the subsequent step S25, a value obtained by subtracting the error Verr2 set in step S24 from the measured value Vcom acquired in step S21 is calculated as the common-mode voltage error Verr1. More specifically, the value of the gain G3 with respect to the common-mode voltage Vn of the term indicated by Verr1 in FIG. Thus, the inherent error Verr2 and the common-mode voltage error Verr1 can be acquired.

  FIG. 8 is a flowchart showing a calculation processing procedure of “Vcell = Vobj−Verr1−Verr2” by the microcomputer 70, and this processing is repeatedly executed at a predetermined cycle (for example, a calculation cycle of the microcomputer 70).

  First, in steps S13 and S14 in FIG. 8, processing similar to that in FIG. 4 is performed to obtain a measured value Vobj. In the subsequent step S15a, the value obtained by subtracting the common-mode voltage error Verr1 and the intrinsic error Verr2 produced in the process of FIG. 7 from the measured value Vobj obtained in step S14 is used as the cell voltage Vcell of the detection target cell. calculate.

  And if calculation of cell voltage Vcell of a detection object cell is completed by the above-mentioned processing S13-S15a, the above-mentioned processing S13-S15a will be carried out similarly, changing a detection object cell to other cells. However, the process of FIG.7 and FIG.8 is implemented by making the 1st battery cell 11 located in the lowest electric potential among several battery cells 11-15 first as a detection object cell. Then, after the calculation of the cell voltage Vcell (1) of the first battery cell 11 is completed, the next detection target cell is set to the second battery cell 12 having the second lowest potential, and the second battery cell 12 is set to the second battery cell 12. On the other hand, the process of FIG. 8 is performed. At this time, the process of FIG. 7 is not performed, and the common-mode voltage error Verr1 used in step S15a of FIG. 8 is calculated as follows.

  That is, since the cell voltage Vcell (1) acquired in step S15a of FIG. 8 executed with the first battery cell 11 as the detection cell substantially corresponds to the common-mode voltage V0 when the second battery cell 11 is used as the detection cell. The value obtained by multiplying the gain G3 acquired in step S21 of FIG. 7 executed by using the first battery cell 11 as the detection cell by the cell voltage Vcell (1) may be used as the common-mode voltage error Verr1 in step S15a. .

  Then, after the calculation of the cell voltage Vcell (2) of the second battery cell 12 is completed, the next detection target cell is set to the third battery cell 13 having the third lowest potential, and the process of FIG. 8 is performed. To do. Then, the fourth battery cell 14 and the fifth battery cell 15 are sequentially set as detection target cells, and the respective cell voltages Vcell (1) to Vcell (5) are calculated by the processing of FIG.

  As described above, the present embodiment also exhibits the same effects as those of the first embodiment. Further, as described above, since the number of switching operations of both switching means 20 and 30 can be reduced, the following effects are also exhibited.

  That is, since the number of switching operations can be reduced, the time required to calculate the cell voltages Vcell (1) to Vcell (5) for all the plurality of battery cells 11 to 15 can be shortened. The above-described protection control for the upper and lower limit voltages can be performed with high accuracy.

  Further, although a little power is consumed when detecting the cell voltage, according to the present embodiment, the number of switching operations can be reduced. Therefore, when detecting the cell voltage for all of the plurality of battery cells 11 to 15, the detection is performed. The required power consumption can be reduced.

(Other embodiments)
The present invention is not limited to the description of the above embodiment, and may be modified as follows. Moreover, you may make it combine the characteristic structure of each embodiment arbitrarily, respectively.

  -In the said embodiment, although the battery cells 11-15 lithium storage battery is employ | adopted, you may make this invention apply to a nickel storage battery, a lead storage battery, a capacitor, etc.

  In the case of the first embodiment, the switches 21 and 31 for connecting to the ground may be eliminated.

  In the case of the third embodiment, the reference voltage circuit 50 may be eliminated.

  DESCRIPTION OF SYMBOLS 20 ... Positive electrode switching means, 30 ... Negative electrode switching means, 40 ... Operational amplifier (differential amplifier circuit), 60 ... AD converter circuit, 50 ... Reference voltage circuit (reference voltage application means), S11 ... Output value acquisition means for correction, S14 ... target potential difference output value acquisition means, S15, S15a ... cell voltage calculation means, S21 ... common-mode voltage error acquisition means (correction output value acquisition means), S23 ... inherent error acquisition means (correction output value acquisition means).

Claims (5)

In the cell voltage detection device that detects the potential difference between the positive electrode and the negative electrode for each of a plurality of battery cells connected in series as a cell voltage,
A differential amplifier circuit that outputs an analog signal corresponding to a potential difference applied to its own positive input terminal and negative input terminal;
An AD conversion circuit that converts a positive signal among the analog signals output from the differential amplifier circuit into a digital signal;
A positive electrode switching means for switching a location selected from the positive electrode and the negative electrode of the plurality of battery cells to be connected to the positive electrode input terminal;
A negative electrode switching means for switching a location selected from the positive electrode and the negative electrode of the plurality of battery cells to connect to the negative electrode input terminal;
A reference voltage applying means for applying a reference voltage so that the output value of the differential amplifier circuit is pulled up to the plus side;
The positive electrode switching means and the negative electrode switching means are operated so that one of the positive electrode and the negative electrode of the battery cell to be detected is connected to the positive electrode input terminal and the other is connected to the negative electrode input terminal. Target potential difference output value acquisition means for acquiring an output of the AD conversion circuit as a target potential difference output value;
The positive electrode switching means and the negative electrode switching means are operated so as to connect the negative electrode of the battery cell to be detected to the positive electrode input terminal and the negative electrode input terminal, respectively, and the output of the AD converter circuit at that time is A correction output value acquisition means for acquiring a correction output value;
Cell voltage calculation means for calculating a cell voltage that is a potential difference between the battery cells to be detected based on the target potential difference output value and the correction output value;
A cell voltage detection device comprising:   The cell voltage calculation means calculates a cell voltage of the battery cell to be detected based on a value obtained by subtracting the correction output value from the target potential difference output value. 2. The cell voltage detection device according to 1. The positive electrode switching means is configured to be switchable so as to connect the positive electrode input terminal to the ground,
The negative electrode switching means is configured to be switchable so as to connect the negative electrode input terminal to the ground,
The positive electrode switching unit and the negative electrode switching unit are operated so as to connect a ground to each of the positive electrode input terminal and the negative electrode input terminal, and the output of the AD conversion circuit at that time is applied to the differential amplifier circuit and the reference voltage application Inherent error acquisition means for acquiring as an inherent error of the means;
A value obtained by subtracting the inherent error from the correction output value is acquired as a common-mode voltage error generated according to the cell voltage of the battery cell located on the lower potential side than the battery cell to be detected. Common-mode voltage error acquisition means;
With
The cell voltage calculation means calculates a cell voltage of the battery cell to be detected based on a value obtained by subtracting the common-mode voltage error and the intrinsic error from the target potential difference output value. The cell voltage detection device according to claim 1. In the cell voltage detection device that detects the potential difference between the positive electrode and the negative electrode for each of a plurality of battery cells connected in series as a cell voltage,
A differential amplifier circuit that outputs an analog signal corresponding to the potential difference between the positive input terminal and the negative input terminal;
An AD conversion circuit that converts an analog signal output from the differential amplifier circuit into a digital signal;
Positive electrode switching means for switching a connection location so as to connect a location selected from the positive electrode, the negative electrode, and the ground of the plurality of battery cells to the positive electrode input terminal,
Negative electrode switching means for switching a connection location so as to connect a location selected from the positive electrode, the negative electrode, and the ground of the plurality of battery cells to the negative electrode input terminal,
The positive electrode switching means and the negative electrode switching means are operated so that one of the positive electrode and the negative electrode of the battery cell to be detected is connected to the positive electrode input terminal and the other is connected to the negative electrode input terminal. Target potential difference output value acquisition means for acquiring an output of the AD conversion circuit as a target potential difference output value;
The positive electrode switching means and the negative electrode switching means are operated so as to connect the negative electrode of the battery cell to be detected to the positive electrode input terminal and the negative electrode input terminal, respectively, and the output of the AD converter circuit at that time is A correction output value acquisition means for acquiring a correction output value;
The positive switching means and the negative switching means are operated so as to connect a ground to each of the positive input terminal and the negative input terminal, and the output of the AD conversion circuit at that time is an inherent error of the differential amplifier circuit. Inherent error acquisition means for acquiring;
A value obtained by subtracting the inherent error from the correction output value is acquired as a common-mode voltage error generated according to the cell voltage of the battery cell located on the lower potential side than the battery cell to be detected. Common-mode voltage error acquisition means;
Cell voltage calculation means for calculating a cell voltage of the battery cell to be detected based on a value obtained by subtracting the common-mode voltage error and the intrinsic error from the target potential difference output value;
A cell voltage detection device comprising:   The target potential difference output value acquisition unit operates the positive electrode switching unit and the negative electrode switching unit to connect the negative electrode of the battery cell to be detected to the positive electrode input terminal and connect the positive electrode to the negative electrode input terminal. The cell voltage detection device according to claim 1, wherein the output of the AD conversion circuit at that time is acquired as a target potential difference output value.

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