JP2011171404A - Tab tape for semiconductor device, and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a TAB tape for a semiconductor device, along with its manufacturing method, which reduces conduction failure by providing a larger junction area of a via bottom surface regardless of diameter of a via hole. <P>SOLUTION: An adhesive material in a via hole is so melted as to be larger than the opening diameter (to the outside beyond the opening diameter when viewed in cross section) formed on an insulating substrate. In other words, a via bottom surface, or a plating formation surface of a first conductor pattern in a via hole can be wider for larger junction area, resulting in reduced conduction failure of a via. Thus, a TAB tape for a semiconductor device of high reliability is provided. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a TAB (Tape Automated Bonding) tape for a semiconductor device and a method for manufacturing a TAB tape.

  In recent years, along with the reduction in size and weight of electronic devices, the functions and density of the components have been further increased. In recent years, mounting parts of semiconductor elements such as LSIs have been increased in number with increasing integration, and in order to cope with this, the pin pitch is reduced as in BGA (Ball Grid Array) / CSP (Chip Size Package or Chip Scale Package). Development of package mounting technology that can be widely adopted and that can adopt a bare chip is underway. In promoting high-density mounting, fine patterning of TAB tapes and printed wiring boards is being promoted, and in printed wiring boards, multilayering of boards is being promoted like build-up multilayer wiring boards. Yes.

  For example, a two-layer wiring TAB tape has been put into practical use as a fine pitch TAB tape corresponding to these packages.

  As a conventional technique for manufacturing this two-layer wiring TAB tape, Patent Document 1 discloses a step of preparing an insulating resin base material made of polyimide or aramid, and a first adhesive is applied to one surface of the insulating resin base material. A step of laminating a conductor layer as a first conductor layer on the first adhesive, and curing the first adhesive to bond the first conductor layer to one surface of the substrate. A step of forming a first conductor layer, a step of applying a second adhesive to the other surface of the substrate, a step of coating a protective film on the free surface of the conductor layer, the second adhesive, the substrate and the above A step of forming a via hole penetrating the first adhesive and having a bottom defined by the conductor layer, a step of cleaning (desmearing) the inside of the via hole, and feeding the conductor layer exposed at the bottom of the via hole By electroplating to make a layer After the surface is roughened on the surface of the second adhesive and the exposed surface of the via, the conductor is filled in the entire hole to form a via whose bottom surface is defined by the conductor layer. Forming a thin conductor layer by electroplating, forming a second conductor layer on the thin conductor layer by electroplating using the thin conductor layer as a power feeding layer, and curing the second adhesive to A method of manufacturing a two-layer wiring TAB tape is described in which the step of bonding the second conductor layer to the other surface of the substrate is sequentially performed.

JP 2004-103798 A

  As in the above prior art, the conduction between the first conductor layer and the second conductor layer is achieved at the bottom of the via, but the via hole is formed with a laser having a small diameter of 100 μm or less (20-30 μm in Patent Document 1). In such a case, since the area of the bottom surface of the via hole becomes small, there is a problem that the bonding area between the bottom surface of the via hole and the plating surface becomes small and a conduction failure tends to occur. Thus, in laser processing, it is possible to form a small-diameter via, and this problem becomes more prominent as the area of the via bottom becomes smaller.

  SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a TAB tape for a semiconductor device and a method for manufacturing the same that reduce the conduction failure by solving the above-described problems and increasing the bonding area of the bottom surface of the via regardless of the diameter of the via hole. To do.

  In order to achieve the above object, the present invention is configured as follows.

  The present invention provides an insulating substrate, a first conductor pattern provided on one surface of the insulating substrate via an adhesive, and a first conductor pattern provided on the surface of the insulating substrate opposite to the first conductor pattern. A two-conductor pattern, a via hole penetrating the insulating substrate and the adhesive, and a plating layer formed in the via hole so as to conduct the first conductor pattern and the second conductor pattern. The TAB tape for semiconductor devices is characterized in that the adhesive is larger than the opening diameter provided in the insulating substrate.

  The present invention is also a laminated board in which a first conductor layer is formed on one side of an insulating substrate and a second conductor layer is provided on the other side, and at least the first conductor layer is interposed via an adhesive. A step of preparing a laminated board bonded to an insulating substrate; a step of forming a via hole penetrating the second conductor layer, the insulating substrate, and the adhesive; and the adhesive exposed in the via hole. An adhesive dissolving step for dissolving the first conductive layer, a plating step for forming a plating layer electrically connected to the first conductor layer and the second conductor layer exposed in the via hole, and a photo process for the first conductor layer and the second conductor layer. The manufacturing method of the TAB tape for semiconductor devices which has an etching process and has the patterning process which forms a 1st conductor pattern and a 2nd conductor pattern, respectively is provided.

  According to the present invention, the adhesive material in the via hole is melted so as to be wider than the opening diameter formed in the insulating substrate (outside the opening diameter when viewed in cross section). Since the plating formation surface of the first conductor pattern in the via hole can be widened and the bonding area can be increased, the continuity failure of the via can be reduced and the TAB tape for a semiconductor device with high reliability can be obtained. Can be provided.

  In addition, since the via can be formed with a small diameter, the package can be reduced in size.

(A) is a schematic sectional drawing which shows the TAB tape for semiconductor devices which concerns on embodiment of this invention. (B) is an enlarged view of the via portion of (a). (C) is a schematic diagram when the via part of (a) is seen from the upper surface. It is sectional drawing which shows the manufacturing process of the TAB tape for semiconductor devices which concerns on embodiment of this invention.

  Hereinafter, a TAB tape 1 for a semiconductor device and a method for manufacturing the same according to the present embodiment will be described with reference to the drawings.

  As shown in FIG. 1A, the TAB tape 1 for a semiconductor device includes an insulating substrate 2, a first conductor pattern 4a provided on one side with an adhesive 3 interposed therebetween, and a first conductor pattern 4a. The via hole 6 is electrically connected by the plating layer 7 connecting the first conductor pattern 4a and the second conductor pattern 5a.

  The insulating substrate 2 is a film substrate made of an insulating material having a predetermined mechanical strength such as a polyimide resin film, for example, and is provided with a via hole 6 by laser processing.

  The first conductor pattern 4a is formed by patterning the first conductor layer 4b bonded to one surface of the insulating substrate 2 with the adhesive 3 interposed therebetween. As the first conductor layer 4b, for example, a conductor layer made of copper is used, but this is not restrictive.

  The adhesive 3 to which the first conductor pattern 4a is attached is removed in a size substantially equal to the opening diameter drilled in the insulating substrate 2 in the drilling process such as laser processing when forming the via hole 6. By the subsequent adhesive material melting treatment, a melted portion A that retreats outward in the cross-sectional view of the via hole 6 is formed so as to be larger than the diameter of the opening W provided in the insulating substrate 2 (FIG. 1 ( b), (c)). Here, as the material of the adhesive 3, a material different from the material used for the insulating substrate 2 may be used. For example, when the insulating substrate 2 is polyimide, an epoxy adhesive 3 can be used. By doing so, not only can the treatment liquid for dissolving the adhesive 3 be easily selected, but also the adhesive 3 can be reliably dissolved.

  The second conductor pattern 5a is formed by patterning the second conductor layer 5b bonded to the surface opposite to the surface on which the first conductor pattern 4a of the insulating substrate 2 is formed. The second conductor layer 5b may be provided via an adhesive, or may be provided without an adhesive. Moreover, although the conductor layer which consists of copper, for example is used as the 2nd conductor layer 5b, it is not this limitation.

  The via hole 6 penetrates the insulating substrate 2 and the second conductor layer 5b, and is formed by laser processing particularly when a small diameter via is formed. As described above, the adhesive 3 is also removed by laser processing. The laser used is preferably a UV laser with good processability, but other lasers may be used, or a laser may be used in combination with etching.

  FIG. 2 shows an example of a method for manufacturing the TAB tape 1 for semiconductor devices.

  This TAB tape 1 for semiconductor devices is manufactured by the following manufacturing method.

  First, as shown in FIG. 2A, first, the adhesive 3 is provided on at least one surface of the insulating substrate 2, and the conductor layers made of, for example, copper (first conductor layer 4b, second conductor layer 5b) on both surfaces. A laminated board provided with is prepared.

  Then, as shown in FIG. 2B, a via hole 6 penetrating the second conductor layer 5b, the insulating substrate 2, and the adhesive 3 is formed in a desired region. For the formation of the via hole 6, it is possible to form the via hole 6 having a small diameter of 30 μm or less by using laser processing such as UV laser. At that time, the via holes 6 may be formed collectively with the same laser, or laser and etching may be used in combination.

  Further, as shown in FIG. 2C, an adhesive dissolving process for dissolving the adhesive 3 exposed in the formed via hole 6 is performed. In this adhesive dissolving treatment, the adhesive 3 exposed in the via hole 6 is eroded by the treatment liquid. Therefore, as seen in the cross-sectional view, it is formed in a shape that retreats outward by the amount of the dissolved portion A so as to be larger than the diameter of the opening W provided in the insulating substrate 2. For the adhesive dissolution treatment, it is preferable to use a treatment liquid that has a higher reaction with the adhesive 3 than the insulating base and acts to promote the dissolution of the adhesive 3. The step of the adhesive dissolving treatment can be performed simultaneously by the desmear treatment after the laser processing. In this case, a treatment liquid capable of removing the residue in the via hole 6 and dissolving the adhesive 3 may be selected. Thus, it is more desirable to carry out simultaneously with the desmear process because there is no need to increase the number of extra steps.

  Then, as shown in FIG. 2D, a plating layer 7 is formed in order to establish conduction between the first conductor layer 4b exposed in the via hole 6 and the second conductor.

  Finally, as shown in FIG. 2E, the first conductor layer 4b and the second conductor layer 5b are etched by a photo process to form a first conductor pattern 4a and a second conductor pattern 5a, respectively.

  Thereafter, functional plating is performed as necessary, and a protective film such as a solder resist is provided to complete the TAB for a semiconductor device.

  Next, the present invention will be specifically described with reference to examples.

  First, a first conductor layer 4b made of copper having a thickness of 18 μm is provided on one surface of polyimide having a thickness of 50 μm via an epoxy adhesive 3 having a thickness of 15 μm, and the other surface is made of copper having a thickness of 18 μm. A laminated board provided with the second conductor layer 5b is prepared.

  The laminated plate is irradiated with UV laser from the second conductor layer 5 b side to form a via hole 6 having a diameter of 80 μm that penetrates the second conductor layer 5 b, the insulating substrate 2, and the adhesive 3.

  Next, desmear treatment is performed in the formed via hole 6 with a treatment liquid made of permanganate. Residue in the via hole 6 is removed by this desmear process, and the adhesive 3 exposed in the via hole 6 is eroded by about 5 μm by the processing liquid, and the first conductor layer 4 b is exposed to a diameter of 90 μm.

  Then, a copper plating layer 7 is formed so as to connect the first conductor layer 4b and the second conductor layer 5b exposed in the via hole 6, and the first conductor layer 4b and the second conductor layer 5b are etched by a photo process. Then, the first conductor pattern 4a and the second conductor pattern 5a are formed.

  Finally, functional plating such as gold was performed on the first conductor pattern 4a and the second conductor pattern 5a, and then a protective film such as a solder resist was provided to manufacture the TAB tape 1 for a semiconductor device.

  As described above, according to the TAB tape for a semiconductor device and the manufacturing method thereof according to the embodiment of the present invention, the exposed surface of the first conductor layer in the via hole becomes large, and the bonding area with the plating layer becomes large. In addition, it is possible to provide a highly reliable TAB tape with excellent bonding stability in the via hole.

  In particular, it is effective in a via hole having a diameter of 20 μm to 100 μm, for example, of 100 μm or less provided by laser processing. In addition, it is preferable because residue removal in the via hole and dissolution of the adhesive can be performed simultaneously by a desmear process after laser processing.

  However, the formation of the via hole is not limited to laser processing, and a drilling method may be set according to a desired diameter. For example, it is possible to perform an adhesive melting step after forming a via hole by etching, and after forming a second conductor layer, an insulating substrate, and an adhesive by punching, the first conductor layer is bonded to form a via hole. It is also possible to perform the adhesive dissolving step on the formed substrate, and even in such a case, the exposed surface of the first conductor layer in the via hole becomes large, so that the effect of the present invention can be obtained. Of course.

  In the embodiment of the present invention, no particular mention is made of bonding to a semiconductor device, particularly a semiconductor chip (not shown), but the semiconductor chip and the semiconductor device TAB tape are formed on the semiconductor device TAB tape. A device hole for joining the pattern may be provided. That is, it goes without saying that it can be appropriately changed according to the desired package mode.

DESCRIPTION OF SYMBOLS 1 TAB tape for semiconductor devices 2 Insulating substrate 3 Adhesive material 4a 1st conductor pattern 4b 1st conductor layer 5a 2nd conductor pattern 5b 2nd conductor layer 6 Via hole 7 Plating layer A Melting | dissolving part W The opening provided in the insulating substrate

Claims (7)

An insulating substrate;
A first conductor pattern provided on one side of the insulating substrate via an adhesive;
A second conductor pattern provided on a surface of the insulating substrate opposite to the first conductor pattern;
A via hole penetrating the insulating substrate and the adhesive;
A plating layer formed to conduct the first conductor pattern and the second conductor pattern in the via hole;
A TAB tape for a semiconductor device, wherein the adhesive is larger than an opening diameter provided in an insulating substrate.   The TAB tape for a semiconductor device according to claim 1, wherein the insulating substrate and the adhesive are made of different materials.   The TAB tape for a semiconductor device according to claim 1, wherein the insulating substrate is made of polyimide, and the adhesive is made of an epoxy-based adhesive. A laminated board in which a first conductor layer is formed on one side of an insulating substrate and a second conductor layer is provided on the other side, and at least the first conductor layer is bonded to the insulating substrate via an adhesive. A step of preparing the laminated sheet,
Forming a via hole penetrating the second conductor layer, the insulating substrate, and the adhesive;
An adhesive dissolving step for dissolving the adhesive exposed in the via hole;
A plating step of forming a plating layer electrically connected to the first conductor layer and the second conductor layer exposed in the via hole;
A method of manufacturing a TAB tape for a semiconductor device, comprising: a patterning step of etching the first conductor layer and the second conductor layer by a photo process to form a first conductor pattern and a second conductor pattern, respectively.   The method for manufacturing a TAB tape for a semiconductor device according to claim 4, wherein the insulating substrate and the adhesive are made of different materials.   6. The method for manufacturing a TAB tape for a semiconductor device according to claim 4, wherein the adhesive dissolving step is a desmear process for removing a residue in the via hole.   The method for producing a TAB tape for a semiconductor device according to claim 4, wherein the step of forming the via hole is performed by laser processing.

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