JP2011166892A - Digital control machine of power supply device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a digital control machine of a power supply device which can effectively improve a characteristic of an abrupt change of a load more than before. <P>SOLUTION: The robust digital control machine 20 of the power supply device which converts an input voltage V<SB>i</SB>into an output voltage V<SB>o</SB>and supplies it to the load 3 includes a controller 22 which detects the output voltage V<SB>o</SB>and calculates an operation amount ξ<SB>1</SB>, and a PWM generator 23 which converts the operation amount ξ<SB>1</SB>into a signal for operating the power supply device. The controller 22 is constituted so that a characteristic of a transfer function W<SB>Qy</SB>(z) has a three-order differential characteristic by adding a delay factor that is a transfer function W<SB>Qy</SB>(z) from the equivalent disturbance Q of an input voltage variation and a load variation to the output voltage V<SB>o</SB>, the transfer function W<SB>Qy</SB>(z) being added with two zero points, and replacing feedforward from the equivalent disturbance Q with feedback from the output voltage V<SB>o</SB>and the operation amount ξ<SB>1</SB>. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a digital controller that is incorporated in a power supply device such as a power amplifier and controls an output voltage supplied to a load. In particular, the present invention has a single configuration for a wide range of load fluctuations and power supply voltage fluctuations. The present invention relates to a digital controller of a power supply apparatus that can be used.

  A pulse width modulation (PWM) switching circuit is used as the power conversion circuit, and an LC filter is inserted between the power conversion circuit and the load to remove noise, and the output voltage supplied to the load is proportional to the command signal. A PWM power amplifier that constitutes a feedback control system is used as a power supply device. At this time, the load characteristics are wide from capacitive to inductive, and the magnitude varies greatly from zero to the maximum rating. Therefore, a so-called robust PWM power amplifier that can cope with such a wide range of load fluctuations and voltage fluctuations of a DC power supply with a single controller is required.

  In such a PWM power amplifier, it is preferable that the feedback signal is small in order to reduce the influence of noise on the controller, and since the current detection sensor is generally expensive, a controller using only voltage feedback is obtained. Is desirable.

  Therefore, Non-Patent Document 1 proposes a robust digital controller design method in a PWM power amplifier that satisfies the above requirements.

  The digital feedback control system has a larger input dead time than the analog feedback control system. This input dead time is mainly due to a delay in DSP calculation time, a conversion time from analog to digital (AD), a conversion time from digital to analog (DA), a delay in the triangular wave comparison unit, and the like. In consideration of this point, in Non-Patent Document 1 described above, the control target (PWM signal generation unit, power conversion circuit, and LC filter) is determined from a continuous time system in consideration of conversion of input dead time and current feedback into voltage feedback. A configuration of a state feedback system that represents a discrete time system whose order is second order higher and achieves a target characteristic given thereto is presented. Also, here, when the state feedback system is equivalently converted to an output feedback system using only voltage, and a robust compensator obtained by approximating this output feedback system is combined, the target value, control amount, disturbance, and control amount An approximately two-degree-of-freedom digital robust control system can be configured to control each characteristic independently, and a digital integral controller using only voltage feedback can be obtained by equivalently converting this digital robust control system Presents that.

  However, Non-Patent Document 1 shows a configuration method of an approximate two-degree-of-freedom robust digital control system that realizes a first-order approximation model. However, a robust digital controller incorporating such a control system increases the degree of approximation. At the same time, it was difficult to suppress the control input. Therefore, it is necessary for anyone to provide a design apparatus for a robust digital controller that can be easily approximated and does not require consideration of the size of the control input.

  Further, regarding the two-degree-of-freedom robust digital control system proposed in Non-Patent Document 1, no clear parameter determining means for increasing the degree of approximation of the robust digital controller is shown. Therefore, it took a lot of thought and error to determine the parameters, which was very time consuming. Therefore, it was necessary to show a clear parameter determination means that anyone could easily design.

  In order to solve the above-described problems, Patent Document 1 discloses a design of a robust digital controller that incorporates a novel two-degree-of-freedom robust digital control system that has a high degree of approximation and that does not require consideration of the size of the control input. A device was proposed. Here, assuming a model matching system that determines a response from a target value to an output voltage, a switching power supply including a DC-DC converter is constructed by reconstructing a robust system by connecting an inverse system and a filter to the system. A technique for obtaining a two-degree-of-freedom digital integral controller applied to the apparatus is shown.

  By the way, in recent years, demands for suppressing fluctuations in output voltage due to sudden changes in load and input voltage have become stricter, making it difficult to satisfy the specifications as a DC-DC converter. In order to satisfy such specifications, another patent document 2 and non-patent document 2 include an approximate freedom degree control in which a zero is added to a transfer function from an equivalent disturbance to an output voltage to realize a second-order differential characteristic. A system has also been proposed.

JP 2006-50723 A International Publication No. 2008/072618 Pamphlet

Koji Higuchi, Kazu Nakano, Kuniaki Araki, Fumiho Kanno, “Design of Robust PWM Power Amplifier by Approximate 2-DOF Digital Integral Control Using Only Voltage Feedback”, IEICE Transactions, 2002 10 Month, Vol.J-85-C, No.10, pp.1-11 Eiji Takegami, Koji Higuchi, Kazu Nakano, “Robust Control of DC-DC Converters Using Additional 2DOF Digital Controllers with Second-Order Differential Disturbance Characteristics”, IEEJ Transactions, 2009, Vol.129-D, No. 12, pp.1137-1146

  Although the digital controller that realizes robust control of switching power supply devices and the like has made technical progress due to the above-mentioned circumstances, the digital controller that has improved the load change characteristics and the input voltage characteristics more effectively than before. Development has become necessary.

  SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a digital controller for a power supply device that can effectively improve a sudden load change characteristic and an input voltage characteristic as compared with the prior art.

The present invention is a digital controller of a power supply device that converts an input voltage into an output voltage V _o and supplies the same to a load, and is configured to detect the output voltage V _o and calculate an operation amount ξ ₁ . An operation amount calculation unit; and a signal generation unit that converts the operation amount ξ ₁ into a signal for operating the power supply device, and includes an equivalent disturbance Q of the input voltage variation and load variation to an output voltage V _o . By connecting a delay element obtained by adding two zeros to the transfer function W _Qy (z) and replacing the feedforward from the equivalent disturbance Q with the feedback from the output voltage V _o and the manipulated variable ξ ₁ , The manipulated variable calculation unit is configured so that the transfer characteristic of the output voltage v _o becomes a third-order differential characteristic from the equivalent disturbance qy.

  In this case, the manipulated variable calculator follows the following formula:

(Where z = exp (jωt), r is an arbitrary target value for the output voltage v _o , k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , k ₄ , k ₅ , It is preferable that k ₆ , k ₇ , k ₈ , k _i1 , k _i2 , k _i3 , and k _i4 are predetermined parameters set in advance) to calculate the manipulated variable ξ ₁ .

Further, the manipulated variable calculation unit has a first digital filter having a transfer function G _r expressed by the following equation with the target value r as an input:

A second digital filter having the output voltage V _o as an input and having a transfer function G _VO represented by the following equation:

A third digital filter having a transfer function G _e expressed by the following equation using a deviation between the target value r and the output voltage v _o as an input;

An adder that adds the outputs from the first to third digital filters to output the manipulated variable ξ ₁ is preferable.

The manipulated variable calculator is connected to each feedforward multiplier that multiplies the parameters k _1r , k _2r , k _3r , and k _4r with the target value r as an input, and receives the output voltage _vo as the parameter. Each feedback multiplier that multiplies k ₁ , k ₂ , k ₇ , and k ₈ is connected, and a deviation between the target value r and the output voltage v _o is input from the subtractor to the first adder, The output from the first adder is input to a first delay element that is delayed by one sample time, and the delayed output from the first delay element is multiplied by the parameters k _i1 , k _i2 , k _i3 , and k _i4 . And the first adder, the output from the multiplier for the parameter k _i1 , the output from the feedback multiplier for multiplying the parameter k ₁ , the parameters k ₃ , k ₄ , k ₅ and k ₆ The output from each feedback multiplier to be multiplied and the output from the feedforward multiplier of the parameter k _1r are added by the second adder, and the output added by the second adder is delayed by one sample time. The delay output from the second delay element is input to the feedback multiplier of the parameter k ₆ , and the delay output from the second delay element is multiplied by the feedback multiplication of the parameter k ₂ . The output from the multiplier, the output from the feed-forward multiplier with the parameter k _2r , and the output from the multiplier with the parameter k _i2 are added by a third adder, and the addition is performed by the third adder. output that is input to the third delay element for delaying one sampling time, input delay output from the third delay element in the feedback multiplier of the parameter k ₅ Is a delay output from the third delay element, an output from the feedback multiplier of the parameter k _8, the output from the feedforward multiplier of the parameter k _3r, from multiplier of the parameter k _i3 The output is added by the fourth adder, and the output added by the fourth adder is input to a fourth delay element that delays by one sample time, and the delayed output from the fourth delay element is the parameter. is input to the feedback multiplier k _4, and delay output from the fourth delay element, an output from the feedback multiplier of the parameter k _7, the output from the feedforward multiplier of the parameter k _4r, the the output from the multiplier parameter k _i4 is, are added in the fifth adder, a fifth delay element output obtained by adding in the fifth adder delays one sample time Is inputted, a delay output from the fifth delay element, preferably configured to output the as the manipulated variable xi] ₁ is input to the feedback multiplier parameter k _3.

  In this case, the manipulated variable calculation unit is preferably configured by omitting each of the feedforward multipliers.

The manipulated variable calculation unit is configured to output the parameters k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , k ₄ , k ₅ , k ₆ , k ₇ , k ₈ , k _i1 , k _It is preferable to omit the _i2 , k _i3 , and k _i4 whose values are small and have little influence on the control system.

  According to the first to fourth aspects of the present invention, by incorporating an operation amount calculation unit in which the characteristic of the output voltage transfer function becomes a third-order differential characteristic from an equivalent disturbance, when the load suddenly changes or the input voltage suddenly changes. The fluctuation characteristic of the output voltage at can be improved more effectively than before. Therefore, the capacity of the output capacitor as a power supply device can be reduced, leading to a reduction in size and cost.

  According to claims 5 and 6 of the present invention, it is possible to speed up the arithmetic processing and simplify the arithmetic unit, to enable high-speed digital control, or to simplify the configuration of the arithmetic unit. Thus, the cost can be suppressed.

It is a schematic block diagram of the power supply device containing the digital controller in one Example of this invention. It is a circuit diagram of the modeled DC-DC converter. It is a block diagram of the controlled object which connected the delay element which should be considered same as the above. FIG. 4 is a block diagram in which feed forward from equivalent disturbance is added to the system of FIG. 3. FIG. 5 is a block diagram obtained by equivalently converting FIG. 4. FIG. 4 is a block diagram in which a state feedback law and a feed forward law are applied to the system of FIG. FIG. 7 is a block diagram showing the configuration of a controller in which the systems shown in FIGS. 5 and 6 are combined. FIG. 6 is a block diagram of a feasible system in which a reverse system and a filter are coupled to a system including transfer functions W _ry (z) and W _Qy (z). FIG. 9 is a block diagram of an approximate two-degree-of-freedom digital integration control system obtained by equivalently converting the system shown in FIG. FIG. 5 is a graph showing frequency-gain characteristics regarding a transfer function between an equivalent disturbance and an output as an example of a simulation result. FIG. 6 is a waveform diagram showing output voltage fluctuation characteristics when the load resistance value is suddenly changed as an example of the simulation result. FIG. 6 is a waveform diagram showing output voltage fluctuation characteristics when the load resistance value is suddenly changed as an example of the experimental results.

  Hereinafter, preferred embodiments of a digital controller according to the present invention will be described with reference to the accompanying drawings.

First, a schematic configuration of a power supply apparatus equipped with a digital controller according to the present invention will be described with reference to FIG. In the figure, 1 is a DC power source, and 2 is a DC-DC converter that converts an input voltage V _i from the DC power source 1 into an output voltage V _o , and the output voltage V _o is supplied to a load 3. The DC-DC converter 2 is a step-down converter including a switching element 5 made of, for example, a MOS FET, a diode 6 that is a rectifying element, a diode 7 that is a commutation element, a choke coil 8, and a smoothing capacitor 9. The choke coil 8 and the smoothing capacitor 9 are configured to function as a filter for removing carrier and switching noise.

The switching element 5 is switched on or off by a switching signal from a driver circuit 13 described later. Therefore, when the switching element 5 is turned on, the diode 6 is turned on and the diode 7 is turned off, whereby a current flows from the DC power source 1 through the diode 6 to the choke coil 8 and energy is stored in the choke coil 8 while switching. When the element 5 is turned off, the diode 6 is turned off and the diode 7 is turned on, so that the energy stored in the choke coil 8 is repeatedly sent to the smoothing capacitor 9 and the resistor 3 through the diode 7, whereby the input is performed. An output voltage V _o lower than the voltage V _i can be supplied to the load 3.

Here, as a control unit for stabilizing the output voltage V _o , a filter 11, a robust digital controller 12 including, for example, a DSP (digital signal processor), and a driver circuit 13 are sequentially connected. The robust digital controller 12 periodically samples (discretizes) an analog signal such as the output voltage V _o supplied through the filter 11 and converts the analog signal into a digital signal, and the AD converter 21 discretizes the analog signal. The controller 22 as an operation amount computing unit that calculates the operation amount ξ ₁ based on the feedback signal, that is, the digital signal and the target value r, and a switching signal that becomes a control signal according to the operation amount ξ ₁ are generated. And a PWM generator 23 as a control output unit. The PWM generator 23 functions as a signal generation unit that converts the manipulated variable ξ ₁ into a signal for operating the switching element 5. The PWM generator 23 is not shown in order to generate a switching signal with a constant period controlled in pulse width. A triangular wave carrier from a triangular wave oscillator is used. The driver circuit 13 is for outputting a switching signal from the PWM generator 23 to the gate of the switching element 5.

The robust digital controller 12 in the present invention detects at least one location of the output voltage V _o with the AD converter 21 and determines the control operation amount ξ ₁ . The manipulated variable ξ ₁ here corresponds to the duty of the switching signal in the case of PWM control, for example, and the present invention can also be applied to PFM control and the like. In the case of PFM control, this corresponds to the frequency of the switching signal. Furthermore, since the present invention can be applied to all power supply devices in which an LC filter (for example, the choke coil 8 and the smoothing capacitor 9 in FIG. 1) is connected to the load 3 of the power supply device, reduction of power supply output noise can be easily achieved.

FIG. 2 is a circuit diagram modeling the DC-DC converter 2 to be controlled. Here, the switching element 5 and the diode 6 shown in FIG. 1 are replaced with one switching element 16, and the diode 7 is replaced with a switching element 17. Therefore, the PWM generator 23 generates a switching signal that causes the switching elements 16 and 17 to perform switching operations symmetrically to each other. Reference numeral 18 denotes a combined resistance such as the resistance of the choke coil 8 and the on-resistance of the switching element 5, and the resistance value is R ₁ . In addition, R ₀ is the resistance value of the load 3, L ₁ is the inductance value of the choke coil 8, and C ₁ is the capacitance of the smoothing capacitor 9.

  Here, if the frequency of the input u is sufficiently lower than the frequency of the triangular wave carrier, the state equation at the time of resistance load of the DC-DC converter 2 shown in FIG. Show it.

In the above equation, the input u is the input voltage V _i and the output y is the output voltage V _o . Moreover, each variable of the equivalent disturbance q _u and the equivalent disturbance q _y to the discrete time control object respectively corresponds to an input voltage fluctuation and a load fluctuation to the DC-DC converter 2. The state variable x, the system matrix A, the input matrix B, and the output matrix C in the above equation are expressed by the following equations.

K _p is the gain of the DC-DC converter 2 and i _L1 is the current flowing through the choke coil 8. The matrixes A, B, and C are determined to have appropriate values according to the circuit configuration. Here, in order to suppress the influence due to the parameter variation, the robust digital controller 12 may be constructed so that the equivalent disturbance q _u and the gain of the pulse transfer function from the equivalent disturbance q _y to the output y are as small as possible.

  When the system shown in Equation 5 is discretized with zero-order hold, the following difference equation is obtained.

In the above equation, the matrix A _d and the matrix B _d are expressed as follows.

The transfer function G _p (z) of the system expressed by Equation 7 is given by the following equation.

However, N _p (z) and D _p (z) are as follows. Here, a ** and b ** are constants specific to the DC-DC converter 2, and z = exp (jωt).

Load fluctuations and input voltage fluctuations of the DC-DC converter 2 to be controlled are considered to be parameter fluctuations of the state equation shown in Equation 5. Such parameter fluctuations are replaced with equivalent disturbances q _u and q _y to the discrete-time controlled object as shown in FIG. In order to suppress the influence due to the parameter fluctuation, a control system in which the gain of the pulse transfer function from the equivalent disturbances q _u and q _y to the output y is minimized is built, and this is incorporated into the robust digital controller 12.

  Next, the feedforward from the disturbance using the disturbance and the differential value from the disturbance is expressed by the output and input of the controlled object and their differential values. A method of converting to feedback and adding a zero of the transfer function between the disturbance and the controlled variable without directly using the disturbance will be described. This combines the delay element with the input of the controlled object, expresses the state variable with the output of the controlled object, the input, and their differential values, incorporates feedback using the state variable into the delayed element, and converts it to output feedback This is an extension of Pearson's method.

  FIG. 3 is a block diagram of a controlled object to which delay elements to be considered in the present invention are connected. What is important here is that in this embodiment, the delay element 31 to 34 is controlled by the DC-DC converter in consideration of calculation delay by the robust digital controller 12, current estimation, and addition of two zeros. 2 is connected to the input u. In this regard, in Patent Document 2 and Non-Patent Document 2, a control system is constructed in consideration of three delay elements by calculation delay, current estimation, and addition of one zero point.

3 will be described in more detail. The manipulated variable ξ ₁ of the delay element 31 takes into account a time delay such as a computation delay, and the manipulated variable ξ ₂ of the delay element 32 is a delay element estimated from the current estimation. operation amount xi] ₄ delays the manipulated variable xi] ₃ delay elements 33 elements 34 are delay element in consideration of the additional zeros respectively. These delay elements 31 to 34 are all configured by delay elements of the order 1 / z. The manipulated variable ξ ₁ is equal to the input u to the controlled object. The sum of the input u and the equivalent disturbance q _u due to fluctuations in the input voltage is input to the DC-DC converter 2 by the addition point 35, and the output from the DC-DC converter and the load fluctuation are added by the addition point 36. The actual output y is obtained by adding the equivalent disturbance q _y due to.

  For the difference equation of Equation 7, the discrete values y (k + 1), y (k + 2), and y (k + 3) of the output y are expressed as follows. Here, since there is one more zero than in the prior art, the order of the output y is expanded to the fourth order from y (k) to y (k + 3).

  This can be expressed in the following form in a matrix form.

  When each matrix of Formula 12 is replaced with a symbol, the following Formula 13 and Formula 14 are obtained.

  The matrix of the following formula is multiplied on both sides of the above equation (13).

Then, the matrix x _d (k) relating to the output choke coil current i _L1 and the output voltage V _o is as follows.

Substituting the matrix x _d (k) obtained in Equation 16 into Equation 13, the following equation is obtained.

Here, I ₄ is a 4 × 4 unit matrix. Equation 17 is further replaced by the following equation.

  In the above formula, each component of l ** and m ** is expressed as follows.

  On the other hand, the state equation of the system shown in FIG. 3 is expressed by the following equation.

FIG. 4 is a block diagram in which feedforward from the equivalent disturbance Q = [q _u q _y ] is added to the system of FIG. In the figure, reference numeral 37 denotes a feedforward element having an equivalent disturbance q _u as an input, and reference numeral 38 denotes a feedforward element having an equivalent disturbance q _y as an input. The outputs of the feedforward elements 37 and 38 are added to the input v to the delay elements 31 to 34 at the addition point 39. Here, in order to add two arbitrary zeros to the transfer function between the equivalent disturbance Q and the output y, feedforward elements 37 and 38 into which two parameters k _q1 and k _q2 that can be arbitrarily specified are introduced are provided. Added.

  According to the above equation 18, the feedforward elements 37 and 38 from the equivalent disturbance Q are connected to the input u of the DC-DC converter 2 to be controlled while maintaining the transfer function between the equivalent disturbance Q and the output y. Equivalent transformation to the feedback of the final output y of the system. FIG. 5 is a block diagram obtained by equivalently converting FIG. In the figure, 41 is a feedback element of input u, and 42 is a feedback element of output y. The outputs of the feedback elements 41 and 42 are added to the input v to the delay elements 31 to 34 at the addition point 39.

FIG. 6 shows a block diagram when the state feedback law and the feedforward law are applied to the system in which the delay elements 31 to 34 are added to the controlled object shown in FIG. In the figure, here receives the output voltage V _o of the output y ie DC-DC converter 2 of the controlled object, a feedback element 44 having a transfer parameter f1, as input current i flowing through the control element, the transmission parameter f2 The feedback element 45 having the operation parameter ξ ₁ from the delay element 31 and the feedback element 46 having the transmission parameter f3 and the operation amount ξ ₂ from the delay element 32 as the input and the feedback element 47 having the transmission parameter f4. Then, an operation amount ξ ₃ from the delay element 33 is input, a feedback element 48 having the transfer parameter f5, an operation amount ξ ₄ from the delay element 34 is input, a feedback element 49 having the transfer parameter f6, and a target value With r as an input, transfer parameter GH * (z + H ₄ ) (z + H ₅ ) (z + H ₆ ) ) Are respectively added, and the outputs of the feedback elements 44 to 49 and the output of the feedforward element 50 are added at the addition point 39. The feedforward element 50 here is for eliminating the poles H ₄ , H ₅ , and H ₆ so that the output y is equal to the target value r in a steady state.

FIG. 7 shows the configuration of a controller in which the systems shown in FIGS. 5 and 6 are combined. Here, in order to equivalently convert the current feedback of the controlled object (DC-DC converter 2) into feedback from the controlled object input u and the output y, the controlled object output y is used as an input, and the transfer parameter −a ₁₁ / The element 52 having a ₁₂ and the output y to be controlled are input, the element 53 having the transfer parameter z / a ₁₂ and the manipulated variable ξ ₁ from the delay element 31 are input, and the transfer parameter −b ₁₁ / a ₁₂ , An adding point 55 for adding the outputs from the elements 52 and 53, and adding the outputs from the element 54 and the adding point 55 and adding this as an input to the feedback element 45 A current estimator 57 including a matching point 56 is provided. Although this current estimation unit 57 is also disclosed in Non-Patent Document 2, it is a primary advance element. On the other hand, the feedback elements 41 and 42 are tertiary advance elements.

In FIG. 6 and FIG. 7, the transfer function W _ry (z) between the target value r and the output y as the control amount is designated as follows in order to prevent overshoot in the step response.

In the above formula, n ₁ and n ₂ are zero points, and H ₁ , H ₂ , H ₃ , H ₄ , H ₅ , and H ₆ are poles. The parameters f1, f2, f3, f4, f5, f6, GH, H ₄ , H ₅ , and H ₆ shown in FIG. 6 are determined so that the transfer function W _ry (z) satisfies the equation (21). . N _H (z) and D _H (z) are model matching system constants (pole arrangement (H1 to H6), state feedback (f1 to f6)) and DC-DC converter constants (a ** and b **). ) And zero-point addition parameters k _q1 and k _q2 .

The parameters k _q1 and k _q2 for arranging the zero point of the transfer function W _qy (z) of the output y from the equivalent disturbance q _u and the transfer function W _qy y (z) of the output y from the equivalent disturbance q _y to the following equation: In each case.

Thus, the transfer function W _Qy (z) = [W _quy (z) W _qyy (z)] between the equivalent disturbance Q = [q _u q _y ] and the output y is expressed by the following equation.

Here, in order to increase the degree of approximation as a controller, it is specified that the absolute value of the pole H ₂ is sufficiently larger than the absolute values of the poles H ₁ and H ₃ as in the following equation.

As a result, as shown in the following equation, the target characteristic that is actually realized can be determined as a transfer function W _m (z) of a model obtained by linearly approximating the pulse transfer function W _ry (z).

When deriving the above equation from Equation 21, each term of (z + H ₄ ), (z + H ₅ ), and (z + H ₆ ) in Equation 21 is common to both the numerator and denominator and can be eliminated. Further, n ₂ is a zero that occurs with the discretization of the controlled object, and its absolute value is sufficiently larger than 1 and can be ignored because the influence on the system is small. Further, when the zero n ₁ is small with respect to the pole H ₂ , the influence of the zero n ₁ is sufficiently small and can be ignored. In this case, if the absolute value of the pole H ₂ is specified to be sufficiently larger than the absolute values of the poles H ₁ and H ₃ as shown in Equation 24, the terms of the poles H ₁ and H ₃ can be ignored with a sufficiently fast response. .

Number 23 described above, in the system configuration of the controller shown in FIG. 7, a transfer function W _Quy output y from the equivalent disturbance q _u (z), the transfer function W _QYY output y from the equivalent disturbance q _y (z) is It shows that it becomes a second derivative characteristic. In the present embodiment, a compensator constituting an approximate two-degree-of-freedom system as shown in FIG. The system shown in FIG. 8 introduces an inverse system (inverse function) of the approximate model having the above and a filter K (z) for approximating this inverse system, and thereby the model shown in FIG. The matching system can be configured to be incorporated in the robust digital controller 12. The transfer function W _m ⁻¹ of the inverse system is expressed as an inverse function of the transfer function W _ry (z) of the system shown in FIG.

The filter K (z) is introduced to avoid a system that cannot be approximately realized only by the transfer function W _m ⁻¹ of the inverse system, and is represented by the following equation. The coefficient k _z here is set to a specific value as a design parameter.

Therefore, the relationship between the target value r and the output y can be expressed as follows using the equation of the transfer function W _ry (z).

The relationship between the equivalent disturbance Q and the output y can be expressed as follows using the equations of the transfer function k (z) and the transfer function W _Qy (z).

Therefore, the characteristic between the target value r and the output y is the design parameter pole H ₂ , the characteristic between the equivalent disturbance q _u and the output y, and the characteristic between the equivalent disturbance q _y and the output y are , And coefficient k _z can be specified independently. Thus, the system of FIG. 8 is an approximate two-degree-of-freedom sentence, and the sensitivity to disturbance can be reduced by increasing the coefficient k _z . The above formula 29 is as follows when the relational expression of the formula 23 is used.

Thus, in the present embodiment, four delay elements 31 to 34, in which two zeros are added to the transfer function W _Qy (z) from the equivalent disturbance Q of the input voltage fluctuation and the load fluctuation to the output voltage V _o, are connected. the feedforward elements 37, 38 to the input of the delay element 31 to 34 from the equivalent disturbance Q, by replacing the feedback elements 41 and 42 to the input of the delay element 31 to 34 from the output voltage V _o and the operation amount xi] _1, The characteristic of the transfer function W _Qy (z) from the equivalent disturbance Q to the output voltage V _o has the third derivative characteristic.

In FIG. 8, 61 is a transfer element of a system including transfer functions W _ry (z) and W _Qy (z) in consideration of the equivalent disturbance Q, 62 is a transfer element of an inverse system including a transfer function W _m ⁻¹ , and 63 is A transfer element as a robust compensator including a filter of the transfer function K (z), and a control amount which is an output y of the transfer element 61 is extracted at the extraction point 64 and applied to the input of the transfer element 62. The output from the addition point 65 that adds the output of the current value r and the target value r is added to another addition point 67 by the extraction point 66 and also input to the transfer element 61. The addition point 67 inputs a deviation (subtraction value) between the output from the addition point 65 branched at the lead point 66 and the output of the transmission element 62 to the transmission element 63.

FIG. 9 is a block diagram in which the system shown in FIG. 8 is equivalently converted to the configuration of an integral control system having approximately two degrees of freedom that can be realized as the robust digital controller 12. The configuration of each part in this block diagram will be described. The controller 22 described above is composed of k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , k ₄ , k ₅ , k ₆ , k _7. , K ₈ , k _i1 , k _i2 , k _i3 , k _i4 , transfer elements 70 to 85 as multipliers, and delay elements 31 to 31 as an order 1 / z delay element corresponding to one sample delay 34, a delay element 86, an addition point 87 as a subtracter, an addition point 39 as an adder, and addition points 88 to 91. The parameter _{k 1r, k 2r, k 3r} , k 4r, k 1, k 2, k 3, k 4, k 5, k 6, k 7, k 8, k i1, k i2, k i3, k i4 Among them, those having a small value and little influence on the control system can be omitted, and the feedforward elements 70, 71, 72, 73 can also be omitted. As a result, the calculation formula for the operation amount ξ ₁ is simplified, the calculation load is reduced, and the calculation process can be speeded up and the calculator can be simplified.

The structure shown in FIG. 9 will be described in more detail. The feedforward elements 70, 71, 72, and 73 of the parameters k _1r , k _2r , k _3r , and k _4r are connected with the target value r as an input, and the output voltage V _o. Are input to the feedback elements 74, 75, 80, 81 of the parameters k ₁ , k ₂ , k ₇ , k ₈ , and the deviation between the target value r and the output voltage V _o is different from the addition point 87. Is input to the summing point 88, and the output from the delay element 86 of the order 1 / z is added to the summing point 88 and input to the delay element 86, and the output from the delay element 86 is the parameter k _i1 , k. _i2, k _i3, is input to the transfer element 82, 83, 84 and 85 of k _i4, the output from the transfer element 82, the output from the feedback element 73, the parameter _{k 3, k 4, k 5} , k 6 Each feedback element 7 , 77, 78, 79 and the output from the feedforward element 70 are added at the addition point 39, and the output added at the addition point 39 is input to the delay element 34 of the order 1 / z. The delay output ξ ₄ from the delay element 34 is input to the feedback element 79, the delay output ξ ₄ from the delay element 34, the output from the feedback element 75, the output from the feedforward element 71, and the transmission element 83. Are added at the summing point 89, and the summed output at the summing point 89 is input to the delay element 33 of the order 1 / z, and the delay output ξ ₃ from the delay element 33 is input to the feedback element 78. is a delayed output xi] ₃ from the delay element 33, an output from the feedback element 81, an output from the feedforward element 72, exits from the transfer element 84 DOO is, are added in the summing point 90 is added, the added output obtained by adding in conjunction point 90 is input to the delay element 32 of the order 1 / z, the delayed output xi] ₂ from the delay element 32, the input to the feedback element 77 The delay output ξ ₂ from the delay element 32, the output from the feedback element 80, the output from the feedforward element 73, and the output from the transfer element 85 are added at the addition point 91, and this addition is performed. The output added at the point 91 is input to the delay element 31 of the order 1 / z, and the delay output ξ ₁ from the delay element 31 is input to the feedback element 76 and the DC-DC converter 2 that is the control target element. The controller 22 of the robust digital controller 12 is configured so as to be given as the input u.

In FIG. 9 above, the part excluding the DC-DC converter 2 that is the control target element corresponds to the controller 22 of the robust digital controller 12 that has the configuration of the approximate two-degree-of-freedom integral control system. The controller 22 includes a transfer element as a digital filter, and transfer functions G _r , G _vo , and G _e of the transfer element are expressed by the following equations.

In the above equation, G _r is a transfer function from the load voltage target value r to the manipulated variable ξ ₁ , G _vo is a transfer function from the output voltage V _o to the manipulated variable ξ ₁ , and G _e is the load voltage target value. This is a transfer function from the deviation between r and the output voltage v _o to the manipulated variable ξ ₁ . Therefore, the operation amount xi] ₁ as an input u to the controlled object, these transfer functions G _r, G _vo, and is obtained by adding the outputs of the digital filter with a G _e, represented by the following equation.

In the above equation, z = exp (jωt), and k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , k ₄ , k ₅ , k ₆ , k ₇ , k ₈ , k _The parameters _i1 , _ki2 , _ki3 , _ki4 are set in advance according to the control system incorporated as the robust digital controller 12.

  The power supply apparatus using the robust digital controller 12 obtained in this way can further reduce the output voltage fluctuation at the time of sudden load change and sudden input change of the power supply apparatus. For this reason, the capacity of the output capacitor (smoothing capacitor 9) can be reduced, leading to a reduction in size and cost of the power supply device.

Next, the result of the simulation based on the above embodiment will be described. Here, when the simulation of the power supply apparatus is performed, the design parameters H ₁ , H ₂ , H ₃ , H ₄ , H ₅ , H ₆ , k _z , k _q1 , k _q2 are set as follows.

As a result, the controller parameters k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , k ₄ , k ₅ , k ₆ , k ₇ , k ₈ , constituting the controller 22 of FIG. k _i1 , k _i2 , k _i3 and k _i4 can be derived as follows.

10 and 11 show the parameters k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , k ₄ , k ₅ , k ₆ , k ₇ , k ₈ , k _i1 , k _i2. , K _i3 , k _i4 shows a simulation result when it is assumed that the robust digital controller 12 is incorporated in the DC-DC converter 2. FIG. 10 shows the frequency-gain characteristic of the transfer function W _Qy (z) between the equivalent disturbance Q and the output y, the left side shows a conventional control system in which a second-order differential characteristic is set, and the right side. Indicates a control system in which the third order differential characteristic is set in this embodiment.

As is clear from the figure, with regard to the transfer function W _Qy (z), the order of (z−1) is conventionally second order, and the slope of the frequency-gain characteristic is 40 dB / dec. On the other hand, in this embodiment, the order of (z-1) is the third order, and the slope of the frequency-gain characteristic is 60 dB / dec, so that the followability to sudden load changes is improved without complicating the configuration. Can be made.

FIG. 11 shows the fluctuation characteristics of the output voltage V _o when the resistance value R ₀ of the load 3 shown in FIGS. 1 and 2 is suddenly changed. Here, the resistance value R ₀ of the load 3 is suddenly changed from 0.33Ω to 0.165Ω (the output current i _o to the load 3 is changed from 10 A to 20 A), but the fluctuation of the output voltage V _o (see the arrow in the figure) Is suppressed to 20 mV because the slope of the frequency-gain characteristic is improved to 60 dB / dec.

Next, an implementation example of the robust digital controller 12 designed based on the present embodiment will be described. The design parameters H ₁ , H ₂ , H ₃ , H ₄ , H ₅ , H ₆ , k _z , k _q1 , k _q2 are set as follows.

Thus, the controller parameters _{k 1r, k 2r, k 3r} , k 4r, k 1, k 2, k 3, k 4, k 5, k 6, k 7, k 8, k i1, k i2, k i3 , K _i4 is derived as follows.

FIG. 12 shows the fluctuation characteristics of the output voltage V _o when the resistance value R ₀ of the load 3 is suddenly changed. Here, the same condition, that is, the resistance value R ₀ of the load 3 is changed from 0.33Ω to 0.165Ω (load The output current i _o to 3 is suddenly changed from 10 A to 20 A). The parameters _{k 1r, k 2r, k 3r} , k 4r, the _{k 1, k 2, k 3} , k 4, k 5, k 6, k 7, k 8, k i1, k i2, k i3, k i4 In the example in which the robust digital controller 12 having the above configuration is actually incorporated in the power supply device, it can be seen that the fluctuation of the output voltage V _o (see the arrow in the figure) is suppressed to 40 mV.

As described above, as the robust digital controller 12 applied to the DC-DC converter 2, “1” is specified for two zeros of the transfer function W _Qy (z) between the disturbance Q and the output y, and the third-order differential characteristic is obtained. It was confirmed from the verification by the above simulation and the experimental results actually installed in the robust digital controller 12 that the load sudden change characteristic can be effectively improved as compared with the conventional one by incorporating the new control system to be applied. Note that a more robust control system is configured by setting conjugate complex numbers such as [0.99 + 0.01i, 0.99-0.01i], for example, to the two zeros and giving the controller 22 the characteristics of an inverse Chebyshev filter. You can also.

As described above, the present embodiment is a robust digital controller 12 of the power supply device supplies to convert the input voltage V _i to the output voltage V _o to a load 3, the operation amount by detecting the output voltage V _o xi] Controller 22 configured to calculate ₁ and a PWM generator 23 serving as a signal generator for converting the manipulated variable ξ ₁ into a signal for operating the power supply device, the input voltage The delay elements 31 to 34 in which two zeros are added to the transfer function W _Qy (z) from the equivalent disturbance Q of fluctuation and load fluctuation to the output voltage V _o are connected, and feedforward elements 37 and 38 from the equivalent disturbance Q are connected. and I feedback by replacing an element 41, characteristics third derivative characteristic of the transfer function W _Qy of the output voltage v _o from the equivalent disturbance Q (z) from the output voltage V _o and the manipulated variable xi] ₁ As such, constitute a controller 22.

  Also, the controller 22 here follows the following formula:

(Where z = exp (jωt), r is an arbitrary target value for the output voltage v _o , k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , k ₄ , k ₅ , k ₆ , k ₇ , k ₈ , k _i1 , k _i2 , k _i3 , and k _i4 are predetermined parameters set in advance.) The operation amount ξ ₁ is calculated.

In this case, the controller 22 receives the target value r and inputs a first digital filter having a transfer function G _r expressed by the following equation:

A second digital filter having a transfer function G _VO represented by the following equation with the output voltage V _o as an input;

A third digital filter having a transfer function G _e expressed by the following equation using a deviation between the target value r and the output voltage v _o as an input;

An adder that adds the outputs from these digital filters and outputs the manipulated variable ξ ₁ is configured.

The controller 22 in this embodiment, the target value parameter k _1r a r as input, k _2r, k _3r, as the feedforward multiplier for multiplying the k _4r, feedforward element 70, 71, 72, 73 connected Feedback elements 74, 75, 80, and 81 are connected as feedback multipliers for multiplying the parameters k ₁ , k ₂ , k ₇ , and k ₈ with the output voltage v _o as an input, and the target value r and output A deviation from the voltage _vo is input from a summing point 87 as a subtracter to a summing point 88 as a first adder, and an output from the summing point 88 is used as a first delay element for delaying one sample time. is input to the delay element 86, a delay output from the delay element 86, the parameter _{k i1, k i2, k i3} , k i4 transfer element 82 as the multipliers for multiplying the And 83, 84, 85, the addition is input to a summing point 88, the output from the transfer element 82 of the parameter k _i1, the output from the feedback element 74 for multiplying the parameter k _1, the parameter k _3, k _4, The outputs from the feedback elements 76, 77, 78, and 79 as the feedback multipliers for multiplying k ₅ and k ₆ and the output from the feedforward element 70 for the parameter k _1r are added as the second adder. The output added at the matching point 39 and the output added at the adding point 39 is input to a delay element 34 as a second delay element that delays by one sample time, and a delay output ξ ₄ from the delay element 34 is fed back to the parameter k ₆ . Input to element 79, delayed output ξ ₄ from delay element 34, output from feedback element 75 of parameter k ₂ , parameter k The output from the feed forward element 71 of _2r and the output from the transmission element 83 of the parameter k _i2 are added at the addition point 89 as the third adder, and the output added at the addition point 89 is 1 is input to the delay element 33 as a third delay element for delaying the sample time, is delayed outputs xi] ₃ from the delay element 33 is input to the feedback element 78 of the parameter k _5, the delayed output xi] ₃ from the delay element 33, The output from the feedback element 81 with the parameter k ₈ , the output from the feed forward element 72 with the parameter k _3r , and the output from the transfer element 84 with the parameter k _i3 are added at the addition point 90 as the fourth adder. The output added at the addition point 90 is input to a delay element 32 as a fourth delay element that delays by one sample time. Delay output xi] ₂ from the input to the feedback element 77 of the parameter k _4, the delay output xi] ₂ from the delay element 32, an output from the feedback element 80 of the parameter k _7, from the feedforward element 73 of the parameter k _4r And the output from the transfer element 85 of the parameter k _i4 are added at a summing point 91 as a fifth adder, and the summed output at the summing point 91 delays one sample time. is input to the delay element 31 as a, a delay output xi] ₁ from the delay element 31 is input to the feedback element 76 of the parameter k _3, is output as the manipulated variable xi] ₁ to the DC-DC converter 2 Configured as follows.

In this way, by incorporating the controller 22 in which the characteristic of the transfer function W _Qy (z) of the output voltage _vo from the equivalent disturbance Q becomes the third-order differential characteristic, the power supply apparatus can be changed suddenly or when the input voltage suddenly changes. The fluctuation characteristic of the output voltage V _o can be improved more effectively than before. Therefore, the capacity of the output capacitor as a power supply device can be reduced, leading to a reduction in size and cost.

Further, the controller 22 may be configured by omitting the feedforward elements 70, 71, 72, 73, and the parameters k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , _{k 4, k 5, k 6} , k 7, k 8, k i1, k i2, k i3, may be constructed by omitting what its value is less impact on the small control system of the k _i4.

In this way, the calculation formula for the manipulated variable ξ ₁ is simplified, and it is possible to speed up the arithmetic processing and simplify the arithmetic unit. Therefore, high-speed digital control is possible, or the cost can be suppressed by simplifying the configuration of the arithmetic unit.

  In addition, this invention is not limited to the said Example, It can change in the range which does not deviate from the meaning of this invention. For example, the configuration of the DC-DC converter 2 to be controlled shown in FIG. 1 includes various types such as an insulating converter using a transformer and a converter having a plurality of switching elements (for example, a half-bridge converter and a full-bridge converter). Can be applied.

3 Load 20 Robust digital controller (digital controller)
22 Controller (Operation amount calculation unit)
23 PWM generator (signal generator)
31 Delay element (fifth delay element)
32 Delay element (fourth delay element)
33 Delay element (third delay element)
34 Delay element (second delay element)
39 Addition point (second adder)
70-73 Feedforward element (feedforward multiplier)
74 to 81 Feedback element (feedback multiplier)
82 to 85 Transfer element (multiplier)
86 Delay element (first delay element)
87 Addition point (subtractor)
88 Addition points (first adder)
89 Addition point (third adder)
90 Addition points (fourth adder)
91 Addition point (fifth adder)

Claims (6)

A digital controller of a power supply device that converts an input voltage into an output voltage V _o and supplies it to a load,
An operation amount calculator configured to detect the output voltage V _o and calculate an operation amount ξ ₁ ;
A signal generation unit that converts the operation amount ξ ₁ into a signal for operating the power supply device;
A delay element in which two zeros are added to the transfer function W _Qy (z) from the input voltage fluctuation and load fluctuation equivalent disturbance Q to the output voltage V _o is connected, and feedforward from the equivalent disturbance Q is output as the output By replacing the feedback from the voltage V _o and the manipulated variable ξ _{1, the} manipulated variable calculating unit is configured so that the transfer characteristic of the output voltage v _o becomes the third derivative characteristic from the equivalent disturbance qy. A digital controller for a power supply device. The manipulated variable calculator is in accordance with the following equation:

(Where z = exp (jωt), r is an arbitrary target value for the output voltage v _o , k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , k ₄ , k ₅ , (k ₆ , k ₇ , k ₈ , k _i1 , k _i2 , k _i3 , k _i4 are predetermined parameters set in advance)
2. The digital controller of the power supply apparatus according to claim ₁ , wherein the operation amount ξ ₁ is calculated. A first digital filter having a transfer function G _r expressed by the following equation with the manipulated variable calculator as input:

A second digital filter having the output voltage V _o as an input and having a transfer function G _VO represented by the following equation:

A third digital filter having a transfer function G _e expressed by the following equation using a deviation between the target value r and the output voltage v _o as an input;

Digital controller of the power supply device according to claim 2, characterized in that it is composed of an adder which adds the respective outputs to output the manipulated variable xi] ₁ from the first to third digital filter. The manipulated variable calculator is connected to each feedforward multiplier that multiplies the parameters k _1r , k _2r , k _3r , and k _4r with the target value r as an input, and _{receives the} output voltage _vo as the parameter k. Each feedback multiplier that multiplies ₁ , k ₂ , k ₇ , k ₈ is connected,
The deviation between the target value r and the output voltage v _o is input from the subtracter to the first adder, and the output from the first adder is input to the first delay element that delays by one sample time,
The delayed output from the first delay element is input to each multiplier for multiplying the parameters k _i1 , k _i2 , k _i3 , k _i4 and the first adder,
The output from the multiplier of the parameter k _i1 , the output from the feedback multiplier that multiplies the parameter k _1, and the output from each feedback multiplier that multiplies the parameters k ₃ , k ₄ , k ₅ , and k _6. And the output from the feedforward multiplier of the parameter k _1r is added by the second adder,
The output added by the second adder is input to a second delay element that delays one sample time,
The delayed output from the second delay element is input to the feedback multiplier of the parameter k ₆ ,
A delay output from the second delay element, an output from the feedback multiplier of the parameter k ₂ , an output from the feedforward multiplier of the parameter k _2r , and an output from the multiplier of the parameter k _i2 Are added by the third adder,
The output added by the third adder is input to a third delay element that delays one sample time,
The delayed output from the third delay element is input to the feedback multiplier of the parameter k ₅ ,
A delay output from the third delay element, an output from the feedback multiplier of the parameter k ₈ , an output from the feedforward multiplier of the parameter k _3r , and an output from the multiplier of the parameter k _i3 Are added by the fourth adder,
The output added by the fourth adder is input to a fourth delay element that delays one sample time,
The delay output from the fourth delay element is input to the feedback multiplier of the parameter k ₄ ,
A delay output from the fourth delay element, an output from the feedback multiplier of the parameter k ₇ , an output from the feedforward multiplier of the parameter k _4r , and an output from the multiplier of the parameter k _i4 Are added by the fifth adder,
The output added by the fifth adder is input to a fifth delay element that delays one sample time,
Delayed output from the fifth delay element, the parameter k ₃ of the feedback multipliers that the configured output as the operation amount xi] ₁ is inputted to said claim 2 Power supply according Digital controller. 5. The digital controller of the power supply apparatus according to claim 4, wherein the manipulated variable calculation unit is configured by omitting each of the feedforward multipliers. The manipulated variable calculation unit is configured to output the parameters k _1r , k _2r , k _3r , k _4r , k ₁ , k ₂ , k ₃ , k ₄ , k ₅ , k ₆ , k ₇ , k ₈ , k _i1 , k _i2. , K _i3 , k _i4 , and the digital control of the power supply device according to claim 2, wherein the value is small and has a small influence on the control system. vessel.

Images