JP2011160428A - System - Google Patents

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JP2011160428A
JP2011160428A JP2011022531A JP2011022531A JP2011160428A JP 2011160428 A JP2011160428 A JP 2011160428A JP 2011022531 A JP2011022531 A JP 2011022531A JP 2011022531 A JP2011022531 A JP 2011022531A JP 2011160428 A JP2011160428 A JP 2011160428A
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power supply
wiring
filter
stub
pattern
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JP2011022531A
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JP5357907B2 (en
Inventor
Atsushi Nakamura
Motohiro Suwa
篤 中村
元大 諏訪
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Renesas Electronics Corp
ルネサスエレクトロニクス株式会社
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a system consuming no wasteful power, high in noise reduction effect up to high frequencies, capable of achieving power decoupling for a semiconductor device such as a microcomputer, and mounted with a semiconductor device on a mounting board. <P>SOLUTION: In the system mounted, on a mounting board with an LSI package 1, a bypass capacitor 3, a filter 5 and the like, the filter 5 includes a stub wire 4 (λ/4) connected between the bypass capacitor 3 and a backbone power source. By being formed with a circuit having low impedance relative to a power route, when noise is generated from the LSI package 1, the noise current thereof flows into the filter 5, and the noise current having flowed in the filter 5 is reflected at an open end of the stub wire 4 to return and thereby acts at the branch point of the stub wire 4 to cancel the noise current from the LSI package 1 after λ/2. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a system in which a semiconductor device is mounted, and in particular, a technology effective when applied to a system in which a semiconductor device such as a microcomputer suitable for measures for reducing unnecessary electromagnetic radiation (EMI: Electro-Magnetic Interference) is mounted on a mounting substrate. About.

  According to a study by the present inventor, the following technologies can be considered for a system in which a semiconductor device such as a microcomputer is mounted on a mounting substrate.

  For example, in a system in which a semiconductor device of a microcomputer is mounted on a mounting board, a power supply voltage and a reference voltage of a power supply path for supplying power from a main power source to the semiconductor device are used as a bypass capacitor for mounting components in order to reduce EMI. To prevent the microcomputer's operating current (especially its harmonic components) from being drawn from the main power supply. Furthermore, in addition to the bypass capacitor, a power supply filter may be inserted in series with the power supply voltage or reference voltage of the power supply path.

  Also, as a measure against EMI reduction, the length of the power supply wiring of the power supply path for supplying power from the main power supply to the semiconductor device is set to a value obtained by multiplying the specific frequency of the power supply wiring by the wavelength shortening rate of the substrate material. A technique of a printed circuit board in which a capacitor is connected between a power supply voltage and a reference voltage is disclosed (see, for example, Patent Document 1).

JP 2001-119110 A (summary of the first page)

  By the way, as a result of the study of the present inventor on a system in which a semiconductor device such as a microcomputer as described above is mounted on a mounting substrate, the following has been clarified.

  For example, as described above, in the configuration in which the bypass capacitor is connected between the power supply voltage of the power supply path for supplying power from the main power supply to the semiconductor device and the reference voltage (see FIG. 1, but without the filter 5), With the current C, the current B from the bypass capacitor 3 does not become 100%, and the current A from the main power source 2 cannot be completely blocked. This is because the magnitudes of the currents A and B are determined by the inverse ratio of the respective path impedances. Since the impedance of the path B can only be reduced to about 1/10 with respect to the path A, a noise current of about 1/10 of the current B flows through the path A. Since the path A is connected to a portion with high radiation efficiency (acting as an antenna) such as a power cable, even a 1/10 current causes EMI.

  Furthermore, when a chip bead or a T-type filter is used in addition to the bypass capacitor, the path impedance ratio between the current A and the current B can be increased to nearly 1000: 1. However, these can be obtained only in a relatively low frequency band, and the unavoidable direct current resistance (0.2 to 0.6 Ω) reduces wasteful power consumption and fluctuations in power supply voltage due to current changes in the semiconductor device. There are problems that occur.

  The technique of Patent Document 1 defines the length of the power supply wiring of the power supply path for supplying power from the basic power supply to the semiconductor device, and the other end is in an open state as in the present invention. This is not a technique for connecting one end of the wiring to the power supply path.

  Accordingly, an object of the present invention is to provide a system in which a semiconductor device is mounted on a mounting substrate, which can realize power supply decoupling for a semiconductor device such as a microcomputer, which has no wasteful power consumption and has a high noise reduction effect up to a high frequency. It is to provide.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  That is, the present invention has a configuration in which a low impedance circuit is added to a system in which a semiconductor device and a capacitor are mounted on a mounting substrate, and the capacitor has a power supply voltage and a reference voltage of a power supply path that supplies power from the main power supply to the semiconductor device. The low impedance circuit is connected between the capacitor and the main power supply, one end is connected to the power supply voltage and the reference voltage of the power supply path, and the other end is a pair of open wirings, so-called The circuit includes a stub wiring and has a lower impedance than the power supply path. As a result, by providing a low impedance circuit in the power supply path through which the noise current flows, it is possible to inject an antiphase current that cancels the noise current from the low impedance circuit to the power supply path.

  In this configuration, each of the pair of stub wirings is formed to have a length that is ¼ of the wavelength in the mounting substrate of the operating frequency of the semiconductor device, or 1/1 that is an integral multiple of the operating frequency of the semiconductor device. It is formed to have a length of 4 wavelengths, or a combination of these. As a result, the anti-phase current injected from the stub wiring into the power supply system generates only a frequency component that is an odd multiple of the frequency at which the stub wiring length is exactly ¼ wavelength, thereby reducing noise current and reducing EMI. A sufficient effect can be obtained.

  In addition, the low impedance circuit is configured by sandwiching a dielectric having a thickness of 10 μm to 0.2 μm between a pair of stub wirings, and is formed in the mounting substrate or formed as a mounting component on the mounting substrate. is there. As a result, even when formed in the mounting substrate, the size of the mounting substrate is not affected, and when it is formed as a mounting component, it can correspond to various devices as individual components.

  Note that the lower the impedance of this low impedance circuit, the greater the noise current that flows into the circuit, so the effect of canceling out noise increases.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  (1) A circuit having a lower impedance than the power supply path between the capacitor and the main power supply, one end of the circuit being connected to the power supply voltage and the reference voltage of the power supply path, and the other end being in an open state By connecting the low-impedance circuit to the power supply path, it is possible to inject an antiphase current from the stub wiring into the power supply path, thereby reducing noise current and reducing EMI. An effect can be obtained.

  (2) In particular, by combining a plurality of low impedance circuits in which the stub wiring length (1/4 wavelength) is combined with an operating frequency that is an integral multiple of the basic operating frequency of a microcomputer, Since even-order harmonics can be blocked, an EMI reduction effect can be sufficiently obtained.

  (3) Especially in communication devices using portable devices, Bluetooth, etc., noise current is prevented by using a low impedance circuit in which the stub wiring length (1/4 wavelength) is matched to the communication frequency of each device. A sufficient EMI reduction effect can be obtained.

  (4) Especially when a low-impedance circuit is formed on a mounting board, it does not affect the size of the mounting board, and when it is formed as a mounting part, it can be used as an individual part for various devices. It becomes.

  (5) Since power supply decoupling for a semiconductor device such as a microcomputer having no wasteful power consumption and high noise reduction effect up to a high frequency can be realized, a system with low noise and low power consumption can be realized. .

1 is a schematic circuit diagram showing a power supply system for a semiconductor device mounted on a mounting substrate in a system according to an embodiment of the present invention. It is a conceptual diagram which shows the connection of a filter and noise cancellation by it in the system of one embodiment of this invention. It is a pattern figure which shows the strip | belt pattern of a stub wiring in the filter in the system of one embodiment of this invention. It is a pattern figure which shows the modification of the band pattern of a stub wiring in the filter in the system of one embodiment of this invention. FIG. 10 is a pattern diagram showing another modification of the band pattern of the stub wiring in the filter in the system according to the embodiment of the present invention. It is a pattern figure which shows the spiral pattern of a stub wiring in the filter in the system of one embodiment of this invention. FIG. 5 is a pattern diagram showing a spelling pattern of stub wiring in the filter in the system according to the embodiment of the present invention. In the system of one embodiment of the present invention, it is a sectional view showing a mounting board. 1 is a layout diagram showing a signal wiring layer (surface layer) of a mounting board in a system according to an embodiment of the present invention. FIG. 3 is a layout diagram illustrating a stub wiring layer of a mounting board in the system according to the embodiment of the present invention. In the system of one embodiment of the present invention, it is a layout diagram showing a reference voltage layer of a mounting board. FIG. 3 is a layout diagram illustrating a power supply voltage layer of a mounting board in the system according to the embodiment of the present invention. In the system of one embodiment of the present invention, it is a layout diagram showing a modification of the stub wiring layer of the mounting board. 1 is a perspective view showing a mounting component in a system according to an embodiment of the present invention. In the system of one embodiment of the present invention, it is a bottom view showing a mounting component. It is explanatory drawing which shows the stub wiring of mounting components in the system of one embodiment of this invention. It is a perspective view which shows another mounting component in the system of one embodiment of this invention. In the system of one embodiment of this invention, it is sectional drawing which shows another mounting component. It is explanatory drawing which shows the stub wiring of another mounting component in the system of one embodiment of this invention. It is explanatory drawing which shows the characteristic evaluation by the comparison of a dielectric material thickness in the filter in the system of one embodiment of this invention. It is explanatory drawing which shows the dependence evaluation of a pattern in the filter in the system of one embodiment of this invention. It is a pattern figure which shows the combination pattern of stub wiring in the filter in the system of one embodiment of this invention. It is explanatory drawing which shows the combination evaluation of several stub wiring in the filter in the system of one embodiment of this invention. It is explanatory drawing which shows the combination of several stub wiring in the filter in the system of one embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted.

  An example of the configuration of a system according to an embodiment of the present invention will be described with reference to FIG. FIG. 1 is a schematic circuit diagram of a power supply system for a semiconductor device mounted on a mounting board in the system of the present embodiment.

  The system according to the present embodiment is not particularly limited. For example, as an example, a microcomputer LSI package (semiconductor device) 1 and a power source for supplying power from the main power source 2 to the LSI package 1 are provided. A bypass capacitor (capacitor) 3 connected between the voltage Vcc and the reference voltage Vss, and connected between the bypass capacitor 3 and the main power supply 2, one end of which is connected to the power supply voltage Vcc and the reference voltage Vss of the power supply path. The other end includes a pair of stub wirings 4 that are open and the other end includes a filter 5 that is a circuit having a lower impedance than the power supply path. The LSI package 1, the bypass capacitor 3, the filter 5, and the like are mounted. It is configured on the board.

  In this system, the power supply voltage Vcc and the reference voltage Vss to the connection point between the main power supply 2 and the bypass capacitor 3 and the power supply voltage Vcc and the reference voltage Vss to the bypass capacitor 3 and the LSI package 1 have inductances respectively. With ingredients. Each output path from the LSI package 1 has a load capacitance component at the next stage.

  The LSI package 1 includes a chip 6, and a plurality of modules 7 constituting a microcomputer are formed on the chip 6. Each module 7 is supplied with a power supply voltage Vcc and a reference voltage Vss from a power supply path on the mounting substrate. On the chip 6, a CPG 9 that generates a reference clock signal by using an oscillation signal from a crystal oscillator 8 provided outside the LSI package 1 as an input is formed. To be supplied. Further, a buffer circuit 11 that outputs a signal to the outside of the LSI package 1 is formed on the chip 6.

  In the LSI package 1, the power supply paths of the internal power supply voltage Vcc and the reference voltage Vss also have inductance components as in the system.

  The bypass capacitor 3 is provided in the vicinity of the LSI package 1 and is connected between the power supply voltage Vcc of the power supply path on the mounting substrate and the reference voltage Vss.

  The filter 5 is provided closer to the main power supply 2 than the bypass capacitor 3, and is connected to the power supply voltage Vcc and the reference voltage Vss of the power supply path on the mounting substrate. The filter 5 includes a pair of stub wirings 4 sandwiching a dielectric, and one end of the pair of stub wirings 4 is inserted and connected in the middle of wiring between the power supply voltage Vcc and the reference voltage Vss in the power supply path, and the other end Is open. In this filter 5, an ultrathin dielectric (thickness of about 10 μm to 0.2 μm) is used in order to realize particularly low impedance. Although details of the shape of the stub wiring 4 will be described later, here, a spelling pattern is illustrated.

  Next, an example of the concept of filter connection and noise cancellation by the filter in the system of the present embodiment will be described with reference to FIG. FIG. 2 is a conceptual diagram of filter connection and noise cancellation.

  In FIG. 2, the filter 5 by the stub wiring 4 of the band pattern is shown as an example. As described above, one end of the band pattern is connected to the power supply voltage Vcc and the reference voltage Vss of the power supply path via the port 1 and the port 2, respectively, and the other end is in an open state. Of ¼ wavelength (λ / 4).

  In the system of the present embodiment, when noise is generated from the LSI package 1, this noise current is partially absorbed by the bypass capacitor 3 and flows to the filter 5 ahead of the capacitor. The noise current flowing through the filter 5 is reflected at the other end of the stub wiring 4 in the open state, returns to the branch point at one end, and merges with the subsequent noise current. Thereby, the reflected wave from the stub wiring 4 acts at the branch point of the stub wiring 4 so as to cancel the noise current after λ / 2 from the LSI package 1. That is, the noise current from the LSI package 1 can be prevented from flowing through the power supply system from the main power supply 2. This effect is effective for all harmonics that are odd multiples of the fundamental frequency.

  Next, an example of the stub wiring of the filter will be described with reference to FIGS. FIG. 3 shows a band pattern, FIGS. 4 and 5 show variations of the band pattern, FIG. 6 shows a spiral pattern, and FIG. 7 shows a pattern diagram of a zigzag pattern. As shown in FIG. 2, one end of each filter is connected to the power supply voltage Vcc and the reference voltage Vss of the power supply path via the port 1 and the port 2, respectively.

  As shown in FIG. 3, in the filter 5a having a stub wiring 4a having a strip pattern, the stub wiring 4a is formed in a strip shape with a predetermined width and a predetermined length between the ports 1 and 2 of the filter 5a. This example can correspond to a frequency of 2.4 GHz such as Bluetooth.

  Further, as shown in FIG. 4, the filter based on the band pattern is a stub wiring 4b having a convex center at the tip, so that the filter 5b can increase the effective bandwidth. Alternatively, as shown in FIG. 5, the effective bandwidth can be similarly increased in the filter 5c in which the tip of the stub wiring 5c is stepped. In this manner, by deforming the tip of the stub wiring 4, it is possible to realize the filter 5 that can obtain an effect with a wide bandwidth.

  As shown in FIG. 6, in the filter 5d in which the stub wiring 4d has a spiral pattern, the stub wiring 4d is spirally formed with a predetermined width and a predetermined length between the ports 1 and 2 of the filter 5d. . With this shape, the area can be reduced by bending while maintaining the distance to the tip. Note that the width of the stub wiring 4d can be narrowed within a range in which the reflected wave is attenuated (resistance loss) and does not lose its effect.

  As shown in FIG. 7, the filter 5e with the stub wiring 4e having a spiral pattern is formed in a stub pattern with a predetermined width and a predetermined length between the ports 1 and 2 of the filter 5e. Similarly to the spiral pattern, the area can be reduced by bending while maintaining the distance to the tip.

  Next, an example of forming a filter in a mounting substrate will be described with reference to FIGS. 8 is a cross-sectional view of the mounting substrate, FIGS. 9 to 12 are layout diagrams of each layer of the mounting substrate, FIG. 9 is a signal wiring layer (surface layer), FIG. 10 is a stub wiring layer, and FIG. 11 is a reference voltage layer. 12 shows a power supply voltage layer, and FIG. 13 shows a modification of the stub wiring layer.

  As shown in FIG. 8, the mounting substrate 20 includes a signal wiring layer (surface layer) 21, an insulating layer 22, a stub wiring layer 23, a dielectric layer 24, a reference voltage layer 25, an insulating layer 26, a power supply voltage layer 27, an insulating layer. It is formed in a multilayer structure composed of layers (back layer) 28. The filter 5 is formed inside the mounting substrate 20, and the pair of stub wires 4 has a solid pattern (a plain shape) of a stub wiring layer 23 in which the dielectric layer 24 is laminated on the upper layer and a reference voltage layer 25 in which the dielectric layer 24 is laminated on the lower layer. The pattern is sandwiched between wirings that share a part of the pattern. For example, when aluminum is used for the stub wiring layer 23 and the reference voltage layer 25, the dielectric layer 24 uses a very thin aluminum oxide film of about 10 μm to 0.2 μm, preferably about 1 μm or less and about 0.2 μm. It is done.

  As shown in FIG. 9, in the signal wiring layer 21 of the mounting substrate 20, wiring patterns 32a to 32d of signals, power supply voltage, and reference voltage are routed from the pads 31a to 31d on which the LSI package 1 is mounted. . The wiring pattern 32b of the power supply voltage Vcc is routed from the power supply voltage pad 31b to one through hole 33a of the pair for power supply voltage, and the other through hole 33b paired with the one through hole 33a is connected to the power supply voltage Vcc. Connected to the voltage layer 27. The wiring pattern 32c of the reference voltage Vss is routed from the reference voltage pad 31c to the through hole 33c for the reference voltage.

  As shown in FIG. 10, the stub wiring layer 23 is formed as a stub wiring 4 in which a wiring pattern connected to a pair of through holes 33 a and 33 b for power supply voltage is a folded pattern (an example corresponding to FIG. 7).

  As shown in FIG. 11, the reference voltage layer 25 is formed in a solid pattern connected to the through hole 33c for the reference voltage. A part of the solid pattern is shared as the stub wiring 4, and the filter 5 is configured by sandwiching the dielectric layer 24 in pairs with the stub wiring 4 of the stub wiring layer 23. The pair of through holes 33a and 33b for the power supply voltage are not connected to the solid pattern.

  As shown in FIG. 12, the power supply voltage layer 27 is formed in a solid pattern connected to the other through hole 33b in the pair of power supply voltages. This solid pattern is connected to the main power supply 2. Of the pair for the power supply voltage, one through hole 33a and the reference voltage through hole 33c are not connected to the solid pattern.

  In addition, when the stub wiring layer 23 cannot be formed in a spelled pattern as shown in FIG. 10 due to the layout of the mounting substrate 20, for example, as shown in FIG. It is also possible to bend and route the stub wiring 4f.

  Next, an example of forming a filter as a mounting component on a mounting board will be described with reference to FIGS. 14 to 16 show mounting parts, FIG. 14 is a perspective view, FIG. 15 is a bottom view, FIG. 16 is an explanatory view of stub wiring, and FIGS. 17 to 19 show other mounting parts, respectively. 17 is a perspective view, FIG. 18 is a sectional view, and FIG. 19 is an explanatory diagram of stub wiring.

  As shown in FIGS. 14 and 15, the mounting component 40 is formed in a quadrangular prism shape, and terminals 41 and 42 for the power supply voltages Vcc1 and Vcc2 and terminals 43 and 44 for the reference voltages Vss1 and Vss2 are provided on the bottom surface. . Among the terminals 41 to 44, the terminals 41 and 43 of the power supply voltage Vcc1 and the reference voltage Vss1 are on the LSI package 1 side, and the terminals 42 and 44 of the power supply voltage Vcc2 and the reference voltage Vss2 are on the main power supply 2 side. Connected.

  As shown in FIG. 16, a stub wiring 4g having a strip pattern sandwiching a dielectric is housed inside the rectangular columnar mounting component 40 in a roll shape around the open end. Moreover, it can also be built in a zigzag shape instead of a scroll shape. For example, the length of the stub wiring 4g is about 280 mm when adjusted to 60 MHz, and it cannot be reduced unless it is made thin including the base material. Is possible. For the purpose (1.5 GHz) of preventing noise from entering the mobile phone use band, an effect can be obtained with a length of about 11 mm. In the case of a stub wiring having a short total length, the reflected wave is difficult to attenuate, so the width of the stub wiring may be narrowed. The part size can be reduced by reducing the overall length and width.

  Further, as shown in FIG. 17, another mounting component 50 is formed in a cylindrical shape, provided with leads 51 and 52 for power supply voltages Vcc1 and Vcc2 and leads 53 and 54 for reference voltages Vss1 and Vss2 on the bottom surface. Leads 51 and 53 of power supply voltage Vcc1 and reference voltage Vss1 are connected to the LSI package 1 side, and leads 52 and 54 of power supply voltage Vcc2 and reference voltage Vss2 are connected to the main power supply 2 side.

  As shown in FIGS. 18 and 19, a stub wiring 4 h having a zigzag pattern with a dielectric sandwiched between the cylindrical mounting parts 50 is wound around an insulating sheet (not shown) with an insulating material as a core. Built in shape. For example, the stub wiring 4h has a length of about 29 mm and a width of about 1.8 mm after 10 turns. In this case, the outer shape of the mounting component 50 can be about 1 mm in diameter and about 2 mm in length.

  Regarding the filter 5 configured as described above, typical application fields and methods of configuring the filter 5 are summarized as follows.

  For example, in an in-vehicle device, when the operating frequency of the microcomputer is 40 MHz, 80 MHz, etc., the basic frequency of the filter 5 is set to the operating frequency of the microcomputer and is built in the mounting board 20 or mounted components 40, 50. Can be configured as In the case of a portable device, when the operating frequency of the microcomputer is 160 MHz or the like, the basic frequency of the filter 5 can be set to the communication frequency of the device and can be configured as small mounting components 40 and 50. Furthermore, Bluetooth can be used in the same manner as the portable device.

  Next, an example of simulation results of characteristic evaluation and dependency evaluation of each stub wiring in the filter will be described with reference to FIGS. 20 is a characteristic evaluation by comparing dielectric thicknesses, FIG. 21 is a pattern dependency evaluation, FIG. 22 is a combination pattern of stub lines, FIG. 23 is a combination evaluation of a plurality of stub lines, and FIG. 24 is a combination of a plurality of stub lines. Respectively.

  In the characteristic evaluation by comparing the dielectric thickness, the thickness of the dielectric was set to 400 μm and 0.2 μm for the stub wiring 4e of the zigzag pattern (stub wiring length is 15 mm × 15) shown in FIG. It is the simulation result which measured the attenuation value (Magnitude (dB)) with respect to the change of the frequency (Frequency (MHz)) in the case. As shown in FIG. 20, the transmission characteristics between the ports of the filter 5 are excellent attenuation characteristics that cannot be obtained when the dielectric thickness = 0.2 μm and the normal dielectric thickness = 400 μm.

  For example, when the dielectric thickness is 0.2 μm, the dependence of the pattern on the stub wiring 4d of the spiral pattern shown in FIG. 6 and the stub wiring 4e of the zigzag pattern shown in FIG. It is the simulation result which measured the attenuation value. As shown in FIG. 21, the same characteristics can be obtained in both the spiral pattern and the spelled pattern.

  The evaluation of the combination of a plurality of stub wirings is the stub wiring 4e of the zigzag pattern shown in FIG. 7, and the stub of the zigzag pattern based on the zigzag pattern shown in FIG. 7 and a wiring length of 1/2 of this zigzag pattern. It is the simulation result which measured the attenuation value with respect to the change of a frequency about the combination pattern (FIG. 22) with the wiring 4i. As shown in FIG. 23, the spelling pattern with integer multiples provides excellent attenuation characteristics for odd-order harmonics such as first, third, fifth, seventh,... Then, it is possible to obtain excellent attenuation characteristics with respect to harmonics such as first, second, third, fifth, sixth, seventh,.

  From such a result, by combining a zigzag folding pattern with a wiring length of 1/3 of the zigzag folding pattern and a zigzag folding pattern with a wiring length of 1/4, as shown in FIG. In the combination with the zigzag folding pattern 2 with the / 2 wiring length, the other than the 4nth order, and in the combination with the zigzag folding pattern 1, 1/2 and 1/3 wiring length with the zigzag folding patterns 2 and 3, the other than the 8n order zigzag All combinations of harmonics other than the 16nth order can be prevented in the combination of the patterns 1, 3, 4 and the zigzag patterns 2, 3 and 4 due to the wiring lengths.

  As described above, according to the system of the present embodiment, the connection of branching the stub wiring 4 of the filter 5 from the power supply path, the thinning of the dielectric material sandwiched between the stub wirings 4 (low dielectric constant), and the applicable equipment are supported. Therefore, the following effects can be obtained.

  (1) The noise current is offset from the stub wiring 4 to the power supply system from the main power supply 2 by creating the filter 5 by the stub wiring 4 that has a quarter wavelength of the operating frequency in the power supply path through which the noise current flows. The reverse phase current can be injected. This antiphase current generates only a frequency component whose stub wiring length is an odd multiple of a quarter wavelength. As a result, the noise current is reduced, and an EMI reduction effect can be obtained.

  (2) As a result of simulation, when the stub wiring 4 is manufactured with a microstrip line structure (including a structure with a narrow GND width) having a very thin dielectric (about 1 μm), the ratio to the characteristic impedance of the power feeding system can be increased. For this reason, most of the noise current flowing through the power feeding system flows into the stub wiring 4, which is totally reflected at the other end of the stub wiring 4 in the open state and can cancel the noise current at the inflow point.

  (3) The noise of the microcomputer has a peak in the harmonics of the operating frequency, and the main peak is effectively reduced even in the filter 5 that is effective only for an odd multiple of the design frequency like the filter 5 including the stub wiring 4. be able to. Furthermore, if it is desired to eliminate even-numbered peaks, it can be realized by combining a filter 5 composed of a plurality of stub wirings 4 whose wiring length is adjusted to an integral multiple of the operating frequency.

  (4) Even in communication devices to which portable devices, Bluetooth, etc. are applied, the noise current can be effectively reduced by using the filter 5 in which the stub wiring length (1/4 wavelength) is matched to the communication frequency of each device. Can do.

  (5) Since the filter 5 can be formed in the mounting substrate 20 by sandwiching an extremely thin dielectric layer 24 such as an oxide film between the stub wiring layer 23 and the reference voltage layer 25, the thickness and size of the mounting substrate 20 A dimensional increase can be suppressed.

  (6) When the filter 5 is formed as the mounting components 40 and 50 on the mounting substrate 20, the filter 5 can be individually manufactured based on the frequency characteristics of various devices and the like, and therefore can be adapted to various devices.

  (7) There is no wasteful power consumption (loss) (DC resistance 0Ω), and power supply decoupling for a semiconductor device having a high noise reduction effect up to a high frequency (covering a communication frequency band of a mobile phone) can be realized. As a result, a system with low noise and low power consumption can be realized. In addition, since the filter can be downsized as the operating frequency increases, the cost merit over the conventional technique increases.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the above-described embodiment, the microcomputer has been described as an example. However, the present invention can be applied to all LSI products that are strongly required to have low EMI, and in particular, an in-vehicle microcomputer, a processor for portable devices, and the like are mounted. It can be favorably applied to a power supply system of a circuit board.

  Further, the present invention can improve the attenuation effect and improve the loss by using an extremely thin dielectric for the high-frequency circuit (non-power supply system). This filter can also be applied as a noise countermeasure component (power supply system, non-power supply system). Further, it can be applied to countermeasures against specific noise peaks (high frequency) in combination with conventional filters (chip beads or T-type filters).

  Furthermore, in the present invention, the dielectric film is not limited to the aluminum oxide film, and may be a dielectric film such as an organic insulator as long as an extremely thin dielectric film is formed. .

DESCRIPTION OF SYMBOLS 1 LSI package 2 Core power supply 3 Bypass capacitor 4, 4a, 4b, 4c, 4d, 4e, 4f, 4g, 4h, 4i Stub wiring 5, 5a, 5b, 5c, 5d, 5e Filter 6 Chip 7 Module 8 Crystal oscillator 9 CPG
DESCRIPTION OF SYMBOLS 10 Input buffer 11 Output buffer 20 Mounting board 21 Signal wiring layer 22,26,28 Insulating layer 23 Stub wiring layer 24 Dielectric layer 25 Reference voltage layer 27 Power supply voltage layer 31a-31d Pad 32a-32d Wiring pattern 33a-33c Through hole 40 Mounting parts 41 to 44 Terminal 50 Mounting parts 51 to 54 Lead

Claims (2)

  1. A semiconductor device;
    A wiring for supplying a power supply voltage and a wiring for supplying a reference voltage in a power supply path for supplying power from a main power supply to the semiconductor device;
    One end is connected to the wiring to which the power supply voltage is supplied and the other end is in an open state, and the other end is connected to the wiring to which the reference voltage is supplied and the other end is a second wiring in an open state And a stub wiring including
    A mounting substrate for mounting the semiconductor device and the stub wiring;
    The first wiring is provided in a first layer in the mounting substrate;
    The second wiring is provided in the second layer so as to be paired with and overlap the first wiring in the mounting substrate,
    The width of the first wiring of the first layer is wider than the width of the wiring to which the power supply voltage is supplied,
    The width of the second wiring of the second layer is wider than the width of the wiring to which the reference voltage is supplied,
    The first layer and the second layer comprise a capacitor with a dielectric layer in between.
  2. The system of claim 1, wherein
    A system comprising: a wiring for supplying a power supply voltage to the surface of the mounting substrate; and a wiring for supplying a reference voltage.
JP2011022531A 2011-02-04 2011-02-04 System Expired - Fee Related JP5357907B2 (en)

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Publication number Priority date Publication date Assignee Title
WO2014162685A1 (en) * 2013-04-05 2014-10-09 Canon Kabushiki Kaisha Printed circuit board
US9219299B2 (en) 2012-08-27 2015-12-22 Nec Tokin Corporation Resonator, multilayer board and electronic device

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JPH0165511U (en) * 1987-10-21 1989-04-26
JPH06176838A (en) * 1992-12-07 1994-06-24 Canon Inc Wiring board and ic package
JPH0897663A (en) * 1994-09-29 1996-04-12 Toshiba Corp Semiconductor filter circuit
JPH09238001A (en) * 1996-03-01 1997-09-09 Mitsubishi Electric Corp High frequency amplifier
JPH09260522A (en) * 1996-03-21 1997-10-03 Toshiba Corp Semiconductor device
JP2001119110A (en) * 1999-10-15 2001-04-27 Nec Corp Printed board

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JPH0165511U (en) * 1987-10-21 1989-04-26
JPH06176838A (en) * 1992-12-07 1994-06-24 Canon Inc Wiring board and ic package
JPH0897663A (en) * 1994-09-29 1996-04-12 Toshiba Corp Semiconductor filter circuit
JPH09238001A (en) * 1996-03-01 1997-09-09 Mitsubishi Electric Corp High frequency amplifier
JPH09260522A (en) * 1996-03-21 1997-10-03 Toshiba Corp Semiconductor device
JP2001119110A (en) * 1999-10-15 2001-04-27 Nec Corp Printed board

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9219299B2 (en) 2012-08-27 2015-12-22 Nec Tokin Corporation Resonator, multilayer board and electronic device
WO2014162685A1 (en) * 2013-04-05 2014-10-09 Canon Kabushiki Kaisha Printed circuit board
US10111317B2 (en) 2013-04-05 2018-10-23 Canon Kabushiki Kaisha Printed circuit board for transmitting digital signals

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