JP2010226126A - Solid-state image sensor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a back-reflection solid-state image sensor capable of preventing color mixture, and furthermore controlling a reduction of aperture ratio, a degradation of sensitivity, etc. of a photoelectric converter. <P>SOLUTION: The solid-state image sensor includes: photoelectric converters 34 formed in a semiconductor substrate 32; a plurality of pixels 35 made up of means for reading signal charges of the photoelectric converters 34; a light irradiated face which is irradiated with light from a backside of the semiconductor substrate 32; and light-shielding films 45 positioned between neighboring pixels in such a fashion as to be embedded inward of the backside of the semiconductor substrate 32. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a back-illuminated solid-state imaging device.

  In a conventional solid-state imaging device such as a CMOS sensor or a CCD sensor, a photoelectric conversion unit serving as a pixel is formed on a semiconductor substrate, and a color is formed on the main surface of the substrate on which a semiconductor pattern such as a means for reading signal charges of the photoelectric conversion unit is formed. The most common method is to form a filter and an on-top lens so that light is incident from the substrate surface side. However, in this surface irradiation type CMOS solid-state imaging device, for example, a wiring layer, a light-shielding layer, or a gate electrode is disposed on the surface of the semiconductor wafer, so that it is a photoelectric conversion unit depending on the pattern area other than the photoelectric conversion unit. There has been a problem that the aperture ratio of the photodiode is lowered, and the amount of charge handled and sensitivity are lowered. In addition, color mixing occurs when incident light irregularly reflected by a wiring layer, a light shielding layer, or a gate electrode enters an adjacent pixel.

  In recent years, in order to solve these problems, as disclosed in Patent Document 1, a color filter and an on-chip lens are formed on the back surface of the semiconductor substrate opposite to the main surface on which the pixel pattern is formed, that is, on the back surface of the silicon wafer. Thus, a back-illuminated solid-state imaging device that makes light incident from the back surface has been proposed.

FIG. 10 shows an example of a back-illuminated CMOS solid-state imaging device in which a photodiode serving as a photoelectric conversion unit is embedded in a conventional silicon single crystal substrate. This figure shows the cross-sectional structure of the main part.
This back-illuminated CMOS solid-state imaging device 1 is formed with an element isolation region 3 for partitioning each pixel on the surface of a first conductivity type, eg, p-type silicon semiconductor substrate 2, and a photoelectric conversion unit and A unit pixel cell 5 is formed by forming a photodiode 4 and a plurality of MOS transistors Tr for reading signal charges of the photodiode, for example, four MOS transistors of a read transistor, a reset transistor, an amplifier transistor, and a vertical selection transistor. . A large number of the unit pixel cells 5 are arranged in a two-dimensional matrix. The photodiode 4 is formed so that the photodiodes 4R, 4G, and 4B corresponding to each of red, green, and blue are sequentially arranged.

The photodiode 4 is formed by an n-type semiconductor region 6 of the second conductivity type formed by ion implantation over a predetermined depth from the substrate surface of the p-type semiconductor substrate 2. The MOS transistor Tr or the like is formed by an n ⁺ source / drain region 8 formed on the surface side of the p-type semiconductor substrate 2 and a gate electrode 9 formed through a gate insulating film. On the surface side of the p-type semiconductor region 2, a multilayer wiring 10 having a required pattern is formed via an interlayer insulating film 9.

Generally, after these multilayer wiring layers 10 are formed, a first passivation film 12 is formed on the surface. Next, for example, a support substrate 25 made of, for example, a silicon wafer is bonded onto the first passivation film 12 on the substrate surface side, and then polished and removed until the back surface side of the p-type semiconductor substrate 2 becomes 10 μm or less. Next, a p ⁺ semiconductor region (so-called accumulation layer) 7 is formed on the back side of the p-type semiconductor substrate 2 in contact with the n-type semiconductor region 6. A p ⁺ semiconductor region (so-called accumulation layer) 20 is also formed on the surface side of the n-type semiconductor region 6 constituting the photodiode 4. The photodiode 4 is formed as a buried photodiode having a HAD (Hole Accumulation Diode) structure composed of the p ⁺ semiconductor regions 7 and 20, the n-type semiconductor region 26 and the p-type semiconductor substrate 2.

  A silicon oxide film 13 and a second passivation film (for example, a plasma silicon nitride film) 14 are sequentially formed immediately above the embedded photodiode 4 on the back side of the substrate, and a light shielding film (for preventing color mixture between pixels) on the silicon oxide film 13 and the second passivation film (for example, plasma silicon nitride film) 14. For example, an Al film) 15 is formed. Further, resin thin films such as the transparent flattening film 16, the color filters 17R, 17G, and 17B and the on-chip lens 18 are formed. Reference numeral 19 denotes an infrared cut filter disposed on the upper surface of the package containing the solid-state imaging device 1.

  In the backside illumination type CMOS solid-state imaging device 1 described above, the infrared ray 21 of the incident light is cut by the infrared cut filter 19 and is prevented from entering the photodiode 4 side. The red light beam 22, the green light beam 23, and the blue light beam 24 transmitted through the infrared cut filter 19 are incident on the corresponding photodiodes 4R, 4G, and 4B corresponding to red, green, and blue, respectively. Each color light beam 22, 23, 24 reflected by the light shielding film 15 is not incident on the photodiode 4 side.

Japanese Patent Laid-Open No. 2003-31785

  By the way, in the above-described back-illuminated solid-state imaging device 1, color mixing tends to occur. In general, the long wavelength red light 22 has a small absorption coefficient in single crystal silicon, and therefore color mixing is particularly likely to occur. That is, the red light beam L1 incident obliquely with respect to the horizontal plane of the photodiode in the periphery of the imaging region is transmitted through the single crystal silicon, and the photodiodes 4G and 4B (shown in the drawing) of the adjacent pixels (green pixel, blue pixel). In the example, it directly enters the photodiode 4B) and causes color mixing. In order to shield the incident light beam L1 from the oblique direction, a light shielding film 15 is required between the pixels. However, in order to make the unit pixel cell 5 finer and more integrated, the photodiode 4 between adjacent pixels is used. If the distance is too close, or if the width W1 of the light shielding film 15 between the pixels is too small, it is difficult to prevent color mixing. This results in a decrease in the amount of charge handled due to a decrease in the area of the embedded photodiode 4 or a decrease in light utilization efficiency due to a decrease in the pixel aperture ratio. Further, the incident light beam L2 reflected by the side surface of the light shielding film 15 disposed between the pixels enters the photodiodes 4B and 4G (photodiode 4G in the illustrated example) of the adjacent pixels [blue pixel and green pixel] to generate color mixing. There was a drowning to do.

  In view of the above-described points, the present invention provides a back-illuminated solid-state imaging device capable of preventing color mixing and further suppressing a decrease in aperture ratio and a decrease in sensitivity of a photoelectric conversion unit.

  A solid-state imaging device according to the present invention includes a photoelectric conversion unit formed on a semiconductor substrate, a plurality of pixels including means for reading out signal charges of the photoelectric conversion unit, a light irradiation surface that emits light from the back surface of the semiconductor substrate, and an adjacent surface. And a light-shielding film embedded inside the back surface of the semiconductor substrate.

  According to the backside illumination type solid-state imaging device according to the present invention, the light-shielding film is formed close to the photoelectric conversion unit because the light-shielding film is located between adjacent pixels and embedded inside the back surface of the semiconductor substrate. In particular, in the peripheral pixels of the imaging region, light incident from an oblique direction is prevented from entering the adjacent pixels, and color mixing can be avoided. A decrease in the aperture ratio of the photoelectric conversion unit, a decrease in sensitivity, and the like can be suppressed.

  Conventionally, it is difficult to prevent color mixture between pixels as the size of the unit pixel cell is miniaturized. However, according to the present invention, ideal color mixture prevention can be realized even for a fine pixel without reducing the pixel aperture ratio.

It is sectional drawing of the principal part which shows one Embodiment of the backside illumination type solid-state image sensor concerning this invention. It is a manufacturing process figure (the 1) which shows one Embodiment of the manufacturing method of the backside illumination type solid-state image sensor which concerns on this invention. It is a manufacturing process figure (the 2) which shows one Embodiment of the manufacturing method of the backside illumination type solid-state image sensor which concerns on this invention. It is a manufacturing process figure (the 3) which shows one Embodiment of the manufacturing method of the backside illumination type solid-state image sensor which concerns on this invention. It is a manufacturing process figure (the 4) which shows one Embodiment of the manufacturing method of the backside illumination type solid-state image sensor which concerns on this invention. It is a manufacturing process figure (the 5) which shows one Embodiment of the manufacturing method of the backside illumination type solid-state image sensor which concerns on this invention. It is a manufacturing process figure (the 6) which shows one Embodiment of the manufacturing method of the backside illumination type solid-state image sensor which concerns on this invention. It is a manufacturing process figure (the 7) which shows one Embodiment of the manufacturing method of the backside illumination type solid-state image sensor which concerns on this invention. It is a manufacturing process figure (the 8) which shows one Embodiment of the manufacturing method of the backside illumination type solid-state image sensor which concerns on this invention. It is sectional drawing which shows an example of the conventional backside illumination type solid-state image sensor.

  Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment in which a back-illuminated solid-state imaging device according to the present invention is applied to a CMOS solid-state imaging device. This figure shows a cross-sectional structure of the main part of the imaging region.
The back-illuminated CMOS solid-state imaging device 31 according to the present embodiment partitions each pixel on the surface (one main surface) of a first conductivity type, for example, a p-type silicon semiconductor substrate, that is, a so-called single crystal silicon wafer 32. Device isolation regions 33 and photodiodes 34 serving as photoelectric conversion portions in each partition region, and a plurality of MOS transistors Tr for reading signal charges of the photodiodes 34, for example, read transistors, reset transistors, amplifier transistors, and vertical selections A unit pixel cell 35 is formed by forming four MOS transistors. Many unit pixel cells 35 are arranged in a two-dimensional matrix. The photodiode 34 is formed such that photodiodes 34R, 34G, and 34B corresponding to red, green, and blue are sequentially arranged.

The photodiode 34 is formed by, for example, an n-type semiconductor region 36 of the second conductivity type formed by ion implantation from the substrate surface of the p-type semiconductor substrate 32 over a predetermined depth. The MOS transistor Tr is formed by an n ⁺ source / drain region 38 formed on the surface side of the p-type semiconductor substrate 32 and a gate electrode 39 formed through a gate insulating film. On the surface side of the p-type semiconductor region 32, a multilayer wiring 40 having a required pattern is formed via an interlayer insulating film 300. Further, a first passivation film 42 made of, for example, a plasma silicon nitride film is formed on the uppermost interlayer insulating film 300.

  On the other hand, it is necessary that the n-type semiconductor region 36 of the photodiode 34 of each pixel is exposed on the back surface (the other main surface) of the single crystal silicon wafer 32 without thinly polishing and removing the entire wafer as in the prior art. An opening 52 having a depth of 5 mm is formed. The opening 52 is formed with a distance m from the bottom surface of the opening 52 to the wafer surface (one main surface) leaving the depth of the photodiode 34, for example, a thickness of 5 μm to 10 μm. Further, the depth D of the opening 52 is such that the red light beam 62 having the longest wavelength among visible light in the region where the openings 52 between the openings 52 (so-called pixels) are not formed, that is, the non-opening region 53. It is set to a depth that can secure a sufficient thickness (distance) F that does not reach 34.

An accumulation layer of the first conductivity type in contact with the entire back surface of the single crystal silicon wafer 32 including the exposed surface of the n-type semiconductor region 36 and the inner wall surface (that is, the inner surface) of the opening 52, in this example, a p ⁺ semiconductor. Region 37 is formed. A p ⁺ semiconductor region 46 serving as an accumulation layer is also formed on the surface side of the n-type semiconductor region 6 constituting the photodiode 4. The photodiode 34 is formed as a buried photodiode having an HAD structure composed of the p ⁺ semiconductor regions 37 and 46, the n-type semiconductor region 36 and the p-type semiconductor substrate 32. Further, on the back surface of the single crystal silicon wafer 32, for example, a silicon oxide film 43 of an insulating film is formed on the entire surface including the bottom surface of the opening 52, the inner wall surface of the side surface, and the top surface of the non-opening region 53. Further, a reflection film 45 serving as a light shielding film is formed at least on the inner wall surface except for the bottom surface of the opening 52. The reflective film 45 is preferably a metal film, for example, an Al film. A transparent insulating film 54 is embedded in the opening 52. The back surface of the wafer is flattened by the transparent insulating film 54. As shown in FIG. 1, the reflective film 45 serving as a light shielding film is formed so as to be embedded between the back surface of the semiconductor substrate 32 and located between adjacent pixels.

  A second passivation film 44 made of, for example, a plasma silicon nitride film is formed on the flattened wafer back surface, and resin thin films such as color filters 47R, 47G, 47B and an on-chip lens 48 are formed on the second passivation film 44 for each pixel. It is formed. Reference numeral 49 denotes an infrared cut filter disposed on the upper surface of the package containing the solid-state image pickup device 31.

  The peripheral circuit of the CMOS solid-state image sensor is composed of CMOS transistors. In FIG. 1, the plurality of MOS transistors of the unit pixel cell are composed of n-channel transistors.

  In the backside illumination type CMOS solid-state imaging device 31 according to the above-described embodiment, light is incident from the backside of the wafer through the optical lens system and the infrared cut filter 49 with the backside of the wafer as a light irradiation surface. In the same manner as described above, the infrared ray 61 of the incident light is cut by the infrared cut filter 49 and is prevented from entering the photodiode 34 side. The red light beam 62, the green light beam 63, and the blue light beam 64 transmitted through the infrared cut filter 49 are incident on the corresponding photodiodes 34R, 34G, and 34B corresponding to red, green, and blue, respectively, through the color filter. For each color ray, the long-wavelength red ray 62 is incident most deeply into the photodiode 34R, the green ray 63 is incident shallower than the red ray 62 into the photodiode 34G, and the blue ray 64 is shallowest and enters the photodiode 34B. Incident.

  Then, according to the backside illumination type CMOS solid-state imaging device 31 of the present embodiment, the opening 52 such that the photodiode 34 faces the region corresponding to each pixel without polishing and removing the backside of the single crystal silicon wafer 32. The reflective film 45 is formed on at least the inner wall surface of the opening 52 except for the bottom surface of the opening 52. With such a configuration, light rays (long-wavelength red light rays in the illustrated example) L3 incident on the photodiode 34 from an oblique direction in the peripheral pixels of the imaging region are reflected by the reflective film 45 on the inner wall surface of the opening 52. Incident light is incident on the photodiode 34 of the corresponding pixel (photodiode 34R corresponding to red in the illustrated example), and is prevented from entering adjacent pixels, thereby preventing color mixing. The reflection film 45 has both functions of light shielding for preventing color mixing and a role of a light guide for collecting and guiding incident light to the photodiode 34.

  Since the inter-pixel light shielding and condensing can be realized at the same time by the reflection film 45 formed on the inner wall surface of the opening 52 in this way, a decrease in light utilization rate, a decrease in sensitivity, a color mixture, etc. There is no problem. In the present embodiment, since the reflective film 45 plays a role of collecting light, the light utilization rate can be improved. Conventionally, it is difficult to prevent color mixture between pixels as the size of the unit pixel cell is miniaturized. However, in this embodiment, ideal color mixture prevention can be realized even for a fine pixel without reducing the pixel aperture ratio.

  On the other hand, the non-opening region 53 has a thickness (distance) F that is sufficient to prevent the red light beam 62 having the longest wavelength of visible light from reaching the photodiode 34. It plays a role as an absorption layer. Accordingly, the visible light incident on the non-opening region 53 is not incident on the photodiode 34.

  That is, since the processing from the back surface to the surface corresponding to the bottom surface of the opening in the region where the opening of the semiconductor substrate is not formed is set to a distance at which visible light does not reach the photoelectric conversion unit, the reflective film is formed on the surface of the region. Even if it is not formed, there is no adverse effect of visible light entering this region. In addition, since the distance from the bottom surface of the opening to the surface of the semiconductor substrate is set to a distance at which visible light irradiated from the back side can enter the photoelectric conversion unit, photoelectric conversion by incident light at each pixel is sufficiently performed. It can be carried out.

  In the case of manufacturing the back-illuminated CMOS solid-state imaging device 1 shown in FIG. 10 described above, after the support substrate 25 is bonded, the back surface of the semiconductor substrate 2, that is, a single crystal silicon wafer having a thickness of several hundreds μm to 700 μm is formed with a thickness t1. It is essential to polish and remove until the thickness becomes 10 μm or less. However, it is difficult to polish and remove the entire surface of the single crystal silicon wafer with a uniform thickness. If the thickness of the single crystal silicon wafer is not uniform, the charge amount and sensitivity of the embedded photodiode 4 on the back surface side may vary in the wafer surface.

  In the present embodiment, since the step of thinly and uniformly polishing and removing the thickness of the single crystal silicon wafer 32 is not required, the conventional single crystal silicon wafer thickness non-uniformity is caused. Variations in the amount of charge handled by the photodiode 34 and variations in sensitivity within the wafer surface do not occur. Further, since the single crystal silicon wafer 32 is not thinly removed by polishing, a back-illuminated CMOS solid-state imaging device can be manufactured by a simple semiconductor process.

Next, an example of a method for manufacturing the above-described back-illuminated CMOS solid-state imaging device 31 will be described with reference to FIGS.
First, as shown in FIG. 2, a first conductivity type, for example, p-type single crystal silicon wafer 32 is prepared. On the surface (one main surface) of the p-type single crystal silicon wafer 32, for example, a selective oxidation (LOCOS) layer, an element isolation region 33 for pixel isolation by trench isolation or the like is formed. Also, a second conductivity type n ⁺ semiconductor region 36a, for example, serving as a charge storage region of the photoelectric conversion unit is formed on the wafer surface, and the second conductivity type n ⁺ source / drain region 38, a gate insulating film, and a gate electrode 39 are formed. The MOS transistor Tr is formed. A p ⁺ semiconductor region 46 serving as an accumulation layer is formed on the substrate surface side of the n ⁺ semiconductor region 36a. Further, the connection plug 41 and the multilayer wiring 40 are formed via the interlayer insulating film 300, and the first passivation film 42 is formed on the uppermost interlayer insulating film 40.

  Next, as shown in FIG. 3, an opening 52 having a required depth D is formed on the back surface (the other main surface) of the single crystal silicon wafer 32 for each pixel by selective etching. At this time, the opening 52 is formed by selective etching so that the distance m from the wafer surface to the bottom surface of the opening 52 is about 5 μm to 10 μm. Therefore, the thickness F of the non-opening region 53 between the adjacent openings 52 can ensure a sufficient length so that the red light having the longest wavelength of visible light does not reach the photodiode to be formed later. it can.

Next, as shown in FIG. 4, an n − semiconductor region 36b is formed on the back surface of the wafer facing the bottom surface of each opening 52 so as to be connected to the n ⁺ semiconductor region 36a by, for example, ion implantation, and the n-type semiconductor region 36 is formed. Form. Further, an impurity is introduced into the entire surface of the n − semiconductor region 36b facing the bottom surface of the opening 52, the inner wall surface of the opening 52, and the upper surface of the non-opening region 53, and the p ⁺ accumulation layer 37 of the first conductivity type. Form. In this way, the backside embedded photodiode 34 [34R, 34G, 34B] having the HAD structure is formed.

  Next, as shown in FIG. 5, an insulating film (for example, a silicon oxide film such as a thermal oxide film) 43 is formed on the entire back surface of the wafer including the inner surface of the opening 52, and a metal that becomes the reflective film 45 is formed thereon. A film such as an Al film is formed.

  Next, as shown in FIG. 6, the reflective film 45 is etched back, the reflective film 45 on the bottom surface of the opening 52 is removed, and the reflective film 45 is applied only to the inner wall surface (that is, the inner side surface) of the opening 52. Leave. The reflective film 45 is formed as a so-called sidewall reflective film in a self-aligning manner.

Next, as shown in FIG. 7, a transparent insulating film 54 such as an SOG (silicon on glass) film is formed in the opening 52, and the wafer back surface is flattened.
Thereafter, as shown in FIG. 8, a second passivation film 44 such as a plasma silicon nitride film is formed on the flattened wafer back surface, and color filters 47R, 47G, 47G, and an on-chip lens 48 are formed. Thus, the desired backside illumination type CMOS solid-state imaging device 31 is obtained.

  According to the backside illumination type CMOS solid-state imaging device manufacturing method of the present embodiment, the thickness of the single crystal silicon wafer 32 is not required to be thinned and uniformly removed. A CMOS solid-state imaging device in which the amount of charge handled by the diode 34 and the sensitivity in the wafer surface are made uniform can be manufactured. Further, since the conventional supporting substrate bonding step and the polishing step for reducing the thickness of the wafer are omitted, the manufacturing becomes easy.

  Further, it is possible to manufacture a back-illuminated CMOS solid-state imaging device in which color mixing is unlikely to occur even when unit pixel cells are miniaturized and highly integrated.

In the step of forming the reflective film 45 on the inner wall surface of the opening 52, the reflective film 45 is formed on the entire back surface of the wafer including the inner surface of the opening 52, and then etched back from the back surface side of the wafer in a self-aligning manner. The reflective film 45 on the bottom surface of the opening 52 is removed, and the reflective film 45 can be left only on the inner wall surface of the opening 52.
In the step of forming the opening 52, the opening from the non-opening region 53 is formed by forming an opening having a depth D so as to secure a distance where the incident visible light in the non-opening region 53 does not reach the photodiode 34. Light can be prevented from entering the diode 34.

9A and 9B show another example of the etch back process of the reflective film 45. FIG. In this example, after the reflective film 45 is formed on the entire surface of the wafer including the inside of the opening 52, a resist mask 67 is selectively formed on the upper surface of the non-opening region 53 (see FIG. 9A). On the other hand, an etching process is performed from the back side (see FIG. 9B).
According to this etch back process, only the reflection film 45 on the bottom surface of the opening 52 is removed, and the reflection film 45 remains on the inner wall surface of the other opening 52 and the upper surface of the non-opening region 53. Therefore, the light incident on the non-opening region 53 is reflected by the reflective film 45 and can be reliably prevented from entering the photodiode side. Thus, when it is set as the structure which leaves the reflective film 45 also on a non-opening area | region, the thickness F of the non-opening area | region 53 does not satisfy | fill the above-mentioned conditions.

  In the above example, the present invention is applied to a back-illuminated CMOS solid-state image sensor. However, the present invention can also be applied to a back-illuminated CCD solid-state image sensor, which is not shown. Also in this case, an opening is formed on the back side of the wafer of the CCD solid-state imaging device so that the photoelectric conversion unit faces each pixel as described above, and a reflection film is formed on the inner wall surface of the opening. Can be configured.

31..Back-illuminated CMOS solid-state imaging device, 32..Single crystal silicon wafer, 33..Element isolation region, 34 [34R, 34G, 34B] .. Photodiode, Tr..MOS transistor, 35..Unit Pixel cell, 36..n-type semiconductor region, 38..source / drain region, 39..gate electrode, 40..multilayer wiring, 41..connection plug, 37..p ⁺ accumulation layer, 42 .. First passivation film 43 .. Insulating film 44.. Second passivation film 45.. Reflection film to be light-shielding film, 47 R, 47 G, 47 G... Color filter 48... On-chip lens 49. · Infrared cut filter, 52 ·· Opening portion, 53 ·· Non-opening region, 61 ·· Infrared ray, 62 ·· Red ray, 63 ·· Green ray, 64 ·· Blue ray, 100, 3 0 ... interlayer insulating film

Claims (7)

A plurality of pixels comprising a photoelectric conversion unit formed on a semiconductor substrate and means for reading out signal charges of the photoelectric conversion unit;
A light irradiation surface for irradiating light from the back surface of the semiconductor substrate;
A solid-state imaging device having a light-shielding film that is located between adjacent pixels and embedded inside the back surface of the semiconductor substrate. The solid-state imaging device according to claim 1, wherein means for reading signal charges of the photoelectric conversion unit is formed on a surface side of the semiconductor substrate. The solid-state imaging device according to claim 1, further comprising a color filter formed on a back surface side of the semiconductor substrate. The solid-state imaging device according to claim 1, wherein the light shielding film has a function of reflecting incident light and guiding it to the photoelectric conversion unit. The thickness of the conductor substrate of the photoelectric conversion unit is thinner than the thickness of the semiconductor substrate between the adjacent pixels,
5. The solid-state imaging device according to claim 1, wherein a transparent insulating film is embedded on a back surface side of the semiconductor substrate of the photoelectric conversion portion up to a back surface of the semiconductor substrate between the adjacent pixels.   The solid-state imaging device according to claim 1, which is a CMOS solid-state imaging device having a pixel transistor as means for reading signal charges of the photoelectric conversion unit.   The solid-state imaging device according to claim 1, which is a CCD solid-state imaging device.

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