JP2010206211A - Electronic substrate, semiconductor device, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic substrate 1 that is simply structured and is mounted more simply. <P>SOLUTION: An active surface side of a base substrate 10 is formed with a first inductance element 80 and a second inductance element 40, which differ from each other in an inductance value and an applicable frequency. The first inductance element 80 is used for transmitting power to the outside, while the second inductance element 40 is used for communicating with the outside. This eliminates the need of a connection terminal of the electronic substrate 1 and enables the simplification of its structure. As a result, the electronic substrate 1 is mounted onto a mother board more simply. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an electronic substrate, a semiconductor device, and an electronic apparatus.

  An electronic device (semiconductor chip) including an integrated circuit is mounted on an electronic device such as a mobile phone, a notebook personal computer, or a PDA (Personal data assistance). Generally, a connection terminal is formed on an electronic board, and the electronic circuit board is mounted on another electronic board, a mother board (mother board), or the like via the connection terminal. Accordingly, it is possible to exchange signals such as power transmission and communication between the electronic board and other electronic boards, motherboards, and the like (see, for example, Patent Documents 1 and 2).

JP 2002-164468 A JP 2003-347410 A

However, if the connection terminals are formed on the electronic substrate, the structure becomes complicated, and there is a problem that the mounting work between the connection terminals and other electronic substrates, mother substrates, and the like becomes complicated. Furthermore, there is a possibility that a continuity failure or a short circuit may occur with the mounting, and the reliability of the electrical connection is lowered.
The present invention has been made to solve the above problems, and an object thereof is to provide an electronic substrate and a semiconductor device that have a simple structure and can simplify a mounting operation. Another object is to provide a low-cost electronic device.

In order to achieve the above object, the electronic substrate according to the present invention is characterized in that a plurality of inductor elements are formed on the active surface side of the substrate or the back surface side of the active surface.
According to this configuration, since signal exchange can be performed using a plurality of inductor elements formed on the electronic substrate, it is possible to reduce the connection terminals of the electronic substrate and simplify the structure of the electronic substrate. be able to. Along with this, it is possible to simplify the mounting operation of the electronic substrate, and further it is possible to prevent a decrease in reliability associated with the mounting.

Moreover, it is preferable that the plurality of inductor elements include a first inductor element and a second inductor element having mutually different inductance values or applicable frequencies.
Here, the “applicable frequency” refers to a frequency that can be applied as an antenna when the inductor functions as an antenna and the inductor exhibits characteristics as an antenna.
According to this configuration, each inductor element can be assigned a function, so that each inductor element can be optimally designed. Thereby, the dimensional efficiency and transmission efficiency of each inductor element can be improved.

The first inductor element may be used for power transmission with the outside, and the second inductor element may be used for communication with the outside.
According to this configuration, all signal exchange with the outside can be performed by the inductor element, and the connection terminal of the electronic board can be eliminated.

The base may be provided with a connection terminal used for power transmission with the outside, and the first inductor element and the second inductor element may be used for communication with the outside.
According to this configuration, only power transmission can be reliably performed by the connection terminal. In addition, communication speed can be improved by performing communication with the outside using a plurality of inductor elements.

Further, it is desirable that a material layer having a dielectric loss tangent smaller than that of the base is provided between all or a part of the plurality of inductor elements and the base.
According to this configuration, it is possible to suppress the electromagnetic wave output from the inductor element from being absorbed as an eddy current generation loss in the substrate, and the performance as an antenna can be improved.

On the other hand, in the semiconductor device according to the present invention, the electronic substrates described above are stacked, and signals can be exchanged between the electronic substrates by transmitting and receiving electromagnetic waves using the inductor element formed on the electronic substrate as an antenna. It is characterized by that.
The electronic substrate described above can reduce the number of connection terminals. Therefore, it is possible to simplify the mounting operation of the electronic substrate, and the manufacturing cost can be reduced. In addition, it is possible to prevent a decrease in reliability associated with mounting.

In addition, it is desirable that the inductor elements formed on the pair of electronic substrates that perform signal exchange are arranged to face each other.
According to this configuration, transmission efficiency can be further improved. Moreover, interference can be prevented.

On the other hand, an electronic apparatus according to the present invention includes the above-described electronic substrate.
According to this configuration, since the electronic substrate having the connection terminals reduced is provided, a low-cost electronic device can be provided.

1 is a plan view of an electronic substrate according to a first embodiment. (A) is a top view of an inductor element, (b) is sectional drawing. It is explanatory drawing of the modification of an inductor element. 1 is an explanatory diagram of a semiconductor device according to a first embodiment. It is explanatory drawing of the electronic substrate which concerns on 2nd Embodiment. It is process drawing of the manufacturing method of the electronic substrate which concerns on 2nd Embodiment. It is process drawing of the manufacturing method of the electronic substrate which concerns on 2nd Embodiment. It is explanatory drawing of the semiconductor device which concerns on 2nd Embodiment. It is a perspective view of a mobile phone.

  Embodiments of the present invention will be described below with reference to the drawings. In each drawing used for the following description, the scale of each member is appropriately changed to make each member a recognizable size.

(First embodiment)
First, the electronic substrate according to the first embodiment will be described.
FIG. 1 is a plan view of the electronic substrate according to the first embodiment. In the electronic substrate 1 according to the first embodiment, a plurality of inductor elements 40 and 80 having different inductance values or applicable frequencies are formed on the active surface side of the base 10. Among them, the first inductor element 80 is used for communication, and the second inductor element 40 is used for power transmission.

  The electronic substrate 1 includes a base 10 made of silicon, glass, quartz, quartz, or the like. An electronic circuit (not shown) is formed on the active surface of the substrate 10. The electronic circuit has at least a wiring pattern formed, and is composed of a plurality of semiconductor elements such as thin film transistors (TFTs), a plurality of passive components (components), wiring for connecting them to each other, and the like. Has been.

  A dielectric layer 31 to be described later is formed at the center of the active surface of the substrate 10. The dielectric layer 31 may be formed on the entire active surface. In the case where the electronic substrate 1 is an insulator, the dielectric layer 31 is not necessarily required. However, in order to obtain optimum inductor characteristics, for example, by improving the Q value or adjusting the self-resonance frequency, the electronic substrate 1 is actively used. The dielectric layer 31 may be formed. In addition, electrodes 11 and 21 for electrically connecting the electronic circuit to the outside are arranged on the periphery of the active surface of the substrate 10. A plurality of inductor elements 40 and 80 are formed from the electrodes 11 and 21 to the surface of the dielectric layer 31.

  2A and 2B are explanatory diagrams of the inductor element, FIG. 2A is a plan view, and FIG. 2B is a cross-sectional view taken along line BB in FIG. 2A. As shown in FIG. 2B, a passivation film 8 made of an electrically insulating material such as SiN is formed on the active surface of the substrate 10 to protect the electronic circuit. In addition, an electrode 11 for electrically connecting the electronic circuit to the outside is formed on the peripheral portion of the active surface of the substrate 10. On the surface of the electrode 11, an opening of the passivation film 8 is formed.

  A connecting wire 12 a is formed from the opening to the surface of the passivation film 8. The connection wiring 12a includes copper (Cu), gold (Au), silver (Ag), titanium (Ti), tungsten (W), titanium tungsten (TiW), titanium nitride (TiN), nickel (Ni), and nickel vanadium. It is formed in a single layer or a plurality of layers of a single material or a composite material of a conductive material such as (NiV), chromium (Cr), aluminum (Al), palladium (Pd). When the connection wiring 12a is formed by the electrolytic plating method, the connection wiring 12a is often formed on the surface of the base layer, but the description of the base layer is omitted in FIG.

A dielectric layer 31 is formed so as to cover the connection wiring 12a. The dielectric layer 31 is formed with a through hole 31a that exposes an end of the connection wiring 12a.
A winding 41 of the inductor element 40 is formed on the surface of the dielectric layer 31. The constituent material of the winding 41 is the same as that of the connection wiring 12a, but can be appropriately selected according to characteristics such as a resistance range and an allowable current value required for the winding 41.

  As shown in FIG. 2A, the winding 41 is formed in a substantially rectangular spiral shape in a plan view, but may be formed in a substantially circular or substantially polygonal spiral shape. Moreover, as shown in FIG.2 (b), the winding 41 is formed in the same plane shape in side view. That is, a planar inductor element (spiral inductor element) is employed as the inductor element 40 of the present embodiment.

  As shown in FIG. 2A, the outer end portion of the winding wire 41 is connected to the electrode 21 through a connection wiring 22a. Moreover, the inner side edge part of the winding 41 is connected with the one end part of the connection wiring 12a through the through-hole 31a. The other end portion of the connection wiring 12 a is drawn to the outside of the winding 41 and connected to the electrode 11. When the connecting wire 12a is pulled out, the dielectric layer 31 prevents a short circuit between the connecting wire 12a and the winding 41. When the inductor element 40 is energized from the electrodes 11 and 21, the inductor element 40 functions as an antenna, and an electromagnetic wave having an applicable frequency is output.

  As shown in FIG. 2B, the silicon constituting the substrate 10 is a radio wave absorber, and electromagnetic waves output from the inductor element 40 are also absorbed and attenuated. However, in the present embodiment, the inductor element 40 is spaced from the base body 10 by the dielectric layer 31 described above. The thickness of the dielectric layer 31 is, for example, 20 μm or more. As a result, the electromagnetic wave output from the inductor element 40 can be suppressed from being absorbed by the base 10. In other words, eddy current loss due to the substrate 10 can be reduced.

  As a constituent material of the dielectric layer 31, it is desirable to employ a material having a small dielectric loss tangent. The dielectric loss tangent indicates the degree of loss of electrical energy inside the insulator when an AC voltage is applied to the insulator. By configuring the dielectric layer 31 with a material having a small dielectric loss tangent, it is possible to suppress the electromagnetic wave output from the inductor element 40 from being absorbed as an eddy current generation loss in the substrate, and performance as an antenna. Can be improved. Specifically, polyimide, benzocyclobutene (BCB), a fluororesin, or the like may be employed as a constituent material of the dielectric layer 31.

  3A and 3B are explanatory views of a modification of the inductor element, FIG. 3A is a plan view, and FIG. 3B is a cross-sectional view taken along the line CC in FIG. 3A. As shown in FIG. 3B, in this modified example, since the dielectric layer described above is not formed, the winding 41 of the inductor element 40 is directly formed on the surface of the passivation film 8. In addition, since the dielectric layer is not formed, the winding 41 and the connection wiring cannot be three-dimensionally crossed as described above. Therefore, as shown in FIG. 3A, the inner end of the winding 41 is connected to the electrode 11 formed at the center of the winding 41.

  Further, an inductor element 40 is formed on the surface of the passivation film 8 shown in FIG. 3B, a dielectric layer is formed so as to cover the inductor element, and another inductor element is formed on the surface of the dielectric layer. May be. By thus forming the inductor elements in an overlapping manner, the electronic substrate can be reduced in size. Here, by setting each inductor element to a different inductance value or applicable frequency, it is possible to prevent interference when each inductor element is applied as an antenna.

  In the modification shown in FIG. 3B, the inductor element 40 is formed outside the passivation film 8, but the inductor element 40 may be formed inside the passivation film 8. In this case, the winding wire 41 may be formed of a conductive material such as Cu or Al using a semiconductor element manufacturing process. Further, an inductor element may be formed so as to overlap inside and outside the passivation film 8.

  Returning to FIG. 1, a first inductor element 80 and a second inductor element 40 are formed on the base 10. The second inductor element 40 has a larger number of windings than the first inductor element 80. Generally, when the number of windings of the inductor element increases, the inductor element path becomes longer, and the inductance (L value) increases. Further, when the inductance increases, the applicable frequency shifts to the low frequency side. Therefore, the applicable frequency of the second inductor element 40 is shifted to the lower frequency side than the first inductor element 80. The “applicable frequency” refers to a frequency at which the inductor exhibits characteristics as an antenna when the inductor functions as an antenna, and can be applied as an antenna.

Each inductor in the first embodiment functions as an antenna, of which the first inductor element 80 is used for communication, and the applicable frequency is set to, for example, 2 to 5 GHz for high speed and large capacity communication. . Moreover, the 2nd inductor element 40 is used for electric power transmission, and the applicable frequency is set to several kHz-several hundred MHz, for example. It is also possible to share the second inductor element for power transmission and communication by superimposing and outputting a high-frequency electromagnetic wave for communication on a low-frequency electromagnetic wave for power transmission.
Each embodiment in the present specification has been described by taking a wound type (spiral) type inductor as an example. However, the present invention is not limited to this, and any embodiment can be used as long as it functions as an inductor or an antenna. Can be applied to. In addition to the wound type (spiral) type inductor, meander type, toroidal type, patch type and the like are known, and the magnitude of the inductance value when applying them depends on the respective inductor and antenna.

(Semiconductor device)
FIG. 4 is an explanatory diagram of the semiconductor device according to the first embodiment, and is a cross-sectional view taken along a line AA in FIG. As shown in FIG. 4, the semiconductor device 5 according to the first embodiment is obtained by mounting a first electronic substrate 200 and a second electronic substrate 300 in this order on the surface of a mother board (motherboard) 100.

  The mother board 100 is made of glass epoxy resin or the like, and the first inductor element 180 and the second inductor element 140 are formed on the surface thereof. The first inductor element 180 is used for communication, and the applicable frequency is set to 2 to 5 GHz, for example. Moreover, the 2nd inductor element 140 is used for electric power transmission, and the applicable frequency is set to several kHz-several hundred MHz, for example.

  The first electronic board 200 is mounted on the surface of the mother board 100 via an adhesive (not shown) or the like. The first inductor element 280 of the first electronic substrate 200 and the first inductor element 180 of the mother substrate 100 are set to the same applicable frequency and are arranged to face each other. That is, the first inductor elements 180 and 280 are arranged so that the normals passing through the respective centers substantially coincide with each other. Further, the second inductor element 240 of the first electronic substrate 200 and the second inductor element 140 of the mother substrate 100 are also set to the same applicable frequency and are arranged to face each other.

  The second electronic substrate 300 is mounted on the back surface of the first electronic substrate 200 via an adhesive (not shown) or the like. The first inductor element 380 of the second electronic substrate 300 and the first inductor element 180 of the mother substrate 100 are set to the same applicable frequency and are arranged to face each other with the first electronic substrate 200 interposed therebetween. In addition, the second inductor element 340 of the second electronic substrate 300 and the second inductor element 140 of the mother substrate 100 are also set to the same applicable frequency and are arranged to face each other with the first electronic substrate 200 interposed therebetween.

  In the semiconductor device 5 configured as described above, an electromagnetic wave is transmitted from the second inductor element 140 by energizing the second inductor element 140 of the mother board 100. The electromagnetic wave is received by the second inductor element 240 of the first electronic substrate 200 and the second inductor element 340 of the second electronic substrate 300 to extract electric energy. In this way, power is transmitted from the mother board 100 to the first electronic board 200 and the second electronic board 300 by transmitting and receiving electromagnetic waves using the second inductor elements 140, 240, and 340 as antennas. As a result, the first electronic substrate 200 and the second electronic substrate 300 can be driven. In that case, since each 2nd inductor element 140,240,340 which transmits / receives electromagnetic waves is opposingly arranged, power transmission loss can be suppressed and transmission efficiency can be improved.

  Further, the electromagnetic wave transmitted from one of the first inductor element 180 of the mother board 100 or the first inductor elements 280 and 380 of the electronic boards 200 and 300 is received by the other, and an electric signal is taken out. As described above, communication is performed between the mother board 100 and the electronic boards 200 and 300 by transmitting and receiving electromagnetic waves using the first inductor elements 180, 280, and 380 as antennas. As a result, the electronic substrate can function as a driver. Of the first inductor element 280 of the first electronic substrate 200 or the first inductor element 380 of the second electronic substrate 300, the other receives the electromagnetic wave transmitted from one of the first electronic substrate 200 and the second electronic substrate 200. Communication with the electronic substrate 300 is also possible. Further, communication between the semiconductor device 5 and the outside can be performed by appropriately setting the applicable frequency and output of each inductor element formed on the mother board 100 and / or each electronic board 200, 300. .

  As described in detail above, in the electronic substrate according to the present embodiment, a plurality of inductor elements having different inductance values or applicable frequencies are formed on the active surface of the substrate, of which the first inductor element is used for communication, The 2-inductor element was used for power transmission. According to this configuration, since power transmission and communication can be performed using a plurality of inductor elements formed on the electronic substrate, there is no need to provide connection terminals on the electronic substrate, and the structure of the electronic substrate is simplified. Can do. Accordingly, it is possible to simplify the mounting operation of the electronic board. Specifically, operations such as precise alignment between the two and reflow are not required. Furthermore, it is possible to prevent a decrease in reliability associated with mounting. Specifically, it is possible to prevent a conduction failure, a short circuit, or the like from occurring with mounting. In this way, the occurrence of manufacturing defects can be suppressed, so that the manufacturing yield can be improved.

(Second Embodiment)
Next, an electronic substrate according to a second embodiment will be described.
FIG. 5 is an explanatory view of an electronic substrate according to the second embodiment, FIG. 5 (a) is a plan view, and FIG. 5 (b) is a cross-sectional view taken along line EE of FIG. 5 (a). As shown in FIG. 5A, the electronic substrate 1 according to the second embodiment is different from the first embodiment in which power transmission is performed using an inductor element in that power transmission is performed using a connection terminal 63. Is different. The electronic substrate according to the second embodiment is different from the first embodiment in that communication is performed using a plurality of inductor elements 80 and 90. Note that detailed description of portions having the same configuration as in the first embodiment is omitted.

(Relocation wiring, etc.)
As shown in FIG. 5A, a plurality of electrodes 62 are aligned along the peripheral edge of the electronic substrate 1 in order to receive power supply from the outside. Due to the recent miniaturization of the electronic substrate 1, the pitch between the adjacent electrodes 62 has become very narrow. When the electronic substrate 1 is mounted on the counterpart member, there is a possibility that a short circuit occurs between the adjacent electrodes 62. Therefore, in order to widen the pitch between the electrodes 62, a rearrangement wiring 64 for the electrodes 62 is formed.

  Specifically, a plurality of pads constituting the connection terminal 63 are formed at the center of the surface of the electronic substrate 1. A rearrangement wiring 64 drawn from the electrode 62 is connected to the connection terminal 63. As a result, the narrow-pitch electrodes 62 are drawn out to the central portion to widen the pitch. For the formation of such an electronic substrate 1, W-CSP (Wafer Level Chip Scale Package) technology in which rearrangement wiring, resin sealing, and the like are performed collectively in a wafer state and then separated into individual electronic substrates 1. Is being used.

  As shown in FIG. 5B, bumps 78 are formed on the surface of the connection terminal 63. The bumps 78 are, for example, solder bumps, and are formed by a printing method or the like. The bump 78 is melted by reflow or the like, and is connected to the connection terminal of the counterpart member.

  A solder resist 66 is formed around the bump 78. The solder resist 66 serves as a partition wall of the solder bump 78 when the electronic substrate 1 is mounted on the counterpart member, and is made of a resin material having electrical insulation. The entire surface of the electronic substrate 1 is covered with the solder resist 66.

  By the way, when the electronic substrate 1 is mounted on the counterpart member, a thermal stress is generated between the two due to the difference in thermal expansion coefficient between the base 10 of the electronic substrate 1 and the counterpart member. In order to relieve this thermal stress, the stress relaxation layer 30 is formed between the connection terminal 63 and the base body 10. The stress relaxation layer 30 is formed with a predetermined thickness from a resin material such as photosensitive polyimide, benzocyclobutene (BCB), or a phenol novolac resin.

  As shown in FIG. 5A, a plurality of inductor elements 80 and 90 are also formed on the electronic substrate 1 according to the second embodiment. As each of the inductor elements 80 and 90, a planar inductor element (spiral inductor element) similar to that of the first embodiment is employed. The windings of the inductor elements 80 and 90 are formed on the surface of the stress relaxation layer 30 described above. Since this stress relaxation layer 30 is comprised with the resin material which is a dielectric material, it functions similarly to the dielectric material layer in 1st Embodiment. Therefore, each of the inductor elements 80 and 90 can be disposed away from the base body 10 by the stress relaxation layer 30, and the electromagnetic wave output from each of the inductor elements 80 and 90 can be prevented from being absorbed by the base body 10. it can.

  The number of turns of the second inductor element 90 is larger than that of the first inductor element 80. Thereby, the applicable frequency of the second inductor element 90 is shifted to the lower frequency side than the first inductor element 80. However, the second inductor element 90 is not used for power transmission but is used for communication together with the first inductor element 80. Therefore, the applicable frequencies of the inductor elements 80 and 90 are both set to 2 to 5 GHz. Note that the difference in applicable frequency between the second inductor element 90 and the first inductor element 80 is smaller than that in the first embodiment.

(Electronic substrate manufacturing method)
Next, a method for manufacturing an electronic substrate according to the second embodiment will be described.
6 and 7 are process diagrams of the method of manufacturing the electronic substrate according to the second embodiment, and are cross-sectional views taken along a line FF in FIG. Note that W-CSP technology is used for manufacturing the electronic substrate. That is, the following steps are collectively performed on the wafer and finally separated into individual electronic substrates.

  First, as shown in FIG. 6A, a connection wiring 12a is formed on the surface of the passivation film 8 of the wafer 10a. As a premise thereof, a base film (not shown) is formed on the entire surface of the passivation film 8. This base film is composed of a lower barrier layer and an upper seed layer. The barrier layer prevents diffusion of Cu constituting the connection wiring 12a, and is formed with a thickness of about 100 nm using TiW, TiN, or the like. The seed layer functions as an electrode when the connection wiring 12a is formed by an electrolytic plating method, and is continuously formed with a thickness of about several hundreds of nanometers using Cu or the like. They are often formed by sputtering, CVD, electroless plating, or the like. Next, a mask having an opening is formed in the formation region of the connection wiring 12a. Next, electrolytic Cu plating is performed using the seed layer of the base film as an electrode, and Cu is embedded in the opening of the mask to form the connection wiring 12a. This may be formed by an electroless plating method or the like. After removing the mask, the base film is etched using the connection wiring 12a as a mask.

  Next, as shown in FIG. 6B, a stress relaxation layer 30 is formed on the surface of the wafer 10a. Further, the through hole 31a of the stress relaxation layer 30 is formed so that one end portion of the connection wiring 12a is exposed. The stress relaxation layer 30 can be formed using a printing method, photolithography, or the like. In particular, if a resin material having photosensitivity is employed as the constituent material of the stress relaxation layer 30, the stress relaxation layer 30 can be patterned easily and accurately using photolithography.

  Next, as shown in FIG. 6C, rearrangement wirings and connection terminals 63 (hereinafter referred to as “connection terminals 63 and the like”) are formed on the surface of the stress relaxation layer 30. In the step of forming the connection terminal 63 and the like, the winding wire 41 is formed on the surface of the stress relaxation layer 30 simultaneously with the connection terminal 63 and the like. The specific method is the same as the method of forming the connection wiring 12a described above. Thus, by forming the winding wire 41 simultaneously with the connection terminal 63 and the like, the manufacturing process can be simplified and the manufacturing cost can be reduced. Further, the winding wire 41 can be accurately formed by using plating, photolithography, or the like, and an inductor element having desired characteristics can be formed. It is also possible to tune the characteristics of the inductor element by trimming the winding wire 41 formed on the surface of the stress relaxation layer 30 with a laser or the like.

Next, as shown in FIG. 7A, a solder resist 66 is formed on the entire surface of the wafer 10a. Further, an opening 67 of the solder resist 66 is formed above the connection terminal 63.
Next, as shown in FIG. 7B, a bump 78 is formed on the surface of the connection terminal 63 inside the opening.
Thereafter, the individual substrates 10 are separated from the wafer. Separation of the substrate 10 can be performed by dicing or the like. Thus, the electronic substrate 1 according to this embodiment is completed.

(Semiconductor device)
FIG. 8 is an explanatory diagram of the semiconductor device according to the second embodiment, and is a cross-sectional view taken along a line FF in FIG. As shown in FIG. 8, the semiconductor device 5 according to the second embodiment is obtained by mounting a first electronic substrate 200 on the surface of a mother board (motherboard) 100.
On the surface of the mother board (mother board) 100, connection terminals 163 for connection to the first electronic board 200 are formed. A first inductor element (not shown) and a second inductor element 190 are formed on the surface of the mother board 100. Each inductor element is used for communication, and the applicable frequency is set to 2 to 5 GHz.

  A first electronic board 200 is mounted on the surface of the mother board 100. Specifically, the connection terminals 163 formed on the first electronic substrate 200 are disposed so as to face the connection terminals 263 of the mother substrate 100. The solder bumps 278 formed on the surface of the connection terminal 163 of the first electronic substrate 200 are coupled to the connection terminal 263 of the mother substrate 100 by reflow or the like.

  In addition, the first inductor element of the first electronic substrate 200 and the first inductor element of the mother substrate 100 are formed at the same applicable frequency and are arranged to face each other. Further, the second inductor element 290 of the first electronic substrate 200 and the second inductor element 190 of the mother substrate 100 are also formed at the same applicable frequency and are arranged to face each other.

  In the semiconductor device 5 configured as described above, power is transmitted from the mother board 100 to the first electronic board 200 via the connection terminals 163 and 263. Thus, by performing power transmission through the connection terminal, it is possible to perform power transmission reliably and stably. Thereby, the operation reliability of the semiconductor device 5 can be improved.

  Further, in the semiconductor device 5, electromagnetic waves are transmitted and received using the first inductor element of the mother board 100 and the first inductor element of the first electronic board 200 as antennas, and the second inductor element 190 and the first electronic board 200 of the mother board 100 are transmitted and received. Communication is performed between the mother board 100 and the first electronic board 200 by transmitting and receiving electromagnetic waves using the second inductor element 290 as an antenna.

  At that time, since the applicable frequencies of the pair of first inductor elements and the pair of second inductor elements are different, interference can be prevented. For example, the electromagnetic wave transmitted from the first inductor element of the mother board 100 is received only by the active surface first element having the same applicable frequency in the first electronic substrate 200, and is transmitted to the active surface second element 290 having a different applicable frequency. Is not received. As a result of preventing interference, multi-bit serial communication can be realized, and the communication speed can be improved. In addition, it is not necessary to strictly align the mother substrate 100 and the first electronic substrate 200, and the manufacturing cost can be reduced.

(Electronics)
Next, an example of an electronic device including the above-described electronic substrate will be described.
FIG. 9 is a perspective view of the mobile phone. The electronic board described above is disposed inside the housing of the mobile phone 1300. According to this configuration, since the electronic substrate having a simple structure and excellent mounting workability is provided, a low-cost mobile phone can be provided.

  Note that the electronic substrate described above can be applied to various electronic devices other than mobile phones. For example, LCD projectors, multimedia personal computers (PCs) and engineering workstations (EWS), pagers, word processors, TVs, viewfinder type or monitor direct view type video tape recorders, electronic notebooks, electronic desk calculators, car navigation systems The present invention can be applied to electronic devices such as a device, a POS terminal, and a device provided with a touch panel. In either case, a low-cost electronic device can be provided.

  It should be noted that the technical scope of the present invention is not limited to the above-described embodiments, and includes those in which various modifications are made to the above-described embodiments without departing from the spirit of the present invention. In other words, the specific materials and layer configurations described in the embodiments are merely examples, and can be changed as appropriate.

  For example, in the above embodiment, a plurality of inductor elements are formed on the active surface side of the substrate, but a plurality of inductor elements may be formed on the back surface side of the substrate. In this case, a through electrode is formed on the base, and the inductor element formed on the back surface side is electrically connected to the active surface side. In the above embodiment, two inductor elements are formed on the active surface side of the substrate, but three or more inductor elements may be formed. In the above embodiment, all inductor elements function as antennas, but some inductor elements may function as passive elements to form a transmission circuit or the like. In the above embodiment, the inductor element is formed on the base on which the electronic circuit is formed. However, the inductor element may be formed on the base made of an electrically insulating material. In the above embodiment, the windings are formed by the electrolytic plating method, but other film forming methods such as a sputtering method and a vapor deposition method may be adopted. Further, an inductor method or the like may be directly formed by employing an inkjet method or the like without going through a film forming process.

  In all the embodiments described above, an example in which only an inductor or an antenna is formed on an electronic substrate has been described. However, the present invention is not limited to this, and components other than the inductor, such as thin film and thick film processes, for example, A composite electronic component in which a capacitor and a resistor are formed on an electronic substrate may be used. Moreover, it is good also as a composite electronic component which formed those components on the electronic substrate by another means, for example, a surface mounting technique.

  DESCRIPTION OF SYMBOLS 1 ... Electronic substrate 5 ... Semiconductor device 10 ... Base | substrate 40 ... 2nd inductor element 80 ... 1st inductor element 90 ... 2nd inductor element 31 ... Dielectric layer (material layer) 1300 ... Mobile phone (electronic device).

Claims (8)

  An electronic substrate comprising a plurality of inductor elements formed on an active surface side of a base or a back surface side of the active surface.   2. The electronic substrate according to claim 1, wherein the plurality of inductor elements include a first inductor element and a second inductor element having different inductance values or different applicable frequencies. The first inductor element is used for power transmission with the outside,
The electronic board according to claim 2, wherein the second inductor element is used for communication with the outside. The base is provided with a connection terminal used for power transmission with the outside,
The electronic board according to claim 2, wherein the first inductor element and the second inductor element are used for communication with the outside.   5. A material layer having a dielectric loss tangent smaller than that of the base is provided between all or a part of the plurality of inductor elements and the base. The electronic board as described in.   6. The electronic substrate according to claim 1, wherein the electronic substrate is laminated and an electromagnetic wave is transmitted / received by using the inductor element formed on the electronic substrate as an antenna, thereby transmitting and receiving signals between the electronic substrates. A semiconductor device characterized by being made possible.   The semiconductor device according to claim 6, wherein the inductor elements formed on a pair of the electronic substrates that perform signal exchange are arranged to face each other.   An electronic apparatus comprising the electronic substrate according to claim 1.

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