JP2010028057A - Nitride semiconductor light emitting element and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride semiconductor light emitting element and its manufacturing method capable of simplifying manufacturing steps and improve productivity. <P>SOLUTION: The nitride semiconductor light emitting element includes: a light emitting region 6 formed on the surface side of an n-type nitride semiconductor layer 3 and having a lamination structure composed of a light emitting layer 4 and a p-type nitride semiconductor layer 5; an n-type conduction region 7; a separation groove part 8 formed between the light emitting region 6 and the n-type contact region 7; an anode electrode 10; and a cathode electrode 11. The n-type contact region 7 is formed by irradiating a part of the lamination structure of the light emitting layer 4 and the p-type nitride semiconductor layer 5 with pulse laser light, which is formed on the whole surface side of the n-type nitride semiconductor layer 3, and converting a conduction type to an n type. The separation groove part 8 is formed by irradiating the other part of the lamination structure part with a pulse laser light to etch the light application part. The light emitting region 6 is composed of a portion other than an area in which the n-type contact region 7 and the separation groove part 8 are formed out of the lamination structure. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a nitride semiconductor light emitting device and a method for manufacturing the same.

  Conventionally, nitride semiconductor light emitting devices such as light emitting diodes and laser diodes using gallium nitride-based nitride semiconductors have been researched and developed in various places (for example, Patent Document 1), and blue light emission that emits light in a blue wavelength region. Not only diodes but also green light-emitting diodes that emit light in the green wavelength range of about 500 to 560 nm and ultraviolet light-emitting diodes that emit light in the ultraviolet wavelength range of 380 nm or less have been put into practical use. Research and development is also actively conducted on infrared light emitting diodes that emit light in the wavelength range.

By the way, as a nitride semiconductor light emitting device, one using a sapphire substrate which is an insulating substrate as a single crystal substrate for epitaxial growth is generally used. As shown in FIG. An n-type nitride semiconductor layer 3 formed on the main surface side of the single-crystal substrate 1 made of the above via a buffer layer 2, a light-emitting layer 4 formed on the surface side of the n-type nitride semiconductor layer 3, and a light-emitting layer 4, a p-type nitride semiconductor layer 5 formed on the surface side, an anode electrode (p electrode) 10 formed on the surface side of the p-type nitride semiconductor layer 5, and a single crystal in the n-type nitride semiconductor layer 3 A nitride semiconductor light emitting device (light emitting diode) including a cathode electrode (n electrode) 11 formed on the surface side opposite to the substrate 1 side is described. In Patent Document 1, as an example of the above-described nitride semiconductor light emitting device, the buffer layer 2 is composed of an AlN layer, and the n-type nitride semiconductor layer 3 has a Si doping concentration of 7 × 10 ^18. It is composed of a lower cladding layer made of the doping concentration of the contact layer and the Si consisting of n-type GaN layer with ^{cm -3} 5 × ¹⁰ 18 cm ^-3 and the n-type GaN layer, the light-emitting layer 4, an in _0.95 Ga _The p-type nitride semiconductor layer 5 is composed of a p-type Al _0.25 Ga _0.75 N layer having a Mg doping concentration of 1 × 10 ¹⁸ cm ⁻³ and having a single quantum well structure having a well layer composed of _0.05 N layers. And a contact layer made of a p-type GaN layer with an Mg doping concentration of 5 × 10 ¹⁹ cm ⁻³ .

Here, the anode electrode 10 is formed on the translucent electrode 9 made of a conductive oxide such as ITO formed on the p-type nitride semiconductor layer 5, and the cathode electrode 11 is formed on the n-type nitride semiconductor layer. 3 on the exposed surface on the light emitting layer 4 side. More specifically, in the nitride semiconductor light emitting device, the n-type nitride semiconductor layer 3, the light emitting layer 4, and the p-type nitride semiconductor layer 5 are sequentially grown on the one surface side of the single crystal substrate 1 by the MOCVD method or the like. Then, using a photolithography technique, a resist layer (hereinafter referred to as a first layer) is formed on a desired light-emitting region in the stacked structure portion of the n-type nitride semiconductor layer 3, the light-emitting layer 4, and the p-type nitride semiconductor layer 5. N) by etching from the surface side of the p-type nitride semiconductor layer 5 to the middle of the n-type nitride semiconductor layer 3 by reactive ion etching using the first resist layer as a mask. After exposing the surface of the nitride semiconductor layer 3 and removing the first resist layer, an ITO film serving as the basis of the translucent electrode 9 is formed on the p-type nitride semiconductor layer 5 by sputtering or the like. And then I A transparent electrode 9 is formed by patterning the O film, and then the second electrode is patterned so that only the regions where the anode electrode 10 and the cathode electrode 11 are to be formed on the main surface side of the single crystal substrate 1 are exposed. After forming the resist layer, the anode electrode 10 and the cathode electrode 11 are simultaneously formed by sputtering or the like, and the second resist layer and the unnecessary film on the second resist layer are removed by performing lift-off. .
JP 2008-41866 A

  However, in the nitride semiconductor light emitting device having the configuration shown in FIG. 3, the n-type nitride semiconductor layer 3, the light emitting layer 4, and the p type are formed on the main surface side of the single crystal substrate 1 made of a sapphire substrate as described above. After the stacked structure portion with the nitride semiconductor layer 5 is formed by MOCVD or the like, a first resist layer is formed on the light emitting region in the stacked structure portion using photolithography technology, and the first resist layer As a mask, it is necessary to etch the region other than the light emitting region in the stacked structure portion until the n-type nitride semiconductor layer 3 is exposed and to remove the first resist layer, which complicates the manufacturing process and increases the productivity. There is a problem in that the cost decreases and the cost increases. In manufacturing a nitride semiconductor light emitting device, a plurality of nitride semiconductor light emitting devices are formed on a single wafer and then separated into individual nitride semiconductor light emitting devices using a cutting device called a dicer. It is common.

  The present invention has been made in view of the above reasons, and an object of the present invention is to provide a nitride semiconductor light emitting device capable of simplifying the manufacturing process and improving productivity, and a method for manufacturing the same.

  The invention of claim 1 includes a single crystal substrate, an n-type nitride semiconductor layer formed on one surface side of the single crystal substrate, a light emitting layer and p-type nitride formed on the surface side of the n-type nitride semiconductor layer. A light emitting region having a laminated structure with an oxide semiconductor layer, an n-type contact region formed on the surface side of the n-type nitride semiconductor layer at a side of the light emitting region and spaced from the light emitting region, and an n-type nitride semiconductor A separation groove formed between the light emitting region and the n-type contact region on the surface side of the layer, an anode electrode formed on the side of the light emitting region opposite to the light emitting layer side in the p-type nitride semiconductor layer, n A cathode electrode formed on the opposite side of the n-type contact region to the n-type nitride semiconductor layer side, and the n-type contact region includes a light emitting layer formed on the entire surface side of the n-type nitride semiconductor layer and p Laminated structure with shaped nitride semiconductor layer The n-type contact region is scheduled to be formed by irradiating the region where the n-type contact region is to be formed with a pulse laser beam to change the conductivity type of the region to be formed to n-type. The region is formed by irradiating the region with pulsed laser light and etching, and the light emitting region is constituted by the remaining portion of the region where the n-type contact region and the separation groove portion are formed in the stacked structure portion. And

  According to the present invention, the light emitting region formed on the surface side of the n-type nitride semiconductor layer and having a laminated structure of the light emitting layer and the p-type nitride semiconductor layer, and the light emitting region on the surface side of the n-type nitride semiconductor layer An n-type contact region formed laterally away from the light-emitting region, a separation groove formed between the light-emitting region and the n-type contact region on the surface side of the n-type nitride semiconductor layer, and a light-emitting region An anode electrode formed on the side opposite to the light emitting layer side of the p-type nitride semiconductor layer, and a cathode electrode formed on the side opposite to the n-type nitride semiconductor layer side in the n-type contact region, n The n-type contact region is irradiated with pulsed laser light on the region where the n-type contact region is to be formed in the laminated structure of the light emitting layer and the p-type nitride semiconductor layer formed on the entire surface side of the n-type nitride semiconductor layer. Then The separation groove portion is formed by changing the conductivity type of the region to be formed to n-type, and the separation groove portion is formed by irradiating the region to be formed of the separation groove portion in the stacked structure portion with etching with pulsed laser light, and the light emitting region is The n-type nitride semiconductor layer is formed by using the conventional photolithography technique and etching technique because it is constituted by the remaining part of the region where the n-type contact region and the isolation groove portion are formed in the stacked structure portion. The process of exposing the surface of the film is unnecessary, the manufacturing process can be simplified, the productivity can be improved, and the cost can be reduced.

  According to a second aspect of the present invention, there is provided a method for manufacturing a nitride semiconductor light emitting device according to the first aspect, wherein the light emission formed on the entire surface side of the n type nitride semiconductor layer when forming the n type contact region and the isolation groove. The n-type contact region and the isolation trench portion in the stacked structure portion of the layer and the p-type nitride semiconductor layer are irradiated with pulse laser light having a pulse width of less than 10 ps and less than 1 ps as pulse laser light, respectively. A contact region and a separation groove are formed.

  According to the present invention, the pulse laser is applied to each of the n-type contact region and the separation groove portion in the laminated structure portion of the light emitting layer formed on the entire surface side of the n-type nitride semiconductor layer and the p-type nitride semiconductor layer. Light is irradiated with pulsed laser light having a pulse width of less than 10 ps and less than 1 ps, respectively, to form an n-type contact region and a separation groove, thereby simplifying the manufacturing process and improving productivity and reducing the cost of nitriding A physical semiconductor light emitting device can be provided, and furthermore, thermal damage can be suppressed around the irradiated portion of the pulse laser beam, so that the n-type contact region and the separation groove can be formed with high accuracy.

  According to a third aspect of the present invention, in the second aspect of the present invention, a plurality of nitride semiconductor light emitting devices are formed on a single wafer and then separated into individual nitride semiconductor light emitting devices. The separation into the semiconductor light emitting elements is characterized in that each nitride semiconductor light emitting element is separated by irradiating a pulse laser beam having a pulse width of less than 1 ps.

  According to the present invention, the dicer is not required because the pulse laser used for forming the n-type contact region and the separation groove can be used for separating the individual nitride semiconductor light emitting devices from the wafer. Thus, the cost can be reduced, and damage can be prevented from occurring when the nitride semiconductor light emitting device is separated from the wafer.

  In the invention of claim 1, there is an effect that the manufacturing process can be simplified and the productivity can be improved.

  According to the second aspect of the present invention, the manufacturing process can be simplified, the productivity can be improved, and a low-cost nitride semiconductor light emitting device can be provided.

  The nitride semiconductor light emitting device of this embodiment is a visible light emitting diode, and as shown in FIG. 1, a single crystal substrate 1 for epitaxial growth formed in a rectangular shape (for example, a square shape), and a single crystal substrate An n-type nitride semiconductor layer 3 formed on one surface side of the n-type via the buffer layer 2, and a light-emitting layer 4 and a p-type nitride semiconductor layer 5 formed on the surface side of the n-type nitride semiconductor layer 3 A light emitting region 6 having a laminated structure, an n-type contact region 7 formed on the surface side of the n-type nitride semiconductor layer 3 on the side of the light emitting region 6 and spaced apart from the light emitting region 6, and an n-type nitride semiconductor The isolation trench 8 for pn isolation formed between the light emitting region 6 and the n-type contact region 7 on the surface side of the layer 3 and the light emitting layer 4 side in the p-type nitride semiconductor layer 5 of the light emitting region 6 are A rectangular shape formed on the opposite side (here square ) And an anode electrode (p electrode) 10 which is a pad of a rectangular shape (here, square shape) formed on the opposite side of the n-type contact region 7 to the n-type nitride semiconductor layer 3 side. And an electrode (n electrode) 11.

  The n-type contact region 7 described above is a laminated structure portion of the light emitting layer 4 and the p-type nitride semiconductor layer 5 formed on the entire surface side of the n-type nitride semiconductor layer 3 as will be described later (FIG. 2A ))), The formation region of the n-type contact region 7 is irradiated with a pulse laser beam to change the conductivity type of the formation-scheduled region to the n-type (here, the formation of the n-type contact region 7). The conductive region is changed to n-type by irradiating the planned region with pulsed laser light to make the formation planned region amorphous, and the separation groove portion 8 is scheduled to form the separation groove portion 8 in the laminated structure portion. The region is formed by irradiating and etching a pulse laser beam, and the light emitting region 6 is constituted by the remaining portion of the region where the n-type contact region 7 and the separation groove 8 are formed in the stacked structure portion. .

  Here, the separation groove portion 8 is formed in an L shape in plan view, and an n-type contact region 7 is formed in a rectangular section partitioned by the separation groove portion 8 in plan view, and a light emitting region is formed in the L shape section. 6 is formed. Here, in the nitride semiconductor light emitting device of this embodiment, the formation position of the separation groove 8 is set so that the area of the light emitting region 6 is approximately three times the area of the n-type contact region 7 in plan view. Further, the anode electrode 10 is formed on the p-type nitride semiconductor layer 5 in the light emitting region 6 so as to have a shape similar to that of the p-type nitride semiconductor layer 5 in plan view and smaller than the p-type nitride semiconductor layer 5. It is formed on the translucent electrode 9 made. The cathode electrode 11 is formed on the n-type contact region 7 so as to have a shape similar to that of the n-type contact region 7 in plan view and smaller than the n-type contact region 7.

  Hereinafter, the above-described nitride semiconductor light emitting device will be described in more detail.

  As the single crystal substrate 1 described above, a sapphire substrate having one surface with a (0001) plane, that is, a c-plane is used.

  The buffer layer 2 is provided to reduce threading dislocations in the n-type nitride semiconductor layer 3 and to reduce residual strain in the n-type nitride semiconductor layer 3, and is composed of an AlN layer having a film thickness of 25 nm. It is. The film thickness of the buffer layer 2 is not limited to 25 nm. The material of the buffer layer 2 is not limited to AlN, and may be GaN or AlGaN, for example.

In forming the buffer layer 2, the single crystal substrate 1 made of a sapphire substrate is introduced into a reaction furnace of an MOCVD apparatus (metal organic vapor phase growth apparatus), and then the pressure in the reaction furnace is set to a predetermined growth pressure (for example, 10 kPa). The surface of the single crystal substrate 1 is cleaned by heating for a predetermined time (for example, 10 minutes) after raising the substrate temperature to a predetermined temperature (for example, 1250 ° C.) while maintaining at approximately 76 Torr). With the substrate temperature maintained at a predetermined growth temperature (for example, 500 ° C.), the flow rate of trimethylaluminum (TMAl), which is an aluminum raw material, is set to 0.02 L / min (20 SCCM) in a standard state, and nitrogen the flow rate of raw material ammonia (NH ₃₎ after setting the 2L / min (2SLM) under standard conditions, and TMAl and NH ₃ same of Then, the amorphous AlN layer is deposited in the reaction furnace, and then the substrate temperature is raised to a predetermined annealing temperature (for example, 1100 ° C.) to bring the substrate temperature to the above annealing temperature for a predetermined annealing time ( For example, a buffer layer 2 made of a polycrystallized AlN layer is obtained by annealing for 5 minutes. The buffer layer 2 is not limited to the AlN layer, but may be a GaN layer or an AlGaN layer.

The n-type nitride semiconductor layer 3 is composed of an n-type GaN layer formed on the buffer layer 2. Here, the film thickness of the n-type nitride semiconductor layer 3 is set to 4 μm, but is not particularly limited. The n-type nitride semiconductor layer 3 is not limited to a single layer structure, and may have a multilayer structure. For example, the n-type Al _0.2 Ga _0.8 N layer on the buffer layer 2 and the n-type Al _0.2 Ga _0.8 N layer The n-type GaN layer may be used.

The growth conditions of the n-type nitride semiconductor layer 3 include a growth temperature of 1100 ° C., a growth pressure of the predetermined growth pressure (here, 10 kPa), trimethylgallium (TMGa) as a gallium source, and NH as a nitrogen source. _3. Tetraethylsilane (TESi) is used as a raw material of silicon (Si), which is an impurity imparting n-type conductivity, and H ₂ gas and N ₂ gas are used as carrier gases for transporting each raw material. . Here, the flow rate of TESi is set to 0.0009 L / min (0.9 SCCM) in a standard state. Each raw material is not particularly limited. For example, triethylgallium (TEGa) may be used as a gallium raw material, a hydrazine derivative may be used as a nitrogen raw material, and monosilane (SiH ₄ ) may be used as a silicon raw material.

In the light emitting layer 4, the barrier layer is composed of an In _0.02 Ga _0.98 N layer having a thickness of 10 nm, and the well layer is composed of an In _0.20 Ga _0.80 N layer having a thickness of 2 nm. Here, the light emitting layer 4 has a multiple quantum well structure in which the barrier layers and the well layers are alternately stacked so that the number of the well layers is three. In addition, each composition of the said well layer and the said barrier layer is not limited, What is necessary is just to set suitably according to a desired light emission wavelength. The number of the well layers is not particularly limited, and for example, a single quantum well structure with one well layer may be adopted. Further, the thicknesses of the barrier layer and the well layer are not particularly limited.

Here, as the growth conditions of the light emitting layer 4, the growth temperature is set to 750 ° C., the growth pressure is set to the predetermined growth pressure (here, 10 kPa), TMIn is used as the indium raw material, TMGa is used as the gallium raw material, and the raw material is nitrogen. NH ₃ is used, and N ₂ gas is used as a carrier gas for transporting each raw material. Note that the light emitting layer 4 appropriately changes the molar ratio (flow rate ratio) of the group III material between the growth of the barrier layer and the growth of the well layer.

The p-type nitride semiconductor layer 5 includes a first p-type semiconductor layer made of a p-type Al _0.10 Ga _0.90 N layer formed on the light emitting layer 4 and a p-type formed on the first p-type semiconductor layer. It is comprised with the 2nd p-type semiconductor layer which consists of GaN layers. Here, in each composition of the first p-type semiconductor layer and the second p-type semiconductor layer, the band gap energy of the first p-type semiconductor layer is larger than the band gap energy of the second p-type semiconductor layer. It is set as follows. In the p-type nitride semiconductor layer 5, the thickness of the first p-type semiconductor layer is set to 20 nm, and the thickness of the second p-type semiconductor layer is set to 50 nm. Not what you want.

Here, as growth conditions for the first p-type semiconductor layer of the p-type nitride semiconductor layer 5, the growth temperature is 1100 ° C., the growth pressure is the predetermined growth pressure (here, 10 kPa), and the aluminum raw material is used. TMAl, TMGa as a gallium source, NH ₃ as a nitrogen source, and cyclopentadienylmagnesium (Cp ₂ Mg) as a source of magnesium which is an impurity imparting p-type conductivity, and a carrier for transporting each source As the gas, H ₂ gas is used. The growth condition of the second p-type semiconductor layer is basically the same as the growth condition of the first p-type semiconductor layer, except that the supply of TMAl is stopped. Note that the flow rate of Cp ₂ Mg is 0.02 L / min (20 SCCM) in a standard state during the growth of each p-type semiconductor layer.

  By the way, in the manufacture of the nitride semiconductor light emitting device of this embodiment, the buffer layer 2, the n-type nitride semiconductor layer 3, the light emitting layer 4, and the p-type nitride semiconductor layer are formed on the entire surface of the one crystal substrate 1. Crystal growth in which 5 is sequentially grown by the MOCVD apparatus is performed at the wafer level to obtain the structure shown in FIG. 2A (however, FIG. 2A is shown at the chip level).

After the crystal growth by the MOCVD apparatus is completed, the wafer is taken out of the MOCVD apparatus, and annealing for activating the p-type nitride semiconductor layer 5 (hereinafter referred to as activation annealing) is performed. Here, the activation annealing is performed using a lamp annealing apparatus. Specifically, the wafer described above after placing the sample table lamp annealing apparatus, the atmosphere in the annealing chamber was replaced by N ₂ gas, then the flow rate of N ₂ gas was 5L / min (5SLM) under standard conditions The sample stage is heated to 750 ° C., and activation annealing is performed for a predetermined time (for example, 5 minutes).

  After performing activation annealing on the p-type nitride semiconductor layer 5 as described above, the light emitting layer 4 and the p-type nitride semiconductor layer formed on the entire surface side of the n-type nitride semiconductor layer 3 By performing laser processing at the wafer level to form the n-type contact region 7 and the separation groove portion 8 by irradiating the respective formation scheduled regions of the n-type contact region 7 and the separation groove portion 8 in the laminated structure portion 5 with the pulse laser beam. The structure shown in FIG. 2B is obtained (however, FIG. 2B is shown at the chip level). Here, the light emitting region 6 is configured by the remaining portion of the stacked structure portion where the n-type contact region 7 and the isolation groove portion 8 are formed.

  In the laser processing described above, a laser irradiation apparatus equipped with a pulse laser is used. As the pulse laser for forming the n-type contact region 7, a pulse laser having a pulse laser beam of less than 10 ps is suitable, and the separation groove 8 As the pulse laser for forming the laser beam, an ultra-high intensity pulse laser (so-called femtosecond laser) having a pulse width of less than 1 ps is suitable. As an ultra-high intensity pulse laser, the wavelength of the laser beam is 800 nm. A mode-locked Ti: sapphire laser is used.

Here, in the formation of the n-type contact region 7 described above, after the wafer is placed on the sample stage of the laser irradiation apparatus, the wafer is fixed to the sample stage by a vacuum chuck, and the n-type in the laminated structure portion. The n-type contact region 7 is formed by irradiating the region where the contact region 7 is to be formed with pulse laser light to make it amorphous. Here, in the formation of the n-type contact region 7, the energy density of the mode-locked Ti: sapphire laser is set to 180 mJ / cm ² , the pulse width is set to 100 fs, the repetition frequency is set to 1 kHz, and the n-type contact region 7 is formed using the movable mirror. A pulse laser beam is scanned in a region where the shaped contact region 7 is to be formed. By the scanning, the region where the n-type contact region 7 is to be formed in the p-type nitride semiconductor layer 5 and the light emitting layer 4 in the stacked structure portion is amorphized to form a large number of defects and has n-type conductivity. (Ie, the conductivity type changes to n-type). In the present embodiment, a part of the n-type nitride semiconductor layer 3 is also made amorphous, but at least a region where the n-type contact region 7 is to be formed in at least the p-type nitride semiconductor layer 5 and the light emitting layer 4 is formed. What is necessary is just to make it amorphous to the depth which reaches the n-type nitride semiconductor layer 3. Further, in order to amorphize the first predetermined depth (more than the depth reaching the surface of the n-type nitride semiconductor layer 3 from the surface of the p-type nitride semiconductor layer 5), a pulse laser beam is applied to the same portion. You may irradiate several times.

In forming the separation groove 8 described above, the separation groove 8 is formed by irradiating and etching a pulse laser beam on a region where the separation groove 8 is to be formed in the stacked structure portion. Here, in the formation of the separation groove 8, the energy density of the mode-locked Ti: sapphire laser is set to 500 mJ / cm ² , the pulse width is set to 100 fs, the repetition frequency is set to 1 kHz, and the separation groove 8 in the laminated structure is formed using a movable mirror. The region to be formed is scanned with pulsed laser light. At this time, the pulse laser beam is irradiated until the separation groove 8 reaches a second predetermined depth (> first predetermined depth) that reaches the middle of the n-type nitride semiconductor layer 3. In order to form the separation groove portion 8 to the second predetermined depth, the same portion may be irradiated with pulsed laser light several times.

In this embodiment, the separation groove 8 is formed after the n-type contact region 7 is formed.
The order in which the n-type contact region 7 and the separation groove 8 are formed is not particularly limited. For example, the n-type contact region 7 and the separation groove can be changed by changing the irradiation condition of the pulse laser light during scanning of the pulse laser light. 8 can be formed continuously. In addition, the energy density of the pulsed laser beam when forming the n-type contact region 7 and the isolation trench 8 is appropriately determined according to various conditions such as the wavelength of the laser beam and the materials of the p-type nitride semiconductor 5 and the light emitting layer 4. The energy density and wavelength of the pulse laser beam are not particularly limited.

  After forming the n-type contact region 7 and the isolation groove 8 described above, the light-transmitting electrode 9, the anode electrode 10, and the cathode electrode 11 are sequentially formed, whereby the nitride semiconductor light emitting device having the structure shown in FIG. Is obtained (however, FIG. 2C is shown at the chip level).

  Here, the translucent electrode 9 is constituted by a laminated film of a Ni film having a thickness of 2 nm and an Au film having a thickness of 3 nm, and the anode electrode 10 is constituted by an Au film having a thickness of 150 nm. The electrode 11 is composed of a laminated film of a Ti film having a thickness of 20 nm and an Au film having a thickness of 150 nm, but these thicknesses are not particularly limited.

In the formation of the translucent electrode 9 described above, a resist layer (hereinafter referred to as a first layer) in which a region where the translucent electrode 9 is to be formed is opened on the one surface side of the single crystal substrate 1 using photolithography technology. (Referred to as a resist layer), the wafer is introduced into the chamber of the vapor deposition apparatus, and after the chamber is at a predetermined pressure (for example, 266 × 10 ⁻⁶ Pa), the Ni film is reduced to 2 μm / s. An Au film is formed at a deposition rate of 5 Å / s, and then the wafer is taken out from the chamber of the vapor deposition apparatus, and the first resist layer and the Ni film on the first resist layer are formed. And lift-off to remove an unnecessary film made of a laminated film of Au and Au. In addition, the film-forming speed | rate of each Ni film | membrane and Au film | membrane is an example, and it does not specifically limit it.

Next, in forming the anode electrode 10, a resist layer (hereinafter referred to as a second resist layer) in which a region where the anode electrode 10 is to be formed is opened on the one surface side of the single crystal substrate 1 using photolithography technology. After the wafer is introduced into the chamber of the vapor deposition apparatus and the inside of the chamber reaches a predetermined pressure (for example, 266 × 10 ⁻⁶ Pa), the Au film is formed at a deposition rate of 5 Å / s. After that, the wafer is taken out from the chamber of the vapor deposition apparatus, and lift-off is performed to remove the unnecessary film composed of the second resist layer and the Au film on the second resist layer. The deposition rate of the Au film is an example and is not particularly limited.

Thereafter, the anode electrode 10 is annealed by a lamp annealing apparatus. Specifically, the wafer described above after placing the sample table lamp annealing apparatus, the atmosphere in the annealing chamber was replaced by N ₂ gas, then the flow rate of N ₂ gas was 5L / min (5SLM) under standard conditions The sample stage is heated to 500 ° C. and annealed for a predetermined time (for example, 10 minutes). The annealing apparatus used for annealing the anode electrode 10 is not limited to the lamp annealing apparatus, and other known annealing apparatuses may be used. Also, the annealing conditions are not particularly limited.

Next, in forming the cathode electrode 11, a resist layer (hereinafter referred to as a third resist layer) in which a region where the cathode electrode 11 is to be formed is opened on the one surface side of the single crystal substrate 1 using photolithography technology. After the wafer is introduced into the chamber of the vapor deposition apparatus and the inside of the chamber reaches a predetermined pressure (for example, 266 × 10 ⁻⁶ Pa), the Ti film is formed at a deposition rate of 2 Å / s. Then, an Au film is formed at a deposition rate of 5 Å / s. Thereafter, the wafer is taken out from the chamber of the vapor deposition apparatus, and the third resist layer and the Ti film and the Au film on the third resist layer are formed. Lift-off is performed to remove the unnecessary film consisting of the laminated film. In addition, the film-forming speed | rate of each Ti film | membrane and Au film | membrane is an example, and it does not specifically limit it.

Thereafter, the cathode electrode 11 is annealed by a lamp annealing apparatus. Specifically, the wafer described above after placing the sample table lamp annealing apparatus, the atmosphere in the annealing chamber was replaced by N ₂ gas, then the flow rate of N ₂ gas was 5L / min (5SLM) under standard conditions The sample stage is heated to 350 ° C. and annealed for a predetermined time (for example, 5 minutes). The annealing apparatus used for annealing the anode electrode 10 is not limited to the lamp annealing apparatus, and other known annealing apparatuses may be used. Also, the annealing conditions are not particularly limited.

  In the manufacture of the nitride semiconductor light emitting device of this embodiment, a plurality of nitride semiconductor light emitting devices are formed on one wafer by performing all steps until the above-described annealing of the cathode electrode 11 is completed at the wafer level. After that, the individual nitride semiconductor light emitting elements are separated. Here, in this embodiment, when the nitride semiconductor light emitting elements are separated from the wafer, the pulse laser light having a pulse width of less than 1 ps is irradiated to separate the nitride semiconductor light emitting elements.

More specifically, when separating the individual nitride semiconductor light emitting devices from the wafer, the wafer is placed on the sample stage of the laser irradiation apparatus described above, and then the wafer is fixed to the sample stage by a vacuum chuck, and the wafer is placed on the street of the wafer. Along with this, laser light is irradiated to separate the individual nitride semiconductor light emitting devices. Here, when the nitride semiconductor light emitting device is separated from the wafer, the energy density of the mode-locked Ti: sapphire laser is set to 500 mJ / cm ² , the pulse width is set to 100 fs, the repetition frequency is set to 1 kHz, and a movable mirror is used. A pulsed laser beam is scanned along the street.

  Therefore, when separating the individual nitride semiconductor light emitting elements from the wafer, the pulse laser used for forming the n-type contact region 7 and the separation groove 8 can be used, so that a dicer is not required and the cost is low. In addition, it is possible to prevent damage from occurring when the nitride semiconductor light emitting element is separated from the wafer.

  According to the nitride semiconductor light emitting device of the present embodiment described above, the light emitting region 6 formed on the surface side of the n-type nitride semiconductor layer 3 and having a stacked structure of the light emitting layer 4 and the p-type nitride semiconductor layer 5 is provided. The n-type contact region 7 formed on the surface side of the n-type nitride semiconductor layer 3 on the side of the light-emitting region 6 and spaced from the light-emitting region 6, and the light emission on the surface side of the n-type nitride semiconductor layer 3. An isolation groove portion 8 formed between the region 6 and the n-type contact region 7; an anode electrode 10 formed on the side of the light-emitting region 6 opposite to the light-emitting layer 4 side in the p-type nitride semiconductor layer 5; A cathode electrode 11 formed on the opposite side to the n-type nitride semiconductor layer 3 side in the n-type contact region 7, and the n-type contact region 7 is formed on the entire surface side of the n-type nitride semiconductor layer 3. Light emitting layer 4 and p-type nitride semiconductor layer 5 The formation region of the n-type contact region 7 in the stacked structure portion is irradiated with a pulse laser beam to change the conductivity type of the planned formation region to the n-type, and the separation groove 8 is formed in the stacked structure portion. The region where the separation groove 8 is to be formed is formed by irradiating and etching a pulse laser beam, and the light emitting region 6 is the remainder of the region where the n-type contact region 7 and the separation groove 8 are formed in the stacked structure portion. Therefore, there is no need to expose the surface of the n-type nitride semiconductor layer 3 using conventional photolithography technology and etching technology, and the production process can be simplified and produced. Can be improved, and the cost can be reduced.

  Further, in the nitride semiconductor light emitting device of this embodiment, since the light emitting region 6 and the n-type contact region 7 are spatially separated by the separation groove 8 for pn separation, carriers are efficiently injected into the light emitting layer 4. It becomes possible to do.

  Further, according to the method for manufacturing the nitride semiconductor light emitting device of the present embodiment, the light emitting layer 4 formed on the entire surface of the n type nitride semiconductor layer 3 when forming the n type contact region 7 and the isolation groove 8. And the n-type contact region 7 and the separation groove 8 in the stacked structure portion of the p-type nitride semiconductor layer 5 are irradiated with pulse laser beams having pulse widths of less than 10 ps and less than 1 ps as pulse laser beams, respectively. Since the n-type contact region 7 and the isolation groove 8 are formed, the manufacturing process can be simplified, the productivity can be improved, and a low-cost nitride semiconductor light emitting device can be provided. Since it is possible to suppress the occurrence of thermal damage around the irradiated portion, the n-type contact region 7 and the separation groove 8 are formed with high accuracy and reproducibility. It can be.

  By the way, in the said embodiment, although illustrated about the method of manufacturing a nitride semiconductor light-emitting device using MOCVD method, the crystal growth method is not limited to MOCVD method, For example, halide vapor phase epitaxy (HVPE) Method), molecular beam epitaxy (MBE), or the like.

  In the above embodiment, the sapphire substrate is used as the single crystal substrate 1 in the nitride semiconductor light emitting device. However, the single crystal substrate 1 is not limited to the sapphire substrate. For example, a spinel substrate, a silicon substrate, and silicon carbide. A substrate, a zinc oxide substrate, a gallium phosphide substrate, a gallium arsenide substrate, a magnesium oxide substrate, a zirconium boride substrate, a group III nitride semiconductor crystal substrate, or the like may be used.

  Moreover, in the said embodiment, although the visible light light emitting diode was illustrated as a nitride semiconductor light emitting element, not only a visible light light emitting diode but an ultraviolet light emitting diode and an infrared light emitting diode may be sufficient.

  In the above embodiment, a mode-locked Ti: sapphire laser is used as a laser having a pulse width of less than 1 ps. However, the laser is not limited to a mode-locked Ti: sapphire laser, for example, a YAG laser or these laser beams. Wavelength converted lasers (SHG-Ti: sapphire laser, THG-Ti: sapphire laser, FHG-Ti: sapphire laser, SHG-YAG laser, THG-YAG laser, FHG-YAG laser, etc.), excimer laser, etc. Good.

1 is a schematic perspective view of a nitride semiconductor light emitting device of an embodiment. It is explanatory drawing of the manufacturing method of the nitride semiconductor light-emitting device same as the above. It is a schematic sectional drawing of the nitride semiconductor light-emitting device which shows a prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Single crystal substrate 3 N type nitride semiconductor layer 4 Light emitting layer 5 P type nitride semiconductor layer 6 Light emitting region 7 N type contact region 8 Separation groove part 10 Anode electrode 11 Cathode electrode

Claims (3)

  Stack structure of a single crystal substrate, an n-type nitride semiconductor layer formed on one surface side of the single crystal substrate, and a light emitting layer and a p-type nitride semiconductor layer formed on the surface side of the n-type nitride semiconductor layer A light emitting region having an n-type contact region formed on a side of the light emitting region on the surface side of the n-type nitride semiconductor layer and spaced from the light emitting region, and light emitting on the surface side of the n-type nitride semiconductor layer An isolation groove formed between the region and the n-type contact region, an anode electrode formed on the light-emitting region opposite to the light-emitting layer side in the p-type nitride semiconductor layer, and an n-type nitridation in the n-type contact region A cathode electrode formed on the opposite side of the metal semiconductor layer side, and the n-type contact region includes a light emitting layer formed on the entire surface side of the n-type nitride semiconductor layer and a p-type nitride semiconductor layer. The n-type core in the laminated structure The formation region of the tact region is irradiated with pulsed laser light to change the conductivity type of the formation region to n-type, and the separation groove portion is formed of a pulse laser in the formation region of the separation groove portion in the stacked structure portion. A nitride formed by irradiating and etching light, wherein the light emitting region is constituted by the remaining portion of the region where the n-type contact region and the isolation groove portion are formed in the laminated structure portion Semiconductor light emitting device.   2. The method for manufacturing a nitride semiconductor light emitting device according to claim 1, wherein the light emitting layer and the p type nitride semiconductor are formed on the entire surface of the n type nitride semiconductor layer when forming the n type contact region and the isolation groove. The n-type contact region and the separation groove are formed by irradiating the laser beam with a pulse width of less than 10 ps and less than 1 ps as the pulse laser beam to the formation region of each of the n-type contact region and the separation groove in the laminated structure with the layer A method for manufacturing a nitride semiconductor light emitting device, comprising:   A plurality of nitride semiconductor light emitting devices are formed on a single wafer and then separated into individual nitride semiconductor light emitting devices. When separating from a wafer into individual nitride semiconductor light emitting devices, the pulse width is less than 1 ps. 3. The method for manufacturing a nitride semiconductor light emitting device according to claim 2, wherein the nitride semiconductor light emitting device is separated into individual nitride semiconductor light emitting devices by irradiation with a pulse laser beam.

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