JP2010015187A - Display and drive control method thereof - Google Patents

Display and drive control method thereof Download PDF

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Publication number
JP2010015187A
JP2010015187A JP2009243090A JP2009243090A JP2010015187A JP 2010015187 A JP2010015187 A JP 2010015187A JP 2009243090 A JP2009243090 A JP 2009243090A JP 2009243090 A JP2009243090 A JP 2009243090A JP 2010015187 A JP2010015187 A JP 2010015187A
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Prior art keywords
display
display pixel
current
light emitting
voltage
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JP2009243090A
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Japanese (ja)
Inventor
Jun Ogura
Takeshi Ozaki
Tomoyuki Shirasaki
Manabu Takei
Ikuhiro Yamaguchi
潤 小倉
剛 尾崎
郁博 山口
学 武居
友之 白嵜
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Casio Comput Co Ltd
カシオ計算機株式会社
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Priority to JP2009243090A priority Critical patent/JP2010015187A/en
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Abstract

PROBLEM TO BE SOLVED: To improve display image quality by suppressing a shortage of writing of display data due to a capacitance component parasitic on a data line arranged in a display panel and causing a light emitting element to emit light at an appropriate luminance gradation. Provided is a display device and a driving control method thereof.
A display device 100A sets a display pixel EM for each row to a selected state by applying a scanning signal Vsel to a display panel 110 in which a plurality of display pixels EM are two-dimensionally arranged and each scanning line SL. Scanning driver 120, data driver 130 for supplying gradation current Ipix corresponding to display data to each data line DL, and precharge voltage Vpcg applied to each data line DL at a timing prior to supply of gradation current Ipix. And a reset circuit 150 that applies a reset voltage Vrst to each display pixel EM at a timing prior to application of the precharge voltage Vpcg.
[Selection] Figure 1

Description

  The present invention relates to a display device and a drive control method therefor, and in particular, a plurality of display pixels each including a current control type light emitting element that emits light at a predetermined luminance gradation by supplying a current according to display data. The present invention relates to a display device including a display panel and a drive control method in the display device.

  Conventionally, a light emitting operation is performed at a predetermined luminance gradation in accordance with a current value of a driving current supplied like an organic electroluminescent element (hereinafter abbreviated as “organic EL element”) or a light emitting diode (LED). 2. Description of the Related Art A light emitting element type display (display device) including a display panel in which display pixels each having a current control type light emitting element are two-dimensionally arranged is known.

  In particular, a light-emitting element type display using an active matrix driving method has a higher display response speed than a liquid crystal display (LCD) widely used in various electronic devices including portable devices in recent years. There is no viewing angle dependency, and it is possible to achieve high brightness, high contrast, high definition of display image quality, etc., and unlike the case of liquid crystal display devices, a backlight is not required, making it even thinner and lighter. It has the extremely advantageous feature of being able to reduce power consumption, and research and development are actively conducted as a next-generation display.

  In such a light emitting element type display, various drive control mechanisms and control methods for controlling light emission of the above-described current control type light emitting element have been proposed. For example, as described in Patent Document 1 and the like, for each display pixel constituting the display panel, in addition to the light-emitting element, a drive circuit including a plurality of switching means for controlling light emission of the light-emitting element ( A device having a light emission drive circuit) is known.

  FIG. 23 is a schematic configuration diagram showing a main part of a light emitting element type display in the prior art, and FIG. 24 is a configuration example of display pixels (light emitting drive circuit and light emitting element) applicable to the light emitting element type display in the prior art. FIG.

  As shown in FIG. 23, the active matrix organic EL display device described in Patent Document 1 generally includes a plurality of scanning lines (selection lines) SL and data lines (signal lines) arranged in the row and column directions. ) A display panel 110P in which a plurality of display pixels EMp are arranged in a matrix in the vicinity of each intersection of DL, a scanning driver (scanning line driving circuit) 120P connected to each scanning line SL, and a connection to each data line DL As shown in FIG. 24, each display pixel EMp has a gate terminal on the scanning line SL, and a source terminal and a drain terminal on the data line. The thin film transistor (TFT) Tr111 connected to the DL and the contact N111 respectively, and the gate terminal is connected to the contact N111, and the source terminal A light emitting drive circuit DCp including a thin film transistor Tr112 to which a ground potential Vgnd is applied, and an anode terminal connected to a drain terminal of the thin film transistor Tr112 of the light emission drive circuit DCp, and a cathode terminal having a potential lower than the ground potential Vgnd It has an organic EL element (current control type light emitting element) OEL to which a low power supply voltage Vss is applied.

  Here, in FIG. 24, Cp is a storage capacitor formed (or connected) between the gate and source of the thin film transistor Tr112. The thin film transistor Tr111 is formed of an n-channel field effect transistor, and the thin film transistor Tr112 is formed of a p-channel field effect transistor.

  In the display device including the display panel 110P including the display pixel EMp having such a configuration, first, the scan driver 120P sequentially applies the high level scan signal Vsel to the scan line SL of each row, thereby The thin film transistor Tr111 of each display pixel EMp (light emission drive circuit DCp) is turned on, and the display pixel EMp is set to the selected state.

  In synchronization with this selection timing, the grayscale signal voltage Vpix corresponding to the display data is generated by the data driver 130P and applied to the data line DL of each column, whereby the grayscale signal voltage Vpix is applied to each display pixel EMp. The voltage is applied to the contact N111 (that is, the gate terminal of the thin film transistor Tr112) via the thin film transistor Tr111 of the (light emission drive circuit DCp). Thereby, the thin film transistor Tr112 is turned on in a conductive state corresponding to the gradation signal voltage Vpix, and a predetermined light emission drive current flows from the ground potential Vgnd to the low power supply voltage Vss through the thin film transistor Tr112 and the organic EL element OEL. The organic EL element OEL emits light at a luminance gradation corresponding to display data.

  Next, by applying a low level scanning signal Vsel from the scanning driver 120P to the scanning line SL, the thin film transistor Tr111 of the display pixel EMp in each row is turned off, and the display pixel EMp is set to a non-selected state. The data line DL and the light emission drive circuit DCp are electrically disconnected. At this time, on the basis of the voltage applied to the gate terminal of the thin film transistor Tr112 and held in the storage capacitor Cp, the thin film transistor Tr112 is maintained in the on state. The light emission drive current flows to the organic EL element OEL via the thin film transistor Tr112, and the light emission operation is continued. This light emission operation is controlled so as to continue, for example, for one frame period until the gradation signal voltage Vpix corresponding to the next display data is applied (written) to the display pixel EMp of each row.

  Such a drive control method adjusts the voltage (gradation signal voltage Vpix) applied to each display pixel EMp (the gate terminal of the thin film transistor Tr112 of the light emission drive circuit DCp), thereby causing the light emission drive current to flow through the organic EL element OEL. This is called a voltage designation method (or voltage application method) because the light emission operation is performed at a predetermined luminance gradation by controlling the current value of the current.

  By the way, in the display pixel EMp provided with the light emission drive circuit DCp adopting such a voltage designation method, the element characteristics (channel resistance and the like) of the thin film transistor Tr111 having the selection function and the thin film transistor Tr112 having the light emission drive function are affected by the external environment. When variation or fluctuation (deterioration) occurs depending on (ambient temperature, etc.) or use time, the light emission driving current supplied to the light emitting element (organic EL element OEL) fluctuates. There is a problem that it becomes difficult to stably realize desired light emission characteristics (display with a predetermined luminance gradation) over a period of time.

  Further, when each display pixel is miniaturized in order to increase the definition of the display panel, variation in operating characteristics (such as a source-drain current) of the thin film transistors Tr111 and Tr112 constituting the light emission driving circuit DCp increases. Appropriate gradation control cannot be performed, and there is a problem in that the light emission characteristics of each display pixel vary and display image quality deteriorates.

  Therefore, as a configuration for solving such a problem, a configuration of a light emission driving circuit corresponding to a drive control method called a current application method (or current designation method) is known. A configuration example of a display pixel (light emission drive circuit) corresponding to this current application method will be described in detail in “Best Mode for Carrying Out the Invention” described later. (Function).

  That is, in a light emission drive circuit applied to a display pixel corresponding to a current application method, a current value of a light emission drive current supplied to a light emitting element (for example, the organic EL element described above) and a drive current for controlling the supply state A control means (corresponding to the above-described thin film transistor Tr112 and holding capacitor Cp), and a gradation current designating a current value corresponding to display data is directly supplied from the data driver to the drive current control means; The current value of the light emission driving current and the supply state thereof are controlled based on the voltage held based on the above, and the light emitting element is continuously operated to emit light at a predetermined luminance gradation.

  Therefore, in the light emission driving circuit adopting the current application method, the function of converting the current level of the gradation current according to the display data supplied to each display pixel into the voltage level (current / voltage conversion) by the driving current control means. Function) and a function of supplying a light emission driving current having a predetermined current value based on the voltage level to the light emitting element (light emission driving function). By comprising an active element (thin film transistor), there is an advantage that the influence on the light emission drive current can be suppressed by the variation in the operation characteristics between the plurality of thin film transistors as shown in FIG.

JP 2002-156923 A (pages 3 to 4, FIGS. 1 and 2)

However, the light emission drive circuit employing the current application method as described above has the following problems.
In other words, in the current designation type light emission driving circuit, when the gradation current based on the display data having the lowest or relatively low luminance gradation is written to each display pixel (at the time of low gradation display), the luminance gradation of the display data is displayed. It is necessary to supply a signal current having a small current value corresponding to 1 to each display pixel.

  Here, the operation of writing display data (gradation current) to each display pixel is performed by applying a capacitance component parasitic to the data line (parasitic capacitance; caused by inter-wiring capacitance, storage capacitance provided in the display pixel, etc.) to a predetermined value. This corresponds to charging to a voltage. Since this parasitic capacitance is a capacitance component added to the data line, it is the same at any position (display pixel) on the data line and supplies a gradation current based on the same luminance gradation. In some cases, approximately the same writing time is required.

  Therefore, for example, when the number of scanning lines increases due to an increase in the size or definition of the display panel, the selection period of each scanning line (that is, the writing time to each display pixel) is set to be relatively short. In addition, when the wiring length of the data line is designed to be long and the number of display pixels connected to the data line is increased, the parasitic capacitance increases. As the value becomes smaller (that is, as the gray scale is displayed), the parasitic capacitance is charged with a shorter writing time, and the display data cannot be sufficiently written to each display pixel. A shortage occurs.

  As a result, the current value of the light emission drive current supplied to the light emitting element (organic EL element) of each display pixel becomes smaller than the gradation current (write current) at the time of writing, and it corresponds to the display data. There has been a problem in that the light emission operation cannot be performed at an appropriate luminance gradation, resulting in deterioration of display image quality. It should be noted that detailed simulation results for this problem will be described in detail in “Best Mode for Carrying Out the Invention” to be described later for convenience of explanation.

  In view of the above-described problems, the present invention is a current application type drive in which a gradation current corresponding to display data is supplied to each display pixel constituting a display panel to emit light at a predetermined luminance gradation. In a display device that employs a control method, the display data (gradation current) due to the capacitive component parasitic on the data line is prevented from being insufficiently written, and the light emitting element is caused to emit light at an appropriate luminance gradation, thereby improving the display image quality. It is an object of the present invention to provide a display device and a drive control method for the display device.

  According to the first aspect of the present invention, a plurality of display pixels arranged near the intersections of a plurality of signal lines and a plurality of scanning lines arranged so as to be orthogonal to each other on the display panel are provided via the signal lines. Supplying a gradation current based on the luminance gradation component of the display data, causing the current control type light emitting element provided in the display pixel to emit light at a predetermined luminance gradation based on the gradation current; In the display device that displays desired image information on the display panel, each display pixel includes a storage capacitor that holds a charge based on the gradation current as a voltage component, and one end connected to one end of the light emitting element. A current path to which a power supply voltage is applied and a control terminal, and the holding capacitor is provided between one end or the other end of the current path and the control terminal, and held by the holding capacitor Light emission based on voltage components And a drive current control means having an active element for supplying a dynamic current to the light emitting element to cause the light emitting element to emit light, and applying a scanning signal to at least each of the scanning lines. Scanning drive means for setting each display pixel connected to each scanning line to a selected state, and generating the gradation current based on a luminance gradation component of the display data, and passing through each signal line A signal driving unit that supplies the display pixels set in the selected state by the scanning driving unit, and a precharge voltage is applied to each signal line, and a parasitic capacitance added to each signal line is set to a predetermined value. Precharge means for setting the state of charge, power supply drive means for supplying the power supply voltage to the other end of the current path of the active element of each display pixel, and each table by the scan drive means. When the pixel is set to a non-selected state and the parasitic capacitance is set to a predetermined charging state by the precharge means, the power supply driving means is controlled to set the power supply voltage and the light emitting element to a non-light emitting state. The first power supply voltage to be set is set, each display pixel is set to a selected state by the scanning driving means, the gradation current is supplied to each display pixel by the signal driving means, When holding the electric charge based on the gradation current in the holding capacitor, the power supply driving unit is controlled to set the power supply voltage to the first power supply voltage, and the display driving unit sets each display pixel. When setting the light emitting element to the light emitting state by setting the light emitting element to the non-selected state, the power supply driving unit is controlled to set the power supply voltage to the light emitting element in the light emitting state. Second power different from And an operation control unit configured to control the light emitting element to perform a light emission operation based on the electric charge held in the storage capacitor of each display pixel by setting to a source voltage.

  According to a second aspect of the present invention, in the display device according to the first aspect, the parasitic capacitance includes an interwiring capacitance formed between the signal line and the scanning line.

According to a third aspect of the present invention, in the display device according to the first or second aspect, the precharge means simultaneously applies the precharge voltage to all the signal lines provided in the display panel. The switching means to apply is provided, It is characterized by the above-mentioned.
According to a fourth aspect of the present invention, in the display device according to any one of the first to third aspects, the display device discharges at least the electric charge held in the display pixel and puts the display pixel into a reset state. A reset unit for setting, and the operation control unit controls the scan pixel to set the display pixel to a selected state when discharging the charge held in the display pixel by the reset unit. It is characterized by doing.

According to a fifth aspect of the present invention, in the display device according to the fourth aspect, the reset unit simultaneously applies a reset voltage to all the signal lines to discharge the charge held in the storage capacitor. The switching means is provided.
According to a sixth aspect of the present invention, in the display device according to any one of the first to fifth aspects, the scan driving unit sequentially applies the scan signal to each of the scan lines to apply to the display panel. Means is provided for sequentially setting the display pixels in each arrayed row to a selected state.

According to a seventh aspect of the present invention, in the display device according to the sixth aspect, the scan driving means applies the scan signal to all the scan lines all at once, and Means is provided for collectively setting the display pixels to a selected state.
According to an eighth aspect of the present invention, in the display device according to any one of the first to seventh aspects, the scan driving unit generates and outputs a precharge control signal for controlling an operating state of the precharge unit. It is characterized by.

According to a ninth aspect of the present invention, in the display device according to any one of the fourth to eighth aspects, the scan driving unit generates and outputs a reset control signal for controlling an operation state of the reset unit. And
According to a tenth aspect of the present invention, in the display device according to any one of the first to ninth aspects, the light emitting element is an organic electroluminescent element.

  According to an eleventh aspect of the present invention, a plurality of display pixels disposed in the vicinity of intersections of a plurality of signal lines and a plurality of scanning lines arranged so as to be orthogonal to each other on the display panel are provided via the signal lines. Supplying a gradation current based on the luminance gradation component of the display data, causing the current control type light emitting element provided in the display pixel to emit light at a predetermined luminance gradation based on the gradation current; In the display device drive control method for displaying desired image information on the display panel, each display pixel has a holding capacitor for holding a charge based on the gradation current as a voltage component, and one end at one end of the light emitting element. A current path connected to the other end of the power path and a control terminal; and the storage capacitor is provided between one end or the other end of the current path and the control terminal. Voltage held at And a drive current control means having an active element for supplying a light emission drive current based on the minute to the light emitting element to cause the light emitting element to emit light, and at least the display pixels are not selected The state is set, a precharge voltage is applied to each signal line, and at least a parasitic capacitance added to each signal line is set to a predetermined charge state, and the power supply voltage is not emitted from the light emitting element. Setting the first power supply voltage to be set to a state, setting the light emitting element of each display pixel to a non-light emitting state, setting each display pixel to a selected state, and setting the luminance level of the display data The gradation current based on the tone component is supplied to each display pixel via the signal line, and the storage capacitor of the display pixel holds the charge based on the gradation current, and the current Setting a voltage to the first power supply voltage and setting the light emitting element of each display pixel to a non-light emitting state; setting each display pixel to a non-selected state; The element is set in a light emitting state, and is set to a second power supply voltage different from the first power supply voltage, and the light emitting element is caused to perform a light emission operation based on the charge held in the storage capacitor of each display pixel. And a step.

  According to a twelfth aspect of the present invention, in the display device drive control method according to the eleventh aspect, the step of setting the parasitic capacitance to a predetermined charge state is a timing prior to the step of supplying the gradation current to the display pixel. It is characterized in that it is executed only once.

According to a thirteenth aspect of the present invention, in the display device drive control method according to the eleventh aspect, the step of setting the parasitic capacitance to a predetermined charging state includes the step of supplying the gradation current to the display pixel. This is executed every time the gray scale current is supplied to the display pixels in each row.
According to a fourteenth aspect of the present invention, in the display device drive control method according to any one of the eleventh to thirteenth aspects, the step of setting the parasitic capacitance to a predetermined charged state sets the display pixel to a non-selected state. It is characterized by being executed.

According to a fifteenth aspect of the present invention, in the display device drive control method according to any of the eleventh to thirteenth aspects, the step of setting the parasitic capacitance to a predetermined charging state sets the display pixel to a selected state. It is characterized by executing.
According to a sixteenth aspect of the present invention, in the display device drive control method according to any one of the eleventh to fifteenth aspects, the display device drive control method sets the display pixel to a selected state, and the signal line. Applying a reset voltage to the display pixel, discharging at least the charge held in the storage capacitor provided in the display pixel, and setting the display pixel to a reset state, wherein the parasitic capacitance is set to a predetermined charge state. The step of setting the display pixel to the reset state is performed at a timing prior to the setting step.

According to a seventeenth aspect of the present invention, in the display device drive control method according to the sixteenth aspect, the step of setting the display pixel to a reset state is a timing prior to the step of supplying the gradation current to the display pixel. It is characterized by being executed only once.
According to an eighteenth aspect of the present invention, in the display device drive control method according to the sixteenth aspect, the step of setting the display pixel to a reset state includes the step of supplying the gradation current to the display pixel. This is performed every time the current is supplied to the display pixels in each row.

  That is, the display device and the drive control method thereof according to the present invention provide a signal line (with respect to a display panel in which a plurality of display pixels each having a current control type light emitting element such as an organic EL element are arranged two-dimensionally. In a display device that displays desired image information by causing a light-emitting element of each display pixel to emit light at a predetermined luminance gradation by supplying a gradation current corresponding to display data via a data line) Prior to the operation of writing display data to each display pixel by the drive means (data driver), a precharge means (precharge circuit) applies a predetermined precharge voltage to each signal line, so that at least the signal line is applied. The added inter-wire capacitance (parasitic capacitance) is set to a predetermined charging state, and is provided in each display pixel at the start time (initial stage) of the display data writing operation. Contributing storage capacitor to the light emission operation (parasitic capacitance), a predetermined voltage is configured to set the precharge state of being charged.

  Here, each of the display pixels applied to the display device according to the present invention includes a storage capacitor that holds, as a voltage component, a charge based on a gray-scale current supplied via a signal line by a signal driving unit, and the holding Based on a voltage component held in the capacitor, a light emission drive circuit including a drive current control unit including an active element for supplying a predetermined light emission drive current, and light emission based on the light emission drive current supplied by the light emission drive circuit And a light emitting element that operates.

  In such a display pixel, at the time of a writing operation (writing operation period), the display driving unit (scanning driver) sets the display pixels in each row to a selected state, and the signal driving unit performs gradation based on the display data. A current is supplied to each display pixel via a signal line, and electric charges based on the gradation current are held in the storage capacitor, and the light emitting element is set in a non-light emitting state. ) Is driven and controlled so that the display pixel is set to the non-selected state by the scanning driving means, and the light emitting element is set to the light emitting operation state based on the charge held in the storage capacitor.

  The precharge means has a configuration including a plurality of switching means (switching elements) connected to each signal line, and a precharge control signal supplied from an operation control means (system controller) or a scan driving means. Based on the above, it is possible to apply a configuration in which the plurality of switching means are turned on all at once and a predetermined precharge voltage is applied to each signal line all at once.

  In the operation of applying the precharge voltage by the precharge means having such a configuration (precharge operation), the light emission drive current is set so as not to be supplied to the light emitting element of each display pixel. Further, the application of the precharge voltage by the precharge means may be performed in a state where the display pixels arranged on the display panel are set to the non-selected state by the scan driving means, or in the state set to the selected state. You may do it.

  Here, in the former method of applying the precharge voltage, the precharge voltage is displayed when, for example, the light emitting element is operated to emit light at a specific luminance gradation (for example, the lowest luminance gradation or the intermediate luminance gradation). In the latter method of applying the precharge voltage, the voltage for holding the active element for light emission driving provided in the display pixel in the off state (the thin film transistor is controlled) is defined based on the voltage to be charged in the storage capacitor of the pixel. Specified based on the threshold voltage).

  Further, prior to the application of the precharge voltage to each signal line by the precharge means, all display pixels arranged on the display panel are set in a selected state, and a predetermined reset voltage is set by the reset means (reset circuit). Are applied in a batch or sequentially for each row to discharge at least (remaining) the charge held in the storage capacitor provided in each display pixel, thereby setting each display pixel to the reset state. May be.

  Here, the reset means has a configuration including a plurality of switching means (switching elements) connected to each signal line, and is supplied from a scan drive means (scan driver) or a control unit (system controller). It is possible to apply a configuration in which the plurality of switching units are simultaneously turned on based on the control signal so that a predetermined reset voltage is applied to the signal lines all at once.

  According to such a display device and a drive control method thereof, a write operation in which a gradation current corresponding to display data is supplied by a signal driving unit and held (charged) as a voltage component in a storage capacitor of each display pixel. Prior to the precharge state (between the wirings added to the signal line), the storage capacitor is charged with a predetermined voltage (minimum luminance voltage, intermediate luminance voltage, or threshold voltage of the thin film transistor for driving light emission). Therefore, by supplying a gradation current (write current) having a current value corresponding to display data via a signal line, a voltage component corresponding to the gradation current is The storage capacitor is charged by being added to a predetermined voltage charged in advance.

  Therefore, in the initial stage of the writing operation (immediately after the gradation current is supplied), it is not necessary to charge the inter-line capacitance of the signal line and the storage capacity of the display pixel by the gradation current, and the display data is suitable for a short writing time. The voltage component corresponding to can be held (charged) in the holding capacity of each display pixel, so the writing rate with respect to the writing time can be greatly improved, and insufficient writing of display data can be suppressed, A display device with favorable display image quality can be realized by causing the light-emitting element to emit light at an appropriate luminance gradation.

  Further, in the present invention, immediately before the operation of setting the display pixels of each row to the selected state and writing the display data (gradation current), it may be accompanied by a precharge operation (reset operation) for each row. ) Is applied, it is possible to suppress a phenomenon in which the voltage charged in the inter-wire capacitance of each signal line and the storage capacitance of each display pixel decreases with time. The voltage charged in the storage capacitor of each display pixel in the initial stage of the loading operation can be made uniform, and the voltage component corresponding to the display data can be held (charged) appropriately in each storage capacitor. It is possible to suppress and improve the display image quality.

1 is a schematic block diagram showing a first embodiment of a display device according to the present invention. It is a schematic block diagram which shows the principal part structure of the display apparatus which concerns on 1st Embodiment. It is a schematic block diagram which shows an example of the data driver applicable to the display apparatus which concerns on 1st Embodiment. FIG. 3 is a circuit configuration diagram showing an example of a voltage / current conversion / current supply circuit applicable to the data driver according to the first embodiment. FIG. 3 is a circuit configuration diagram illustrating a specific example of a display pixel (light emission drive circuit) applicable to the display device according to the first embodiment. It is a conceptual diagram which shows the operation state of the light emission drive circuit which concerns on a present Example. 3 is a timing chart showing the basic operation of a display pixel to which the light emission drive circuit according to the present embodiment is applied. It is a schematic block diagram which shows one structural example of the display apparatus to which the display pixel which concerns on a present Example is applied. 3 is a timing chart showing a first example of a drive control method for a display device according to the first embodiment. FIG. 3 is a schematic circuit diagram illustrating a parasitic capacitance added to a display pixel applied to the display device according to the first embodiment and an equivalent circuit in which a circuit configuration of the display pixel is simplified. FIG. 5 is a conceptual diagram for explaining a precharge operation applied to a drive control operation of the display device according to the first embodiment. FIG. 6 is a conceptual diagram for explaining charge accumulation and distribution states in a precharge operation according to the first embodiment. It is a simulation result which shows the relationship between the writing time and the writing rate in the drive control operation | movement of the display apparatus which concerns on 1st Embodiment. 6 is a timing chart showing a second example of the display device drive control method according to the first embodiment; It is a schematic block diagram which shows 2nd Embodiment of the display apparatus which concerns on this invention. It is a schematic block diagram which shows the principal part structure of the display apparatus which concerns on 2nd Embodiment. 6 is a timing chart showing a first example of a drive control method for a display device according to a second embodiment. It is a conceptual diagram for demonstrating the precharge operation | movement applied to the drive control operation | movement of the display apparatus which concerns on 2nd Embodiment. It is a simulation result which shows the relationship between the writing time and the writing rate in the drive control operation | movement of the display apparatus which concerns on 2nd Embodiment. 10 is a timing chart showing a second example of the display device drive control method according to the second embodiment. 12 is a timing chart illustrating a first example of a drive control method for a display device according to a third embodiment. 12 is a timing chart showing a second example of the display device drive control method according to the third embodiment. It is a schematic block diagram which shows the principal part of the light emitting element type display in a prior art. It is an equivalent circuit diagram which shows the structural example of the display pixel (light emission drive circuit and light emitting element) applicable to the light emitting element type display in a prior art.

Hereinafter, a display device and a drive control method thereof according to the present invention will be described in detail with reference to embodiments.
<First Embodiment>
<Display device>
First, a first embodiment of a display device according to the present invention will be described with reference to the drawings.
FIG. 1 is a schematic block diagram illustrating a first embodiment of a display device according to the present invention, and FIG. 2 is a schematic configuration diagram illustrating a main configuration of the display device according to the present embodiment. Here, a configuration equivalent to the above-described prior art (FIG. 23) will be described with the same or equivalent reference numerals.

  As shown in FIGS. 1 and 2, the display device 100 </ b> A according to the present embodiment schematically includes a plurality of scanning lines SL and a plurality of data lines (signal lines) DL arranged so as to be orthogonal to each other. In the vicinity of the intersection, for example, a display panel 110 in which a plurality of display pixels EM composed of a light emission drive circuit and a current control type light emitting element described later are arranged in a two-dimensional array (for example, arranged in a matrix of n rows × m columns) A scanning driver (scanning driving means) that is connected to the scanning lines SL of the display panel 110 and applies the scanning signal Vsel to each scanning line SL at a predetermined timing to set the display pixels EM for each row to a selected state. 120 is connected to the data line DL of the display panel 110, takes in display data supplied from a display signal generation circuit 170, which will be described later, and outputs each data at a predetermined timing. A data driver (signal driving means) 130 for supplying a gray-scale current Ipix corresponding to the display data to the data line DL, and a predetermined timing connected to the data line DL and prior to the supply of the gray-scale current Ipix from the data driver 130 A precharge circuit (precharge means) 140 for applying the precharge voltage Vpcg to each data line DL, and a predetermined timing connected to the data line DL and prior to the application of the precharge voltage Vpcg from the precharge circuit 140. Thus, based on a reset circuit (reset means) 150 for applying the reset voltage Vrst to each display pixel EM and a timing signal supplied from the display signal generation circuit 170, at least each operation state of the scan driver 120 and the data driver 130. A scan control signal and a data control signal are generated to control In addition to generating a display data (luminance gradation data) based on a system controller (operation control means) 160 that outputs the image data and, for example, a video signal supplied from the outside of the display device 100A, A display signal generation circuit 170 that extracts or generates a timing signal (system clock or the like) for displaying predetermined image information on the display panel 110 based on the display data and supplies the timing signal to the system controller 160. It is prepared for.

Hereafter, each said structure is demonstrated concretely.
(Display panel 110)
As will be described later, the display pixels EM arranged in the display panel 110 shown in FIG. 2 receive data lines DL from the data driver 130 based on the timing at which the scan signal Vsel is applied from the scan driver 120 to the scan lines SL. The gradation current Ipix supplied to the pixel is taken in, a writing operation for holding a voltage component corresponding to the gradation current Ipix, and a light emission driving current based on the voltage component is supplied to the light emitting element to obtain a predetermined luminance gradation And a light emitting operation for emitting light at the time.

  In particular, the display pixel EM applied to the present embodiment is supplied with the gradation current Ipix in a selection state (selection period) set by applying a selection level (for example, high level) scanning signal Vsel. Then, the display data is written (writing operation), and the supply of the light emission driving current to the light emitting element is cut off to enter the non-light emitting state, while the scanning signal Vsel of the non-selection level (for example, low level) is applied. In the non-selection state (non-selection period) set by this, a light emission driving current based on the gradation current Ipix written by the writing operation is supplied to the light emitting element, and the light emitting element has a predetermined luminance level. It is configured so as to be in a light emitting operation state in which light is emitted with a tone. A specific circuit example and circuit operation of the display pixel EM (light emission drive circuit) applied to the display panel according to the present embodiment will be described in detail later.

(Scanning driver 120)
The scan driver 120 sequentially applies a selection level (for example, high level) scan signal Vsel to each of the scan lines SL based on a scan control signal supplied from the system controller 160, thereby displaying the display pixels EM for each row. Is set to the selected state, and the gradation current Ipix based on the display data supplied from the data driver 130 via each data line DL is set to each display pixel EM during the period (selection period) set in the selected state. Control to write to.

  For example, as shown in FIG. 2, the scan driver 120 shifts signals corresponding to the scan lines SL of each row based on a scan clock signal SCK and a scan start signal SST supplied as scan control signals from a system controller 160 described later. Are sequentially output, and the shift signal output from the shift register 121 is converted to a predetermined signal level (high level), and based on an output control signal SOE supplied as a scanning control signal from the system controller 160 And an output circuit unit 122 that outputs the scanning signal Vsel to each scanning line SL.

  Here, in the scan driver 120 according to the present embodiment, in particular, the output circuit unit 122 has a function (mode) for sequentially outputting the shift signal sequentially output from the shift register 121 to the scan lines SL as the scan signal Vsel. ) And a function (mode) for simultaneously outputting the scanning signal Vsel to all the scanning lines SL regardless of the shift signal from the shift register 121, and these functions are based on the output control signal SOE. Is configured to be switchable.

  That is, as will be described later, in an operation (image display operation) in which display data is sequentially written by supplying the gradation current Ipix to the display pixels EM in each row arranged on the display panel 110, the scanning signal Vsel is applied to each scanning line. In an operation (reset operation) in which the mode is set to sequentially output to SL and discharge (remaining) charges held in all the display pixels EM arranged on the display panel 110 are set to a reset state (reset operation). The mode is set to output the signal Vsel to all the scanning lines SL at the same time.

(Data driver 130)
FIG. 3 is a schematic block diagram illustrating an example of a data driver applicable to the display device according to the present embodiment. FIG. 4 illustrates a voltage-current conversion / current supply circuit applicable to the data driver according to the present embodiment. It is a circuit block diagram which shows an example.

  Based on the data control signal supplied from the system controller 160, the data driver 130 sequentially fetches display data for each row of digital signals supplied from the display signal generation circuit 170 described later at a predetermined timing. The gradation current Ipix having the current value corresponding to the gradation value of the display data is generated and supplied to the data lines DL simultaneously within the selection period set for each of the scanning lines SL.

  Specifically, as shown in FIG. 3, the data driver 130 sequentially outputs shift signals based on data control signals (shift clock signal CLK, sampling start signal STR) supplied from the system controller 160. Shift register circuit 131, data register circuit 132 for sequentially taking in display data D0 to Dm for one row supplied from display signal generation circuit 170 based on the input timing of the shift signal, and data control signal (data latch) Based on the signal STB), a data latch circuit 133 that holds display data D0 to Dm for one row fetched by the data register circuit 132, and gradation reference voltages V0 to V0 supplied from power supply means (not shown). Based on Vp, the held display data (drive gradation values) D0 to Dm A D / A converter (digital-analog converter) 134 for converting to a predetermined analog signal voltage (gradation voltage Vpix), and a gradation current Ipix corresponding to display data converted to the analog signal voltage; Voltage-current conversion that outputs the gradation current Ipix to each display pixel EM simultaneously through each data line DL at a timing based on a data control signal (output enable signal OE) supplied from the system controller 160. And a current supply circuit 135.

  As the voltage-current conversion / current supply circuit 135 applicable to the data driver 130, for example, as shown in FIG. 4, one input terminal (negative input (−)) has a reverse polarity via an input resistor R. Grayscale voltage (−Vpix) is input, and the other input terminal (positive input (+)) is supplied with a reference voltage (ground potential) via the input resistor R, and the output terminal is connected to the feedback resistor R. The potential of the operational amplifier OP1 connected to the input terminal (−) and the contact NA provided to the output terminal of the operational amplifier OP1 via the output resistor R is input to one input terminal (+), and the output terminal An operational amplifier OP2 connected to the other input terminal (−) and connected to the input terminal (+) of the operational amplifier OP1 via the output resistor R, and connected between the contact NA and the data line DL, and an output enable. Signal OE It has a switching means SW to ON / OFF operation based on a circuit configuration with a.

  According to the circuit configuration in which such a voltage-current conversion / current supply circuit 135 is provided for each data line DL, −Ipix = with respect to the input negative gradation voltage (−Vpix). A negative gradation current (-Ipix) composed of (-Vpix) / R is generated, and the supply state of the gradation current Ipix to each data line DL is controlled based on the output enable signal OE. In the circuit configuration shown in FIG. 4, since the generated gradation current Ipix has a negative polarity, an operation state in which the current is drawn from the data line DL side to the data driver 130 side is controlled.

(Precharge circuit 140)
Based on the precharge control signal PCG, the precharge circuit 140 is configured to apply all the data lines at a predetermined timing before the gray current Ipix based on the display data is supplied from the data driver 130 to each data line DL. A precharge voltage Vpcg is simultaneously applied to DL, and at least parasitic capacitance added to each data line DL is controlled to be set to a predetermined charging state.

  For example, the precharge circuit 140 has one end connected to a voltage source (not shown) of the precharge voltage Vpcg for each data line DL arranged in the display panel 110, and based on the precharge control signal PCG. It is possible to apply a configuration in which a plurality of switching elements (switching means) for controlling the application state of the precharge voltage Vpcg to each data line DL are provided by performing ON / OFF operations all at once. Specifically, as shown in FIG. 2, the precharge voltage Vpcg is commonly applied to one end of the current path, the other end is connected to each data line DL, and the precharge control signal PCG is common to the control terminal. The thin film transistor TRpcg applied to can be satisfactorily applied.

  Here, the precharge control signal PCG for controlling the application of the precharge voltage Vpcg to each data line DL is set by the scan driver 120 before the display data writing operation to each display pixel EM. If the scanning signal Vsel is applied to the scanning line SL and the display pixel EM of each row is set to the selected state, the precharge voltage Vpcg is applied to each data line DL to charge the parasitic capacitance. Since it is good, it is related to the application timing of the scanning signal Vsel (that is, applied at the timing prior to the operation of applying the scanning signal Vsel to the scanning line SL of each row and sequentially setting the selected state), for example, scanning control It may be generated and output by the scanning driver 120 based on the signal, or generated by the system controller 160 and directly output. It may be configured to output the pre-charge circuit 140. In a specific configuration example (see FIG. 8) described later, a case where the scan driver 120 generates and outputs is shown.

  The precharge voltage Vpcg, which will be described in detail later, is displayed by setting the display pixels EM in each row to a selected state after at least charging the inter-wire capacitance added to each data line DL by the precharge circuit 140. When the gradation current Ipix based on the data is written, a voltage (a light emission driving transistor described later) generated by distributing the charge charged in the capacitance between the wirings to the holding capacitance provided in each display pixel EM Is set so that the light emission driving current supplied to each light emitting element becomes a current value when the light emitting element is caused to emit light at the lowest gradation.

  Furthermore, the application timing of the precharge voltage Vpcg to each data line DL may be a timing prior to writing display data (supplying the gradation current Ipix) to the display pixels EM in each row. In addition, the precharge voltage Vpcg may be applied to each data line DL to be charged only once at a single timing prior to the write operation to the display pixels EM in each row. At each timing immediately before the selection state is set, the precharge voltage Vpcg may be applied to each data line DL to charge each data line DL.

(Reset circuit 150)
Based on the reset control signal RST, the reset circuit 150 transmits all data via the data lines DL at a predetermined timing prior to the timing at which the precharge voltage Vpcg is applied from the precharge circuit 140 to the data lines DL. A reset voltage Vrst is applied to the display pixels EM all at once, and control is performed to discharge the charges accumulated in the storage capacitors provided in the display pixels EM.

  For example, the reset circuit 150 is connected at one end to a voltage source (not shown) of the reset voltage Vrst for each data line DL provided in the display panel 110, and is turned on all at once based on the reset control signal RST. A plurality of switching elements (switching means) are provided for controlling the application state of the reset voltage Vrst to each data line DL (that is, the discharge state of the charge accumulated in each display pixel EM) by performing the / off operation. As the switching element, specifically, as shown in FIG. 2, a reset voltage Vrst is commonly applied to one end of a current path, and the other end is connected to each data line DL. The thin film transistor TRrst in which the reset control signal RST is commonly applied to the control terminals can be favorably applied.

  Here, the reset control signal RST for controlling the discharge of the accumulated charge by applying the reset voltage Vrst to each display pixel EM via each data line DL is at the timing of applying the precharge voltage Vpcg to each data line DL. Prior to this, all the display pixels EM in each row are set in a selected state, and a reset voltage Vrst is applied via each data line DL to discharge the charges accumulated in the storage capacitors of all the display pixels EM. Therefore, the timing is related to the application timing of the scanning signal Vsel (that is, in synchronization with the timing of applying the scanning signal Vsel to all the scanning lines SL all at once and setting all the display pixels EM to the selected state). For example, the scanning driver 120 may generate and output based on the scanning control signal, or it may be a system controller. Generated by over la 160, it may be configured to directly output to the reset circuit 150. In a specific configuration example (see FIG. 8) described later, a case where the scan driver 120 generates and outputs is shown.

  The reset voltage Vrst may be a voltage that is relatively low so that at least the charge accumulated in the storage capacitor of each display pixel EM can be discharged satisfactorily. The voltage (for example, ground voltage) on the cathode terminal side of the light emitting element (for example, organic EL element) provided in each display pixel EM is set.

  Furthermore, the application timing of the reset voltage Vpcg to each data line DL (the discharge timing of the charge accumulated in the storage capacitor of each display pixel) is the writing of display data to the display pixel EM in each row (the gradation current Ipix). Supply timing) and may be any timing prior to the application of the precharge voltage Vpcg to each data line DL. For example, as described later, the precharge voltage Vpcg applied to each data line DL The charge of each display pixel EM may be discharged only once at the only timing prior to the application operation, or the timing before the display pixels EM of each row are set to the selected state, and the precharge The electric charge of each display pixel EM may be discharged every time immediately before the timing at which the voltage Vpcg is applied.

(System controller 160)
The system controller 160 outputs a scanning control signal and a data control signal for controlling the operation state to at least the scanning driver 120 and the data driver 130 described above, thereby causing each driver to operate at a predetermined timing. Vsel and gradation current Ipix are generated and output to the display panel 110, and display data generated by the display signal generation circuit 170 is written to each display pixel EM to perform a light emission operation, thereby performing control to display predetermined image information. .

  As described above, the operation control in the precharge circuit 140 and the reset circuit 150 is performed by supplying the scan control signal to the scan driver 120 to generate the precharge control signal PCG and the reset control signal RST. By outputting to the charge circuit 140 and the reset circuit 150, each circuit may be operated at a predetermined timing. The system controller 160 generates the precharge control signal PCG and the reset control signal RST. Then, each circuit may be operated at a predetermined timing by outputting directly to the precharge circuit 140 and the reset circuit 150.

(Display signal generation circuit 170)
The display signal generation circuit 170 extracts, for example, a luminance gradation signal component from a video signal supplied from the outside of the display device 100, and a data driver as display data (luminance gradation data) for each row of the display panel 110. 130. Here, when the video signal includes a timing signal component that defines the display timing of image information, such as a television broadcast signal (composite video signal), for example, the display signal generation circuit 170 displays the luminance gradation. In addition to the function of extracting the signal component, it may have a function of extracting the timing signal component and supplying it to the system controller 160. In this case, the system controller 160 generates a scanning control signal and a data control signal to be supplied to the scanning driver 120 and the data driver 130 based on the timing signal supplied from the display signal generation circuit 170.

<Specific examples of display pixels>
Next, specific circuit examples of the display pixels arranged in the above-described display panel will be described with reference to the drawings.
FIG. 5 is a circuit configuration diagram showing a specific example of a display pixel (light emission drive circuit) applicable to the display device according to the present embodiment.

  As shown in FIG. 5, the display pixel EM according to the present embodiment sets the display pixel EM to a selected state based on the scanning signal Vsel applied from the scan driver 120 described above, and the data driver in the selected state. Based on the light emission drive circuit DC which takes in the gray scale current Ipix supplied from 130 and flows the light emission drive current corresponding to the gray scale current Ipix to the light emitting element, and the light emission drive current supplied from the light emission drive circuit DC And a current control type light emitting element such as an organic EL element OEL that emits light at a luminance gradation of 1.degree.

  Specifically, in the light emission drive circuit DC, for example, as shown in FIG. 5, the gate terminal is connected to the scanning line SL, the source terminal is connected to the power supply line VL (power supply voltage Vsc), and the drain terminal is connected to the contact N1. N channel type thin film transistor Tr11, n channel type thin film transistor Tr12 whose gate terminal is connected to scan line SL, source terminal and drain terminal connected to data line DL and contact N12, respectively, and gate terminal to contact N11, source An n-channel thin film transistor (driving current control means, active element for driving light emission) Tr13 having a terminal and a drain terminal connected to the power supply line VL and the contact N12, respectively, and a storage capacitor Cs connected between the contact N11 and the contact N12 And the anode terminal of the organic EL element OEL is connected to the contact N12. Mode pin is in a predetermined low potential supply voltage Vcath (e.g., a ground voltage Vgnd) are respectively connected to the. Here, the storage capacitor Cs may be a capacitance component formed between the gate and the source of the thin film transistor Tr13.

  FIG. 6 is a conceptual diagram showing an operation state of the light emission drive circuit according to this embodiment, and FIG. 7 is a timing chart showing a basic operation of the display pixel to which the light emission drive circuit according to this embodiment is applied. . FIG. 8 is a schematic block diagram illustrating a configuration example of a display device to which the display pixel according to the present embodiment is applied.

  For example, as shown in FIG. 7, the light emission drive control of the light emitting element (organic EL element OEL) in the light emission drive circuit DC having the above-described configuration is performed within one scan period Tsc with one scan period Tsc as one cycle. In addition, the display pixel EM connected to the scanning line SL is selected, the gradation current Ipix corresponding to the display data is written, and the writing operation period (selection period) Tse for holding as a voltage component, and the writing operation period Tse A light emission operation period (non-selection period) Tnse for supplying light emission drive current corresponding to the display data to the organic EL element OEL based on the voltage component written and held in , Are set so as to include (Tsc ≧ Tse + Tnse). Here, the writing operation period Tse set for each scanning line SL to which the display pixel EM of each row is connected is set so that there is no time overlap.

  As will be described later, in the display device drive control method according to the present embodiment, prior to a series of light emission drive operations including the write operation and the light emission operation of the light emission drive circuit DC, a reset operation and a precharge operation are performed. Therefore, the total time of the writing operation period Tse and the light emitting operation period Tnse is set to be shorter than one scanning period Tsc (Tsc> Tse + Tnse).

(Write operation period)
That is, in the display pixel writing operation period Tse, as shown in FIG. 7, first, the high-level scanning signal Vsel is applied from the scanning driver 120 to the specific scanning line SL to display the display pixel in the row. EM is set to the selected state, and a low-level power supply voltage Vsc is applied to the power supply line VL of the display pixel EM in the row. In synchronization with this timing, a negative gray-scale current (-Ipix) having a current value corresponding to the display data of the row is supplied from the data driver 130 to each data line DL.

  Thereby, the thin film transistors Tr11 and Tr12 constituting the light emission drive circuit DC are turned on, and the low-level power supply voltage Vsc is applied to the contact N11 (that is, the gate terminal of the thin film transistor Tr13 and one end of the storage capacitor Cs). By performing an operation of drawing a negative gradation current (−Ipix) through the data line DL, a voltage level lower than the low-level power supply voltage Vsc becomes the contact N12 (that is, the source terminal of the thin film transistor Tr13 and Applied to the other end of the holding capacitor Cs).

  Thus, the potential difference is generated between the contacts N11 and N12 (between the gate and the source of the thin film transistor Tr13), so that the thin film transistor Tr13 is turned on, and as shown in FIG. 6A, the thin film transistor Tr13, A write current Ia corresponding to the current value of the gradation current Ipix flows through the data driver 130 via the contact N12, the thin film transistor Tr12, and the data line DL.

  At this time, charges corresponding to the potential difference generated between the contacts N11 and N12 (between the gate and the source of the thin film transistor Tr13) are stored in the storage capacitor Cs and held (charged) as a voltage component. A power supply voltage Vsc having a voltage level equal to or lower than the low potential power supply voltage Vcath (that is, the ground voltage Vgnd) is applied to the power supply line VL, and the write current Ia is controlled to flow in the direction of the data line DL. Therefore, the potential applied to the anode terminal (contact N12) of the organic EL element OEL is lower than the potential of the cathode terminal (low potential power supply voltage Vcath), and a reverse bias voltage is applied to the organic EL element OEL. Therefore, no light emission drive current flows through the organic EL element OEL, and no light emission operation is performed.

(Light emission operation period)
Next, in the light emission operation period Tnse after the end of the write operation period Tse, as shown in FIG. 7, a low level scan signal Vsel is applied to the specific scan line SL from the scan driver 120 to The display pixel EM is set to a non-selected state, and a high-level power supply voltage Vsc is applied to the power supply line VL of the display pixel EM in the row. In synchronization with this timing, the operation of drawing the gradation current Ipix by the data driver 130 is stopped.

  Thereby, the thin film transistors Tr11 and Tr12 constituting the light emission drive circuit DC are turned off, and the application of the power supply voltage Vsc to the contact N11 (that is, the gate terminal of the thin film transistor Tr13 and one end of the storage capacitor Cs) is cut off. Since the application of the voltage level due to the pull-in operation of the gradation current Ipix by the data driver 130 to the contact N12 (that is, the source terminal of the thin film transistor Tr13 and the other end of the storage capacitor Cs) is cut off, the storage capacitor Cs The charge accumulated during the writing operation period is held.

  Thus, the holding capacitor Cs holds the charging voltage during the writing operation, whereby the potential difference between the contacts N11 and N12 (between the gate and source of the thin film transistor Tr13) is held, and the thin film transistor Tr13 is turned on. Maintain state. Further, since the power supply voltage Vsc having a voltage level higher than the low potential power supply voltage Vcath is applied to the power supply line VL, the potential applied to the anode terminal (contact N2) of the organic EL element OEL is the potential of the cathode terminal. Higher than (ground potential).

  Therefore, as shown in FIG. 6B, a predetermined light emission drive current Ib flows in the forward bias direction from the power supply line VL to the organic EL element OEL via the thin film transistor Tr13 and the contact N12, and the organic EL element OEL emits light. . Here, the potential difference (charging voltage) based on the charge accumulated by the storage capacitor Cs corresponds to the potential difference when the write current Ia corresponding to the gradation current Ipix is caused to flow in the thin film transistor Tr13, and is supplied to the organic EL element OEL. The light emission drive current Ib has a current value equivalent to the write current Ia. Thus, in the light emission operation period Tnse after the write operation period Tse, light emission is performed via the thin film transistor Tr13 based on the voltage component corresponding to the display data (gradation current Ipix) written in the write operation period Tse. The drive current Ib is continuously supplied, and the organic EL element OEL continues the operation of emitting light at the luminance gradation corresponding to the display data.

Then, by sequentially repeating the above-described series of operations for all the scanning lines SL constituting the display panel 110, display data for one screen of the display panel is written, light is emitted at a predetermined luminance gradation, Desired image information is displayed.
Here, the thin film transistors Tr11 to Tr13 applied to the light emission drive circuit DC according to the present embodiment are not particularly limited. However, by configuring all the thin film transistors Tr11 to Tr13 with n channel thin film transistors, an n channel can be obtained. The type amorphous silicon TFT can be satisfactorily applied. In this case, an already established amorphous silicon manufacturing technique can be applied to manufacture a light emission drive circuit with stable operating characteristics at a relatively low cost.

  In addition, as a configuration for applying a predetermined power supply voltage Vsc to the power supply line VL in the light emission drive circuit DC according to the present embodiment, for example, as shown in FIG. 8, in addition to the configuration of the display device 100A shown in FIG. A power supply driver 180 connected to a plurality of power supply lines VL arranged in parallel to each scan line SL of the display panel 110 is provided, and is output from the scan driver 120 based on a power supply control signal supplied from the system controller 160. At a timing synchronized with the scanning signal Vsel (see FIG. 7), a power supply voltage Vsc having a predetermined voltage value from the power supply driver 180 is applied to the row to which the scanning signal Vsel is applied by the scanning driver 120 (display set to a selected state). It is possible to satisfactorily apply the configuration in which the voltage is applied to the power line VL of the pixel EM).

  FIG. 8 shows a configuration in which the scan driver 120 generates and outputs the precharge control signal PCG supplied to the precharge circuit 140 and the reset control signal RST supplied to the reset circuit 150 described above. It was. In the reset circuit 150, a reset voltage Vrst applied in common to the thin film transistor (switching element) TRrst provided for each data line DL is a low potential power supply voltage Vcath connected to the cathode terminal of the organic EL element OEL. The configuration set to (for example, ground voltage Vgnd) is shown.

  Further, the display pixel EM described above includes three thin film transistors as the light emission drive circuit DC, generates a negative gradation current (−Ipix) by the data driver DL, and displays the display pixel EM (light emission drive circuit DC). Although the circuit configuration corresponding to the current application method of drawing the gradation current Ipix in the direction of the data driver 130 through the data line DL is shown, the present invention is not limited to this embodiment.

  That is, at least a display device including a light emission drive circuit corresponding to a current application method, and provided with drive current control means (corresponding to the thin film transistors Tr11 and Tr13) for controlling the supply of the light emission drive current to the light emitting element, After the gradation current corresponding to the display data is held by the drive current control means (in the charge holding means as a voltage component), the light emission drive current based on the gradation current is supplied to make the light emitting element have a predetermined luminance gradation. As long as the light emitting operation is performed, any other circuit configuration may be used. For example, a circuit configuration including four thin film transistors may be used. Furthermore, a circuit configuration corresponding to a mode in which a positive gray scale current is generated by the data driver 130 and the gray scale current is supplied from the data driver 130 to the display pixel (light emission drive circuit) via the data line DL. You may have.

<Display device drive control method>
Next, a drive control method in the display device according to the present embodiment will be described.
FIG. 9 is a timing chart showing a first example of the drive control method for the display device according to the present embodiment. Here, the drive control operation will be described with reference to the configuration of the display device shown in FIG. 8 as appropriate. FIG. 10 is a schematic circuit diagram showing a parasitic capacitance added to a display pixel applied to the display device according to the present embodiment and an equivalent circuit in which the circuit configuration of the display pixel is simplified. FIG. FIG. 12 is a conceptual diagram for explaining a precharge operation applied to the drive control operation of the display device according to the embodiment, and FIG. 12 is for explaining charge accumulation and distribution states in the precharge operation according to the embodiment. FIG. FIG. 13 is a simulation result showing the relationship between the writing time and the writing rate in the drive control operation of the display device according to the present embodiment.

  For example, as shown in FIG. 9, the drive control method in the display device 100A having the above-described configuration includes all one array arranged on the display panel 110 within one scan period Tsc with one scan period Tsc as one cycle. The display pixels EM are simultaneously set to the selected state, and at least the electric charge accumulated (remaining) in the storage capacitor Cs of each display pixel EM is discharged to a predetermined power supply voltage to set all the display pixels EM to the reset state. After the reset operation period Trst and the reset operation period Trst, all the display pixels EM are simultaneously set to the non-selected state, and at least the parasitic capacitance added to all the data lines DL provided in the display panel 110 is set to a predetermined value. Display data is written for each pre-charge operation period Tpcg set to the state of charge and display pixel EM (light emission drive circuit DC) in each row as described above. And an image display operation period Tdis consisting of a write operation period Tse and a light emission operation period Tnse (see FIG. 7) in which a light emission operation is performed at a predetermined luminance gradation is executed (Tsc ≧ Trst + Tpcg + Tdis). . Here, the reset operation period Trst, the precharge operation period Tpcg, and the image display operation period Tdis are set so as not to overlap each other in time.

(Reset operation period)
That is, in the display pixel reset operation period Trst, as shown in FIG. 9, first, the high-level scan signal Vsel is applied from the scan driver 120 to all the scan lines SL provided in the display panel 110. As a result, all the display pixels EM are set to the selected state, and the high level reset control signal RST is supplied from the scan driver 120 to the reset circuit 150 to be set to the reset state.

  Thereby, the thin film transistor Tr12 provided in the light emission drive circuit DC (see FIG. 5) constituting each display pixel EM is turned on, and the thin film transistor (switching element) TRrst provided in the reset circuit 150 is turned on. Thus, the other end side (contact N12) of the storage capacitor Cs of the light emission drive circuit DC is connected to the low potential power supply voltage Vcath (ground voltage Vgnd) via the thin film transistor Tr12, the data line DL, and the thin film transistor TRrst, and the storage capacitor The charge accumulated in Cs is discharged to the low potential power supply voltage Vcath.

(Precharge operation period)
Next, in the precharge operation period Tpcg after the end of the reset operation period Trst, as shown in FIG. 9, the scan driver 120 applies the low level scan signal Vsel to all the scan lines SL and displays all the displays. The pixel EM is set to a non-selected state, the connection between the data line DL and the display pixel EM (light emission drive circuit DC) is cut off, and a high-level precharge control signal PCG is output from the scan driver 120. Is set to the precharge state. At this timing, a low level reset control signal RST is supplied from the scan driver 120 to the reset circuit 150, and the connection between the data line DL and the low potential power supply voltage Vcath is cut off.

  Thereby, each thin film transistor (switching element) TRpcg provided in the precharge circuit 140 is turned on, so that the precharge voltage Vpcg (ground voltage Vgnd) is applied to each data line DL via each thin film transistor TRpcg. The parasitic capacitance added to each data line DL is charged with a predetermined voltage based on the precharge voltage Vpcg.

  Specifically, as shown in FIG. 10A, the data line DL connected to a specific display pixel EM roughly includes the data line DL and the scanning line SL (that is, the thin film transistor Tr12 of the light emission drive circuit DC). It can be considered that the inter-wiring capacitance Cd-s connected to the gate terminal) and the holding capacitance Cs connected via the thin film transistor Tr12 of the light emission driving circuit DC are added as parasitic capacitance.

  Therefore, when the circuit is simplified, as shown in FIG. 10B, the signal input terminal TMin of the data line DL (for example, a connection contact between the display panel 110, the data driver 130, and the precharge circuit 140) and the ground voltage. Between Vgnd, a series circuit composed of the wiring resistance Rdl of the data line DL and the inter-wiring capacitance Cd-s, the TFT switch TrX (corresponding to the thin film transistors Tr11 and Tr12 operating in conjunction with the scanning signal Vsel), and This can be represented by an equivalent circuit in which a series circuit composed of a thin film transistor Tr13 is connected in parallel and a storage capacitor Cs is connected between the gate and source of the thin film transistor Tr13.

  According to such an equivalent circuit, the precharge operation described above is performed as shown in FIG. 11A because the TFT switch TrX is in the off state (the display pixel EM is in the non-selected state). A state equivalent to a circuit in which the wiring resistance Rdl and the inter-wiring capacitance Cd-s are connected in series with the ground voltage is applied to each data line DL from the precharge circuit 140 via the signal input terminal TMin. The precharge voltage Vpcg is held as a voltage component in the inter-wiring capacitance Cd-s. Here, a potential difference (charging voltage) generated at both ends of the inter-wiring capacitance Cd-s in accordance with the precharge operation is represented as V0. The specific setting of the charging voltage V0 based on the precharge voltage Vpcg will be described in detail in the image display operation.

(Image display operation period)
Next, in the image display operation period Tdis after the end of the precharge operation period Tpcg, as shown in FIG. 9 and the light emission drive control method (see FIG. 7) of the light emission drive circuit DC described above, the display pixels EM in each row. Are sequentially set to the selected state, and in synchronization with this timing, the gradation current Ipix corresponding to the display data is supplied to each display pixel EM, whereby the holding provided in each display pixel EM (light emission drive circuit DC). A write operation (writing operation period Tse) in which the voltage component based on the gradation current Ipix (≈write current Ia) is held (charged) in the capacitor Cs, and the light emission drive current Ib based on the voltage component is converted into a light emitting element ( By supplying to the organic EL element OEL), a light emitting operation (light emitting operation period Tnse) for causing the light emitting element to emit light at a luminance gradation corresponding to display data is sequentially executed.

  Here, in the display data writing operation, according to the above-described equivalent circuit, the TFT switch TrX is in the ON state (the display pixel EM is in the selected state) as shown in FIG. Between the terminal TMin and the ground voltage, the series circuit composed of the wiring resistance Rdl and the inter-wiring capacitance Cd-s and the series circuit composed of the TFT switch TrX and the thin film transistor Tr13 are equivalent to a circuit connected in parallel. As a result, the charge held in the inter-wiring capacitor Cd-s in the precharge operation state is distributed between the inter-wiring capacitor Cd-s and the holding capacitor Cs.

By this charge distribution, the potential difference VS0 generated between both ends of the holding capacitor Cs and both ends of the inter-wiring capacitor Cd-s becomes equal, and can be obtained as follows.
That is, as shown in FIG. 12A, the connection state of the capacitance component in the above-described precharge operation state is that the TFT switch TrX is in the OFF state, so that the inter-wiring capacitance Cd-s and the holding capacitance Cs are electrically connected. It is in a blocked state. Here, the inter-wiring capacitance Cd-s is charged with the voltage V0 based on the precharge voltage Vpcg by the above-described precharge operation. Then, as shown in FIG. 12B, when the TFT switch TrX is turned on (when in the writing operation state), the connection state of the capacitance component is such that the inter-wiring capacitance Cd-s and the holding capacitance Cs are connected in a loop. The state is changed. Here, an equivalent voltage VS0 is generated at both ends of the inter-wiring capacitor Cd-s and the holding capacitor Cs.

From these facts, the following equation (1) is obtained based on Kirchhoff's law from FIG. Here, in the equivalent circuit shown in FIG. 11B, it is assumed that the light emission drive current Ib does not flow through the thin film transistor Tr13 (not on) immediately after the TFT switch TrX is turned on. In the equation (1), Qd-s ′ is the amount of charge accumulated in the inter-wire capacitance Cd-s in the write operation state, and Qs ′ is the amount of charge accumulated in the storage capacitor Cs in the same state. .
VS0 = Qs '/ Cs = Qd-s' / Cd-s (1)

On the other hand, in the transition from the precharge operation state to the write operation state (TFT switch TrX from the OFF state to the ON state), the total amount of charge accumulated in the inter-wire capacitance Cd-s and the storage capacitor Cs is constant. Further, in the precharge operation state, it can be considered that all charges accumulated in the storage capacitor Cs by the reset operation are discharged (Qs = 0), and therefore the following equation (2) is obtained. Here, Qd-s is the amount of charge accumulated in the inter-wire capacitance Cd-s in the precharge operation state, and Qs is the amount of charge accumulated in the storage capacitor Cs in the precharge operation state.
Qd-s + Qs = Qd-s '+ Qs'
Qd-s = Qd-s '+ Qs' (2)

Further, in the precharge operation state, the inter-wiring capacitor Cd-s and the holding capacitor Cs are electrically cut off, and the holding capacitor Cs does not hold the voltage component based on the precharge voltage Vpcg. ) Formula is obtained.
V0 = Qd-s / Cd-s (3)

From these equations (1) to (3), the voltage V0 charged in the inter-wire capacitance Cd-s in the above-described precharge operation can be obtained as follows, and equation (4) is obtained.
V0 = Qd-s / Cd-s = (Qd-s '+ Qs') / Cd-s
= {Qd-s' + (Qd-s'Cs / Cd-s)} / Cd-s
= (1 + Cs / Cd-s) Qd-s' / Cd-s
= (1 + Cs / Cd-s) VS0 (4)

  In the above equation (4), the voltage VS0 charged in the storage capacitor Cs is supplied to the organic EL element OEL as the light emission driving current Ib having a current value for causing the organic EL element OEL to emit light at the lowest luminance gradation ( That is, by setting the voltage value (minimum luminance voltage; voltage between the gate and source of the thin film transistor Tr13) necessary for flowing to the thin film transistor Tr13, the inter-wire capacitance Cd of each data line DL is set in the precharge operation. A voltage V0 to be charged to -s and a precharge voltage Vpcg are defined.

  Accordingly, as shown in FIG. 11C, after the distribution of the accumulated charge in the capacitance component, the gradation current Ipix accompanying the writing operation is supplied via the data line DL, so that the current corresponding to the display data is obtained. A write current Ia having a value flows through the thin film transistor Tr13, and a voltage component Vα corresponding to the write current Ia is charged by adding to the minimum luminance voltage VS0 charged in advance in the storage capacitor Cs (VS0 + Vα). Therefore, in the initial stage of the writing operation (immediately after the supply of the gradation current Ipix), the display can be performed in a short writing time without charging the inter-line capacitance Cd-s of the data line DL and the storage capacitor Cs of the display pixel. The voltage component corresponding to the data can be held (charged) appropriately.

  As a result, as shown in FIG. 13, the writing rate with respect to the writing time can be greatly improved, and insufficient writing of the display data can be suppressed, and the organic EL element is caused to emit light at an appropriate luminance gradation. Thus, a display device with good display image quality can be realized. In FIG. 13, a solid line SA is a simulation result showing a change in the writing rate with respect to a writing time when the reset operation and the precharge operation according to the present embodiment are executed, and a broken line SP indicates the reset operation and It is the simulation result which showed the change of the writing rate with respect to the writing time at the time of writing display data directly, without performing precharge operation | movement.

FIG. 14 is a timing chart showing a second example of the display device drive control method according to the present embodiment.
In the first example of the drive control method according to the present embodiment described above, as shown in FIG. 9, prior to the image display operation (writing operation, light emission operation) to the display pixels EM in each row, the entire display is performed. Although the method of executing the reset operation for the pixels EM and the precharge operation for all the data lines DL in a lump (at a time) has been described, in the second example of the drive control method, the precharge operation is performed for each row. A method of individually executing the display data immediately before each display data writing operation is applied.

  Specifically, as shown in FIG. 14, first, in the reset operation period Trst, all the display pixels EM arranged in the display panel 110 are simultaneously set to a selected state, and at least the storage capacitor Cs of each display pixel EM is set. The accumulated (remaining) charge is discharged to a predetermined power supply voltage, all the display pixels EM are collectively set to the reset state, and then all the display pixels EM are simultaneously set to the non-selected state. A precharge operation period Tpcg for setting the inter-wiring capacitance Cd-s added to all the data lines DL to a predetermined charging state and a gradation current Ipix (write current Ia) corresponding to display data are supplied. The write operation period Tse for charging the corresponding voltage component to the storage capacitor Cs is sequentially executed for each row, the display data for one screen of the display panel is written, and the light emission operation period Tnse after the write operation period Tse. In FIG. 3, the light emitting element (organic EL element) of each display pixel emits light at a predetermined luminance gradation to display as image information.

  In such a drive control method, the precharge operation is executed every time immediately before the display data (gradation current Ipix) is written to the display pixels EM in each row, whereby the inter-wire capacitance of each data line DL. Since it is possible to suppress a decrease in the voltage V0 charged to Cd-s due to the passage of time based on the precharge voltage Vpcg, the charge between the inter-wire capacitance Cd-s and the storage capacitor Cs at the initial stage of the write operation can be suppressed. The potential difference VS0 generated in the storage capacitor Cs by the distribution is changed to a desired voltage (in the first example, the gate necessary for supplying the light emission drive current of the lowest luminance gradation to the light emitting element in the light emission drive thin film transistor Tr13). −source voltage; minimum luminance voltage), and variation in writing rate due to a decrease in the voltage V0 can be suppressed.

  In the present embodiment, in the precharge operation that is performed prior to the image display operation (write operation and light emission operation), the minimum luminance voltage VS0 is charged to the storage capacitor Cs during the write operation (that is, In the case of setting the voltage V0 (that is, the precharge voltage Vpcg) for charging the inter-wiring capacitance Cd-s added to the data line DL, so as to be applied between the gate and the source of the light emission driving thin film transistor Tr13. However, the present invention is not limited to this. For example, the voltage VS0 charged in the storage capacitor Cs during the write operation supplies the light-emitting element with a light-emission driving current of intermediate luminance gradation. The voltage V0 (that is, the precharge voltage Vpcg) is set so that the necessary gate-source voltage (intermediate luminance voltage) of the thin film transistor Tr13 is set. It may be a thing.

  According to this, compared with the case where the voltage VS0 charged in the storage capacitor Cs during the writing operation is charged from the lowest luminance voltage to a desired voltage (for example, the highest gradation voltage) according to the display data, it is intermediate. Charging from the luminance voltage to a desired voltage (for example, the lowest gradation voltage or the highest gradation voltage) according to the display data can shorten the writing time and further improve the writing rate. it can.

  In the present embodiment, the device configuration and the drive control method for executing the image display operation (writing operation and light emission operation) after executing the reset operation and the precharge operation have been described. Instead, the display pixel may be set to a non-selected state and only the precharge operation may be performed. In this case, the reset circuit 150 shown in FIGS. 1, 2, and 8 can be omitted, and a configuration equivalent to a second embodiment described later (see FIGS. 15 and 16) can be applied. The circuit configuration can be reduced in size. Further, in this case, the writing rate with respect to the writing time cannot obtain the remarkable improvement effect as shown in FIG. 13, but the display data is directly written without executing the precharge operation (FIG. 13). Compared to the broken line SP), the result is greatly improved.

<Second Embodiment>
Next, a second embodiment of the display device and its drive control method according to the present invention will be described with reference to the drawings.
<Display device>
FIG. 15 is a schematic block diagram illustrating a second embodiment of the display device according to the present invention, and FIG. 16 is a schematic configuration diagram illustrating a main configuration of the display device according to the present embodiment. Here, about the structure equivalent to 1st Embodiment (FIG.1, FIG.2, FIG.8) mentioned above, the same or equivalent code | symbol is attached | subjected and the description is simplified or abbreviate | omitted.

As shown in FIG. 15, the display device 100 </ b> B according to the present embodiment has a configuration in which the reset circuit 150 is omitted from the configuration shown in the first embodiment.
Here, as shown in FIG. 16, the display pixel EM arranged in the display panel 110 is applied with a configuration including the light emission drive circuit DC including the three thin film transistors described in the first embodiment. Therefore, the display pixel EM of each row has a configuration including a scan driver 120 that applies the scan signal Vsel and a power supply driver 180 that applies the power supply voltage Vsc, and is provided in the precharge circuit 140. In addition, the precharge control signal PCG for controlling the on / off operation of each switching element (thin film transistor TRpcg) is also configured to be generated and output by the scan driver 120, as in the configuration shown in the first embodiment. ing.

  Further, the scan driver 120 applied to the present embodiment has a configuration including a shift register 121 and an output circuit unit 122, for example, as in the first embodiment (see FIG. 2). 122 has a function (mode) for sequentially outputting the scanning signal Vsel to each scanning line SL based on the output control signal SOE and a function (mode) for simultaneously outputting the scanning signal Vsel to all the scanning lines SL. It is configured to be switchable.

  Here, as will be described later, in an operation (image display operation) in which display data is sequentially written by supplying the gradation current Ipix to the display pixels EM in each row arranged in the display panel 110, the scanning signal Vsel is used for each scanning. In an operation (precharge operation) which is set to a mode for sequentially outputting to the line SL and applies a precharge voltage to all the display pixels EM arranged in the display panel 110 to set a predetermined charge state (precharge operation). Is set to a mode for simultaneously outputting to all scanning lines SL.

<Display device drive control method>
Next, a drive control method in the display device according to the present embodiment will be described.
FIG. 17 is a timing chart showing a first example of the drive control method for the display device according to the present embodiment. Here, the drive control operation will be described with reference to the configuration of the display device shown in FIG. 16 and the equivalent circuit of the light emission drive circuit (display pixel) shown in FIG. FIG. 18 is a conceptual diagram for explaining a precharge operation applied to the drive control operation of the display device according to the present embodiment, and FIG. 19 is a write in the drive control operation of the display device according to the present embodiment. It is a simulation result which shows the relationship between time and a writing rate.

  In the drive control method in the display device 100B having the above-described configuration, for example, as shown in FIG. 17, all the display pixels EM arranged in the display panel 110 are simultaneously set to a selected state within one scanning period Tsc. Then, at least the precharge operation period Tpcg for setting the storage capacitor Cs provided in each display pixel EM to a predetermined charge state and the display data are written for each display pixel EM (light emission drive circuit DC) in each row as described above. This is executed by setting so as to include an image display operation period Tdis consisting of a write operation period Tse and a light emission operation period Tnse (see FIG. 7) in which a light emission operation is performed at a predetermined luminance gradation (Tsc ≧ Tpcg + Tdis). . Here, the precharge operation period Tpcg and the image display operation period Tdis are set so as not to overlap each other in time.

(Precharge operation period)
As shown in FIG. 17, in the precharge operation period Tpcg, first, the high-level scanning signal Vsel is applied to all the scanning lines SL provided in the display panel 110 from the scanning driver 120. The display pixel EM is set to the selected state, and a high-level precharge control signal PCG is supplied from the scan driver 120 to the precharge circuit 140 to set the precharge state.

  Thereby, the thin film transistor Tr12 provided in the light emission drive circuit DC (see FIG. 5) constituting each display pixel EM is turned on, and each thin film transistor (switching element) TRpcg provided in the precharge circuit 140 is turned on. Accordingly, the precharge voltage Vpcg is applied to the other end side (contact N12) of the storage capacitor Cs of the light emission drive circuit DC via each thin film transistor TRpcg and each data line DL, and the wiring added to each data line DL. The inter-capacitance Cd-s and the storage capacitor Cs of each display pixel EM (light emission drive circuit DC) are charged.

  Specifically, in the equivalent circuit of the light emission drive circuit DC shown in FIG. 10B, as shown in FIG. 18A, in the precharge operation, the TFT switch TrX (thin film transistors Tr11 and Tr12) is turned on ( Since the display pixel EM is in a selected state), between the signal input terminal TMin and the ground voltage, a series circuit composed of the wiring resistance Rdl and the inter-wiring capacitance Cd-s, and a series circuit composed of the TFT switch TrX and the thin film transistor Tr13 Are connected in parallel, and the circuit is equivalent to a circuit in which the storage capacitor Cs is connected between the gate and the source of the thin film transistor Tr13, and no current flows through the TFT switch TrX and the thin film transistor Tr13 (the thin film transistor Tr13 is turned off). Status).

  That is, in the equivalent circuit as shown in FIG. 18A, the precharge voltage Vpcg applied to each data line DL and each display pixel EM via the signal input terminal TMin is equal to the wiring resistance Rdl and the wiring capacitance Cd−. The same voltage component is held in the series circuit composed of s and the holding capacitor Cs. Here, a potential difference (corresponding to a gate-source voltage of the thin film transistor Tr13) Vpcg ′ generated at the both ends of the series circuit including the wiring resistance Rdl and the wiring capacitance Cd-s or the holding capacitance Cs in accordance with the precharge operation is The threshold voltage Vth of the thin film transistor Tr13 is set lower (Vpcg ′ ≦ Vth).

(Image display operation period)
Next, in the image display operation period Tdis after the end of the precharge operation period Tpcg, as shown in FIG. 17 and the light emission drive control method (see FIG. 7) of the light emission drive circuit DC described above, display pixels are displayed for each row. By sequentially setting the EM to the selected state and supplying the gradation current Ipix corresponding to the display data, the gradation current Ipix (≈write current Ia) is supplied to the holding capacitor Cs of each display pixel EM (light emission drive circuit DC). ) Based on the writing operation (writing operation period Tse) and the light emission driving current Ib based on the voltage component is supplied to the light emitting element (organic EL element OEL), and the luminance scale corresponding to the display data is supplied. The light emission operation (light emission operation period Tnse) in which the light emission operation is performed at the key is sequentially executed.

  Here, in the display data writing operation, the scanning driver 120 sequentially applies a high level scanning signal Vsel to each scanning line SL, sequentially sets the display pixels EM in each row to the selected state, and the gradation current Ipix. Is supplied via the data line DL, the TFT switch TrX is turned on as shown in FIG. 18B, and the write current Ia having a current value corresponding to the display data flows through the thin film transistor Tr13. Thus, the voltage component Vα corresponding to the write current Ia is charged on top of the voltage Vpcg ′ charged in advance in the storage capacitor Cs (Vpcg ′ + Vα).

  Therefore, a gradation current based on display data is preliminarily charged by a precharge operation so that a voltage Vpcg ′ lower than the threshold voltage Vth of the thin film transistor Tr13 for driving light emission is added and added to the voltage Vpcg ′ in a write operation. Since the voltage component corresponding to Ipix (≈write current Ia) can be charged, the inter-line capacitance Cd-s of the data line DL and the display pixel can be charged at the initial stage of the write operation (immediately after the gradation current Ipix is supplied). The voltage component corresponding to the display data can be held in a short writing time without charging the storage capacitor Cs.

  As a result, as shown in FIG. 19, although it does not reach the first embodiment described above, it is possible to improve the writing rate with respect to the writing time and to suppress insufficient writing of display data. A display device with good display image quality can be realized by causing the organic EL element to emit light with luminance gradation. In FIG. 19, the solid line SB is a simulation result showing the change in the writing rate with respect to the writing time when the precharge operation according to the present embodiment is executed, and the broken line SP executes the precharge operation. It is a simulation result which showed the change of the writing rate with respect to the writing time when not having written display data directly.

FIG. 20 is a timing chart showing a second example of the display device drive control method according to the present embodiment.
In the first example of the drive control method according to the present embodiment described above, as shown in FIG. 17, prior to the image display operation on the display pixels EM in each row, the precharge operation for all the display pixels EM is performed. In the second example of the drive control method, the method of executing the precharge operation individually immediately before the display data write operation for each row is applied. To do.

  Specifically, as shown in FIG. 20, first, the display pixels EM in each row are set in a selected state, and are provided in the inter-wire capacitances Cd-s and the display pixels EM added to all the data lines DL. A precharge operation period Tpcg for setting the storage capacitor Cs to a predetermined charge state, and a writing for supplying the corresponding voltage component to the storage capacitor Cs by supplying the gradation current Ipix (write current Ia) corresponding to the display data. The display operation period Tse is sequentially executed for each row, display data for one screen of the display panel is written, and in the light emission operation period Tnse after the write operation period Tse, the light emitting element (organic EL element) of each display pixel EM OEL) is displayed as image information by emitting light at a predetermined luminance gradation.

  In such a drive control method, as in the second example of the drive control method shown in the first embodiment described above, the display data (gradation current Ipix) writing operation to the display pixels EM in each row is performed. Since the precharge operation is executed every time immediately before the voltage Vpcg ′ charged based on the precharge voltage Vpcg charged in the storage capacitors Cs of the display pixels EM in each row can be suppressed. The voltage Vpcg ′ can be set and held at a desired voltage (in the first example described above, the threshold voltage Vth or less of the thin film transistor Tr13 for driving light emission), and the writing rate due to the decrease in the voltage Vpcg ′ Can be suppressed.

  In the first embodiment described above, the voltage V0 for charging the inter-line capacitance Cd-s added to each data line DL arranged in the display panel 110 in the precharge operation is expressed by the above equation (4). As shown in FIG. 4, the voltage Vs0 for supplying the light emission driving current when the light emission operation is performed at the minimum luminance gradation in each display pixel EM, the inter-wire capacitance Cd-s of the data line DL and the display pixel EM (light emission drive). Circuit DC) has a relationship (V0 = (1 + Cs / Cd-s) VS0) multiplied by a constant related to the ratio (Cs / Cd-s) to the storage capacitor Cs of the circuit DC). When the capacitance is set larger than the capacitance Cd-s (Cs >> Cd-s), the voltage V0 (that is, the precharge voltage Vpcg) for charging the inter-wiring capacitance Cd-s is a very large voltage value. And precharge voltage Vpcg It becomes necessary to use a power supply of high voltage, whereby power consumption is increased.

  On the other hand, in the present embodiment, the voltage Vpcg ′ for charging the storage capacitor Cs provided in the display pixel EM (light emission drive circuit DC) in the precharge operation is used as the threshold voltage of the light emission drive thin film transistor Tr13. Since the method of setting to Vth or less is applied, the display device can be easily realized by setting the voltage Vpcg ′ (that is, the precharge voltage Vpcg) to a relatively low voltage value, and the display An increase in power consumption of the apparatus can be suppressed.

<Third Embodiment>
Next, a third embodiment of the display device and its drive control method according to the present invention will be described with reference to the drawings.
The display device according to the present embodiment generally has the same configuration as that of the first embodiment (FIGS. 1, 2, and 8) described above. Here, detailed description of each component is omitted.

  FIG. 21 is a timing chart showing a first example of the display device drive control method according to the present embodiment, and FIG. 22 is a second example of the display device drive control method according to the present embodiment. This is a timing chart shown. Here, the drive control operation will be described with reference to the configuration of the display device shown in FIG. 8 and the light emission drive circuit (display pixel) shown in FIG.

  In the drive control method according to the first embodiment described above, as a precharge operation executed after the reset operation, all the display pixels EM are set to a non-selected state and a precharge voltage Vpcg is applied to each data line DL. Although the method for setting the added inter-wire capacitance Cd-s to a predetermined charging state has been described, in this embodiment, after the reset operation, all the display pixels EM are set to the selected state and the precharge voltage Vpcg is applied. Then, a method of performing a precharge operation that sets at least a storage capacitor Cs provided in each display pixel EM to a predetermined charge state is applied.

  Specifically, in the first example of the drive control method according to the present embodiment, as shown in FIG. 21, first, all the display pixels EM arranged in the display panel 110 are simultaneously selected in the reset operation period Trst. In the state set to the state, at least the electric charge accumulated (remaining) in the storage capacitor Cs of each display pixel EM is discharged to a predetermined power supply voltage (low potential power supply voltage Vcath), and all the display pixels EM are collectively collected. Then, in the precharge operation period Tpcg, in the state where all the display pixels EM are simultaneously set to the selected state, the interwiring capacitance Cd-s added to each data line DL, and all the The storage capacitor Cs provided in the display pixel is set in a predetermined charging state based on the precharge voltage Vpcg (for example, a voltage Vpcg ′ that is equal to or lower than the threshold voltage Vth of the thin film transistor Tr13 for driving light emission). A charging operation period Tse in which a gradation current Ipix (write current Ia) corresponding to display data is supplied to charge the corresponding voltage component Vα to the holding capacitor Cs, and each display The light emitting operation period Tnse for causing the light emitting element (organic EL element OEL) of the pixel EM to emit light at a luminance gradation corresponding to display data is sequentially executed for each row, and display data for one screen of the display panel is used as image information. indicate.

  In such a drive control method, prior to the image display operation (write operation, light emission operation) in the display pixels EM of each row, all the display pixels are similar to the reset operation described in the first embodiment. After discharging the charge accumulated in the holding capacitor Cs of the EM, the voltage Vpcg ′ not more than the threshold voltage Vth of the thin film transistor Tr13 for driving light emission is applied as in the precharge operation described in the second embodiment. Since the storage capacitor Cs is charged and then charged such that the voltage component Vα corresponding to the gradation current Ipix based on the display data is added to the storage capacitor Cs, the storage capacitor Cs is held. The voltage component corresponding to the display data during the write operation is suppressed by suppressing the phenomenon that the voltage value held in the hold capacitor Cs varies during the precharge operation due to the charge remaining in the capacitor Cs. It can be properly charged.

  Therefore, in the initial stage of the writing operation, the voltage component corresponding to the display data is held in a short writing time without charging the inter-wiring capacitance Cd-s of the data line DL and the holding capacitor Cs of the display pixel EM. Thus, the writing rate can be improved, and a light emission driving current having a current value appropriately corresponding to the display data is supplied to the light emitting element based on the voltage component, and each of the desired luminance gradations is provided. A display pixel (light-emitting element) can be operated to emit light, and a display device with favorable display image quality can be realized.

In the second example of the drive control method according to the present embodiment, a method of individually executing the reset operation and the precharge operation immediately before the display data write operation for each row is applied.
Specifically, as shown in FIG. 22, in the reset operation period Trst, the display pixel EM is set to a selected state, and at least the electric charge accumulated (remaining) in the storage capacitor Cs of each display pixel EM is supplied to a predetermined power source. The display pixel EM of the row is set to a reset state by discharging to a voltage (low potential power supply voltage Vcath), and then the display pixel EM of the row is set to a selected state in the precharge operation period Tpcg. The inter-wiring capacitance Cd-s added to each data line DL and the holding capacitance Cs provided in the display pixel EM in the row are in a predetermined charging state (for example, a thin film transistor Tr13 for driving light emission) based on the precharge voltage Vpcg. In the write operation period Tse, the gray-scale current Ipix (write current Ia) corresponding to the display data is set in the write operation period Tse. A series of operations for supplying and charging the corresponding voltage component Vα to the storage capacitor Cs of the display pixel EM of the row is executed for each row so as not to overlap in time, and in the light emission operation period Tnse, each row The light emitting element (organic EL element OEL) of the display pixel EM is caused to emit light with a luminance gradation corresponding to the display data, and display data for one screen of the display panel is displayed as image information.

  According to such a drive control method, the reset operation and the precharge operation to the display pixel EM of the row are performed every time immediately before the writing operation of the display data (gradation current Ipix) to the display pixel EM of each row. Since it is possible to suppress the variation of the voltage Vpcg ′ based on the precharge voltage Vpcg, which is executed and charged in the storage capacitor Cs of the display pixel EM in the row, it is possible to suppress a decrease in the voltage Vpcg ′ over time. In a short writing time, the voltage component appropriately corresponding to the display data can be held to improve the writing rate, and the luminance gradation appropriately corresponding to the display data can be improved based on the voltage component. Each display pixel (light emitting element) can be operated to emit light, and a display device with good display image quality can be realized.

100A, 100B Display device 110 Display panel 120 Scan driver 130 Data driver 140 Precharge circuit 150 Reset circuit 160 System controller 170 Display signal generation circuit 180 Power supply driver EM Display pixel DC Light emission drive circuit OEL Organic EL element

Claims (18)

  1. Luminance gradation components of display data via a plurality of display pixels arranged near intersections of a plurality of signal lines and a plurality of scanning lines arranged orthogonal to each other on the display panel. The current control type light emitting element provided in the display pixel is caused to emit light at a predetermined luminance gradation based on the gradation current, and desired image information is supplied to the display panel. In a display device for displaying
    Each display pixel has a storage capacitor for holding a charge based on the gradation current as a voltage component, a current path having one end connected to one end of the light emitting element and a power supply voltage applied to the other end, and a control terminal. The holding capacitor is provided between one end or the other end of the current path and the control terminal, and a light emission driving current based on a voltage component held in the holding capacitor is supplied to the light emitting element. A drive current control means having an active element for causing the light-emitting element to emit light, and a light-emitting drive circuit comprising:
    at least,
    Scanning drive means for applying a scanning signal to each scanning line and setting each display pixel connected to each scanning line to a selected state;
    Signal driving means for generating the gradation current based on the luminance gradation component of the display data and supplying the gradation pixels to the display pixels set in the selected state by the scan driving means via the signal lines;
    Precharge means for applying a precharge voltage to each signal line and setting a parasitic capacitance added to each signal line to a predetermined charge state;
    Power supply driving means for supplying the power supply voltage to the other end of the current path of the active element of each display pixel;
    When setting each display pixel to a non-selected state by the scanning driving unit and setting the parasitic capacitance to a predetermined charging state by the precharging unit, the power source driving unit is controlled to The first power supply voltage for setting the light emitting element to a non-light emitting state is set, the display pixels are set to a selected state by the scanning driving means, and the gradation current is applied to the display pixels by the signal driving means. When supplying and holding the electric charge based on the gradation current in the holding capacitor of each display pixel, the power supply driving unit is controlled to set the power supply voltage to the first power supply voltage, and to perform the scanning When the display unit is set to a non-selected state by the driving unit and the light emitting element is set to the light emitting state, the power source driving unit is controlled to set the power supply voltage and the light emitting element to the light emitting state. Before Is set to the first power supply voltage different from the second power supply voltage, and operation control means for controlling so as to emit light to the light emitting element based on said electric charge held in the storage capacitor of each display pixel,
    A display device comprising:
  2.   The display device according to claim 1, wherein the parasitic capacitance includes an inter-wiring capacitance formed between the signal line and the scanning line.
  3.   The said precharge means is equipped with the switching means which applies the said precharge voltage to all the said signal lines arrange | positioned at the said display panel simultaneously, The 1st or 2 characterized by the above-mentioned. Display device.
  4. The display device includes a reset unit that discharges at least the charge held in the display pixel and sets the display pixel to a reset state.
    The operation control unit controls the display pixel to be set to a selected state by the scan driving unit when discharging the electric charge held in the display pixel by the reset unit. Item 4. The display device according to any one of Items 1 to 3.
  5.   5. The display according to claim 4, wherein the reset unit includes a switching unit that applies a reset voltage to all the signal lines all at once and discharges the charge held in the storage capacitor. apparatus.
  6.   The scan driving means includes means for sequentially applying the scan signal to each of the scan lines and sequentially setting the display pixels in each row arranged in the display panel to a selected state. The display device according to claim 1.
  7.   The scan driving means includes means for applying the scan signal to all the scan lines at once and setting all the display pixels arranged on the display panel to a selected state at a time. The display device according to claim 6.
  8.   The display device according to claim 1, wherein the scan driving unit generates and outputs a precharge control signal for controlling an operation state of the precharge unit.
  9.   The display device according to claim 4, wherein the scan driving unit generates and outputs a reset control signal for controlling an operation state of the reset unit.
  10.   The display device according to claim 1, wherein the light emitting element is an organic electroluminescent element.
  11. Luminance gradation components of display data via a plurality of display pixels arranged near intersections of a plurality of signal lines and a plurality of scanning lines arranged orthogonal to each other on the display panel. The current control type light emitting element provided in the display pixel is caused to emit light at a predetermined luminance gradation based on the gradation current, and desired image information is supplied to the display panel. In the drive control method of the display device for displaying
    Each display pixel has a storage capacitor for holding a charge based on the gradation current as a voltage component, a current path having one end connected to one end of the light emitting element and a power supply voltage applied to the other end, and a control terminal. The holding capacitor is provided between one end or the other end of the current path and the control terminal, and a light emission driving current based on a voltage component held in the holding capacitor is supplied to the light emitting element. A drive current control means having an active element for causing the light-emitting element to emit light, and a light-emitting drive circuit comprising:
    at least,
    Each display pixel is set to a non-selected state, a precharge voltage is applied to each signal line, at least a parasitic capacitance added to each signal line is set to a predetermined charge state, and the power supply voltage is set to Setting the light emitting element to a first power supply voltage that sets the light emitting element to a non-light emitting state, and setting the light emitting element of each display pixel to a non-light emitting state;
    Each display pixel is set to a selected state, the gradation current based on the luminance gradation component of the display data is supplied to the display pixel via the signal line, and the storage capacitor of the display pixel is supplied. Holding the electric charge based on the gradation current, setting the power supply voltage to the first power supply voltage, and setting the light emitting element of each display pixel to a non-light emitting state;
    Each display pixel is set to a non-selected state, the power supply voltage is set to a second power supply voltage different from the first power supply voltage that sets the light emitting element to a light emitting state, and Light emitting operation of the light emitting element based on the electric charge held in the holding capacitor;
    A drive control method for a display device, comprising:
  12.   12. The display device according to claim 11, wherein the step of setting the parasitic capacitance to a predetermined charging state is executed only once at a timing prior to the step of supplying the gradation current to the display pixel. Drive control method.
  13.   The step of setting the parasitic 3 quantity to a predetermined charging state is performed every time the grayscale current is supplied to the display pixels in each row in the step of supplying the grayscale current to the display pixels. The drive control method for a display device according to claim 11.
  14.   The display device drive control method according to claim 11, wherein the step of setting the parasitic capacitance to a predetermined charging state is performed by setting the display pixel to a non-selected state.
  15.   The display device drive control method according to claim 11, wherein the step of setting the parasitic capacitance to a predetermined charging state is performed by setting the display pixel to a selected state.
  16. In the display device drive control method, the display pixel is set in a selected state, a reset voltage is applied to the signal line, and at least the charge held in the storage capacitor provided in the display pixel is discharged. And setting the display pixel to a reset state,
    The display device according to claim 11, wherein the step of setting the display pixel to the reset state is performed at a timing prior to the step of setting the parasitic capacitance to a predetermined charge state. Drive control method.
  17.   17. The drive control of a display device according to claim 16, wherein the step of setting the display pixel to a reset state is executed only once at a timing prior to the step of supplying the gradation current to the display pixel. Method.
  18.   The step of setting the display pixel to a reset state is performed each time the gray scale current is supplied to the display pixel in each row in the step of supplying the gray scale current to the display pixel. The display device drive control method according to claim 16.
JP2009243090A 2009-10-22 2009-10-22 Display and drive control method thereof Pending JP2010015187A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013076771A1 (en) * 2011-11-24 2013-05-30 パナソニック株式会社 Display device drive method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003114645A (en) * 2001-08-02 2003-04-18 Seiko Epson Corp Driving of data line used to control unit circuit
JP2004012897A (en) * 2002-06-07 2004-01-15 Casio Comput Co Ltd Display device and method for controlling driving of display device
JP2004021219A (en) * 2002-06-20 2004-01-22 Casio Comput Co Ltd Display device and driving method for the same
JP2004151558A (en) * 2002-10-31 2004-05-27 Seiko Epson Corp Electronic device, method for driving electronic device and electronic equipment

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003114645A (en) * 2001-08-02 2003-04-18 Seiko Epson Corp Driving of data line used to control unit circuit
JP2004012897A (en) * 2002-06-07 2004-01-15 Casio Comput Co Ltd Display device and method for controlling driving of display device
JP2004021219A (en) * 2002-06-20 2004-01-22 Casio Comput Co Ltd Display device and driving method for the same
JP2004151558A (en) * 2002-10-31 2004-05-27 Seiko Epson Corp Electronic device, method for driving electronic device and electronic equipment

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013076771A1 (en) * 2011-11-24 2013-05-30 パナソニック株式会社 Display device drive method
CN103229227A (en) * 2011-11-24 2013-07-31 松下电器产业株式会社 Display device drive method
US8922541B2 (en) 2011-11-24 2014-12-30 Panasonic Corporation Method of driving display device
JPWO2013076771A1 (en) * 2011-11-24 2015-04-27 パナソニック株式会社 Driving method of display device
CN103229227B (en) * 2011-11-24 2016-02-10 株式会社日本有机雷特显示器 The method of driving a display device

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