JP2009503818A - Method and apparatus for semiconductor processing - Google Patents

Abstract

A method and apparatus for manufacturing a semiconductor is attached to at least two transfer chambers with external walls, at least one holding chamber attached to the transfer chamber, and a wall of the transfer chamber. At least one load lock chamber and at least five process chambers attached to the wall of the transfer chamber. A method and apparatus for depositing a high dielectric constant film includes depositing a base oxide on a substrate in a first process chamber, and a decoupled plasma on the surface of the substrate in at least one second process chamber. Providing nitridation; annealing the surface of the substrate in a third process chamber; and depositing polycrystalline silicon in at least one fourth process chamber. The first, second, third and fourth process chambers are in fluid communication with a common internal chamber.
[Selection] Figure 3

Description

Background of the Invention

Field of Invention
[0001] Embodiments of the present invention generally relate to an integrated electronic device processing system configured to perform a processing sequence by a plurality of deposition processing modules.

Explanation of related technology

  [0002] Semiconductor devices are formed by processing a substrate in a multi-chamber processing system, such as an integrated tool. Multiple chambers in communication with each other in a closed environment are desirable because they reduce chemical and particulate contamination that occurs when the substrate is exposed to the atmosphere between the chambers and avoid further power consumption. The chambers are isolated by rigid walls, windows, slit valves, and other equipment to protect the rest of the processing system, and are mutually accessible by slit valves and robots that transport substrates between the chambers. The controlled processing environment includes a main frame, a pressure control system, a substrate transfer robot, a load lock, and a plurality of processing chambers. Processing in a controlled environment reduces defects and improves device yield.

  [0003] FIG. 1 (prior art) is shown in Applied Materials, Inc., Santa Clara, California. 1 depicts a schematic diagram of a multi-process chamber platform for semiconductor substrate processing commercially available as CENTURA ™ processing tool manufactured by FIG. 2 is from Applied Materials, Inc., located in Santa Clara, California. 1 depicts a schematic diagram of another multi-process chamber platform for semiconductor substrate processing that is commercially available as an ENDURA ™ processing tool manufactured by AA. These tools are adaptable to utilize single, double, or multi-blade robots for transferring substrates between chambers. Details of such a staged vacuum substrate processing system are disclosed in US Pat. No. 5,186,718 entitled “Staged- Vacuum Substrate Processing System and Method” issued February 16, 1993. Which is incorporated herein by reference. The exact arrangement and combination of chambers may be varied to carry out the specific steps of the fabrication process.

  [0004] The processing tool 100 depicted in FIG. 1 (prior art) includes a plurality of process chambers 114A-D, a transfer chamber 110, service chambers 116A-B, and a pair of load lock chambers 106A-B. Contains. In order to transport the substrate between the chambers, the transfer chamber 110 contains a robot transport mechanism 113. The transport mechanism 113 has a pair of substrate transport blades 113A that are each attached to the distal end of the extendable arm 113B. The blade 113A is used to transport individual substrates to the process chamber. In operation, one of the substrate transport blades, such as blade 113A of transport mechanism 113, retrieves substrate W from one of the load lock chambers, such as chambers 106A-B, and a first stage of processing, eg, a chamber. The substrate W is transferred to physical vapor deposition (PVD) at 114A to 114D. If the chamber is occupied, the robot waits until processing is complete and removes the processed substrate from the chamber by one blade 113A and inserts a new substrate by a second blade (not shown). . Once the substrate is processed, it can be moved to a second stage of processing. For each movement, the transport mechanism 113 generally has a blade that carries the substrate and an empty blade to perform the substrate exchange. The transport mechanism 113 waits in each chamber until replacement can be achieved.

  [0005] When processing is completed in the process chamber, the transport mechanism 113 moves the substrate W from the last process chamber and transports the substrate W to a cassette in the load lock chamber 106A-B. From the load lock chambers 106A-B, the substrate moves to the factory interface 104. The factory interface 104 generally operates to transfer substrates between the pod loaders 105A-D and the load lock chambers 106A-B in an atmospheric pressure clean environment. The clean environment of the factory interface 104 is generally provided by an air filtration process such as HEPA filtration. The factory interface 104 may also include a substrate aligner / aligner (not shown) that is used to properly align the substrate prior to processing. At least one substrate robot, such as robots 108A-B, is positioned at the factory interface 104 and transports the substrate between various locations / locations within the factory interface 104 and to other locations in communication therewith. . The robots 108A-B may be configured to move along a tracking system in the enclosure 104 from a first end to a second end of the factory interface 104.

  [0006] The processing tool 200 depicted in FIG. 2 (prior art) includes, for example, four process chambers 232, 234, 236 and 238, an internal transfer chamber 258, a pre-clean chamber 222, and a cooling chamber 224. , An initial transfer chamber 206, a substrate aligner and degas chamber 218 and 216, and a pair of load lock chambers 202 and 204. The initial transfer chamber 206 is centrally located with respect to the load lock chambers 202 and 204, the substrate aligner and degas chambers 216 and 218, the preclean chamber 222, and the cooling chamber 224. To perform substrate transfer between these chambers, the initial transfer chamber 206 contains a first robot transfer mechanism 210, such as a single blade robot (SBR). The substrate is typically transferred from the stage to a processing tool 200 in a cassette (not shown) that is placed in one of the load lock chambers 202 or 204. The SBR 210 transports substrates one at a time from the cassette to any one of the four chambers 212, 214, 216, and 218. Typically, a given substrate is first placed in the substrate director and one of the degas chambers 216 and 218 and then moved to the preclean chamber 212. The cooling chamber 214 is generally not used until after the substrate is processed in the process chambers 232, 234, 236 and 238. Individual substrates are transported onto a substrate transport blade located at the distal end of a pair of extendable arms of SBR 210. The transport operation is controlled by the microprocessor controller 201.

  [0007] The internal transfer chamber 258 is surrounded by and has access to four process chambers 232, 234, 236 and 238 and a pre-clean chamber 222 and a cooling chamber 224. In order to perform the transport of substrates between chambers, the internal transfer chamber 258 contains a second transport mechanism 230, such as a double blade robot (DBR). DBR 230 has a pair of substrate transport blades attached to the distal ends of a pair of extendable arms. In operation, one of the substrate transport blades of the DBR 230 retrieves a substrate from the pre-clean chamber 222 and transports the substrate to a first stage of processing, such as physical vapor deposition (PVD) in the chamber 232. If the chamber is occupied, the DBR 230 waits until processing is complete, then replaces the substrate, ie, removes the processed substrate from the chamber by one blade and removes a new substrate by the second blade. insert. Once the substrate is processed (ie, PVD of the material on the substrate), the substrate can be moved to a second stage of processing, and the like. For each movement, the DBR 230 generally has a blade that carries the substrate and an empty blade to perform the substrate exchange. DBR 230 waits in each chamber until a replacement can be achieved.

  [0008] Once processing is completed in the process chamber, the transport mechanism 230 moves the substrate out of the process chamber and transports the substrate to the cooling chamber 222. The substrate is then removed from the cooling chamber using the first robot transfer mechanism 210 in the initial transfer chamber 206. Finally, the substrate is placed in a cassette in one of the load lock chambers 202 or 204 to complete the substrate fabrication process in the integrated tool.

  [0009] The effectiveness of the substrate fabrication process is measured by two related factors, device yield and cost of ownership (COO). These factors have a direct impact on electronic device production costs and device manufacturer competitiveness. COO is affected by a number of factors, but is most affected by system and chamber throughput, and simply by the number of substrates per hour that are processed using the processing sequence. A process sequence is a combination of device fabrication steps that are completed in one or more processing chambers in an integrated tool. If the substrate throughput of an integrated tool is not limited by robot availability, long device fabrication steps limit process sequence throughput, increase COO, and make potentially desirable process sequences impractical. .

  [0010] An integrated tool utilizes a plurality of single substrate processing chambers adapted to perform a semiconductor device fabrication process. Typical system throughput for conventional fabrication processes such as PVD chambers and CVD chambers provides a normal deposition process for 30-60 substrates per hour. A system with two to four process chambers with all the usual pre- and post-processing steps has a maximum processing time of about 1-2 minutes. The maximum processing step time may vary based on the number of parallel processes and redundant chambers contained in the system.

  [0011] A primary advantage of smaller semiconductor devices is to improve device processing speed and reduce the generation of heat by the device. Process variability tolerance decreases as the size of the semiconductor device decreases. To meet these more stringent process requirements, the industry has developed new processes, which often take more time to complete. For example, some ALD processes require about 10 to about 200 minutes of chamber processing time to deposit a high quality layer on the substrate surface, which is on the order of about 0.3 to about 6 per hour. Result in a substrate processing sequence throughput of the substrate. If device performance improvements are forced to use a slower process, fabrication costs increase due to slower substrate throughput. Additional chambers can be added to the integrated processing tool to meet the desired throughput, but the number of process chambers and tools without significantly increasing the size of the integrated processing tool and the staff operating the tool Is often unrealistic. These are often the most expensive aspects of the substrate fabrication process.

  [0012] One factor that can affect device performance variability and repeatability is queue time. The cue time is that after the first process is completed on the substrate, the substrate is exposed to the air and other contaminants before the second process is completed on the substrate to prevent a reduction in device performance. It is a time when there is a risk. If the substrate is exposed to the atmosphere or other contaminant source for longer than an acceptable cue time, device performance may be reduced due to contamination of the interface between the first layer and the second layer. Thus, process sequences that involve exposure of the substrate to the atmosphere or other sources of contamination must control or minimize the time that the substrate is exposed to these sources to prevent device performance variability. Also, useful electronic device fabrication processes must deliver uniform and repeatable process results, minimize contamination, and provide acceptable throughput for use in substrate processing sequences.

  [0013] High dielectric constant materials such as metal oxides are one type of thin film formed on a substrate. Problems with current methods for forming a metal oxide film on a substrate include high surface roughness, high crystallinity, and / or poor nucleation of the formed metal oxide film.

  [0014] Accordingly, there is a need for improved processes and apparatus for forming high-k dielectric materials on a substrate. There is also a need for a system, method and apparatus that can process substrates to meet the required device performance objectives and increase system throughput.

Summary of the Invention

  [0015] The present invention generally provides a method and apparatus for integrally processing a substrate with two or more processing tools, each processing tool having at least one transfer chamber with an external wall, wherein Wherein at least one intermediate chamber connects the processing tool, and the integrated processing tool has at least five process chambers attached to the wall of the transfer chamber. The present invention also generally provides a method for depositing a high dielectric constant film in at least five processing chambers disposed on first and second processing tools connected by one or more intermediate chambers. Provide an integrated processing tool.

  [0016] In order that the above-cited features of the invention may be understood in detail, a more specific description of the invention briefly summarized above may be made by reference to the embodiments, some of which Is illustrated in the accompanying drawings. However, the attached drawings illustrate only typical embodiments of the invention, and the invention should not be regarded as a limitation on the scope of the invention as it may recognize other equally effective embodiments. It should be noted.

Detailed description

[0032] The present invention relates to an integrated processing tool configured to execute an extended processing sequence by combining two or more processing tools.
Processing tools
[0033] FIGS. 1 and 2 provide embodiments of usable processing tools where the exact arrangement and combination of processing chambers may be varied to perform specific steps of the fabrication process. However, the total number of processing chambers is limited by several factors including the external surface area of the internal chamber for mounting compatible process chambers. That is, the internal chamber dimensions balance between providing a compatible process chamber, saving floor space, and constructing the robot to reach the internal portion of the chamber and the load lock chamber. Must be selected. The service chamber may also be attached to the outer surface area of the inner chamber.
Integrated processing tool with 5 or more process chambers
[0034] FIG. 3 is a schematic diagram of an embodiment of an integrated processing tool 300 that combines two processing tools 301A, 301B. The system controller 302 controls both the processing tools 301A and 301B. Inner chamber 301 has two regions 301A, 301B connected by intermediate chambers 308A, 308B and characterizes an additional external surface area for mounting additional process chambers. This shape facilitates placement of the service chamber and the two load lock chambers 306A-B along the exterior of region 301A. This shape also provides an additional process chamber of up to six process chambers 314A-F. The two regions 301A and 301B of the internal chamber 310 are connected by intermediate chambers 308A and 308B to facilitate communication between the robot 315 and the robot 313. The intermediate chambers 308A, 308B may be service chambers such as annealing chambers.

  [0035] FIG. 4 is a schematic diagram of an alternative embodiment of an integrated processing tool 400. As shown in FIG. Although the tool length is increased, the tool width is comparable to smaller systems such as standard ENDURA ™ tools. Thus, the external surface area and internal volume of the internal chamber 410 are larger than the standard ENDURA ™ tool. The larger external surface area allows multiple service chambers and a single load lock 406A to be placed along the external surface of the integrated processing tool 400. The substrate is introduced into the processing tool 400 via the front end environment 401. The larger external surface area also provides a place for additional process chambers 414A-G, ie seven process chambers. The two regions 403A and 403B of the internal chamber 410 are connected by the intermediate chambers 408A and 408B to facilitate communication between the robot 415 and the robot 413. The intermediate chambers 408A and 408B may be service chambers. Load lock 406A may be an upper and lower load lock such as the upper and lower load lock chambers described in US Pat. No. 5,961,269, incorporated herein by reference.

  [0036] For both the embodiment of FIG. 3 and FIG. 4, the placement of system controllers 302, 402, service chambers and process chambers 314A-H, 414A-I may provide optimal robot access, heat transfer optimization or other factors. May be selected. The number of process chambers may also be adjusted for the 4-6 process chambers of the embodiment of FIG. 3 and the 4-7 process chambers of FIG. Controller parameters may be adjusted for larger integrated processing tool embodiments. Purge gas, gas delivery system and exhaust system flow rates may be modified for larger internal chambers to account for the overall larger integrated processing tool volume.

Load lock chamber
[0037] The load lock provides a first volume interface between the front end environment and the next transfer chamber. In the embodiment of FIG. 3, two load locks 306A, 306B are provided to increase throughput by alternating communication with transfer chamber 301B and front end environment 320. Thus, one load lock is in communication with the transfer chamber, while the second load lock is in communication with the front end environment. In one embodiment, the load lock is a batch type load lock that can receive and hold more than one substrate from the factory interface, whereas the chamber is sealed before the transfer chamber. And evacuated to a vacuum level low enough for transfer of the substrate to. Preferably, the batch load lock can hold 25-50 substrates at a time. In one embodiment, the load lock may be adapted to cool the substrate after processing with an integrated tool. In one embodiment, the substrate held in the loadlock is convectively provided by flowing gas from a gas source inlet (not shown), both mounted on the loadlock, to a gas outlet (not shown). May be cooled. In another embodiment, the load lock may be fitted with a load lock cassette that includes a plurality of thermally conductive shelves (not shown) that can be cooled. Since the shelf can be interleaved between the substrates held in the cassette, there is a gap between the shelf and the substrate. In this embodiment, the shelf can provide uniform heating and cooling of the substrate in order to avoid damage and warpage of the substrate by cooling the substrate radially. In another embodiment, the shelf contacts the surface of the substrate and cools the substrate by conducting heat from this surface.

  [0038] In one embodiment, the integrated tool is adapted to process substrates at or near atmospheric pressure (eg, 760 Torr) so that it loads as an intermediate chamber between the factory interface and the transfer chamber. No lock is required. In this embodiment, the factory interface robot may transfer the substrate “W” directly to the robot, or the factory interface may transfer the substrate “W” to a passage chamber (not shown) that takes up the location of the load lock. Robots and factory interface robots can change substrates. The transfer chamber may be continuously purged with an inert gas to minimize the partial pressure of oxygen, water and / or other contaminants in the transfer chamber, the processing chamber and service chamber mounted in place. . Usable inert gases include, for example, argon, nitrogen or helium.

Service chamber
[0039] Service chambers 308A, B or 408A, B are adapted for metrology, degasification, orientation, cooling and other processes. The measurement chamber can provide film thickness measurement and composition analysis. The substrate may be oriented in the service chamber and / or degassed using an IR lamp mounted on the service chamber. In one aspect of the invention, a pre-clean process step may be completed on the service chamber substrate to remove surface contamination. The service chamber may be replaced with any of the process chambers.

Process chamber
[0040] In one aspect of the invention, one or more of the single substrate processing chambers may be RTP chambers that can be used to anneal the substrate before and after performing a batch deposition step. The RTP process is available from Applied Materials, Inc., located in Santa Clara, California. May be performed using commercially available RTP chambers and associated process hardware. In another aspect of the invention, one or more of the single substrate processing chambers may be a CVD chamber. Examples of such CVD process chambers are available from Applied Materials, Inc., located in Santa Clara, California. DXZ (TM) chamber, Ultima HDP-CVD (TM) chamber and PRECISION5000 (R) chamber commercially available from In another aspect of the invention, one or more of the single substrate processing chambers may be PVD chambers. Examples of such PVD process chambers are available from Applied Materials, Inc., located in Santa Clara, California. An Endura ™ PVD processing chamber commercially available from In another aspect of the invention, one or more of the single substrate processing chambers may be a DPN chamber. Examples of such DPN process chambers are available from Applied Materials, Inc., located in Santa Clara, California. DPN Centura ™ chamber commercially available from In another aspect of the invention, one or more of the single substrate processing chambers may be a process / substrate metrology chamber. Processes completed in the process / substrate metrology chamber include techniques used to measure film thickness and / or film composition, such as particle measurement techniques, residue gas analysis techniques, XRF techniques, and ellipsometry techniques However, it is not limited to these.

High dielectric constant film deposition
[0041] FIGS. 5-11 are process flow diagrams of processes for depositing high dielectric constant (high k) films. Each of these processes requires access to four or more process chambers before reloading the substrate into a further integrated tool. More chambers are used to divide the substrate processing time between the chambers. High-k film deposition is improved when using multiple process chambers that can be used with a single integrated tool by accessing the chamber for multiple process steps. Larger process tools facilitate access to the process chamber with shorter lag times to reduce chemical exposure during transport between tools.

  [0042] FIG. 5 illustrates the deposition of a high-k film that first deposits a base oxide at step 501. The base oxide may be deposited using in situ steam generation (ISSG) in one process chamber. Step 502 then treats the deposited oxide by decoupled plasma nitridation. Decoupled plasma nitridation may be performed in two process chambers to accelerate the nitridation process. Step 503 provides an annealing step. The annealing step may be rapid heat annealing or may be performed in a single process chamber. Next, step 504 is a polycrystalline silicon deposition step. Step 504 may require two process chambers.

  [0043] FIG. 6 is an alternative embodiment of a process for depositing a high-k film. Step 601 is the deposition of a high-k film using any number of processes, such as atomic layer deposition that may be performed in one or two process chambers. Step 602 is an annealing step, which may be a rapid heating annealing performed in one process chamber. Step 603 is a decoupled plasma nitridation performed in two process chambers. Step 604 is another annealing step performed in one process chamber. Step 605 is an atomic layer deposition step that may be performed in one or two process chambers.

  [0044] FIG. 7 is a further embodiment of a process for depositing a high-k film. Step 701 deposits silicon by atomic layer deposition using, for example, a single process chamber. Step 702 deposits oxide using ISSG in one process chamber. Step 703 uses decoupled plasma nitridation in the two process chambers. Step 704 is an annealing step performed in one process chamber. Step 705 is atomic layer deposition in one or two process chambers. Step 706 is a polycrystalline silicon deposition step that may use two process chambers.

  [0045] FIG. 8 is a further alternative embodiment of a process for depositing a high-k film. Step 801 deposits silicon using atomic layer deposition in one process chamber. Step 802 deposits oxide using ISSG in one process chamber. Step 803 is a decoupled plasma nitridation step using one or two chambers. Step 804 is an annealing step, such as rapid heating annealing, in one process chamber. Step 805 is another decoupled plasma nitridation step like step 803. Step 806 is an annealing step like step 804. Step 807 is an atomic layer deposition step that may use one or two process chambers.

  [0046] FIG. 9 is a further embodiment of a process for depositing a high dielectric constant film. Step 901 deposits silicon, for example by atomic layer deposition using a single process chamber. Step 902 is a cleaning step to improve the silicon surface. Cleaning may include annealing, plasma cleaning with ozone or other gas, or etching of the substrate in one process chamber. Step 903 is an oxide formation step using ISSG or other methods in one process chamber. Step 904 is a polycrystalline silicon deposition that may use two process chambers. Step 905 anneals in one process chamber using a method such as rapid heat annealing.

  [0047] FIG. 10 is a further embodiment of a process for depositing a high dielectric constant film. Step 1001 deposits silicon by atomic layer deposition using, for example, one process chamber. Step 1002 is a cleaning step to improve the silicon surface. Cleaning may include annealing, plasma cleaning with ozone or other gas, or etching of the substrate in one process chamber. Step 1003 is an oxide formation step using ISSG or other methods in one process chamber. Step 1004 is a high-k film deposition using any number of processes, such as atomic layer deposition performed in two process chambers.

  [0048] FIG. 11 is a further embodiment of a process for depositing a high dielectric constant film. Step 1101 deposits silicon by atomic layer deposition using, for example, two process chambers. Step 1102 is a cleaning step to improve the silicon surface. Cleaning may include annealing, plasma cleaning with ozone or other gas, or etching of the substrate in one process chamber. Step 1103 is an epitaxial deposition step. Silicon, silicon carbide, silicon oxide or silicon nitride may be epitaxially deposited in two process chambers.

[0049] FIG. 12 illustrates a transistor having a gate structure formed in accordance with one embodiment of the present invention. A plurality of field isolation regions 1208 containing silicon germanium or silicon carbon are used to connect a well of one type of conductive (eg, p-type) planar layer 1203 to an adjacent well of another type (eg, n-type) (see FIG. (Not shown). A gate dielectric layer 1211 is formed over the box oxide 1202 and the well 1203. Typically, the gate dielectric layer 1211 may be formed by depositing or growing a layer of material such as silicon oxide (SiO _n ) and / or silicon oxynitride having a dielectric constant of less than about 5.0. Recent advances in gate dielectric technology have shown that higher dielectric constant materials (k> 10) are more desirable for forming the gate dielectric layer 1211. Thus, examples of suitable materials employed are metal oxides (Al ₂ O ₃ , ZrO ₂ , HfO ₂ , TiO ₂ , Y ₂ O ₃ and La ₂ O ₃ ), ferroelectrics (lead zirconate titanate) (PZT) and barium strontium titanate (BST)), amorphous metal silicates (HfSi _x O _y and ZrSi _x O _y ), amorphous silicate oxides ((HfO ₂ and ZrO ₂ ) and paraelectrics (Ba _x including sr _1-x TiO _3, and _{PbZr x Ti 1-x O 3} ), without being restricted thereto. high k layers containing these materials may be formed by various deposition processes.

  In addition, a conductive gate electrode layer 1212 is blanket deposited on the gate dielectric layer 1211. In general, the gate electrode layer 1212 may comprise a material such as doped polycrystalline silicon, undoped polycrystalline silicon, silicon carbide, or a silicon germanium compound. However, contemplated embodiments are gate electrodes containing metals, metal alloys, metal oxides, single crystal silicon, amorphous silicon, silicides, or other materials well known in the art for forming gate electrodes Layer 1212 may be included.

  [0051] A hard mask layer 1213, such as a nitride layer, is deposited on the conductive layer 1212 by a CVD process. A photolithography process is then performed that includes the steps of masking, exposing and developing the photoresist layer to form a photoresist mask (not shown). The pattern of the photoresist mask is transferred to the hard mask layer by etching the hard mask layer on top of the gate electrode layer 1212 using the photoresist mask to align the etch, thereby causing the hard mask 1213 to move to the gate electrode. It can be produced on layer 1212. A further layer 1214 may be formed on the hard mask 1213.

  [0052] This structure is further modified by using a hard mask to align the etch, removing the photoresist mask, and etching the gate electrode layer 1212 to the top of the dielectric layer 1211, thereby A conductive structure including the remaining material of the gate electrode layer 1212 is created below the hard mask. This structure results from etching the gate electrode layer 1212, not the hard mask or the gate dielectric layer 1211. By continuing the processing sequence, the gate dielectric layer 1211 is etched on top of the planar layer 1203. Gate electrode 1212 and gate dielectric 1211 together form a composite structure, also known as a gate stack or gate of an integral device such as a transistor.

  [0053] In further processing of the gate stack, shallow source / drain extensions 1215 are formed by utilizing an implantation process. The gate electrode 1212 protects the substrate region below the gate dielectric 1211 from ion implantation. A rapid heating process (RTP) annealing may then be performed to partially drive the tip 1209 below the gate dielectric 1211.

  [0054] Next, a conformal thin oxide layer 1210 is deposited over the entire substrate surface. This oxide layer is used to protect the silicon surface from a spacer layer (not shown), usually a silicon nitride layer. A conformal thin oxide layer is typically deposited by TEOS source gas in a low pressure chemical vapor deposition chamber at high temperature (> 600 ° C.). The thin oxide layer relieves stress between the silicon substrate and the nitride spacer and also protects the gate corner from the silicon nitride spacer by providing another material layer. If a low-k non-silicon nitride material is used as the sidewall spacer, this conformal thin oxide layer 1210 can optionally be eliminated or replaced with another low dielectric constant material. .

  [0055] For advanced device manufacturing, if the dielectric constant of the spacer layer (not shown) or oxide layer 1210 is too high, the resulting structure often results in excessive signal crosstalk. In addition, the thermal CVD process used to deposit silicon nitride often requires high deposition temperatures. High deposition temperatures often result in high thermal cycling and changes in the dopant profile at the tip 1209. Accordingly, it is desirable to have a spacer layer deposition process with a low deposition temperature.

  [0056] FIG. 13 illustrates a transistor having a gate structure formed in accordance with one embodiment of the present invention. An isolation oxide 1303 is formed on the planar layer 1302. The active area 1305 is silicon or a silicon-containing material that has been cleaned by a process such as ozone plasma. The field isolation region 1308 is a silicon-containing material such as silicon or silicon germanium.

  [0057] The availability of multiple chambers with a single integrated tool provides a way to optimize heat distribution. It also offers the possibility to optimize the metal film properties and the resulting DRAM and STI formation. High-k films are desirable for manufacturing applications that produce high-k metal gate stack structures.

Alternative integrated processing tool with 8 or more process chambers
[0058] FIG. 14 is a schematic diagram of an alternative embodiment of an integrated processing tool 1400. As shown in FIG. A system controller 1402 controls the system. The internal chamber 1410 has two regions connected by a holding chamber 1408 and features an additional external surface area for mounting additional process chambers. This shape facilitates the placement of four service chambers 1416A-D and two load lock chambers 1406A-B along the exterior of the internal chamber 1410. This shape also provides additional process chambers, up to eight process chambers 1414A-H. The two regions of the internal chamber 1410 are connected by a holding chamber 1408 to facilitate communication between the robot 1415 and the robot 1413. The holding chamber 1408 may be a service chamber.

  [0059] FIG. 15 is a schematic diagram of a further alternative embodiment of an integrated processing tool 1500. As shown in FIG. Although the tool length is increased, the tool width is comparable to smaller systems such as standard ENDURA ™ tools. Accordingly, the external surface area and internal volume of the internal chamber 1510 are larger than the standard ENDURA ™ tool. The larger external surface area allows four service chambers 1516A-D and one load lock 1501 placed along the external surface of the integrated processing tool 1500. The larger external surface area also provides room for additional process chambers 1514A-I, up to nine process chambers. Two regions of the internal chamber 1510 are connected by a holding chamber 1508 to facilitate communication between the robot 1515 and the robot 1513. The holding chamber 1508 may be a service chamber. The load lock 1501 may be an upper and lower load lock such as the upper and lower load lock chambers described in US Pat. No. 5,961,269, incorporated herein by reference.

  [0060] For both the embodiment of FIG. 14 and FIG. 15, the placement of system controllers 1402, 1502, service chambers 1416A-D, 1516A-D and process chambers 1414A-H, 1514A-I provides optimal robot access, thermal Selection may be made for transmission optimization or other factors. The number of process chambers may also be adjusted for the 4-8 process chambers of the embodiment of FIG. 14 and the 4-9 process chambers of FIG. Controller parameters may be adjusted for larger integrated processing tool embodiments. The purge gas, gas delivery system and exhaust system flow rates may also be modified for larger internal chambers to account for the overall larger integrated processing tool volume.

Alternative load lock chamber
[0061] The load lock provides a first vacuum interface between the front end environment and the next transfer chamber. In the embodiment of FIG. 14, two load locks are provided to increase throughput by alternating communication with the transfer chamber and front end environment. Thus, one load lock is in communication with the transfer chamber, while the second load lock is in communication with the front end environment. In one embodiment, the load lock is a batch type load lock that can receive and hold more than one substrate from the factory interface, whereas the chamber is sealed and the substrate is transferred to the transfer chamber. Is evacuated to a vacuum level low enough to transport Preferably, the batch load lock can hold 25-50 substrates at a time. In one embodiment, the load lock may be adapted to cool the substrate after processing with an integrated tool. In one embodiment, the substrates held in the loadlock are both convectively brought about by a gas flow from a gas source inlet (not shown) to a gas outlet (not shown) mounted on the loadlock. It may be cooled. In another embodiment, the load lock may be fitted with a load lock cassette that includes a plurality of thermally conductive shelves (not shown) that can be cooled. Since the shelf can be interleaved between the substrates held in the cassette, there is a gap between the shelf and the substrates. In this embodiment, the shelf can provide uniform heating and cooling of the substrate in order to avoid damage and warpage of the substrate by cooling the substrate radially. In another embodiment, the shelf contacts the surface of the substrate and cools the substrate by conducting heat from the surface of the substrate.

  [0062] In one embodiment, the integrated tool is adapted to process substrates at or near atmospheric pressure (eg, 760 Torr) so that it is loaded as an intermediate chamber between the factory interface and the transfer chamber. No lock is required. In this embodiment, the factory interface robot transfers the substrate “W” directly to the robot, or the factory interface robot transfers the substrate “W” to a passage chamber (not shown) that takes the place of the load lock. Therefore, the robot and the factory interface robot can replace the substrate. The transfer chamber may be continuously purged with an inert gas to minimize the partial pressure of oxygen, water and / or other contaminants in the transfer chamber, the processing chamber and service chamber mounted in place. . Usable inert gases include, for example, argon, nitrogen or helium.

Alternative service chamber
[0063] The service chamber is adapted for degassing, orientation, cooling and other processes. The substrate may be oriented in the service chamber and / or degassed using an IR lamp mounted on the service chamber. In one aspect of the invention, a pre-clean process step may be completed on the substrate of the service chamber to remove surface contamination.

Alternative process chamber
[0064] In one aspect of the invention, one or more of the single substrate processing chambers may be an RTP chamber that can be used to anneal the substrate before and after performing a batch deposition step. The RTP process is available from Applied Materials, Inc., located in Santa Clara, California. May be performed using commercially available RTP chambers and associated process hardware. In another aspect of the invention, one or more of the single substrate processing chambers may be a CVD chamber. Examples of such CVD process chambers are available from Applied Materials, Inc., located in Santa Clara, California. DXZ (TM) chamber, Ultimate HDP-CVD (TM) and PRECISION5000 (R) chambers commercially available from In another aspect of the invention, one or more of the single substrate processing chambers may be PVD chambers. Examples of such PVD process chambers are available from Applied Materials, Inc., located in Santa Clara, California. An Endura ™ PVD processing chamber commercially available from In another aspect of the invention, one or more of the single substrate processing chambers may be a DPN chamber. Examples of such DPM process chambers are available from Applied Materials, Inc., located in Santa Clara, California. DPN Centura ™ commercially available from In another aspect of the invention, one or more of the single substrate processing chambers may be a process / substrate metrology chamber. Processes completed in the process / substrate metrology chamber include techniques used to measure film thickness and / or film composition, such as particle measurement techniques, residue gas analysis techniques, XRF techniques, and ellipsometry techniques Is possible, but is not limited to these.

  [0065] While the above is directed to embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope is as follows: This is determined by the claims.

(Prior Art) is a schematic diagram of a prior art processing tool. (Prior Art) is a schematic diagram of an alternative prior art processing tool. 1 is a schematic diagram of an embodiment of an integrated processing tool. FIG. FIG. 6 is a schematic diagram of an embodiment of an alternative embodiment of an integrated processing tool. It is a flowchart of one Embodiment of a substrate processing sequence. 6 is a flowchart of an alternative embodiment of a substrate processing sequence. 6 is a flowchart of a further alternative embodiment of a substrate processing sequence. 6 is a flowchart of a further alternative embodiment of a substrate processing sequence. 6 is a flowchart of a further alternative embodiment of a substrate processing sequence. 6 is a flowchart of a further alternative embodiment of a substrate processing sequence. 6 is a flowchart of a further alternative embodiment of a substrate processing sequence. FIG. 6 is a cross-sectional view of an embodiment of a substrate structure. FIG. 6 is a cross-sectional view of an alternative substrate structure embodiment. FIG. 6 is a schematic diagram of an alternative embodiment of an integrated tool. FIG. 6 is a schematic view of a further alternative embodiment of an integrated tool.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Processing tool, 104 ... Factory interface, 105 ... Pod loader, 106 ... Load lock chamber, 108 ... Robot, 110 ... Transfer chamber, 113 ... Transport mechanism, 113A ... Substrate transport blade, 113B ... Extendable arm, 114 ... Process Chamber 116 116 Service chamber 200 Processing tool 202 204 Load lock chamber 206 Initial transfer chamber 210 First robot transfer mechanism 212 214 216 218 Chamber 222 Pre-clean chamber 224 ... Cooling chamber, 230 ... Second transport mechanism, 232, 234, 236, 238 ... Process chamber, 258 ... Internal transfer chamber, 300 ... Integrated processing tool, 301 ... Processing tool, 302 ... System controller, 306 ... Lock Lock, 308 ... Intermediate Chamber, 310 ... Internal Chamber, 314 ... Process Chamber, 400 ... Integrated Processing Tool, 401 ... Front End Environment, 402 ... System Controller, 403 ... Region, 410 ... Internal Chamber, 414 ... Process Chamber, 1202 ... Box oxide, 1203 ... Well, 1208 ... Field isolation region, 1210 ... Oxide layer, 1211 ... Gate dielectric layer, 1212 ... Gate electrode layer, 1213 ... Hard mask layer, 1214 ... Layer, 1215 ... Shallow source / drain Extension part 1302 ... Planar layer 1303 ... Separation oxide 1305 ... Active area 1400 ... Integrated processing tool 1402 ... System controller 1406 ... Load lock chamber 1408 ... Holding chamber 1410 ... Internal chamber 1413 Robot, 1414 ... Process chamber, 1415 ... Robot, 1416 ... Service chamber, 1500 ... Integrated processing tool, 1501 ... Load lock, 1502 ... System controller, 1508 ... Holding chamber, 1510 ... Internal chamber, 1513 ... Robot, 1514 ... Process Chamber, 1515 ... Robot, 1516 ... Service chamber

Claims (24)

An integrated processing tool for manufacturing semiconductors,
A first processing tool having at least one transfer chamber and at least one load lock attached to the transfer chamber;
A second processing tool having at least one transfer chamber;
At least one intermediate chamber attached to the first processing tool and the second processing tool;
With
An integrated processing tool, wherein at least five process chambers are attached to the transfer chamber.   The integrated processing tool of claim 1, wherein each transfer chamber is attached to the at least one intermediate chamber by a slit valve.   The integrated processing tool of claim 1, wherein the first processing tool comprises a single blade robot.   The integrated processing tool of claim 3, wherein the second processing tool comprises a dual blade robot.   The integrated processing tool of claim 1, wherein the first processing tool has two load lock chambers.   The integrated processing tool of claim 1, wherein the at least five process chambers comprise six process chambers.   The integrated processing tool of claim 1, wherein the at least five process chambers comprise seven process chambers.   The integrated processing tool of claim 1, wherein the at least five process chambers comprise eight process chambers.   The integrated processing tool of claim 1, wherein the at least five process chambers comprise nine process chambers.   The integrated processing tool of claim 1, further comprising at least one service chamber.   The integrated processing tool of claim 10, wherein the at least one service chamber is at least one metrology chamber. An integrated processing tool for manufacturing semiconductors,
A first transfer chamber configured to support a plurality of process chambers;
A second transfer chamber configured to support a plurality of process chambers;
At least one load lock chamber in communication with the first transfer chamber;
At least one intermediate chamber supported by the first transfer chamber and the second transfer chamber;
At least five process chambers in communication with the first and second transfer chambers;
Integrated processing tool with   The integrated processing tool of claim 12, wherein each intermediate chamber is attached to the first and second transfer chambers by slit valves.   The integrated processing tool of claim 12, further comprising at least one single blade robot.   The integrated processing tool of claim 12, wherein each intermediate chamber is accessible by at least two robots for transport to any of the at least five process chambers.   The integrated processing tool of claim 12 having at least two load lock chambers.   The integrated processing tool of claim 12, wherein the at least five process chambers are six process chambers.   The integrated processing tool of claim 12, wherein the at least five process chambers are seven process chambers.   The integrated processing tool of claim 12, wherein the at least five process chambers are eight process chambers.   The integrated processing tool of claim 12, wherein the at least five process chambers comprise nine process chambers.   The integrated processing tool of claim 12, further comprising at least one service chamber.   The integrated processing tool of claim 21, wherein the at least one service chamber is at least one metrology chamber. A method for depositing a high dielectric constant film comprising:
Depositing a base oxide on a substrate in a first process chamber;
Providing decoupled plasma nitridation on the surface of the substrate in second and third process chambers;
Annealing the surface of the substrate in a fourth process chamber;
Depositing polycrystalline silicon in at least one fifth process chamber;
With
The method wherein the first, second, third, fourth and fifth process chambers are in fluid communication with a common intermediate chamber. A method for depositing a high dielectric constant film comprising:
Depositing a base oxide on a substrate in a first process chamber;
Providing decoupled plasma nitridation on the surface of the substrate in second and third process chambers;
Annealing the surface of the substrate in a fourth process chamber;
Providing decoupled plasma nitridation on the surface of the substrate in fifth and sixth process chambers;
Annealing the surface of the substrate in a seventh process chamber;
Providing atomic layer deposition in an eighth process chamber;
With
The method wherein the first, second, third, fourth, fifth, sixth, seventh and eighth process chambers are in fluid communication with a common intermediate chamber.

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