JP2009290043A - 配線基板 - Google Patents
配線基板 Download PDFInfo
- Publication number
- JP2009290043A JP2009290043A JP2008141918A JP2008141918A JP2009290043A JP 2009290043 A JP2009290043 A JP 2009290043A JP 2008141918 A JP2008141918 A JP 2008141918A JP 2008141918 A JP2008141918 A JP 2008141918A JP 2009290043 A JP2009290043 A JP 2009290043A
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- insulating layer
- layer
- electronic component
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Coupling Device And Connection With Printed Circuit (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
【解決手段】 複数の絶縁層1a,1bを積層して成る絶縁基板1の最外層の絶縁層1b上に、同軸コネクタ20の信号ピンが接続される信号用線路2(S)とその両側に配設された第一の接地導体2(G1)とが形成されているとともに、絶縁基板1の内部に、前記最外層の絶縁層1bを挟んで信号用線路2(S)および第一の接地導体2(G1)に対向する第二の接地導体2(G2)が配設されて成る配線基板であって、前記最外層の絶縁層1bにおける信号用線路2(S)の両側に第二の接地導体2(G2)の一部を露出させる開口または切欠きCを有する。
【選択図】 図4
Description
図1は、本発明の配線基板の実施形態の一例を示す概略斜視図である。図1において1は絶縁基板、2は配線導体、3はコネクタ接続部、4はソルダーレジスト層である。
1a,1b:絶縁層
2:導体層
2(S):信号用線路
2(G1):第一の接地導体
2(G2):第二の接地導体
3:コネクタ接続部
20:同軸コネクタ
21:同軸コネクタの信号ピン
C:最外層の絶縁層1bに設けた切欠き
Claims (1)
- 複数の絶縁層を積層して成る絶縁基板の最外層の絶縁層上に、同軸コネクタの信号ピンが接続される信号用線路と該信号用線路の両側に配設された第一の接地導体とが形成されているとともに、前記絶縁基板の内部に、前記最外層の絶縁層を挟んで前記信号用線路および前記第一の接地導体に対向する第二の接地導体が配設されて成る配線基板であって、前記最外層の絶縁層における前記信号用線路の両側に前記第二の接地導体の一部を露出させる開口または切欠きを有することを特徴とする配線基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008141918A JP5370883B2 (ja) | 2008-05-30 | 2008-05-30 | 配線基板 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008141918A JP5370883B2 (ja) | 2008-05-30 | 2008-05-30 | 配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009290043A true JP2009290043A (ja) | 2009-12-10 |
JP5370883B2 JP5370883B2 (ja) | 2013-12-18 |
Family
ID=41458956
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008141918A Expired - Fee Related JP5370883B2 (ja) | 2008-05-30 | 2008-05-30 | 配線基板 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5370883B2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016181349A (ja) * | 2015-03-23 | 2016-10-13 | 第一精工株式会社 | コネクタ装置及びその組立方法 |
EP3080864A4 (en) * | 2013-12-09 | 2017-07-26 | Alcatel- Lucent Shanghai Bell Co., Ltd | Connector for coupling coaxial cable to strip line |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001320208A (ja) * | 2000-05-09 | 2001-11-16 | Nec Corp | 高周波回路及びそれを用いたモジュール、通信機 |
JP2003258142A (ja) * | 2002-02-28 | 2003-09-12 | Hitachi Ltd | 半導体装置 |
US20040037516A1 (en) * | 2002-08-23 | 2004-02-26 | Opnext Japan, Inc. | Optical transmission module |
-
2008
- 2008-05-30 JP JP2008141918A patent/JP5370883B2/ja not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001320208A (ja) * | 2000-05-09 | 2001-11-16 | Nec Corp | 高周波回路及びそれを用いたモジュール、通信機 |
JP2003258142A (ja) * | 2002-02-28 | 2003-09-12 | Hitachi Ltd | 半導体装置 |
US20040037516A1 (en) * | 2002-08-23 | 2004-02-26 | Opnext Japan, Inc. | Optical transmission module |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3080864A4 (en) * | 2013-12-09 | 2017-07-26 | Alcatel- Lucent Shanghai Bell Co., Ltd | Connector for coupling coaxial cable to strip line |
US9871307B2 (en) | 2013-12-09 | 2018-01-16 | Nokia Shanghai Bell Co., Ltd | Connector for coupling coaxial cable to strip line |
JP2016181349A (ja) * | 2015-03-23 | 2016-10-13 | 第一精工株式会社 | コネクタ装置及びその組立方法 |
Also Published As
Publication number | Publication date |
---|---|
JP5370883B2 (ja) | 2013-12-18 |
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