JP2009253282A - 半導体層のレーザーアニール方法およびこの方法により製造された半導体装置 - Google Patents
半導体層のレーザーアニール方法およびこの方法により製造された半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 147
- 238000000034 method Methods 0.000 title claims abstract description 81
- 238000005224 laser annealing Methods 0.000 title claims abstract description 65
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 85
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 43
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 43
- 239000001301 oxygen Substances 0.000 claims abstract description 43
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 43
- 230000001678 irradiating effect Effects 0.000 claims abstract 4
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims description 66
- 239000000758 substrate Substances 0.000 claims description 28
- 239000012298 atmosphere Substances 0.000 claims description 21
- 239000007789 gas Substances 0.000 claims description 17
- 239000013078 crystal Substances 0.000 claims description 13
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 13
- 238000005468 ion implantation Methods 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 20
- 238000000137 annealing Methods 0.000 abstract description 16
- 230000000704 physical effect Effects 0.000 abstract description 7
- 239000010410 layer Substances 0.000 description 205
- 239000010408 film Substances 0.000 description 52
- 229910021417 amorphous silicon Inorganic materials 0.000 description 38
- 125000004429 atom Chemical group 0.000 description 31
- 239000011521 glass Substances 0.000 description 9
- 239000011229 interlayer Substances 0.000 description 7
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 7
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 238000002679 ablation Methods 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 230000001681 protective effect Effects 0.000 description 5
- 229910000077 silane Inorganic materials 0.000 description 5
- 238000004544 sputter deposition Methods 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 239000002245 particle Substances 0.000 description 4
- 108091006146 Channels Proteins 0.000 description 3
- 229910004205 SiNX Inorganic materials 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000005121 nitriding Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 1
- 108010075750 P-Type Calcium Channels Proteins 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- MGRWKWACZDFZJT-UHFFFAOYSA-N molybdenum tungsten Chemical compound [Mo].[W] MGRWKWACZDFZJT-UHFFFAOYSA-N 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 125000004433 nitrogen atom Chemical group N* 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
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Abstract
【解決手段】この方法は、半導体層上に窒素含有層を形成し(200)、この窒素含有層は少なくとも3×1020原子/ccの窒素濃度を有し、低酸素雰囲気で、前記窒素含有層の第1領域にレーザービームを照射し(202)、低酸素雰囲気で、一部が前記第1領域の一部と重なる前記窒素含有層の第2領域にレーザービームを照射する(204)。
【選択図】 図1
Description
図2aでは、製品領域302を有する半導体層300が基板304上に形成されている。なお、単一の製品領域302の代わりに、複数の製品領域302を設けてもよい。基板304は、例えば、ガラス、シリコン、水晶、あるいは、サファイア等の基板が用いられる。半導体層300は、例えば、アモルファスシリコン(a−Si)層、微晶質シリコン(μーSi)層、多結晶シリコン(p−Si)層等の非単結晶半導体層が用いられる。半導体層300は、スパッタリング、化学蒸着(CVD(低圧CVD、プラズマCVD等の特殊なCVDを含む))等の周知の方法で基板304上に形成される。
図2aと同様に、図3aは一例に係る半導体層400の一部の断面を示している。この半導体層400は、製品領域402を有し、基板404上に形成されている。この実施形態において、図1の工程200は、半導体層400の上層部406に窒素をイオン注入あるいはプラスマードーピングすることによって実行される。この工程により、半導体層400の上層部406は窒素含有層406に変えられる。すなわち、この工程において、窒素含有層406は半導体層400の一部を形成しているが、窒素含有層406の窒素濃度により、半導体層400から区別することができる。窒素含有層406の窒素濃度および深さ(厚さ)は、イオン注入あるいはプラズマ−ドーピング工程におけるエネルギーを調整することにより制御される。前述と同様に、窒素濃度は、少なくとも3×1020原子/ccである。
1.ガラス基板をCVDチャンバ内のサセプタ上に支持する。
2.CVDチャンバ内の空気を排気し、ガラス基板を収容したCVDチャンバ内にシランガス(キャリアとしてArガスを一緒に)を導入する。
3.40nm厚のa−Si層をガラス基板上に蒸着し、半導体層604を形成する。
4.シランガスと共にN2OガスをCVDチャンバ内に導入し、濃度が2×1021原子/ccの窒素原子および濃度が2×1022原子/ccの酸素原子を有する10nm厚の窒素含有a−Si層608を形成する。
図8aに示すように、まず、ガラス板等の透明な絶縁基板721上にアンダーコート層722を形成する。アンダーコート層722としては、化学気相反応法やスパッタリング法により形成されたSi02膜を用いる。また、アンダーコート層722として、この他にも、SiNxや、SiNxとSi02との2層の薄膜を用いてもよい。
なお、P型チャンネルTFTを製造する場合には、半導体層724にボロン等のP型不純物をイオン注入する。
304、404…基板、306、406、608…窒素含有層、
408、410…レーザーアニール、506…重複領域、
514…第1領域、516…第2領域、700…アレイ基板、701…TFT、
702…TFT活性層、704…ソース電極、706…ドレイン領域、
708…ゲート絶縁膜、710…ゲート電極、711…画素電極、絶縁基板、
Claims (26)
- 製品領域を有する非単結晶半導体層をレーザーアニールするレーザーアニール方法であって、
少なくとも3×1020原子/ccの窒素濃度を有する窒素含有層を前記非単結晶半導体層上に形成し、
低酸素雰囲気で、前記窒素含有層の第1領域にレーザービームを照射し、
低酸素雰囲気で、一部が前記第1領域と重なる前記窒素含有層の第2領域にレーザービームを照射するレーザーアニール方法。 - 前記非単結晶半導体層に窒素をドーピングすることにより前記窒素含有層を形成する請求項1に記載のレーザーアニール方法。
- 化学蒸着プロセスにより前記非単結晶半導体層および窒素含有層を続けて堆積する請求項1に記載のレーザーアニール方法。
- 第1流量のSiH4ガス、および第2流量のN2Oガスを化学蒸着チャンバ内に導入して前記化学蒸着プロセスを行う請求項3に記載のレーザーアニール方法。
- 前記第1流量および第2流量の少なくとも一方を制御することにより、前記窒素含有層の窒素濃度を制御する請求項4に記載のレーザーアニール方法。
- 非単結晶半導体層に窒素を含浸する工程は、イオン・インプランテーションあるいはプラズマドーピングプロセスにより行う請求項2に記載のレーザーアニール方法。
- 前記窒素含有層は、1〜30nmの厚さを有している請求項1ないし6のいずれか1項に記載のレーザーアニール方法。
- 前記窒素含有層は、5〜15nmの厚さを有している請求項7に記載のレーザーアニール方法。
- 前記窒素含有層は、3×1020〜3×1022原子/ccの範囲の窒素濃度を有している請求項1ないし8のいずれか1項に記載のレーザーアニール方法。
- 前記窒素含有層は、5×1020〜5×1021原子/ccの範囲の窒素濃度を有している請求項9に記載のレーザーアニール方法。
- 前記窒素含有層は酸素が含浸され、3×1021〜7×1022原子/ccの範囲の酸素濃度を有している請求項1ないし10のいずれか1項に記載のレーザーアニール方法。
- 前記酸素濃度は、5×1021〜5×1022原子/ccの範囲にある請求項11に記載のレーザーアニール方法。
- 前記非単結晶半導体層は、複数の製品領域を有し、各製品領域は表示装置の表示領域を有している請求項1ないし12のいずれか1項に記載のレーザーアニール方法。
- レーザーアニールされた半導体層を備え、前記半導体層は、その表面に少なくとも3×1020原子/ccの窒素濃度を有している半導体装置。
- 前記半導体層は、多結晶シリコン層である請求項14に記載の半導体装置。
- 前記窒素濃度は、5×1020〜3×1022原子/ccの範囲にある請求項14又は15に記載の半導体装置。
- 前記窒素濃度は、5×1020〜5×1021原子/ccの範囲にある請求項16に記載の半導体装置。
- 前記半導体層は、その表面で3×1021〜7×1022原子/ccの範囲の酸素濃度を有している請求項14ないし17のいずれか1項に記載の半導体装置。
- 前記酸素濃度は、5×1021〜5×1022原子/ccの範囲にある請求項18に記載の半導体装置。
- 前記半導体装置は、表示装置の表示領域に形成された複数の半導体装置の1つである請求項14ないし19のいずれか1項に記載の半導体装置。
- ゲート電極と、ソース電極と、ドレイン電極と、絶縁層と、半導体層と、を備え、
前記絶縁層は前記ゲート電極と半導体層との間に挟まれ、前記ソース電極およびドレイン電極は前記半導体層に電気的に接続され、前記半導体層は少なくとも3×1020原子/ccの窒素濃度を有する表面を備えている半導体装置。 - レーザーアニールされた半導体層を備え、前記半導体層は、その表面に少なくとも3×1020原子/ccの窒素濃度を有しているとともに、粒突出高さの2乗平均平方根値(rms値)が20nmよりも小さい半導体装置。
- レーザーアニールされた半導体層であって、第1表面および第2表面を有し、前記第2表面が基板に隣接して前記基板上に設けられた半導体層と、
前記第1表面に隣接して前記半導体層に重ねて設けられたゲート電極と、
前記ゲート電極と第1表面との間を分離したゲート絶縁膜と、
前記半導体層に接続されたソース電極およびドレイン電極と、を備え、
前記半導体層の前記第1表面における窒素濃度が少なくとも3×1020原子/ccである半導体装置。 - 前記レーザーアニールされた半導体層は、少なくとも第1ビーム走査および第2ビーム走査時にレーザービームを照射された半導体層により形成されている請求項23に記載の半導体装置。
- 前記レーザーアニールされた半導体層は、0.2μmよりも大きな粒サイズを有している請求項23又は24に記載の半導体装置。
- 前記レーザーアニールされた半導体層は、0.3μmよりも大きな粒サイズを有している請求項25に記載の半導体装置。
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