JP2009252815A - Composite lead frame structure and semiconductor device - Google Patents

Composite lead frame structure and semiconductor device Download PDF

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Publication number
JP2009252815A
JP2009252815A JP2008095836A JP2008095836A JP2009252815A JP 2009252815 A JP2009252815 A JP 2009252815A JP 2008095836 A JP2008095836 A JP 2008095836A JP 2008095836 A JP2008095836 A JP 2008095836A JP 2009252815 A JP2009252815 A JP 2009252815A
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JP
Japan
Prior art keywords
lead frame
frame structure
ic chip
composite lead
thickness
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008095836A
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Japanese (ja)
Inventor
Norihiko Miyahara
Tadakatsu Ota
忠勝 太田
紀彦 宮原
Original Assignee
Toppan Printing Co Ltd
凸版印刷株式会社
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Publication date
Application filed by Toppan Printing Co Ltd, 凸版印刷株式会社 filed Critical Toppan Printing Co Ltd
Priority to JP2008095836A priority Critical patent/JP2009252815A/en
Publication of JP2009252815A publication Critical patent/JP2009252815A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

<P>PROBLEM TO BE SOLVED: To provide a composite lead frame structure 3 for reducing a thickness to be sealed to increase the number of layered IC chips and avoiding non-conformance in sealing. <P>SOLUTION: A half-etched part H is formed on a surface of an island 11C, and an IC chip 40 and a tape substrate 30 are laminated to its bottom. A through part K is formed on the bottom. A first IC chip 40A is built into the through part. A backside of the first IC chip and a backside of a second IC chip 40B are laminated to each other via a die attach film 20B in the through part. A plurality of IC chips are sequentially laminated onto a surface of the second IC chip. A semiconductor device has the structure resin-sealed. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a composite lead frame structure, and in particular, a structure capable of increasing the number of IC chips stacked by reducing the thickness to be sealed when IC chips are stacked. The present invention relates to a composite lead frame structure that is a body and that can avoid sealing defects.

The composite lead frame structure is a structure in which a tape substrate is bonded to an island of a lead frame and an IC chip is mounted. The bonded tape substrate serves as a substrate that relays the lead frame and the IC chip. . When changing or replacing an existing IC chip to a general-purpose IC chip, the purpose is to omit the development of a lead frame that has conventionally required redesign or new design.
In the opposite case, when a highly versatile lead frame is used, a new development of an IC chip is essential, but it can be omitted.

  FIG. 1 is a cross-sectional view showing an example of a composite lead frame structure in which an IC chip and a tape substrate are bonded to an island of a lead frame. As shown in FIG. 1, the composite lead frame structure (1) includes an IC chip (40) and a tape substrate (30) on the island (11A) of the lead frame (10A) via a die attach film (20A). Is provided.

This composite lead frame structure (1) uses a die attach film (20A) on an island (11A) and a tape substrate (30) having a wiring pattern formed on the upper surface and an IC chip (40). Next, a gold wire (50) is provided by wire bonding.
The chip electrode (41) is connected to the inner lead (12) via the substrate electrode (31) of the tape substrate (30).

  The thickness to be sealed when the composite lead frame structure (1) is sealed with resin is mainly the thickness of the island (11A) as shown by reference numeral (T1) in FIG. In addition, the thickness of the IC chip (40) is added to the thickness, and the thickness is already appropriate. Accordingly, there is a problem in that the number of stacked IC chips is limited when IC chips are further stacked.

Also, when sealing with resin, as the structure to be sealed becomes thicker, it acts as a resistor for resin flow, causing defects such as voids and IC chip exposure. Or, a problem such as peeling of the tape substrate is induced.
JP 2007-180587 A JP 2004-311785 A Japanese Utility Model Publication No. 5-73964

The present invention has been made in view of the above problems, and in the composite lead frame structure, the thickness to be sealed is made thin. Further, when the IC chips are stacked,
It is a structure that can increase the number of IC chips to be stacked by reducing the thickness to be sealed, and there is a sealing defect at the time of sealing, or the tape substrate It is an object of the present invention to provide a composite lead frame structure that can avoid the induction of defects such as peeling.

  In the composite lead frame structure in which a tape substrate is bonded to an island of a lead frame and an IC chip is mounted, a half-etched portion is formed on the surface of the island, and a die attach film is formed on the bottom of the half-etched portion The composite lead frame structure is characterized in that the IC chip and the tape substrate are bonded to each other.

Further, the present invention is the composite lead frame structure according to the present invention, wherein a through-hole is formed at the bottom of the half-etched portion,
1) The first IC chip is built in the through-hole,
2) The second IC chip is bonded to the back surface of the island via a die attach film, and the back surface of the first IC chip and the back surface of the second IC chip are bonded to the back surface of the island via the die attach film. 2. The composite lead frame structure according to claim 1, wherein:

  According to the present invention, there is provided a composite lead frame structure according to the above invention, wherein a plurality of IC chips are sequentially formed on the surface of the second IC chip via a die attach film. A composite lead frame structure characterized by being bonded together.

  Further, the present invention provides the composite lead frame structure according to the above invention, wherein the base material of the tape substrate is a polyimide film having a thickness of 10 to 40 μm, the wiring layer on the base material is a copper foil having a thickness of 5 to 15 μm, The composite lead frame structure is characterized in that the solder resist on the wiring layer has a thickness of 5 to 20 μm and the die attach film has a thickness of 5 to 25 μm.

  According to another aspect of the present invention, there is provided a semiconductor device in which the composite lead frame structure according to any one of claims 1 to 4 is sealed with a resin.

  The present invention is a composite lead frame structure in which a half-etched portion is formed on the surface of an island and an IC chip and a tape substrate are bonded to the bottom of the half-etched portion via a die attach film. The composite lead frame structure can be made to have a thin thickness to be stopped and can avoid the occurrence of defects such as sealing defects or peeling of the tape substrate.

  In the present invention, a through-hole is formed at the bottom of the half-etched portion, the first IC chip is built in the through-hole, and the second IC chip is attached to the back surface of the island via a die attach film. In the penetrating portion, since the back surface of the first IC chip and the back surface of the second IC chip are a composite lead frame structure bonded together via the die attach film, when the IC chips are stacked, It is a structure that can increase the number of stacked IC chips without increasing the thickness to be sealed, and avoiding the induction of defects such as sealing defects or peeling of the tape substrate A composite lead frame structure is obtained.

Also, the base material of the tape substrate is a polyimide film having a thickness of 10 to 40 μm, the wiring layer on the base material is a copper foil having a thickness of 5 to 15 μm, the solder resist on the wiring layer is 5 to 20 μm in thickness, and die attach When the film has a thickness of 5 to 25 μm, a suitable composite lead frame structure can be obtained.

  Further, the semiconductor device obtained by resin-sealing the composite lead frame structure according to the present invention is thinner than the conventional semiconductor device, and even if the number of IC chips stacked is increased. The thickness will never increase.

Hereinafter, the present invention will be described based on embodiments.
FIG. 2 is a cross-sectional view showing an example of a composite lead frame structure according to the present invention. As shown in FIG. 2, the composite lead frame structure (2) according to the present invention has a half-etched portion (H) formed on the surface of the island (11B) of the composite lead frame structure. The composite lead frame structure is characterized in that an IC chip (40) and a tape substrate (30) are bonded to the bottom of (H) via a die attach film (20A). The chip electrode (41) is connected to the inner lead (12C) through the substrate electrode (31).

  In the composite lead frame structure (2) according to the present invention, the thickness to be sealed when the structure is sealed with resin is mainly as shown by reference numeral (T2) in FIG. The thickness of the IC chip (40) plus the thickness of the half-etched portion (H) is thinner than the composite lead frame structure (1) shown in FIG. (T1> T2). The thickness (T2) of the composite lead frame structure (2) substantially corresponds to the thickness of the island (11A) shown in FIG. Therefore, in the composite lead frame structure (2) according to the present invention, it becomes easier to further stack IC chips.

  Further, the thickness (T2) to be sealed of the composite lead frame structure (2) according to the present invention is the thickness (T1) to be sealed of the composite lead frame structure (1) shown in FIG. ) Since it is thinner, it becomes a composite lead frame structure capable of avoiding the occurrence of problems such as sealing defects or peeling of the tape substrate during sealing.

  In the present invention, a polyimide film having a thickness of 10 to 40 μm is used as the base material of the tape substrate, and a copper foil having a thickness of 5 to 15 μm is used as the wiring layer on the base material. A suitable tape substrate bonded structure can be obtained when the solder resist has a thickness of about 5 to 20 μm and the die attach film has a thickness of about 5 to 25 μm, but is not limited thereto.

As the base material of the tape substrate, a heat-resistant film such as polyimide, polyamide, polysulfone, polyphenylin sulfide, polyether ketone, or polyarylate can be used. In order to increase rigidity or thermal conductivity, glass cloth, carbon fiber, metal foil, or the like may be laminated on these substrates.
As an adhesive used for bonding the tape substrate, a general-purpose adhesive such as thermosetting or thermoplastic polyimide or epoxy resin can be used. In these adhesives, it is desirable to disperse carbon, graphite, metal particles, and the like to enhance thermal conductivity.
In the bonding of the IC chip, in addition to the die attach film, a low melting point metal alloy, solder, or a bonding method such as ultrasonic waves can be applied.

FIG. 3 is a cross-sectional view showing an example of a composite lead frame structure according to a second aspect. As shown in FIG. 3, in this composite lead frame structure (3), a penetrating portion (K) is formed at the bottom of the half-etched portion (H) of the island (11C). Tape substrate (3
0) is bonded to the bottom of the half-etched portion (H) via a die attach film (20A), similarly to the composite lead frame structure (2) shown in FIG.

The first IC chip (40A) is built in the penetrating portion (K), and the back surface thereof is bonded to the die attach film (20B). The second IC chip (40B) is bonded to the back surface of the island (11C) via the die attach film (20B). At the through portion (K), the back surface of the first IC chip (40A) and the second IC chip are connected. The back surface of the chip (40B) is bonded via a die attach film (20B). That is, in this example, IC chips are stacked.
The chip electrode (41) is directly connected to the inner lead (12C) or connected to the inner lead (12C) via the substrate electrode (31). Reference numerals (12C-a) and (12C-b) represent different inner leads among the inner leads arranged in the Y-axis direction in FIG.

The thickness to be sealed when the structure is sealed with resin is mainly the thickness of the first IC chip (40A) and the second IC chip, as indicated by reference numeral (T3) in FIG. The thickness of (40B) is added, and T3≈T1 (thickness to be sealed with the composite lead frame structure (2) shown in FIG. 1).
That is, even if the number of stacked IC chips is increased, a structure that does not increase the thickness to be sealed.

As described above, the composite lead frame structure according to the present invention has a smaller thickness to be sealed as compared with the conventional tape substrate bonding structure. Furthermore, even if the number of stacked IC chips is increased, the thickness of the sealing target does not increase.
Therefore, the semiconductor device obtained by resin-sealing the composite lead frame structure according to the present invention is thinner than the conventional semiconductor device, and further, even if the number of stacked IC chips is increased. The semiconductor device does not increase in thickness.

FIG. 4 is a sectional view showing an example of a composite lead frame structure according to a third aspect. As shown in FIG. 4, in this composite lead frame structure (4), the third IC chip (40C) is pasted on the surface of the second IC chip (40B) shown in FIG. 3 via the die attach film (20C). In this example, the fourth IC chip (40D) is bonded to the surface of the third IC chip (40C) via the die attach film (20D).
The sizes of the second IC chip (40B) to the fourth IC chip (40D) in plan view (X and Y axis directions) are successively smaller.

  The composite lead frame structure (4) shown in FIG. 4 is an example in which two layers of IC chips are further stacked on the composite lead frame structure (1) shown in FIG. 3, and a total of four layers of IC chips are stacked. . The thickness of the composite lead frame structure (4) to be sealed is mainly the thickness (T4) obtained by adding the thicknesses of the first IC chip (40A) to the fourth IC chip (40D). Become. This is because the relationship between the thickness (T3) to be sealed in FIG. 3 and the thickness (T1) to be sealed in FIG. 1 is T3≈T1 as described above. T4 is approximately equal to T1 plus the thickness of two IC chips (total three IC chips).

  That is, the thickness (T4) of the composite lead frame structure (4) shown in FIG. 4 is assumed when two layers of IC chips are laminated on the composite lead frame structure (1) shown in FIG. Although the thickness is equal to the thickness (T5) of (three layers) (T4≈T5), a total of four IC chip layers are stacked.

It is sectional drawing which shows an example of the composite lead frame structure which bonded together the IC chip and the tape board | substrate to the island of the lead frame. It is sectional drawing which shows an example of the composite lead frame structure by this invention. 5 is a cross-sectional view showing an example of a composite lead frame structure according to claim 2. FIG. FIG. 5 is a cross-sectional view showing an example of a composite lead frame structure according to claim 3.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Composite lead frame structure 2 ... Composite lead frame structure 3 by this invention ... Composite lead frame structure 4 concerning Claim 2 ... Composite lead frame structure 10A concerning Claim 3 DESCRIPTION OF SYMBOLS 10B ... Lead frame 11A, 11B, 11C ... Island 12, 12C ... Inner lead 20A, 20B, 20C, 20D ... Die attach film 30 ... Tape substrate 31 ... Substrate electrode 40 ... IC chips 40A to 40D ... first IC chip to fourth IC chip 41 ... chip electrode 50 ... gold wire H ... half-etched portion K ... through portion T1 at the bottom of the half-etched portion ~ T5 ... Thickness to be sealed

Claims (5)

  1.   In a composite lead frame structure in which a tape substrate is bonded to an island of a lead frame and an IC chip is mounted, a half-etched portion is formed on the surface of the island, and an IC is attached to the bottom of the half-etched portion via a die attach film. A composite lead frame structure in which a chip and a tape substrate are bonded together.
  2. A through part is formed at the bottom of the half-etched part,
    1) The first IC chip is built in the through-hole,
    2) The second IC chip is bonded to the back surface of the island via a die attach film, and the back surface of the first IC chip and the back surface of the second IC chip are bonded to the back surface of the island via the die attach film. The composite lead frame structure according to claim 1, wherein:
  3.   3. The composite lead frame structure according to claim 2, wherein a plurality of IC chips are sequentially bonded on the surface of the second IC chip via a die attach film.
  4.   The tape base material is a polyimide film having a thickness of 10 to 40 μm, the wiring layer on the base material is a copper foil having a thickness of 5 to 15 μm, the solder resist on the wiring layer is a thickness of 5 to 20 μm, and the die attach film 4. The composite lead frame structure according to claim 1, wherein the thickness is 5 to 25 μm.
  5.   5. A semiconductor device, wherein the composite lead frame structure according to any one of claims 1 to 4 is resin-sealed.
JP2008095836A 2008-04-02 2008-04-02 Composite lead frame structure and semiconductor device Pending JP2009252815A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008095836A JP2009252815A (en) 2008-04-02 2008-04-02 Composite lead frame structure and semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008095836A JP2009252815A (en) 2008-04-02 2008-04-02 Composite lead frame structure and semiconductor device

Publications (1)

Publication Number Publication Date
JP2009252815A true JP2009252815A (en) 2009-10-29

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JP2008095836A Pending JP2009252815A (en) 2008-04-02 2008-04-02 Composite lead frame structure and semiconductor device

Country Status (1)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH113970A (en) * 1997-04-17 1999-01-06 Sharp Corp Semiconductor device
JP2002231882A (en) * 2001-02-06 2002-08-16 Mitsubishi Electric Corp Semiconductor device
JP2003332522A (en) * 2002-05-17 2003-11-21 Mitsubishi Electric Corp Semiconductor device
JP2008001817A (en) * 2006-06-23 2008-01-10 Denki Kagaku Kogyo Kk Pressure-sensitive adhesive, pressure-sensitive adhesive sheet using pressure-sensitive adhesive, multilayer pressure-sensitive adhesive sheet using pressure-sensitive adhesive sheet and method for manufacturing electronic part using multilayer pressure-sensitive adhesive sheet

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH113970A (en) * 1997-04-17 1999-01-06 Sharp Corp Semiconductor device
JP2002231882A (en) * 2001-02-06 2002-08-16 Mitsubishi Electric Corp Semiconductor device
JP2003332522A (en) * 2002-05-17 2003-11-21 Mitsubishi Electric Corp Semiconductor device
JP2008001817A (en) * 2006-06-23 2008-01-10 Denki Kagaku Kogyo Kk Pressure-sensitive adhesive, pressure-sensitive adhesive sheet using pressure-sensitive adhesive, multilayer pressure-sensitive adhesive sheet using pressure-sensitive adhesive sheet and method for manufacturing electronic part using multilayer pressure-sensitive adhesive sheet

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