JP2009246300A - Surface mounted part, method for manufacturing therefor, and mounting method - Google Patents

Surface mounted part, method for manufacturing therefor, and mounting method Download PDF

Info

Publication number
JP2009246300A
JP2009246300A JP2008094118A JP2008094118A JP2009246300A JP 2009246300 A JP2009246300 A JP 2009246300A JP 2008094118 A JP2008094118 A JP 2008094118A JP 2008094118 A JP2008094118 A JP 2008094118A JP 2009246300 A JP2009246300 A JP 2009246300A
Authority
JP
Japan
Prior art keywords
terminal
plurality
surface
terminals
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008094118A
Other languages
Japanese (ja)
Inventor
Shigemitsu Tomaki
Yoshikazu Tsuya
重光 戸蒔
好和 津谷
Original Assignee
Tdk Corp
Tdk株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tdk Corp, Tdk株式会社 filed Critical Tdk Corp
Priority to JP2008094118A priority Critical patent/JP2009246300A/en
Publication of JP2009246300A publication Critical patent/JP2009246300A/en
Application status is Pending legal-status Critical

Links

Images

Abstract

A plurality of terminals of a surface mounting component and a plurality of pads of a mounting substrate can be firmly bonded via a conductive bonding material, and the spread of the conductive bonding material can be suppressed.
A surface mount component includes a main body having a terminal arrangement surface and a plurality of terminals arranged on the terminal arrangement surface. Each of the plurality of terminals 3 has a recess 3A. When the surface mount component 1 is mounted on a mounting substrate having a plurality of pads using a conductive bonding material, a part of the conductive bonding material interposed between each terminal 3 and each pad is connected to each terminal 3. Into the recess 3A.
[Selection] Figure 2

Description

  The present invention relates to a surface-mounted component that is an electronic component that can be mounted on a mounting board by surface-mount technology, a manufacturing method thereof, and a mounting method.

  One of the techniques for mounting electronic components on a mounting board is a surface mounting technique. In this surface mounting technology, for example, a plurality of pads on a mounting substrate and a plurality of terminals on a surface mounting component are bonded via a conductive bonding material such as solder. In the surface mounting technology, in order to ensure the reliability of a product manufactured using this technology, it is important to firmly bond the pad of the mounting substrate and the terminal of the surface mounting component.

  In Patent Document 1, in order to suppress the adverse effects such as solder cracks and improve the reliability of mounting bonding between the electronic component package and the circuit board even if a difference in thermal expansion occurs between the electronic component package and the circuit board. A technique that defines the area of the bottom terminal electrode of the electronic component package is described.

  Further, in Patent Document 2, a concave portion is formed in an electrode terminal of a printed wiring board, and a spherical connecting member is mounted on the concave portion, and the connecting member is plasticized when flip-chip mounting a semiconductor element on the printed wiring board. A technique is described in which a protruding electrode that connects an electrode pad of a semiconductor element and an electrode terminal of a printed wiring board is formed by deforming and inserting a part thereof into a recess.

JP 2006-32645 A JP 2003-303849 A

  In recent years, with the miniaturization of electronic devices and the increase in mounting density of electronic components, the surface area of terminals and the distance between adjacent terminals have been reduced in surface-mounted components. However, in the surface mount component, when the area of the surface of the terminal becomes small, there arises a problem that the bonding strength between the pad of the mounting substrate and the terminal of the surface mount component is lowered. In addition, when the distance between adjacent terminals in a surface-mounted component becomes smaller, the conductive bonding material that joins the pads of the mounting board and the terminals of the surface-mounted component spreads between adjacent terminals in the surface-mounted component. There arises a problem that a short circuit is likely to occur.

  With the technique described in Patent Document 1, it is difficult to increase the bonding strength between the bottom terminal electrode of the electronic component package and the electrode pad of the circuit board, and the electronic component is miniaturized and the mounting density is increased. There is a problem that it can not cope with.

  In the technique described in Patent Document 2, for example, a spherical connection member is produced, and this connection member needs to be mounted on a recess formed in an electrode terminal of a printed wiring board. Therefore, this technique has a problem that the cost for mounting the semiconductor element increases. Moreover, in the technique described in Patent Document 2, the interface between the protruding electrode formed by plastic deformation of the connecting member and the electrode pad of the semiconductor element becomes a flat surface. There is a problem that the strength of bonding tends to decrease.

  By the way, normally, the area of the surface on which the surface mount component is mounted on the mounting substrate is larger than the area of the surface on which the terminals are arranged in the surface mount component. Therefore, when bonding the pad of the mounting board and the terminal of the surface mounting component through the conductive bonding material, the area of the surface of the pad of the mounting board should be larger than the area of the surface of the terminal of the surface mounting component. By doing so, it is possible to increase the bonding strength between the pad of the mounting substrate and the conductive bonding material. On the other hand, the area of the surface of the terminal in the surface mount component cannot be increased as the area of the surface of the pad of the mounting board. Therefore, in particular, the bonding strength between the terminal and the conductive bonding material in the surface mount component is likely to decrease.

  The present invention has been made in view of such problems, and the object thereof is to have a plurality of terminals connected to a plurality of pads of the mounting substrate via a conductive bonding material, and the plurality of terminals and the mounting substrate. An object of the present invention is to provide a surface-mounted component, a manufacturing method thereof, and a mounting method capable of firmly bonding a plurality of pads and suppressing the spread of a conductive bonding material.

  The surface mount component of the present invention includes a main body having a terminal arrangement surface and a plurality of terminals arranged on the terminal arrangement surface, and each of the plurality of terminals has a recess.

  In the surface mount component according to the present invention, the main body includes a plurality of laminated dielectric layers and one or more inner conductor layers disposed between two adjacent dielectric layers, and the plurality of dielectric layers One of them may be a terminal arrangement dielectric layer having a terminal arrangement surface. In this case, the terminal arrangement dielectric layer has a plurality of terminal holes formed at positions corresponding to the plurality of terminals, and each terminal has an inner wall of the corresponding terminal hole and a corresponding terminal hole, respectively. The terminal conductor layer may be attached to a part of the terminal arrangement surface in the periphery of the terminal.

  The method for manufacturing a surface-mounted component according to the present invention includes a main body having a terminal arrangement surface and a plurality of terminals arranged on the terminal arrangement surface, each of the plurality of terminals has a recess, and the main body is laminated. A terminal arrangement including a plurality of dielectric layers and one or more internal conductor layers arranged between two adjacent dielectric layers, wherein one of the plurality of dielectric layers has a terminal arrangement surface The dielectric layer for terminal arrangement has a plurality of terminal holes formed at positions corresponding to the plurality of terminals, and each terminal has an inner wall and a corresponding one of the corresponding terminal holes, respectively. This is a method of manufacturing a surface-mounted component having a terminal conductor layer attached to a part of a terminal arrangement surface in the periphery of a terminal hole.

  The method of manufacturing a surface-mounted component according to the present invention includes a plurality of ceramic green sheets that are fired later to become a plurality of dielectric layers, and one or more pre-fired internal conductors that are later fired to become one or more internal conductor layers. Forming a laminate including a plurality of pre-fired terminal conductor layers that are fired later to become a plurality of terminal conductor layers, and firing the laminate to form surface-mounted components. It has.

  The surface mounting component mounting method of the present invention includes a main body having a terminal arrangement surface and a plurality of terminals arranged on the terminal arrangement surface, and each of the plurality of terminals includes a plurality of terminals. This is a method of mounting on a mounting substrate having a plurality of pads connected to the. The surface mounting component mounting method of the present invention includes a step of disposing a conductive bonding material on each of a plurality of pads, and a surface mounting component on a mounting substrate so that a plurality of terminals are opposed to the plurality of pads. And a step of bonding a plurality of terminals to a plurality of pads by a conductive bonding material. In the step of bonding the plurality of terminals to the plurality of pads, a part of the conductive bonding material interposed between each terminal and each pad enters the recess of each terminal.

  When the surface mount component of the present invention is mounted on a mounting substrate having a plurality of pads using a conductive bonding material, a part of the conductive bonding material interposed between each terminal and each pad is each terminal. Get into the recess. Therefore, according to the surface mount component of the present invention, it is possible to firmly bond the plurality of terminals and the plurality of pads of the mounting substrate and to suppress the spread of the conductive bonding material.

  Moreover, according to the manufacturing method of the surface mount component of this invention, there exists an effect that the surface mount component which has said effect can be easily manufactured using the simultaneous baking method which bakes a ceramic and a conductor simultaneously.

  Further, in the surface mounting component mounting method of the present invention, in the step of bonding the plurality of terminals to the plurality of pads, a part of the conductive bonding material interposed between each terminal and each pad is in the recess of each terminal. Get in. Therefore, according to the mounting method of the surface mount component of the present invention, it is possible to firmly bond a plurality of terminals and a plurality of pads of the mounting substrate and to suppress the spread of the conductive bonding material. Play.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. First, a surface mount component according to an embodiment of the present invention will be described with reference to FIGS. 1 is a perspective view of a surface mount component according to the present embodiment, FIG. 2 is a cross-sectional view of the surface mount component according to the present embodiment, and FIG. 3 is a terminal and its terminals in the surface mount component according to the present embodiment. It is sectional drawing which shows a periphery.

  As shown in FIGS. 1 and 2, the surface mount component 1 according to the present embodiment includes a cuboid-shaped main body 2. The main body 2 includes a terminal arrangement surface 2A, an opposite surface 2B, and four side surfaces that connect the terminal arrangement surface 2A and the surface 2B. 1 and 2 show the surface-mounted component 1 with the terminal arrangement surface 2A facing up. The surface mount component 1 further includes a plurality of terminals 3 arranged on the terminal arrangement surface 2A. Each of the plurality of terminals 3 has a recess 3A. The shape of the opening and the bottom of the recess 3A is, for example, a circle or a shape close to a circle. Although FIG. 1 shows an example in which the surface-mounted component 1 includes four terminals 3, in the present embodiment, the number of terminals 3 is not limited to four, and may be any number. Good.

  As shown in FIG. 2, the main body 2 includes a plurality of laminated dielectric layers 41 to 45 and one or more inner conductor layers 5 disposed between two adjacent dielectric layers. Yes. 2 shows an example in which the main body 2 includes five dielectric layers 41 to 45. In the present embodiment, the number of dielectric layers is not limited to five, and a plurality of dielectric layers may be used. If it is.

  Of the plurality of dielectric layers 41 to 45, the dielectric layer 41 closest to the terminal arrangement surface 2A has the terminal arrangement surface 2A. This dielectric layer 41 corresponds to the dielectric layer for terminal arrangement in the present invention. As shown in FIGS. 2 and 3, the dielectric layer 41 has a plurality of terminal holes 41 a formed at positions corresponding to the plurality of terminals 3. Each terminal 3 has a terminal conductor layer 3B attached to a part of the terminal arrangement surface 2A around the inner wall of the corresponding terminal hole 41a and the corresponding hole 41a. As shown in FIG. 3, a portion of the terminal conductor layer 3 </ b> B attached to the inner wall of the terminal hole 41 a is connected to the inner conductor layer 5. In the example shown in FIG. 3, the terminal conductor layer 3B includes a portion deposited on the inner conductor layer 5 so as to form the bottom of the recess 3A. However, the terminal conductor layer 3B does not include a portion deposited on the inner conductor layer 5 so as to form the bottom of the recess 3A, but on the inner wall of the terminal hole 41a in the terminal conductor layer 3B. Only the deposited part may be connected to the inner conductor layer 5. In this case, the upper surface of the inner conductor layer 5 forms the bottom of the recess 3A.

  Hereinafter, an example of a system using the surface mounted component 1 according to the present embodiment will be described with reference to FIGS. Here, an example in which the surface mount component 1 is used in a high frequency circuit of a mobile phone is shown. FIG. 4 is a block diagram showing a circuit configuration of an example of the high-frequency circuit of the mobile phone. This high-frequency circuit is composed of three time division multiple access signals, GSM (Global System for Mobile Communications), DCS (Digital Cellular System), and PCS (Personal Communications Service), and wideband code division multiple access (hereinafter referred to as WCDMA). To process signals.)

  The frequency band of the GSM transmission signal is 880 MHz to 915 MHz. The frequency band of GSM reception signals is 925 MHz to 960 MHz. The frequency band of the DCS transmission signal is 1710 MHz to 1785 MHz. The frequency band of the DCS reception signal is 1805 to 1880 MHz. The frequency band of the PCS transmission signal is 1850 MHz to 1910 MHz. The frequency band of PCS reception signals is 1930 MHz to 1990 MHz. The frequency band of the WCDMA transmission signal is 1920 MHz to 1980 MHz. The frequency band of WCDMA reception signals is 2110 to 2170 MHz.

  The high frequency circuit shown in FIG. 4 includes a high frequency module 6. The high frequency module 6 includes an antenna terminal ANT, four reception signal terminals Rx1, Rx2, Rx3, and Rx4, and three transmission signal terminals Tx1, Tx2, and Tx3. The reception signal terminal Rx1 outputs a GSM reception signal GSM / Rx. The reception signal terminal Rx2 outputs a DCS reception signal DCS / Rx. The reception signal terminal Rx3 outputs a PCS reception signal PCS / Rx. The reception signal terminal Rx4 outputs a WCDMA reception signal WCDMA / Rx. A GSM transmission signal GSM / Tx is input to the transmission signal terminal Tx1. A DCS transmission signal DCS / Tx and a PCS transmission signal PCS / Tx are input to the transmission signal terminal Tx2. A WCDMA transmission signal WCDMA / Tx is input to the transmission signal terminal Tx3.

  The high-frequency circuit further includes an antenna 7 connected to the antenna terminal ANT, an amplifier unit 8 connected to all reception signal terminals and all transmission signal terminals of the high-frequency module 6, and an integrated circuit connected to the amplifier unit 8. And a circuit 9. The integrated circuit 9 is a circuit that mainly modulates and demodulates signals. The amplifier unit 8 includes a low noise amplifier that amplifies the reception signal output from the high frequency module 6 and sends it to the integrated circuit 9, and a power amplifier that amplifies the transmission signal output from the integrated circuit 9 and sends it to the high frequency module 6. is doing.

  The high-frequency module 6 includes a high-frequency switch 10, three low-pass filters (hereinafter referred to as LPF) 11, 13, and 15, two high-pass filters (hereinafter referred to as HPF) 12 and 14, and five band-passes. Filters (hereinafter referred to as BPF) 24, 25, 26, 27, and 28 are provided. The high frequency switch 10 has four ports P1 to P4. The high frequency switch 10 selectively connects the port P1 to one of the ports P2 to P4 according to the state of control signals input to a plurality of control terminals (not shown) provided in the high frequency module 6.

  The high frequency module 6 further includes a phase line 16 having one end connected to the antenna terminal ANT, and a capacitor 33 provided between the other end of the phase line 16 and the port P <b> 1 of the high frequency switch 10.

  The high-frequency module 6 further has one end connected to the antenna terminal ANT, the other end connected to the input end of the BPF 24, one end connected to the other end of the phase line 17, and the other end grounded. An inductor 32 is provided. The output end of the BPF 24 is connected to the reception signal terminal Rx4.

  The high frequency module 6 further includes a capacitor 36 having one end connected to the port P <b> 2 of the high frequency switch 10 and a phase line 18 having one end connected to the other end of the capacitor 36. The other end of the phase line 18 is connected to the output end of the LPF 11 and the input end of the HPF 12. The input end of the LPF 11 is connected to the transmission signal terminal Tx1.

  The high-frequency module 6 further includes a phase line 20 having one end connected to the output end of the HPF 12. The other end of the phase line 20 is connected to each input end of the BPFs 25 and 26. The output end of the BPF 25 is connected to the reception signal terminal Rx2. The output end of the BPF 26 is connected to the reception signal terminal Rx3.

  The high frequency module 6 further includes a capacitor 35 having one end connected to the port P3 of the high frequency switch 10 and a phase line 21 having one end connected to the other end of the capacitor 35. The other end of the phase line 21 is connected to the output end of the LPF 15. The input end of the LPF 15 is connected to the transmission signal terminal Tx2.

  The high frequency module 6 further includes a capacitor 34 having one end connected to the port P 4 of the high frequency switch 10 and a phase line 19 having one end connected to the other end of the capacitor 34. The other end of the phase line 19 is connected to the input end of the LPF 13 and the output end of the HPF 14.

  The high-frequency module 6 further includes a phase line 22 having one end connected to the output end of the LPF 13 and a phase line 23 having one end connected to the input end of the HPF 14. The other end of the phase line 22 is connected to the input end of the BPF 27. The output end of the BPF 27 is connected to the reception signal terminal Rx1. The other end of the phase line 23 is connected to the output end of the BPF 28. The input end of the BPF 28 is connected to the transmission signal terminal Tx3.

  The BPF 24 is configured using a bandpass filter element 40. The BPFs 25 to 28 are configured using, for example, surface acoustic wave elements. The high frequency switch 10 is configured using a field effect transistor made of, for example, a GaAs compound semiconductor.

  Here, the operation of the high-frequency module 6 and the high-frequency circuit shown in FIG. 4 will be described. In the high frequency module 6, the BPF 24 selectively allows a WCDMA reception signal to pass therethrough. The BPF 24 is always connected to the antenna 7. Therefore, this high-frequency circuit is always in a state capable of receiving a WCDMA reception signal. A WCDMA reception signal received by the antenna 7 passes through the antenna terminal ANT, the phase line 17 and the BPF 24 and is output from the reception signal terminal Rx4. The phase lines 16 and 17 and the inductor 32 adjust the impedances of the path from the antenna 7 to the BPF 24 and the path from the antenna 7 to the high-frequency switch 10, thereby separating the WCDMA reception signal and other signals. To do.

  Signals other than WCDMA reception signals can be transmitted or received in accordance with the state of the high-frequency switch 10 as shown below. The state of the high frequency switch 10 is switched according to the state of control signals input to a plurality of control terminals (not shown). Capacitors 33 to 36 are provided to prevent passage of a direct current component generated by the control signal.

  When the port P1 is connected to the port P2, it is possible to transmit a GSM transmission signal, receive a DCS reception signal, or receive a PCS reception signal. In this state, the GSM transmission signal input to the transmission signal terminal Tx1 sequentially passes through the LPF 11, the phase line 18, the capacitor 36, the high frequency switch 10, the capacitor 33, the phase line 16, and the antenna terminal ANT, and the antenna 7 To be supplied. Further, in this state, the DCS received signal received by the antenna 7 passes through the antenna terminal ANT, the phase line 16, the capacitor 33, the high frequency switch 10, the capacitor 36, the phase line 18, the HPF 12, the phase line 20 and the BPF 25 in order. Pass through and output from the reception signal terminal Rx2. Also, in this state, the PCS received signal received by the antenna 7 passes through the antenna terminal ANT, the phase line 16, the capacitor 33, the high frequency switch 10, the capacitor 36, the phase line 18, the HPF 12, the phase line 20 and the BPF 26 in order. Pass through and output from the reception signal terminal Rx3.

  In a state where the port P1 is connected to the port P3, the DCS transmission signal or the PCS transmission signal input to the transmission signal terminal Tx2 is the LPF 15, the phase line 21, the capacitor 35, the high frequency switch 10, the capacitor 33, the phase The signal passes through the line 16 and the antenna terminal ANT in order, and is supplied to the antenna 7. The LPF 15 removes harmonic components contained in the DCS transmission signal and the PCS transmission signal.

  In a state where the port P1 is connected to the port P4, reception of a GSM reception signal or transmission of a WCDMA transmission signal becomes possible. In this state, a GSM reception signal received by the antenna 7 sequentially passes through the antenna terminal ANT, the phase line 16, the capacitor 33, the high frequency switch 10, the capacitor 34, the phase line 19, the LPF 13, the phase line 22, and the BPF 27. And output from the reception signal terminal Rx1. In this state, the transmission signal of the WCDMA system input to the transmission signal terminal Tx3 is the BPF 28, the phase line 23, the HPF 14, the phase line 19, the capacitor 34, the high frequency switch 10, the capacitor 33, the phase line 16, and the antenna terminal ANT. Are sequentially supplied to the antenna 7.

  Each of the phase lines 18 to 23 adjusts the impedance of the signal path in which they are provided.

  Next, the structure of the high-frequency module 6 will be described with reference to FIGS. FIG. 5 is a perspective view showing the appearance of the high-frequency module 6. FIG. 6 is a plan view of the high-frequency module 6. FIG. 7 is a cross-sectional view of the high-frequency module 6. As shown in FIGS. 5 to 7, the high-frequency module 6 includes a multilayer substrate 100 that integrates the elements of the high-frequency module 6. As shown in FIG. 7, the multilayer substrate 100 includes a plurality of in-substrate dielectric layers 101 and a plurality of in-substrate conductor layers 102 that are alternately stacked. In FIG. 7, the cross section of the multilayer substrate 100 is simplified. The laminated substrate 100 has a top surface 100a and a bottom surface 100b disposed on both sides in the stacking direction, and four side surfaces connecting the top surface 100a and the bottom surface 100b, and has a rectangular parallelepiped shape.

  The circuit in the high-frequency module 6 is configured by using the in-substrate dielectric layer 101 and the in-substrate conductor layer 102 and elements mounted on the upper surface 100 a of the multilayer substrate 100. At least the bandpass filter element 40 constituting the BPF 24 is mounted on the upper surface 100a. Here, as an example, in addition to the bandpass filter element 40, the high frequency switch 10, the BPF 25 to 28, the inductor 32, and the capacitors 33 to 36 are mounted on the upper surface 100a. The multilayer substrate 100 is, for example, a low-temperature co-fired ceramic multilayer substrate.

  Although not shown, terminals ANT, Rx1 to Rx4, Tx1 to Tx3, a plurality of control terminals, and a plurality of ground terminals are arranged on the bottom surface 100b of the multilayer substrate 100.

  As shown in FIG. 7, the multilayer substrate 100 is disposed as a substrate-in-substrate conductor layer 102 at a position facing the band-pass filter element 40 via the upper surface 100a and is connected to the ground. Is included.

  The high-frequency module 6 includes a metal case 110 that is disposed so as to cover elements mounted on the upper surface 100a of the multilayer substrate 100 and is connected to the ground. 5 and 6, the metal case 110 is omitted.

  Next, the circuit configuration of the BPF 24 will be described with reference to FIG. As shown in FIG. 8, the BPF 24 includes an input terminal 51, an output terminal 52, and three resonators 61, 62, and 63. The BPF 24 further includes a capacitor 64 provided between one end of the resonator 61 and the ground, a capacitor 65 provided between one end of the resonator 62 and the ground, and one end of the resonator 63 and the ground. A capacitor 66 provided therebetween, a capacitor 67 provided between one end of the resonator 61 and one end of the resonator 62, and a capacitor provided between one end of the resonator 62 and one end of the resonator 63 68, and a capacitor 69 provided between one end of the resonator 61 and one end of the resonator 63. The input terminal 51 is connected to one end of the resonator 61. The output terminal 52 is connected to one end of the resonator 63. The other ends of the resonators 61, 62, and 63 are connected to the ground.

  The bandpass filter element 40 is a specific application example of the surface mount component 1 according to the present embodiment. The multilayer substrate 100 on which the bandpass filter element 40 is mounted corresponds to the mounting substrate in the present invention.

  Hereinafter, the configuration of the bandpass filter element 40 will be described. A band-pass filter element 40, which is a specific application example of the surface-mounted component 1 according to the present embodiment, has the configuration shown in FIGS. That is, the band-pass filter element 40 includes a rectangular parallelepiped main body 2, and the main body 2 has four side surfaces that connect the terminal arrangement surface 2A, the opposite surface 2B, and the terminal arrangement surface 2A and the surface 2B. And have. The bandpass filter element 40 further includes four terminals 3 arranged on the terminal arrangement surface 2A. As shown in FIG. 2, the main body 2 includes a plurality of laminated dielectric layers 41 to 45 and one or more inner conductor layers 5 disposed between two adjacent dielectric layers. Yes. The dielectric layer 41 has a terminal arrangement surface 2A.

  Next, the configuration of the bandpass filter element 40 will be described in detail with reference to FIG. In the following description, the dielectric layers 41 to 45 are counted in the order of proximity to the terminal arrangement surface 2A, and the first dielectric layer 41, the first dielectric layer 42, and the third dielectric layer. This is referred to as a layer 43, a fourth dielectric layer 44, and a fifth dielectric layer 45. In addition, for the dielectric layer 41, the terminal disposition surface 2A is defined as the upper surface of the two surfaces facing the opposite sides, and the other dielectric layers 42 to 45 are each directed to the opposite sides. Of the two surfaces, the surface close to the terminal arrangement surface 2A is defined as the upper surface. FIG. 9 is an explanatory diagram showing the configuration of the bandpass filter element 40. 9, (a) to (e) represent the upper surfaces of the dielectric layers 41 to 45 in the band-pass filter element 40, respectively.

  As shown in FIG. 9A, the input terminal 411, the output terminal 412, and the ground terminals 413 and 414 are arranged on the upper surface of the first dielectric layer 41, that is, the terminal arrangement surface 2A. Terminals 411, 412, 413, and 414 correspond to terminal 3 in FIGS. 1 and 2. The terminals 411, 412, 413, and 414 have recesses 411A, 412A, 413A, and 414A, respectively. The dielectric layer 41 has a plurality of terminal holes formed at positions corresponding to the terminals 411, 412, 413, and 414. The terminals 411, 412, 413, and 414 are respectively provided with terminal conductor layers 411 </ b> B, 412 </ b> B, 413 </ b> B that are attached to a part of the terminal arrangement surface 2 </ b> A around the inner wall of the corresponding terminal hole and the corresponding terminal hole. 414B.

  As shown in FIG. 9B, conductor layers 421 to 424 are formed on the upper surface of the second dielectric layer 42. A terminal conductor layer 411B is connected to the conductor layer 421 through a terminal hole corresponding to the terminal 411. A terminal conductor layer 412 </ b> B is connected to the conductor layer 422 through a terminal hole corresponding to the terminal 412. A terminal conductor layer 413B is connected to the conductor layer 423 through a terminal hole corresponding to the terminal 413. A terminal conductor layer 414 </ b> B is connected to the conductor layer 424 through a terminal hole corresponding to the terminal 414. The dielectric layer 42 includes a through hole 425 connected to the conductor layer 421, a through hole 426 connected to the conductor layer 422, through holes 427 A, 427 B, and 427 C connected to the conductor layer 423, and a conductor Through holes 428A, 428B, and 428C connected to the layer 424 are formed.

  As shown in FIG. 9C, on the upper surface of the third dielectric layer 43, three capacitor conductor layers 431, 432, and 433 are formed. The dielectric layer 43 has through holes 435, 436, 437A, 437B, 437C, 438A, 438B, and 438C connected to the through holes 425, 426, 427A, 427B, 427C, 428A, 428B, and 428C, respectively. Has been.

  As shown in FIG. 9D, on the upper surface of the fourth dielectric layer 44, there are three resonator conductor layers 441, 442, 443 and three capacitor conductor layers 444, 445, 446. Is formed. One end of the resonator conductor layer 441 is connected to the capacitor conductor layer 444. One end of the resonator conductor layer 442 is connected to the capacitor conductor layer 445. One end of the resonator conductor layer 443 is connected to the capacitor conductor layer 446. Through holes 438A, 438B, and 438C are connected to the other ends of the resonator conductor layers 441, 442, and 443, respectively. Through holes 435 and 436 are connected to the capacitor conductor layers 444 and 446, respectively. The dielectric layer 44 has through holes 447A, 447B, and 447C connected to the through holes 437A, 437B, and 437C, respectively.

  The conductor layer 431 shown in FIG. 9C is disposed at a position facing the conductor layers 444 and 445 shown in FIG. The conductor layer 432 shown in FIG. 9C is arranged at a position facing the conductor layers 445 and 446 shown in FIG. 9D. The conductor layer 433 shown in FIG. 9C is disposed at a position facing the conductor layers 444, 445, and 446 shown in FIG. 9D.

  The conductor layer 441 is connected to the ground terminal 414 via the conductor layer 424 and the through holes 428A and 438A. The conductor layer 442 is connected to the ground terminal 414 via the conductor layer 424 and the through holes 428B and 438B. The conductor layer 443 is connected to the ground terminal 414 through the conductor layer 424 and the through holes 428C and 438C. The conductor layer 444 is connected to the input terminal 411 through the conductor layer 421 and the through holes 425 and 435. The conductor layer 446 is connected to the output terminal 412 through the conductor layer 422 and the through holes 426 and 436.

  As shown in FIG. 9E, three capacitor conductor layers 451, 452, and 453 are formed on the upper surface of the fifth dielectric layer 45. Capacitor conductor layers 451, 452, and 453 are disposed at positions facing conductor layers 444, 445, and 446, respectively. Through holes 447A, 447B, and 447C are connected to the conductor layers 451, 452, and 453, respectively. The conductor layer 451 is connected to the ground terminal 413 through the conductor layer 423 and the through holes 427A, 437A, and 447A. The conductor layer 452 is connected to the ground terminal 413 through the conductor layer 423 and the through holes 427B, 437B, and 447B. The conductor layer 453 is connected to the ground terminal 413 through the conductor layer 423 and the through holes 427C, 437C, and 447C. The lower surface of the dielectric layer 45 is the surface 2B shown in FIG.

  Resonator conductor layers 441, 442, and 443 constitute resonators 61, 62, and 63 in FIG. 8, respectively. The conductor layers 444 and 451 and the dielectric layer 44 disposed therebetween constitute the capacitor 64 in FIG. The conductor layers 445 and 452 and the dielectric layer 44 disposed therebetween constitute the capacitor 65 in FIG. The conductor layers 446 and 453 and the dielectric layer 44 disposed therebetween constitute the capacitor 66 in FIG.

  The conductor layer 431, the conductor layers 444 and 445, and the dielectric layer 43 disposed therebetween constitute the capacitor 67 in FIG. The conductor layer 432, the conductor layers 445 and 446, and the dielectric layer 43 disposed therebetween constitute the capacitor 68 in FIG. The conductor layer 433, the conductor layers 444 and 446, and the dielectric layer 43 disposed therebetween constitute the capacitor 69 in FIG.

  Next, with reference to FIG. 10, the manufacturing method of the surface mount component 1 which concerns on this Embodiment is demonstrated. FIG. 10 is an explanatory diagram for explaining a method for manufacturing the surface-mounted component 1. In the method for manufacturing the surface-mounted component 1, first, a plurality of ceramic green sheets 41G, 42G, 43G, 44G, and 45G that are fired later to become a plurality of dielectric layers 41, 42, 43, 44, and 45 are manufactured. Next, after forming a plurality of terminal holes in the ceramic green sheet 41G, a plurality of pre-fired terminal conductor layers 3BP that are fired later to become a plurality of terminal conductor layers 3B are formed, for example, by printing. . Moreover, after forming the hole for through-holes with respect to the ceramic green sheets 42G-45G as needed, it is baked later as needed and becomes one or more internal conductor layers 5 The front inner conductor layer 5P is formed by printing, for example. When the pre-fired internal conductor layer 5P is formed, a pre-fired conductor layer that is fired later to form a through-hole is formed on the inner wall of the through-hole hole. Next, ceramic green sheets 41G, 42G, 43G, 44G, and 45G on which a conductor layer before firing is formed as necessary are laminated as described above. In this way, a plurality of ceramic green sheets 41G, 42G, 43G, 44G, and 45G, which are each fired later to become a plurality of dielectric layers 41, 42, 43, 44, and 45, and later fired and one or more internal layers. A laminate including one or more pre-fired internal conductor layers 5P to be the conductor layers and a plurality of pre-fired terminal conductor layers 3BP to be fired later to become the plurality of terminal conductor layers 3B is formed. The steps so far correspond to the “step of forming a laminate” in the present invention. Next, the surface-mounted component 1 is formed by firing the laminate formed as described above using a simultaneous firing method in which the ceramic and the conductor are fired simultaneously. This step corresponds to the “step of forming a surface mount component” in the present invention.

  Next, a method for mounting the surface-mounted component 1 according to the present embodiment will be described with reference to FIGS. FIGS. 11 to 13 are explanatory views for explaining a method of mounting the surface-mounted component 1. FIG. 11 shows the first step in the method for mounting the surface-mounted component 1. In this step, first, a mounting substrate 200 including a plurality of pads 201 connected to a plurality of terminals 3 of the surface mount component 1 is prepared. The pad 201 is made of a conductor such as copper. In the example shown in FIGS. 5 to 7, the multilayer substrate 100 corresponds to the mounting substrate 200. Next, a conductive bonding material 202 having fluidity is disposed on each of the plurality of pads 201 of the mounting substrate 200. For example, a solder paste is used as the conductive bonding material 202.

  FIG. 12 shows the next step. In this step, surface mounting is performed on the mounting substrate 200 such that the terminal mounting surface 2A of the surface mounting component 1 faces downward and the plurality of terminals 3 of the surface mounting component 1 face the plurality of pads 201 of the mounting substrate 200. Parts 1 are arranged. At this time, a conductive bonding material 202 is interposed between each terminal 3 and each pad 201.

  FIG. 13 shows the next step. In this step, the plurality of terminals 3 are bonded to the plurality of pads 201 by the conductive bonding material 202. When the conductive bonding material 202 is a solder paste, the solder in the solder paste is melted by a heat source such as infrared rays, hot air, or laser light, and then solidified, so that a plurality of terminals 3 are formed by solder. Bonded to the pad 201. In this way, the mounting of the surface mounting component 1 on the mounting substrate 200 is completed. As shown in FIG. 12, the electrical conductivity between the mounting of the surface mounting component 1 on the mounting substrate 200 and the completion of the mounting of the surface mounting component 1 on the mounting substrate 200 as shown in FIG. 13. A part of the bonding material 202 enters the recess 3 </ b> A of each terminal 3.

  As described above, according to the surface mounted component 1 and the mounting method thereof according to the present embodiment, the surface mounted component 1 is mounted on the mounting substrate 200 having the plurality of pads 201 using the conductive bonding material 202. At this time, a part of the conductive bonding material 202 interposed between each terminal 3 and each pad 201 of the surface mount component 1 enters the recess 3 </ b> A of each terminal 3. Therefore, according to the present embodiment, the contact area between the terminal 3 and the conductive bonding material 202 can be increased as compared with the case where the surface of the terminal of the surface mount component is flat. As a result, according to the present embodiment, the plurality of terminals 3 of the surface mount component 1 and the plurality of pads 201 of the mounting substrate 200 can be firmly bonded, and the spread of the conductive bonding material 202 is suppressed. be able to. Thereby, according to this Embodiment, the reliability of the product containing the surface mounting component 1 and the mounting substrate 200 can be improved. Further, according to the present embodiment, as described above, the plurality of terminals 3 and the plurality of pads 201 can be firmly bonded and the spread of the conductive bonding material 202 can be suppressed. The area occupied by each terminal 3 and the interval between adjacent terminals 3 on the terminal arrangement surface 2A of the main body 2 of the component 1 can be reduced. As a result, according to the present embodiment, it is possible to reduce the size of the surface-mounted component 1 and increase the mounting density of the surface-mounted component 1.

  In addition, when the surface of the terminal of the surface mount component is flat, the area of the surface of the terminal cannot be made as large as the area of the surface of the pad of the mounting board. The strength of the joint with is easy to decrease. On the other hand, according to the present embodiment, since the terminal 3 has the recess 3A, it is possible to particularly increase the bonding strength between the terminal 3A and the conductive bonding material 202.

  Moreover, according to the manufacturing method of the surface mount component 1 which concerns on this Embodiment, the surface mount component 1 which has the above-mentioned effect can be manufactured easily using a simultaneous baking method. Moreover, according to the manufacturing method of the surface mount component 1 which concerns on this Embodiment, the terminal 3 can be formed by the method similar to the formation method of the through hole in a simultaneous baking method.

  Hereinafter, a preferable shape of the recess 3A of the terminal 3 will be described in detail with reference to FIGS. 14 is a cross-sectional view showing the terminal 3 and its periphery in an example in which the shape of the recess 3A is different from that in FIG. In the following description, it is assumed that the shape of the opening and bottom of the recess 3A is circular. Here, as shown in FIGS. 3 and 14, the diameter of the opening in the recess 3A is represented by symbol φ1, the diameter of the bottom in the recess 3A is represented by symbol φ2, and the depth of the recess 3A is represented by symbol D. FIG. 3 shows an example in which the diameter φ1 of the opening is larger than the diameter φ2 of the bottom, but the shape of the recess 3A is such that the diameter φ1 of the opening and the diameter φ2 of the bottom are as shown in FIG. It may be equal. However, as the shape of the recess 3A, it is not preferable that the diameter φ1 of the opening is smaller than the diameter φ2 of the bottom.

  If the diameter φ1 of the opening is too small, a sufficient amount of the conductive bonding material 202 cannot be inserted into the recess 3A. If the diameter φ1 of the opening is too large, the area of the terminal placement surface 2A occupied by the terminal 3 becomes too large, and the surface mounting component 1 is miniaturized and the surface mounting component 1 is mounted with high density. Becomes difficult. Considering these, the diameter φ1 of the opening is preferably in the range of 80 to 150 μm.

  If the diameter φ2 of the bottom is too small, the connection between the terminal 3 and the inner conductor layer 5 may be insufficient. In order to connect the terminal 3 and the inner conductor layer 5 with certainty, the bottom diameter φ2 is preferably 50 μm or more. As described above, the diameter φ2 of the bottom is preferably equal to or less than the diameter φ1 of the opening. In addition, the thickness of the conductor layer 3B for terminals exists in the range of 10-20 micrometers, for example.

  Next, the result of an experiment in which a preferable range of the depth D of the recess 3A is examined will be described. In this experiment, samples of surface mount components of a plurality of types of examples having four terminals 3 having recesses 3A and one type of surface mount component of a comparative example having four terminals having no recesses and a flat surface A sample was prepared. In one type of sample, the types of the four terminals 3 are the same. There are three types of terminals 3, the diameter φ1 of the opening being 80 μm, 120 μm, and 150 μm, and the depth D being 7 types of 10 μm, 25 μm, 50 μm, 75 μm, 100 μm, 125 μm, and 150 μm. Kind. In addition, as shown in FIG. 3, the terminals 3 in the samples of the plural types of examples have the diameter φ1 of the opening larger than the diameter φ2 of the bottom. In the experiment, five samples of the same type were prepared.

  In the experiment, a plurality of test mounting substrates on which each of the manufactured samples was mounted was manufactured. The test mounting board includes a substrate body made of glass cloth base epoxy resin having a thickness of 1.6 mm and four pads provided on the upper surface of the substrate body. The pad was formed of a copper foil having a thickness of 35 μm. In the experiment, each sample was mounted on the test mounting board by bonding each terminal of the sample to each pad of the test mounting board using a solder paste.

  In the experiment, the shear fracture strength of the joint between the terminal of the sample and the pad of the test mounting board was measured by the following method using a three-point bending test apparatus. The three-point bending test apparatus used in this method is equipped with a pressure jig having a spherical shape with a curvature radius of 0.5 mm and a needle shape as a whole, and the load applied to the sample can be measured by this pressure jig. It is. In the experiment, the test mounting board was fixed so that the upper surface of the substrate body of the test mounting board was parallel to the axial direction of the pressure jig, and the tip of the pressure jig was centered in the thickness direction on the side surface of the sample. The pressure jig was moved at a speed of 5 mm / min. In the experiment, the load immediately before the sample peeled from the test mounting substrate was defined as the shear fracture strength. In addition, in the experiment, the average value of the shear fracture strength obtained for the five samples for each type of sample was used as the bonding strength between the terminal of the sample and the pad of the test mounting board in that type.

  The results of the experiment are shown in Table 1 below. In Table 1, the type of the sample of the example is specified by the diameter φ1 of the opening of the recess 3A and the depth D of the recess 3A. In Table 1, for each type of sample of the example, the bonding strength between the terminal 3 of the sample and the pad of the test mounting board in that type is the bond between the terminal of the sample of the comparative example and the pad of the test mounting board. When the strength is higher than the strength of the sample, it is indicated by a mark “◯”, and the bonding strength between the terminal 3 of the sample and the pad of the test mounting board in the type is different from the terminal of the sample and the pad of the test mounting board in the comparative example. The case where the strength is less than or equal to the bonding strength is indicated by “x”.

  As shown in Table 1, when the diameter φ1 of the opening is 80 μm, 120 μm, and 150 μm, when the depth D is 10 μm, the bonding strength between the terminal and the pad in the sample of the comparative example is increased. In comparison, the bonding strength between the terminal 3 and the pad did not increase. As shown in Table 1, the bonding strength between the terminal 3 and the pad is larger than the bonding strength between the terminal and the pad in the sample of the comparative example when the diameter φ1 of the opening is 80 μm. When the depth D is in the range of 25 to 50 μm, the diameter D1 of the opening is 120 μm, and in the case of 150 μm, the depth D is in the range of 25 to 100 μm. Therefore, when the diameter φ1 of the opening is 80 μm, the depth D is preferably in the range of 25 to 50 μm. When the diameter φ1 of the opening is 120 μm and 150 μm, the depth D is 25 to 25 μm. It is preferable to be in the range of 100 μm.

  In addition, the experimental results shown in Table 1 indicate that if the value of [depth D / diameter φ1 of the opening] is too large, improvement in the bonding strength between the terminal 3 and the pad 201 cannot be expected. Also, from experiments, if the value of [depth D / diameter of opening φ1] becomes too large, the space inside the recess 3A becomes too large, and the recess 3A of the solder interposed between the terminal 3 and the pad 201 becomes too large. It has been found that defects such as cracks are likely to occur in the portion that has entered. From the experimental results shown in Table 1, the value of [depth D / diameter of opening φ1] that can improve the bonding strength between the terminal 3 and the pad 201 without causing defects such as cracks in the solder. Is considered to be about 0.8.

  The volume of the recess 3A is preferably in the range of 50 to 80% of the volume of the conductive bonding material 202 interposed between the terminal 3 and the pad 201.

  In addition, this invention is not limited to said each embodiment, A various change is possible. For example, the surface mount component of the present invention is not limited to the one provided with the main body 2 including a plurality of laminated dielectric layers as shown in the embodiment. The surface mount component of the present invention may include, for example, a main body configured by covering an element with a sealing material.

  In addition, the method of forming the terminal in the present invention is not limited to the method described in the embodiment, and for example, a recess is formed in the terminal arrangement surface of the main body by laser light or the like, and a conductor layer is attached to the recess to form the terminal. May be formed.

  In the method for mounting surface-mounted components according to the present invention, the conductive bonding material is not limited to solder paste, and may be, for example, a conductive adhesive.

  The present invention is not limited to the bandpass filter element 40 shown in the embodiment, but can be applied to various electronic components such as other types of filters, baluns, and couplers.

1 is a perspective view of a surface mount component according to an embodiment of the present invention. It is sectional drawing of the surface mount component which concerns on one embodiment of this invention. It is sectional drawing which shows one terminal and its periphery in the surface mount component which concerns on one embodiment of this invention. It is a block diagram which shows the circuit structure of the high frequency circuit as an example of the system using the surface mounting components which concern on one embodiment of this invention. It is a perspective view which shows the external appearance of the high frequency module in FIG. It is a top view of the high frequency module shown in FIG. It is sectional drawing of the high frequency module shown in FIG. It is a circuit diagram which shows the circuit structure of the band pass filter comprised using the band pass filter element in FIG. It is explanatory drawing which shows the structure of the band pass filter element which is a specific application example of the surface mount component which concerns on one embodiment of this invention. It is explanatory drawing which shows the manufacturing method of the surface mounted component which concerns on one embodiment of this invention. It is explanatory drawing which shows the first process in the mounting method of the surface mounted components which concerns on one embodiment of this invention. FIG. 12 is an explanatory diagram showing a step that follows the step shown in FIG. 11. FIG. 13 is an explanatory diagram showing a step that follows the step shown in FIG. 12. It is sectional drawing which shows the terminal and its periphery in the example from which the shape of a recessed part differs from FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Surface-mounted component, 2 ... Main body, 2A ... Terminal arrangement surface, 3 ... Terminal, 3A ... Recessed part, 3B ... Terminal conductor layer, 5 ... Internal conductor layer, 41-45 ... Dielectric layer.

Claims (4)

  1. A main body having a terminal arrangement surface;
    A plurality of terminals arranged on the terminal arrangement surface,
    Each of the plurality of terminals has a concave portion.
  2. The body includes a plurality of stacked dielectric layers and one or more inner conductor layers disposed between two adjacent dielectric layers;
    One of the plurality of dielectric layers is a dielectric layer for terminal arrangement having the terminal arrangement surface,
    The terminal arrangement dielectric layer has a plurality of terminal holes formed at positions corresponding to the plurality of terminals,
    2. The surface according to claim 1, wherein each terminal has a terminal conductor layer deposited on a part of a terminal arrangement surface in the periphery of the corresponding terminal hole and the corresponding terminal hole. Mounting parts.
  3. A main body having a terminal arrangement surface;
    A plurality of terminals arranged on the terminal arrangement surface,
    Each of the plurality of terminals has a recess,
    The body includes a plurality of stacked dielectric layers and one or more inner conductor layers disposed between two adjacent dielectric layers;
    One of the plurality of dielectric layers is a dielectric layer for terminal arrangement having the terminal arrangement surface,
    The terminal arrangement dielectric layer has a plurality of terminal holes formed at positions corresponding to the plurality of terminals,
    Each terminal is a method for producing a surface-mounted component having a terminal conductor layer deposited on a part of a terminal arrangement surface in the periphery of a corresponding terminal hole and a corresponding terminal hole, respectively.
    A plurality of ceramic green sheets that are fired later to become the plurality of dielectric layers, one or more pre-fired internal conductor layers that are fired later to become the one or more internal conductor layers, and a plurality of ceramic green sheets that are fired later Forming a laminate including a plurality of pre-firing terminal conductor layers to be terminal conductor layers;
    And a step of firing the laminate to form the surface-mounted component.
  4. A main body having a terminal arrangement surface; and a plurality of terminals arranged on the terminal arrangement surface, each of the plurality of terminals having a surface-mounted component having a recess, and a plurality of pads connected to the plurality of terminals. It is a method of mounting on a mounting board provided,
    Disposing a conductive bonding material on each of the plurality of pads;
    Disposing the surface-mounted component on the mounting substrate such that the plurality of terminals face the plurality of pads, and bonding the plurality of terminals to the plurality of pads with the conductive bonding material. ,
    In the step of bonding the plurality of terminals to the plurality of pads, a part of the conductive bonding material interposed between each terminal and each pad enters into the recess of each terminal, and the mounting method of the surface mount component .
JP2008094118A 2008-03-31 2008-03-31 Surface mounted part, method for manufacturing therefor, and mounting method Pending JP2009246300A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008094118A JP2009246300A (en) 2008-03-31 2008-03-31 Surface mounted part, method for manufacturing therefor, and mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008094118A JP2009246300A (en) 2008-03-31 2008-03-31 Surface mounted part, method for manufacturing therefor, and mounting method

Publications (1)

Publication Number Publication Date
JP2009246300A true JP2009246300A (en) 2009-10-22

Family

ID=41307846

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008094118A Pending JP2009246300A (en) 2008-03-31 2008-03-31 Surface mounted part, method for manufacturing therefor, and mounting method

Country Status (1)

Country Link
JP (1) JP2009246300A (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0381643U (en) * 1989-12-08 1991-08-21
JPH0918145A (en) * 1995-06-29 1997-01-17 Matsushita Electric Ind Co Ltd Multilayer ceramic board
JPH09298252A (en) * 1996-05-01 1997-11-18 Shinko Electric Ind Co Ltd Semiconductor package and semiconductor device using the semiconductor package
JPH10256712A (en) * 1997-03-13 1998-09-25 Denso Corp Structure of mounting ball grid array package type semiconductor part
JPH10340929A (en) * 1997-04-10 1998-12-22 Hitachi Aic Inc Wiring board for mounting electronic part
JPH113912A (en) * 1997-04-18 1999-01-06 Hitachi Aic Inc Bump forming method of wiring substrate
JP2003303849A (en) * 2002-04-12 2003-10-24 Sharp Corp Printed wiring board and connection method of bare chip semiconductor element to the same

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0381643U (en) * 1989-12-08 1991-08-21
JPH0918145A (en) * 1995-06-29 1997-01-17 Matsushita Electric Ind Co Ltd Multilayer ceramic board
JPH09298252A (en) * 1996-05-01 1997-11-18 Shinko Electric Ind Co Ltd Semiconductor package and semiconductor device using the semiconductor package
JPH10256712A (en) * 1997-03-13 1998-09-25 Denso Corp Structure of mounting ball grid array package type semiconductor part
JPH10340929A (en) * 1997-04-10 1998-12-22 Hitachi Aic Inc Wiring board for mounting electronic part
JPH113912A (en) * 1997-04-18 1999-01-06 Hitachi Aic Inc Bump forming method of wiring substrate
JP2003303849A (en) * 2002-04-12 2003-10-24 Sharp Corp Printed wiring board and connection method of bare chip semiconductor element to the same

Similar Documents

Publication Publication Date Title
US7132984B2 (en) Antenna with built-in filter
US7515879B2 (en) Radio frequency circuit module
EP2437400B1 (en) High-frequency switch module
DE10228058B4 (en) RF module
US5525942A (en) LC-type dielectric filter and duplexer
TW561710B (en) Front end module
TWI345825B (en)
KR100674793B1 (en) Multilayer ceramic device
US20190341665A1 (en) Electronic apparatus and electrical element
JP5135320B2 (en) Passive signal processing components for RF / wireless multiband applications based on liquid crystalline polymers and multilayer polymers
JP3976473B2 (en) High frequency circuit and module and communication device using the same
CN1182621C (en) Radio-frequency signal output module with radio-frequency power amplifier and isolation elements
US7167688B2 (en) RF transceiver module formed in multi-layered ceramic
US7795728B2 (en) Electronic component
KR100382765B1 (en) Passive devices and modules for transceiver and manufacturing method thereof
KR100479976B1 (en) Multiband high-frequency switching module
CN1265561C (en) Passive device and module of transceiver
JP3612031B2 (en) High frequency module
CN100344192C (en) High-frequency switch and the radio communication apparatus
JP3375936B2 (en) Duplexer device
CN1174475C (en) Method for making RF module element with sound wave surface wave unit
JP4049239B2 (en) Method for manufacturing high-frequency module component including surface acoustic wave element
US6424233B1 (en) Complex electronic component with a first multilayer filter having a cavity in which a second filter is mounted
US9035721B2 (en) Duplexer, communication module component, and communication device
US20030048154A1 (en) High-frequency composite switch module

Legal Events

Date Code Title Description
A977 Report on retrieval

Effective date: 20110427

Free format text: JAPANESE INTERMEDIATE CODE: A971007

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110509

A521 Written amendment

Effective date: 20110708

Free format text: JAPANESE INTERMEDIATE CODE: A523

A131 Notification of reasons for refusal

Effective date: 20111107

Free format text: JAPANESE INTERMEDIATE CODE: A131

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20120306