JP2009218528A - GaN-BASED FIELD EFFECT TRANSISTOR - Google Patents

GaN-BASED FIELD EFFECT TRANSISTOR Download PDF

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JP2009218528A
JP2009218528A JP2008063644A JP2008063644A JP2009218528A JP 2009218528 A JP2009218528 A JP 2009218528A JP 2008063644 A JP2008063644 A JP 2008063644A JP 2008063644 A JP2008063644 A JP 2008063644A JP 2009218528 A JP2009218528 A JP 2009218528A
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gan
gate electrode
effect transistor
field effect
based
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Mitsuru Masuda
Ko Ri
満 増田
江 李
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Furukawa Electric Co Ltd:The
古河電気工業株式会社
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a GaN-based field effect transistor capable of reducing cost and a circuit size. <P>SOLUTION: A depression type GaN-based field effect transistor 10 includes a capacitor 40 connected to a gate electrode 25 in series. The capacitor 40 is composed of an insulating film 29 formed on the gate electrode 25 and a second gate electrode 41 formed on the insulating film 29. A diode (Schottky diode) D1 is composed of the gate electrode 25 which is a Schottky electrode and a source electrode 26 which is an ohmic electrode. Since an external capacitor is not required for a circuit for driving the field effect transistor 10 having the capacitor 40 and the diode D1, the cost can be reduced and the size of the driving circuit can be reduced. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a depletion mode (normally on) operation GaN-based field effect transistor having a negative threshold voltage.

  Wide bandgap semiconductors such as GaN and SiC have high dielectric breakdown voltage, good electron transport characteristics, and good thermal conductivity, and are expected as power devices that realize areas impossible with Si. AlGaN / GaN heterostructure has attracted much attention because it has two-dimensional electron gas with high electron mobility and carrier density due to piezo effect and spontaneous polarization effect. However, in High Electron Mobility Transistor (HEMT) using AlGaN / GaN heterostructures, unlike conventional power transistors and MOSFETs, the drain current does not flow when no gate voltage is applied, and the enhancement mode (normally off) operation This is not a semiconductor element of this type, but a semiconductor element of a depletion mode (normally on) operation in which a drain current flows when a gate voltage is not applied. Thus, since the conventional AlGaN / GaN HFET device is a normally-on semiconductor element, a special circuit is required for driving.

  Conventionally, in a high-frequency circuit using GaAs, various methods for driving a normally-on element such as a depletion type (normally-on type) HEMT have been studied. As a conventional normally-on element drive circuit example (depletion type HEMT bias circuit example), a drive circuit shown in FIGS. 8A and 8B is known (see Non-Patent Document 1).

  The circuit shown in FIG. 8A is a normally-on element driving circuit widely used in high-frequency circuits. In this drive circuit, when Vin is 0 V, the gate voltage of the normally-on HEMT 101 becomes negative due to the negative power supply 100 and the HEMT 101 is turned off. When Vin becomes 5V, for example, 0V is applied to the gate of HEMT 101 and HEMT 101 is turned on.

The circuit shown in FIG. 8B is also a normally-on element driving circuit widely used in high-frequency circuits. In this drive circuit, the source terminal of the HEMT 101 is grounded via a resistor R1 and a capacitor C2 connected in parallel to the resistor R1. In this drive circuit, when Vin is 5 V, for example, the value of the resistor R1 is set so that 0 V is applied to the gate of the HEMT 101 and the HEMT 101 is turned on. Further, when Vin is 0V, a negative voltage is applied to the gate of the HEMT 101 so that the HEMT 101 is turned off.
144 pages of "RF Design Series High-frequency Circuits Starting with Simulation" (Author: Yuichi Ichikawa, Publisher: CQ Publishing Co., Ltd.)

  By the way, in the circuit shown in FIG. 8A, a negative power source (negative power source 100) for applying a negative voltage to the gate of the HEMT 101 is required separately from the Vin power source. There was a problem that the whole volume became large.

  The present invention has been made in view of such conventional problems, and the object thereof is a GaN-based electric field that can eliminate the need for a negative power source, reduce costs, and reduce the circuit size. It is to provide an effect transistor.

  In order to solve the above-described problem, a GaN-based field effect transistor according to the first aspect of the present invention includes a first semiconductor layer made of a GaN-based semiconductor and the first semiconductor layer formed on the first semiconductor layer. A second semiconductor layer made of a GaN-based semiconductor having a larger band gap energy than the semiconductor layer, a source electrode, a first gate electrode, and a drain electrode formed on the second semiconductor layer, and at least the gate An insulating film formed on the electrode and a second gate electrode formed on the insulating film are provided.

  According to this configuration, an insulating film is formed on the gate electrode, and a second gate electrode is formed on the insulating film, thereby having a capacitor (internal capacitor) connected in series with the gate electrode. A field effect transistor can be manufactured.

  Such a circuit for driving a GaN field effect transistor having an internal capacitor eliminates the need for an external capacitor, thereby reducing costs and reducing the size of the circuit.

  A GaN-based field effect transistor according to a second aspect of the invention is characterized in that the first gate electrode is made of a metal that is in Schottky contact with the second semiconductor layer.

  According to this aspect, since the gate electrode is a metal that is in Schottky contact with the second semiconductor layer, the gate electrode that is a Schottky electrode and the source electrode that is an ohmic electrode constitute a diode. The circuit for driving the GaN field effect transistor having such a diode and the above capacitor does not require an external capacitor, and an external diode is also unnecessary, further reducing the cost. The circuit can be miniaturized.

  The GaN-based field effect transistor according to the invention of claim 3 is characterized in that the insulating film is composed of one or more dielectric films.

  According to this configuration, the portion functioning as the passivation film and the portion functioning as the dielectric film of the capacitor can be configured with one insulating film, and the manufacturing process can be simplified.

  According to a fourth aspect of the present invention, in the GaN-based field effect transistor, the insulating film is formed between the source electrode and the first gate electrode on the surface of the second semiconductor layer, and the first gate. It is a film formed integrally with a passivation film formed between an electrode and the drain electrode.

  The GaN-based field effect transistor according to claim 5 is characterized in that the first gate electrode is composed of at least one layer including any one of Ni, Pt, Pd, Au, and poly-Si. And

In the GaN-based field effect transistor according to claim 6, the insulating film is made of SiO 2 , SiN, SiON, Al 2 O 3 , AlN, AlON, TiNO x , TaNO x , TiO x , TaO x , TiO. It is a dielectric film containing either x or Ga 2 O 3 .

  According to the present invention, it is possible to reduce costs and downsize a circuit.

Next, embodiments embodying the present invention will be described with reference to the drawings. In the description of each embodiment, similar parts are denoted by the same reference numerals, and redundant description is omitted.
(First embodiment)
A depletion-type GaN-based field effect transistor according to the first embodiment will be described with reference to FIGS.

  In the depletion-type GaN-based field effect transistor (hereinafter referred to as “GaN-based HEMT”) 10 shown in FIG. 1, a buffer layer 22 made of, for example, GaN and an undoped GaN layer ( A layer structure (epitaxial layer having a heterojunction structure) is formed by sequentially stacking a channel layer 23) and an undoped AlGaN layer (electron supply layer) 24 that is much thinner than the undoped GaN layer. The buffer layer 22 may be composed of a laminated structure of AlN and GaN.

  Since the electron supply layer (undoped AlGaN layer) 24 is heterojunctioned to the surface of the channel layer (undoped GaN layer) 23, a two-dimensional electron gas layer 28 is formed at the interface of the joined part. Therefore, the channel layer 23 becomes conductive because the two-dimensional electron gas layer 28 becomes a carrier. The channel layer (undoped GaN layer) 23 corresponds to a first semiconductor layer made of a GaN-based semiconductor. The electron supply layer (undoped AlGaN layer) 24 corresponds to a second semiconductor layer made of a GaN-based semiconductor having a band gap energy larger than that of the first semiconductor layer formed on the first semiconductor layer.

  On the electron supply layer 24, a gate electrode (G1) 25, a source electrode 26, and a drain electrode 27 are formed. The source electrode 26 and the drain electrode 27 are ohmic electrodes made of a metal material that is in ohmic contact with the electron supply layer 24, respectively. The source electrode 26 and the drain electrode 27 are formed, for example, by laminating Ti, an alloy of Al and Si, and W in this order from the region closest to the electron supply layer 24.

  On the other hand, the gate electrode 25 is composed of a single layer (single layer) or a plurality of layers made of any one of metals such as Ni, Pt, Pd, Au, and poly-Si that are in Schottky contact with the electron supply layer 24. ing. For example, the gate electrode 25 is formed by stacking Pt and Au in this order from the region closest to the electron supply layer 24.

  Further, as shown in FIGS. 1 and 2, the GaN-based HEMT 10 includes an insulating film 29 formed on the gate electrode 25 and a second gate electrode (G2) 41 formed on the insulating film 29. The capacitor | condenser 40 comprised is provided. The insulating film 29 extends to a region between the source electrode 26 and the gate electrode 25 and a region between the gate electrode 25 and the drain electrode 27 on the surface of the electron supply layer 24. That is, the insulating film 29 is the same film as the passivation film formed on the surface of the electron supply layer 24 between the source electrode 26 and the gate electrode 25 and between the gate electrode 25 and the drain electrode 27 (passivation film). And an integral membrane).

As described above, the insulating film 29 has a portion 29 a that functions as a passivation film and a portion 29 b that functions as a dielectric film of the capacitor 40. A capacitor 40 is configured by the portion 29b of the insulating film 29 and the gate electrode 25 and the second gate electrode 41 on both sides of the portion 29b. The insulating film 29 is, for example, a SiO 2 film. On the other hand, the second gate electrode 41 is made of a conductive material such as metal.
An equivalent circuit of the GaN-based HEMT 10 having such a configuration is shown in FIG.

  In the GaN-based HEMT 10, an insulating film 29 is formed on the gate electrode 25, and a second gate electrode 41 is formed on the insulating film 29, so that a capacitor (internal capacitor) connected in series with the gate electrode 25 is formed. ) 40 is formed.

  Further, since the gate electrode 25 is made of a metal that is in Schottky contact with the electron supply layer 24, a diode (Schottky diode) D1 is formed by the gate electrode 25 that is a Schottky electrode and the source electrode 26 that is an ohmic electrode. It is configured. That is, the diode D1 is included in the GaN-based HEMT 10.

FIG. 4 shows a schematic configuration of a drive circuit that drives the depletion-type GaN-based HEMT 10.
This drive circuit is a single power supply drive circuit, and an oscillator 11 that outputs a control signal for turning on / off the GaN-based HEMT 10, and a control signal output from the oscillator 11 is used as a gate G (second gate) of the GaN-based HEMT 10. A signal line 12 for supplying to the electrode 41) is provided. The source S (source electrode 26) of the GaN-based HEMT 10 is grounded, and its drain D (drain electrode 27) is connected to the positive side of the power supply (V2) 14 for driving the load resistance via the load resistance (R1) 13. Has been.

  Next, the operation when the GaN-based HEMT 10 is driven by the drive circuit shown in FIG. 4 will be described with reference to FIGS. 5A shows the output voltage waveform of the oscillator 11, FIG. 5B shows the waveform of the gate signal 31 (FET gate input voltage waveform) input to the gate (gate electrode 25) of the GaN-based HEMT 10, and FIG. (C) shows a Vds waveform (FET drain-source voltage waveform) 32 of the GaN-based HEMT 10.

  The oscillator 11 generates a high-level control signal 30a for turning on the GaN-based HEMT 10 such as +5 (V) and a low-level (0 (V)) control signal 30b for turning off the GaN-based HEMT 10 at a frequency of about 1000 KHz, for example. To output.

  When a high-level control signal 30a is output from the oscillator 11 to the gate G of the GaN-based HEMT 10 (second gate electrode 41) (at time t1), the capacitor (internal capacitor) 40 of the GaN-based HEMT 10 is charged at the same time. The level is shifted to the negative side by 40 and transmitted to the gate (gate electrode 25) of the GaN-based HEMT 10. At this time, the waveform of the gate signal 31 input to the gate electrode 25 becomes 0 (V) as indicated by reference numeral 31a. By applying this 0 (V) gate signal to the gate electrode 25 of the GaN-based HEMT 10, the GaN-based HEMT 10 is turned on.

  Between time t2 and time t3 in FIG. 5A, a low level control signal 30b is output from the oscillator 11 to the gate G (second gate electrode 41), and input to the gate electrode 25 of the GaN-based HEMT 10 during that time. The waveform of the gate signal 31 is -5 (V), which is lower than the threshold value of the GaN-based HEMT 10, as indicated by reference numeral 31b, so the GaN-based HEMT 10 is turned off.

  Between time t3 and time t4 in FIG. 5A, the second high level (5 (V)) control signal 30a is output from the oscillator 11 to the gate G (second gate electrode 41). This high level (5 (V)) control signal 30 a is level shifted to the negative side by the capacitor 40 and transmitted to the gate electrode 25 of the GaN-based HEMT 10. At this time, the waveform of the gate signal 31 input to the gate electrode 25 becomes 0 (V) as indicated by reference numeral 31a. By applying this 0 (V) gate signal to the gate electrode 25 of the GaN-based HEMT 10, the GaN-based HEMT 10 is turned on.

  After the GaN-based HEMT 10 is turned on, a low-level control signal 30b is output from the oscillator 11 between time t4 and time t5 in FIG. During this period (between time t4 and time t5), the waveform of the gate signal 31 input to the gate electrode 25 of the GaN-based HEMT 10 is -5 (V) lower than the threshold voltage of the GaN-based HEMT 10 as indicated by reference numeral 31b. Therefore, the GaN-based HEMT 10 is turned off from on.

  After this (after time t5), the oscillator 11 outputs the high-level control signal 30a and the example-level control signal 30b periodically, so that the switching operation (ON / OFF operation) of the GaN-based HEMT 10 is performed. Repeated.

  In this way, when the high-level control signal 30a and the low-level control signal 30b are periodically output from the oscillator 11, the signal level is 0 (V) and a negative voltage (for example, −5 (V)). Since the gate signal 31 having a pulse waveform that periodically changes between them is applied to the gate electrode 25 of the GaN-based HEMT 10, the GaN-based HEMT 10 can be switched.

According to 1st Embodiment comprised as mentioned above, there exist the following effects.
When a high level (+5 (V)) control signal 30a and a low level (0 (V)) control signal 30b are periodically output from the oscillator 11 of the drive circuit (see FIG. 5A). Since the gate signal 31 having a pulse waveform whose signal level periodically changes between 0 (V) and a negative voltage (for example, −5 (V)) is applied to the gate electrode 25 of the GaN-based HEMT 10, the GaN-based HEMT 10. Can be switched.

  For this reason, if the voltage output from the oscillator 11 is larger than the absolute value of the threshold value of the GaN-based HEMT, the GaN-based HEMT 10 can be driven by a single power source, and +5 (V) or +3.3 (V). It is not necessary to provide a negative power source for turning off the GaN-based HEMT 10 separately from the power source. The GaN-based HEMT 10 can be switched by a single power source (for example, a +5 (V) power source). Therefore, a negative power source can be eliminated, and the cost can be reduced and the circuit (drive circuit) can be downsized.

  Depletion having a capacitor (internal capacitor) 40 connected in series with the gate electrode 25 by forming the insulating film 25 on the gate electrode 25 and forming the second gate electrode 41 on the insulating film 25. A type GaN-based HEMT 10 can be fabricated.

  A circuit for driving the depletion-type GaN-based HEMT 10 having such a capacitor (internal capacitor) 40 does not require an external capacitor, so that the cost and the size of the drive circuit can be reduced.

  Since the gate electrode 25 is made of a metal that is in Schottky contact with the electron supply layer 24, the gate electrode 25 that is a Schottky electrode and the source electrode 26 that is an ohmic electrode constitute a diode (Schottky diode) D1. Has been. That is, the GaN-based HEMT 10 includes the diode D1. Therefore, in the drive circuit as shown in FIG. 3 for driving the depletion type GaN HEMT 10 having the diode D1 and the capacitor 40, an external capacitor is not required, and an external diode is not required. Therefore, further cost reduction and circuit miniaturization are possible.

  The insulating film 29 is the same film as the passivation film formed between the source electrode 26 and the gate electrode 25 and between the gate electrode 25 and the drain electrode 27 on the surface of the electron supply layer 24. Thereby, the part 29a functioning as a passivation film and the part 29b functioning as a dielectric film of the capacitor 40 can be configured by one insulating film 29, and the manufacturing process can be simplified.

(Second Embodiment)
Next, a depletion type GaN-based HEMT 10A according to the second embodiment will be described with reference to FIG.

  In this GaN-based HEMT 10 A, the insulating film 50 that is disposed between the gate electrode 25 and the second gate electrode 41 and forms the capacitor 40 is provided between the source electrode 26 and the gate electrode 25 on the surface of the electron supply layer 24. The passivation film 51 is a film different from the passivation film 51 formed between the gate electrode 25 and the drain electrode 27.

  That is, in this GaN-based HEMT 10A, the passivation film 51 is formed in the region between the source electrode 26 and the gate electrode 25 and the region between the gate electrode 25 and the drain electrode 27 on the surface of the electron supply layer 24, respectively. Yes. After the opening is formed in the gate electrode formation portion of the passivation film 51 to form the gate electrode 25, the insulating film 50 is formed so as to cover the passivation film 5 and the gate electrode 25.

Other configurations are the same as those in the first embodiment.
According to the second embodiment having such a configuration, the cost can be reduced and the size of the drive circuit can be reduced as in the first embodiment.

(Third embodiment)
Next, a depletion type GaN-based HEMT 10B according to a third embodiment will be described with reference to FIG.
This GaN-based HEMT 10B is the same as the depletion-type GaN-based HEMT 10A according to the second embodiment, but the insulating film 50 has a two-layer structure, for example, a SiN dielectric film 61 and a SiO 2 dielectric film 62. . Other configurations are the same as those of the second embodiment. According to the third embodiment having such a configuration, the cost can be reduced and the drive circuit can be downsized as in the first embodiment.

In addition, this invention can also be changed and embodied as follows.
In the first embodiment, the insulating film 29 is not limited to SiO 2 , but is SiN, SiON, Al 2 O 3 , AlN, AlON, TiNO x , TaNO x , TiO x , TaO x , TiO x , and Ga 2 O. A dielectric including any of 3 and the like may be used.

Insulating film 29 is not limited to a single layer such as SiO 2, it may be composed of a plurality of layers such as SiO 2 / SiN.

  In each of the above embodiments, a GaN-based semiconductor layer in which an undoped GaN layer (channel layer 23) and an undoped AlGaN layer (electron supply layer 24) are heterojunction is used, and a two-dimensional electron gas is directly below the heterojunction interface. 28 is generated so that the channel layer 23 exhibits conductivity. However, the channel layer is not limited to the heterojunction structure of the undoped GaN layer (channel layer 23) and the undoped AlGaN layer (electron supply layer 24), and may be any GaN-based semiconductor layer exhibiting conductivity.

  For example, in each of the above embodiments, a GaN-based semiconductor layer exhibiting p-type conductivity doped with Mg may be formed on the buffer layer 22, and this GaN-based semiconductor layer may be used as the channel layer. Note that Be, C, or Zn may be used instead of Mg. In this case, the insulating film 8 is formed on the GaN-based semiconductor layer exhibiting p-type conductivity.

  In each of the above embodiments, not only a sapphire substrate but also an element on a SiC substrate, Si substrate, GaN substrate, MgO substrate, ZnO substrate, or the like can be used.

  In each of the above embodiments, the field effect transistor is manufactured on the substrate. However, the present invention can also be applied to a field effect transistor in which the substrate is removed by etching or the like, that is, a field effect transistor without a substrate.

  In each of the above embodiments, the source electrode 26 and the drain electrode 27 are each formed with an n-AlGaN contact layer formed by doping, for example, Si, which is an n-type impurity, at a high concentration in these electrode formation regions. The present invention can also be applied to a depletion type GaN-based field effect transistor having a configuration in which a source electrode 26 and a drain electrode 27 are disposed on these two contact layers.

  In each of the above embodiments, the semiconductor material forming the channel layer 23 is not limited to single crystal GaN, and a GaN-based compound semiconductor can be used. The electron supply layer 24 is not limited to AlGaN, and other GaN-based compound semiconductors can be used.

Sectional drawing which shows schematic structure of the depletion type GaN-type field effect transistor which concerns on 1st Embodiment. FIG. 2 is a partial cross-sectional view showing details of a gate portion of the GaN-based field effect transistor shown in FIG. 1. FIG. 2 is a circuit diagram showing an equivalent circuit of the GaN-based field effect transistor shown in FIG. 1. The circuit diagram which shows the state which connected the oscillator of the drive circuit to the GaN-type field effect transistor shown in FIG. (A) is an output voltage waveform of the oscillator, (B) is a waveform of a gate signal inputted to the gate electrode of the GaN-based field effect transistor, and (C) is a timing chart showing a Vds waveform of the GaN-based field effect transistor. . The fragmentary sectional view which shows the detail of the gate part of the depletion type GaN-type field effect transistor which concerns on 2nd Embodiment. The fragmentary sectional view which shows the detail of the gate part of the depletion type GaN-type field effect transistor which concerns on 3rd Embodiment. The circuit diagram which shows the drive circuit of the conventional normally-on element.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10, 10A, 10B ... Depletion type GaN-type field effect transistor 23 ... Channel layer (1st semiconductor layer)
24 ... Electron supply layer (second semiconductor layer)
25 ... Gate electrode 26 ... Source electrode 27 ... Drain electrode 29, 50 ... Insulating film 40 ... Capacitor 41 ... Second gate electrode D1 ... Diode

Claims (6)

  1. A first semiconductor layer made of a GaN-based semiconductor;
    A second semiconductor layer made of a GaN-based semiconductor having a band gap energy larger than that of the first semiconductor layer formed on the first semiconductor layer;
    A source electrode, a first gate electrode, and a drain electrode formed on the second semiconductor layer;
    A GaN-based field effect transistor comprising: an insulating film formed on at least the gate electrode; and a second gate electrode formed on the insulating film.
  2.   2. The GaN-based field effect transistor according to claim 1, wherein the first gate electrode is made of a metal that is in Schottky contact with the second semiconductor layer.
  3.   The GaN-based field effect transistor according to claim 1 or 2, wherein the insulating film is composed of one or more dielectric films.
  4.   The insulating film is integrated with a passivation film formed between the source electrode and the first gate electrode and between the first gate electrode and the drain electrode on the surface of the second semiconductor layer. The GaN-based field effect transistor according to claim 1, wherein the GaN-based field effect transistor is a film formed on the substrate.
  5.   5. The GaN according to claim 1, wherein the first gate electrode is composed of at least one layer including any one of Ni, Pt, Pd, Au, and poly-Si. Field effect transistor.
  6. The insulating film is a dielectric film containing any of SiO 2 , SiN, SiON, Al 2 O 3 , AlN, AlON, TiNO x , TaNO x , TiO x , TaO x , TiO x , and Ga 2 O 3. The GaN-based field effect transistor according to any one of claims 1 to 5, wherein
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