JP2009201231A - Dc/dc power conversion apparatus - Google Patents

Dc/dc power conversion apparatus Download PDF

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JP2009201231A
JP2009201231A JP2008039528A JP2008039528A JP2009201231A JP 2009201231 A JP2009201231 A JP 2009201231A JP 2008039528 A JP2008039528 A JP 2008039528A JP 2008039528 A JP2008039528 A JP 2008039528A JP 2009201231 A JP2009201231 A JP 2009201231A
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circuit
circuits
dc
voltage
connected
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JP4675983B2 (en
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Matahiko Ikeda
Akihiko Iwata
Masaru Kobayashi
Hirotoshi Maekawa
Tatsuya Okuda
Takahiro Urakabe
博敏 前川
達也 奥田
勝 小林
明彦 岩田
又彦 池田
隆浩 浦壁
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Mitsubishi Electric Corp
三菱電機株式会社
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Abstract

In a DC / DC power converter using a smoothing capacitor arranged in parallel for each of a plurality of circuits and utilizing charge / discharge of a capacitor between circuits, the power conversion operation is continued even if a failure occurs in some circuit elements. And do it.
A circuit A1 in which three cell circuits composed of two series MOSFETs are connected in parallel and connected between both terminals of a smoothing capacitor Cs1, and two series MOSFETs are connected to both terminals of each of the smoothing capacitors Cs2 to Cs4. Three series circuits X, A2 to A4 connected in series are connected in series, and LC series bodies LC12 to LC14 are arranged between each cell circuit and each circuit A2 to A4 with an equal resonance period. Configure Y and Z. Then, the failure detection circuits 132 to 134 and 131X to 131Z detect a failure for each column circuit X, Y, and Z, stop the failed column circuit, and detect the circuits (A2 to A4) in the failed column circuit. The positive and negative terminals of the smoothing capacitors Cs2 to Cs4 are short-circuited by the short-circuit circuits 152 to 154, and are operated except for the failed column circuit.
[Selection] Figure 1

Description

  The present invention relates to a DC / DC power conversion device that converts a DC voltage into a DC voltage that is stepped up or stepped down.

  A DC / DC converter as a conventional DC / DC power converter includes an inverter circuit including at least two semiconductor switches including a semiconductor switch connected to a positive potential and a semiconductor switch connected to a negative potential. It is composed of a multiple voltage rectifier circuit with a plurality of rectifiers connected in series and a plurality of capacitors connected in series, creates an AC voltage with an inverter circuit, and further generates a high voltage DC voltage with a multiple voltage rectifier circuit Is supplied to the load (see, for example, Patent Document 1).

JP-A-9-191638

  In such a conventional DC / DC power converter, when the circuit elements constituting the inverter circuit and the rectifier circuit fail in a short circuit state or fail in an open state, DC / DC voltage conversion cannot be performed. There is a problem that the entire system including the DC / DC power converter must be stopped while the device is stopped.

  The present invention has been made to solve the above-described problems. A smoothing capacitor is arranged in parallel for each of a plurality of circuits including a drive inverter circuit and a rectifier circuit. In a DC / DC power conversion device using charge / discharge, even if some circuit elements constituting the DC / DC power conversion device fail, the object is to perform a DC / DC power conversion operation continuously. .

  A first DC / DC power conversion device according to the present invention includes a driving inverter circuit in which a high-voltage side element and a low-voltage side element each composed of a semiconductor switching element are connected in series and connected between the positive and negative terminals of a smoothing capacitor, and semiconductor switching A plurality of circuits including a rectifier circuit formed by connecting a high-voltage side element and a low-voltage side element formed of an element or a diode element in series and connecting between positive and negative terminals of a smoothing capacitor are provided. A cell in which the predetermined circuit is a first circuit, each other circuit is a second circuit, and the first circuit is connected in series to the high-voltage side element and the low-voltage side element. M circuits are connected in parallel and connected between the positive and negative terminals of the smoothing capacitor, and the connection points between the high-voltage side elements and the low-voltage side elements of these circuits are used as intermediate terminals, An energy transfer capacitor is provided between the intermediate terminals between the second circuits and m column circuits each having the cell circuit, the second circuit, and the energy transfer capacitor are provided. . And the failure detection circuit which detects the failure for every said column circuit, and the short circuit which short-circuits between the positive / negative terminals of the said smoothing capacitor of each said 2nd circuit are provided.

  A second DC / DC power converter according to the present invention includes a driving inverter circuit formed by connecting a high-voltage side element and a low-voltage side element formed of semiconductor switching elements in series and connected between the positive and negative terminals of a smoothing capacitor, and a semiconductor A plurality of circuits are connected in series with a rectifier circuit formed by connecting a high-voltage side element and a low-voltage side element formed of a switching element or a diode element in series and connected between the positive and negative terminals of the smoothing capacitor. With the connection point between the high-voltage side element and the low-voltage side element as an intermediate terminal, an energy transfer capacitor and a cutoff switch are arranged between the intermediate terminals between the circuits. Further, among the plurality of circuits, a predetermined one circuit is a first circuit, each other circuit is a second circuit, a failure detection circuit for detecting a failure for each second circuit, and each of the first circuits And a short circuit for short-circuiting between the positive and negative terminals of the smoothing capacitor of the circuit of 2.

A first DC / DC power converter according to the present invention comprises m column circuits, a failure detection circuit for detecting a failure for each column circuit, and a short circuit for short-circuiting between the positive and negative terminals of the smoothing capacitor. Because it is equipped, it is possible to operate except the failed column circuit, and even if some circuit elements that make up the DC / DC power conversion device fail, the DC / DC power conversion operation can be continued and is reliable. Will improve.
The second DC / DC power conversion device according to the present invention includes a failure detection circuit for detecting a failure of each second circuit other than a predetermined one circuit, and a short circuit for short-circuiting between the positive and negative terminals of the smoothing capacitor and a circuit for shutting off. Because it has a switch, it can be operated except for the faulty circuit, and even if some circuit elements that make up the DC / DC power converter fail, the DC / DC power conversion operation can be continued. Reliability is improved.

Embodiment 1 FIG.
A DC / DC power converter according to Embodiment 1 of the present invention will be described below.
FIG. 1 shows a circuit configuration of a DC / DC power conversion apparatus according to Embodiment 1 of the present invention. This DC / DC power conversion apparatus has a power conversion circuit part having a function of converting power from direct current to direct current, and an additional circuit part having a function of continuing a malfunction in the event of a failure detection circuit and a short circuit.

(Description of power conversion circuit part)
(Description of configuration)
First, the power conversion circuit portion having the function of converting power from direct current to direct current will be described.
As shown in FIG. 1, the power conversion circuit portion of the DC / DC power conversion apparatus includes a plurality of (in this case, three) cell circuits A1X, A1Y, A1Z as a first circuit that is connected in parallel, and a plurality of circuit A1. It is composed of a plurality of stages (in this case, four stages) of circuits A1 to A4 composed of circuits A2 to A4 (three in this case) as second circuits. Drive power supply Vs1, Vs2, Vs3, Vs4, smoothing capacitors Cs1, Cs2, Cs3, Cs4 that smooth the input / output voltage and function as a voltage source for energy transfer, control circuit 200, and input / output voltage terminals Equipped with Vcom, VL, VH. Then, the voltage V1 inputted between the voltage terminals VL and Vcom is changed to a voltage V2 boosted by about four times and outputted between the voltage terminals VH and Vcom, or the voltage V2 inputted between the voltage terminals VH and Vcom. Is output to the voltage V1 between the voltage terminals VL and Vcom.

  The circuit A1 is a smoothing capacitor in which cell circuits A1X, A1Y, A1Z are connected in parallel with two MOSFETs (M1LX, M1HX) (M1LY, M1HY) (M1LZ, M1HZ) as low voltage side elements and high voltage side elements connected in series. Connected between both terminals of Cs1. Also, two MOSFETs (M2L, M2H) (M3L, M3H) (M4L, M4H) as low-voltage side elements and high-voltage side elements are connected in series and connected between both terminals of each smoothing capacitor Cs2, Cs3, Cs4. Three circuits A2, A3, A4 and circuit A1 are connected in series to form a four-stage circuit.

Then, with the connection point of the two MOSFETs in each of the cell circuits A1X, A1Y, A1Z and the circuits A2, A3, A4 as an intermediate terminal, between the intermediate terminals of the cell circuit A1X and the circuit A2, an energy transfer capacitor Cr12 and An LC series body LC12 configured by a series body of inductors Lr12 and functioning as an energy transfer element is connected. Similarly, an energy transfer element comprising a series body of energy transfer capacitors Cr13 and Cr14 and inductors Lr13 and Lr14 between the intermediate terminals of the cell circuit A1Y and the circuit A3 and between the intermediate terminals of the cell circuit A1Z and the circuit A4. LC series bodies LC13 and LC14 functioning as are connected. The resonance period values determined from the inductance value and the capacitance value of the inductor Lr and the capacitor Cr at each stage are set to be equal to each other.
Thereby, the column circuit X constituted by the cell circuit A1X, the circuit A2 and the LC serial body LC12, the column circuit Y constituted by the cell circuit A1Y, the circuit A3 and the LC serial body LC13, the cell circuit A1Z, the circuit A4 and Three column circuits X, Y, Z with the column circuit Z configured by the LC serial body LC14 are configured in the DC / DC power converter.

In addition, the DC / DC power converter includes gate drive circuits 111X, 111Y, 111Z, 112 to 114, and photocouplers (for driving the MOSFETs in the cell circuits A1X, A1Y, A1Z and the circuits A2, A3, A4). 122L, 122H), (123L, 123H), (124L, 124H).
Each MOSFET is a power MOSFET in which a parasitic diode is formed between the source and drain.

Next, details of connection in this power conversion circuit portion will be described.
Both terminals of the smoothing capacitor Cs1 are connected to voltage terminals VL and Vcom, respectively, and the voltage terminal Vcom is grounded. The VL side voltage terminal of the smoothing capacitor Cs1 is connected to one terminal of the smoothing capacitor Cs2, the other terminal of the smoothing capacitor Cs2 is connected to one terminal of the smoothing capacitor Cs3, and the other terminal of the smoothing capacitor Cs3 is connected to the smoothing capacitor Cs4. One terminal and the other terminal of the smoothing capacitor Cs4 are connected to the voltage terminal VH.
The source terminals of M1LX, M1LY, and M1LZ are connected to the voltage terminal Vcom, the drain terminals are connected to the source terminals of M1HX, M1HY, and M1HZ, and the drain terminals of M1HX, M1HY, and M1HZ are connected to the voltage terminal VL. The source terminal of M2L is connected to the low voltage side terminal of the smoothing capacitor Cs2, the drain terminal of M2L is connected to the source terminal of M2H, and the drain terminal of M2H is connected to the high voltage side terminal of the smoothing capacitor Cs2. The source terminal of M3L is connected to the low voltage side terminal of the smoothing capacitor Cs3, the drain terminal of M3L is connected to the source terminal of M3H, and the drain terminal of M3H is connected to the high voltage side terminal of the smoothing capacitor Cs3. The source terminal of M4L is connected to the low voltage side terminal of the smoothing capacitor Cs4, the drain terminal of M4L is connected to the source terminal of M4H, and the drain terminal of M4H is connected to the high voltage side terminal of the smoothing capacitor Cs4.

One end of the LC serial body LC12 is connected to a connection point between M1LX and M1HX, and the other end is connected to a connection point between M2L and M2H. One end of the LC serial body LC13 is connected to a connection point between M1LY and M1HY, and the other end is connected to a connection point between M3L and M3H. One end of the LC series LC14 is connected to a connection point between M1LZ and M1HZ, and the other end is connected to a connection point between M4L and M4H.
The gate terminals of (M1LX, M1HX), (M1LY, M1HY), (M1LZ, M1HZ) are connected to the output terminals of the gate drive circuits 111X, 111Y, 111Z, and the input terminals of the gate drive circuits 111X, 111Y, 111Z Each gate drive signal based on the voltage at the voltage terminal Vcom is input.
The gate terminals of (M2L, M2H) to (M4L, M4H) are connected to the output terminals of the gate drive circuits 112 to 114, and the input terminals of the gate drive circuits 112 to 114 receive the voltages of the source terminals of M2L to M4L. Each gate drive signal used as a reference is input. The gate drive circuits 111X, 111Y, 111Z, and 112 to 114 are general bootstrap drive circuits, such as driver ICs for driving half-bridge inverter circuits, capacitors for driving high-voltage side MOSFETs, and the like. It consists of

  As the gate drive signals for driving (M1LX, M1HX), (M1LY, M1HY), and (M1LZ, M1HZ), the gate signals directly output from the control circuit 200 are used. Gate drive signals for driving M2L to M4L are output from photocouplers 122L to 124L, and gate drive signals for driving M2H to M4H are output from photocouplers 122H to 124H. The control circuit 200 outputs gate signals (GLX, GHX), (GLY, GHY), (GLZ, GHZ) for each column circuit X, Y, Z. In this case, a gate signal is generated in a signal processing circuit such as a microcomputer in the control circuit 200. The gate signal GLX is input to the gate drive circuit 111X and the photocoupler 122L of the column circuit X, and the gate signal GHX is input to the gate drive circuit 111X and the photocoupler 122H. The gate signal GLY is input to the gate drive circuit 111Y and the photocoupler 123L of the column circuit Y, and the gate signal GHY is input to the gate drive circuit 111Y and the photocoupler 123H. The gate signal GLZ is input to the gate drive circuit 111Z and the photocoupler 124L of the column circuit Z, and the gate signal GHZ is input to the gate drive circuit 111Z and the photocoupler 124H.

  The power supply Vs1 is a power supply provided to drive the MOSFET and gate drive circuit based on the source terminals of M1LX, M1LY, and M1LZ. Power supplies Vs2, Vs3, and Vs4 are M2L, M3L, and M4L, respectively. This power supply is provided to drive the MOSFET, gate drive circuit, and photocoupler with the source terminal as a reference. The photocoupler is arranged to electrically insulate the gate signal from the gate drive signal. The reason why the photocouplers are not arranged in the circuits A1X to A1Z is that the reference voltage of the voltage terminal Vcom and the control circuit 200 is the same. Of course, the signal may be insulated using a photocoupler as in the circuits A2 to A4.

(Explanation of boosting operation)
Next, the operation of the power conversion circuit portion configured as described above will be described.
First, the case where the voltage V1 input between the voltage terminals VL and Vcom is set to the voltage V2 boosted about four times and output between the voltage terminals VH and Vcom will be described.
The circuit A1, which is the first circuit, is for driving to send the energy inputted between the voltage terminals VL-Vcom to the high voltage side by the on / off operation of the MOSFETs in the cell circuits A1X, A1Y, A1Z constituting the circuit A1. Operates as an inverter circuit. That is, each cell circuit A1X, A1Y, A1Z is used as a drive inverter circuit.
In the column circuit X, the cell circuit A1X operates as a driving inverter circuit that sends energy input between the voltage terminals VL and Vcom to the high voltage side by the on / off operation of the MOSFETs (M1LX, M1HX), and the circuit A2 It operates as a rectifier circuit that rectifies the current driven by the circuit A1X and transfers energy to the high voltage side. In the column circuit Y, the cell circuit A1Y operates as a driving inverter circuit that sends the energy input between the voltage terminals VL and Vcom to the high voltage side by the on / off operation of the MOSFETs (M1LY, M1HY), and the circuit A3 It operates as a rectifier circuit that rectifies the current driven by the circuit A1Y and transfers energy to the high voltage side. In the column circuit Z, the cell circuit A1Z operates as a drive inverter circuit that sends energy input between the voltage terminals VL and Vcom to the high voltage side by the on / off operation of the MOSFETs (M1LZ, M1HZ). It operates as a rectifier circuit that rectifies the current driven by A1Z and transfers energy to the high voltage side.

A gate signal (GLX, GHX), (GLY, GHY), (GLZ, GHZ) is output from the control circuit 200 for each column circuit X, Y, Z, and each column circuit X, Y, Z is output by these gate signals. Is driven.
The figure shows the gate signal (GHX, GLX) of the column circuit X, the current flowing through the low-voltage side MOSFETs (M1LX, M2L) in the driving inverter circuit A1X and the rectifier circuit A2, and the current flowing through the high-voltage side MOSFETs (M1HX, M2H) It is shown in 2. In the MOSFET in the driving inverter circuit A1X, a current flows from the drain to the source, and in the MOSFET in the rectifier circuit A2, a current flows from the source to the drain. The MOSFET is turned on when the gate signal is high.
As shown in FIG. 2, the gate signals (GLX, GHX) are on / off signals having a resonance period T determined by the LC serial bodies LC12, LC13, LC14 of Lr and Cr and a duty of about 50%. Note that the gate signals (GLY, GHY) and (GLZ, GHZ) of the column circuits Y and Z and the currents flowing through the MOSFETs in the column circuits Y and Z are the same as in FIG.

The capacitance values of the smoothing capacitors Cs1, Cs2, Cs3, and Cs4 are set to a sufficiently large value as compared with the capacitance values of the LC series capacitors Cr12, Cr13, and Cr14.
As described above, since the voltage V1 input between the voltage terminals VL and Vcom is changed to the voltage V2 boosted by about 4 times and output between the voltage terminals VH and Vcom, a load is applied between the voltage terminals VH and Vcom. Connected, the voltage V2 is lower than 4 × V1. In the steady state, the smoothing capacitor Cs1 is charged with the voltage V1, and the smoothing capacitors Cs2, Cs3, and Cs4 are charged with an average voltage of (V2−V1) / 3.

The operation of the column circuit X composed of the cell circuit A1X, the circuit A2 and the LC serial body LC12 will be described.
When the low voltage side MOSFETs M1LX and M2L of the cell circuit A1X and the circuit A2 are turned on by the gate signal GLX to the low voltage side MOSFET, there is a voltage difference, so that a part of energy stored in the smoothing capacitor Cs1 is
Cs1⇒M2L⇒Lr12⇒Cr12⇒M1LX
It moves to capacitor Cr12 in the path of.
Next, when the high voltage side MOSFETs M1HX and M2H of the cell circuit A1X and the circuit A2 are turned on by the gate signal GHX to the high voltage side MOSFET, the energy charged in the capacitor Cr12 is
Cr12⇒Lr12⇒M2H⇒Cs2⇒M1HX
It moves to the smoothing capacitor Cs2 in the path of.

Next, the operation of the column circuit Y composed of the cell circuit A1Y, the circuit A3, and the LC serial body LC13 will be described.
When the gate signals GLY to the low voltage side MOSFETs turn on the low voltage side MOSFETs M1LY and M3L of the cell circuit A1Y and the circuit A3, there is a voltage difference, so that part of the energy stored in the smoothing capacitors Cs1 and Cs2 ,
Cs1⇒Cs2⇒M3L⇒Lr13⇒Cr13⇒M1LY
It moves to capacitor Cr13 by the path of.
Next, when the M1HY and M3H, which are the high-voltage side MOSFETs of the cell circuit A1Y and the circuit A3, are turned on by the gate signal GHY to the high-voltage side MOSFET, there is a voltage difference.
Cr13⇒Lr13⇒M3H⇒Cs3⇒Cs2⇒M1HY
The process moves to the smoothing capacitors Cs2 and Cs3 through the path of.

Next, the operation of the column circuit Z composed of the cell circuit A1Z, the circuit A4, and the LC serial body LC14 will be described.
When M1LZ and M4L, which are the low-voltage side MOSFETs of the cell circuit A1Z and the circuit A4, are turned on by the gate signal GLZ to the low-voltage side MOSFET, there is a voltage difference, so that some of the stored in the smoothing capacitors Cs1, Cs2, and Cs3 Energy
Cs1⇒Cs2⇒Cs3⇒M4L⇒Lr14⇒Cr14⇒M1LZ
It moves to capacitor Cr14 by the path of.
Next, when the high voltage side MOSFETs M1HZ and M4H of the cell circuit A1Z and the circuit A4 are turned on by the gate signal GHZ to the high voltage side MOSFET, the energy charged in the capacitor Cr14 is
Cr14⇒Lr14⇒M4H⇒Cs4⇒Cs3⇒Cs2⇒M1HZ
The process proceeds to the smoothing capacitors Cs2, Cs3, and Cs4 along the path (1).

Thus, the column circuits X, Y, and Z operate, and energy is transferred from the smoothing capacitor Cs1 to the smoothing capacitors Cs2, Cs3, and Cs4 by charging and discharging of the capacitors Cr12, Cr13, and Cr14. Then, the voltage V1 input between the voltage terminals VL and Vcom is changed to a voltage V2 boosted about four times and output between the voltage terminals VH and Vcom. Also, inductors Lr12, Lr13, Lr14 are connected in series to each capacitor Cr12, Cr13, Cr14 to form an LC series body LC12, LC13, LC14, so the above energy transfer uses a resonance phenomenon, Since there is no transient loss when the MOSFET state changes on / off, a large amount of energy can be transferred efficiently.
In this embodiment, since MOSFETs are used for the rectifier circuits A2 to A4, the conduction loss can be reduced and the efficiency of power conversion can be improved as compared with a diode using a diode described later.

As described above, the column circuits X, Y, and Z operate. The operation of the entire DC / DC power conversion apparatus including the three column circuits X, Y, and Z will be described below.
FIG. 3 shows gate signals GHX, GHY, and GHZ for driving the high-voltage side MOSFETs in the column circuits X, Y, and Z. As shown in FIG. 2, the inverted signals of the gate signals GHX, GHY, and GHZ are GLX, GLY, and GLZ that drive the low-voltage side MOSFET.
As shown in FIG. 3, the drive signals for driving the column circuits X, Y, and Z are driven with a period of T and the phase of each column circuit being shifted by T / 3. As a result, the charging / discharging timing of the smoothing capacitors Cs1, Cs2, Cs3, and Cs4 is shifted, and the current flowing through the smoothing capacitors Cs1, Cs2, and Cs3 is dispersed and generated within one cycle, and the charging / discharging current is interchanged between the column circuits. Therefore, the alternating current (ripple current) flowing through the smoothing capacitors Cs1, Cs2, and Cs3 is reduced.

(Description of step-down operation)
Next, the operation when the voltage V2 input between the voltage terminals VH and Vcom is set to the voltage V1 that is stepped down by about 1/4 is output between the voltage terminals VL and Vcom.
In this case, the circuits A2, A3, and A4 in the column circuits X, Y, and Z operate as drive inverter circuits, and the circuit A1 rectifies the current driven by the drive inverter circuit and transfers energy to the low voltage side. It operates as a rectifier circuit that shifts to That is, each cell circuit A1X, A1Y, A1Z is used as a rectifier circuit.
In the column circuit X, the circuit A2 operates as a drive inverter circuit, and the cell circuit A1X operates as a rectifier circuit. In the column circuit Y, the circuit A3 operates as a drive inverter circuit, and the cell circuit A1Y operates as a rectifier circuit. In the column circuit Z, the circuit A4 operates as a drive inverter circuit, and the cell circuit A1Z operates as a rectifier circuit.

A gate signal (GLX, GHX), (GLY, GHY), (GLZ, GHZ) is output from the control circuit 200 for each column circuit X, Y, Z, and each column circuit X, Y, Z is output by these gate signals. Driven.
The figure shows the gate signal (GHX, GLX) of the column circuit X, the current flowing through the low voltage side MOSFETs (M2L, M1LX) and the current flowing through the high voltage side MOSFETs (M2H, M1HX) in the driving inverter circuit A2 and the rectifier circuit A1X. 4 shows. In the MOSFET in the drive inverter circuit A2, a current flows from the drain to the source, and in the MOSFET in the rectifier circuit A1X, a current flows from the source to the drain. The MOSFET is turned on when the gate signal is high.
As shown in FIG. 4, the gate signals (GLX, GHX) are on / off signals with a resonance period T determined by the LC serial bodies LC12, LC13, LC14 of Lr and Cr and a duty of about 50%. Note that the gate signals (GLY, GHY) and (GLZ, GHZ) of the column circuits Y and Z and the currents flowing through the MOSFETs in the column circuits Y and Z are the same as in FIG.

The capacitance values of the smoothing capacitors Cs1, Cs2, Cs3, and Cs4 are set to a sufficiently large value as compared with the capacitance values of the LC series capacitors Cr12, Cr13, and Cr14.
Since the voltage V2 input between the voltage terminals VH and Vcom is output to the voltage terminal VL-Vcom as a voltage V1 stepped down by about 1/4, a load is connected between the voltage terminals VL-Vcom, The voltage V2 is higher than 4 × V1. In the steady state, the smoothing capacitor Cs1 is charged with the voltage V1, and the smoothing capacitors Cs2, Cs3, and Cs4 are charged with an average voltage of (V2−V1) / 3.

The operation of the column circuit X composed of the cell circuit A1X, the circuit A2 and the LC serial body LC12 will be described.
When the high voltage side MOSFETs M1HX and M2H of the cell circuit A1X and the circuit A2 are turned on by the gate signal GHX to the high voltage side MOSFET, there is a voltage difference, so that a part of energy stored in the capacitor Cs2 is
Cs2⇒M2H⇒Lr12⇒Cr12⇒M1HX
It moves to capacitor Cr12 in the path of.
Next, when the low voltage side MOSFETs M1LX and M2L of the cell circuit A1X and the circuit A2 are turned on by the gate signal GLX to the low voltage side MOSFET, the energy charged in the smoothing capacitor Cr12 is
Cr12⇒Lr12⇒M2L⇒Cs1⇒M1LX
It moves to the smoothing capacitor Cs1 by the path of.

Next, the operation of the column circuit Y composed of the cell circuit A1Y, the circuit A3, and the LC serial body LC13 will be described.
When the high voltage side MOSFETs M1HY and M3H of the cell circuit A1Y and the circuit A3 are turned on by the gate signal GHY to the high voltage side MOSFET, there is a voltage difference, so that some energy stored in the smoothing capacitors Cs2 and Cs3 ,
Cs2⇒Cs3⇒M3H⇒Lr13⇒Cr13⇒M1HY
It moves to capacitor Cr13 by the path of.
Next, when the low voltage side MOSFETs M1LY and M3L of the cell circuit A1Y and the circuit A3 are turned on by the gate signal GLY to the low voltage side MOSFET, the energy charged in the capacitor Cr13 is
Cr13⇒Lr13⇒M3H⇒Cs2⇒Cs1⇒M1LY
The process moves to the smoothing capacitors Cs1 and Cs2 through the path.

Next, the operation of the column circuit Z composed of the cell circuit A1Z, the circuit A4, and the LC serial body LC14 will be described.
When the M1HZ and M4H, which are the high-voltage side MOSFETs of the cell circuit A1Z and the circuit A4, are turned on by the gate signal GHZ to the high-voltage side MOSFET, there is a voltage difference, so that some of the stored in the smoothing capacitors Cs2, Cs3, and Cs4 Energy
Cs2⇒Cs3⇒Cs4⇒M4H⇒Lr14⇒Cr14⇒M1HZ
It moves to capacitor Cr14 by the path of.
Next, when M1LZ and M4L, which are the low-voltage side MOSFETs of the cell circuit A1Z and the circuit A4, are turned on by the gate signal GLZ to the low-voltage side MOSFET, the energy charged in the capacitor Cr14 is
Cr14⇒Lr14⇒M4L⇒Cs3⇒Cs2⇒Cs1⇒M1LZ
To the smoothing capacitors Cs1, Cs2, and Cs3.

Thus, each column circuit X, Y, Z operates, and energy is transferred from the smoothing capacitors Cs2, Cs3, Cs4 to the smoothing capacitor Cs1 by charging and discharging of the capacitors Cr12, Cr13, Cr14. Then, the voltage V2 input between the voltage terminals VH and Vcom is converted to a voltage V1 that is stepped down by about 1/4 and output between the voltage terminals VL and Vcom. Also, inductors Lr12, Lr13, Lr14 are connected in series to each capacitor Cr12, Cr13, Cr14 to form an LC series body LC12, LC13, LC14, so the above energy transfer uses a resonance phenomenon, Since there is no transient loss when the MOSFET state changes on / off, a large amount of energy can be transferred efficiently.
Further, since MOSFETs are used for the cell circuits A1X, A1Y, and A1Z in the rectifier circuit A1, conduction loss can be reduced as compared with a diode that will be described later, and power conversion efficiency can be improved.

  As described above, each column circuit X, Y, Z operates, but the drive signal for driving each column circuit X, Y, Z matches the period as T, as in the step-up operation, Driving is performed by shifting the phase by T / 3 between the column circuits (see FIG. 3). As a result, similarly, the charging / discharging timing of the smoothing capacitors Cs1, Cs2, Cs3, Cs4 is shifted, and the current flowing through the smoothing capacitors Cs1, Cs2, Cs3 is dispersed and generated within one cycle, and the charging / discharging current is also generated in the column circuit. Therefore, the alternating current (ripple current) flowing through the smoothing capacitors Cs1, Cs2, and Cs3 is reduced.

  As described above, among the four-stage circuits A1, A2, A3, and A4, three cell circuits are used as the first circuit A1 that operates as a drive inverter circuit in the step-up operation and operates as a rectifier circuit in the step-down operation. By configuring A1X, A1Y, and A1Z in parallel, three column circuits X, Y, and Z were configured in the DC / DC power converter. Then, the column circuits X, Y, and Z were driven with the drive cycle matched and the phase shifted for each column circuit by 2π / 3 (rad). As a result, in both the step-up and step-down power conversion, the charging / discharging timing of the smoothing capacitors Cs1, Cs2, Cs3, Cs4 is shifted, and the current flowing through the smoothing capacitors Cs1, Cs2, Cs3 is dispersed and generated within one cycle. Since the charge / discharge current is interchanged between the column circuits, the ripple current flowing through the smoothing capacitors Cs1, Cs2, and Cs3 is reduced.

Such reduction of the ripple current of the smoothing capacitor has the following effects.
Heat generation of the smoothing capacitor is suppressed and reliability is improved. Further, the loss due to resistance is reduced by reducing the current, and the power conversion efficiency is improved. Further, the capacity required for the smoothing capacitor can be reduced, the size of the smoothing capacitor can be reduced, and the downsizing of the device configuration can be promoted.
Furthermore, a ceramic capacitor having a large dielectric loss but a small size can be adopted as the smoothing capacitor, and the size of the smoothing capacitor can be further reduced.

  In the above embodiment, the number of column circuits is three. However, in the DC / DC power conversion apparatus having the boost ratio n and having two or more n stages of circuits A1 to An, the inverter operates as a drive inverter circuit. The first circuit A1 may be configured by connecting (n−1) cell circuits in parallel, and (n−1) column circuits may be configured in the DC / DC power converter. In that case, the effect of reducing the ripple current of the smoothing capacitor is obtained by driving each column circuit with the same driving cycle and with a phase shift of 2π / (n−1) (rad) for each column circuit. It is done. Further, as the number of column circuits is increased, the current flowing through the smoothing capacitor is further dispersed within one cycle, so that the ripple current can be effectively reduced.

(Explanation of additional circuit part)
(Description of configuration)
Next, a description will be given of the additional circuit portion having the function of continuing the operation in the event of an abnormality with the failure detection circuit and the short circuit.
As shown in FIG. 1, the DC / DC power converter includes a failure detection circuit 131X for the MOSFETs (M1LX, M1HX) of the cell circuit A1X and a failure detection circuit 131Y for the MOSFETs (M1LY, M1HY) of the cell circuit A1Y. A failure detection circuit 131Z is provided for the MOSFETs (M1LZ, M1HZ) of the cell circuit A1Z. Also, the failure detection circuit 132 and the photocoupler 142 for the MOSFET (M2L, M2H) of the circuit A2, the failure detection circuit 133 and the photocoupler 143 for the MOSFET (M3L, M3H) of the circuit A3, and the MOSFET of the circuit A4 (M4L). , M4H) includes a failure detection circuit 134 and a photocoupler 144. Further, a logic circuit OR1 corresponding to the column circuit X, a logic circuit OR2 corresponding to the column circuit Y, and a logic circuit OR3 corresponding to the column circuit Z are provided.
Further, as a short circuit for short-circuiting between the voltage terminals of the smoothing capacitor, a short circuit 152 corresponding to the smoothing capacitor Cs2, a short circuit 153 corresponding to the smoothing capacitor Cs3, and a short circuit 154 corresponding to the smoothing capacitor Cs4 are provided.

Details of the connection will be described.
The failure detection circuits 131X, 131Y, and 131Z are connected to the power supply voltage Vs1 and the high voltage side terminal (VL) and the low voltage side terminal (Vcom) of the smoothing capacitor Cs1. The failure detection circuit 131X is connected to an intermediate terminal (VmX) serving as a connection point between M1LX and M1HX of the cell circuit A1X, and gate signals GLX and GHX output from the control circuit 200 are input. The failure detection circuit 131Y is connected to an intermediate terminal (VmY) serving as a connection point between M1LY and M1HY of the cell circuit A1Y, and gate signals GLY and GHY output from the control circuit 200 are input. The failure detection circuit 131Z is connected to an intermediate terminal (VmZ) serving as a connection point between M1LZ and M1HZ of the cell circuit A1Z, and gate signals GLZ and GHZ output from the control circuit 200 are input. The failure detection circuits 131X, 131Y, and 131Z output determination signals ASX, ASY, and ASZ.

  The failure detection circuit 132 has a power supply voltage Vs2, a high voltage side terminal (Vh2) and a low voltage side terminal (VL) of the smoothing capacitor Cs2, and an intermediate terminal (Vm2) that is a connection point between M2L and M2H of the circuit A2. The gate drive signals GLX * and GHX *, which are output signals of the photocouplers 122L and 122H, are connected. The signal output from the failure detection circuit 132 is output as the determination signal AS2 via the photocoupler 142. The photocoupler 142 is connected to the positive and negative voltage terminals of the power source Vs1, and converts the determination signal from the voltage reference signal at the low voltage side terminal of the smoothing capacitor Cs2 to the voltage reference signal AS2 at the voltage terminal Vcom.

Similarly, the failure detection circuit 133 includes a power supply voltage Vs3, a high voltage side terminal (Vh3) and a low voltage side terminal (Vh2) of the smoothing capacitor Cs3, and an intermediate terminal (a connection point between M3L and M3H of the circuit A3). Vm3) is connected, and gate drive signals GLY * and GHY * which are output signals of the photocouplers 123L and 123H are input. The signal output from the failure detection circuit 133 is output as the determination signal AS3 via the photocoupler 143. The photocoupler 143 is connected to the positive / negative voltage terminal of the power source Vs1, and converts the determination signal from the voltage reference signal at the low voltage side terminal of the smoothing capacitor Cs3 to the voltage reference signal AS3 at the voltage terminal Vcom.
The fault detection circuit 134 includes a power supply voltage Vs4, a high voltage side terminal (VH) and a low voltage side terminal (Vh3) of the smoothing capacitor Cs4, and an intermediate terminal (Vm4) that is a connection point between M4L and M4H of the circuit A4. Are connected, and gate drive signals GLZ * and GHZ * which are output signals of the photocouplers 124L and 124H are input. The signal output from the failure detection circuit 134 is output as the determination signal AS4 via the photocoupler 144. The photocoupler 144 is connected to the positive and negative voltage terminals of the power source Vs1, and converts the determination signal from the voltage reference signal at the low voltage side terminal of the smoothing capacitor Cs4 to the voltage reference signal AS4 at the voltage terminal Vcom.

  The determination signals ASX and AS2 are input to the logic circuit OR1, and the output signals are input to the control circuit 200. Similarly, the determination signals ASY and AS3 are input to the logic circuit OR2, and the output signals are input to the control circuit 200. The determination signals ASZ and AS4 are input to the logic circuit OR3, and the output signals are input to the control circuit 200. Output signals from these logic circuits OR1, OR2, and OR3 serve as failure detection signals for the column circuits X, Y, and Z.

  The short circuit 152 is connected to the power source Vs2 and the positive and negative voltage terminals of the smoothing capacitor Cs2, and receives the short circuit gate signal G2 output from the control circuit 200. The short circuit 153 is connected to the power source Vs3 and the positive and negative voltage terminals of the smoothing capacitor Cs3, and receives the short circuit gate signal G3 output from the control circuit 200. The short circuit 154 is connected to the power source Vs4 and the positive and negative voltage terminals of the smoothing capacitor Cs4, and receives the short circuit gate signal G4 output from the control circuit 200.

Here, details of the failure detection circuits 132 to 134 and 131X to 131Z will be described.
FIGS. 5A to 5C and FIGS. 6A to 6C show circuit configurations of the failure detection circuits 134 to 132 and 131X to 131Z. Each of the failure detection circuits 134 to 132 and 131X to 131Z has different input / output voltages and signals, but the circuit configuration is the same. Therefore, only the configuration of the failure detection circuit 134 shown in FIG. The failure detection circuit 134 performs failure detection for the MOSFET series body (M4L, M4H) of the circuit A4.
The high voltage side terminal VH of the smoothing capacitor Cs4 is divided by a resistor and connected to the positive terminal of the differential amplifier circuit OP14, and the intermediate terminal Vm4 of the MOSFET series body is divided by a resistor and connected to the negative terminal of OP14 Is done. The output of the differential amplifier circuit OP14 is connected to the plus terminal of the comparison circuit CP14, and the reference voltage formed from the voltage of the power source Vs4 is connected to the minus terminal of CP14. The output of the comparison circuit CP14 is input to one of the logic circuits AND14, and the gate drive signal GHZ * is input to the other of the AND14.

The intermediate terminal Vm4 of the MOSFET series body is divided by a resistor and connected to the plus terminal of the comparison circuit CP24, and the reference voltage is connected to the minus terminal of CP24. The output of the comparison circuit CP24 is input to one of the logic circuits AND24, and the gate drive signal GLZ * is input to the other of the AND24. The outputs of the logic circuits AND14 and AND24 are input to the logic circuit OR14, and the output terminal of the OR14 is connected to the input of the photocoupler 144.
In the figure, the power supply for driving each circuit, the input / output of the differential amplifier circuit, the feedback resistance, and the like are omitted.

Next, details of the short circuits 152 to 154 will be described. 7A to 7C show circuit configurations of the short circuits 154 to 152. FIG. Although the short-circuit circuits 154 to 152 have different input / output voltages and signals but have the same circuit configuration, only the configuration of the short-circuit circuit 154 shown in FIG. 7A will be described here.
The short circuit 154 connects a parallel circuit of a series body of M4B, which is a MOSFET serving as a first switch element, and a resistor RM4, and M4A, which is a MOSFET serving as a second switch element, between terminals of the smoothing capacitor Cs4. . To explain the connection details, the source terminal of M4B, one terminal of capacitor CG4, the power supply terminal of gate drive circuit DR4, and the power supply terminal of photocoupler FC4 are connected to the low voltage side terminal of smoothing capacitor Cs4. The The drain terminal of M4A is connected directly to the high voltage side terminal of the smoothing capacitor Cs4 via the resistor RM4. The gate terminal of M4A is connected to the other terminal of capacitor CG4 and one terminal of resistor RG4, and the other terminal of resistor RG4 and the gate terminal of M4B are connected to the output terminal of gate drive circuit DR4. The input terminal of the gate drive circuit DR4 and the output terminal of the photocoupler FC4 are connected, and the short-circuit gate signal G4 is input to the input terminal of the photocoupler FC4. The voltage from the power supply Vs4 is input to the gate drive circuit DR4 and the photocoupler FC4.

(Description of operation)
Next, the operation of the additional circuit portion that includes the failure detection circuit and the short circuit and continues the operation in the event of an abnormality will be described. Here, the operation will be described by taking as an example the column circuit Z constituted by the cell circuit A1Z, the circuit A4, and the LC serial body LC14.
The failure detection circuit 131Z detects the voltage between the drain and source during the ON operation with reference to the source terminal of each MOSFET (M1LZ, M1HZ) in the cell circuit A1Z, and determines that a failure occurs if the set reference voltage is exceeded. The high voltage is output to the logic circuit OR3. In addition, the failure detection circuit 134 detects the drain-source voltage during the ON operation with reference to the source terminal of each MOSFET (M4L, M4H) in the circuit A4, and determines that a failure occurs if the set reference voltage is exceeded. The high voltage is output to the logic circuit OR3.

For example, when M1HZ in the cell circuit A1Z is short-circuited and failed, or when M1LZ is open and failed, or when the capacitor Cr14 is short-circuited, the voltage between the drain and source of M1LZ is turned on during boost operation. Overcurrent flows in the case of a short-circuit fault during the operation period, and in the case of an open fault, the drain voltage of M1LZ is not fixed, so it rises greatly. When the drain-source voltage of M1LZ increases and becomes larger than the set reference voltage, the output of the comparison circuit CP2Z becomes a high voltage and is input to the logic circuit AND2Z. Since the gate signal GLZ is input to the AND2Z, the output of the AND2Z becomes the high voltage when the gate signal GLZ is at the high voltage, that is, when the M1LZ is in the ON operation. When the output of AND2Z becomes a high voltage, the output of the logic circuit OR1Z and the failure detection signal output from the logic circuit OR3 also become a high voltage. This failure detection signal is input to the control circuit 200, and the control circuit 200 recognizes that a failure has occurred somewhere in the column circuit Z.
When the gate signal GLZ is a low voltage and M1LZ is turned off, a signal is output via the AND2Z circuit, and therefore no failure is detected. When M1LZ is in an off operation in a normal operation, the drain-source voltage exceeds the reference voltage value, thereby preventing a malfunction.

As described above, when M1HZ is short-circuited, the overcurrent that flows when M1LZ, which is the other MOSFET in cell circuit A1Z, is turned on is detected by the magnitude of the drain-source voltage of M1LZ, and the failure is detected. . When the capacitor Cr14 is short-circuited, the overcurrent that flows when the M1LZ is turned on is detected by the voltage generated in the M1LZ, and the failure is detected. In the case of a short-circuit fault of this capacitor, since an overcurrent flows through M1HZ even when M1HZ is turned on, it can also be detected by the voltage of M1HZ. Further, when the M1LZ has an open failure, the M1LZ voltage is not lowered when the M1LZ should be turned on, that is, it is not turned on, and a failure is detected. In addition, by detecting the voltage between the drain and source of M1HZ and M4L and M4H in the circuit A4, it is possible to detect a failure of the column circuit Z during the step-up operation and the step-down operation.
Further, as with the column circuit Z, a failure can also be detected for the column circuits Y and X.

As described above, when a failure is detected by the failure detection circuits 131X to 131Z and 132 to 134, the failure detection signal input to the control circuit 200 corresponding to each column circuit becomes a high voltage, and any column circuit has a failure. The control circuit 200 recognizes whether it has occurred. After this failure detection operation, all gate signals for operating the MOSFETs of the failed column circuit from the control circuit 200 are set to the low voltage, and the MOSFETs are turned off.
After the failed column circuit MOSFET is turned off, the control circuit 200 normally turns on the short-circuit MOSFET corresponding to the second circuits (A2 to A4) in the failed column circuit. The short circuit gate signal is set to a high voltage. For example, when the column circuit Z fails, the short circuit gate signal G4 to the short circuit 154 corresponding to the circuit A4 changes from the low voltage to the high voltage, and the MOSFETs (M4B and M4A) in the short circuit 154 are turned on. At this time, due to the short-circuit gate signal G4, M4B is turned on first, and M4A is turned on later than M4B because the gate terminal has the resistor RG4 and the capacitor CG4. First, when M4B is turned on, the energy of the smoothing capacitor Cs4 is discharged through the resistor RM4 while suppressing the current, and then M4A is turned on to short-circuit between the terminals of the smoothing capacitor Cs4.

  When the above operation is completed in a short time, the gate circuit in which the high voltage and the low voltage are repeated is input from the control circuit 200 to the non-failed column circuit, for example, the column circuits X and Y, and the operation is continued and the failure occurs. The column circuit Z stops operating and is bypassed. Then, the occurrence of a fault and the number of fault train circuits are transmitted from the control circuit 200 to an external system controller using an ARM signal. If one column circuit fails, the input / output voltage ratio decreases from 4 to 3. In addition, since the operation of one column circuit is stopped, the DC / DC power conversion device is included according to an instruction from an external controller so that the output power becomes smaller than before the failure according to the number of column circuits to be stopped. Adjust the maximum output power in the system.

  In the steady state, as described above, the column circuits X, Y, and Z are driven with the drive cycles matched and the phase shifted for each column circuit by 2π / 3 (rad). The phase between the gate signals is changed so that the remaining two column circuits X and Y are driven with the phase shifted by π (rad) without changing the driving cycle. If the phase between the gate signals is operated in the same state as before the failure, even if the system adjusts the output power, the ripple current of the smoothing capacitor becomes larger than before the failure. Therefore, in order to suppress and minimize the ripple current, each column circuit is driven with a phase shift of 2π / n (rad) according to the number n of column circuits to be operated.

  As described above, in this embodiment, among the four-stage circuits A1, A2, A3, and A4, the first circuit A1 is configured by connecting the three cell circuits A1X, A1Y, and A1Z in parallel. Three column circuits X, Y, and Z were configured in the DC / DC power converter. Then, the failure detection circuits 132 to 134 and 131X to 131Z detect a failure for each of the column circuits X, Y, and Z, stop the failed column circuit, and the second circuit (A2 in the failed column circuit) To A4), that is, the positive and negative terminals of the smoothing capacitors Cs2, Cs3, and Cs4 are short-circuited by the short circuits 152 to 154. For this reason, it becomes possible to operate except for the faulty column circuit, and even if some circuit elements constituting the DC / DC power conversion device fail, the DC / DC power conversion operation can be continued and the reliability is improved. Will improve.

In a steady state, the column circuits X, Y, and Z were driven with the drive cycle matched and the phase shifted for each column circuit by 2π / 3 (rad). As a result, the charging / discharging timing of the smoothing capacitors Cs1, Cs2, Cs3, and Cs4 is shifted, and the current flowing through the smoothing capacitors Cs1, Cs2, and Cs3 is dispersed and generated within one cycle, and the charging / discharging current is interchanged between the column circuits. Therefore, the alternating current (ripple current) flowing through the smoothing capacitors Cs1, Cs2, and Cs3 is reduced. Thus, by driving the m column circuits so that the drive cycles are the same and the phase between the column circuits is shifted by 2π / m (rad), the ripple current flowing through the smoothing capacitor can be effectively reduced, Heat generation can be suppressed, power conversion efficiency lowering and capacitor deterioration can be prevented, and the device configuration can be downsized.
When the failure detection circuit detects a failure in k column circuits among the m column circuits, the k column circuits are stopped and the gates driving the remaining (m−k) column circuits are stopped. By changing the signal so that the phase is shifted by 2π / (m−k) for each column circuit, the ripple current flowing in the smoothing capacitor can be effectively reduced even when the signal is operated excluding the failed column circuit.

  Driving the m column circuits with a phase shift of 2π / m (rad) between the column circuits is most effective in reducing the ripple current flowing in the smoothing capacitor, but the phase difference is Not only this but the effect of reducing the ripple current which flows into a smoothing capacitor is acquired by shifting a phase between each column circuit.

  In addition, in order to operate with a reduced maximum output power according to the number of column circuits stopped due to failure detection, the operation is continued so as not to exceed the maximum rating of the circuit elements constituting the DC / DC power converter. Therefore, the deterioration of the element is prevented and the reliability is improved.

  Further, each cell circuit A1X, A1Y, A1Z in the column circuits X, Y, and Z, and the voltage between the terminals of the high-voltage side MOSFET and the low-voltage side MOSFET constituting the second circuits A2 to A4 are detected, so that each column Since fault detection is performed for each circuit, fault detection can be performed easily and reliably.

  The short circuits 152 to 154 for short-circuiting the positive and negative terminals of the smoothing capacitors Cs2, Cs3, Cs4 are a first switch element (MOSFET) and a parallel circuit of a series body of resistors RM and a second switch element (MOSFET). Is connected between the positive and negative terminals of the smoothing capacitors Cs2, Cs3, Cs4, the first switch element is turned on to discharge the smoothing capacitors Cs2, Cs3, Cs4 through the resistor RM, and then the second The switch element is turned on to short-circuit between the positive and negative terminals of the smoothing capacitors Cs2, Cs3, and Cs4. For this reason, the peak value of the current that flows during the discharge of the smoothing capacitors Cs2, Cs3, and Cs4 can be suppressed, the heat generation of the elements in the short circuits 152 to 154 can be suppressed, the deterioration of the elements can be prevented, and the reliability can be improved.

In the DC / DC power conversion device of this embodiment, bidirectional power conversion between the voltage V1 to V2 step-up operation and the voltage V2 to V1 step-down operation is possible, but the voltage V1 to V2 step-up operation is possible. The operation may be limited to only one-way power conversion of the voltage V2 to V1 step-down operation.
When the DC / DC power converter is used only for boosting operation, the MOSFETs in the circuits A2 to A4 that operate as rectifier circuits in the DC / DC power converter may be replaced with diodes. In that case, the loss at the time of current conduction is larger than that constituted by the MOSFET, but the gate drive circuits 112 to 114 and the photocouplers 122L to 124L and 122H to 124H provided for driving the rectifier circuit, the power source Vs2 There is an advantage that ~ Vs4 is unnecessary and the device configuration is simplified.
When the DC / DC power conversion device is used only for the step-down operation, the MOSFETs of the cell circuits A1X to A1Z that operate as rectifier circuits in the DC / DC power conversion device may be replaced with diodes. In that case, the loss at the time of current conduction becomes larger than that constituted by the MOSFET, but there is an advantage that the gate drive circuits 111X to 111Z provided for driving the rectifier circuit become unnecessary and the device configuration is simplified. .

  Further, even if the LC series bodies LC12, LC13, and LC14 in the DC / DC power converter are replaced with only the capacitors Cr12, Cr13, and Cr14 and the LC resonance is not used, the power conversion efficiency is deteriorated. Thus, by adding a failure detection circuit and a short circuit, the operation can be continued even if a failure occurs in part.

In addition, when all the column circuits X, Y, and Z in the DC / DC power converter have failed, the positive and negative terminals of the three smoothing capacitors Cs2, Cs3, and Cs4 are short-circuited, and the voltage between the voltage terminals VH and Vcom V2 is equal to the voltage V1 between the voltage terminals VL and Vcom at the voltage of the smoothing capacitor Cs1. In this case, the input / output voltage ratio is 1, but it is possible to continue operation without stopping the entire apparatus.
Further, a plurality of stages of circuits constituting the DC / DC power conversion apparatus may be composed of two stages A1 and A2, and only the column circuit X may be configured. In that case, between the positive and negative terminals of the smoothing capacitor Cs2 due to failure detection. Short-circuited, the voltage V2 between the voltage terminals VH and Vcom becomes equal to the voltage V1 between the voltage terminals VL and Vcom.

  Further, in this embodiment, when a column circuit fails, the control circuit 200 is operated except for the failed column circuit. Except for this, it is also possible to operate the DC / DC power converter. Also in this case, the column circuit not used for the operation is stopped, and the short circuits 152 to 154 are connected between the terminals of the second circuits (A2 to A4) in the column circuit, that is, between the positive and negative terminals of the smoothing capacitors Cs2, Cs3, and Cs4. Short-circuit with

Embodiment 2. FIG.
An example of a system using the DC / DC power converter according to the first embodiment will be described. FIG. 8 is a diagram showing a schematic configuration of an electric drive system of a hybrid vehicle using the DC / DC power converter according to the present invention.
The battery 300 is connected between the low voltage side terminals VL and Vcom of the DC / DC power converter 100, and the DC voltage terminal (DC side voltage terminal) of the inverter 400 is connected between the high voltage side terminals VH and Vcom. . A motor 500 is connected to an AC voltage terminal (AC side voltage terminal) of the inverter 400, and the motor 500 is connected to a wheel shaft (not shown) of the automobile and a rotation shaft of the engine 600. The ARM signal from the DC / DC power converter 100 is input to the inverter.

  In this electric drive system, DC power from the battery 300 is boosted by the DC / DC power converter 100 and transmitted to the DC voltage terminal of the inverter 400, and the DC power is converted into three-phase AC power by the inverter 400. Tell the motor 500 to rotate the wheel shaft. Further, the rotational energy from the wheel shaft rotated by the engine 600 is converted into three-phase AC power by the motor 500, and this is converted into DC power by adjusting the power and voltage by the inverter 400. The DC / DC power converter 100 steps down the voltage and shifts to the battery 300.

  As shown in the first embodiment, when a failure occurs in the DC / DC power conversion device 100, the DC / DC power conversion device 100 continues to operate except for the failed portion, and the ARM signal causes the failure. The state is transmitted to the inverter 400, and the inverter 400 drives the motor 500 while suppressing power, or outputs the power from the motor 500 to the DC / DC power converter 100 while suppressing voltage and power. Thus, even if a failure occurs in the DC / DC power conversion apparatus 100, it is possible to suppress the output and continue the operation without stopping the electric drive system of the hybrid vehicle. Since the electric drive system is continuously operated, only driving of the engine 600 can be avoided and deterioration of fuel consumption can be suppressed. Further, since the battery 300 can be continuously charged, it is possible to avoid other problems such as stoppage of electric devices in the automobile due to a decrease in battery voltage.

Embodiment 3 FIG.
Next, a DC / DC power converter according to Embodiment 3 of the present invention will be described.
FIG. 9 shows a circuit configuration of a DC / DC power converter according to Embodiment 3 of the present invention. This DC / DC power conversion device has a power conversion circuit portion having a function of converting power from direct current to direct current, and an additional circuit portion having a function of continuing a failure operation by providing a failure detection circuit and a short circuit.

(Description of power conversion circuit part)
(Description of configuration)
First, the power conversion circuit portion having the function of converting power from direct current to direct current will be described.
As shown in FIG. 9, the DC / DC power converter includes a plurality of stages (in this case) including a circuit A1 as a first circuit and a plurality of (in this case, three) circuits A2 to A4 as second circuits. 4 stages) of circuits A1 to A4. Drive power supply Vs1, Vs2, Vs3, Vs4, smoothing capacitors Cs1, Cs2, Cs3, Cs4 that smooth the input / output voltage and function as a voltage source for energy transfer, control circuit 200, and input / output voltage terminals Equipped with Vcom, VL, VH. Then, the voltage V1 inputted between the voltage terminals VL and Vcom is changed to a voltage V2 boosted by about four times and outputted between the voltage terminals VH and Vcom, or the voltage V2 inputted between the voltage terminals VH and Vcom. Is output to the voltage V1 between the voltage terminals VL and Vcom.

A different part from the said Embodiment 1 is demonstrated.
The circuit A1 is configured by connecting a circuit in which two MOSFETs (M1L, M1H) as a low voltage side element and a high voltage side element are connected in series between both terminals of the smoothing capacitor Cs1. Circuits A2 to A4 are the same as those in the first embodiment. Then, the connection point of the two MOSFETs in the circuit A1 and the circuits A2, A3, A4 is used as an intermediate terminal, and between the intermediate terminal between the circuit A1 and the circuit A2, the LC series body LC12 and the cutoff MOSFET ( Connect the series body of M12). Similarly, an LC series body LC13 and a series circuit of a cutoff MOSFET (M13) as a cutoff switch are connected between the intermediate terminals of the circuit A1 and the circuit A3, and an LC series body is connected between the intermediate terminals of the circuits A1 and A4. Connect a series of LC14 and shutoff MOSFET (M14) as shutoff switch. As in the first embodiment, each LC series body is a series body of an inductor Lr and an energy transfer capacitor Cr, and the value of the resonance period determined from the inductance value and the capacitance value of the inductor Lr and capacitor Cr of each stage is Are set to be equal to each other.

  A gate drive circuit 111 for driving the MOSFET in the circuit A1 is also provided. Circuits A2 to A4 are the same as those in the first embodiment. Further, gate drive circuits 111A, 111B, and 111C for driving the cutoff MOSFETs M12, M13, and M14 are provided. Here again, each MOSFET and the cutoff MOSFET are power MOSFETs in which a parasitic diode is formed between the source and drain.

Next, details of connection in this power conversion circuit portion will be described. Here, the parts different from the first embodiment will be described.
The source terminal of M1L is connected to the voltage terminal Vcom, the drain terminal is connected to the source terminal of M1H, and the drain terminal of M1H is connected to the voltage terminal VL. One end of the LC series body LC12 is connected to the connection point between M2L and M2H, and the other end is connected to the drain terminal of M12. One end of the LC series LC13 is connected to the connection point between M3L and M3H, and the other end is connected to the drain terminal of M13. One end of the LC series LC14 is connected to a connection point between M4L and M4H, and the other end is connected to the drain terminal of M14. The source terminals of M12, M13, and M14 are connected to the connection point between M1L and M1H.

  The gate terminals of M1L and M1H are connected to the output terminal of the gate drive circuit 111, and the gate terminals of M12, M13, and M14 are connected to the output terminals of the gate drive circuits 111A, 111B, and 111C. Respective gate drive signals based on the voltage at the voltage terminal Vcom are input to the input terminals of the gate drive circuits 111 and 111A to 111C. The gate drive circuits 111 and 111A to 111C are general bootstrap drive circuits, and are configured with a driver IC for driving a half-bridge inverter circuit, a capacitor for driving a MOSFET on the high voltage side, and the like. Yes. Other parts are the same as those in the first embodiment.

  The control circuit 200 outputs gate signals (GL, GH) for driving the MOSFETs in the circuits A1 to A4 and cutoff gate signals G12, G13, G14 for driving the cutoff MOSFET. In this case, a gate signal is generated in a signal processing circuit such as a microcomputer in the control circuit 200. The gate signal GL is input to the gate drive circuit 111 and the photocouplers 122L, 123L, and 124L, and the gate signal GH is input to the gate drive circuit 111 and the photocouplers 122H, 123H, and 124H. Further, the gate drive circuits 111A, 111B, and 111C are input with the gate signals for cutoff G12, G13, and G14.

  The power source Vs1 is a power source provided for driving the M1H, M1L, M12, M13, and M14 and the gate driving circuits 111 and 111A to 111C with reference to the source terminal of the MOSFET M1L. The power supplies Vs2, Vs3, and Vs4 are as described in the first embodiment.

(Explanation of boosting operation)
Next, the operation of the power conversion circuit portion configured as described above will be described.
First, the case where the voltage V1 input between the voltage terminals VL and Vcom is set to the voltage V2 boosted about four times and output between the voltage terminals VH and Vcom will be described.
The circuit A1, which is the first circuit, operates as a drive inverter circuit that sends energy input between the voltage terminals VL and Vcom to the high voltage side by the on / off operation of the MOSFET in the circuit A1. At this time, M12, M13, and M14 are always on. The circuits A2 to A4 operate as a rectifier circuit that rectifies the current driven by the circuit A1 and transfers energy to the high voltage side.

  Gate signals (GL, GH) are output from the control circuit 200, and the MOSFETs in the circuits A1 to A4 are driven by these gate signals. The direction and shape of the current flowing through each MOSFET is the same as that of the first embodiment shown in FIG. 2, but the magnitude of the current flowing through the MOSFET (M1L, M1H) is (M2L, M2H) to ( M4L, M4H) is three times as large as the current flowing through. Similarly to the first embodiment, the gate signals (GL, GH) are on / off signals having a resonance period T determined by the LC serial bodies LC12, LC13, LC14 of Lr and Cr and a duty of about 50%.

The capacitance values of the smoothing capacitors Cs1, Cs2, Cs3, and Cs4 are set to a sufficiently large value as compared with the capacitance values of the LC series capacitors Cr12, Cr13, and Cr14.
As described above, since the voltage V1 input between the voltage terminals VL and Vcom is changed to the voltage V2 boosted by about 4 times and output between the voltage terminals VH and Vcom, a load is applied between the voltage terminals VH and Vcom. Connected, the voltage V2 is lower than 4 × V1. In the steady state, the smoothing capacitor Cs1 is charged with the voltage V1, and the smoothing capacitors Cs2, Cs3, and Cs4 are charged with an average voltage of (V2−V1) / 3.
The flow of energy inside the circuit during operation is the same as that in Embodiment 1 in which M1LX to M1LZ are replaced with M1L and M1HX to M1HZ are replaced with M1H.

As in the first embodiment, energy is transferred from the smoothing capacitor Cs1 to the smoothing capacitors Cs2, Cs3, and Cs4 by charging and discharging the capacitors Cr12, Cr13, and Cr14. Then, the voltage V1 input between the voltage terminals VL and Vcom is changed to a voltage V2 boosted about four times and output between the voltage terminals VH and Vcom. Also, inductors Lr12, Lr13, Lr14 are connected in series to each capacitor Cr12, Cr13, Cr14 to form an LC series body LC12, LC13, LC14, so the above energy transfer uses a resonance phenomenon, Since there is no transient loss when the MOSFET state changes on / off, a large amount of energy can be transferred efficiently.
In this embodiment, since MOSFETs are used for the rectifier circuits A2 to A4, the conduction loss can be reduced and the efficiency of power conversion can be improved as compared with a diode using a diode described later.

(Description of step-down operation)
Next, the operation when the voltage V2 input between the voltage terminals VH and Vcom is set to the voltage V1 that is stepped down by about 1/4 is output between the voltage terminals VL and Vcom.
In this case, the circuits A2, A3, and A4 operate as driving inverter circuits, and the circuit A1 operates as a rectifying circuit that rectifies the current driven by the driving inverter circuit and shifts energy to the low voltage side. At this time, M12, M13, and M14 are always on.
Gate signals (GL, GH) are output from the control circuit 200, and the MOSFETs in the circuits A1 to A4 are driven by these gate signals. The direction and shape of the current flowing through each MOSFET is the same as that of the first embodiment shown in FIG. 4, but the magnitude of the current flowing through the MOSFET (M1L, M1H) is (M2L, M2H) to ( M4L, M4H) is three times as large as the current flowing through. Similarly, the gate signals (GL, GH) are on / off signals having a resonance period T determined by the LC serial bodies LC12, LC13, LC14 of Lr and Cr and a duty of about 50%.

The capacitance values of the smoothing capacitors Cs1, Cs2, Cs3, and Cs4 are set to a sufficiently large value as compared with the capacitance values of the LC series capacitors Cr12, Cr13, and Cr14.
Since the voltage V2 input between the voltage terminals VH and Vcom is output to the voltage terminal VL-Vcom as a voltage V1 stepped down by about 1/4, a load is connected between the voltage terminals VL-Vcom, The voltage V2 is higher than 4 × V1. In the steady state, the smoothing capacitor Cs1 is charged with the voltage V1, and the smoothing capacitors Cs2, Cs3, and Cs4 are charged with an average voltage of (V2−V1) / 3.
The flow of energy inside the circuit during operation is the same as that in Embodiment 1 in which M1LX to M1LZ are replaced with M1L and M1HX to M1HZ are replaced with M1H.

As described above, energy is transferred from the smoothing capacitors Cs2, Cs3, and Cs4 to the smoothing capacitor Cs1 by charging and discharging the capacitors Cr12, Cr13, and Cr14. Then, the voltage V2 input between the voltage terminals VH and Vcom is converted to a voltage V1 that is stepped down by about 1/4 and output between the voltage terminals VL and Vcom. Also, inductors Lr12, Lr13, Lr14 are connected in series to each capacitor Cr12, Cr13, Cr14 to form an LC series body LC12, LC13, LC14, so the above energy transfer uses a resonance phenomenon, Since there is no transient loss when the MOSFET state changes on / off, a large amount of energy can be transferred efficiently.
In addition, since the MOSFET is used in the rectifier circuit A1, the conduction loss can be reduced as compared with a diode that will be described later, and the efficiency of power conversion can be improved.

  In the third embodiment, unlike the first embodiment, during the step-up or step-down operation, the rectifier circuits A2, A3, A4 are not operated with the phases shifted, but the smoothing capacitors Cs1, Cs2, Cs3 It does not reduce the ripple current flowing through the.

(Explanation of additional circuit part)
(Description of configuration)
Next, a description will be given of the additional circuit portion having the function of continuing the operation in the event of an abnormality with the failure detection circuit and the short circuit.
As shown in FIG. 9, the DC / DC power converter detects a failure with respect to the MOSFET (M3L, M3H) of the failure detection circuit 132A and the photocoupler 142 with respect to the MOSFET (M2L, M2H) of the circuit A2. A failure detection circuit 134A and a photocoupler 144 are provided for the circuit 133A, the photocoupler 143, and the MOSFETs (M4L, M4H) of the circuit A4.
Further, as a short circuit for short-circuiting between the voltage terminals of the smoothing capacitor, a short circuit 152 corresponding to the smoothing capacitor Cs2, a short circuit 153 corresponding to the smoothing capacitor Cs3, and a short circuit 154 corresponding to the smoothing capacitor Cs4 are provided.

Details of the connection will be described.
For the connection of the failure detection circuits 132A to 134A and the photocouplers 142 to 144 with the control circuit 200 and the power conversion circuit portion, the failure detection circuits 132, 133, and 134 are replaced with 132A, 133A, and 134A in the first embodiment. It is the same as that. In this embodiment, determination signals AS2, AS3, and AS4 output from the failure detection circuits 132A to 134A via the photocouplers 142 to 144 are directly transmitted to the control circuit 200 as failure detection signals for the circuits A2, A3, and A4. Entered.
Connection between the short-circuit circuits 152 to 154 and the control circuit 200 and the power conversion circuit portion is the same as in the first embodiment.

Here, details of the failure detection circuits 132A to 134A will be described. The short circuits 152 to 154 are the same as those shown in FIG.
10A to 10C show circuit configurations of the failure detection circuits 134A to 132A. Although each of the failure detection circuits 132A to 134A is different in input / output voltage and signal but has the same circuit configuration, only the configuration of the failure detection circuit 134A shown in FIG. 10A will be described here. The failure detection circuit 134A performs failure detection for the MOSFET series body (M4L, M4H) of the circuit A4.
The high voltage side terminal VH of the smoothing capacitor Cs4 is divided by a resistor and connected to the positive terminal of the differential amplifier circuit OP14 and the negative terminal of the differential amplifier circuit OP24, and the intermediate terminal Vm4 of the MOSFET series body is divided by the resistor. Thus, the negative terminal of OP14, the positive terminal of OP24, and the negative terminal of the differential amplifier circuit OP34 are connected. The high voltage Vh3 of the smoothing capacitor Cs3 is connected to the positive terminal of OP34.

The output of the differential amplifier circuit OP14 is connected to the plus terminal of the comparison circuit CP14, and the reference voltage formed from the voltage of the power source Vs4 is connected to the minus terminal of CP14. The output of the comparison circuit CP14 is input to one of the logic circuits AND14, and the gate signal GHZ * via the photocoupler 124H is input to the other of the AND14.
The intermediate terminal Vm4 of the MOSFET series body is divided by a resistor and connected to the plus terminal of the comparison circuit CP24, and the reference voltage is connected to the minus terminal of CP24. The output of the comparison circuit CP24 is input to one of the logic circuits AND24, and the gate signal GLZ * via the photocoupler 124L is input to the other of the AND24. The outputs of the logic circuits AND14 and AND24 are input to the logic circuit OR14, and the output of the OR14 is input to the logic circuit OR34.

The output of the differential amplifier circuit OP24 is connected to the plus terminal of the comparison circuit CP34, and the reference voltage is connected to the minus terminal of the CP34. The output of the comparison circuit CP34 is input to one of the logic circuits AND34, and the gate signal GHZ * via the photocoupler 124H is input to the other of the AND14.
The output of the differential amplifier circuit OP34 is connected to the plus terminal of the comparison circuit CP44, and the reference voltage is connected to the minus terminal of the CP44. The output of the comparison circuit CP44 is input to one of the logic circuits AND44, and the gate signal GLZ * via the photocoupler 124L is input to the other of the AND44. The outputs of the logic circuits AND34 and AND44 are input to the logic circuit OR24 and input to the output logic circuit OR34 which is the output of OR24.
The output of the logic circuit OR34 is input to the control circuit 200 via the photocoupler 144 as a determination signal (failure detection signal) AS4.
Also in this figure, the power source for driving each circuit, the input / output of the differential amplifier circuit, the feedback resistance, and the like are omitted.

(Description of operation)
Next, the operation of the additional circuit portion that includes the failure detection circuit and the short circuit and continues the operation in the event of an abnormality will be described. Here, the operation will be described using the circuit A4 as an example.
The failure detection circuit 134A detects overcurrent with respect to the current flowing from the drain to the source of each MOSFET (M4L, M4H) in the circuit A4 by the differential amplifier circuit OP14, the comparison circuits CP14, CP24, the logic circuits AND14, AND24, OR14. The overcurrent corresponding to the current flowing from the source to the drain of each MOSFET (M4L, M4H) is detected by the differential amplifier circuits OP24, OP34, the comparison circuits CP34, CP44, the logic circuits AND34, AND44, and OR24.

For example, if the current from the drain to the source of M4H increases due to a short-circuit fault in M4L or capacitor Cr14 in circuit A4, or if M4H itself fails in an open state, the drain voltage with respect to the source of M4H increases. When the voltage becomes higher than the set reference voltage, the output of the comparison circuit CP14 becomes a high voltage. When the gate signal GHZ * via the photocoupler 124H is at a high voltage, that is, when M4H is ON, the high voltage signal from the comparison circuit CP14 passes through the logic circuits AND14, OR14, OR34, and passes through the photocoupler 144. The determination signal AS4 serving as a failure detection signal is input to the control circuit 200.
In addition, when the capacitor Cr14 is short-circuited, the current from the source to the drain of the M4L increases during the boosting operation. At that time, the source voltage with respect to the drain of M4L becomes larger, and when that voltage becomes larger than the set reference voltage, the output of the comparison circuit CP44 becomes a high voltage and becomes a failure detection signal as described above. The determination signal AS4 is input to the control circuit 200, and a failure can be detected.

As described above, when a failure is detected by the failure detection circuits 132A to 134A, the failure detection signals corresponding to the respective circuits A2 to A4 become a high voltage. This failure detection signal is input to the control circuit 200, and the control circuit 200 recognizes which circuit A2 to A4 has failed.
Then, the cutoff MOSFETs connected to the intermediate terminals of the failed circuits A2 to A4 among M12 to M14 are turned off by the cutoff gate signals G12 to G14 from the control circuit 200. Thereafter, in order to turn on the MOSFETs in the short circuits 152 to 154 corresponding to the failed circuits A2 to A4, the short circuit gate signals G2 to G4 in the normal low voltage state are set to the high voltage.
For example, if the circuit A4 fails, as in the first embodiment, the short circuit gate signal G4 changes from the low voltage to the high voltage, and the MOSFETs (M4B, M4A) in the short circuit 154 are turned on. At this time, due to the short-circuit gate signal G4, M4B is turned on first, and M4A is turned on later than M4B because the gate terminal has the resistor RG4 and the capacitor CG4. First, when M4B is turned on, the energy of the smoothing capacitor Cs4 is discharged through the resistor RM4 while suppressing the current, and then M4A is turned on to short-circuit between the terminals of the smoothing capacitor Cs4.

  When the above operation is completed in a short time, a gate signal in which a high voltage and a low voltage are repeated is input from the control circuit 200 to a non-failed circuit, for example, the circuits A1 to A3, and the operation is continued. Although the gate signal is continuously input from the control circuit 200 to the failed circuit A4, the terminals of the smoothing capacitor Cs4 are short-circuited, that is, the two terminals of the series body of the two MOSFETs constituting the circuit A4 are short-circuited. Since the path connecting circuit A4 and circuit A1 is also blocked by M14, circuit A4 is bypassed. Then, the occurrence of the failure and the number of the failure circuits are transmitted from the control circuit 200 to the controller of the external system by an ARM signal. When one circuit fails, the input / output voltage ratio decreases from 4 to 3. In addition, since the failed circuit is bypassed, the system including this DC / DC power converter is the maximum by the command of the external controller so that the output power becomes smaller than before the failure according to the number of failed circuits. Adjust the output power.

  As described above, in this embodiment, the LC series bodies L12 to L14 and the cutoff MOSFETs (M12 to M14) are connected between the intermediate terminals of the first circuit A1 and the second circuits A2 to A4. A four-stage circuit was constructed. Then, the failure detection circuits 132A to 134A detect the failure for each of the second circuits A2 to A4, and shut off the cutoff MOSFETs (M12 to M14) connected to the intermediate terminals of the failed circuit. Short circuit circuits 152 to 154 short-circuit between the terminals of the circuit, that is, between the positive and negative terminals of the smoothing capacitors Cs2, Cs3, and Cs4. For this reason, it becomes possible to operate except for the failed circuit, and even if some circuit elements constituting the DC / DC power conversion device fail, the DC / DC power conversion operation can be continued and the reliability is improved. improves.

  In addition, since the maximum output power amount is reduced and operated according to the number of circuits A2 to A4 in which the failure is detected, the operation is performed so as not to exceed the maximum rating of the circuit elements constituting the DC / DC power converter. This can be continued, preventing deterioration of the element and improving reliability.

  Further, since the failure detection for each circuit is performed by detecting the voltage between the terminals of the high-voltage side MOSFET and the low-voltage side MOSFET constituting each circuit A2 to A4, the failure detection can be performed easily and reliably.

  The short circuits 152 to 154 for short-circuiting the positive and negative terminals of the smoothing capacitors Cs2, Cs3, Cs4 are a first switch element (MOSFET) and a parallel circuit of a series body of resistors RM and a second switch element (MOSFET). Is connected between the positive and negative terminals of the smoothing capacitors Cs2, Cs3, Cs4, the first switch element is turned on to discharge the smoothing capacitors Cs2, Cs3, Cs4 through the resistor RM, and then the second The switch element is turned on to short-circuit between the positive and negative terminals of the smoothing capacitors Cs2, Cs3, and Cs4. For this reason, the peak value of the current that flows during the discharge of the smoothing capacitors Cs2, Cs3, and Cs4 can be suppressed, the heat generation of the elements in the short circuits 152 to 154 can be suppressed, the deterioration of the elements can be prevented, and the reliability can be improved.

In the DC / DC power conversion device of this embodiment, bidirectional power conversion between the voltage V1 to V2 step-up operation and the voltage V2 to V1 step-down operation is possible, but the voltage V1 to V2 step-up operation is possible. The operation may be limited to only one-way power conversion of the voltage V2 to V1 step-down operation.
When the DC / DC power converter is used only for boosting operation, the MOSFETs in the second circuits A2 to A4 that operate as rectifier circuits in the DC / DC power converter may be replaced with diodes. In that case, the loss at the time of current conduction is larger than that constituted by the MOSFET, but the gate drive circuits 112 to 114 and the photocouplers 122L to 124L and 122H to 124H provided for driving the rectifier circuit, the power source Vs2 There is an advantage that ~ Vs4 is unnecessary and the device configuration is simplified.
When the DC / DC power conversion device is used only for the step-down operation, the MOSFET of the first circuit A1 that operates as a rectifier circuit in the DC / DC power conversion device may be replaced with a diode. In this case, the loss during current conduction is greater than that of the MOSFET, but there is an advantage that the device configuration is simplified because the gate drive circuit 111 provided for driving the rectifier circuit is not necessary.
In this embodiment, the case where the voltage ratio between V1 and V2 is 4 is shown. However, the present invention is not limited to this, and power conversion at various voltage ratios can be performed by increasing or decreasing the number of series circuits A1 to A4. It becomes possible.

  Further, even if the LC series bodies LC12, LC13, and LC14 in the DC / DC power converter are replaced with only the capacitors Cr12, Cr13, and Cr14 and the LC resonance is not used, the power conversion efficiency is deteriorated. Thus, by adding a failure detection circuit and a short circuit, the operation can be continued even if a failure occurs in part.

  In addition, when all the second circuits A2 to A4 in the DC / DC power converter have failed, the positive and negative terminals of the three smoothing capacitors Cs2, Cs3, and Cs4 are short-circuited, and the voltage between the voltage terminals VH and Vcom V2 is equal to the voltage V1 between the voltage terminals VL and Vcom at the voltage of the smoothing capacitor Cs1. In this case, the input / output voltage ratio is 1, but it is possible to continue operation without stopping the entire apparatus.

  Further, in this embodiment, when the circuit (A2 to A4) fails, the control circuit 200 is operated except for the failed circuit. It is also possible to operate the DC / DC power converter except for only the circuit. Also in this case, the cutoff MOSFET (M12 to M14) connected to the intermediate terminal of the circuit not used for the operation is cut off, and the short circuit 152 between the terminals of the circuit, that is, between the positive and negative terminals of the smoothing capacitors Cs2, Cs3, Cs4. Shorted by ~ 154.

Embodiment 4 FIG.
Next, a DC / DC power converter according to Embodiment 4 of the present invention will be described.
FIG. 11 shows a circuit configuration of a DC / DC power conversion apparatus according to Embodiment 4 of the present invention. This DC / DC power conversion device has a power conversion circuit portion having a function of converting power from direct current to direct current, and an additional circuit portion having a function of continuing a failure operation by providing a failure detection circuit and a short circuit.

(Description of power conversion circuit part)
(Description of configuration)
First, the power conversion circuit portion having the function of converting power from direct current to direct current will be described.
As shown in FIG. 11, the DC / DC power conversion apparatus includes a circuit A1 as the first circuit and a plurality of (in this case, three) circuit A2 as the second circuit, as in the third embodiment. Are composed of a plurality of stages (in this case, four stages) of circuits A1 to A4. Drive power supply Vs1, Vs2, Vs3, Vs4, smoothing capacitors Cs1, Cs2, Cs3, Cs4 that smooth the input / output voltage and function as a voltage source for energy transfer, control circuit 200, and input / output voltage terminals Equipped with Vcom, VL, VH. Then, the voltage V1 inputted between the voltage terminals VL and Vcom is changed to a voltage V2 boosted by about four times and outputted between the voltage terminals VH and Vcom, or the voltage V2 inputted between the voltage terminals VH and Vcom. Is output to the voltage V1 between the voltage terminals VL and Vcom.

A different part from the said Embodiment 2 is demonstrated.
The connection point of the two MOSFETs in the circuit A1 and the circuits A2, A3, and A4 is an intermediate terminal, the LC series LC12 is connected between the intermediate terminals of the circuit A1 and the circuit A2, and the intermediate terminal of the circuit A2 and the circuit A3 is connected. The LC series body LC23 is arranged between the intermediate terminals of the circuit A3 and the circuit A4. Then, the connection point between LC12 and LC23 and the intermediate terminal of the circuit A2 are connected via the cutoff switch circuit S12, and the connection point between LC23 and LC34 and the intermediate terminal of the circuit A3 are connected via the cutoff switch circuit S23. The other terminal of the LC 34, that is, the terminal opposite to the connection with the LC 23, and the intermediate terminal of the circuit A4 are connected via the cutoff switch circuit S34.

LC series body LC12 is a series body of capacitor Cr12 and inductor Lr12, LC series body LC23 is a series body of capacitor Cr23 and inductor Lr23, and LC series body LC34 is a series body of capacitor Cr34 and inductor Lr34. As in the first and second embodiments, the resonance period values determined from the inductance value and capacitance value of the inductor Lr and capacitor Cr at each stage are set to be equal.
The on / off operations of the cutoff switch circuits S12, S23, and S34 are controlled by the cutoff gate signals G12, G23, and G34 output from the control circuit 200.

Here, details of the cutoff switch circuits S12, S23, and S34 will be described.
FIG. 12A to FIG. 12C show circuit configurations of the cutoff switch circuits S34, S23, and S12. Since each of the cutoff switch circuits S12, S23, S34 has the same circuit configuration, only the configuration of the cutoff switch circuit S34 shown in FIG. 12A will be described here.
The cut-off switch circuit S34 includes two MOSFETs (M34R and M34L), a gate drive circuit 114A, a photocoupler 124A, and a drive power supply Vs34 for driving the MOSFET, the gate drive circuit, and the photocoupler. The source of M34R and the source of M34L are connected, and the drains of M34R and M34L are connected to the outside (in this case, the intermediate terminal of circuit A4 and the terminal of LC serial body LC34). The output of the gate drive circuit 114A is connected to the gates of M34R and M34L, the output of the photocoupler 124A is connected to the input of the gate drive circuit 114A, and the blocking gate signal G34 is input to the input of the photocoupler 124A. .

(Explanation of boosting operation)
Next, the operation of the power conversion circuit portion configured as described above will be described.
First, the case where the voltage V1 input between the voltage terminals VL and Vcom is set to the voltage V2 boosted about four times and output between the voltage terminals VH and Vcom will be described.
The circuit A1, which is the first circuit, operates as a drive inverter circuit that sends energy input between the voltage terminals VL and Vcom to the high voltage side by the on / off operation of the MOSFET in the circuit A1. The circuits A2 to A4 operate as a rectifier circuit that rectifies the current driven by the circuit A1 and transfers energy to the high voltage side. At this time, the cutoff switch circuits S12, S23, and S34 are always on.

  Gate signals (GL, GH) are output from the control circuit 200, and the MOSFETs in the circuits A1 to A4 are driven by these gate signals. The direction and shape of the current flowing through each MOSFET is the same as that of the first embodiment shown in FIG. 2, but the magnitude of the current flowing through the MOSFET (M1L, M1H) is (M2L, M2H) to ( M4L, M4H) is three times as large as the current flowing through. The gate signals (GL, GH) are ON / OFF signals having a duty cycle of about 50% with a resonance period T determined by the LC serial bodies LC12, LC13, LC14 of Lr and Cr as in the first and second embodiments. .

The capacitance values of the smoothing capacitors Cs1, Cs2, Cs3, and Cs4 are set to a sufficiently large value as compared with the capacitance values of the LC series capacitors Cr12, Cr23, and Cr34.
As described above, since the voltage V1 input between the voltage terminals VL and Vcom is changed to the voltage V2 boosted by about 4 times and output between the voltage terminals VH and Vcom, a load is applied between the voltage terminals VH and Vcom. Connected, the voltage V2 is lower than 4 × V1. In the steady state, the smoothing capacitor Cs1 is charged with the voltage V1, and the smoothing capacitors Cs2, Cs3, and Cs4 are charged with an average voltage of (V2−V1) / 3.

The flow of energy during operation will be described.
When the M1L, M2L, M3L, and M4L, which are the low-voltage side MOSFETs of the circuits A1 to A4, are turned on by the gate signal GL to the low-voltage side MOSFET, there is a voltage difference, so that they are stored in the smoothing capacitors Cs1, Cs2, and Cs3. Some energy is transferred to the capacitors Cr12, Cr23, and Cr34 through the following path.
Cs1⇒M2L⇒Lr12⇒Cr12⇒M1L
Cs1⇒Cs2⇒M3L⇒Lr23⇒Cr23⇒Lr12⇒Cr12⇒M1L
Cs1⇒Cs2⇒Cs3⇒M4L⇒Lr34⇒Cr34⇒Lr23⇒Cr23⇒Lr12⇒Cr12⇒M1L

Next, when M1H, M2H, M3H, and M4H, which are the high-voltage side MOSFETs of the circuits A1 to A4, are turned on by the gate signal GH to the high-voltage side MOSFET, the capacitors Cr12, Cr23, and Cr34 are charged because there is a voltage difference. The energy transferred to the smoothing capacitors Cs2, Cs3, and Cs4 through the following path.
M1H⇒Cr12⇒Lr12⇒M2H⇒Cs2
M1H⇒Cr12⇒Lr12⇒Cr23⇒Lr23⇒M3H⇒Cs3⇒Cs2
M1H⇒Cr12⇒Lr12⇒Cr23⇒Lr23⇒Cr34⇒Lr34⇒M4H⇒Cs4⇒Cs3⇒Cs2

As described above, energy is transferred from the smoothing capacitor Cs1 to the smoothing capacitors Cs2, Cs3, and Cs4 by charging and discharging the capacitors Cr12, Cr23, and Cr34. Then, the voltage V1 input between the voltage terminals VL and Vcom is changed to a voltage V2 boosted about four times and output between the voltage terminals VH and Vcom. Also, inductors Lr12, Lr23, Lr34 are connected in series to each capacitor Cr12, Cr23, Cr34 to form an LC series body LC12, LC23, LC34, so the above energy transfer uses a resonance phenomenon, Since there is no transient loss when the MOSFET state changes on / off, a large amount of energy can be transferred efficiently.
In this embodiment, since MOSFETs are used for the rectifier circuits A2 to A4, the conduction loss can be reduced and the efficiency of power conversion can be improved as compared with a diode using a diode described later.

(Description of step-down operation)
Next, the operation when the voltage V2 input between the voltage terminals VH and Vcom is set to the voltage V1 that is stepped down by about 1/4 is output between the voltage terminals VL and Vcom.
In this case, the circuit A4 operates as a drive inverter circuit, the circuit A1 operates as a rectifier circuit that rectifies the current driven by the drive inverter circuit and transfers energy to the low voltage side, and the circuits A2 and A3 are It plays the role of both the drive inverter circuit and the rectifier circuit. At this time, the cutoff switch circuits S12, S23, and S34 are always on.

  Gate signals (GL, GH) are output from the control circuit 200, and the MOSFETs in the circuits A1 to A4 are driven by these gate signals. The direction and shape of the current flowing through each MOSFET is the same as that of the first embodiment shown in FIG. 4, but the magnitude of the current flowing through the MOSFET (M1L, M1H) is (M2L, M2H) to ( M4L, M4H) is three times as large as the current flowing through. Similarly, the gate signals (GL, GH) are on / off signals having a resonance period T determined by the LC serial bodies LC12, LC23, LC34 of Lr and Cr and a duty of about 50%.

The capacitance values of the smoothing capacitors Cs1, Cs2, Cs3, and Cs4 are set to a sufficiently large value as compared with the capacitance values of the LC series capacitors Cr12, Cr23, and Cr34.
Since the voltage V2 input between the voltage terminals VH and Vcom is output to the voltage terminal VL-Vcom as a voltage V1 stepped down by about 1/4, a load is connected between the voltage terminals VL-Vcom, The voltage V2 is higher than 4 × V1. In the steady state, the smoothing capacitor Cs1 is charged with the voltage V1, and the smoothing capacitors Cs2, Cs3, and Cs4 are charged with an average voltage of (V2−V1) / 3.

The flow of energy during operation will be described.
When the M2H, M3H, M4H, and M1H, which are the high-voltage side MOSFETs of the circuits A2 to A4 and A1, are turned on by the gate signal GH to the high-voltage side MOSFET, there is a voltage difference, so it is stored in the smoothing capacitors Cs2, Cs3, and Cs4 A part of the energy transferred to the capacitors Cr12, Cr23, and Cr34 through the following path.
Cs2⇒Cs3⇒Cs4⇒M4H⇒Lr34⇒Cr34⇒Lr23⇒Cr23⇒Lr12⇒Cr12⇒M1H
Cs2⇒Cs3⇒M3H⇒Lr23⇒Cr23⇒Lr12⇒Cr12⇒M1H
Cs2⇒M2H⇒Lr12⇒Cr12⇒M1H

Next, when the M2L, M3L, M4L, and M1L, which are the low-voltage side MOSFETs of the circuits A2 to A4 and A1, are turned on by the gate signal GL to the low-voltage side MOSFET, there is a voltage difference, so the capacitors Cr12, Cr23, and Cr34 The charged energy is transferred to the smoothing capacitors Cs1, Cs2, and Cs3 through the following path.
Cr12⇒Lr12⇒Cr23⇒Lr23⇒Cr34⇒Lr34⇒M4L⇒Cs3⇒Cs2⇒Cs1⇒M1L
Cr12⇒Lr12⇒Cr23⇒Lr23⇒M3L⇒Cs2⇒Cs1⇒M1L
Cr12⇒Lr12⇒M2L⇒Cs1⇒M1L

As described above, energy is transferred from the smoothing capacitors Cs2, Cs3, and Cs4 to the smoothing capacitor Cs1 by charging and discharging the capacitors Cr12, Cr23, and Cr34. Then, the voltage V2 input between the voltage terminals VH and Vcom is converted to a voltage V1 that is stepped down by about 1/4 and output between the voltage terminals VL and Vcom. Also, inductors Lr12, Lr23, Lr34 are connected in series to each capacitor Cr12, Cr23, Cr34 to form an LC series body LC12, LC23, LC34, so that the energy transfer utilizes a resonance phenomenon, Since there is no transient loss when the MOSFET state changes on / off, a large amount of energy can be transferred efficiently.
Also in this embodiment, since the MOSFET is used for the circuit A1 used in the rectifier circuit, the conduction loss can be reduced and the efficiency of power conversion can be improved as compared with the case where the diode is used.
In the fourth embodiment, unlike the first embodiment, the ripples flowing in the smoothing capacitors Cs1, Cs2, and Cs3 are not operated by shifting the phase between the plurality of circuits during the step-up or step-down operation. It does not reduce the current.

(Explanation of additional circuit part)
(Description of configuration)
Next, a description will be given of the additional circuit portion having the function of continuing the operation in the event of an abnormality with the failure detection circuit and the short circuit.
The configuration and connection of failure detection circuits 132A, 133A, and 134A are the same as those in the third embodiment (see FIG. 10). Further, the configurations and connections of the short-circuit circuits 152, 153, and 154 that short-circuit the voltage terminals of the smoothing capacitors Cs2, Cs3, and Cs4 are the same as those in the first and third embodiments (see FIG. 7).

(Description of operation)
Next, the operation of the additional circuit portion that includes the failure detection circuit and the short circuit and continues the operation in the event of an abnormality will be described.
The operations of the failure detection circuits 132A to 134A are the same as those in the third embodiment. When a failure is detected by the failure detection circuits 132A to 134A, the failure detection signals (determination signals) AS2 to AS4 corresponding to the circuits A2 to A4 become high voltage. This failure detection signal is input to the control circuit 200, and the control circuit 200 recognizes which circuit A2 to A4 has failed.
Then, the cutoff switch circuits S12, S23, S34 connected to the intermediate terminals of the failed circuits A2 to A4 are turned off by the cutoff gate signals G12, G23, G34 from the control circuit 200. Thereafter, in order to turn on the MOSFETs in the short circuits 152 to 154 corresponding to the failed circuits A2 to A4, the short circuit gate signals G2 to G4 in the normal low voltage state are set to the high voltage. The operations of the short circuits 152 to 154 are the same as those in the first and third embodiments.

  When the above operation is completed in a short time, a gate signal in which a high voltage and a low voltage are repeated is input from the control circuit 200 to a non-failed circuit, and the operation is continued. Assuming that a faulty circuit, for example, the circuit A4, the gate signal is continuously input from the control circuit 200 to this circuit A4, but the terminals of the corresponding smoothing capacitor Cs4 are short-circuited, that is, constitute the faulty circuit A4. Since both terminals of the series body of the two MOSFETs are short-circuited and the path connecting the intermediate terminal of the circuit A4 to the LC series body LC34 is also blocked by the cutoff switch circuit S34, the circuit A4 is bypassed. Then, the occurrence of the failure and the number of the failure circuits are transmitted from the control circuit 200 to the controller of the external system by an ARM signal. When one circuit fails, the input / output voltage ratio decreases from 4 to 3. In addition, since the failed circuit is bypassed, the system including this DC / DC power converter is the maximum by the command of the external controller so that the output power becomes smaller than before the failure according to the number of failed circuits. Adjust the output power.

  As described above, in this embodiment, a plurality of circuits A1 to A4 are connected in series to form a four-stage circuit, and LC serial bodies L12, LC23, and LC34 are connected between intermediate terminals of adjacent circuits. Each cutoff switch circuit S12, S23, S34 was connected between a connection line connecting the LC series bodies L12, LC23, LC34 to each other and an intermediate terminal of each circuit A2-A4. Then, the failure detection circuits 132A to 134A detect the failure for each of the second circuits A2 to A4, and shut off the cutoff switch circuits S12, S23, and S34 connected to the intermediate terminals of the failed circuit. The short-circuits 152 to 154 short-circuit the terminals of the circuits, that is, the positive and negative terminals of the smoothing capacitors Cs2, Cs3, and Cs4. For this reason, it becomes possible to operate except for the failed circuit as in the third embodiment, and even if some circuit elements constituting the DC / DC power conversion device fail, the DC / DC power The conversion operation can be continued and the reliability is improved.

  In addition, since the maximum output power amount is reduced and operated according to the number of circuits A2 to A4 in which the failure is detected, the operation is performed so as not to exceed the maximum rating of the circuit elements constituting the DC / DC power converter. This can be continued, preventing deterioration of the element and improving reliability.

Further, since the failure detection for each circuit is performed by detecting the voltage between the terminals of the high-voltage side MOSFET and the low-voltage side MOSFET constituting each circuit A2 to A4, the failure detection can be performed easily and reliably.
In this embodiment, the current flowing in each MOSFET is detected by detecting the voltage between each terminal of each MOSFET. However, a current sensor is arranged to detect the current flowing in each MOSFET and the current flowing in the LC series body. A failure may be determined.

In the DC / DC power conversion device of this embodiment, bidirectional power conversion between the voltage V1 to V2 step-up operation and the voltage V2 to V1 step-down operation is possible, but the voltage V1 to V2 step-up operation is possible. The operation may be limited to only one-way power conversion of the voltage V2 to V1 step-down operation.
When the DC / DC power converter is used only for boosting operation, the MOSFETs in the second circuits A2 to A4 that operate as rectifier circuits in the DC / DC power converter may be replaced with diodes. In that case, the loss at the time of current conduction is larger than that constituted by the MOSFET, but the gate drive circuits 112 to 114 and the photocouplers 122L to 124L and 122H to 124H provided for driving the rectifier circuit, the power source Vs2 There is an advantage that ~ Vs4 is unnecessary and the device configuration is simplified.
When the DC / DC power conversion device is used only for the step-down operation, the MOSFET of the first circuit A1 that operates as a rectifier circuit in the DC / DC power conversion device may be replaced with a diode. In this case, the loss during current conduction is greater than that of the MOSFET, but there is an advantage that the device configuration is simplified because the gate drive circuit 111 provided for driving the rectifier circuit is not necessary.
In this embodiment, the case where the voltage ratio between V1 and V2 is 4 is shown. However, the present invention is not limited to this, and power conversion at various voltage ratios can be performed by increasing or decreasing the number of series circuits A1 to A4. It becomes possible.

  Moreover, even if the LC series bodies LC12, LC23, and LC34 in the DC / DC power converter are replaced with only the capacitors Cr12, Cr23, and Cr34 and the LC resonance is not used, the power conversion efficiency is deteriorated. Thus, by adding a failure detection circuit and a short circuit, the operation can be continued even if a failure occurs in part.

  In addition, when all the second circuits A2 to A4 in the DC / DC power converter have failed, the positive and negative terminals of the three smoothing capacitors Cs2, Cs3, and Cs4 are short-circuited, and the voltage between the voltage terminals VH and Vcom V2 is equal to the voltage V1 between the voltage terminals VL and Vcom at the voltage of the smoothing capacitor Cs1. In this case, the input / output voltage ratio is 1, but it is possible to continue operation without stopping the entire apparatus.

  Further, in this embodiment, when the circuit (A2 to A4) fails, the control circuit 200 is operated except for the failed circuit. It is also possible to operate the DC / DC power converter except for only the circuit. Even in that case, the switching circuit S12, S23, S34 for disconnection that is connected to the intermediate terminal of the circuit that is not used for operation is disconnected, and the short circuit between the terminals of the circuit, that is, between the positive and negative terminals of the smoothing capacitors Cs2, Cs3, Cs4 Short-circuit by 152-154.

  Further, the DC / DC power converters according to the third and fourth embodiments can also be applied to the electric drive system of a hybrid vehicle as shown in the second embodiment. Also in this case, when a failure occurs in the DC / DC power conversion device 100, the DC / DC power conversion device 100 continues to operate except for the failed portion, and the failure state is transmitted to the inverter 400 by the ARM signal. The inverter 400 drives the motor 500 while suppressing power, and outputs the power from the motor 500 to the DC / DC power converter 100 while suppressing voltage and power. Thus, even if a failure occurs in the DC / DC power conversion apparatus 100, it is possible to suppress the output and continue the operation without stopping the electric drive system of the hybrid vehicle. The same effect as 2 is obtained.

  In each of the above embodiments, the power MOSFET in which the parasitic diode is formed between the source and the drain is used as the switching element in the driving inverter circuit and the rectifier circuit. However, the control electrode such as IGBT can be turned on and off. Other semiconductor switching elements that can be controlled may be used, in which case a diode connected in antiparallel is used, and this diode functions as a parasitic diode of the power MOSFET.

In each of the above embodiments, the short circuits 152 to 154 that short-circuit the positive and negative terminals of the smoothing capacitors Cs2, Cs3, and Cs4 use MOSFETs for the first and second switch elements. The semiconductor switching element may be a mechanical switch.
In the third and fourth embodiments, MOSFETs are used for the cutoff switches M12 to M14, S12, S23, and S34. However, other semiconductor switching elements such as IGBTs may be used, and mechanical switches may be used. good.

It is a figure which shows the circuit structure of the DC / DC power converter device by Embodiment 1 of this invention. It is a figure which shows the current waveform of a gate signal and MOSFET at the time of the pressure | voltage rise operation of the DC / DC power converter device by Embodiment 1 of this invention. It is a figure which shows the gate signal which drives each column circuit by Embodiment 1 of this invention. It is a figure which shows the current waveform of a gate signal and MOSFET at the time of the pressure | voltage fall operation | movement of the DC / DC power converter device by Embodiment 1 of this invention. It is a figure which shows the structure of the failure detection circuit by Embodiment 1 of this invention. It is a figure which shows the structure of the failure detection circuit by Embodiment 1 of this invention. It is a figure which shows the structure of the short circuit by Embodiment 1 of this invention. It is a figure which shows the system configuration | structure of the hybrid vehicle to which the DC / DC power converter device by Embodiment 2 of this invention is applied. It is a figure which shows the circuit structure of the DC / DC power converter device by Embodiment 3 of this invention. It is a figure which shows the structure of the failure detection circuit by Embodiment 3 of this invention. It is a figure which shows the circuit structure of the DC / DC power converter device by Embodiment 4 of this invention. It is a figure which shows the structure of the switch circuit for interruption | blocking by Embodiment 4 of this invention.

Explanation of symbols

A1, B2 first circuit (drive inverter circuit / rectifier circuit),
A2 to A4 second circuit (rectifier circuit / drive inverter circuit),
A1X, A1Y, A1Z cell circuit,
Cr12, Cr13, Cr14, Cr23, Cr34 Energy transfer capacitors,
Cs1 ~ Cs4 smoothing capacitor, G2 ~ G4 short circuit gate signal,
G12 to G14, G12, G23, G34 shut-off gate signal, GL, GH gate signal,
GLX, GHX row circuit X gate signal, GLY, GHY row circuit Y gate signal,
GLZ, GHZ Gate signal for row circuit Z, T drive cycle (resonance cycle),
Lr12, Lr13, Lr14, Lr23, Lr34 inductors,
LC12, LC13, LC14, LC23, LC34 LC series body,
M2L to M4L, M1LX, M1LY, M1LZ Low-voltage side MOSFET,
M2H to M4H, M1HX, M1HY, M1HZ High-voltage side MOSFET,
M12 to M14 MOSFET as a cutoff switch,
M2B to M4B first switch element (MOSFET),
M2A to M4A Second switch element (MOSFET), RM2 to RM4 resistors,
S12, S23, S34 Switch circuit for cutoff, T drive cycle (resonance cycle),
X, Y, Z column circuit, VL, VH, Vcom voltage terminal, 100 DC / DC power converter,
131X to 131Z, 132 to 134, 132A to 134A Fault detection circuit, 152 to 154 short circuit,
200 Control circuit.

Claims (18)

  1. A drive inverter circuit formed by connecting a high-voltage side element and a low-voltage side element made of a semiconductor switching element in series and connected between the positive and negative terminals of a smoothing capacitor; A plurality of circuits are connected in series and connected in series with a rectifier circuit connected between the positive and negative terminals of a smoothing capacitor.
    A cell circuit in which one predetermined circuit among the plurality of circuits is a first circuit, each other circuit is a second circuit, the first circuit is connected in series with the high-voltage side element and the low-voltage side element. m units connected in parallel and connected between the positive and negative terminals of the smoothing capacitor, and the connection points between the high-voltage side elements and the low-voltage side elements of these circuits as intermediate terminals An energy transfer capacitor is provided between the intermediate terminals between the second circuit and m cell circuits each including the cell circuit, the second circuit, and the energy transfer capacitor are configured,
    A fault detection circuit for detecting a fault for each column circuit;
    A DC / DC power converter comprising: a short circuit that short-circuits between the positive and negative terminals of the smoothing capacitor of each of the second circuits.
  2. When a failure of the column circuit is detected by the failure detection circuit during the operation of the apparatus, the column circuit in which the failure is detected is stopped and between the positive and negative terminals of the smoothing capacitor of the second circuit in the column circuit The DC / DC power converter according to claim 1, wherein the short circuit is short-circuited by the short circuit.
  3. 3. The DC / DC power converter according to claim 1, wherein the gate signals for driving the column circuits have the same driving cycle and are shifted in phase for each column circuit. 4.
  4. 4. The DC / DC power converter according to claim 3, wherein phases of the gate signals for driving the m column circuits are different from each other by 2π / m. 5.
  5. The gate signals for driving the m column circuits have the same driving cycle and have a phase difference of 2π / m for each column circuit, and the failure detection circuit includes k pieces of the m column circuits. When a failure is detected in each of the column circuits, the k column circuits are stopped, and the gate signals for driving the remaining (m−k) column circuits are set to a phase of 2π / (m−k) for each column circuit. 3) The DC / DC power converter according to claim 2, wherein the DC / DC power converter is changed so as to be shifted one by one.
  6. 6. The DC / DC power converter according to claim 2, wherein the maximum output power amount is reduced according to the number of column circuits stopped by the failure detection.
  7. The failure detection circuit detects a voltage between terminals of the cell circuit in each column circuit, the high-voltage side element and the low-voltage side element constituting the second circuit, and thereby the failure of each column circuit is detected. The DC / DC power converter according to claim 1, wherein detection is performed.
  8. A drive inverter circuit formed by connecting a high-voltage side element and a low-voltage side element composed of a semiconductor switching element in series and connected between the positive and negative terminals of a smoothing capacitor, and a high-voltage side element and a low-voltage side element composed of a semiconductor switching element or a diode element. A plurality of circuits including a rectifier circuit connected in series and connected between the positive and negative terminals of a smoothing capacitor are connected in series, and a connection point between the high-voltage side element and the low-voltage side element in each circuit is an intermediate terminal. As described above, an energy transfer capacitor and a cutoff switch are arranged between the intermediate terminals between the circuits,
    Among the plurality of circuits, a predetermined circuit is a first circuit, and the other circuits are second circuits.
    A fault detection circuit for detecting a fault for each of the second circuits;
    A DC / DC power converter comprising: a short circuit that short-circuits between the positive and negative terminals of the smoothing capacitor of each of the second circuits.
  9. When a failure of the second circuit is detected by the failure detection circuit during the operation of the device, the cutoff switch connected to the intermediate terminal of the second circuit is turned off, and the second circuit The DC / DC power converter according to claim 8, wherein the positive and negative terminals of the smoothing capacitor are short-circuited by the short circuit.
  10. 10. The DC / DC power converter according to claim 9, wherein the maximum output power amount is reduced in accordance with the number of the second circuits in which the failure is detected.
  11. 9. The energy transfer capacitor and the cutoff switch are connected in series, and are connected between the intermediate terminals between the second circuit and the first circuit, respectively. The DC / DC power converter device of any one of 10-10.
  12. Each of the energy transfer capacitors is connected between the intermediate terminals of the adjacent circuits among the plurality of circuits connected in series, and the connection line connecting the energy transfer capacitors to each other and the second The DC / DC power converter according to any one of claims 8 to 10, wherein each of the cutoff switches is connected to an intermediate terminal of the circuit.
  13. The failure detection circuit detects a failure of each second circuit by detecting a voltage between each terminal of the high-voltage side element and the low-voltage side element constituting each of the second circuits. The DC / DC power converter device according to any one of claims 8 to 12.
  14. The DC / DC power converter according to claim 1, wherein an input / output voltage terminal is connected to a positive / negative terminal of the smoothing capacitor of the first circuit.
  15. The short circuit for short-circuiting between the positive and negative terminals of the smoothing capacitor is configured by connecting a parallel circuit of a first switch element and a series body of resistors and a second switch element between the positive and negative terminals of the smoothing capacitor, The first switch element is turned on to discharge the smoothing capacitor through the resistor, and then the second switch element is turned on to short-circuit between the positive and negative terminals of the smoothing capacitor. The DC / DC power converter device according to any one of 1 to 14.
  16. The DC / DC power converter according to any one of claims 11 to 15, wherein an inductor is disposed in series with the energy transfer capacitor.
  17. 17. The DC / DC according to claim 16, wherein the plurality of series bodies including the energy transfer capacitor and the inductor and arranged between the circuits have equal resonance periods determined by a capacitor capacity and an inductance. Power conversion device.
  18. 18. The semiconductor switching element according to claim 1, wherein each of the semiconductor switching elements is a power MOSFET having a parasitic diode between a source and a drain, or a semiconductor switching element in which diodes are connected in antiparallel. DC / DC power converter.
JP2008039528A 2008-02-21 2008-02-21 DC / DC power converter Expired - Fee Related JP4675983B2 (en)

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Cited By (5)

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Publication number Priority date Publication date Assignee Title
JP2012005335A (en) * 2010-06-21 2012-01-05 Fujitsu Ltd Regulator device
JP2012050207A (en) * 2010-08-25 2012-03-08 Denso Corp Multiphase dc/dc converter circuit
JP2014176126A (en) * 2013-03-06 2014-09-22 Panasonic Corp Power-supply unit
WO2015064339A1 (en) * 2013-10-31 2015-05-07 株式会社オートネットワーク技術研究所 Power supply device and abnormality determination method for power supply device
CN107431435A (en) * 2015-02-27 2017-12-01 香港大学 Power converter and method for power conversion

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Publication number Priority date Publication date Assignee Title
JP2005012904A (en) * 2003-06-18 2005-01-13 Seiko Epson Corp Power supply and electronic apparatus using the same
JP2006262619A (en) * 2005-03-17 2006-09-28 Mitsubishi Electric Corp Switched-capacitor type dc/dc converter device
JP2008283847A (en) * 2007-04-12 2008-11-20 Mitsubishi Electric Corp Dc/dc power converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005012904A (en) * 2003-06-18 2005-01-13 Seiko Epson Corp Power supply and electronic apparatus using the same
JP2006262619A (en) * 2005-03-17 2006-09-28 Mitsubishi Electric Corp Switched-capacitor type dc/dc converter device
JP2008283847A (en) * 2007-04-12 2008-11-20 Mitsubishi Electric Corp Dc/dc power converter

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012005335A (en) * 2010-06-21 2012-01-05 Fujitsu Ltd Regulator device
JP2012050207A (en) * 2010-08-25 2012-03-08 Denso Corp Multiphase dc/dc converter circuit
JP2014176126A (en) * 2013-03-06 2014-09-22 Panasonic Corp Power-supply unit
WO2015064339A1 (en) * 2013-10-31 2015-05-07 株式会社オートネットワーク技術研究所 Power supply device and abnormality determination method for power supply device
JP2015089289A (en) * 2013-10-31 2015-05-07 株式会社オートネットワーク技術研究所 Power supply device and abnormality determination method therefor
CN107431435A (en) * 2015-02-27 2017-12-01 香港大学 Power converter and method for power conversion
EP3262743A4 (en) * 2015-02-27 2018-10-17 The University of Hong Kong Power converter and power conversion method

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