JP2009130323A - Method of manufacturing wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a wiring board, capable of forming in detail a conductive layer and providing excellent electric reliability. <P>SOLUTION: Disclosed is a method of manufacturing a wiring board 2, comprising a step of preparing a film 15 having a metal film 14 formed on a film layer 7b and a substrate 5 formed with a first conductive layer 6b; a step of adhering the film 15 on the first conductive layer 6b so that the metal film 14 is exposed; a step of forming a through-hole B passing through a part of the metal film 14 and the film layer 7b located, directly below the metal film 14 and exposing a part of a first conductive layer 6a; and a step of forming a second conductive layer 6a on the metal film 14, and forming a via conductor 10 in the through-hole B for connecting a part of the first conductor layer 6b and a part of the second conductor layer 6a. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a wiring board used in electronic devices such as various audiovisual devices, home appliances, communication devices, computer devices, and peripheral devices.

  Conventionally, wiring boards capable of mounting semiconductor elements such as IC (Integrated Circuit) or LSI (Large Scale Integration) are known.

  In recent years, in order to reduce the size of a wiring board for the purpose of reducing the size and weight of electronic components, it is required to make the wiring pattern of the wiring board fine. Such a wiring board includes an insulating layer made of a resin, and a conductive layer formed on one main surface and the other main surface of the insulating layer.

  When the conductive layer as the wiring pattern is made fine, the contact area between the conductive layer and the insulating layer is reduced, the adhesive force between them is reduced, and the conductive layer is easily peeled off from the insulating layer. Therefore, in order to make the conductive layer as a wiring pattern fine, a technique has been proposed in which unevenness is formed on the surface of the insulating layer, and a conductive layer is formed on the unevenness to maintain the adhesive force between the two ( See Patent Document 1 below).

It is known to form via conductors for connecting conductive layers having different vertical positions through the insulating layer.
JP 2002-124753 A

  However, in the technique described in Patent Document 1 described above, it is difficult to adjust the melting region and the melting depth of the surface of the insulating layer, and the maximum height of the unevenness may become larger than necessary. Therefore, if a fine conductive layer is formed in a region where the maximum height of the unevenness is larger than necessary, a gap may be generated in a part between the conductive layer and the insulating layer, and the conductive layer may be separated from the insulating layer. It was. As a result, since the via conductor is also partially connected to the conductive layer, a crack may occur between the via conductor and the conductive layer. Thus, in the method of dissolving the surface of the insulating layer with the etching solution and forming the conductive layer on the surface, it is difficult to form the conductive layer finely and it is sufficient to suppress cracks in the via conductor. It wasn't.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a method for manufacturing a wiring board that can form a conductive layer finely and has excellent electrical reliability.

  In order to solve the above problems, a method of manufacturing a wiring board according to the present invention includes a step of preparing a film body having a metal film formed on a film layer, and a substrate on which a first conductive layer is formed, The step of laminating the film body on the first conductive layer so that the surface of the metal film is exposed, passing through the part of the metal film and the film layer located immediately below the first conductive layer Forming a through hole exposing a part of the layer; forming a second conductive layer on the metal film; and forming a part of the first conductive layer and a part of the second conductive layer in the through hole And a step of forming a via conductor to be connected.

  In the method for manufacturing a wiring board according to the present invention, the metal film is formed by a sputtering method, and after forming the through hole, a sputter film is separately formed on the inner wall surface of the through hole by a sputtering method. And a step of performing.

  In the method of manufacturing a wiring board according to the present invention, a part of the sputtered film extends to the metal film, and the thickness of the sputtered film deposited on the bottom of the through hole is determined by the metal It is characterized by being thinner than the thickness of the sputtered film deposited on the film.

  In the method for manufacturing a wiring board according to the present invention, the sputtering method for forming the sputtered film is an anisotropic sputtering method.

  An object of this invention is to provide the manufacturing method of the wiring board which can form a conductive layer finely and was excellent in electrical reliability.

  Hereinafter, a mounting structure including a wiring board according to an embodiment of the present invention will be described in detail with reference to the drawings. Such a mounting structure is used for electronic devices such as various audiovisual devices, home appliances, communication devices, computer devices or peripheral devices thereof.

  FIG. 1 is a cross-sectional view of a mounting structure including a wiring board according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of the via conductor according to the embodiment of the present invention. 3 is a part of the via conductor according to the embodiment of the present invention, and is an enlarged cross-sectional view of a portion X in FIG. FIG. 4A is a part of the via conductor according to the embodiment of the present invention, and is an enlarged cross-sectional view of a Y portion in FIG. FIG. 4B is an enlarged view of a part of the via conductor according to the embodiment of the present invention, and is an enlarged cross-sectional view of a Z portion in FIG.

  A mounting structure 1 according to the present embodiment includes a wiring board 2 and a semiconductor element 4 such as an IC or LSI that is flip-chip mounted on the wiring board 2 via bumps 3 such as solder. Yes.

  The wiring substrate 2 includes a core substrate 5, conductive layers 6 that are alternately stacked on one main surface and the other main surface of the core substrate 5, and an insulating layer 7. The core substrate 5 is made of, for example, a thermosetting resin such as an epoxy resin, a bismaleimide triazine resin, or a cyanate resin on a base material in which glass fiber, polyparaphenylene benzbisoxazole resin, wholly aromatic polyamide resin, or the like is woven vertically and horizontally. It is produced by laminating and solidifying impregnated sheets.

  The core substrate 5 can also be made from a low thermal expansion resin without using a base material. As the low thermal expansion resin, for example, polyparaphenylene benzbisoxazole resin, wholly aromatic polyamide resin, wholly aromatic polyester resin, polyimide resin or liquid crystal polymer resin can be used. Among these, it is desirable to use a polyparaphenylene benzbisoxazole resin. The polyparaphenylene benzbisoxazole resin has a low coefficient of thermal expansion of −5 ppm / ° C. to 5 ppm / ° C. By using such a low thermal expansion resin, the thermal expansion of the core substrate 5 itself can be suppressed. In addition, a thermal expansion coefficient applies to JISK7197.

  The core substrate 5 includes a through hole S penetrating in the vertical direction, a through hole conductor 8 formed along the inner wall surface of the through hole S, and an insulator 9 filled in a region surrounded by the through hole conductor 8. Is formed. The through-hole conductor 8 is made of a conductive material such as copper, silver, gold, aluminum, nickel, or chromium. The insulator 9 is for filling the remaining space surrounded by the through hole S. The insulator 9 is made of, for example, polyimide resin, acrylic resin, epoxy resin, cyanate resin, Teflon (registered trademark) resin, silicone resin, polyphenylene ether resin, or bismaleimide triazine resin. By forming the insulator 9, a via conductor 10 to be described later can be formed immediately below the insulator 9, the distance of the wiring extended from the through-hole conductor 8 can be shortened, and the size of the wiring board 2 can be reduced. Can be realized.

  Hereinafter, the conductive layer 6 and the insulating layer 7 will be described. The conductive layer 6 includes a line-shaped signal line 6a having a function of transmitting a predetermined electric signal, and a flat ground layer 6b having a function of bringing the semiconductor element 4 to a common potential, for example, a ground potential. It is out. The signal line 6a is disposed so as to face the ground layer 6b with the insulating layer 7 interposed therebetween. The conductive layer 6 is made of a metal material such as copper, silver, gold, aluminum, nickel, or chromium.

  The insulating layer 7 is composed of an adhesive layer 7a and a film layer 7b. The film layer 7b is bonded to the core substrate 5 via the adhesive layer 7a. The adhesive layer 7a is made of a thermosetting resin or a thermoplastic resin. As the thermosetting resin, for example, at least one of polyimide resin, acrylic resin, epoxy resin, urethane resin, cyanate resin, silicon resin, and bismaleimide triazine resin can be used. As the thermoplastic resin, since it is necessary to have heat resistance that can withstand the heating at the time of solder reflow, it is desirable that the softening temperature of the constituent material is 200 ° C. or higher. Polyether ketone resin, polyparaphenylene benzbisoxazole Resins, wholly aromatic polyamide resins, wholly aromatic polyester resins, polyimide resins, liquid crystal polymer resins, and the like can be used. The thermal expansion coefficient of the adhesive layer 7a is, for example, 15 ppm / ° C. or more and 80 ppm / ° C. or less. The adhesive layer 7a is set so that the thickness after drying is, for example, 1 μm or more and 15 μm or less.

  The adhesive layer 7a may contain a large number of fillers 11. By including the filler 11 in the adhesive layer 7a, the viscosity before curing of the adhesive layer 7a can be adjusted, and the adhesive layer 7a can be formed by bringing the thickness dimension of the adhesive layer 7a close to a desired value. it can. The filler 11 is spherical, and the diameter of the filler 11 is set to, for example, 0.05 μm to 6 μm, and the coefficient of thermal expansion is, for example, −5 ppm / ° C. to 5 ppm / ° C. The filler 11 is made of, for example, silicon oxide (silica), silicon carbide, aluminum oxide, aluminum nitride, or aluminum hydroxide.

  The film layer 7b is solidified with respect to the core substrate 5 and the conductive layer 6, and then bonded through an adhesive that becomes the adhesive layer 7a. For example, the film layer 7b is heated and pressurized using a heating press apparatus, and then cooled. Can be fixed to the core substrate 5 and the conductive layer 6. The thickness of the film layer 7b is precisely controlled to ensure the flatness of the wiring board 2. The film layer 7b is desirably a material that can be elastically deformed and has excellent heat resistance and hardness. As the film layer 7b having such characteristics, for example, polyparaphenylene benzbisoxazole resin, wholly aromatic polyamide resin, wholly aromatic polyester resin, or liquid crystal polymer resin can be used. In addition, the thermal expansion coefficient of the film layer 7b is, for example, −10 ppm / ° C. or more and 10 ppm / ° C. or less.

  Further, the thickness of the film layer 7b is set to be, for example, 2 μm or more and 20 μm or less, and the thickness difference from the adhesive layer 7a is 7 μm or less. Here, the difference in thickness between the film layer 7b and the adhesive layer 7a is the difference between the thicknesses after the adhesive layer 7a is dried. The thickness of the film layer 7b is set to be larger than the thickness of the adhesive layer 7a.

  As shown in FIG. 2, the insulating layer 7 is formed with a through hole B penetrating in the vertical direction. The through hole B is formed by irradiating the insulating layer 7 with laser light from the film layer 7b side toward the adhesive layer 7a side. The through hole B is formed so as to become narrower from the upper part toward the lower part. The through hole B is filled with a via conductor 10 for electrically connecting the conductive layers 6 having different vertical positions. As shown in FIG. 3, the via conductor 10 includes a sputtered film 12 deposited on the bottom and inner wall surface of the through-hole B, and a conductor part 13 formed in a region surrounded by the sputtered film 12. The sputtered film 12 is made of a conductive material such as nickel or chromium. The conductor 13 is made of a conductive material such as copper, silver, gold, platinum, aluminum, nickel, or chromium. The thickness of the sputtered film 12 at the bottom of the through hole B is set to 3 nm or more and 15 nm or less. The sputtered film 12 functions as a base for plating on which plating can be grown using electroplating. Then, plating grows on the sputtered film 12, and the conductor portion 13 can be formed. In addition to electroplating, electroless plating may be used on the sputtered film 12.

  A part of the filler 11 protruding from the adhesive layer 7a is embedded in the via conductor 10. That is, a part of the filler 11 protrudes from the inner wall surface of the via B, and a part of the inner wall surface of the through hole B is formed in an uneven shape. By forming a part of the via conductor 10 so as to cover a part of the filler 11, the contact area between the filler 11 and the via conductor 10 can be increased, and the adhesive force between the two can be increased. Peeling between the conductor 10 and the adhesive layer 7a can be suppressed. That is, the via conductor 10 can be prevented from peeling from the inner wall surface of the through hole B due to the anchor effect of a part of the filler 11 with respect to the inner wall surface of the through hole B.

  As shown in FIG. 2, FIG. 4 (A) or FIG. 4 (B), a metal film 14 is formed on the film layer 7b. The metal film 14 includes a first metal layer 14a attached directly to the film layer 7b and a second metal layer 14b formed on the first metal layer 14a. The first metal layer 14a is formed using a sputtering method as will be described later, and its upper surface is formed in an uneven shape. The first metal layer 14a is made of, for example, a conductive material such as nickel, chromium, titanium, molybdenum, tungsten, or zirconium, or an alloy thereof. As the alloy, for example, an alloy of nickel and chromium can be used. The upper surface of the first metal layer 14a has a maximum height according to JISB0601-2001 set to, for example, 100 nm or less. The thickness of the first metal layer 14a is set to 3 nm or more and 15 nm or less, for example.

  The second metal layer 14b is a metal protective layer for suppressing the oxidation of the first metal layer 14a, and is made of a conductive material such as copper, silver, gold, platinum, or aluminum. Due to the first metal layer 14a having a concavo-convex surface, the upper surface of the second metal layer 14b is also concavo-convex. The upper surface of the second metal layer 14b has a maximum height according to JISB0601-2001 of, for example, 100 nm or less, and is set smaller than the maximum height of the upper surface of the first metal layer 14a. The thickness of the second metal layer 14b is set to, for example, 5 nm or more and 100 nm or less.

  A part of the sputtered film 12 extends to the metal film 14, that is, the second metal layer 14 b, and the adhesive force with the second metal layer 14 b having an uneven upper surface can be maintained satisfactorily. The conductive layer 6 is formed on the sputtered film 12 formed on the film layer 7b. The thickness of the sputtered film 12 formed on the film layer 7b is, for example, 50 nm or more and 1 μm or less and is thicker than the thickness of the sputtered film 12 deposited on the bottom of the through hole B. Since nickel, chromium, etc. constituting the sputtered film 12 are less conductive and have a higher electric resistance than other conductive materials, if they are formed thick at the bottom of the through hole B, the power consumption of the wiring board increases. End up. Therefore, the thickness of the sputtered film 12 deposited on the bottom of the through-hole B is made thinner than the thickness of the sputtered film 12 deposited on the metal film 14 to suppress the increase in power consumption of the wiring board. .

  The metal film 14 has an uneven surface, and the conductive layer 6 and the metal film 14 can have an increased adhesive force, and the conductive layer 6 can be prevented from peeling off from the insulating layer 7. Can do. Further, since the via conductor 10 is partially connected to the conductive layer 6, the via conductor 10 is also prevented from peeling from the through hole B. As a result, generation of cracks in the conductive layer 6 is suppressed, and electrical connection between the conductive layer 6 and the via conductor 10 can be maintained satisfactorily. In addition, the conduction of cracks to the via conductor 10 can be reduced, and a wiring board with excellent electrical reliability can be realized.

  For the semiconductor element 4, a material approximate to the thermal expansion coefficient of the insulating layer 7 is used. For example, silicon, germanium, gallium arsenide, gallium arsenide phosphorus, gallium nitride, or silicon carbide can be used. In addition, the thickness dimension of the semiconductor element 4 can use the thing of 0.1 mm to 1 mm, for example.

  As described above, according to this embodiment, it is possible to suppress the peeling of the conductive layer 6 from the insulating layer 7, it is possible to suppress the via conductor 10 from peeling from the through hole B, and the conductive layer 6 and the via conductor 10 The electrical connection can be maintained well.

  Next, a method for manufacturing the mounting structure 1 described above will be described with reference to FIGS.

  First, as a step before producing the mounting structure 1, a core substrate 5 as a base is prepared. The core substrate 5 is formed by hot-pressing and curing a sheet obtained by impregnating a glass cloth in which glass fibers are woven vertically and horizontally with a thermosetting resin such as an epoxy resin, a bismaleimide triazine resin, or a cyanate resin. Further, in order to reduce the thermal expansion of the wiring board 2, a low thermal expansion fiber such as wholly aromatic polyamide, wholly aromatic polyester, or liquid crystal polymer may be used. The core substrate 5 has a thickness dimension set to, for example, not less than 0.3 mm and not more than 1.5 mm.

  Next, a through hole S that penetrates the core substrate 5 in the thickness direction is formed in the core substrate 5 by a conventionally known drilling process or the like. Then, the through-hole conductor 8 is formed by performing electrolytic plating or the like on the inner wall surface of the through-hole S. A plurality of through holes S are formed, and the diameter is set to, for example, 0.1 mm or more and 1 mm or less. After that, a region surrounded by the through-hole conductor 8 is filled with a resin such as polyimide to form an insulator 9. Next, the material constituting the ground layer 6b is deposited on the upper and lower surfaces of the core substrate 5 by a conventionally known vapor deposition method, CVD method, sputtering method, or the like. Then, a resist is applied to the surface, and after exposure and development, an etching process is performed to form a ground layer 6b as a first conductive layer on the upper and lower surfaces of the core substrate 5. In this way, the core substrate 5 shown in FIG. 5A can be prepared.

  Next, a film body 15 having a metal film 14 on the surface is prepared on the film layer 7b. As the film layer 7b, for example, a film made of polyparaphenylene benzbisoxazole resin is used. Then, a first metal layer 14a made of, for example, nickel or chromium is formed on the film layer 7b by sputtering. Further, a second metal layer 14b made of, for example, copper is formed on the first metal film 14a by sputtering. In this way, the metal film 14 whose surface is formed in an uneven shape can be formed on the film layer 7b.

And the film body 15 which apply | coated the adhesive layer 7a containing the filler 11 previously by the conventionally well-known die-coating method etc. is bonded together to the upper surface of the ground layer 6b of the core board | substrate 5. At this time, the film body 15 is bonded to the core substrate 5 so that the surface of the metal film 14 is exposed. Furthermore, after pressurizing the film body 15 and the adherent layer 7a while being heated using, for example, a heating press device, the film body 15 and the adherent layer 7a are cooled, thereby, as shown in FIG. Thus, the film body 15 can be fixed to the core substrate 5. In addition, the temperature which heats the film body 15 and the contact bonding layer 7a is a temperature lower than the thermal decomposition temperature of the contact bonding layer 7a, and is the temperature which the contact bonding layer 7a solidifies. That is, the heating temperature is, for example, 50 ° C. or higher and 150 ° C. or lower. Here, the thermal decomposition temperature is a temperature at which a part of the resin disappears due to decomposition, evaporation or sublimation by applying heat to the resin in a solidified state, and the weight of the resin is reduced by 5%. Say.

  The pressure for pressurizing the film body 15 is a pressure that does not crush the irregularities on the surface of the metal film 14, and is a pressure at which the adhesive layer 7 a does not protrude between the film body 15 and the core substrate 5. That is, the pressure to pressurize is 0.5 MPa or more and 5 MPa or less, for example. The thickness dimension of the film layer 7b is set to 7.5 μm, for example, and the thickness dimension of the adhesive layer 7 is set to 3 μm.

Next, as shown in FIG. 6A, a through hole B is formed in the metal film 14 and the insulating layer 7 using, for example, a YAG laser device or a CO ₂ laser device. The through-hole B can be formed by irradiating laser light toward the main surface of the metal film 14 from a direction perpendicular to the main surface of the metal film 14. As a result, a part of the ground layer 6b is exposed at the bottom of the through hole. The output of the laser beam is set so that the energy is 1.0 × 10 ⁻³ J or more and 5.0 × 10 ⁻¹ J or less. By irradiating the laser beam toward the metal film 14 for a period of 1.0 × 10 ⁻³ seconds to 1.0 seconds, the through hole B can be formed. A laser beam is first irradiated on the upper surface of the metal film 14, and the insulating layer 7 is sublimated around the irradiated portion, whereby a through hole B having a lower width than the upper portion is formed in the insulating layer 7.

  The bottom surface and the inner wall surface of the through hole B are irradiated with laser light, so that a burned residue (referred to as smear) such as a part of the film layer 7b and a part of the adhesive layer 7a is attached. Therefore, the desmear process which removes the burning residue of the through-hole B is performed. In the desmear process, plasma treatment may be performed using, for example, argon gas plasma using microwaves or oxygen gas plasma.

  Then, as shown in FIG. 6B, the sputtered film 12 is formed on the inner wall surface of the through hole B by using an anisotropic sputtering method. In the anisotropic sputtering method, the core substrate 5 is not tilted with respect to the sputtering source, but is disposed so as to prevent the sputtered film 12 from being deposited on the inner wall surface of the through-hole B thicker than the metal film 14. To do. Then, the sputtered film 12 is formed on the inner wall surface of the through hole B by rotating the core substrate 5 with respect to the sputter source. In this way, the sputtered film 12 serving as the base for plating can be provided in the through hole B. The angle at which the core substrate 5 is tilted with respect to the sputtering source is set to, for example, 5 ° to 45 °. As the sputtered film 12, for example, copper is used.

  Next, a resist R is applied on the metal film 14, and the resist R is patterned as shown in FIG. 7A by using a conventionally known thin film processing technique.

  Then, as shown in FIG. 7B, the sputtered film 12 on the exposed metal film 14 and the inner wall surface of the through hole B is plated and grown by electroplating to form a second conductive layer on the metal film 14. In addition, the via conductor 10 connected to a part of the ground layer 6b and a part of the signal line 6a can be formed in the through hole B. The via conductor 10 formed by electroplating has a higher density of molecules constituting the via conductor than a via conductor formed by electroless plating, and cracks are less likely to occur due to heat from the outside. Moreover, according to the electroplating method, since the growth of the plating that becomes the via conductor 10 occurs from the bottom of the through hole, it is easy to fill the through hole with the plating.

  Next, as shown in FIG. 8A, the deposited resist R is etched on one main surface of the core substrate 5 to form a signal line 6a as a second conductive layer. When etching, the metal film 14 formed immediately below the resist R is also etched.

  Moreover, the insulating layer 7 can be formed also on the other main surface of the core substrate 5 and the via conductor 10 can be formed using the method described above. Furthermore, by repeating the above-described stacking process of the insulating layer 7 and the conductive layer 6, a wiring board having a multilayer wiring can be manufactured as shown in FIG. 8B. Then, the mounting structure 1 shown in FIG. 1 can be manufactured by flip-chip mounting the semiconductor element 4 on the wiring board 2 via the bumps 3.

  According to the above-described method for manufacturing a wiring board, the film body 15 having the metal film 14 having an uneven surface on the core substrate 5 can be bonded, and the conductive layer 6 can be formed on the metal film 14. In the prior art, an etching solution was applied on an insulating layer or a core substrate, and the surface was melted to form irregularities, and a conductive layer was formed on the irregularities, but dense irregularities could not be formed. It was. Therefore, according to the prior art, since the insulating layer could only be etched roughly, the conductive layer was easily peeled from the insulating layer and the core substrate. In particular, as the width of the conductive layer is reduced and the wiring pattern is made finer, the conductive layer becomes easier to peel from the core substrate, and the electrical reliability of the wiring substrate cannot be maintained. In contrast, according to the method for manufacturing a wiring board according to the embodiment of the present invention, as described above, the metal film 14 having dense irregularities is formed on the film layer 7b in advance, and the conductive layer 6 is formed on the irregularities. Therefore, the conductive layer 6 can be made difficult to peel from the metal film 14.

  Moreover, in the method of roughening the surface of the insulating layer or the core substrate with an etching solution as in the prior art, the region that is easily etched and the region that is difficult to etch depend on the distribution of the material constituting the insulating layer or the core substrate. There is. For this reason, a large number of defective wiring boards are generated. On the other hand, in the embodiment of the present invention, a fine uneven metal film can be formed on the upper surface of the insulating layer or core substrate without depending on the material constituting the insulating layer or core substrate. Generation can be reduced and manufacturing yield can be improved.

  In the prior art, since the insulating layer or the core substrate is immersed in the etching solution, the rigidity of the insulating layer or the core substrate may be weakened by the etching solution. On the other hand, according to the embodiment of the present invention, since the surface of the insulating layer or the core substrate is not roughened by the etching solution, it is possible to suppress the rigidity of the insulating layer or the core substrate from being weakened.

  Further, the etching process is unnecessary on the insulating layer as in the prior art, and if the film body is prepared in advance, the manufacturing process can be simplified.

  In addition, this invention is not limited to the above-mentioned form, A various change, improvement, etc. are possible in the range which does not deviate from the summary of this invention. For example, in the above-described embodiment, the via conductor 10 is formed by the electroplating method, but the via conductor 10 may be formed by using an electroless plating method. The metal film may be formed by a vapor deposition method as long as a metal film having fine unevenness can be formed. When such a vapor deposition method is used, the metal film can be formed on the film layer 7b using a roll-to-roll continuous vacuum vapor deposition apparatus.

It is sectional drawing of the mounting structure containing the wiring board which concerns on embodiment of this invention. It is an expanded sectional view of a via conductor concerning an embodiment of the present invention. It is a partial expanded sectional view of a via conductor concerning an embodiment of the present invention. 4A and 4B are enlarged cross-sectional views of a part of the via conductor according to the embodiment of the present invention. 5A and 5B are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention. 6A and 6B are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention. FIGS. 7A and 7B are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention. FIGS. 8A and 8B are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Mounting structure 2 Wiring board 3 Bump 4 Semiconductor element 5 Core board 6 Conductive layer 6a Signal line 6b Ground layer 7 Insulating layer 7a Adhesive layer 7b Film layer 8 Through-hole conductor 9 Insulator 10 Via conductor 11 Filler 12 Sputtered film 13 Conductor Part 14 Metal film 14a First metal layer 14b Second metal layer 15 Film body S Through hole B Through hole

Claims (4)

Preparing a film body having a metal film formed on the film layer and a substrate on which the first conductive layer is formed;
Bonding the film body onto the first conductive layer so that the surface of the metal film is exposed;
Forming a through hole that penetrates a part of the metal film and the film layer located immediately below the metal film, and exposes a part of the first conductive layer;
Forming a second conductive layer on the metal film and forming a via conductor connected to a part of the first conductive layer and a part of the second conductive layer in the through hole;
A method of manufacturing a wiring board, comprising: In the manufacturing method of the wiring board of Claim 1,
The metal film is formed by a sputtering method,
Forming the sputtered film on the inner wall surface of the through-hole using a sputtering method after forming the through-hole;
A method of manufacturing a wiring board, comprising: In the manufacturing method of the wiring board of Claim 2,
A part of the sputtered film extends to the metal film,
A method of manufacturing a wiring board, wherein the thickness of the sputtered film deposited on the bottom of the through hole is thinner than the thickness of the sputtered film deposited on the metal film. In the manufacturing method of the wiring board of Claim 2,
The method of manufacturing a wiring board, wherein the sputtering method for forming the sputtered film is anisotropic sputtering.

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