JP2009104177A - Electro-optical device and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electro-optical device, which ensures a sufficient current capacity or controls fluctuation of luminance in a light-emitting device due to fluctuation of a supply voltage, and also which is suited for narrowing a frame region. <P>SOLUTION: In the electro-optical device, a linewidth of at least one power source line among a plurality of power source lines 103R, 103G, and 103 B is narrowed by at least partially consisted of a conductive film arranged in a first wiring layer 135 and a conductive film arranged in a second wiring layer 136. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an electro-optical device and an electronic apparatus.

  In recent years, an organic EL (electroluminescence) display device provided with a light emitting element using an organic light emitting material between a substrate on which a pixel electrode is formed and a common electrode has attracted attention (for example, see Patent Document 1). .

  In the organic EL display device, the light emitting element emits light when current is supplied to the light emitting element. At that time, the luminance of the light emitting element is basically determined by the amount of current supplied.

Japanese Patent Laid-Open No. 5-3080

  As described above, since the luminance of the light emitting element is basically determined by the amount of current supplied, it is necessary to accurately set the current amount to a desired value.

  Further, if a sufficient amount of current is to be secured, the width of the wiring for supplying the current increases, the frame area increases, and this may cause trouble when mounted on various electronic devices.

  The present invention has been made in view of the above circumstances, and it is a first object of the present invention to secure a sufficient amount of current or to suppress fluctuations in luminance of a light emitting element due to fluctuations in power supply voltage. It is another object of the present invention to provide a light-emitting device and an electronic device that can satisfy the above-described requirements and can reduce the frame.

  In order to achieve the above object, the present invention employs the following configuration.

  An electro-optical device according to the present invention includes a plurality of pixels each including an electro-optical element having a functional layer sandwiched between a first electrode and a second electrode provided in an effective region on a substrate; An electrode wiring connected to the second electrode outside the effective area, a connection wiring connected to the first electrode via an active element, and provided at least in the effective area, and the effective area And at least a part of the electrode wiring is made of a first conductive film provided in a first wiring layer, and at least a part of the power supply line is a second power line. The second conductive layer is formed of a second conductive film provided in a wiring layer, and the first wiring layer and the second wiring layer are formed to be separated from each other by an interlayer insulating film, and at least a part of the first conductive film and the At least a portion of the second conductive film is Characterized in that it is disposed turned by.

  The electro-optical device according to the aspect of the invention is the electro-optical device described above, wherein the second conductive film is formed between the first conductive film and the substrate.

  The electro-optical device according to the aspect of the invention is the electro-optical device described above, in which the second conductive film is connected to the connection wiring through a contact portion provided in the interlayer insulating film. Features.

  The electro-optical device according to the aspect of the invention is the electro-optical device described above, wherein the connection wiring includes a third conductive film provided in the second wiring layer.

  The electro-optical device according to the aspect of the invention is the electro-optical device described above, wherein the active element is a transistor, and the gate electrode of the transistor includes a conductive film provided in the first wiring layer. The source or drain electrode of the transistor is made of a conductive film provided in the second wiring layer.

  The electro-optical device of the present invention is the above-described electro-optical device, wherein the functional layer is made of an organic electroluminescent material.

  In the first electro-optical device of the present invention, a plurality of light-emitting power supply wirings are arranged on the first layer on the substrate, and the plurality of connection wirings for connecting the light-emitting power supply wirings to the corresponding electrodes are the first layer. The electro-optical device is disposed in a second layer electrically insulated from the light emitting power supply wiring, and the light emitting power supply wiring located on the outermost side among the plurality of light emitting power supply wirings is the first layer and the second layer. It is characterized by being provided in both.

  Since the power supply wiring for light emission located on the outermost side does not overlap with the wiring for connection in a plan view, it can also be provided in the second layer. Thus, in the present invention, if the light-emitting power supply wirings provided in the first layer and the second layer are electrically connected, the width of the light-emitting power supply wiring in each layer as compared with the case where it is provided in only one layer. Can be reduced. Therefore, according to the present invention, the frame of the panel can be reduced by the amount corresponding to the reduction in the width of the light-emitting power supply wiring.

  In the electro-optical device, it is preferable that at least the connection wiring connected to the light emission power supply wiring located at the innermost side among the plurality of light emission power supply wirings is provided in the first layer.

  Since the connection wiring connected to the innermost light-emitting power supply wiring does not overlap with other than the light-emitting power supply wiring, it can be provided in the first layer.

  Therefore, in the present invention, the other connection wiring provided in the second layer can be made thicker by the width of the connection wiring, and the manufacture of the connection wiring can be facilitated. In addition, the contact between the outermost and inner light-emitting power supply wirings and the connection wirings becomes unnecessary, and the dependency of contact resistance can be reduced.

  A configuration in which a hole injecting / transporting layer and a light emitting layer made of an organic electroluminescent material formed adjacent to the hole injecting / transporting layer are provided on the electrode can be employed.

  Therefore, according to the present invention, it is possible to obtain a small panel with small contact resistance dependency that emits light by applying a driving current to the electrodes via the light-emitting power supply wiring and the connection wiring.

  The second electro-optical device of the present invention includes a light-emitting power supply wiring connected to the first electrode around the first electrode region where the first electrode is arranged in a matrix on the substrate, and the first electrode. The second electrode wiring connected to the second electrode sandwiching the functional layer between the light emitting power supply wiring and the second electrode wiring in plan view It is characterized in that sometimes at least a part is arranged to overlap each other.

  In the electro-optical device, it is preferable that an interlayer insulating layer is disposed between the light-emitting power supply wiring and the second electrode wiring. As a result, in the above electro-optical device, the light-emitting power supply wiring and the second electrode wiring overlap in plan view, so that the area occupied by these wirings can be reduced, and the frame of the panel can be narrowed. Become. Further, at least a part of the power supply wiring for light emission and the wiring for the second electrode overlap each other to form a capacitance, and the potential fluctuation of the driving current can be further reduced to stably display an image. Can do.

  In the above electro-optical device, it is preferable to dispose an interlayer insulating layer between the light-emitting power supply wiring and the second electrode wiring. Thereby, the light-emitting power supply wiring and the second electrode wiring can be insulated.

  In the electro-optical device described above, a configuration in which one of the light-emitting power supply wiring and the second electrode wiring is disposed in a region occupied by the other can be employed.

  As a result, in the present invention, it is not necessary to separately provide a region in which any one of the light-emitting power supply wiring and the second electrode wiring is disposed in a plan view, which can further contribute to narrowing the frame.

  As the functional layer, a structure in which a hole injection / transport layer and a light emitting layer made of an organic electroluminescence material formed adjacent to the hole injection / transport layer can be employed.

  Therefore, in the present invention, it is possible to obtain a small panel that emits light by applying a driving current to the first electrode through the light-emitting power supply wiring.

  A third electro-optical device of the present invention includes a plurality of pixels including an electro-optical element having a functional layer sandwiched between a first electrode and a second electrode provided in an effective area on a substrate. An electrode wiring connected to the second electrode outside the effective area, a connection wiring connected to the first electrode via an active element, and provided at least in the effective area; And at least a portion of the power supply line electrically connects the plurality of conductive films and the plurality of conductive films separated by an interlayer insulating film. It is characterized by being formed by a conductive material connected to the.

  A fourth electro-optical device of the present invention includes a plurality of electro-optical elements having a functional layer sandwiched between a first electrode and a second electrode provided in an effective region on a substrate. A pixel, an electrode wiring connected to the second electrode outside the effective area, a connection wiring connected to the first electrode via an active element, and provided at least in the effective area; A power line connected outside the effective area, and a plurality of the power lines are provided outside the effective area, and the power line is farthest from the effective area. At least a portion of the power supply line provided at the position is formed of a plurality of conductive films separated by an interlayer insulating film and a conductive material that electrically connects the plurality of conductive films to each other. To do.

  By multilayering the power supply lines as in the electro-optical device described above, the line width per layer can be reduced as compared with the case where the power supply lines are configured by only one wiring layer. This makes it possible to narrow the frame while securing a sufficient amount of current.

  A fifth electro-optical device of the present invention includes a plurality of electro-optical elements including a functional layer sandwiched between a first electrode and a second electrode provided in an effective region on a substrate. A pixel, an electrode wiring connected to the second electrode outside the effective area, a connection wiring connected to the first electrode via an active element, and provided at least in the effective area; A power line connected outside the effective area, and a plurality of the power lines are provided outside the effective area, and the power line is closest to the effective area. The power supply line provided at the position is formed by a conductive film provided only in one wiring layer.

  A sixth electro-optical device of the present invention includes a plurality of electro-optical elements including a functional layer sandwiched between a first electrode and a second electrode provided in an effective area on a substrate. A pixel, an electrode wiring connected to the second electrode outside the effective region, a connection wiring connected to the first electrode via an active element, and provided at least in the effective region; A power line connected outside the effective area, and connected to the first electrode outside the effective area via a connection wiring provided in the effective area. The line width of the connection wiring is different from the width of the power supply line to which the connection wiring is connected.

  In the effective area, it may be necessary to reduce the line width of the connection wiring in accordance with the pixel pitch. On the other hand, a sufficient amount of current is supplied to the pixel through the connection wiring. There is a need. Therefore, in the above electro-optical device, it is possible to ensure the current amount corresponding to the pixel pitch by making the line width of the power supply line larger than the line width of the connection wiring. .

  A seventh electro-optical device of the present invention includes a plurality of electro-optical elements having a functional layer sandwiched between a first electrode and a second electrode provided in an effective area on a substrate. A pixel, an electrode wiring connected to the second electrode outside the effective region, a connection wiring connected to the first electrode via an active element, and provided at least in the effective region; The connection wiring and the power supply line connected outside the effective area, and the line width of the first portion and the second portion of the connection wiring are different from each other. Features.

In the above electro-optical device, the first portion is, for example, the contact portion in the vicinity of the contact portion where the connection wiring is connected to the power supply line, and the second portion is, for example, , A portion that is closer to or in the effective area than the first portion. In this case, it is preferable that the line width of the first portion is larger than the line width of the second portion.
In this way, by providing portions with different line widths in the same wiring such as the connection wiring, the amount of current supplied due to voltage drop or increased resistance resulting from differences in the line width or material in the contact portion etc. Fluctuations and instability can be mitigated.

  An eighth electro-optical device of the present invention includes a plurality of electro-optical elements having a functional layer sandwiched between a first electrode and a second electrode provided in an effective region on a substrate. A pixel, an electrode wiring connected to the second electrode outside the effective region, a connection wiring connected to the first electrode via an active element, and provided at least in the effective region; A plurality of the connection wirings, and at least one of the plurality of connection wirings is a plurality of different wirings. It is characterized by comprising a conductive film provided in each of the layers and a conductive material connecting the conductive films to each other.

  On the effective area, it is preferable that all the connection wirings are basically provided in the same layer. On the other hand, since there are many contact portions in the vicinity of the contact portion of the connection wiring with the power supply line, the connection wiring is at least in the vicinity of the contact portion of the connection wiring with the power supply line. It is disadvantageous for effective use of a limited space to provide all of the above in the same layer. Therefore, the above two requirements can be satisfied by configuring at least one of the connection wirings using different wiring layers as in the electro-optical device described above.

  A ninth electro-optical device of the present invention includes a plurality of electro-optical elements having a functional layer sandwiched between a first electrode and a second electrode provided in an effective region on a substrate. A pixel, an electrode wiring connected to the second electrode outside the effective area, a connection wiring connected to the first electrode via an active element, and provided at least in the effective area; A power line connected outside the effective area, and between the first conductive film and at least one portion of the electrode wiring between the substrate and the power line. A second conductive film constituting at least a portion is formed, and the first conductive film and the second conductive film are formed to be separated from each other by an interlayer insulating film, and the first conductive film At least a portion of a conductive film and at least a portion of the second conductive film; , Characterized in that it is arranged to overlap.

  As in the electro-optical device, the frame region can be reduced by laminating the power supply line and the electrode wiring through an interlayer insulating film. Furthermore, since a capacitor can be formed between the power supply line and the electrode wiring, the effect of reducing voltage fluctuation is also achieved.

  In the above electro-optical device, it is preferable that the second conductive film is connected to the connection wiring through a contact portion provided in the interlayer insulating film.

  In the above electro-optical device, the functional layer may be made of an organic electroluminescent material.

  An electronic apparatus according to an aspect of the invention includes the above electro-optical device.

It is a figure which shows embodiment of this invention, Comprising: It is a plane schematic diagram of the wiring structure of a display apparatus. It is a plane schematic diagram of the display apparatus of 1st Embodiment. FIG. 3 is a cross-sectional view taken along line AA ′ in FIG. 2. FIG. 4 is an enlarged view of the cross-sectional view shown in FIG. 3. It is an enlarged view of the power supply line and the connection wiring connected to each power supply line in the first embodiment. (A)-(d) is process drawing explaining the manufacturing method of the display apparatus of embodiment of this invention. (A)-(c) is process drawing explaining the manufacturing method of the display apparatus of embodiment of this invention. (A)-(c) is process drawing explaining the manufacturing method of the display apparatus of embodiment of this invention. (A)-(c) is process drawing explaining the manufacturing method of the display apparatus of embodiment of this invention. It is a plane schematic diagram of the display apparatus of 2nd Embodiment. It is AA 'line sectional drawing in FIG. It is an enlarged view of the power supply line and the connection wiring connected to each power supply line in the second embodiment. It is a figure which shows an example of the electronic device provided with the organic electroluminescent display apparatus, (a) is a mobile phone, (b) is a wristwatch-type electronic device, (c) is a perspective view of a portable information processing apparatus, respectively.

[First Embodiment]
Hereinafter, embodiments of an electro-optical device and an electronic apparatus according to the present invention will be described with reference to FIGS. In each of the drawings shown below, the scale of each layer and each member is different in order to make each layer and each member recognizable on the drawing.

FIG. 1 is a schematic plan view of a wiring structure of an electro-optical device according to the present invention.
As shown in FIG. 1, the display device (electro-optical device) 1 according to this embodiment includes a plurality of scanning lines 101, a plurality of data lines 102 extending in a direction intersecting the scanning lines 101, and the data lines 102. A plurality of connection wirings 99 extending in parallel are arranged, and a pixel region A is provided corresponding to the intersection of the scanning line 101 and the data line 102.

  A data side driving circuit 104 including a shift register, a level shifter, a video line, an analog switch, and the like is connected to the data line 102. Further, a scanning side drive circuit 105 including a shift register, a level shifter, and the like is connected to the scanning line 101. Further, in each of the pixel regions A, a switching thin film transistor 112 to which a scanning signal is supplied to the gate electrode through the scanning line 101 and a pixel signal shared from the data line 102 through the switching thin film transistor 112. , A driving thin film transistor 123 in which a pixel signal held by the holding capacitor cap is supplied to the gate electrode as a voltage, and the driving thin film transistor 123 and connection wiring 99 (99R, 99G, 99B). ), A pixel electrode (electrode) 111 into which a drive current flows from the power supply line 103 when electrically connected to the power supply line (light-emitting power supply wiring) 103, and the pixel electrode 111 and the common electrode (cathode) 12 And a functional layer 110 sandwiched between them. The pixel electrode 111, the common electrode 12, and the functional layer 110 constitute a light emitting element.

  According to such a configuration, when the scanning line 101 is driven and the switching thin film transistor 112 is turned on, the potential of the data line 102 at that time is held in the holding capacitor cap, and the driving is performed according to the state of the holding capacitor cap. The conduction state of the thin film transistor 123 is determined. Then, a current flows from the power supply line 103 to the pixel electrode 111 via the connection wiring 99 and the thin film transistor 123 through the channel of the driving thin film transistor 123, and further a current flows to the common electrode 12 via the functional layer 110. . The functional layer 110 emits light according to the amount of current flowing through it.

  FIG. 2 is a schematic plan view of the electro-optical device according to this embodiment.

  The substrate 2 is a transparent substrate such as glass, for example, and includes a display region (electrode region) 2a located at the center of the substrate 2, and a non-effective region 2b disposed on the outer periphery of the effective region 2a at the periphery of the substrate 2. It is divided into and. The effective area 2a is an area formed by the pixel R, the pixel G, and the pixel B having light emitting elements arranged in a matrix, and is a display area that actually contributes to display. Each of the pixel R, the pixel G, and the pixel B corresponds to red, green, and blue pixels.

  The common electrode wiring 12a connected to the common electrode 12 is formed in a U shape so as to surround three of the four sides forming the outer periphery of the effective region 2a.

  The power supply line 103 is provided between the effective region 2a and the common electrode wiring 12a. The power supply line 103R, the power supply line 103G, and the power supply line 103B supply power supply voltages to the pixels R, G, and B through the connection wirings 99R, 99G, and 99B shown in FIG. .

Power lines 103R, 103G, among 103B, the power supply line 103B which is positioned farthest from the effective region 2a has a double wiring structure, a contact hole 103B ₃ is provided for performing vertical conduction Yes.

  An inspection circuit 106 is provided between the effective region 2a and the power supply line 103 between the power supply line 103R closest to the effective region 2a and the effective region 2a. The inspection circuit 106 is used for inspecting the quality and defects of the display device during the manufacturing process and shipping.

  A flexible substrate 5 having a driving IC 6 is attached to the side of the substrate 2 opposite to the inspection circuit 106 with respect to the effective area 2a. Both the common electrode wiring 12a and the power supply line 103 are connected to the driving IC 6 through the wiring 5a.

  A region between the effective region 2a and the power supply line 103R and a region between the effective region 2a and the power supply line 103G in a direction facing the side of the substrate 2 from the side of the substrate 2 where the flexible substrate 5 is attached. A scanning line driving circuit 105 is provided in each region. The control signal wiring 105a for the control drive circuit and the power supply wiring 105b for the drive circuit for supplying the control signal and the power supply voltage to the scan line drive circuit 105 are the region between the scan line drive circuit 105 and the power supply line 103R, and scanning. It is provided in a region between the line drive circuit 105 and the power supply line 103G.

  FIG. 3 is a schematic cross-sectional view taken along the line AA ′ in FIG. As shown in FIG. 3, an active element layer 14 is provided between the substrate 2 and the light emitting element portion 11 including the light emitting element and the bank portion provided corresponding to the effective region 2a, and the active element layer 14 includes The scanning line, the data line, the storage capacitor, the switching thin film transistor 112, the driving thin film transistor 123, and the like are provided.

  Further, the above-described power supply lines 103 (103R, 103G, 103B) are wired corresponding to the ineffective area 2b of the active element layer. A part of the ineffective area 2b is used as the dummy area 2d. The dummy region 2d is a region used to stabilize the discharge amount of the material forming the light emitting element prior to forming the light emitting element 110 mainly using an ink jet process. It is an area to do.

  The above-described scanning side drive circuit 105, drive circuit control signal wiring 105a, and drive circuit power supply wiring 105b are provided in the active element layer 14 below the dummy region 2d. Although not shown in FIG. 3, a dummy region 2 d may be provided above the inspection circuit 106.

The power supply line 103 </ b> R is formed using a conductive film provided in the first wiring layer 135. Similarly, the power supply line 103G is also formed using a conductive film provided in the first wiring layer 135. On the other hand, the power supply line 103B has a double wiring structure as described above. Specifically, a conductive film provided in the first wiring layer 135 and a conductive film provided in the second wiring layer 136 are configured. Between the two conductive films described above, along with being provided with a first interlayer insulating film 144a, a contact hole provided in the first interlayer insulating film 144a (corresponding to the contact hole 103B ₃ shown in FIG. 2) The two conductive films are electrically connected via each other.

  Specifically, the common electrode wiring 12 a includes a conductive film provided in the first wiring layer 135 and a conductive film provided in the second wiring layer 136.

  The light emitting element portion 11 is covered with the sealing portion 3. The sealing unit 3 includes a sealing resin 603 provided on the active element layer 14 and a sealing substrate 604. The sealing resin 603 is made of a thermosetting resin, an ultraviolet curable resin, or the like, and is particularly preferably made of an epoxy resin that is a kind of thermosetting resin. The sealing resin 603 is disposed along the outer periphery of the substrate and is formed by, for example, a microdispenser. This sealing resin 603 joins the active element layer 14 and the sealing can 604, and water or oxygen is supplied to the space formed by the light emitting element portion 11 between the active element layer 14 and the sealing substrate 604. Intrusion is prevented, and deterioration of a light emitting layer (not shown) formed in the common electrode 12 or the light emitting element portion 11 is prevented.

  The sealing substrate 604 is made of, for example, glass, plastic, metal, or the like, and a concave portion 604a that houses the light emitting element portion 11 is provided inside thereof. In addition, a getter agent 605 that absorbs water, oxygen, and the like is disposed in the recess 604a, and can absorb water or oxygen that has entered the space formed by the sealing substrate 604 and the light emitting element portion 11. . The getter agent 605 may be omitted.

  The aluminum forming the common electrode 12 reflects light emitted from the light emitting layer 110b toward the substrate 2 and is preferably made of an Ag film, an Al film, a laminated film of Al and Ag, or the like. Further, the thickness is preferably in the range of, for example, 100 to 1000 nm, particularly about 200 nm.

Further, a protective layer 15 for protecting the common electrode 12 made of SiO, SiO ₂ , SiN or the like may be provided on the aluminum.

The protective layer 15 covers the common electrode 12 and protects the connection portion between the common electrode wiring 12 a and the common electrode 12. Further, the protective layer 15 extends to the lower side of the sealing resin 603 and is interposed between the sealing resin 603 and the active element layer 14.
Next, FIG. 4 shows an enlarged view of the cross-sectional structure of the display region in the display device. FIG. 4 shows three pixel areas A. The display device 1 is configured by sequentially laminating an active element layer 14 in which a circuit such as a TFT is formed on a substrate 2 and a light emitting element portion 11 in which a functional layer 110 is formed.

  In the display device 1, light emitted from the functional layer 110 to the substrate 2 side passes through the active element layer 14 and the substrate 2 and is emitted to the lower side (observer side) of the substrate 2, and the functional layer 110. The light emitted from the opposite side of the substrate 2 is reflected by the common electrode 12, passes through the active element layer 14 and the substrate 2, and is emitted to the lower side (observer side) of the substrate 2. Note that light emitted from the common electrode side can be emitted by using a transparent material as the common electrode 12. As the transparent material, for example, ITO, Pt, Ir, Ni, or Pd can be used. The film thickness is preferably about 75 nm, more preferably less than this film thickness.

  In the active element layer 14, a base protective film 2c made of a silicon oxide film is formed on the substrate 2, and an island-shaped semiconductor film 141 made of polycrystalline silicon is formed on the base protective film 2c. In the semiconductor film 141, a drain region 141a and a source region 141b are formed by high concentration B ion implantation. A portion where B is not introduced is a channel region 141c.

  Further, a transparent gate insulating film 142 covering the base protective film 2c and the semiconductor film 141 is formed on the active element layer 14, and a gate electrode 143 made of Al, Mo, Ta, Ti, W or the like is formed on the gate insulating film 142. (Scanning line 101) is formed, and transparent first interlayer insulating film 144a and second interlayer insulating film 144b are formed on gate electrode 143 and gate insulating film 142. The gate electrode 143 is provided at a position corresponding to the channel region 141c of the semiconductor film 141.

  In addition, contact holes 145 and 146 are formed through the first and second interlayer insulating films 144a and 144b and connected to the drain and source regions 141a and 141b of the semiconductor film 141, respectively. A transparent pixel electrode 111 made of ITO or the like is patterned and formed in a predetermined shape on the second interlayer insulating film 144b, and the drain region 141a is connected to the pixel electrode 111 through a contact hole 145. Yes. The source region 141b is connected to the connection wiring 99 through the contact hole 146. In this manner, the driving thin film transistor 123 connected to each pixel electrode 111 is formed in the active element layer 14. The active element layer 14 is also formed with the storage capacitor cap and the switching thin film transistor 112 described above, but these are not shown in FIG.

  Next, as shown in FIG. 4, the light emitting element portion 11 is formed on the functional layer 110, the functional layer 110 stacked on each of the plurality of pixel electrodes 111, the bank portion 112 that partitions each functional layer 110, and the functional layer 110. The common electrode 12 is used as a main component. The pixel electrode 111, the functional layer 110, and the common electrode 12 constitute a light emitting element. Here, the pixel electrode 111 is made of, for example, ITO, and is formed by patterning into a substantially rectangular shape in plan view. The thickness of the pixel electrode 111 is preferably in the range of 50 to 200 nm, particularly about 150 nm. The bank part 112 is configured by laminating an inorganic bank layer 112 a located on the substrate 2 side and an organic bank layer 112 b located away from the substrate 2.

  The inorganic bank layer 112 a and the organic bank layer 112 b are formed on the peripheral edge of the pixel electrode 111. In plan view, the periphery of the pixel electrode 111 and the inorganic bank layer 112a are arranged so as to overlap in plan view. The same applies to the organic bank layer 112b, and the organic bank layer 112b is disposed so as to overlap a part of the pixel electrode 111 in a planar manner. The inorganic bank layer 112a is further formed on the center side of the pixel electrode 111 than the organic bank layer 112b. In this manner, each first stacked portion 112e of the inorganic bank layer 112a is formed inside the pixel electrode 111, so that a lower opening 112c corresponding to the formation position of the pixel electrode 111 is provided.

  An upper opening 112d is formed in the organic bank layer 112b.

  The upper opening 112d is provided so as to correspond to the formation position of the pixel electrode 111 and the lower opening 112c. As shown in FIG. 4, the upper opening 112d is wider than the lower opening 112c and narrower than the pixel electrode 111. In some cases, the upper position of the upper opening 112d and the end of the pixel electrode 111 are substantially the same position. In this case, as shown in FIG. 4, the cross section of the upper opening 112d of the organic bank layer 112b is inclined.

The inorganic bank layer 112a is preferably made of an inorganic material such as SiO ₂ or TiO ₂ . The film thickness of the inorganic bank layer 112a is preferably in the range of 50 to 200 nm, particularly 150 nm.
Furthermore, the organic bank layer 112b is formed of a heat resistant and solvent resistant material such as an acrylic resin or a polyimide resin. The thickness of the organic bank layer 112b is preferably in the range of 0.1 to 3.5 μm. If the thickness of the organic bank layer 112b is 2 μm or more, the signal wiring such as the data line 102 or the scanning line 101 and the common electrode 12 can be sufficiently separated from each other. Therefore, problems such as signal delay and dullness can be reduced.

  In the bank portion 112, a region showing lyophilicity and a region showing liquid repellency are formed. The regions showing lyophilicity are the first stacked portion 112e of the inorganic bank layer 112a and the electrode surface 111a of the pixel electrode 111. These regions are surface-treated lyophilically by plasma treatment using oxygen as a processing gas. ing. The regions exhibiting liquid repellency are the wall surface of the upper opening 112d and the upper surface 112f of the organic bank layer 112. The surface of these regions is fluorinated by plasma treatment using tetrafluoromethane as a precursor ( Processed to be liquid repellent). The organic bank layer may be formed of a material containing a fluoropolymer.

  The functional layer 110 includes a hole injection / transport layer 110a stacked on the pixel electrode 111, and a light emitting layer 110b made of an organic electroluminescence material formed adjacent to the hole injection / transport layer 110a. ing. Note that another functional layer having a function such as an electron injecting and transporting layer may be further formed adjacent to the light emitting layer 110b.

  The hole injection / transport layer 110a has a function of injecting holes into the light emitting layer 110b and a function of transporting holes inside the hole injection / transport layer 110a. By providing such a hole injecting / transporting layer 110a between the pixel electrode 111 and the light emitting layer 110b, device characteristics such as light emitting efficiency and life of the light emitting layer 110b are improved. Further, in the light emitting layer 110b, the holes injected from the hole injection / transport layer 110a and the electrons injected from the common electrode 12 are recombined in the light emitting layer, and light emission is obtained.

The hole injection / transport layer 110a includes a flat portion 110a ₁ formed on the pixel electrode surface 111a located within the lower opening 112c, the first laminated portion of the inorganic bank layer located within the upper opening 112d and a peripheral edge portion 110a ₂ formed on 112e. Further, depending on the structure, the hole injection / transport layer 110a is formed only on the pixel electrode 111 and between the inorganic bank layers 110a (the lower opening 110c) (on the flat portion described above). Some forms are only formed). The flat portion 110a ₁ has a constant thickness and is formed in a range of, for example, 50 to 70 nm.

In the case where the peripheral edge portion 110a2 is formed, the peripheral edge portion 110a2 is positioned on the first stacked portion 112e and is in close contact with the wall surface of the upper opening 112d, that is, the organic bank layer 112b. The peripheral edge 110a ₂ is thin on the side close to the electrode surface 111a, increases along the direction away from the electrode surface 111a, and is thickest near the wall surface of the lower opening 112d.

  The reason why the peripheral edge 110a2 has the shape as described above is that the hole injection / transport layer 110a discharges the first composition containing the hole injection / transport layer forming material and the polar solvent into the opening 112. The polar solvent is volatilized mainly on the first stacked portion 112e of the inorganic bank layer, and the hole injection / transport layer forming material is formed on the first stacked portion 112e. This is because it was concentrated and precipitated on the surface.

The light-emitting layer 110b, the hole injecting / transporting layer is formed over the upper flat portion 110a ₁ and the peripheral portion 110a ₂ of the 110a, and the thickness of over flat portion 112a ₁ is in the range of 50~80nm Yes. The light emitting layer 110b has three types, a red light emitting layer 110b ₁ that emits red (R), a green light emitting layer 110b ₂ that emits green (G), and a blue light emitting layer 110b ₃ that emits blue (B). The light emitting layers 110b _{1 to} 110b ₃ are arranged in stripes. In addition, as a hole injection / transport layer forming material, for example, a mixture of a polythiophene derivative such as polyethylenedioxythiophene and polystyrene sulfonic acid can be used. Examples of the material of the light emitting layer 110b include polyfluorene derivatives, polyphenylene derivatives, polyvinyl carbazole, polythiophene derivatives, or polymer materials such as perylene dyes, coumarin dyes, rhodamine dyes such as rubrene, perylene, 9 , 10-diphenylanthracene, tetraphenylbutadiene, Nile red, coumarin 6, quinacridone and the like can be used.

  Next, the common electrode 12 is formed on the entire surface of the light emitting element portion 11 and plays a role of flowing a current through the functional layer 110 in a pair with the pixel electrode 111. When the common electrode 12 is a cathode, for example, a metal layer such as a calcium layer or an aluminum layer may be laminated. At this time, it is preferable to provide a cathode having a low work function on the cathode near the light emitting layer, and in this embodiment, in particular, it plays a role of injecting electrons into the light emitting layer 110b in direct contact with the light emitting layer 110b. Further, depending on the material of the light emitting layer, lithium fluoride may form LiF between the light emitting layer 110 and the common electrode 12 in order to efficiently emit light.

The red and green light emitting layers 110b ₁ and 1110b ₂ are not limited to lithium fluoride, and other materials may be used. Therefore, in this case, a layer made of lithium fluoride is formed only on the blue (B) light emitting layer 110b ₃ , and a layer other than lithium fluoride is laminated on the other red and green light emitting layers 110b ₁ and 110b _2. good. Further, only calcium may be formed on the red and green light emitting layers 110b ₁ and 110b ₂ without forming lithium fluoride. For example, the thickness of lithium fluoride is preferably in the range of 2 to 5 nm, and particularly preferably about 2 nm. The thickness of calcium is preferably in the range of 2 to 50 nm, for example, and is preferably about 20 nm.

  FIG. 5 is an enlarged view of the power supply lines 103R, 103G, and 103B and the connection wirings 99R, 99G, and 99B connected to the power supply lines in the upper region of the effective region 2a. The connection wirings 99R, 99G, and 99B are configured using conductive films formed in the first wiring layer 135 and the second wiring layer 136. In the present embodiment, the connection wirings 99R, 99G, and 99B are located at positions closest to the effective region 2a. The connection wiring 99R connected to a certain power supply line 103R is composed of a conductive film provided in the first wiring layer 135, and is connected to the power supply line 103B farthest from the effective region 2a. 99B is formed using a conductive film provided in the second wiring layer 136. The connection wiring 99G connected to the power supply line 103G sandwiched between the power supply line 103R and the power supply line 103B is connected to the power supply line 103G through a contact 100G penetrating the first interlayer insulating film 114a. In the contact 100G, conduction between the conductive film provided in the first wiring layer 135 and the conductive film provided in the second wiring layer 136 is ensured.

In this embodiment, since the connection wirings 99R, 99G, and 99B are formed using the first wiring layer 135 and the second wiring layer 136, a contact portion such as 100G is not provided as much as possible. I am doing so. Thus, by reducing the number of contact portions, problems such as disconnection can be reduced.
The connection wirings 99R, 99G, and 99B extend substantially in parallel toward the effective region 2a, and at least one portion of each of the connection wirings 99R, 99G, and 99B has a different width. In order to stably supply the power supply voltage, sufficient line widths of the connection wirings 99R, 99G, and 99B and the power supply lines 103R, 103G, and 103B are secured, and at the same time, the pitch of the pixels in the effective region 2a. This is because the line widths of the connection wirings 99R, 99G, and 99B are made narrower.

  As shown in FIG. 3, in the effective region 2a, the connection wirings 99R, 99G, and 99B are basically formed using conductive films in the same wiring layer. Desirably, in this embodiment, the conductive film provided on the second wiring layer 136 is used. On the other hand, the connection wiring 99R is formed using the first wiring layer 135 in the vicinity of the contact portion with the power supply line 103R as shown in FIG. It is necessary to connect the conductive film provided in the first wiring layer 135 to the conductive film provided in the second wiring layer 136 in the region from the first region to the effective region 2a.

  Next, a method for manufacturing the display device of this embodiment will be described with reference to the drawings.

  First, a method for forming the active element layer 14 on the substrate 2 will be described with reference to FIGS. Each of the cross-sectional views shown in FIGS. 6 to 8 corresponds to a cross section taken along the line AA ′ in FIG. In the following description, the impurity concentration is expressed as an impurity after activation annealing.

  First, as shown in FIG. 6A, a base protective layer 2c made of a silicon oxide film or the like is formed on a substrate 2. Next, after an amorphous silicon layer is formed using an ICVD method, a plasma CVD method, or the like, crystal grains are grown by a laser annealing method or a rapid heating method to form a polysilicon layer 501.

  Next, as shown in FIG. 6B, the polysilicon layer 501 is patterned by photolithography to form island-like silicon layers 241, 251 and 261, and further a gate insulating film 142 made of a silicon oxide film is formed. To do.

  The silicon layer 241 forms a thin film transistor 123 (hereinafter sometimes referred to as “pixel TFT”) that is formed at a position corresponding to the effective region 2 a and connected to the pixel electrode 111, and the silicon layer 251. , 261 respectively constitute P-channel type and N-channel type thin film transistors (hereinafter sometimes referred to as “driving circuit TFTs”) in the scanning line driving circuit 105.

The gate insulating layer 142 is formed by forming a silicon oxide film having a thickness of about 30 nm to 200 nm to cover the silicon layers 241, 251 and 261 and the base protective layer 2c by plasma CVD method, thermal oxidation method or the like. Here, when the gate insulating layer 142 is formed using a thermal oxidation method, the silicon layers 241, 251 and 261 are also crystallized, and these silicon layers can be formed into polysilicon layers. When performing channel doping, for example, implanted boron ions at a dose of about 1 × 10 ¹² cm ^-2 at this timing. As a result, the silicon layers 241, 251 and 261 become low-concentration P-type silicon layers having an impurity concentration of about 1 × 10 ¹⁷ cm ⁻³ .

Next, as shown in FIG. 6C, an ion implantation selection mask M ₁ is formed on a part of the silicon layers 241 and 261, and in this state, phosphorus ions are implanted at a dose of about 1 × 10 ¹⁵ cm ^−2. To do. As a result, the introduction of a self-alignment manner high-concentration impurity to the ion implantation selection mask M _1, the high concentration source region 241S and 261S and the high concentration drain region 241D and 261D are formed in the silicon layer 241 and 261.

Next, as shown in FIG. 6D, after removing the ion implantation selection mask M ₁ , a thickness of about 500 nm such as doped silicon, silicide film, aluminum film, chromium film, or tantalum film is formed on the gate insulating layer 142. A metal film of a certain degree is formed as the first wiring layer 135, and further, this metal film is patterned, whereby the gate electrode 252 of the P-channel type drive circuit TFT, the gate electrode 242 of the pixel TFT, and the N-channel type drive A gate electrode 262 of the circuit TFT is formed. Further, the scanning line driving circuit signal wiring 105a, the power supply lines 103R, 103G, and 103B, the connection wiring 99R, and a part of the common electrode wiring 12a are simultaneously formed by the patterning.

Further, using the gate electrodes 242, 252, and 262 as a mask, phosphorus ions are implanted into the silicon layers 241, 251, and 261 at a doping amount of about 4 × 10 ¹³ cm ⁻² . As a result, low-concentration impurities are introduced in a self-aligned manner with respect to the gate electrodes 242, 252 and 262, and as shown in FIG. 6D, the low-concentration source regions 241b and 261b in the silicon layers 241 and 261, and Low concentration drain regions 241c and 261c are formed. In addition, low concentration impurity regions 251S and 251D are formed in the silicon layer 251.

Next, as shown in FIG. 7A, an ion implantation selection mask M2 is formed on the entire surface excluding the periphery of the gate electrode 252. Using this ion implantation selection mask M2, boron ions are implanted into the silicon layer 251 with a doping amount of about 1.5 × 10 ¹⁵ cm ⁻² . As a result, the gate electrode 252 also functions as a mask, and the silicon layer 252 is doped with high-concentration impurities in a self-aligning manner. As a result, 251S and 251D are counter-doped and become a source region and a drain region of a TFT for a P-type channel type driver circuit.

  Next, as shown in FIG. 7B, after removing the ion implantation selection mask M2, a first interlayer insulating film 144a is formed on the entire surface of the substrate 2, and further, the first interlayer insulating film 144a is patterned by photolithography. Then, a contact hole forming hole H1 is provided at a position corresponding to the source electrode and drain electrode of each TFT and the common electrode wiring 12a.

  Next, as shown in FIG. 7C, a conductive layer 504 having a thickness of about 200 nm to 800 nm made of a metal such as aluminum, chromium, or tantalum is formed so as to cover the first interlayer insulating film 144a. A contact hole is formed by embedding these metals in the previously formed hole H1. Further, a patterning mask M3 is formed over the conductive layer 504.

  Next, as shown in FIG. 8A, the conductive layer 504 is patterned by the patterning mask M3, and the source electrodes 243, 253, 263, the drain electrodes 244 and 254 of each TFT, the power supply line 103B, the connection wiring 99G, 99B, the scanning line power supply wiring 105b and the common electrode wiring 12a are formed as the second wiring layer 136.

  Next, as shown in FIG. 8B, a second interlayer insulating film 144b that covers the first interlayer insulating film 144a is formed of, for example, an acrylic resin material. The second interlayer insulating film 144b is preferably formed to a thickness of about 1 to 2 μm.

  Next, as shown in FIG. 8C, a portion corresponding to the drain electrode 244 of the pixel TFT in the second interlayer insulating film 144b is removed by etching to form a contact hole forming hole H2. At the same time, the second interlayer insulating film 144b on the common electrode wiring 12a is also removed. In this way, the active element layer 14 is formed on the substrate 2.

  Next, a procedure for obtaining the display device 1 by forming the light emitting element portion 11 on the active element layer 14 will be described with reference to FIG. The cross-sectional view shown in FIG. 9 corresponds to a cross section taken along the line AA ′ in FIG.

  First, as shown in FIG. 9A, a thin film made of a transparent electrode material such as ITO is formed so as to cover the entire surface of the substrate 2, and the thin film is patterned to provide holes formed in the second interlayer insulating film 144b. A contact hole 111a is formed by filling H2, and a pixel electrode 111 and a dummy pixel electrode 111 'are formed. The pixel electrode 111 is formed only in a portion where the thin film transistor 123 is formed, and is connected to the current thin film transistor 123 (switching element) through the contact hole 111a. The dummy electrode 111 ′ is arranged in an island shape.

Next, as shown in FIG. 9B, the inorganic bank layer 112a and the dummy inorganic bank layer 212a are formed on the second interlayer insulating film 144b, the pixel electrode 111, and the dummy pixel electrode 111 ′. The inorganic bank layer 112a is formed so that a part of the pixel electrode 111 is opened, and the dummy inorganic bank layer 212a is formed so as to completely cover the dummy pixel electrode 111 ′. The inorganic bank layer 112a and the dummy inorganic bank layer 212a are formed of an inorganic film such as SiO ₂ , TiO ₂ , or SiN on the entire surface of the second interlayer insulating film 144b and the pixel electrode 111 by, for example, CVD, TEOS, sputtering, vapor deposition, or the like. After forming, the inorganic film is formed by patterning.

  Further, as shown in FIG. 9B, the organic bank layer 112b and the dummy organic bank layer 212b are formed on the inorganic bank layer 112a and the dummy inorganic bank layer 212a. The organic bank layer 112b is formed in a mode in which a part of the pixel electrode 111 is opened through the inorganic bank layer 112a, and the dummy organic bank layer 212b is formed in a mode in which a part of the dummy inorganic bank layer 212a is opened. To do. In this way, the bank 112 is formed on the second interlayer insulating film 144b.

  Subsequently, a region showing lyophilicity and a region showing liquid repellency are formed on the surface of the bank 112. In this embodiment, each region is formed by a plasma treatment process. Specifically, in the plasma treatment process, the pixel electrode 111, the inorganic bank layer 112a, and the dummy inorganic bank layer 212a are made lyophilic, and the organic bank layer 112b and the dummy organic bank layer 212b are made lyophobic. And a liquid repellent step.

That is, the bank 112 is heated to a predetermined temperature (for example, about 70 to 80 ° C.), and then plasma processing (O ₂ plasma processing) using oxygen as a reactive gas in an atmospheric atmosphere is performed as a lyophilic process. Subsequently, as a lyophobic process, plasma treatment using CF ₄ as a reactive gas (CF ₄ plasma treatment) is performed in an air atmosphere, and the bank 112 heated for the plasma treatment is cooled to room temperature, Liquidity and liquid repellency will be imparted to predetermined locations.

  Furthermore, the functional layer 110 and the dummy functional layer 210 are formed on the pixel electrode 111 and the dummy inorganic bank layer 212a, respectively, by an inkjet method. The functional layer 110 and the dummy functional layer 210 are formed by ejecting and drying a composition ink containing a hole injection / transport layer material and then ejecting and drying a composition ink containing a light emitting layer material. In addition, it is preferable to perform after the formation process of this functional layer 110 and the dummy functional layer 210 in inert gas atmospheres, such as nitrogen atmosphere and argon atmosphere, in order to prevent the oxidation of a positive hole injection / transport layer and a light emitting layer.

  Next, as shown in FIG. 9C, the common electrode 12 covering the bank 112, the functional layer 110, and the dummy functional layer 210 is formed. The common electrode 12 is connected to the common electrode wiring 12a on the substrate 2 so as to cover the first common electrode layer 12b after the first common electrode layer 12b is formed on the bank 112, the functional layer 110, and the dummy functional layer 210. It is obtained by forming the second common electrode layer 12c.

  Finally, a sealing resin 603 such as an epoxy resin is applied to the substrate 2, and the sealing substrate 604 is bonded to the substrate 2 through the sealing resin 603. In this way, the display device 1 as shown in FIGS. 1 to 3 is obtained.

  As described above, the outermost power supply line 103B with respect to the effective region 2a does not overlap the connection wirings 99R and 99G connected to the other power supply lines 103R and 103G in a plan view. The wiring layer 136 can be provided on both sides. Therefore, in the present embodiment, the power supply line 103B can be formed with a width approximately half as compared with the case where the power supply line 103B is provided in one of the first wiring layer 135 and the second wiring layer 136. Since the width of 103B is reduced, the frame of the panel can be reduced.

  Further, the connection wiring 99R connected to the innermost power supply line 103R with respect to the effective region 2a does not overlap the other power supply lines 103G and 103B in a plan view, and therefore can be formed in the first wiring layer 135. is there. For this reason, in this embodiment, the width of the connection wirings 99G and 99B provided in the second wiring layer 136 can be increased by the width of the connection wiring 99R, and the manufacture of the display device such as a mask can be facilitated. Can be Furthermore, in this embodiment, since the contact for electrically connecting the power supply line and the connection wiring is only one location of 100G, the dependency of the contact resistance can be reduced.

[Second Embodiment]
Next, a second embodiment will be described. The main difference between the layout of the display device according to the second embodiment shown in FIG. 10 and the layout of the first embodiment shown in FIG. 2 is that at least one portion of the common electrode wiring 12a is in the effective region 2a. This is a point that overlaps with at least one portion of at least one of the power supply lines 103R, 103G, and 103B provided in the vicinity of. The common electrode wiring 12 a extends from the side where the flexible substrate 5 is attached toward the side facing the side, and two sides facing each other among the four sides forming the outer periphery of the substrate 2. The common electrode wiring 12a is provided so as to overlap with the power supply line 103R, and the other common electrode wiring 12a is at least part of 103G and 103B. It is arranged to overlap.

  A cross-sectional view corresponding to this is shown in FIG. The common electrode wiring 12 a is composed of a conductive film provided in the second wiring layer 136 and is connected to the common electrode 12.

  The power supply lines 103R, 103G, and 103B are formed of a conductive film provided in the first wiring layer 135 below the second wiring layer 136. The common electrode wiring 12a and the power supply lines 103R, 103G, and 103B are separated by the first interlayer insulating layer 144a and are electrically insulated. For example, a conductive layer 12d made of ITO or the like is interposed between the common electrode wiring 12a and the common electrode 12.

  As described above, the common electrode wiring 12a is formed so that at least one portion of the power supply lines 103R, 103G, and 103B overlaps, so that the common electrode wiring 12a and the power supply lines 103R, 103G, and 103B A capacitance is formed between them, the fluctuation of the power supply voltage is reduced, and the electro-optic element can be driven stably.

  The power supply lines 103R, 103G, and 103B are regions between the effective region 2a and the side opposite to the side to which the flexible substrate is attached. As shown in FIG. 12, the contacts 100R, 100G, and 100B are respectively connected. To the connection wirings 99R, 99G, and 99B. In the contacts 100R, 100G, and 100B, the conductive film provided in the first wiring layer 135 and the conductive film provided in the second wiring layer 136 are connected. The connection wirings 99R, 99G, and 99B are configured using a conductive film provided in the second wiring layer 136. The line widths of the connection wirings 99R, 99G, and 99B are smaller than the line widths of the corresponding power supply lines 103R, 103G, and 103B.

  As described above, in the effective region 2a, it is desirable that the connection wirings 99R, 99G, and 99B are basically formed by using conductive films in the same wiring layer. In the embodiment, the conductive film provided on the second wiring layer 136 is used. On the other hand, the connection wirings 99R, 99G, and 99B are formed using a conductive film provided in the second wiring layer 136. Therefore, unlike the case shown in FIG. 5, the connection wirings 99R, 99G, and 99B are formed from the conductive film provided in the first wiring layer 135 in the region between the contact portion and the effective region 2a. There is no particular need to connect to the conductive film provided in the wiring layer 136.

  Next, an example of an electronic device including the display device 1 according to the above embodiment will be described.

  FIG. 13A is a perspective view showing an example of a mobile phone. In FIG. 10A, reference numeral 1000 denotes a mobile phone body, and reference numeral 1001 denotes a display unit using the organic EL device 1 described above.

  FIG. 13B is a perspective view illustrating an example of a wristwatch type electronic device. In FIG. 10B, reference numeral 1100 denotes a watch body, and reference numeral 1101 denotes a display unit using the organic EL device 1 described above.

  FIG. 13C is a perspective view illustrating an example of a portable information processing apparatus such as a word processor or a personal computer. In FIG. 13C, reference numeral 1200 denotes an information processing apparatus, reference numeral 1202 denotes an input unit such as a keyboard, reference numeral 1204 denotes an information processing apparatus body, and reference numeral 1206 denotes a display unit using the organic EL device 1 described above.

  The technical scope of the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention.

  For example, although the power supply line 103B has a two-layer structure in the above embodiment, other power supply lines may be used as long as the power supply line is arranged on the outermost side with respect to the effective region 2a. In addition, a power supply line, a connection wiring, and the like provided in the first wiring layer 135 and the second wiring layer 136 may be reversely arranged.

  In the above embodiment, the light emitting element portion 11 is formed in the order of the pixel electrode 111, the hole injection / transport layer 110a, the light emitting layer 110b, and the common electrode 12 from the substrate 2 side. It is not limited, and a configuration in which the elements are arranged in the reverse order can also be adopted. Further, in the above-described embodiment, the light emission of the light emitting element unit 11 is described using an example of a form in which the light emission of the light emitting element unit 11 is emitted to the outer surface side through the transparent substrate 2. Even if it is the form radiate | emitted through the sealing part 3, it is applicable. In this case, as described above, a common electrode and a sealing layer having excellent light transmittance (transparency) may be provided.

  In the above embodiment, the case where the R, G, and B light emitting layers are arranged in stripes has been described. However, the present invention is not limited to this, and various arrangement structures may be adopted. For example, in addition to the stripe arrangement, a mosaic arrangement or a delta arrangement can be used.

  As described above, according to the present invention, it is possible to obtain a high-quality electro-optical device and electronic apparatus that are small in size and easy to manufacture.

  The above-described embodiment shows one aspect of the present invention, and is not intended to limit the present invention, and can be arbitrarily changed within the scope of the technical idea of the present invention.

  DESCRIPTION OF SYMBOLS 1 ... Display apparatus (organic EL display apparatus, electro-optical device), 2 ... Substrate, 2a ... Effective area (display area), 99R, 99G, 99B ... Connection wiring, 103, 103R, 103G, 103B ... Power supply line (light emission) Power supply wiring), 110a ... hole injection / transport layer, 110b ... light emitting layer, 111 ... pixel electrode (electrode), 135 ... first wiring layer (first layer), 136 ... second wiring layer (second Layer), 144a... First interlayer insulating film (insulating layer).

Claims (7)

A plurality of pixels comprising an electro-optic element having a functional layer sandwiched between a first electrode and a second electrode provided in an effective area on the substrate;
An electrode wiring connected to the second electrode outside the effective area;
A connection wiring connected to the first electrode via an active element and provided in at least the effective region;
A power line connected to the connection wiring outside the effective area, and
At least a part of the electrode wiring is composed of a first conductive film provided in a first wiring layer,
At least a portion of the power line is made of a second conductive film provided in a second wiring layer,
The first wiring layer and the second wiring layer are formed to be separated from each other by an interlayer insulating film,
An electro-optical device, wherein at least a part of the first conductive film and at least a part of the second conductive film are arranged to overlap each other. The electro-optical device according to claim 1.
The electro-optical device, wherein the second conductive film is formed between the first conductive film and the substrate. The electro-optical device according to claim 1 or 2,
The electro-optical device, wherein the second conductive film is connected to the connection wiring via a contact portion provided in the interlayer insulating film. The electro-optical device according to claim 3.
The electro-optical device, wherein the connection wiring includes a third conductive film provided in the second wiring layer. The electro-optical device according to any one of claims 1 to 4,
The active element is a transistor;
The gate electrode of the transistor is composed of a conductive film provided in the first wiring layer,
An electro-optical device, wherein a source or drain electrode of the transistor is formed of a conductive film provided in the second wiring layer. The electro-optical device according to any one of claims 1 to 5,
The electro-optical device, wherein the functional layer is made of an organic electroluminescent material.   An electronic apparatus comprising the electro-optical device according to claim 1.

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