JP2009099889A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device Download PDF

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JP2009099889A
JP2009099889A JP2007272146A JP2007272146A JP2009099889A JP 2009099889 A JP2009099889 A JP 2009099889A JP 2007272146 A JP2007272146 A JP 2007272146A JP 2007272146 A JP2007272146 A JP 2007272146A JP 2009099889 A JP2009099889 A JP 2009099889A
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semiconductor device
resin layer
conductive
semiconductor element
conductive element
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Koji Senoo
浩司 妹尾
Kazuo Inoue
和夫 井上
Hitoshi Fujiyama
等 藤山
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JSR Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for surely manufacturing a semiconductor device having a conductive element made of an elastic polymer material, formed on the pad electrode of a semiconductor element, by a simple process. <P>SOLUTION: The method of manufacturing the semiconductor device has a process of forming a resin layer consisting of a water-soluble resin on a surface where the pad electrode is formed in the semiconductor element, forming a plurality of through-holes on the resin layer according to a pattern corresponding to the pad electrode in the semiconductor element, forming a material layer for the conductive element containing conductive particles providing magnetism in a polymer material forming material to be the elastic polymer material by being cured inside the respective through-holes of the resin layer, forming the conductive element inside the respective through-holes of the resin layer by making a magnetic field act in the thickness direction and performing curing processing to each material layer for the conductive element, and removing the resin layer by using water thereafter. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、半導体素子のパッド電極上に弾性高分子物質よりなる導電素子が形成されてなる半導体装置の製造方法に関するものである。   The present invention relates to a method for manufacturing a semiconductor device in which a conductive element made of an elastic polymer material is formed on a pad electrode of a semiconductor element.

近年、半導体素子においては、その高機能化、高容量化に伴って電極数が増加し、パッド電極の配列ピッチすなわち隣接するパッド電極の中心間距離が小さくなって高密度化する傾向にある。そのため、このような半導体素子を回路基板上に実装する場合には、半導体素子のパッド電極と回路基板の端子電極との電気的接続を確実に達成することが極めて重要である。   2. Description of the Related Art In recent years, the number of electrodes in semiconductor elements has increased with the increase in functionality and capacity, and the arrangement pitch of pad electrodes, that is, the distance between the centers of adjacent pad electrodes tends to decrease and the density tends to increase. Therefore, when mounting such a semiconductor element on a circuit board, it is extremely important to reliably achieve electrical connection between the pad electrode of the semiconductor element and the terminal electrode of the circuit board.

従来、半導体素子を回路基板上に実装する方法としては、フリップチップ実装法が知られている。このフリップチップ実装法においては、半導体素子（半導体チップ）のパッド電極上に、半田よりなる接続用の突起状電極（以下、「半田バンプ」という。）が形成されてなる半導体装置が用いられている。そして、この半導体装置を回路基板上に、当該半導体装置の半田バンプの各々がこれに対応する回路基板の端子電極上に位置するよう配置し、この状態で、半田バンプを溶融させることにより、回路基板の端子電極に接合した後、半導体素子と回路基板との間の間隙内に例えば熱硬化性樹脂材料を注入してこれを硬化させることにより、当該半導体素子と回路基板との間に封止部を形成し、以て、半導体素子が回路基板上に実装される。
このようなフリップチップ実装法によれば、広い範囲にわたってパッド電極が形成された半導体素子であっても、回路基板上に実装することができる点、半導体素子のパッド電極の各々を対応する回路基板の端子電極の各々に一括して接続することができる点、半導体素子の実装面積を小さくすることができる点で有利である。 Conventionally, a flip chip mounting method is known as a method for mounting a semiconductor element on a circuit board. In this flip chip mounting method, a semiconductor device is used in which a connecting protruding electrode made of solder (hereinafter referred to as “solder bump”) is formed on a pad electrode of a semiconductor element (semiconductor chip). Yes. Then, the semiconductor device is arranged on the circuit board so that each of the solder bumps of the semiconductor device is located on the terminal electrode of the corresponding circuit board, and in this state, the solder bump is melted to obtain a circuit. After bonding to the terminal electrode of the substrate, sealing is performed between the semiconductor element and the circuit board by, for example, injecting a thermosetting resin material into the gap between the semiconductor element and the circuit board and curing the material. A semiconductor element is mounted on the circuit board.
According to such a flip-chip mounting method, even a semiconductor element having a pad electrode formed over a wide range can be mounted on a circuit board, and each of the pad electrodes of the semiconductor element can be mounted on a corresponding circuit board. This is advantageous in that it can be collectively connected to each of the terminal electrodes and the mounting area of the semiconductor element can be reduced.

しかしながら、フリップチップ実装法により、半導体素子を回路基板上に実装する場合には、以下のような問題がある。
フリップチップ実装法に用いられる半導体装置を得るためには、（ａ）半導体素子におけるパッド電極が形成された表面全体に、半田メッキのための電極となる金属薄膜を形成するプロセス、（ｂ）この金属薄膜の表面に、パッド電極の各々が位置する個所に開口を有するレジスト層を形成するプロセス、（ｃ）金属薄膜におけるパッド電極の各々が位置する個所の表面に半田バンプ用の半田メッキ層を形成するプロセス、（ｄ）レジスト層を除去するプロセス、（ｅ）半田メッキ層が形成された部分以外の金属薄膜を除去するプロセスが必要であり、半田バンプを形成する工程は極めて煩雑なものとなる。
また、半導体素子を回路基板に実装した後、接続不良等が確認された場合において、当該半導体素子を再利用するときには、半田パンプを除去することが必要となるが、半導体素子に損傷を与えずに半田パンプを除去することは極めて困難であり、半導体素子を再利用することができない。 However, when the semiconductor element is mounted on the circuit board by the flip chip mounting method, there are the following problems.
In order to obtain a semiconductor device used in the flip chip mounting method, (a) a process of forming a metal thin film serving as an electrode for solder plating on the entire surface of the semiconductor element on which the pad electrode is formed, (b) A process of forming a resist layer having an opening at a position where each pad electrode is located on the surface of the metal thin film; (c) a solder plating layer for solder bumps on the surface where each pad electrode is located in the metal thin film; A process of forming, (d) a process of removing the resist layer, and (e) a process of removing the metal thin film other than the portion where the solder plating layer is formed, and the process of forming the solder bumps is extremely complicated. Become.
In addition, when a semiconductor device is mounted on a circuit board and a connection failure or the like is confirmed, it is necessary to remove the solder bump when the semiconductor device is reused, but the semiconductor device is not damaged. In addition, it is extremely difficult to remove the solder bump, and the semiconductor element cannot be reused.

このような問題を解決するため、最近においては、半導体素子のパッド電極上に、弾性高分子物質中に導電性粒子が含有されてなる導電素子が形成されてなる半導体装置が提案されている（特許文献１参照）。
このような半導体装置によれば、簡単な工程で、半導体素子のパッド電極上に導電素子を形成することができ、また、加圧によって半導体素子のパッド電極と回路基板の端子電極との電気的接続が達成されるので、半導体素子を再利用することが可能となる。
しかしながら、このような半導体装置の製造工程においては、導電素子を形成する際に、溶剤や薬品等を使用することが必要となるため、得られる導電素子を構成する弾性高分子物質が劣化しやすく、従って、所期の導電素子を得ることが困難である。 In order to solve such a problem, recently, a semiconductor device in which a conductive element in which conductive particles are contained in an elastic polymer substance is formed on a pad electrode of a semiconductor element has been proposed ( Patent Document 1).
According to such a semiconductor device, the conductive element can be formed on the pad electrode of the semiconductor element by a simple process, and the electrical connection between the pad electrode of the semiconductor element and the terminal electrode of the circuit board is performed by pressurization. Since the connection is achieved, the semiconductor element can be reused.
However, in the manufacturing process of such a semiconductor device, it is necessary to use a solvent, a chemical, or the like when forming the conductive element, so that the elastic polymer material constituting the obtained conductive element is easily deteriorated. Therefore, it is difficult to obtain a desired conductive element.

特開平１１−１５１８５号公報Japanese Patent Laid-Open No. 11-15185

本発明は、以上のような事情に基づいてなされたものであって、その目的は、半導体素子のパッド電極上に弾性高分子物質よりなる導電素子が形成されてなる半導体装置を、簡単な工程で確実に製造することができる方法を提供することにある。   The present invention has been made based on the above circumstances, and an object of the present invention is to provide a simple process for a semiconductor device in which a conductive element made of an elastic polymer material is formed on a pad electrode of a semiconductor element. It is an object of the present invention to provide a method that can be surely manufactured.

本発明の半導体装置の製造方法は、複数のパッド電極を有する半導体素子と、この半導体素子におけるパッド電極上に一体的に設けられた、弾性高分子物質中に導電性粒子が含有されてなる導電素子とを有してなる半導体装置の製造方法であって、
半導体素子におけるパッド電極が形成された表面に、水溶性樹脂よりなる樹脂層を形成し、この樹脂層に、前記半導体素子におけるパッド電極に対応するパターンに従って複数の貫通孔を形成し、当該樹脂層の各貫通孔内に、硬化されて弾性高分子物質となる高分子物質形成材料中に磁性を示す導電性粒子が含有されてなる導電素子用材料層を形成し、当該導電素子用材料層の各々に対し、その厚み方向に磁場を作用させると共に硬化処理を行うことにより、当該樹脂層の各貫通孔内に導電素子を形成し、その後、樹脂層を水によって除去する工程を有することを特徴とする。 The method for manufacturing a semiconductor device according to the present invention includes a semiconductor element having a plurality of pad electrodes and a conductive element containing conductive particles in an elastic polymer material integrally provided on the pad electrodes in the semiconductor element. A method for manufacturing a semiconductor device comprising an element,
A resin layer made of a water-soluble resin is formed on the surface of the semiconductor element on which the pad electrode is formed, and a plurality of through holes are formed in the resin layer according to a pattern corresponding to the pad electrode in the semiconductor element. In each of the through holes, a conductive element material layer in which conductive particles exhibiting magnetism are contained in a polymer substance-forming material that is cured to become an elastic polymer substance is formed, and the conductive element material layer A conductive element is formed in each through hole of the resin layer by applying a magnetic field in the thickness direction and performing a curing process on each of the resin layers, and then removing the resin layer with water. And

本発明の半導体装置の製造方法においては、水溶性樹脂がポリビニルアルコールであることが好ましい。
また、半導体素子がウエハの状態であることが好ましい。 In the method for manufacturing a semiconductor device of the present invention, the water-soluble resin is preferably polyvinyl alcohol.
The semiconductor element is preferably in a wafer state.

本発明の製造方法によれば、半導体素子の表面に形成された水溶性樹脂よりなる樹脂層の貫通孔内に導電素子を形成し、その後、水によって樹脂層を溶解して除去するため、簡単な工程により、導電素子を形成することができると共に、溶剤や薬品を使用することがないため、所期の導電素子を確実に得ることができる。   According to the manufacturing method of the present invention, the conductive element is formed in the through hole of the resin layer made of the water-soluble resin formed on the surface of the semiconductor element, and then the resin layer is dissolved and removed with water. Through this process, a conductive element can be formed, and a solvent and chemicals are not used, so that the desired conductive element can be obtained with certainty.

以下、本発明の実施の形態について詳細に説明する。
図１は、本発明の製造方法によって得られる半導体装置の一例における構成を示す説明用断面図である。
この半導体装置１は、一面に例えばアルミニウムよりなる複数のパッド電極１１を有する半導体素子（半導体チップ）１０を有し、この半導体素子１０における各パッド電極１１上には、導電素子２０が一体的に設けられている。
導電素子２０の各々においては、図２に拡大して示すように、絶縁性の高分子物質中に導電性粒子Ｐが厚み方向に並ぶよう配向した状態で含有されている。
導電素子２０の厚みは、通常１０〜３００μｍ、好ましくは２０〜１００μｍである。 Hereinafter, embodiments of the present invention will be described in detail.
FIG. 1 is a cross-sectional view illustrating the structure of an example of a semiconductor device obtained by the manufacturing method of the present invention.
The semiconductor device 1 has a semiconductor element (semiconductor chip) 10 having a plurality of pad electrodes 11 made of, for example, aluminum on one surface, and a conductive element 20 is integrally formed on each pad electrode 11 in the semiconductor element 10. Is provided.
In each of the conductive elements 20, as shown in an enlarged view in FIG. 2, the conductive particles P are contained in an insulating polymer substance in an aligned state in the thickness direction.
The thickness of the conductive element 20 is usually 10 to 300 μm, preferably 20 to 100 μm.

導電素子２０を構成する弾性高分子物質としては、架橋構造を有する高分子物質を用いることが好ましく、耐久性、成形加工性およひ電気特性の観点から、シリコーンゴムを用いることがより好ましい。   As the elastic polymer substance constituting the conductive element 20, a polymer substance having a crosslinked structure is preferably used, and silicone rubber is more preferably used from the viewpoints of durability, molding processability and electrical characteristics.

導電性粒子Ｐとしては、後述する方法によって厚み方向に配向させることができる点で、磁性を示すものが用いられる。このような導電性粒子Ｐの具体例としては、鉄、コバルト、ニッケルなどの磁性を有する金属の粒子若しくはこれらの合金の粒子またはこれらの金属を含有する粒子、またはこれらの粒子を芯粒子とし、当該芯粒子の表面に金、銀、パラジウム、ロジウムなどの導電性の良好な金属のメッキを施したもの、あるいは非磁性金属粒子若しくはガラスビーズなどの無機物質粒子またはポリマー粒子を芯粒子とし、当該芯粒子の表面に、ニッケル、コバルトなどの導電性磁性金属のメッキを施したものなどが挙げられる。
これらの中では、ニッケル粒子を芯粒子とし、その表面に導電性の良好な金または銀のメッキを施したものを用いることが好ましい。
芯粒子の表面に導電性金属を被覆する手段としては、特に限定されるものではないが、例えば化学メッキまたは電解メッキ法、スパッタリング法、蒸着法などが用いられている。 As the conductive particles P, those showing magnetism are used in that they can be oriented in the thickness direction by a method described later. Specific examples of such conductive particles P include magnetic metal particles such as iron, cobalt, nickel, or alloys thereof, particles containing these metals, or these particles as core particles. The surface of the core particles is plated with a metal having good conductivity such as gold, silver, palladium, rhodium, or non-magnetic metal particles or inorganic particles such as glass beads or polymer particles as core particles. For example, the surface of the core particles may be plated with a conductive magnetic metal such as nickel or cobalt.
Among these, it is preferable to use nickel particles as core particles and the surfaces thereof plated with gold or silver having good conductivity.
The means for coating the surface of the core particles with the conductive metal is not particularly limited, and for example, chemical plating or electrolytic plating, sputtering, vapor deposition or the like is used.

導電性粒子Ｐとして、芯粒子の表面に導電性金属が被覆されてなるものを用いる場合には、良好な導電性が得られることから、粒子表面における導電性金属の被覆率（芯粒子の表面積に対する導電性金属の被覆面積の割合）が４０％以上であることが好ましく、さらに好ましくは４５％以上、特に好ましくは４７〜９５％である。
また、導電性金属の被覆量は、芯粒子の０．５〜５０質量％であることが好ましい。
また、導電性粒子Ｐの数平均粒子径は、３〜２０μｍであることが好ましく、より好ましくは５〜１５μｍである。
また、導電性粒子Ｐの粒子径分布（Ｄｗ／Ｄｎ）は、１〜１０であることが好ましく、より好ましくは１．０１〜７、さらに好ましくは１．０５〜５、特に好ましくは１．１〜４である。
また、導電性粒子Ｐの形状は、特に限定されるものではないが、高分子物質形成材料中に容易に分散させることができる点で、球状のもの、星形状のものあるいはこれらが凝集した２次粒子であることが好ましい。 When the conductive particles P used are those in which the surface of the core particles is coated with a conductive metal, good conductivity can be obtained. Therefore, the coverage of the conductive metal on the particle surface (the surface area of the core particles) The ratio of the covering area of the conductive metal with respect to is preferably 40% or more, more preferably 45% or more, and particularly preferably 47 to 95%.
Moreover, it is preferable that the coating amount of a conductive metal is 0.5-50 mass% of a core particle.
Moreover, it is preferable that the number average particle diameter of the electroconductive particle P is 3-20 micrometers, More preferably, it is 5-15 micrometers.
The particle size distribution (Dw / Dn) of the conductive particles P is preferably 1 to 10, more preferably 1.01 to 7, still more preferably 1.05 to 5, particularly preferably 1.1. ~ 4.
Further, the shape of the conductive particles P is not particularly limited, but spherical particles, star-shaped particles, or agglomerated particles 2 can be easily dispersed in the polymer substance-forming material. Secondary particles are preferred.

このような導電性粒子Ｐは、導電素子２０中に体積分率で１０〜４０％、特に１５〜３５％となる割合で含有されていることが好ましい。この割合が過小である場合には、厚み方向に十分に高い導電性を有する導電素子２０が得られないことがある。一方、この割合が過大である場合には、得られる導電素子２０は脆弱なものとなりやすく、必要な弾性が得られないことがある。   Such conductive particles P are preferably contained in the conductive element 20 at a volume fraction of 10 to 40%, particularly 15 to 35%. When this ratio is too small, the conductive element 20 having sufficiently high conductivity in the thickness direction may not be obtained. On the other hand, when this ratio is excessive, the obtained conductive element 20 tends to be fragile and the necessary elasticity may not be obtained.

本発明においては、上記の半導体装置１が以下のようにして製造される。
先ず、図３に示すように、ウエハ１５の状態の半導体素子１０を用意し、図４に示すように、半導体素子１０におけるパッド電極１１が形成された表面に、水溶性樹脂よりなる樹脂層３０を形成し、その後、図５に示すように、樹脂層３０に、半導体素子１０におけるパッド電極のパターンに対応するパターンに従って複数の貫通孔３１を形成する。
以上において、樹脂層３０を形成する方法としては、水溶性樹脂の溶液を半導体素子１０の表面に塗布して乾燥する方法、水溶性樹脂よりなるフィルムを半導体素子１０の表面に接着する方法などが挙げられる。
樹脂層３０に貫通孔３１を形成する方法としては、レーザー加工法を用いることができ、レーザー装置としては、炭酸ガスレーザー装置などを利用することができる。
樹脂層３０を形成する水溶性樹脂としては、容易に水に溶解し、かつ、レーザー加工時の加熱による変形が少ない点で、ポリビニルアルコールを好適に用いることができる。
ポリビニルアルコールとしては、水に対する溶解性の点で、重量平均重合度が１００〜５０００、特に１０００〜２０００のものが好ましい。
樹脂層３０の厚みは、形成すべき導電素子２０の厚みに応じて設定される。 In the present invention, the semiconductor device 1 is manufactured as follows.
First, as shown in FIG. 3, the semiconductor element 10 in the state of the wafer 15 is prepared. As shown in FIG. 4, the resin layer 30 made of a water-soluble resin is formed on the surface of the semiconductor element 10 on which the pad electrode 11 is formed. Then, as shown in FIG. 5, a plurality of through holes 31 are formed in the resin layer 30 according to a pattern corresponding to the pattern of the pad electrode in the semiconductor element 10.
In the above, as a method of forming the resin layer 30, there are a method of applying a water-soluble resin solution to the surface of the semiconductor element 10 and drying, a method of adhering a film made of the water-soluble resin to the surface of the semiconductor element 10, and the like. Can be mentioned.
As a method for forming the through hole 31 in the resin layer 30, a laser processing method can be used, and as the laser device, a carbon dioxide laser device or the like can be used.
As the water-soluble resin forming the resin layer 30, polyvinyl alcohol can be suitably used in that it is easily dissolved in water and is less deformed by heating during laser processing.
As the polyvinyl alcohol, those having a weight average degree of polymerization of 100 to 5,000, particularly 1,000 to 2,000 are preferable from the viewpoint of solubility in water.
The thickness of the resin layer 30 is set according to the thickness of the conductive element 20 to be formed.

次いで、樹脂層３０の各貫通孔３１内に、硬化されて弾性高分子物質となる高分子物質形成材料中に磁性を示す導電性粒子が含有されてなる導電素子用材料を充填することにより、図６に示すように、樹脂層３０の各貫通孔３１内に導電素子用材料層２０Ａを形成する。
その後、導電素子用材料層２０Ａの各々に対し、例えば電磁石によって、当該導電素子用材料層２０Ａの厚み方向に磁場を作用させる。その結果、導電素子用材料層２０Ａにおいては、当該導電素子用材料層２０Ａ中に分散されている導電性粒子が厚み方向に並ぶよう配向する。そして、この状態でにおいて、導電素子用材料層２０Ａを硬化処理することにより、図７に示すように、樹脂層３０の各貫通孔３１内には、導電素子２０が半導体素子１０のパッド電極１１に一体的に接着された状態で形成される。その後、樹脂層３０を水によって溶解して除去し、更に、ウエハ１５をダイシングすることにより、半導体装置１が得られる。 Next, by filling each through hole 31 of the resin layer 30 with a conductive element material containing conductive particles exhibiting magnetism in a polymer substance-forming material that is cured to become an elastic polymer substance, As shown in FIG. 6, a conductive element material layer 20 </ b> A is formed in each through hole 31 of the resin layer 30.
Thereafter, a magnetic field is applied to each of the conductive element material layers 20A by using, for example, an electromagnet in the thickness direction of the conductive element material layer 20A. As a result, in the conductive element material layer 20A, the conductive particles dispersed in the conductive element material layer 20A are aligned in the thickness direction. In this state, the conductive element material layer 20 </ b> A is cured, so that the conductive element 20 is placed in each through-hole 31 of the resin layer 30 in the pad electrode 11 of the semiconductor element 10 as shown in FIG. 7. It is formed in a state in which it is integrally bonded to. Thereafter, the resin layer 30 is dissolved and removed with water, and the wafer 15 is diced to obtain the semiconductor device 1.

以上において、樹脂層３０の各貫通孔３１内に導電素子用材料を充填する方法としては、減圧下に、スクリーン印刷によって、樹脂層３０の各貫通孔３１に導電素子用材料を塗布し、その後、常圧にすることによって樹脂層３０の各貫通孔３１に導電素子用材料を充填する方法を好適に利用することができる。
導電素子用材料層２０Ａの硬化処理は、磁場を作用させたままの状態で行うこともできるが、磁場の作用を停止させた後に行うこともできる。
導電素子用材料層２０Ａに作用される磁場の強度は、平均で０．０２〜２．５テスラとなる大きさが好ましい。
導電素子用材料層２０Ａの硬化処理は、使用される材料によって適宜選定されるが、通常、加熱処理によって行われる。具体的な加熱温度および加熱時間は、導電性素子用材料層２０Ａを構成する高分子物質用材料などの種類、導電性粒子Ｐの移動に要する時間などを考慮して適宜選定される。 In the above, as a method of filling each through hole 31 of the resin layer 30 with the conductive element material, the conductive element material is applied to each through hole 31 of the resin layer 30 by screen printing under reduced pressure, and thereafter The method of filling each through-hole 31 of the resin layer 30 with the conductive element material by making the pressure normal can be suitably used.
The curing process of the conductive element material layer 20A can be performed with the magnetic field applied, but can also be performed after the magnetic field operation is stopped.
The intensity of the magnetic field applied to the conductive element material layer 20A is preferably 0.02 to 2.5 Tesla on average.
The curing process of the conductive element material layer 20A is appropriately selected depending on the material to be used, but is usually performed by a heating process. The specific heating temperature and heating time are appropriately selected in consideration of the type of the polymer material constituting the conductive element material layer 20A, the time required for moving the conductive particles P, and the like.

本発明の半導体装置の製造方法によれば、半導体素子１０の表面に形成された水溶性樹脂よりなる樹脂層３０の貫通孔３１内に導電素子２０を形成し、その後、水によって樹脂層３０を溶解して除去するため、簡単な工程により、導電素子２０を形成することができると共に、溶剤や薬品を使用することがないため、所期の導電素子２０を確実に得ることができる。   According to the method for manufacturing a semiconductor device of the present invention, the conductive element 20 is formed in the through hole 31 of the resin layer 30 made of a water-soluble resin formed on the surface of the semiconductor element 10, and then the resin layer 30 is formed with water. Since it is dissolved and removed, the conductive element 20 can be formed by a simple process, and since no solvent or chemical is used, the desired conductive element 20 can be obtained reliably.

図８は、本発明の製造方法によって得られる半導体装置を使用した実装構造体の一例における構成を示す説明用断面図である。
この実装構造体においては、半導体素子１０のパッド電極１１のパターンと対掌なパターンに従って複数の端子電極４１が形成された回路基板４０を有し、この回路基板４０上に、半導体装置１がその導電素子２０の各々が端子電極４１上に位置するよう配置され、更に半導体素子１０と回路基板４０との間には、封止部４５が形成されている。
このような実装構造体は、回路基板４０上に半導体装置１を位置合わせして配置し、半導体装置１を回路基板４０に向かって加圧した状態で、半導体素子１０と回路基板４０との間に封止部形成材料を注入して硬化させることによって得られる。
このような実装構造体によれば、半導体素子１０のパッド電極１１と回路基板４０の端子電極４１とが、弾性高分子物質中に導電性粒子が含有されてなる導電素子２０を介して電気的に接続されているため、半導体素子１０のパッド電極１１上に半田パンプを形成することが不要である。また、温度変化による熱履歴を受けた場合にも、半導体素子１０、封止部４５回路基板の各々の構成材料の熱膨張係数の差に起因して、導電素子２０に相当に大きい応力が作用しても、導電素子２０は、弾性を有するために破損することがなく、従って、温度変化などの環境の変化に対しても、半導体素子と回路基板との良好な電気的接続を安定に維持することができる。 FIG. 8 is an explanatory cross-sectional view showing a configuration in an example of a mounting structure using a semiconductor device obtained by the manufacturing method of the present invention.
This mounting structure has a circuit board 40 on which a plurality of terminal electrodes 41 are formed according to a pattern opposite to the pattern of the pad electrode 11 of the semiconductor element 10, and the semiconductor device 1 is mounted on the circuit board 40. Each of the conductive elements 20 is disposed on the terminal electrode 41, and a sealing portion 45 is formed between the semiconductor element 10 and the circuit board 40.
In such a mounting structure, the semiconductor device 1 is positioned and arranged on the circuit board 40, and the semiconductor device 1 is pressed toward the circuit board 40 between the semiconductor element 10 and the circuit board 40. It is obtained by injecting a sealing part forming material into the resin and curing it.
According to such a mounting structure, the pad electrode 11 of the semiconductor element 10 and the terminal electrode 41 of the circuit board 40 are electrically connected via the conductive element 20 in which conductive particles are contained in an elastic polymer material. Therefore, it is not necessary to form a solder bump on the pad electrode 11 of the semiconductor element 10. Even when a thermal history due to a temperature change is received, a considerably large stress acts on the conductive element 20 due to the difference in thermal expansion coefficient between the constituent materials of the semiconductor element 10 and the sealing portion 45 circuit board. However, since the conductive element 20 has elasticity, the conductive element 20 is not damaged, and therefore, stable electrical connection between the semiconductor element and the circuit board can be stably maintained even with environmental changes such as temperature changes. can do.

図９は、本発明の製造方法によって得られる半導体装置を使用した実装構造体の他の例における構成を示す説明用断面図である。
この実装構造体においては、半導体素子１０のパッド電極１１のパターンと対掌なパターンに従って複数の端子電極４１が形成された回路基板４０を有し、この回路基板４０上に、半導体装置１がその導電素子２０の各々が端子電極４１上に位置するよう配置され、更に半導体装置１が回路基板４０に向かって加圧された状態で、固定部材４６によって固定されている。
このような実装構造体によれば、固定部材４６によって半導体素子装置１と回路基板４０が固定されているため、接続不良等が確認された場合にも、半導体素子１０を再利用することができる。 FIG. 9 is an explanatory cross-sectional view showing a configuration in another example of a mounting structure using a semiconductor device obtained by the manufacturing method of the present invention.
This mounting structure has a circuit board 40 on which a plurality of terminal electrodes 41 are formed according to a pattern opposite to the pattern of the pad electrode 11 of the semiconductor element 10, and the semiconductor device 1 is mounted on the circuit board 40. Each of the conductive elements 20 is disposed so as to be positioned on the terminal electrode 41, and the semiconductor device 1 is further pressed by the fixing member 46 in a state where the semiconductor device 1 is pressed toward the circuit board 40.
According to such a mounting structure, since the semiconductor element device 1 and the circuit board 40 are fixed by the fixing member 46, the semiconductor element 10 can be reused even when a connection failure or the like is confirmed. .

本発明の半導体装置の製造方法は、上記の実施の形態に限定されず、種々の変更を加えることができる。
例えば半導体素子の表面に樹脂層を形成する工程においては、ウエハの状態の半導体素子ではなく、チップ化された半導体素子に対して行うこともできる。 The manufacturing method of the semiconductor device of the present invention is not limited to the above embodiment, and various modifications can be made.
For example, the step of forming the resin layer on the surface of the semiconductor element can be performed not on the semiconductor element in the wafer state but on the semiconductor element formed into a chip.

本発明の製造方法によって得られる半導体装置の一例における構成を示す説明用断面図である。It is sectional drawing for description which shows the structure in an example of the semiconductor device obtained by the manufacturing method of this invention. 図１に示す半導体装置における導電素子を拡大して示す説明用断面図である。FIG. 2 is an explanatory cross-sectional view illustrating an enlarged conductive element in the semiconductor device illustrated in FIG. 1. ウエハの状態の半導体素子の要部を示す説明用断面図である。It is sectional drawing for description which shows the principal part of the semiconductor element of the state of a wafer. 半導体素子の表面に樹脂層が形成された状態を示す説明用断面図である。It is sectional drawing for description which shows the state in which the resin layer was formed in the surface of a semiconductor element. 樹脂層に貫通孔が形成された状態を示す説明用断面図である。It is sectional drawing for description which shows the state by which the through-hole was formed in the resin layer. 樹脂層の貫通孔内に導電素子用材料層が形成された状態を示す説明用断面図である。It is sectional drawing for description which shows the state in which the conductive element material layer was formed in the through-hole of the resin layer. 樹脂層の貫通孔内に導電素子が形成された状態を示す説明用断面図である。It is sectional drawing for description which shows the state in which the conductive element was formed in the through-hole of the resin layer. 本発明の製造方法によって得られる半導体装置を使用した実装構造体の一例における構成を示す説明用断面図である。It is sectional drawing for description which shows the structure in an example of the mounting structure using the semiconductor device obtained by the manufacturing method of this invention. 本発明の製造方法によって得られる半導体装置を使用した実装構造体の他の例における構成を示す説明用断面図である。It is sectional drawing for description which shows the structure in the other example of the mounting structure using the semiconductor device obtained by the manufacturing method of this invention.

符号の説明Explanation of symbols

１ 半導体装置
１０ 半導体素子
１１ パッド電極
１５ ウエハ
２０ 導電素子
２０Ａ 導電素子用材料層
３０ 樹脂層
３１ 貫通孔
４０ 回路基板
４１ 端子電極
４５ 封止部
４６ 固定部材
Ｐ 導電性粒子 DESCRIPTION OF SYMBOLS 1 Semiconductor device 10 Semiconductor element 11 Pad electrode 15 Wafer 20 Conductive element 20A Conductive element material layer 30 Resin layer 31 Through-hole 40 Circuit board 41 Terminal electrode 45 Sealing part 46 Fixing member P Conductive particle

Claims (3)

複数のパッド電極を有する半導体素子と、この半導体素子におけるパッド電極上に一体的に設けられた、弾性高分子物質中に導電性粒子が含有されてなる導電素子とを有してなる半導体装置の製造方法であって、
半導体素子におけるパッド電極が形成された表面に、水溶性樹脂よりなる樹脂層を形成し、この樹脂層に、前記半導体素子におけるパッド電極に対応するパターンに従って複数の貫通孔を形成し、当該樹脂層の各貫通孔内に、硬化されて弾性高分子物質となる高分子物質形成材料中に磁性を示す導電性粒子が含有されてなる導電素子用材料層を形成し、当該導電素子用材料層の各々に対し、その厚み方向に磁場を作用させると共に硬化処理を行うことにより、当該樹脂層の各貫通孔内に導電素子を形成し、その後、樹脂層を水によって除去する工程を有することを特徴とする半導体装置の製造方法。 A semiconductor device comprising: a semiconductor element having a plurality of pad electrodes; and a conductive element in which conductive particles are contained in an elastic polymer material, which are integrally provided on the pad electrode in the semiconductor element. A manufacturing method comprising:
A resin layer made of a water-soluble resin is formed on the surface of the semiconductor element on which the pad electrode is formed, and a plurality of through holes are formed in the resin layer according to a pattern corresponding to the pad electrode in the semiconductor element. In each of the through holes, a conductive element material layer in which conductive particles exhibiting magnetism are contained in a polymer substance-forming material that is cured to become an elastic polymer substance is formed, and the conductive element material layer A conductive element is formed in each through hole of the resin layer by applying a magnetic field in the thickness direction and performing a curing process on each of the resin layers, and then removing the resin layer with water. A method for manufacturing a semiconductor device. 水溶性樹脂がポリビニルアルコールであることを特徴とする請求項１に記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 1, wherein the water-soluble resin is polyvinyl alcohol. 半導体素子がウエハの状態であることを特徴とする請求項１または請求項２に記載の半導体装置の製造方法。   3. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor element is in a wafer state.
JP2007272146A 2007-10-19 2007-10-19 Method of manufacturing semiconductor device Withdrawn JP2009099889A (en)

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