JP2009093310A - Apparatus and method for creating execution code and method of managing source code - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the following problems that causes the decrease in reliability and increase in man hours: in a conventional method of verifying specifications, the method serves only to verify functional specifications without taking into consideration the verification of performance specifications such as processing time and the amount of memory required; and it is necessary to take measures such as checking performance specifications by adding performance-measuring codes for checking performance to source codes in addition to the framing of function verification, with the result that in such a method a technique for verifying specifications differs between verification of functional specifications and verification of performance specifications, thereby making it impossible to unify the operations of verifying specifications. <P>SOLUTION: An apparatus for creating execution codes, such as a compiling means, is provided with an assertion function that can add the descriptions of the process of verifying performance specifications. The assertion function can designate an assertion as either valid or invalid. Further, based on assertion designation information that can set only the assertion function of a particular performance verification process to be either valid or invalid, it is possible to set the assertion function of the particular performance verification process to be either valid or invalid. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention provides a technique related to software specification verification.

  2. Description of the Related Art Conventionally, methods and verification apparatuses for verifying function specifications have been widely used for software specification verification. For example, the Java (registered trademark) language has a function for describing and executing a specification verification process called an assertion function, and provides a framework for verifying a functional specification at a language level. Regarding verification regarding the assertion, there is a disclosure in Patent Document 1, for example.

JP 2007-11467 A

  For software functional specification verification, add a verification processing description for functional specification verification to the source code that describes the processing of the program to be executed, and when the corresponding part of the source code is executed, the execution result matches the verification processing description. Judgment is made.

  For example, it is assumed that the function specification defines that the variable “n” becomes “15” at a certain stage of processing. In such a case, a description of the function verification process for determining whether the variable “n” is “15” is added to the corresponding part of the source code.

  When converting the source code into executable code by an executable code generation device such as a compiler, it is possible to specify whether or not the function verification processing is enabled for the execution code generation device. When the execution code is generated by setting the process to be effective and the corresponding code is executed, the previous function verification process is executed and whether or not the variable “n” satisfies the function specification value “15”. Can be determined.

  The above method is effective for functional specification verification, but verification of performance specifications such as processing time and required memory capacity is not taken into consideration, and a performance measurement code for performance verification separately from the functional verification framework described above. It is necessary to add to the source code and check the performance specifications.

  In the above method, the method for specification verification differs between the verification of the functional specification and the verification of the performance specification, and the specification verification work cannot be unified, resulting in problems such as a decrease in reliability and an increase in work man-hours.

  Furthermore, in the above method, when a plurality of measurement codes are added to the source code, the measurement target process may include other measurement code processes, and the measurement values may include other measurement codes. There is a problem in that the measurement accuracy is reduced.

  For this, it is necessary for the user to individually devise such as adding individual measurement codes to the source code in consideration of the influence on the measurement accuracy among the plurality of measurement codes.

  By the way, confirmation of performance specifications is often performed every time a change is made to the source code, and it is generally necessary to repeatedly add and delete such measurement code.

  As a countermeasure, it may be possible to specify the addition / deletion of measurement code in the compile condition description etc., but it is necessary for the user to individually set the compile condition and correspond to the measurement code. There is no change in terms.

  In these methods, in addition to the increase in work man-hours, there is a possibility of errors in addition / deletion of measurement codes, and there is a problem of a decrease in measurement accuracy.

  Accordingly, it is an object of the present invention to improve these problems.

  An execution code generation device such as a compiling means is provided with an assertion function that can add a description of performance specification verification processing. The assertion function has a configuration in which the user can specify validity / invalidity of the assertion.

Furthermore, an assertion function is provided that can enable / disable a specific performance verification processing assertion function based on assertion designation information that can enable / disable only a specific performance verification processing assertion function. Is to provide an execution code generation device having an assertion function for giving a code capable of executing a performance specification verification process to an execution code of a specification function.
Furthermore, an execution code generation device having an assertion function capable of enabling / disabling the assertion function of a specific performance verification process based on assertion designation information capable of enabling / disabling only the assertion function of a specific performance verification process is provided. Is to provide.

  For this purpose, the present invention provides an assertion function that can add performance specification verification processing to the execution code.

  With the execution code generation device of the present invention, a code for performance specification verification processing can be added to an execution code in which a specification function is installed. In addition, the functional specification verification process and the performance specification verification process can be unified as a specification verification process using the same assertion function, and the reliability of verification can be improved.

  Furthermore, according to the execution code generation device of the present invention, since the code for performance specification verification processing is added to the source code at a plurality of locations, other performance specification verification processing is included in the processing to be measured. Even in this case, it is possible to validate only the assertion function of a specific performance specification verification process so that the measurement value does not include the time of other performance specification verification processes, and it is possible to prevent a decrease in measurement accuracy.

  According to the present invention, software specification verification is improved as compared with the prior art.

  Embodiments of the present invention will be described below with reference to FIGS.

  FIG. 1 is a functional block diagram showing the configuration of the execution code generation apparatus of this embodiment, FIG. 2 is an example of source code describing a conventional specification function and a function specification verification process, and FIG. 3 is a performance chart of the embodiment of the present invention. FIG. 4 is a flowchart showing the operation of an additional function (hereinafter referred to as a performance specification verification assertion function) of the performance specification verification process of this embodiment.

  In FIG. 1, 101 is a source code describing a required specification function, 102 is setting information necessary for execution code generation, such as specification of a source code to be code generation and optimization specification at the time of execution code generation. The described execution procedure script, 103 is an execution code generation device that generates the execution code 107 from the source code 101 according to the setting information of the execution procedure script 102, 104 is a compiling unit that converts the source code into a binary format, and 105 is a compiler 104 Is a link means for converting the binary format information generated into the executable code, 106 is a performance specification verification assertion function to which performance specification verification processing can be added, and 107 is an execution code converted from the source code into an executable format. .

  FIG. 2 shows a conventional source code example in which processing for verifying the functional specification is added. In FIG. 2, lines 202 to 205 and lines 207 to 209 are specification function description parts. The 206th line is a description of the functional specification verification process. In line 206, it is verified that the variable “i” is 100 or less, and when the execution code is generated and executed with the performance specification verification assertion function enabled, the pass / fail of the value of the variable “i” is verified. Is done.

  The source code shown in FIG. 2 can be added to and executed by a functional specification verification process using a functional specification verification assertion function of a conventional execution code generator (not shown).

  The operation of this embodiment will be described below with reference to FIGS.

  FIG. 3 is an example of source code in which processing for verifying the performance specification of the present invention is added. In FIG. 3, the description from the 303rd line to the 308th line is a description part of the specification function. Lines 302 and 309 are descriptions of performance specification verification processing.

  Line 302 describes starting measurement of processing time using time variable “t302”, and line 309 describes ending measurement of processing time. In line 309, it is also verified whether the time required for processing from line 303 to line 308 indicated by the time variable “t302” is less than 500 [mS].

  FIG. 4 shows the processing of the performance specification verification assertion function of this embodiment. In processing 401, setting information of the performance specification verification assertion function is acquired from the execution procedure script 102.

  In the process 402, it is determined whether or not the setting related to the performance specification verification assertion function is valid. If the performance specification verification assertion function is valid, the process 403 is executed. Otherwise, the process 404 is executed.

  If the performance specification verification assertion function is valid, the description for the performance specification verification process described in the source code 101 is validated in process 403. Under this condition, the compiling unit 104 compiles the source code 101 and generates an execution code 107 in which the performance specification verification processing is validated by the linking unit 105. By executing the execution code 107, the time variable “t302” is initialized to “0” in the process corresponding to the 302th line, and time measurement using the time variable “t302” is started.

  Next, a process in response to the process 308 is executed from the process 303. Immediately after the completion of the process, the time measurement is finished in the 309th line, and the value of the time variable “t302” at the end time is held.

  Next, it is determined whether the value of the time variable “t302” is less than 500 [mS], and the determination result is notified. The above processing is an embodiment when the performance specification verification assertion function is valid.

  On the other hand, if the setting related to the performance specification verification assertion function is set to invalid in the execution procedure script, the processing 404 is activated by the determination of the processing 402, and the performance specification verification assertion processing becomes invalid and is described in the source code. The description for the verification process of the specified performance specification is invalidated.

  Under this condition, the compiling unit 104 compiles the source code 101, and the execution unit 107 is generated from the linking unit 105 in which the performance specification verification processing is invalidated. When the execution code 107 is executed, there is no process corresponding to the process 302, and processes corresponding to the process 303 to the process 308 are executed.

  Further, there is no process corresponding to the process 309, and the entire process is completed. When the performance specification verification assertion function is invalid in the above processing, the description regarding the performance specification verification processing described in the source code is ignored, and only the processing portion describing the original specification function can be executed. The above processing is an embodiment when the performance specification verification assertion function is invalid.

  As described above, according to the processing of this embodiment, the processing time of the specific processing can be verified by adding the performance specification verification processing description.

  In addition, the functional specification verification process and the performance specification verification process can be unified as a specification verification process using the same assertion function, and the reliability of verification can be improved.

  In addition, according to this embodiment, it is possible to execute or ignore the description for the performance specification verification process described in the source code according to the valid / invalid setting of the performance specification verification assertion function described in the execution procedure script. Thus, it is possible to easily verify the performance specification by appropriately adding the performance specification verification process to the execution code of the specification function.

  In this embodiment, the configuration for describing the valid / invalid setting of the performance specification verification assertion function is described in the execution procedure script. This is possible, and the specification method of the valid / invalid setting of the performance specification verification assertion function is not particularly limited.

  In this embodiment, the execution code generation apparatus 103 has the compiler means 104 and the link means 105. However, when the source code is described in an interpreted language, the execution code generation apparatus executes the execution code. The apparatus also has an interpreter processing function that operates on the information processing apparatus. The configuration of the execution code generation device can be configured according to the source code to be used, and the configuration is not particularly limited.

  In this embodiment, the performance verification assertion function is provided separately from the function verification assertion function. However, other configurations such as a configuration in which the conventional functional specification verification assertion function is included in the performance specification verification assertion function of this embodiment are possible. The structure of the assertion function is not particularly limited.

  Hereinafter, another embodiment of the present invention will be described with reference to FIGS. FIG. 5 is an example of source code in which the performance specification verification process of the present invention is added, and FIG. 6 is a flowchart showing the operation of the performance specification verification assertion function of this embodiment.

  The operation of this embodiment will be described below with reference to FIGS. In FIG. 5, lines 503 to 508, lines 510, and 512 are descriptions of the original specification function. Lines 502, 509, 511, 513 are descriptions of the performance specification verification process. The processing of the execution code generation apparatus for the source code shown in FIG. 5 will be described with respect to the case where the setting related to the performance specification verification assertion function is valid. Time measurement using the time variable “t502” is started on the 502nd line. The end point of this measurement is the 513th line, and the purpose is to verify performance data for the time required for processing from the 503rd line to the 512th line. Similarly, time measurement using the time variable “t509” is started in the 509th line. The end point of this measurement is the 511st line, and the purpose is to verify the performance specifications of the time required for the 510th line process.

  As shown in the previous example, when the settings related to all the performance specification verification assertion functions are enabled, the processing time during which the performance specifications are verified in the 502nd and 513th lines as described above. In addition, the processing time for performance function verification in the 509th line and the 511th line is included, and the measurement accuracy is lowered.

  In the performance specification verification assertion function of this embodiment, only specific performance specification verification processing can be validated. For example, in the same configuration as that of FIG. 1 of the previous embodiment, if “-epa” is described in the execution procedure script, all the performance specification verification-related processing becomes valid. Similarly, if “-epa t1, t2” is described in the execution procedure script, only the performance specification verification process using the time variables “t1” and “t2” is valid.

  Processing of the performance specification verification assertion function of this embodiment will be described with reference to FIG. In step 601, setting information of the performance specification verification assertion function is acquired from the execution procedure script.

  In process 602, it is determined whether or not the setting related to the performance specification verification assertion function is valid. If the performance specification verification assertion function is valid, process 604 is executed, and otherwise, process 603 is executed. If the performance specification verification assertion function is valid, it is determined in step 604 whether the performance specification verification assertion function specification is specified with a specific time variable such as “-epa t1, t2”.

  If the time variable specified by the specific time variable is valid, only the performance specification verification process using the time variable specified in the process 605 is valid. If it is determined in step 604 that no specific time variable is specified, all performance specification verification processing is validated.

  For example, when there is a setting “-epa t502” in the execution procedure script, the performance specification verification process of the 502nd line and the 513th line is enabled by the performance specification verification assertion function of this embodiment, and the 509th line and the 511th line The performance specification verification process is invalid. As a result, it is possible to prevent other performance specification verification processes from being included in the processes targeted by the performance specification verification processes on the 502nd and 513th lines, and to measure the processing time with high accuracy for performance specification verification. It becomes possible.

  According to the present embodiment, since the code for performance specification verification processing is added to the source code at a plurality of locations, measurement is performed even when other performance specification verification processing is included in the processing to be measured. Only the assertion function of a specific performance specification verification process can be validated so that the value does not include the time of other performance specification verification processes, and a decrease in measurement accuracy can be prevented.

  In the above example, the measurement item of the performance specification verification process is the processing time, but the performance specification that can specify the amount of memory required to execute the process or the amount of free memory available at the time of the process execution as the performance specification item A performance specification verification assertion function of an executable code generation device capable of executing verification processing is also possible.

  In this case, by describing performance specification verification processing such as “assertUsedMemory mem <1024” in the source code, the amount of memory consumed by the execution code is less than 1 [KB] at the time of execution of the relevant location in this example. Can be verified. Further, a configuration in which the measurement of the used memory amount is verified by dividing it into an execution code area and a stack area, and a configuration in which the free memory amount is verified instead of the used memory amount are possible.

  As described above, according to the present embodiment, the amount of memory can be used as a measurement item for performance specification verification in addition to the processing time, and the performance items that can be verified by performance specification verification are expanded and the reliability of verification can be improved.

  In the above example, the measurement items of the performance specification verification process are the processing time and memory capacity, but the execution code that can execute the performance specification verification process that can specify the CPU resource required to execute the process as the performance specification item A generation device performance specification verification assertion function is also possible.

  In this case, by describing performance specification verification processing such as “assertCPUusage cpu <0.6” on the source code, in this example, the CPU resource consumed by the execution code at the time of execution of the corresponding location is less than 0.6 (less than 60% ) Can be verified.

  As described above, according to the present embodiment, the CPU resource can be used as a measurement item for performance specification verification in addition to the processing time, and the performance items that can be verified by the performance specification verification can be expanded to improve the reliability of the verification.

  In the above embodiment, processing time, memory amount, CPU resource, etc. are the measurement items for performance specification verification processing, but performance specification verification processing using other measurement items such as network transfer speed is also possible. The item does not particularly limit this.

  In the above embodiment, the source code including the performance specification verification process and the source code not including the performance specification verification process can be managed separately, or can be compiled by the compiling means as separate parts. This facilitates management and reuse of system codes including performance specification verification processing. In addition, with regard to the management unit, for example, it is possible to configure and manage source code and binaries for each measurement item such as processing time of performance specification verification processing and required memory amount, and management / parts focusing on performance specification verification processing There is no particular limitation on the classification method.

With the assertion function of the execution code generation means of the present invention, the performance specification verification processing code can be added to the execution code that implements the specification function. In addition, functional specification verification processing and performance specification verification processing can be unified as specification verification processing using the same assertion function. Furthermore, when multiple measurement codes are added to the source code, the measurement target processing Even if other measurement code processing is included in the, only the specific performance verification processing assertion function can be enabled so that the measurement value does not include the processing time of other measurement code It becomes.

  As a result, it is possible to improve the reliability and prevent the measurement accuracy from being lowered in the performance specification verification process.

Functional block diagram showing the configuration of the execution code generator Conventional source code example Example of source code in an embodiment of the present invention Flowchart showing the operation of the performance specification verification assertion function Example of source code in an embodiment of the present invention Flowchart showing the operation of the performance specification verification assertion function

Explanation of symbols

101 Source code 102 Execution procedure script 103 Execution code generation device 104 Compiling means 105 Performance specification verification assertion function 106 Link means 107 Execution code

Claims (14)

In an execution code generation device that generates an execution code to be executed by an arithmetic processing device from a source code,
An execution code generation apparatus comprising an assertion function having a function of giving a code for executing a performance verification process related to a processing time of the execution code to the execution code. The execution code generation device according to claim 1,
Assertion specification information for setting validity / invalidity of the assertion function is input,
An execution code generation device, wherein, when the assertion designation information indicates that the assertion function is valid, a code for executing a performance verification process is added to generate the execution code. The execution code generation device according to claim 1,
Assertion specification information for setting validity / invalidity of the assertion function is input,
When the assertion designation information indicates the validity of the assertion function of a specific performance verification process, an execution code generation apparatus is provided that generates the execution code by adding a code for executing the specific performance verification process . The execution code generation device according to any one of claims 1, 2, and 3,
An execution code generation apparatus characterized in that a code for executing a performance verification process having an execution processing time in execution of the execution code as a performance item is added to an execution code for executing a specification function. In an execution code generation device that generates an execution code to be executed by an arithmetic processing device from a source code,
An execution code generation apparatus comprising an assertion function having a function of giving a code for executing a performance verification process related to a necessary memory amount or an empty memory amount in execution of the execution code to the execution code. The execution code generation device according to claim 5, wherein
Assertion specification information for setting validity / invalidity of the assertion function is input,
An execution code generation device, wherein, when the assertion designation information indicates that the assertion function is valid, a code for executing a performance verification process is added to generate the execution code. The execution code generation device according to claim 5, wherein
Assertion specification information for setting validity / invalidity of the assertion function is input,
When the assertion designation information indicates the validity of the assertion function of a specific performance verification process, an execution code generation apparatus is provided that generates the execution code by adding a code for executing the specific performance verification process . In an execution code generation device that generates an execution code to be executed by an arithmetic processing device from a source code,
An execution code generation apparatus comprising an assertion function having a function of giving a code for executing a performance verification process relating to a utilization rate of an arithmetic processing unit in execution of the execution code to the execution code. The execution code generation device according to claim 8.
Assertion specification information for setting validity / invalidity of the assertion function is input,
An execution code generation device, wherein, when the assertion designation information indicates that the assertion function is valid, a code for executing a performance verification process is added to generate the execution code. The execution code generation device according to claim 8.
Assertion specification information for setting validity / invalidity of the assertion function is input,
When the assertion designation information indicates the validity of the assertion function of a specific performance verification process, an execution code generation apparatus is provided that generates the execution code by adding a code for executing the specific performance verification process . In an execution code generation method for generating an execution code to be executed by an arithmetic processing unit from a source code,
An execution code generation method comprising an assertion process having a function of giving a code for executing a performance verification process related to a processing time of the execution code to the execution code. In an execution code generation method for generating an execution code to be executed by an arithmetic processing unit from a source code,
An execution code generation method comprising: an assertion process having a function of giving a code for executing a performance verification process related to a necessary memory amount or a free memory amount in execution of the execution code to the execution code. In an execution code generation method for generating an execution code to be executed by an arithmetic processing unit from a source code,
An execution code generation method comprising: an assertion process having a function of giving a code for executing a performance verification process related to a utilization rate of an arithmetic processing unit in execution of the execution code to the execution code.   9. The execution code generation device according to claim 1, wherein source code including a performance verification process description and source code not including the performance verification process description are managed as different source code groups. Source code management method characterized by

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