JP2009076729A - Method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce manufacturing cost, in a method of forming an island-like semiconductor region formed with a single-crystal semiconductor layer on an insulation substrate. <P>SOLUTION: This application is related to this manufacturing method of a semiconductor device wherein a plurality of first projecting parts and a plurality of recessed parts are formed on a single-crystal semiconductor substrate; a first insulation film and a second insulation film are formed on a surface of each first projecting part and a surface of each first recessed part, respectively; hydrogen ions are implanted into the first projecting parts and the first recessed parts to form a first hydrogen implantation region in each first projecting part and a second hydrogen implantation region in the lower part of each first recessed part; an insulation substrate is stuck to the single-crystal semiconductor substrate; the single-crystal semiconductor substrate is separated along the first hydrogen implantation regions by heating it to form island-like semiconductor regions on the insulation substrate through the first insulation film; the single-crystal semiconductor substrate having second projecting parts and second recessed parts are provided by removing the second insulation films; and insulation film formation, hydrogen ion implantation, sticking, and separation are repeated. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a substrate having an SOI (Silicon On Insulator) structure in which a semiconductor layer is thinned from a crystalline semiconductor substrate and bonded to a different substrate. In particular, the present invention relates to a bonded SOI technology, and more particularly to a method for manufacturing an SOI substrate in which a single crystal or polycrystalline semiconductor layer is bonded to a substrate having an insulating surface such as glass. Further, the present invention relates to a semiconductor device using a substrate having such an SOI structure and a manufacturing method thereof.

  Instead of a silicon wafer produced by thinly cutting a single crystal semiconductor ingot, a semiconductor substrate (SOI substrate) called a silicon on insulator having a thin single crystal semiconductor layer on an insulating layer is provided. It has been developed and is becoming popular as a substrate for manufacturing microprocessors and the like. This is because integrated circuits using an SOI substrate are attracting attention as reducing parasitic capacitance between the drain of the transistor and the substrate, improving the performance of the semiconductor integrated circuit, and reducing power consumption.

  As a method for manufacturing an SOI substrate, a hydrogen ion implantation separation method is known. In the hydrogen ion implantation separation method, a microbubble layer is formed at a predetermined depth from the surface by injecting hydrogen ions into a silicon wafer, and the microbubble layer is used as a cleavage plane, so that a thin silicon film is formed on another silicon wafer. Bond layers (SOI layers). In addition to performing heat treatment for peeling the SOI layer, an oxide film is formed on the SOI layer by heat treatment in an oxidizing atmosphere, and then the oxide film is removed, and then heat treatment is performed in a reducing atmosphere at 1000 to 1300 ° C. It is said that it is necessary to increase the bonding strength by performing the above.

On the other hand, attempts have been made to form an SOI layer on an insulating substrate such as glass. As an example of an SOI substrate in which an SOI layer is formed on a glass substrate, a thin single crystal silicon layer is formed on a glass substrate having a coating film by using a hydrogen ion implantation separation method (Patent Document 1). reference). Also in this case, a microbubble layer is formed at a predetermined depth from the surface by implanting hydrogen ions into the single crystal silicon piece, and after bonding the glass substrate and the single crystal silicon piece, the microbubble layer is used as a cleavage plane to form silicon. A thin silicon layer (SOI layer) is formed on the glass substrate by peeling the piece.
JP 11-163363 A

  When the above technique is used, a single crystal semiconductor layer can be formed over an insulating substrate; thus, a device with high characteristics can be manufactured. However, since the number of bonding steps is increased as compared with the step of directly forming a semiconductor film over an insulating substrate, the manufacturing cost is increased.

  In view of the above, the present invention is characterized by repeating the step of forming a single crystal semiconductor layer over an insulating substrate by attaching the single crystal semiconductor substrate to the insulating substrate and peeling the single crystal semiconductor layer from the single crystal semiconductor substrate. .

  According to the present invention, a plurality of first convex portions and a plurality of first concave portions are formed on a single crystal semiconductor substrate, and a first insulating film and a surface of the first concave portion are formed on the surface of the first convex portion. A second insulating film is formed, hydrogen ions are implanted into the first convex portion and the first concave portion, and the first hydrogen implanted region and the lower portion of the first concave portion are inserted into the first convex portion. Forming a second hydrogen injection region, bonding the insulating substrate and the single crystal semiconductor substrate together, and heating to peel off the single crystal semiconductor substrate along the first hydrogen injection region; An island-shaped semiconductor region is formed through the first insulating film, and the second insulating film is removed to obtain a single crystal semiconductor substrate having a second convex portion and a second concave portion. Insulating film formation, hydrogen ion implantation, pasting, and peeling are repeated on a plurality of insulating substrates. That can be formed Jo semiconductor region to a method for manufacturing a semiconductor device according to it said.

  In the present invention, a gate insulating film is formed on the insulating substrate so as to cover the island-shaped semiconductor region formed via the first insulating film, and the gate insulating film is sandwiched between the island-shaped semiconductor regions. A gate electrode is formed, and an impurity element imparting one conductivity is added using the gate electrode as a mask to form a channel formation region, a source region, and a drain region in the island-shaped semiconductor region, and the gate insulation An interlayer insulating film is formed to cover the film and the gate electrode, and an electrode electrically connected to each of the source region and the drain region is formed on the interlayer insulating film.

  In the present invention, each of the first insulating film and the second insulating film is a silicon oxide film formed by a chemical vapor deposition method using an organosilane gas.

  In the present invention, the insulating film formation, hydrogen ion implantation, bonding, and peeling are repeated until the depth of the first recess becomes smaller than the film thickness of the island-shaped semiconductor region.

  Note that in this specification, a semiconductor device refers to a device having a semiconductor layer, and an entire device including a device having a semiconductor layer is also referred to as a semiconductor device.

  According to the present invention, a manufacturing process of forming a semiconductor film over an insulating substrate and etching the semiconductor film into an island shape is not necessary. Therefore, the manufacturing cost for forming the island-shaped semiconductor film is reduced.

  In the present invention, since the single crystal semiconductor layer can be used as an active layer of a semiconductor device, a device having high characteristics such as mobility and on-state current can be manufactured.

  In the present invention, the island-shaped semiconductor region of the single crystal semiconductor layer can be repeatedly formed from one single crystal semiconductor substrate, so that manufacturing cost can be reduced.

  Embodiments of the present invention will be described below with reference to the drawings.

  However, it will be readily understood by those skilled in the art that the present invention can be implemented in many different modes, and that various modifications can be made without departing from the spirit and scope of the present invention. The Therefore, the present invention is not construed as being limited to the description of the embodiments of the present invention.

  Note that in all the drawings for describing the embodiments of the present invention, the same portions or portions having similar functions are denoted by the same reference numerals, and repeated description thereof is omitted.

[Embodiment 1]
This embodiment mode is described with reference to FIGS. 1A to 1D, 2A to 2C, 3A to 3C, and 4A to 4C. This will be described with reference to (D) and FIGS.

  First, a single crystal semiconductor substrate 101 is prepared (see FIG. 1A). Note that in this embodiment, a silicon wafer is used as the single crystal semiconductor substrate 101. However, if necessary, a polycrystalline semiconductor substrate made of a compound semiconductor such as silicon, germanium, gallium arsenide, indium phosphide, or the like from which the crystalline semiconductor layer can be peeled can be used instead of the single crystal semiconductor substrate 101.

  Next, the single crystal semiconductor substrate 101 is etched by wet etching or dry etching to form a plurality of convex portions and a plurality of concave portions. The etched region of the single crystal semiconductor substrate 101 becomes a concave portion 103, and the non-etched region becomes a convex portion 102 (see FIG. 1B).

  The depth at which the single crystal semiconductor substrate 101 is etched, that is, the depth of the recess 103 is preferably several times the thickness of the island-shaped semiconductor region 110 formed in a later step.

  Next, an insulating film is formed on the surfaces of the convex portion 102 and the concave portion 105. Of the insulating film, a region formed over the convex portion 102 is an insulating film 105 and a region formed over the concave portion 103 is an insulating film 106 (see FIG. 1C). Note that the insulating film 106 is not necessarily formed, but is formed together with the insulating film 105.

  The insulating film 105 is provided to planarize the surface of the convex portion 102. In the case where the surface of the convex portion 102 of the single crystal semiconductor substrate 101 is not flattened, bonding failure with the insulating substrate 111 occurs in a later step. Note that a silicon oxide film containing nitrogen or a silicon nitride film containing oxygen may be formed by a CVD method or the like before the insulating film 105 is formed.

  The insulating film 105 also functions as a bonding layer between the insulating substrate 111 and the island-shaped semiconductor region 110 in a later step.

  As the insulating film 105 that functions as a bonding layer and has flatness, an insulating film having a smooth surface and a hydrophilic surface is preferable. As such an insulating film, an insulating film formed by a chemical reaction is preferable. For example, an oxide semiconductor film formed by a thermal or chemical reaction is suitable. This is because the smoothness of the surface can be ensured if the film is mainly formed by a chemical reaction.

  The insulating film 105 having a smooth surface and forming a hydrophilic surface is provided with a thickness of 0.2 nm to 500 nm. With this thickness, it is possible to smooth the surface roughness of the film formation surface and ensure the smoothness of the growth surface of the film.

  In the case where chemical oxide is used as the insulating film 105, for example, silicon oxide deposited by a chemical vapor deposition method can be used as the insulating film 105. In this case, a silicon oxide film manufactured by a chemical vapor deposition method using an organosilane gas is preferable.

As the organic silane gas, ethyl silicate (TEOS: chemical formula Si (OC ₂ H ₅ ) ₄ ), tetramethylsilane (TMS: chemical formula Si (CH ₃ ) ₃ ), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane It is possible to use a silicon-containing compound such as (OMCTS), hexamethyldisilazane (HMDS), triethoxysilane (SiH (OC ₂ H ₅ ) ₃ ), trisdimethylaminosilane (SiH (N (CH ₃ ) ₂ ) ₃ ). it can. Alternatively, a mixed gas of organosilane gas and oxygen may be used.

  The insulating film 105 can be bonded even at room temperature by being in close contact with the surface of the insulating substrate 111. In order to form a stronger bond, the insulating substrate 111 and the single crystal semiconductor substrate 101 may be pressed. In order to bond the insulating substrate 111 and the insulating film 105, which are different materials, when the surfaces of the insulating substrate 111 and the insulating film 105 whose surfaces are to be cleaned are brought into close contact with each other, the bonding is formed by the attractive force between the surfaces.

  Further, when a treatment for attaching a plurality of hydrophilic groups to the surface of the insulating substrate 111 is added, it is a more preferable mode for forming a bond. For example, the surface of the insulating substrate 111 is preferably made hydrophilic by oxygen plasma treatment or ozone treatment.

  Thus, when the process which makes the surface of the insulated substrate 111 hydrophilic is added, the hydroxyl group of a surface acts and a bond is formed by a hydrogen bond. Furthermore, when the bonded surfaces are brought into close contact with each other and heated at a temperature of room temperature or higher, the bonding strength can be increased.

  As a process for bonding the insulating substrate 111 and the insulating film 105 which are different materials, the surface to be bonded may be cleaned by irradiating an ion beam with an inert gas such as argon. By irradiation with an ion beam, unbound species are exposed on the surface of the insulating substrate 111 or the insulating film 105 to form a very active surface.

  When the activated surfaces are brought into close contact with each other, a bond between the insulating substrate 111 and the insulating film 105 can be formed even at a low temperature. The method of activating the surface to form a bond is preferably performed in a vacuum because the surface needs to be highly cleaned.

  In this embodiment mode, TEOS (tetraethylorthosilicate) is used as the insulating film 105, and a silicon oxide film is formed to a thickness of 50 nm by a CVD method or the like.

  Next, hydrogen ions 107 are implanted to a depth corresponding to the film thickness of the island-shaped semiconductor region 110 obtained in a later step. Thus, a hydrogen injection region 108 is formed in the convex portion 102, and a hydrogen injection region 109 is formed below the concave portion 103 (see FIG. 1D).

  The depths of the hydrogen implantation regions 108 and 109 formed in the single crystal semiconductor substrate 101 are controlled by ion acceleration energy and ion incidence angle. Hydrogen implantation regions 108 and 109 are formed in a depth region close to the average penetration depth of ions from the surface of the single crystal semiconductor substrate 101. For example, when the thickness of the island-shaped semiconductor region 110 is 5 nm to 500 nm, preferably 10 nm to 200 nm, the acceleration voltage at the time of ion implantation is performed in consideration of such a thickness. Ion implantation is preferably performed using an ion doping apparatus. That is, a doping method is used in which a plurality of ion species generated by converting the source gas into plasma are implanted without mass separation.

In the case of the present embodiment, it is preferable to implant ions having one or more identical atoms and having different mass numbers. In the ion doping, an acceleration voltage of 10 keV to 100 keV, preferably 30 keV to 80 keV, a dose amount of 1 × 10 ¹⁶ cm ⁻² to 4 × 10 ¹⁶ cm ⁻² , and a beam current density of ² μAcm ⁻² or more, preferably 5 μAcm ⁻² or more. More preferably, it may be 10 μAcm ⁻² or more.

In the case of implanting hydrogen ions, it is preferable to include H ⁺ , H ₂ ⁺ , and H ₃ ⁺ ions and to increase the ratio of H ₃ ⁺ ions. When hydrogen ions are implanted, H ⁺ , H ₂ ⁺ , H ₃ ⁺ ions are included, and if the ratio of H ₃ ⁺ ions is increased, the implantation efficiency can be increased and the implantation time can be shortened. Can do. Accordingly, the hydrogen implantation regions 108 and 109 formed in the single crystal semiconductor substrate 101 can contain hydrogen of 1 × 10 ²⁰ cm ⁻³ (preferably 5 × 10 ²⁰ cm ⁻³ ) or more. is there.

  When a high concentration hydrogen injection region is locally formed in the single crystal semiconductor substrate 101, the crystal structure is disturbed to form minute vacancies, and the hydrogen injection regions 108 and 109 can have a porous structure. . In this case, a volume change of minute cavities formed in the hydrogen implantation regions 108 and 109 is caused by heat treatment at a relatively low temperature, and a thin island-like semiconductor region 110 can be formed by cleaving along the hydrogen implantation region 108. it can.

Even when ions are mass-separated and implanted into the single crystal semiconductor substrate 101, the hydrogen implantation regions 108 and 109 can be formed in the same manner as described above. Also in this case, it is preferable to selectively implant ions having a large mass number (for example, H ₃ ⁺ ions) because the same effect as described above can be obtained.

In addition to hydrogen, an inert gas such as deuterium or helium can be selected as a gas that generates ionic species that generate ions. By using helium as the source gas and an ion doping apparatus that does not have a mass separation function, an ion beam having a high ratio of He ⁺ ions can be obtained. By implanting such ions into the single crystal semiconductor substrate 101, minute vacancies can be formed, and hydrogen injection regions 108 and 109 similar to the above can be provided in the single crystal semiconductor substrate 101.

In this embodiment mode, the hydrogen ions 107 are added using a doping apparatus, an ion implantation apparatus, or the like, and the amount of hydrogen implantation is, for example, 1 × 10 ¹⁵ cm ^{−2 to} 1 × 10 ¹⁷ cm ⁻² . Further, in order to set the film thickness of the island-shaped semiconductor region 110 after peeling to 50 nm, hydrogen ions 107 are implanted from the top of the convex portion 102 to a depth of 50 nm. At this time, the hydrogen implantation region 109 is formed at a depth of 50 nm from the surface of the recess 103.

  Next, the insulating substrate 111 and the single crystal semiconductor substrate 101 are attached to each other (see FIG. 2A).

  The insulating substrate 111 and the surface of the single crystal semiconductor substrate 101 where the insulating film 105 is formed face each other and are in close contact with each other to form a bond. The surface where the bond is formed is sufficiently cleaned. Then, a bond is formed by bringing the insulating substrate 111 and the insulating film 105 into close contact with each other. Bonding is considered to be caused by van der Waals force in the initial stage, and the insulating substrate 111 and the single crystal semiconductor substrate 101 can be pressed to form a strong bond by hydrogen bonding.

  When a glass substrate is used as the insulating substrate 111, nothing needs to be formed on the glass substrate, and for impurity contamination and stress relaxation from the glass substrate, CVD or the like is used on the glass substrate. A silicon oxide film containing nitrogen or a silicon nitride film containing oxygen may be formed. However, in that case, it is preferable to form a silicon oxide film using TEOS in order to planarize the substrate surface. A silicon oxide film formed using TEOS may have a thickness of about 50 nm.

  After the insulating substrate 111 and the single crystal semiconductor substrate 101 are bonded to each other, first heat treatment is performed at a temperature of 500 ° C. to 600 ° C. for 30 minutes to 120 minutes. Accordingly, hydrogen is released from the hydrogen injection regions 108 and 109 in the single crystal semiconductor substrate 101. Since the hydrogen implantation regions 108 and 109 from which hydrogen has been released are porous with weak atomic bonds and many gaps, the single crystal semiconductor substrate 101 can be cleaved along the hydrogen implantation region 108. For this reason, peeling easily occurs without applying force from the outside. An island-shaped semiconductor region 110 is formed over the insulating substrate 111 after peeling through the insulating film 105 (see FIG. 2B).

  Alternatively, the second heat treatment may be performed in a state where the island-shaped semiconductor region 110 is bonded to the insulating substrate 111. The second heat treatment is preferably performed at a temperature that is higher than the first heat treatment temperature and does not exceed the strain point of the insulating substrate 111. Alternatively, it is preferable to increase the treatment time of the second heat treatment even if the first heat treatment and the second heat treatment are at the same temperature. In the heat treatment, the insulating substrate 111 and / or the island-shaped semiconductor region 110 may be heated by heat conduction heating, convection heating, radiation heating, or the like.

  As a heat treatment apparatus used for the first heat treatment and the second heat treatment, an electric heating furnace, a lamp annealing furnace, or the like can be used. The second heat treatment may be performed by changing the temperature in multiple stages. A rapid thermal annealing (RTA) apparatus may be used. When heat treatment is performed using an RTA apparatus, the substrate can be heated to a temperature near or slightly higher than the strain point of the substrate.

  By performing the second heat treatment, stress remaining in the island-shaped semiconductor region 110 can be reduced. That is, the second heat treatment alleviates thermal distortion caused by a difference in expansion coefficient between the insulating substrate 111 and the island-shaped semiconductor region 110. The second heat treatment is also effective for recovering the crystallinity of the island-shaped semiconductor region 110 whose crystallinity is impaired by ion implantation. Further, the second heat treatment is effective in recovering damage to the island-shaped semiconductor region 110 that occurs when the single crystal semiconductor substrate 101 is bonded to the insulating substrate 111 and then divided by the first heat treatment. Further, by performing the first heat treatment and the second heat treatment, the hydrogen bond can be changed to a stronger covalent bond.

  The single crystal semiconductor substrate 101 from which the island-shaped semiconductor region 110 has been peeled is reused to form an island-shaped semiconductor film on another insulating substrate. First, the insulating film 106 on the surface of the single crystal semiconductor substrate 101 is removed with hydrofluoric acid or the like (see FIG. 2C).

  The single crystal semiconductor substrate 101 from which the insulating film 106 has been removed has a convex portion 112 and a concave portion 113. The height of the protrusion 112 is lower than the height of the island-like semiconductor region 110 and the hydrogen injection region 108 from the protrusion 102. A hydrogen injection region 109 remains below the recess 113.

  Next, as in the manufacturing process in FIG. 1C, an insulating film 115 is formed over the convex portion 112. When the insulating film 115 is formed over the convex portion 112, it is not necessary to form the insulating film 115, but at the same time, the insulating film 116 is formed over the concave portion 113 (see FIG. 3A).

  Here, in the case where the surface of the single crystal semiconductor substrate 101 after peeling is rough, the surface can be planarized by performing heat treatment in a hydrogen atmosphere at 1000 ° C.

  Next, as in FIG. 1D, hydrogen ions 117 are implanted into the single crystal semiconductor substrate 101 to form a hydrogen implantation region 118 in the convex portion 112 and a hydrogen implantation region 119 below the concave portion 113 (FIG. 3 ( B)). Note that in this embodiment, the hydrogen ions 117 and the hydrogen ions 107 are the same.

  When the thickness of the insulating film 115 is the same as that of the insulating film 105, a hydrogen implantation region 119 is formed at the same location as the hydrogen implantation region 109.

  When the thickness of the insulating film 115 is different from that of the insulating film 105 and the acceleration voltage of the hydrogen ions 117 is different, the thickness of the island-shaped semiconductor region 120 is different from the thickness of the island-shaped semiconductor region 110.

  Next, as in FIG. 2A, the insulating substrate 121 and the single crystal semiconductor substrate 101 are attached to each other (see FIG. 3C).

  After the insulating substrate 121 and the single crystal semiconductor substrate 101 are bonded to each other, the single crystal semiconductor substrate 101 is peeled along the hydrogen injection region 118, and the island-shaped semiconductor region 120 is formed over the insulating substrate 121 with the insulating film 115 interposed therebetween. (See FIG. 4A).

  The insulating film 116 is removed from the separated single crystal semiconductor substrate 101. A single crystal semiconductor substrate 101 having a protrusion 122 that is lower than the protrusion 112 by an amount corresponding to the island-shaped semiconductor region 120 and the hydrogen implantation region 118 and a recess 123 is obtained (see FIG. 4B). Further, the hydrogen injection region 119 remains.

  Through the manufacturing steps shown in FIGS. 1A to 1D and FIGS. 2A to 2B, an island-shaped semiconductor region 110 is formed. Similarly, the island-shaped semiconductor region 120 is formed by the manufacturing steps of FIGS. 2C, 3A to 3C, and 4A. In this manner, the manufacturing process can be repeated until the depth of the recess 103 which is first formed in the single crystal semiconductor substrate 101 is smaller than the thickness of the island-shaped semiconductor region formed in the insulating substrate. Thus, island-shaped semiconductor regions can be formed on a plurality of insulating substrates.

  4 (B) to 4 (D) and FIGS. 5 (A) to 5 (C) are diagrams illustrating a manufacturing process of the third island-shaped semiconductor region formation.

  When the insulating film 125 is formed over the convex portion 122, the insulating film 126 is also formed over the concave portion 123 (see FIG. 4C), and hydrogen ions 127 are implanted into the single crystal semiconductor substrate 101 to enter the convex portion 122. A hydrogen injection region 129 is formed below the hydrogen injection region 128 and the recess 123 (see FIG. 4D).

  The insulating substrate 131 and the single crystal semiconductor substrate 101 are attached to each other (see FIG. 5A), the single crystal semiconductor substrate 101 is separated along the hydrogen implantation region 128, and the island is formed over the insulating substrate 131 with the insulating film 125 interposed therebetween. A semiconductor region 130 is formed (see FIG. 5B).

  The insulating film 126 is removed from the single crystal semiconductor substrate 101 (see FIG. 5C). The hydrogen implantation region 129 remains in the single crystal semiconductor substrate 101. In the single crystal semiconductor substrate 101 illustrated in FIG. 5C, since the depth of the recess is shallower than the thickness of the island-shaped semiconductor region formed in the insulating substrate, no further island-shaped semiconductor regions can be formed.

  In this embodiment mode, the manufacturing process may be repeated three times until the depth of the concave portion 103 formed first in the single crystal semiconductor substrate 101 is shallower than the thickness of the island-shaped semiconductor region formed in the insulating substrate. Of course, it is not necessary to be limited to this number.

  According to this embodiment mode, a plurality of island-shaped semiconductor regions can be formed from one single crystal semiconductor substrate at the same time, and by repeating insulating film formation, hydrogen ion implantation, bonding, and peeling, a single crystal semiconductor The substrate can be used repeatedly.

[Embodiment 2]
In this embodiment, a method for manufacturing a transistor using the island-shaped semiconductor region formed in Embodiment 1 will be described with reference to FIGS. 6A to 6D and FIGS. D).

  First, based on Embodiment 1, an island-shaped semiconductor region 602, an island-shaped semiconductor region 603, an insulating film 605, and an insulating film 606 are formed over an insulating substrate 601 (see FIG. 6A).

  Next, a gate insulating film 607 is formed so as to cover the insulating substrate 601, the island-shaped semiconductor region 602, and the island-shaped semiconductor region 603. As the gate insulating film 607, a silicon oxide film, a silicon oxide film containing nitrogen, a silicon nitride film containing oxygen, a silicon nitride film, or a stacked film of two or more layers may be used. In this embodiment, as the gate insulating film 607, a silicon oxide film containing nitrogen is formed with a thickness of 100 nm by CVD or the like.

  A conductive film is formed over the gate insulating film 607, a mask is formed using an exposure apparatus, an inkjet apparatus, or the like, and the conductive film is etched using a wet etching or a dry etching apparatus, so that the gate electrode 608 and the gate are formed. An electrode 609 is formed. As the conductive film for forming the gate electrode 608 and the gate electrode 609, any one of a molybdenum (Mo) film, a tungsten (W) film, a tantalum (Ta) film, a titanium (Ti) film, and an aluminum (Al) film is used. Alternatively, two or more stacked films may be used. In this embodiment, a molybdenum film is formed as the conductive film with a thickness of 200 nm by a sputtering method. Then, using this molybdenum film, a gate electrode 608 and a gate electrode 609 are formed over the island-shaped semiconductor region 602 and the island-shaped semiconductor region 603 with the gate insulating film 607 interposed therebetween (see FIG. 6B).

A region to be a p-channel transistor including the island-shaped semiconductor region 603 is covered with a mask 614, and an impurity element 611 imparting n-type conductivity is added to the island-shaped semiconductor region 602 using the gate electrode 608 as a mask (FIG. 6C )reference). As the impurity element imparting n-type conductivity, for example, phosphorus (P), arsenic (As), or the like may be used. In this embodiment mode, phosphorus (P) is added by using a doping apparatus or the like so that the impurity concentration in the island-shaped semiconductor region 602 is 1 × 10 ¹⁹ cm ⁻³ or more and 1 × 10 ²⁰ cm ⁻³ or less. To do.

  Next, the mask 614 is removed, and a region to be an n-channel transistor including the island-shaped semiconductor region 602 is covered with a mask 615, and an impurity element 612 imparting p-type conductivity is formed in the island-shaped semiconductor region 603 using the gate electrode 609 as a mask. Add (see FIG. 6D). As the impurity element 612 imparting p-type conductivity, for example, boron (B) may be used.

  By the addition of the impurity element 611, a channel formation region 621, a region 623a which is one of a source region and a drain region, and a region 623b which is the other of the source region and the drain region are formed in the island-shaped semiconductor region 602. Further, by the addition of the impurity element 612, a channel formation region 622, a region 624a which is one of a source region and a drain region, and a region 624b which is the other of the source region and the drain region are formed in the island-shaped semiconductor region 603. (See FIG. 7A).

  Note that in this embodiment, the channel formation region, the source region, and the drain region are formed in the island-shaped semiconductor region, but the low concentration impurity region is further formed between the channel formation region and the source region and the drain region. It may be formed. In the low-concentration impurity region, a sidewall is formed on the side surface of the gate electrode, and an impurity element imparting one conductivity is formed in the source region and the drain region before addition of the impurity element for forming the source region and the drain region. The impurity element may be added at a concentration lower than the impurity concentration for the purpose. Further, instead of the sidewall, a mask may be formed, and the low concentration impurity region may be formed by the same addition process.

  Next, an interlayer insulating film 625 is formed so as to cover the gate insulating film 607, the gate electrode 608, and the gate electrode 609 (see FIG. 7B). As the interlayer insulating film 625, a silicon oxide film, a silicon oxide film containing nitrogen, a silicon nitride film containing oxygen, a silicon nitride film, or a stacked film of two or more layers may be used. In this embodiment, a silicon oxide film containing nitrogen is formed as the interlayer insulating film 625 with a thickness of 1000 nm by a CVD method or the like.

  Next, the interlayer insulating film 625 is etched using a dry etching apparatus or the like, and contact holes reaching the regions 623a, 623b, 624a, and 624b are formed in the interlayer insulating film 625.

  A conductive film is formed to cover the interlayer insulating film 625 and the contact hole. As the conductive film, any one of titanium (Ti), molybdenum (Mo), tungsten (W), aluminum (Al), and tantalum (Ta), or two or more stacked films may be formed. In this embodiment, a stacked film of a titanium film, an aluminum film, and a titanium film is formed with a thickness of 100 nm, 200 nm, and 100 nm by sputtering or the like.

  Next, the stacked film is etched using a dry etching apparatus or the like, and an electrode 627a, an electrode 627b, and an electrode 628a are electrically connected to the region 623a, the region 623b, the region 624a, and the region 624b on the interlayer insulating film 625, respectively. The electrode 628b is formed (see FIG. 7C).

  As described above, an n-channel transistor and a p-channel transistor are formed. The n-channel transistor includes an island-shaped semiconductor region 602 over the insulating film 605, a gate insulating film 607, and a gate electrode 608. In the island-shaped semiconductor region 602, a channel formation region 621, a region 623a that is one of a source region and a drain region, and a region 623b that is the other of the source region and the drain region are formed. The regions 623a and 623b are electrically connected to electrodes 627a and 627b formed over the interlayer insulating film 625, respectively.

  The p-channel transistor includes an island-shaped semiconductor region 603 over the insulating film 606, a gate insulating film 607, and a gate electrode 609. In the island-shaped semiconductor region 603, a channel formation region 622, a region 624a that is one of a source region and a drain region, and a region 624b that is the other of the source region and the drain region are formed. The regions 624a and 624b are electrically connected to electrodes 628a and 628b formed over the interlayer insulating film 625, respectively.

  Note that in the case of forming a CMOS circuit including an n-channel transistor and a p-channel transistor, an electrode 629 that electrically connects the region 623b and the region 624a may be formed instead of the electrode 627a and the electrode 628a (FIG. 7). (See (D)).

[Embodiment 3]
In this embodiment, the reuse method of the single crystal semiconductor substrate 101 used in Embodiment 1 is described with reference to FIGS. 8A to 8D, FIGS. 9A to 9B, and FIG. This will be described with reference to FIGS. 11A to 10D and FIGS. 11A to 11B.

  First, a single crystal semiconductor substrate 101 including a hydrogen implantation region 129 shown in FIG. 5C is prepared (FIG. 8A). In FIG. 8A, a single crystal semiconductor substrate 101 having a substantially flat surface in which there is no difference between the height of the convex portion and the depth of the concave portion is obtained.

  An insulating film 301 is formed over the surface of the single crystal semiconductor substrate 101 (see FIG. 8A). The insulating film 301 may be formed using a material and a manufacturing process similar to those of the insulating film 105.

  Next, hydrogen ions 307 are implanted from above the insulating film 301 (see FIG. 8C). At this time, the acceleration voltage of the hydrogen ion 307 implantation is adjusted so as to be the same depth as the existing hydrogen implantation region 129. Thus, a hydrogen injection layer 308 is formed in the single crystal semiconductor substrate 101 (see FIG. 8D).

  Next, the insulating substrate 321 and the single crystal semiconductor substrate 101 are attached to each other (see FIG. 9A).

  After the insulating substrate 321 and the single crystal semiconductor substrate 101 are bonded to each other, a heating process is performed to separate the single crystal semiconductor substrate 101 along the hydrogen injection layer 308, and the single crystal semiconductor is provided over the insulating substrate 321 with the insulating film 301 interposed therebetween. The layer 320 is formed (see FIG. 9B). If necessary, the single crystal semiconductor layer 320 may be further etched into an island shape to form an island-shaped semiconductor region.

  If possible, a new insulating film may be formed over the single crystal semiconductor substrate 101 and the single crystal semiconductor layer may be further separated.

  As shown in FIG. 10A, a hydrogen injection region 329 is provided below the recess 323, and the difference between the height of the projection 322 and the depth of the recess 323 is smaller than the thickness of the island-shaped semiconductor region. In the case of the crystalline semiconductor substrate 101, the surface may be polished by chemical mechanical polishing (CMP), and the surface may be planarized to obtain the structure illustrated in FIG. In that case, the single crystal semiconductor layer 320 can be obtained through the manufacturing steps illustrated in FIGS. 8B to 8D and FIGS. 9A to 9B. If necessary, the single crystal semiconductor layer 320 may be further etched into an island shape to form an island-shaped semiconductor region.

  A method for obtaining a single crystal semiconductor layer without polishing the surface of the single crystal semiconductor substrate 101 having the convex portion 322 and the concave portion 323 is described with reference to FIGS. A description will be given using B).

  An insulating film 325 is formed over the surface of the single crystal semiconductor substrate 101 having the convex portions 322 and the concave portions 323 (see FIG. 10B). The insulating film 325 may be formed using a material and a manufacturing process similar to those of the insulating film 105.

  Note that the insulating film 325 is formed to have a large thickness, and when the single crystal semiconductor substrate 101 and the insulating substrate 331 are bonded to each other through the insulating film 325 in a later step, the insulating film 325 is planarized. To be formed.

  Next, a mask 332 is formed over the concave portion 323 in which the hydrogen implantation region 329 is formed below, and hydrogen ions 327 are formed in the convex portion 322 (see FIG. 10C).

  At this time, the acceleration voltage of the hydrogen ion 327 implantation is adjusted so that the depth is the same as the existing hydrogen implantation region 329. Thus, a hydrogen injection layer 328 is formed in the single crystal semiconductor substrate 101 (see FIG. 10D).

  Next, the insulating substrate 331 and the single crystal semiconductor substrate 101 are attached to each other (see FIG. 11A). Since the insulating film 325 is formed thick, the surface is flattened in the bonding step and a surface of a single crystal semiconductor layer 340 which is peeled later is flattened.

  After the insulating substrate 331 and the single crystal semiconductor substrate 101 are bonded to each other, a heating process is performed to separate the single crystal semiconductor substrate 101 along the hydrogen injection layer 328, and the single crystal semiconductor is provided over the insulating substrate 331 with the insulating film 325 interposed therebetween. A layer 340 is formed (see FIG. 9B). If necessary, the single crystal semiconductor layer 340 may be further etched into an island shape to form an island-shaped semiconductor region.

  If possible, a new insulating film may be formed over the single crystal semiconductor substrate 101 and the single crystal semiconductor layer may be further separated. In that case, since the surface of the single crystal semiconductor substrate 101 is flattened, a single crystal semiconductor substrate 101 is simply formed based on the manufacturing steps of FIGS. 8A to 8D and FIGS. 9A to 9B. A crystalline semiconductor layer may be formed.

  According to this embodiment, the single crystal semiconductor substrate 101 used in Embodiment 1 can be reused to obtain a single crystal semiconductor layer.

[Embodiment 4]
In this embodiment, an example in which the transistor manufactured based on Embodiment 2 is applied to a semiconductor device capable of wireless communication will be described with reference to FIGS. 12, 13A to 13E, and 14A. Description will be made with reference to FIGS. 14F and 15A to 15E.

  With the transistor manufactured based on Embodiment 2, various circuits of a semiconductor device capable of wireless communication and capable of transmitting and receiving data can be formed. A semiconductor device capable of wireless communication is also called an ID tag, an IC tag, an RF (Radio Frequency) tag, a wireless tag, an electronic tag, an RFID (Radio Frequency Identification) tag, an IC card, or an ID card.

  First, a circuit configuration example of a semiconductor device 501 capable of wireless communication using a transistor manufactured based on Embodiment Mode 2 will be described. FIG. 12 is a block circuit diagram of a semiconductor device 501 capable of wireless communication.

  The specification of the semiconductor device 501 capable of wireless communication in FIG. 12 is based on ISO 15693 of the international standard, is a proximity type, and the communication signal frequency is 13.56 MHz. In addition, reception corresponds only to a data read command, the transmission data transmission rate is about 13 kHz, and the data encoding format uses Manchester code.

  The circuit portion 412 of the semiconductor device 501 capable of wireless communication is roughly composed of a power supply portion 460 and a signal processing portion 461. The power supply unit 460 includes a rectifier circuit 462 and a storage capacitor 463. In addition, when the power received from the antenna 411 is excessive, the power supply unit 460 controls whether to operate a protection circuit unit (also referred to as a limiter circuit unit) for protecting the internal circuit and the protection circuit unit. A protection circuit control circuit unit for the purpose may be provided. By providing the circuit portion, it is possible to prevent problems caused by receiving high power from a semiconductor device capable of wireless communication in a situation where the communication distance between the semiconductor device capable of wireless communication and the communication device is extremely short, etc. The reliability of a semiconductor device capable of wireless communication can be improved. That is, the semiconductor device capable of wireless communication can be normally operated without deteriorating elements inside the semiconductor device capable of wireless communication or destroying the semiconductor device itself capable of wireless communication.

  Here, the communication device only needs to have a means for transmitting and receiving information by wireless communication with a semiconductor device capable of wireless communication. For example, a reader that reads information or a reader that has a reading function and a writing function / Writer and the like. In addition, a mobile phone, a computer, or the like having one or both of a reading function and a writing function is also included.

  The rectifier circuit 462 rectifies the carrier wave received by the antenna 411 and generates a DC voltage. The storage capacitor 463 smoothes the DC voltage generated by the rectifier circuit 462. The DC voltage generated in the power supply unit 460 is supplied to each circuit of the signal processing unit 461 as a power supply voltage.

  The signal processing unit 461 includes a demodulation circuit 464, a clock generation / correction circuit 465, a recognition / determination circuit 466, a memory controller 467, a mask ROM 468, an encoding circuit 469, and a modulation circuit 470.

  The demodulation circuit 464 is a circuit that demodulates a signal received by the antenna 411. The received signal demodulated by the demodulation circuit 464 is input to the clock generation / correction circuit 465 and the recognition / determination circuit 466.

  The clock generation / correction circuit 465 has a function of generating a clock signal necessary for the operation of the signal processing unit 461 and correcting it. For example, the clock generation / correction circuit 465 includes a voltage controlled oscillation circuit (hereinafter referred to as a VCO (Voltage Controlled Oscillator) circuit), uses the output of the VCO circuit as a feedback signal, compares the phase with the supplied signal, The output signal is adjusted by negative feedback so that the received signal and the feedback signal have a constant phase.

  The recognition / determination circuit 466 recognizes and determines the instruction code. The instruction code recognized and determined by the recognition / determination circuit 466 includes a frame end signal (EOF, end of frame), a frame start signal (SOF), a flag, a command code, a mask length (mask length), and a mask. For example, a value (mask value). The recognition / determination circuit 466 also includes a cyclic redundancy check (CRC) function for identifying a transmission error.

  The memory controller 467 reads data from the mask ROM based on the signal processed by the recognition / determination circuit 466. The mask ROM 468 stores an ID and the like. By mounting the mask ROM 468, the semiconductor device 501 is configured as a read-only wireless communication device 501 that cannot be duplicated or altered.

  The encoding circuit 469 encodes the data read from the mask ROM 468 by the memory controller 467. The encoded data is modulated by the modulation circuit 470. Data modulated by the modulation circuit 470 is transmitted from the antenna 411 as a carrier wave.

  The n-channel transistor, p-channel transistor, and CMOS circuit formed in Embodiment 2 are a rectifier circuit 462, a demodulator circuit 464, a clock generation / correction circuit 465, a recognition / determination circuit 466, a memory controller 467, and an encoding circuit. 469 and the modulation circuit 470. If necessary, the present invention can be applied to the storage capacitor 463 and the mask ROM 468 as appropriate.

  Although the antenna 411 is provided inside the semiconductor device 501 capable of wireless communication, if necessary, an external antenna is provided outside the semiconductor device 501 capable of wireless communication, and the antenna 411 which is an internal antenna and the external antenna are provided. It may be electrically connected.

  The semiconductor device 501 capable of wireless communication according to this embodiment can be used for various articles and systems by utilizing a function capable of transmitting and receiving electromagnetic waves. Articles include, for example, keys (see FIG. 14A), banknotes, coins, securities, bearer bonds, certificates (driver's license, resident's card, etc., see FIG. 14B), books, Containers (such as petri dishes, see FIG. 14C), packaging containers (such as wrapping paper and bottles, see FIGS. 14E and 14F), recording media (discs, video tapes, etc.), vehicles Types (bicycles, etc.), accessories (such as bags and glasses, see FIG. 14D), foods, clothing, daily necessities, electronic devices (liquid crystal display devices, EL display devices, television devices, portable terminals, etc.), etc. It is.

  A semiconductor device 501 capable of wireless communication manufactured by applying the present invention is fixed by being attached or embedded on the surface of an article having various shapes as described above. The system is an article management system, an authentication function system, a distribution system, or the like. By using the semiconductor device of the present invention, the system can be enhanced in function, multifunctional, and added value.

  Further, an example in which the semiconductor device 501 capable of wireless communication according to this embodiment is used for all paper media and film media is described below. In particular, the semiconductor device capable of wireless communication according to this embodiment can be used for any paper medium that requires anti-counterfeiting. For example, banknotes, certified copy of family register, resident's card, passport, license, identification card, membership card, certificate, examination ticket, commuter pass, bill, check, cargo voucher, cargo bill, warehouse securities, stock certificate, bond, product Tickets, tickets, mortgage securities, etc.

  In addition, by implementing the present invention, it is possible to give the paper medium and film medium more information than the information visually shown on the paper medium. Therefore, by applying the RFID of the present invention to a product label or the like, It can be used for electronic management of merchandise management and prevention of merchandise theft. Hereinafter, a paper usage example according to the present invention will be described with reference to FIGS. 13 (A) to 13 (E).

  FIG. 13A is an example of bearer bonds 511 using paper incorporating the semiconductor device 501 capable of wireless communication according to this embodiment. The bearer bonds 511 include stamps, tickets, tickets, admission tickets, gift certificates, book tickets, stationery tickets, beer tickets, gift tickets, various gift certificates, various service tickets and the like, of course. It is not a thing.

  FIG. 13B is an example of a certificate 512 (for example, a resident's card or a family register) using paper in which the semiconductor device 501 capable of wireless communication according to this embodiment is incorporated.

  FIG. 13C illustrates an example in which the semiconductor device 501 capable of wireless communication according to this embodiment is applied to a label. On a label mount (separate paper) 513, a label (ID seal) 514 is formed of paper on which a semiconductor device 501 capable of wireless communication is incorporated. The label 514 is stored in the box 515. On the label 514, information on the product or service (product name, brand, trademark, trademark owner, seller, manufacturer, etc.) is printed. Furthermore, since the ID number unique to the product (or product type) is stored in the semiconductor device 501 capable of wireless communication, forgery, infringement of intellectual property rights such as trademark rights and patent rights, unfair competition, etc. You can easily grasp the torts.

  In the semiconductor device 501 capable of wireless communication, a great deal of information that cannot be clearly specified on the container or label of the product, for example, the production place, sales place, quality, raw material, efficacy, use, quantity, shape, price, production method, The usage method, production period, use period, expiration date, instruction manual, intellectual property information about the product, etc. can be entered. Therefore, a trader and a consumer can access such information by a simple communication device. In addition, rewriting and erasing can be easily performed from the producer side, but rewriting and erasing etc. are not possible from the trader and the consumer side.

  FIG. 13D illustrates a tag 516 made of paper or film in which a semiconductor device 501 capable of wireless communication is incorporated. By manufacturing the tag 516 with paper or film in which the semiconductor device 501 capable of wireless communication is manufactured, it can be manufactured at a lower cost than a conventional ID tag using a plastic housing.

  Such an example is shown in FIG. FIG. 13E illustrates a book 517 using the semiconductor device 501 capable of wireless communication according to this embodiment as a cover, and the semiconductor device 501 capable of wireless communication is incorporated on the cover.

  By attaching the label 514 and the tag 516 to the product in the semiconductor device 501 capable of wireless communication of this embodiment mode, product management becomes easy. For example, when a product is stolen, the culprit can be quickly grasped by following the route of the product. As described above, by using the semiconductor device 501 capable of wireless communication of this embodiment as an ID tag, it is possible to perform history management and tracking inquiries up to raw materials, production areas, manufacturing, processing, distribution, and sales of products. To. That is, it enables the traceability of products. Further, according to the present invention, it is possible to introduce a product traceability management system at a lower cost than before.

  Further, an electronic device provided with the semiconductor device 501 capable of wireless communication of this embodiment is described below.

  Electronic devices provided with a semiconductor device 501 capable of wireless communication include video cameras, digital cameras, goggle-type displays (head-mounted displays), navigation systems, sound playback devices (car audio, audio components, etc.), computers, game machines, mobile phones An information terminal (mobile computer, mobile phone, portable game machine, electronic book, etc.), an image playback device equipped with a recording medium (specifically, a DVD (digital versatile disc) or the like is played back and the image is displayed. And a device equipped with a display that can be used. Specific examples of these electronic devices are shown in FIGS.

  15A and 15B show a digital camera. FIG. 15B is a diagram showing the back side of FIG. This digital camera includes a housing 711, a display portion 712, a lens 713, operation keys 714, a shutter button 715, and the like. A semiconductor device 501 capable of wireless communication is provided inside the housing 711.

  FIG. 15C illustrates a mobile phone, which is a typical example of a mobile terminal. This mobile phone includes a housing 721, a display portion 722, operation keys 723, an optical sensor 724, and the like. In addition, a semiconductor device 501 capable of wireless communication is provided inside the mobile phone.

  FIG. 15D illustrates a digital player, which is a typical example of an audio device. A digital player shown in FIG. 15D includes a main body 730, a display portion 731, an operation portion 733, an earphone 734, and the like. Further, a semiconductor device 501 capable of wireless communication is provided inside the main body 730.

  FIG. 15E illustrates an electronic book (also referred to as electronic paper). This electronic book includes a main body 741, a display portion 742, operation keys 743, and a semiconductor device 501 capable of wireless communication.

  As described above, the applicable range of the semiconductor device of the present invention is so wide that the semiconductor device can be used for other electronic devices.

Sectional drawing which shows the manufacturing process of the island-shaped semiconductor area | region of this invention. Sectional drawing which shows the manufacturing process of the island-shaped semiconductor area | region of this invention. Sectional drawing which shows the manufacturing process of the island-shaped semiconductor area | region of this invention. Sectional drawing which shows the manufacturing process of the island-shaped semiconductor area | region of this invention. Sectional drawing which shows the manufacturing process of the island-shaped semiconductor area | region of this invention. 9 is a cross-sectional view illustrating a manufacturing process of a semiconductor device of the present invention. 9 is a cross-sectional view illustrating a manufacturing process of a semiconductor device of the present invention. 4 is a cross-sectional view illustrating a manufacturing process of a single crystal semiconductor layer of the present invention. 4 is a cross-sectional view illustrating a manufacturing process of a single crystal semiconductor layer of the present invention. 4 is a cross-sectional view illustrating a manufacturing process of a single crystal semiconductor layer of the present invention. 4 is a cross-sectional view illustrating a manufacturing process of a single crystal semiconductor layer of the present invention. 1 is a circuit diagram of a semiconductor device of the present invention. The figure which shows the apparatus which mounted the semiconductor device of this invention. The figure which shows the apparatus which mounted the semiconductor device of this invention. The figure which shows the apparatus which mounted the semiconductor device of this invention.

Explanation of symbols

101 single crystal semiconductor substrate 102 convex portion 103 concave portion 105 insulating film 106 insulating film 107 hydrogen ion 108 hydrogen implantation region 109 hydrogen implantation region 110 island-like semiconductor region 111 insulating substrate 112 convex portion 113 concave portion 115 insulating film 116 insulating film 117 hydrogen ion 118 Hydrogen implantation region 119 Hydrogen implantation region 120 Island-like semiconductor region 121 Insulating substrate 122 Protruding portion 123 Concavity 125 Insulating film 126 Insulating film 127 Hydrogen ion 128 Hydrogen implantation region 129 Hydrogen implantation region 130 Insular semiconductor region 131 Insulating substrate 301 Insulating film 307 Hydrogen Ion 308 Hydrogen implantation layer 320 Single crystal semiconductor layer 321 Insulating substrate 322 Convex portion 323 Concavity 325 Insulating film 327 Hydrogen ion 328 Hydrogen implantation layer 329 Hydrogen implantation region 331 Insulating substrate 332 Mask 340 Single crystal semiconductor layer 411 Antenna 412 Circuit unit 460 Power supply unit 461 Signal processing unit 462 Rectifier circuit 463 Retention capacitor 464 Demodulation circuit 465 Clock generation / correction circuit 466 Recognition / determination circuit 467 Memory controller 468 Mask ROM
469 Coding circuit 470 Modulation circuit 501 Semiconductor device 511 Bearer bond 512 Certificate 513 Label mount (separate paper)
514 Label 515 Box 516 Tag 517 Books 601 Insulating substrate 602 Insular semiconductor region 603 Insular semiconductor region 605 Insulating film 606 Insulating film 607 Gate insulating film 608 Gate electrode 609 Gate electrode 611 Impurity element 612 Impurity element 614 Mask 615 Mask 621 Channel formation Region 622 Channel formation region 623a Region 623b Region 624a Region 624b Region 625 Interlayer insulating film 627a Electrode 627b Electrode 628a Electrode 628b Electrode 629 Electrode 711 Housing 712 Display portion 713 Lens 714 Operation key 715 Shutter button 721 Housing 722 Display portion 723 Operation key 724 Optical sensor 730 Main body 731 Display unit 733 Operation unit 734 Earphone 741 Main body 742 Display unit 743 Operation key

Claims (4)

Forming a plurality of first protrusions and a plurality of first recesses on the single crystal semiconductor substrate;
Forming a first insulating film on the surface of the first convex portion and a second insulating film on the surface of the first concave portion;
Hydrogen ions are implanted into the first convex portion and the first concave portion, and a first hydrogen implanted region and a second hydrogen implanted region are formed below the first concave portion in the first convex portion. And
The single crystal semiconductor substrate is peeled along the first hydrogen injection region by bonding and heating the insulating substrate and the single crystal semiconductor substrate, and the first insulating film is disposed on the insulating substrate via the first insulating film. Forming island-like semiconductor regions,
By removing the second insulating film, a single crystal semiconductor substrate having a second protrusion and a second recess is obtained,
A method for manufacturing a semiconductor device, wherein a plurality of island-shaped semiconductor regions are formed on a plurality of insulating substrates by repeating insulating film formation, hydrogen ion implantation, bonding, and peeling. In claim 1,
Forming a gate insulating film covering the island-shaped semiconductor region formed on the insulating substrate via the first insulating film;
A gate electrode is formed on the island-shaped semiconductor region with the gate insulating film interposed therebetween,
Using the gate electrode as a mask, an impurity element imparting one conductivity is added, and a channel formation region, a source region, and a drain region are formed in the island-shaped semiconductor region,
Forming an interlayer insulating film covering the gate insulating film and the gate electrode;
A method for manufacturing a semiconductor device, comprising: forming an electrode electrically connected to each of the source region and the drain region over the interlayer insulating film. In claim 1 or claim 2,
Each of the first insulating film and the second insulating film is a silicon oxide film formed by a chemical vapor deposition method using an organosilane gas. In any one of Claims 1 thru | or 3,
The semiconductor device is characterized in that the insulating film formation, hydrogen ion implantation, bonding, and peeling are repeated until the depth of the first recess becomes smaller than the film thickness of the island-shaped semiconductor region. Method.

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