JP2008244180A - 実装構造体およびその製造方法 - Google Patents
実装構造体およびその製造方法 Download PDFInfo
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- JP2008244180A JP2008244180A JP2007083143A JP2007083143A JP2008244180A JP 2008244180 A JP2008244180 A JP 2008244180A JP 2007083143 A JP2007083143 A JP 2007083143A JP 2007083143 A JP2007083143 A JP 2007083143A JP 2008244180 A JP2008244180 A JP 2008244180A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13023—Disposition the whole bump connector protruding from the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16111—Disposition the bump connector being disposed in a recess of the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
【解決手段】本発明は、配線基板2と、配線基板2に実装された実装部品3と、を備えた実装構造体に関する。配線基板2は、複数の凹部と、各凹部の内表面に形成された導電層24と、を有しており、実装部品3は、凹部と対応する位置に、凹部に挿入される導電性の凸部30を有している。
【選択図】図3
Description
2 配線基板
21 凹部
22 (凹部の)底壁
23 開口部
24 導電層
25 コンタクト導体
3 半導体素子(実装部品)
30 (半導体素子の)バンプ(凸部)
Claims (14)
- 配線基板と、
前記配線基板に実装された実装部品と、
を備えた実装構造体であって、
前記配線基板は、複数の凹部と、前記各凹部の内表面に形成された導電層と、を有しており、
前記実装部品は、前記凹部と対応する位置に、前記凹部に挿入される導電性の凸部を有していることを特徴とする実装構造体。 - 前記導電層は、前記凹部の内表面を覆う膜状に形成されている、請求項1に記載の実装構造体。
- 前記凸部は、柱状に形成されている、請求項1に記載の実装構造体。
- 前記凸部は、先端部が丸みを帯びている、請求項3に記載の実装構造体。
- 前記複数の凸部は、隣接する前記凸部間のピッチが200μm以下である、請求項1に記載の実装構造体。
- 前記凹部は、開口部および底壁を有しており、
前記凹部は、前記底壁から前記開口部に向かって広がるテーパ状に形成されている、請求項1に記載の実装構造体。 - 前記導電層と前記凸部との間に介在し、これらの間の導通を図るためのコンタクト導体をさらに備えている、請求項1に記載の実装構造体。
- 前記コンタクト導体は、前記導電層の表面に膜状に形成されている、請求項7に記載の実装構造体。
- 前記コンタクト導体は、前記凸部の表面に膜状に形成されている、請求項7に記載の実装構造体。
- 前記コンタクト導体は、ハンダ、スズまたはインジウムから成る、請求項7に記載の実装構造体。
- 前記コンタクト導体は、異方性導電接着剤における導電成分である、請求項7に記載の実装構造体。
- 前記実装部品は、半導体素子である、請求項1に記載の実装構造体。
- 凹部を有し、前記凹部の内表面に導電層が形成された配線基板と、凸部が形成された実装部品と、を準備する工程と、
前記導電層の表面に、膜状のコンタクト導体を形成する工程と、
前記凹部に前記凸部を挿入するとともに、前記コンタクト導体と前記凸部とを接する工程と、
前記コンタクト導体を、前記コンタクト導体の融点以上であって前記凸部および前記導電層の融点以下の温度で加熱する工程と、
前記溶融した前記コンタクト導体を冷やすことによって、前記導電層と前記凸部とを接続する工程と、
を備えたことを特徴とする、実装構造体の製造方法。 - 前記導電層と前記凸部とを接続する工程において、前記コンタクト導体を冷やす温度は、前記コンタクト導体の融点以下の温度である、請求項13に記載の実装構造体の製造方法。
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JP2007083143A JP2008244180A (ja) | 2007-03-28 | 2007-03-28 | 実装構造体およびその製造方法 |
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JP2007083143A JP2008244180A (ja) | 2007-03-28 | 2007-03-28 | 実装構造体およびその製造方法 |
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JP2008244180A true JP2008244180A (ja) | 2008-10-09 |
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JP2007083143A Pending JP2008244180A (ja) | 2007-03-28 | 2007-03-28 | 実装構造体およびその製造方法 |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015198838A1 (ja) * | 2014-06-27 | 2015-12-30 | ソニー株式会社 | 半導体装置およびその製造方法 |
WO2015198836A1 (ja) * | 2014-06-27 | 2015-12-30 | ソニー株式会社 | 半導体装置およびその製造方法 |
WO2015198837A1 (ja) * | 2014-06-27 | 2015-12-30 | ソニー株式会社 | 半導体装置およびその製造方法 |
JP2016012771A (ja) * | 2014-06-27 | 2016-01-21 | 三菱電機株式会社 | 導波管接続構造およびその製造方法 |
JP2017220595A (ja) * | 2016-06-08 | 2017-12-14 | 日本電波工業株式会社 | 電子デバイス |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS6356922A (ja) * | 1986-08-28 | 1988-03-11 | Yokogawa Electric Corp | Icチツプの基板への取付け方法 |
JPH02170444A (ja) * | 1988-12-22 | 1990-07-02 | Matsushita Electric Works Ltd | 半導体素子の実装方法 |
JPH03218037A (ja) * | 1990-01-23 | 1991-09-25 | Sumitomo Electric Ind Ltd | 半導体素子実装用基板 |
JPH03218036A (ja) * | 1990-01-23 | 1991-09-25 | Sumitomo Electric Ind Ltd | 半導体素子実装用基板 |
JPH07169873A (ja) * | 1993-12-15 | 1995-07-04 | Nec Corp | 多層基板およびその製造方法 |
JPH11121527A (ja) * | 1997-10-21 | 1999-04-30 | Pfu Ltd | ベアチップ実装方法およびセラミック基板の製造方法およびセラミック基板ならびに半導体装置 |
-
2007
- 2007-03-28 JP JP2007083143A patent/JP2008244180A/ja active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS6356922A (ja) * | 1986-08-28 | 1988-03-11 | Yokogawa Electric Corp | Icチツプの基板への取付け方法 |
JPH02170444A (ja) * | 1988-12-22 | 1990-07-02 | Matsushita Electric Works Ltd | 半導体素子の実装方法 |
JPH03218037A (ja) * | 1990-01-23 | 1991-09-25 | Sumitomo Electric Ind Ltd | 半導体素子実装用基板 |
JPH03218036A (ja) * | 1990-01-23 | 1991-09-25 | Sumitomo Electric Ind Ltd | 半導体素子実装用基板 |
JPH07169873A (ja) * | 1993-12-15 | 1995-07-04 | Nec Corp | 多層基板およびその製造方法 |
JPH11121527A (ja) * | 1997-10-21 | 1999-04-30 | Pfu Ltd | ベアチップ実装方法およびセラミック基板の製造方法およびセラミック基板ならびに半導体装置 |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015198838A1 (ja) * | 2014-06-27 | 2015-12-30 | ソニー株式会社 | 半導体装置およびその製造方法 |
WO2015198836A1 (ja) * | 2014-06-27 | 2015-12-30 | ソニー株式会社 | 半導体装置およびその製造方法 |
WO2015198837A1 (ja) * | 2014-06-27 | 2015-12-30 | ソニー株式会社 | 半導体装置およびその製造方法 |
JP2016012771A (ja) * | 2014-06-27 | 2016-01-21 | 三菱電機株式会社 | 導波管接続構造およびその製造方法 |
JPWO2015198837A1 (ja) * | 2014-06-27 | 2017-04-20 | ソニー株式会社 | 半導体装置およびその製造方法 |
JPWO2015198836A1 (ja) * | 2014-06-27 | 2017-04-20 | ソニー株式会社 | 半導体装置およびその製造方法 |
JPWO2015198838A1 (ja) * | 2014-06-27 | 2017-05-25 | ソニー株式会社 | 半導体装置およびその製造方法 |
US10014248B2 (en) | 2014-06-27 | 2018-07-03 | Sony Corporation | Semiconductor device with less positional deviation between aperture and solder |
US10720402B2 (en) | 2014-06-27 | 2020-07-21 | Sony Corporation | Semiconductor device and method of manufacturing the same |
US10867950B2 (en) | 2014-06-27 | 2020-12-15 | Sony Corporation | Semiconductor device with a gap control electrode and method of manufacturing the semiconductor device |
JP2017220595A (ja) * | 2016-06-08 | 2017-12-14 | 日本電波工業株式会社 | 電子デバイス |
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