JP2008133544A - Conductive pattern and method for forming the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form a conductive pattern composed of SiGe of low resistance controlled to P-type or N-type selectively on a substrate at a low temperature of less than 500°C. <P>SOLUTION: A thin film of aluminum or chromium is formed in a pattern on an amorphous substrate composed of glass or silicon oxide. The SiGe is selectively deposited only on the thin film of aluminum or chromium formed in the pattern by a thermal CVD method using germanium fluoride and disilane as raw materials. On the obtained conductive pattern, the SiGe film is selectively formed only on the thin film of aluminum or chromium formed in the pattern on the amorphous substrate and not directly formed on the amorphous substrate. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for forming a conductive pattern on a substrate for use in a bonding layer such as an electronic device, an ohmic layer with an electrode, wiring, or the like.

Various Si-based electronic devices such as thin film transistors use a p-type or n-type controlled low-resistance Si-based semiconductor layer for the formation of matching layers, ohmic layers with electrodes, or wirings. It has been. In forming this semiconductor layer, if the semiconductor layer can be selectively formed only on a specific part that is required, it is extremely effective for shortening the process steps in device fabrication and improving the reliability and yield accompanying the miniaturization of elements. is there. Based on this idea, in a semiconductor process using a high-temperature process using single-crystal Si as a base material, a semiconductor layer is selectively formed only on a specific portion by CVD technology using halosilanes containing HCl as a raw material. It is.

  However, the fabrication of large area electronic devices such as thin film transistors and solar cells using inexpensive low-melting substrates requires a low-temperature process of 500 ° C. or lower for material fabrication. It is difficult to form a semiconductor layer. Therefore, in general, these semiconductor layers are formed by first forming a uniform semiconductor layer using various CVD techniques and the like, then patterning a resist layer using a photolithography technique, and etching using this as a mask. With the combination, the semiconductor layer is formed only in a specific portion. For this reason, not only the number of steps in device fabrication increases, but also one of the factors impairing the reliability and yield of elements.

  In the present invention, a low-resistance semiconductor layer used for a bonding layer of an electronic device, an ohmic layer with an electrode, a wiring between elements, or the like is selectively formed only on a specific substrate at a low temperature of 500 ° C. or lower, which has been difficult in the past. It aims at providing the method of forming in.

As a result of research, the present inventor has been found only in a Si base material such as a Si substrate patterned with a crystalline Si / SiO ₂ system, for example, SiO ₂ , in thermal CVD of germanium halide and silanes. Various inorganic conductive groups formed by selective growth of SiGe in a pattern on an amorphous substrate such as glass, silicon nitride, or silicon oxide, or on an insulating crystalline substrate such as sapphire It has been found that even when a material is used, it can be selectively grown only on a substrate patterned with SiGe.

  Furthermore, in the thermal CVD technique, by adding a dopant gas such as diborane, phosphine, or arsine used in the semiconductor process to the source gas, it is possible to deposit low-resistance SiGe controlled to p-type or n-type. confirmed. Based on this knowledge, SiGe is deposited by a thermal CVD method using a source gas containing a doping gas using a base material patterned with the above-described conductive material, which has been difficult to achieve at a temperature of 500 ° C. or lower. A technology has been established for easily forming a conductive pattern made of low-resistance SiGe selectively controlled to be p-type or n-type only on a patterned conductive substrate at a low temperature.

  The present invention is a conductive film formed in a pattern on a substrate using a thermal CVD method using germanium halide and silanes containing dopant gases such as diborane, phosphine, and arsine at a temperature of 500 ° C. or lower. The conductive pattern forming method is characterized in that low-resistance SiGe controlled to be p-type or n-type is selectively formed on a conductive substrate.

That is, the conductive pattern forming method of the present invention is a thermal CVD method in which an aluminum thin film or a chromium thin film is formed in a pattern on an amorphous substrate made of glass or silicon oxide, and germanium fluoride and disilane are used as raw materials. Thus, SiGe is selectively deposited only on the aluminum thin film or chromium thin film formed in the pattern. At this time, it is preferable that the raw material is configured to include a dopant gas.

In the conductive pattern of the present invention, the SiGe film is selectively formed only on an aluminum thin film or a chromium thin film formed in a pattern on an amorphous base material. It is not formed. At this time, the SiGe film is preferably configured to be p-type or n-type.

  The present invention is a method of forming a conductive pattern by selectively depositing low-resistance SiGe controlled to p-type or n-type on a conductive substrate at a low temperature of 500 ° C. or less by a thermal CVD method. is there. This is because a Si-based low-resistance semiconductor layer is selectively formed only on a specific portion by a selective growth technique that has been difficult to realize by a low temperature process of 500 ° C. or lower, which is conventionally used for manufacturing a large area device. Is possible. This makes it possible to form device bonding layers, ohmic layers that connect active layers and electrodes, wiring, etc. without film growth and subsequent photolithography and etching processes. It is a very useful invention that brings about new development.

For selective deposition of SiGe on a patterned substrate, it is important to use germanium halides such as germanium fluoride and germanium chloride and silane, disilane, or their halogen derivatives effective for reduction as source gases. It is. In this case, the source gas can be diluted with an inert gas such as He, Ar, or nitrogen or hydrogen. By selecting a dilution gas, it is possible to control the range of production conditions such as deposition temperature and reaction pressure at which selective SiGe deposition can be realized.

  The composition of SiGe deposited can be changed by the flow rate ratio of the source gas, but when disilane or germanium fluoride is used as the source material, the flow rate ratio (disilane / germanium fluoride) is suitably 0.5 to 40, Preferably it is 0.5-20.

  The selective growth property observed in this CVD system is considered to be due to the selective activation of the source gas on the surface playing an important role, and the conditions that induce the homogeneous source gas decomposition by heat near the surface. Then the selectivity disappears. Therefore, in realizing the selectivity, the selection of the substrate is important, and the film growth conditions, particularly the deposition temperature and reaction pressure that govern the reaction between the source gases near the surface are important parameters. The CVD film deposition requires a deposition temperature of 250 to 300 ° C. or higher, but the temperature range where selective growth can be realized is generally limited to a relatively low temperature range of 500 ° C. or lower. The reaction pressure is selected in relation to the deposition temperature. As a general tendency, the selectivity is lost under a high pressure condition where the reaction near the surface is dominant, and the lower the pressure is tens of Torr or less. Selective deposition is likely to occur.

For the production of p-type SiGe, diborane is effective as a p-type dopant. The carrier concentration can be controlled by the flow rate of diborane (10 ppm to 10% with respect to silanes). However, when the conductivity is about 10 S / cm (carrier concentration is 10 ¹⁷ to 10 ¹⁸ cm ⁻³ ), this system is used. Because of its unique characteristics, it can be manufactured without using a doping gas. On the other hand, for the production of n-type SiGe, it is necessary to use an n-type dopant gas, and phosphine and arsine are effective. The conductivity and carrier concentration can be similarly controlled by the flow rate of the dopant gas (10 ppm to 10% with respect to silanes).

  Base materials on which SiGe is selectively deposited include inorganic conductive base materials, for example, metals such as aluminum, chromium, tungsten, nickel, copper, silver, gold and alloys thereof, as well as some of ITO, tin oxide, and the like. It can be selected from conductive oxides. In the case of an oxide, it is conceivable that the metal formed by partially reducing the metal oxide constituting the oxide promotes the growth of a similar film. By forming these substrates in a pattern on the substrate, the conductive pattern made of SiGe can be selectively formed. However, the shape is not particularly limited to the pattern.

  The following examples illustrate the invention in detail, but are not limited thereto.

(Example 1)
Using a substrate in which an aluminum thin film is formed in a pattern on SiO ₂ formed by thermal oxidation of a Si wafer, germanium fluoride and disilane are flowed in a reaction vessel of 2.7 sccm and 20 sccm, respectively, and He is diluted for 300 sccm. When deposition was performed at a pressure of 0.45 torr and a substrate temperature of 325 ° C. for 20 minutes, 0.38 μm of SiGe was selectively deposited only on aluminum. The deposited film was p-type and the conductivity was 10-15 S / cm. Further, when the growth was carried out while changing the substrate temperature, selective growth was maintained up to 375 ° C., and non-selective SiGe film deposition was observed at a substrate temperature of 400 ° C. The film thickness was 0.55 μm at 350 ° C. and 1.1 μm at 375 ° C. Although there was a tendency for the conductivity to increase as the film thickness increased, none of the films showed a significant change in electrical properties.

(Example 2)
When a film was grown under the same conditions as in Example 1 using a substrate in which an aluminum thin film was formed in a pattern on a glass substrate, 0.4 μm of SiGe was selectively deposited only on aluminum. Even when the substrate material was changed from SiO ₂ to glass, there was no significant difference in the selective growth characteristics including the electrical characteristics of the film.

(Example 3)
Under the same conditions as in Example 1, a film was deposited using a substrate in which a chromium thin film was formed in a pattern on SiO2 formed by thermal oxidation of a Si wafer. 17 μm of SiGe was deposited. The conductivity of the deposited film was the same as in Example 1. Further, when the growth was carried out while changing the substrate temperature, selective growth was maintained up to 375 ° C., and non-selective SiGe film deposition was observed at a substrate temperature of 400 ° C. The film thickness was 0.35 μm at 350 ° C. and 0.7 μm at 375 ° C. None of the films showed a significant difference in electrical properties.

Example 4
Similarly to Example 2, when a film was grown using a glass substrate in which a chromium thin film was formed in a pattern on a glass substrate, a 0.2 μm SiGe film was selectively deposited on the chromium. The electrical characteristics of the deposited film were the same as in Example 1.

(Example 5)
Using a substrate in which an aluminum thin film is formed in a pattern on SiO ₂ formed by thermal oxidation of a Si wafer, germanium fluoride and disilane are respectively 2 sccm and 15 sccm, and n-type dopant gas is diluted with phosphine concentration of 1000 ppm with respect to disilane. For this purpose, Ar was allowed to flow in a 300 sccm reaction vessel, and deposition was performed at a pressure of 1 torr and a substrate temperature of 350 ° C. for 20 minutes. As a result, 0.6 μm of SiGe was selectively deposited only on aluminum. The film was n-type and the conductivity was 45 S / cm.

(Example 6)
Under the same conditions as in Example 5, CVD was performed using disilane containing 1000 ppm of diborane as a p-type dopant gas. As a result, a SiGe film of 0.5 μm was deposited only on aluminum. The deposited film was p-type and the conductivity was 22 S / cm.

In Example 1 and 3, it is an electron micrograph of the SiGe film | membrane selectively formed on aluminum (top) and chromium (bottom). The portion that looks flat is the SiO ₂ portion where no SiGe deposition is seen.

Claims (4)

An aluminum thin film or a chromium thin film is formed in a pattern on an amorphous substrate made of glass or silicon oxide,
A method for forming a conductive pattern, wherein SiGe is selectively deposited only on the aluminum thin film or chromium thin film formed in the pattern by a thermal CVD method using germanium fluoride and disilane as raw materials. The method for forming a conductive pattern according to claim 1, wherein the raw material contains a dopant gas. A conductive pattern in which a SiGe film is selectively formed only on an aluminum thin film or a chromium thin film formed in a pattern on an amorphous substrate, and is not formed on the amorphous substrate. The conductive pattern according to claim 3, wherein the SiGe film is p-type or n-type.

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