JP2008016523A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

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JP2008016523A
JP2008016523A JP2006184015A JP2006184015A JP2008016523A JP 2008016523 A JP2008016523 A JP 2008016523A JP 2006184015 A JP2006184015 A JP 2006184015A JP 2006184015 A JP2006184015 A JP 2006184015A JP 2008016523 A JP2008016523 A JP 2008016523A
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epitaxial growth
semiconductor device
semiconductor substrate
arsenic
silicon
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Tetsuya Ikuta
哲也 生田
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Sony Corp
ソニー株式会社
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<P>PROBLEM TO BE SOLVED: To form a smooth surface without generating irregularity on the surface of an epitaxial growth film in an extension area while arsenic (As) is doped at high concentration. <P>SOLUTION: The semiconductor device 1 is provided with a gate electrode 13 on a semiconductor substrate 11 with a gate insulation film 12 in-between, and it is also provided with extension areas 17 and 18 which are formed on the semiconductor substrate 11 on both sides of the gate electrode 13 and contain impurities. The extension areas 17 and 18 are formed of an epitaxial growth film which includes silicon germanium containing arsenic and is epitaxially grown, and the epitaxial growth film is formed by allowing silicon and germanium to selectively grow on the semiconductor substrate 11 while doping arsenic. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device having a source / drain extension or a source / drain using silicon germanium and a method for manufacturing the same.

  High integration and high speed of transistors have been realized by miniaturization of transistors based on scaling rules. In recent years, the short channel effect associated with miniaturization has adversely affected device characteristics such as roll-off degradation. In order to suppress the short channel effect, it is necessary to reduce the impurity diffusion depth (Xj), but in the conventional MOSFET (Metal Oxide Semiconductor Field Effect Transistor) structure, an increase in parasitic resistance has been a problem. Therefore, a raised source drain extension structure (hereinafter referred to as an RSDE structure) has been proposed in which source / drain extension regions are formed so as to be stacked by selective epitaxial growth. This RSDE structure has been studied as a structure necessary for suppressing the short channel effect because Xj can be suppressed shallowly and an increase in parasitic resistance can be suppressed.

In order to suppress the Xj depth in the formation of the RSDE structure, in-situ doped silicon selective epitaxial growth has been studied in place of the conventional film formation by selective silicon epitaxial growth, a process using ion implantation and RTA. For example, a selective epitaxial film formation technique using dichlorosilane (Si 2 H 2 Cl 2 ), hydrogen chloride (HCl), and arsine (AsH 3 ) has been studied (for example, see Non-Patent Document 1).

Ikuta, Miyanami, Fujita, Iwamoto, 24a-W-1 "Examination of high activation in atmospheric pressure In-situ As doped Si selective epitaxial growth process" 53rd Applied Physics Related Conference Lecture Preliminary Lectures p. 903 2006

  The problem to be solved is that when an in-situ doped silicon selective epitaxial growth technique is used, if the arsenic (As) concentration is increased, the surface of the extension region becomes uneven, so the arsenic (As) concentration is reduced. It is a point that cannot be raised.

  An object of the present invention is to form a smooth surface without generating irregularities on the surface of an epitaxial growth film in an extension region in a state where arsenic (As) is doped at a high concentration.

  The semiconductor device according to the present invention (first semiconductor device) includes a gate electrode on a semiconductor substrate via a gate insulating film, and an extension region containing impurities formed on the semiconductor substrate on both sides of the gate electrode. The extension region is made of an epitaxially grown film epitaxially grown in a state where arsenic is contained in silicon germanium.

In the semiconductor device of the present invention (first semiconductor device), since the extension region is made of a film epitaxially grown in a state in which arsenic is contained in silicon germanium, this epitaxially grown film has no conventional unevenness on the growth surface. Arsenic (As) having a concentration higher than that of the silicon epitaxial growth film, for example, about 5 × 10 19 atoms / cm 3 or more can be included.

  A semiconductor device (second semiconductor device) according to the present invention includes a gate electrode on a semiconductor substrate with a gate insulating film interposed therebetween, and includes a source / impurity containing impurities formed on the semiconductor substrate on both sides of the gate electrode. A semiconductor device having a drain region, wherein the source / drain region is made of an epitaxially grown film epitaxially grown in a state where arsenic is contained in silicon germanium.

In the semiconductor device (second semiconductor device) of the present invention, the source / drain regions are made of a film epitaxially grown in a state in which arsenic is contained in silicon germanium. Therefore, the epitaxially grown film has no unevenness on the growth surface. It may contain arsenic (As) at a concentration higher than that of a conventional silicon epitaxial growth film, for example, about 5 × 10 19 atoms / cm 3 or more.

  The semiconductor device manufacturing method (first manufacturing method) according to the present invention includes an extension formed by forming a gate electrode on a semiconductor substrate through a gate insulating film, and containing impurities on the semiconductor substrate on both sides of the gate electrode. A method of manufacturing a semiconductor device comprising a step of forming a region by selective epitaxial growth, wherein the selective epitaxial growth selectively grows silicon and germanium on the semiconductor substrate while doping arsenic. .

In the semiconductor device manufacturing method (first manufacturing method) of the present invention, since the extension region is formed by selectively epitaxially growing silicon and germanium on the semiconductor substrate while doping arsenic, the surface of the extension region is uneven. Without generation, arsenic (As) having a concentration higher than that of the conventional silicon epitaxial growth film, for example, about 5 × 10 19 atoms / cm 3 or higher can be included in the silicon germanium layer formed by epitaxial growth. This is presumably because arsenic is taken into the lattice of silicon germanium, so that the formation of irregularities due to doped arsenic is suppressed.

  According to another aspect of the present invention, there is provided a semiconductor device manufacturing method (second manufacturing method) in which a gate electrode is formed on a semiconductor substrate via a gate insulating film, and an impurity is contained on the semiconductor substrate on both sides of the gate electrode. A method of manufacturing a semiconductor device comprising a step of forming a drain region by selective epitaxial growth, wherein the selective epitaxial growth selectively grows silicon and germanium on the semiconductor substrate while doping arsenic. And

In the semiconductor device manufacturing method (second manufacturing method) of the present invention, the source / drain regions are formed by selectively epitaxially growing silicon and germanium on the semiconductor substrate while doping arsenic. The silicon germanium layer formed by epitaxial growth contains arsenic (As) having a concentration higher than that of the conventional silicon epitaxial growth film, for example, about 5 × 10 19 atoms / cm 3 or higher, without causing irregularities on the surface. Can do. This is presumably because arsenic is taken into the lattice of silicon germanium, so that the formation of irregularities due to doped arsenic is suppressed.

  According to the semiconductor device (first semiconductor device) of the present invention, since silicon germanium is used for the epitaxial growth film for forming the extension region, the surface of the extension region becomes uneven even when high concentration of arsenic is included. There is an advantage that there is no.

  According to the semiconductor device (second semiconductor device) of the present invention, since silicon germanium is used for the epitaxial growth film for forming the source / drain regions, the surface of the source / drain regions can be formed even if high-concentration arsenic is included. There is an advantage that there is no unevenness.

  According to the method for manufacturing a semiconductor device of the present invention (first manufacturing method), silicon and germanium are selectively epitaxially grown on a semiconductor substrate while doping arsenic to form an extension region. There is an advantage that the surface of the extension region can be epitaxially grown on a smooth surface.

  According to the semiconductor device manufacturing method (second manufacturing method) of the present invention, since the source and drain regions are formed by selectively epitaxially growing silicon and germanium on the semiconductor substrate while doping arsenic, the surface is uneven. There is an advantage that the surface of the source / drain region can be epitaxially grown on a smooth surface without being formed.

  An embodiment (first example) of the semiconductor device of the present invention will be described with reference to a schematic sectional view of FIG.

  As shown in FIG. 1, a gate electrode 13 is formed on a semiconductor substrate 11 via a gate insulating film 12. An insulating film 14 is formed on the gate electrode 13. The insulating film 14 is made of, for example, a silicon oxide film or a silicon nitride film. Further, sidewall insulating films 15 and 16 are formed on both sides of the gate electrode 13. The sidewall insulating films 15 and 16 are made of, for example, a silicon oxide film or a silicon nitride film. The semiconductor substrate 11 is formed with an element isolation region 31 that isolates the transistor region. The element isolation region 31 has an STI (Shallow Trench Isolation) structure, for example.

  On the semiconductor substrate 11 on both sides of the gate electrode 13, source / drain extension regions 17 and 18 made of silicon germanium layers doped with arsenic (As) are formed by selective epitaxial growth. The structure of the extension regions 17 and 18 is called a Raised Source Drain Extension structure (RSDE structure) or an elevated source / drain extension structure.

According to the semiconductor device 1, the source / drain extension regions 17 and 18 are formed of an epitaxially grown film epitaxially grown in a state where arsenic is contained in silicon germanium. There is an advantage that arsenic (As) can be contained at a concentration higher than that of the silicon epitaxial growth film, for example, about 5 × 10 19 atoms / cm 3 or more.

  An embodiment (second example) of the semiconductor device of the present invention will be described with reference to the schematic sectional view of FIG.

  As shown in FIG. 2, a gate electrode 13 is formed on a semiconductor substrate 11 with a gate insulating film 12 interposed. An insulating film 14 is formed on the gate electrode 13. The insulating film 14 is made of, for example, a silicon oxide film or a silicon nitride film. Extension regions 17 and 18 are formed on the semiconductor substrate 11 on both sides of the gate electrode 13. This extension region can be formed by epitaxial growth as in the first embodiment. Further, sidewall insulating films 15 and 16 are formed on the extension regions 17 and 18 on both sides of the gate electrode 13. The sidewall insulating films 15 and 16 are made of, for example, a silicon oxide film or a silicon nitride film. The semiconductor substrate 11 has an element isolation region (not shown) for isolating the transistor region. This element isolation region has an STI (Shallow Trench Isolation) structure, for example.

  Source / drain regions comprising silicon germanium layers doped with arsenic (As) formed on the extension regions 17 and 18 via the sidewall insulating films 15 and 16 on both sides of the gate electrode 13 by selective epitaxial growth. 19 and 20 are formed. The structure of the source / drain regions 19 and 20 is called a raised source drain structure (RSD structure) or an elevated source / drain structure.

According to the semiconductor device 2, since the source / drain regions 19 and 20 are made of an epitaxially grown film epitaxially grown in a state in which arsenic is contained in silicon germanium, the surface of the source / drain regions 19 and 20 is not made uneven. There is an advantage that arsenic (As) can be contained at a concentration higher than that of the silicon epitaxial growth film, for example, about 5 × 10 19 atoms / cm 3 or more.

  Next, an embodiment (first example of the manufacturing method) according to the method for manufacturing a semiconductor device of the present invention will be described with reference to the manufacturing process sectional view of FIG.

As shown in FIG. 3A, an element isolation region 31 that isolates an element formation region (transistor formation region) from a semiconductor substrate (for example, a silicon substrate) 11 is formed of, for example, a silicon oxide insulating film. A gate electrode 13 is formed on the semiconductor substrate 11 in the element formation region via a gate insulating film 12. An insulating film 14 is formed on the gate electrode 13, and side walls 15 and 16 are formed on the side walls of the gate electrode 13. The insulating film 14 and the sidewalls 15 and 16 are formed of a material that serves as an epitaxial growth mask in order to form a silicon germanium epitaxial growth layer doped with arsenic at a high concentration by selective epitaxial growth on the source / drain regions in a later step. For example, it is formed of a material such as silicon oxide (SiO 2 ), silicon nitride (SiN), or silicon oxynitride (SiON). The element isolation region 31 can be formed, for example, with an STI (Shallow Trench Isolation) structure.

  Next, as shown in FIG. 3B, a silicon germanium layer doped with arsenic (As) is selectively formed on the semiconductor substrate 11 by a selective epitaxial growth technique. This silicon germanium layer becomes extension regions 17 and 18. In this selective epitaxial growth, the silicon germanium layer doped with arsenic (As) is selectively epitaxially grown only on the semiconductor substrate 11 using the insulating film 14, the sidewall insulating films 15 and 16, the element isolation region 31 and the like as a mask. it can. The structure of the extension regions 17 and 18 is called a Raised Source Drain Extension structure (RSDE structure) or an elevated source / drain extension structure, and is formed by selectively forming an epitaxial layer on the semiconductor substrate 11. Is done.

Specifically, when an atmospheric pressure epitaxial vapor phase growth apparatus (not shown) is used and the chamber volume is 5L-20L as an example, the pressure of the epitaxial growth atmosphere is set to atmospheric pressure (here atmospheric pressure is normal on the ground). For example, 1 atm = 1013 hPa), growth temperature (for example, substrate temperature) is 750 ° C., source gas, for example, silicon source gas, dichlorosilane (SiH 2 Cl 2 ), germanium source gas As germanium (GeH 4 ), as a doping source gas arsine (AsH 3 ) (for example, 1% by volume diluted with hydrogen (H 2 )), as a gas for selective growth, hydrogen chloride (HCl), and a doping substance are uniformly distributed Hydrogen (H 2 ) is used as a gas for this purpose.

The flow rate of each gas, hydrogen dichlorosilane (SiH 2 Cl 2) to 50 cm 3 / min, germane (GeH 4) a 5cm 3 / min-200cm 3 / min, arsine (AsH 3) (1 vol% ( H 2 ) is set to 10 cm 3 / min, hydrogen chloride (HCl) is set to 25 cm 3 / min, and hydrogen (H 2 ) is set to 20 L / min-30 L / min. Epitaxial growth under such conditions enables selective epitaxial growth in the source / drain regions.

The substrate temperature can be appropriately determined in the range of 650 ° C. to 750 ° C. The supply amount of the raw material gas, dichlorosilane (SiH 2 Cl 2) 50cm 3 / min-500cm 3 / min, arsine (AsH 3) 5 cm 3 (diluted with hydrogen (H 2) to 1% by volume) / Min-200 cm 3 / min, hydrogen chloride (HCl) at 15 cm 3 / min-200 cm 3 / min, germane (GeH 4 ) at 5 cm 3 / min-200 cm 3 / min, and hydrogen (H 2 ) at 10 L / min- It can be determined as appropriate within the range of 30 L / min.

Further, the arsenic (As) concentration and the germanium concentration can be increased by increasing the supply flow rate of GeH 4 . This will be described with reference to FIG. FIG. 4 shows the arsenic (As) doping concentration and germanium concentration when HCl is supplied at 25 cm 3 / min, AsH 3 is supplied at 10 cm 3 / min, H 2 is supplied at 20 L / min, and the flow rate of GeH 4 is changed. It is shown. As shown in FIG. 4, it can be seen that the As concentration and the germanium concentration increase as the GeH 4 flow rate increases.

Further, by increasing the supply flow rate of GeH 4 , the film formation rate can be increased and the specific resistance of the film can be decreased. This will be described with reference to FIG. FIG. 5 shows specific resistance and growth rate when the flow rate of GeH 4 is changed. As shown in FIG. 5, it can be seen that the growth rate of epitaxial growth increases as the GeH 4 flow rate increases. It can also be seen that the specific resistance decreases as the GeH 4 flow rate increases.

In the above embodiment, dichlorosilane is used as one of the source gases, but trichlorosilane trichlorosilane (SiHCl 3 ) can be used instead. Also, monosilane (SiH 4 ), disilane (Si 2 H 6 ), or trisilane (Si 3 H 8 ) can be used instead of dichlorosilane. In this case, hydrogen chloride gas or chlorine gas is used as a chlorine supply source. It is also preferable to add chlorine gas in order to increase the selectivity of epitaxial growth.

In the manufacturing method of the first embodiment, since silicon germanium is selectively epitaxially grown on the semiconductor substrate 11 while doping arsenic, the surface of the extension regions 17 and 18 is not uneven, and the conventional silicon epitaxial growth film is used. High concentration, for example, arsenic (As) at a concentration of about 5 × 10 19 / cm 3 or higher can be included in the silicon germanium layer formed by epitaxial growth. This is presumably because arsenic is taken into the lattice of silicon germanium, so that the formation of irregularities due to doped arsenic is suppressed. Therefore, there is an advantage that a silicon germanium layer containing high-concentration arsenic can be epitaxially grown so that the surfaces of the extension regions 17 and 18 become smooth surfaces.

In the manufacturing method of the first embodiment, arsenic (As) is used as a doping material. However, when a p-type extension region is formed, diborane (B 2 H 6 ) is used as a doping material and the same as described above. An extension region made of silicon germanium containing boron (B) can be formed by a selective epitaxial growth method. When forming an n-type epitaxial region, phosphine (PH 3 ) is used as a doping substance, and an extension region made of silicon germanium containing phosphorus (P) may be formed by the same selective epitaxial growth method as described above. it can.

  Next, an embodiment (second example of the manufacturing method) according to the manufacturing method of the semiconductor device of the present invention will be described with reference to the manufacturing process sectional view of FIG.

As shown in FIG. 6A, an element isolation region (not shown) for isolating an element formation region (transistor formation region) is formed on a semiconductor substrate (for example, a silicon substrate) 11 with, for example, a silicon oxide insulating film. . A gate electrode 13 is formed on the semiconductor substrate 11 in the element formation region via a gate insulating film 12. An insulating film 14 may be formed on the gate electrode 13. In addition, extension regions 17 and 18 are formed on the semiconductor substrate 11 on both sides of the gate electrode 13. The extension regions 17 and 18 can be formed by epitaxial growth as in the first embodiment. Further, sidewall insulating films 15 and 16 are formed on the extension regions 17 and 18 on both sides of the gate electrode 13. The insulating film 14 and the sidewalls 15 and 16 are materials that serve as a mask for epitaxial growth in order to form a silicon germanium epitaxial growth layer doped with arsenic at a high concentration by selective epitaxial growth on the extension regions 17 and 18 in a later step. For example, it is made of a material such as silicon oxide (SiO 2 ), silicon nitride (SiN), or silicon oxynitride (SiON). The element isolation region (not shown) can be formed, for example, with an STI (Shallow Trench Isolation) structure.

  Next, as shown in FIG. 6B, a silicon germanium layer doped with arsenic (As) is selectively formed on the extension regions 17 and 18 by a selective epitaxial growth technique. This silicon germanium layer becomes the source / drain regions 19 and 20. In this selective epitaxial growth, a silicon germanium layer doped with arsenic (As) is formed only on the extension regions 17 and 18 by using the insulating film 14, the sidewall insulating films 15 and 16, element isolation regions (not shown) as masks. It can be selectively epitaxially grown. The structure of the source / drain regions 19 and 20 is called a raised source drain structure (RSD structure) or an elevated source / drain structure, and is formed by selectively forming an epitaxial layer.

Specifically, when an atmospheric pressure epitaxial vapor phase growth apparatus (not shown) is used and the chamber volume is 5L-20L as an example, the pressure of the epitaxial growth atmosphere is set to atmospheric pressure (here atmospheric pressure is normal on the ground). For example, 1 atm = 1013 hPa), growth temperature (for example, substrate temperature) is 750 ° C., source gas, for example, silicon source gas, dichlorosilane (SiH 2 Cl 2 ), germanium source gas As germanium (GeH 4 ), as a doping source gas arsine (AsH 3 ) (for example, 1% by volume diluted with hydrogen (H 2 )), as a gas for selective growth, hydrogen chloride (HCl), and a doping substance are uniformly distributed Hydrogen (H 2 ) is used as a gas for this purpose.

The flow rate of each gas, hydrogen dichlorosilane (SiH 2 Cl 2) to 50 cm 3 / min, germane (GeH 4) a 5cm 3 / min-200cm 3 / min, arsine (AsH 3) (1 vol% ( H 2 ) is set to 10 cm 3 / min, hydrogen chloride (HCl) is set to 25 cm 3 / min, and hydrogen (H 2 ) is set to 20 L / min-30 L / min. Epitaxial growth under such conditions enables selective epitaxial growth in the source / drain formation region.

The substrate temperature can be appropriately determined in the range of 650 ° C. to 750 ° C. The supply amount of the raw material gas, dichlorosilane (SiH 2 Cl 2) 50cm 3 / min-500cm 3 / min, arsine (AsH 3) 5 cm 3 (diluted with hydrogen (H 2) to 1% by volume) / Min-200 cm 3 / min, hydrogen chloride (HCl) at 15 cm 3 / min-200 cm 3 / min, germane (GeH 4 ) at 5 cm 3 / min-200 cm 3 / min, and hydrogen (H 2 ) at 10 L / min- It can be determined as appropriate within the range of 30 L / min.

In addition, as described with reference to FIG. 4, it can be seen that the As concentration and the germanium concentration increase as the GeH 4 flow rate increases. Furthermore, as explained with reference to FIG. 5, it can be seen that the growth rate of epitaxial growth increases with an increase in the GeH 4 flow rate. It can also be seen that the specific resistance decreases as the GeH 4 flow rate increases.

In the above embodiment, dichlorosilane is used as one of the source gases, but trichlorosilane trichlorosilane (SiHCl 3 ) can be used instead. Also, monosilane (SiH 4 ), disilane (Si 2 H 6 ), or trisilane (Si 3 H 8 ) can be used instead of dichlorosilane. In this case, hydrogen chloride gas or chlorine gas is used as a chlorine supply source. It is also preferable to add chlorine gas in order to increase the selectivity of epitaxial growth.

In the manufacturing method of the second embodiment, since silicon germanium is selectively epitaxially grown while doping arsenic, the surface of the source / drain regions 19 and 20 is not uneven, and the concentration is higher than that of the conventional silicon epitaxial growth film. For example, arsenic (As) at a concentration of about 5 × 10 19 / cm 3 or higher can be included in the silicon germanium layer formed by epitaxial growth. This is presumably because arsenic is taken into the lattice of silicon germanium, so that the formation of irregularities due to doped arsenic is suppressed. Therefore, there is an advantage that a silicon germanium layer containing high-concentration arsenic can be epitaxially grown so that the surfaces of the source / drain regions 19 and 20 become smooth surfaces.

In the manufacturing method of the second embodiment, arsenic (As) is used as a doping material. However, when a p-type extension region is formed, diborane (B 2 H 6 ) is used as a doping material and the same as described above. Source / drain regions made of silicon germanium containing boron (B) can be formed by selective epitaxial growth. When forming an n-type epitaxial region, phosphine (PH 3 ) is used as a doping material, and source / drain regions made of silicon germanium containing phosphorus (P) are formed by the same selective epitaxial growth method as described above. be able to.

1 is a schematic cross-sectional view showing an embodiment (first embodiment) of a semiconductor device according to the present invention. It is a schematic structure sectional view showing one embodiment (the 2nd example) concerning a semiconductor device of the present invention. It is manufacturing process sectional drawing which showed one Embodiment (1st Example) which concerns on the manufacturing method of the semiconductor device of this invention. It is the figure which showed the relationship between the arsenic density | concentration and germanium density | concentration in the selective epitaxial growth concerning this invention, and a germane flow rate. It is the figure which showed the relationship between the specific resistance in the selective epitaxial growth concerning this invention, a growth rate, and a germane flow rate. It is manufacturing process sectional drawing which showed one Embodiment (2nd Example) which concerns on the manufacturing method of the semiconductor device of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1, 2 ... Semiconductor device, 11 ... Semiconductor substrate, 12 ... Gate insulating film, 13 ... Gate electrode, 17, 18 ... Extension area | region, 19, 20 ... Source-drain area | region

Claims (12)

  1. A semiconductor device comprising a gate electrode on a semiconductor substrate via a gate insulating film, and an extension region containing impurities formed on the semiconductor substrate on both sides of the gate electrode,
    The extension region comprises an epitaxially grown film epitaxially grown in a state where arsenic is contained in silicon germanium.
  2. The semiconductor substrate comprises a silicon substrate;
    The semiconductor device according to claim 1, wherein the epitaxially grown film has a strain with respect to the semiconductor substrate.
  3. A semiconductor device comprising a gate electrode on a semiconductor substrate through a gate insulating film, and comprising source / drain regions containing impurities formed on the semiconductor substrate on both sides of the gate electrode,
    The source / drain region comprises an epitaxially grown film epitaxially grown in a state where arsenic is contained in silicon germanium.
  4. The semiconductor substrate comprises a silicon substrate;
    The semiconductor device according to claim 3, wherein the epitaxial growth film is distorted with respect to the semiconductor substrate.
  5. A method of manufacturing a semiconductor device, comprising: forming a gate electrode on a semiconductor substrate via a gate insulating film; and forming an extension region containing impurities on the semiconductor substrate on both sides of the gate electrode by selective epitaxial growth Because
    The selective epitaxial growth is
    A method for manufacturing a semiconductor device, wherein silicon and germanium are selectively epitaxially grown on the semiconductor substrate while doping arsenic.
  6. The selective epitaxial growth is
    The method of manufacturing a semiconductor device according to claim 5, wherein the method is performed after the periphery of the gate electrode is covered with an insulating film.
  7. In the selective epitaxial growth,
    Using gas containing silicon, hydrogen and chlorine as silicon raw material,
    Using germanium and hydrogen gas for the germanium raw material,
    The method for manufacturing a semiconductor device according to claim 5, wherein a gas comprising arsenic and hydrogen is used as the arsenic raw material.
  8. In the selective epitaxial growth,
    The method for manufacturing a semiconductor device according to claim 7, wherein at least one of chlorine gas and hydrogen chloride gas is added to the epitaxial growth atmosphere.
  9. A semiconductor device comprising a step of forming a gate electrode on a semiconductor substrate via a gate insulating film, and forming a source / drain region containing impurities on the semiconductor substrate on both sides of the gate electrode by selective epitaxial growth. A manufacturing method comprising:
    The selective epitaxial growth is
    A method for manufacturing a semiconductor device, wherein silicon and germanium are selectively epitaxially grown on the semiconductor substrate while doping arsenic.
  10. The selective epitaxial growth is
    The method for manufacturing a semiconductor device according to claim 9, which is performed after the periphery of the gate electrode is covered with an insulating film.
  11. In the selective epitaxial growth,
    Using gas containing silicon, hydrogen and chlorine as silicon raw material,
    Using germanium and hydrogen gas for the germanium raw material,
    The method for manufacturing a semiconductor device according to claim 9, wherein a gas comprising arsenic and hydrogen is used as the arsenic raw material.
  12. In the selective epitaxial growth,
    The method for manufacturing a semiconductor device according to claim 11, wherein at least one of chlorine gas and hydrogen chloride gas is added to the epitaxial growth atmosphere.
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JPS6313379A (en) * 1986-07-04 1988-01-20 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and manufacture thereof
JPH08167718A (en) * 1994-10-12 1996-06-25 Nec Corp Mis fet and manufacture thereof
JPH08186257A (en) * 1995-01-04 1996-07-16 Nec Corp Field effect type transistor and its production
JPH08330582A (en) * 1995-06-02 1996-12-13 Oki Electric Ind Co Ltd Mosfet and its manufacture
JPH11163343A (en) * 1997-11-28 1999-06-18 Nec Corp Semiconductor device and its manufacture
JP2003158200A (en) * 2001-09-24 2003-05-30 Sharp Corp Deep sub-micron raised source/drain cmos structure and method of making the same
US20050250298A1 (en) 2004-04-23 2005-11-10 Matthias Bauer In situ doped epitaxial films
WO2006060339A2 (en) * 2004-12-01 2006-06-08 Applied Materials, Inc. Selective epitaxy process with alternating gas supply

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Publication number Priority date Publication date Assignee Title
JPS6313379A (en) * 1986-07-04 1988-01-20 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and manufacture thereof
JPH08167718A (en) * 1994-10-12 1996-06-25 Nec Corp Mis fet and manufacture thereof
JPH08186257A (en) * 1995-01-04 1996-07-16 Nec Corp Field effect type transistor and its production
JPH08330582A (en) * 1995-06-02 1996-12-13 Oki Electric Ind Co Ltd Mosfet and its manufacture
JPH11163343A (en) * 1997-11-28 1999-06-18 Nec Corp Semiconductor device and its manufacture
JP2003158200A (en) * 2001-09-24 2003-05-30 Sharp Corp Deep sub-micron raised source/drain cmos structure and method of making the same
US20050250298A1 (en) 2004-04-23 2005-11-10 Matthias Bauer In situ doped epitaxial films
WO2006060339A2 (en) * 2004-12-01 2006-06-08 Applied Materials, Inc. Selective epitaxy process with alternating gas supply

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* Cited by examiner, † Cited by third party
Title
JPN6012064844; 宮波有樹 他: '"大気圧In-situ As doped Si選択エピタキシャル成長プロセスによる高濃度・高成長速度化検討"' 第66回応用物理学会学術講演会講演予稿集第2分冊 , 20050911, p724 10p-A-2

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