JP2008010849A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of achieving speed-up of signal processing and definitely retaining a given communication distance even in such a case that a semiconductor thin film formed on a substrate is employed and also to provide a method of manufacturing the semiconductor device. <P>SOLUTION: The semiconductor device has an analog circuit section provided with a capacitor section and a digital circuit section formed on a substrate. The capacitor section is provided with a plurality of blocks each including a plurality of capacitor elements, first wirings and second wirings. Further, each of the plurality of the capacitor elements provided in each block includes a semiconductor film having a first impurity region and a plurality of second impurity regions spaced apart from each other interposing the first impurity region in between and a conductive film formed on the first impurity region through the intermediary of an insulating film to have a capacitor formed of the first impurity region, the insulating film and the conductive film. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and more particularly to a method for manufacturing a semiconductor device using a thin film transistor.

  In recent years, with the spread of the Internet, IT (Information Technology) has permeated the whole world and brought about a major change. In recent years, in particular, an environment where a network can be accessed anytime and anywhere has been prepared, as is called a ubiquitous information society. In such an environment, attention has been paid to an individual recognition technique in which an ID (individual identification number) is given to each individual object, thereby clarifying the history of the target object, which is useful for production, management, and the like.

  Among them, a small semiconductor device (RFID (Radio Frequency Identification) tag, ID tag, IC tag, wireless tag) in which an ultra-small IC chip manufactured using a single crystal Si substrate and an antenna for wireless communication are combined. , Also called wireless chips and electronic tags). The semiconductor device can wirelessly write data or read data by using a wireless communication device (hereinafter referred to as “reader / writer”).

  As an application field of such a semiconductor device, for example, merchandise management in the distribution industry can be cited. At present, merchandise management using bar codes and the like is the mainstream, but since bar codes are optically read, data cannot be read if there is a shield. On the other hand, since the above-described semiconductor device reads data wirelessly, it can be read even if there is a shielding object. Accordingly, a semiconductor device such as an RFID tag capable of improving the efficiency of product management and reducing the cost is expected as an alternative technology for barcodes, and the semiconductor device includes an IC card, a label with an IC tag, a ride A wide range of applications such as tickets, air passenger tickets, and automatic payment of fees are expected (see, for example, Patent Document 1 and Patent Document 2).

  In addition, when providing a semiconductor device such as an RFID tag in various products, it is desired to provide the semiconductor device at a low cost. When a semiconductor device is manufactured using a single crystal Si substrate, single crystal Si is used. Since the substrate is expensive, there is a limit to cost reduction. Furthermore, the Si substrate is currently used in various fields, and if the Si substrate is used in large quantities, there is a concern that the supply of the Si substrate will be insufficient. As a result, when a single crystal Si substrate is used, cost reduction becomes more difficult.

  On the other hand, in order to provide a semiconductor device at low cost, a technique for forming a semiconductor device using a semiconductor thin film formed over a glass substrate or a plastic substrate has been studied. If such a substrate is used, the area and shape of the substrate are not greatly limited. For example, if a rectangular substrate having a side of 1 meter or more is used, productivity can be improved as compared with a circular silicon substrate. Reduction of manufacturing cost is expected.

In addition, when a semiconductor device is manufactured using a semiconductor thin film, a crystalline semiconductor thin film is used to improve the signal processing speed of the semiconductor device, but the crystalline state of the semiconductor thin film formed on the substrate There is a problem that the processing speed, the communication distance, and the like depend on the layout of a circuit formed using the semiconductor thin film. In the future, such semiconductor devices are increasingly required to reduce costs, increase processing speed, and increase communication distance.
JP 2002-366117 A JP 2002-123805 A

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device that can realize high speed signal processing and secure a certain communication distance even when a semiconductor thin film formed on a substrate is used. The issue is to provide.

  The semiconductor device of the present invention has a plurality of blocks each including a plurality of capacitors, a first wiring, and a capacitor having a second wiring, and each of the plurality of capacitors is a first capacitor. A semiconductor film having a first impurity region and a second impurity region spaced apart with the first impurity region interposed therebetween, and a conductive film provided above the first impurity region with an insulating film interposed therebetween A capacitor is formed by the first impurity region, the insulating film, and the conductive film, the conductive film is electrically connected to the first wiring, and the second impurity region is electrically connected to the second wiring. The plurality of capacitive elements are connected in parallel to each other. Note that the block here refers to a group of a plurality of capacitor elements, and more specifically, a plurality of semiconductor films included in each of the plurality of capacitor elements are provided. It points to a group.

  The semiconductor device of the present invention includes a plurality of blocks each including a plurality of capacitors, a first wiring, and a capacitor having a second wiring, and each of the plurality of capacitors includes: A semiconductor film having a first impurity region and a second impurity region spaced apart with the first impurity region in between; and a conductive film provided above the first impurity region with an insulating film interposed therebetween A capacitor is formed by the first impurity region, the insulating film, and the conductive film, and the conductive film provided in each of the plurality of capacitor elements is electrically connected to each other through the first wiring. The second impurity regions provided in each of the plurality of capacitor elements are electrically connected to each other through the second wiring.

  The semiconductor device of the present invention is characterized in that, in the above structure, the first wiring and the second wiring are provided on the same surface. In addition, a plurality of capacitor elements provided in a plurality of blocks are connected in parallel to each other. In addition, the first wiring is provided with a material whose resistance is lower than that of the conductive film.

  In the semiconductor device of the present invention having the above structure, the distance between semiconductor films provided in different blocks in a plurality of blocks is 20 μm or more and 200 μm or less.

  According to a method for manufacturing a semiconductor device of the present invention, a plurality of blocks each having a plurality of semiconductor films are formed over a substrate, a first impurity region is formed by introducing a first impurity element into the plurality of semiconductor films, A first insulating film is formed so as to cover the semiconductor film, and a conductive film is selectively formed over each of the plurality of semiconductor films via the first insulating film so as to cover a part of the semiconductor film. Is used as a mask to introduce a second impurity element into the plurality of semiconductor films to form a second impurity region in a region that does not overlap with the conductive film, and to cover the plurality of semiconductor films and the conductive film. And a first wiring electrically connected to the conductive film and a second wiring electrically connected to the second impurity region are formed over the second insulating film, and the first wiring is The conductive films formed above the plurality of semiconductor films are electrically connected to each other. Provided cormorants second wiring provided as a second impurity region formed in a plurality of semiconductor films are electrically connected to each other.

  Further, in the method for manufacturing a semiconductor device of the present invention, a semiconductor film is formed over a substrate, the semiconductor film is irradiated with laser light to form a crystalline semiconductor film, and the crystalline semiconductor film is selectively etched, A plurality of blocks having a plurality of crystalline semiconductor films are provided, a first impurity region is formed by introducing a first impurity element into the plurality of crystalline semiconductor films, and the first impurity region is covered so as to cover the plurality of crystalline semiconductor films. The conductive film is selectively formed on the plurality of crystalline semiconductor films through the first insulating film so as to cover a part of the crystalline semiconductor film, and a plurality of conductive films are used as masks. A second impurity element is formed in a region that does not overlap with the conductive film by introducing a second impurity element into the crystalline semiconductor film, and the second insulating film covers the plurality of crystalline semiconductor films and the conductive film And electrically connected to the conductive film on the second insulating film A first wiring and a second wiring electrically connected to the second impurity region are formed, and the conductive film formed above each of the plurality of crystalline semiconductor films is electrically connected to the first wiring. The second wiring is provided so that the second impurity regions respectively formed in the plurality of crystalline semiconductor films are electrically connected to each other.

  A method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above manufacturing method, the concentration of the impurity element contained in the first impurity region is lower than the concentration of the impurity element contained in the second impurity region. In addition, the first wiring is formed using a material whose resistance is lower than that of the conductive film.

  A manufacturing method of a semiconductor device of the present invention is characterized in that, in the above manufacturing method, the shortest distance between semiconductor films provided in each of a plurality of blocks is 20 μm or more and 200 μm or less.

  High-speed signal processing can be achieved and a certain communication distance can be secured by forming circuits and capacitive elements using a semiconductor film with a large grain crystal region formed by laser light irradiation. Can do.

  Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in the structures of the present invention described below, the same reference numerals may be used in common in different drawings.

(Embodiment 1)
In this embodiment mode, a semiconductor device of the present invention will be described with reference to the drawings.

  The semiconductor device 100 of the present invention includes an analog circuit unit 100a and a digital circuit unit 100b, and the analog circuit unit 100a and the digital circuit unit 100b are arranged separately (see FIG. 1). The analog circuit unit 100a includes a demodulation circuit 101, a modulation circuit 102, a rectifier circuit 103, a constant voltage circuit 104, a capacitor unit 105, an oscillation circuit 106, a reset circuit 107, and the like. The digital circuit unit 100b includes a memory unit, a memory circuit, and the like.

  The circuits provided in the analog circuit portion 100a and the digital circuit portion 100b are configured by thin film transistors or the like manufactured using a semiconductor thin film formed over a substrate. The capacitor portion 105 is provided with a plurality of capacitor elements manufactured using a semiconductor thin film formed over a substrate. Hereinafter, an example of a cross-sectional structure of the thin film transistor and the capacitor is described with reference to FIGS.

  FIG. 2A illustrates an example in which thin film transistors 210 and 220 and a capacitor 230 are provided over a substrate 201. Note that the case where the thin film transistor 210 is a p-channel type and the thin film transistor 220 is an n-channel type is described here.

  The thin film transistor 210 is provided over at least the semiconductor film 211 provided over the substrate 201 with the insulating film 202 interposed therebetween, the insulating film 203 functioning as a gate insulating film provided over the semiconductor film 211, and the insulating film 203. Gate electrode 213. The semiconductor film 211 includes a channel formation region 211a provided below the gate electrode 213 and an impurity region 211b that functions as a source region or a drain region that is provided with the channel formation region 211a interposed therebetween. .

  Similarly, the thin film transistor 220 includes a semiconductor film 221 provided over the substrate 201 with an insulating film 202 interposed therebetween, an insulating film 203 functioning as a gate insulating film provided over the semiconductor film 221, and the insulating film 203. The gate electrode 223 is provided. The semiconductor film 221 includes a channel formation region 221a provided below the gate electrode 223 and an impurity region 221b functioning as a source region or a drain region provided with the channel formation region 221a interposed therebetween. .

  The capacitor 230 includes at least a semiconductor film 231 provided over the substrate 201 with the insulating film 202 interposed therebetween, an insulating film 203 provided over the semiconductor film 231, and a conductive film provided over the insulating film 203. A capacitor is formed by the semiconductor film 231, the insulating film 203, and the conductive film 233. The semiconductor film 231 includes a first impurity region 231a provided below the conductive film 233, and a second impurity region 231b provided so as to be separated from the first impurity region 231a. . Here, in the capacitor 230, the semiconductor film 231 and the conductive film 233 function as electrodes.

  An insulating film 205 is provided so as to cover the thin film transistors 210 and 220 and the capacitor 230, and conductive films 215 a, 215 b, 225 a, 225 b, 235 a, and 235 b are provided over the insulating film 205. Specifically, the conductive films 215a and 215b are provided so as to be electrically connected to the impurity regions 211b functioning as source and drain regions which are provided apart from each other in the thin film transistor 210, respectively. In addition, the conductive films 225 a and 225 b are provided so as to be electrically connected to impurity regions 221 b that function as source and drain regions that are provided apart from each other in the thin film transistor 220. In addition, the conductive films 235a and 235b are provided so as to be electrically connected to the second impurity regions 231b that are provided apart from each other in the capacitor 230, and the conductive films 235a and 235b are insulated from each other. It is provided so as to be electrically connected on the film 205.

  In the above structure, an LDD region may be provided in one or both of the thin film transistors 210 and 220 (FIG. 2B). For example, in an n-channel thin film transistor 220, an insulating film 224 (also referred to as a sidewall) is formed in contact with a side surface of the gate electrode 223, and an impurity region 221c functioning as an LDD region is provided below the insulating film 224. It can also be. In this case, the insulating film 214 is formed in contact with the side surface of the gate electrode 213 of the thin film transistor 210, and the insulating film 234 is formed in contact with the side surface of the conductive film 233 of the capacitor 230. Although an example in which the impurity region 221c functioning as the LDD region is provided in the n-channel thin film transistor 220 is shown here, the p-channel thin film transistor 210 may be provided with an LDD region.

  In the semiconductor device of the present invention, crystalline semiconductor films are used as the semiconductor films 211 and 221 formed on the substrate 201. A thin film transistor using a crystalline semiconductor film has higher field-effect mobility (mobility) than a thin film transistor using an amorphous semiconductor film, and can improve operation speed. In this embodiment mode, a crystalline semiconductor film is crystallized by, for example, forming an amorphous semiconductor film such as amorphous silicon on a substrate and then irradiating the amorphous semiconductor film with laser light (laser annealing). Can be obtained. In particular, when a glass substrate or the like that does not have high heat resistance is used as the substrate, it is very effective to use laser annealing for crystallization of the semiconductor film in order to avoid thermal deformation of the substrate. The laser annealing method here refers to a technique for annealing a damaged layer or an amorphous layer formed in a semiconductor film, or a technique for crystallizing an amorphous semiconductor film formed on a substrate.

  In general, when a semiconductor film formed on a substrate is irradiated with laser light to crystallize the semiconductor film, the shape of the laser light is set to, for example, a long side to obtain energy necessary for crystallization. It is carried out by shaping into a linear shape having a short side (including rectangular and elliptical shapes) and scanning the linear laser beam in the short side direction. Crystal grains (large-grain crystal grains) having crystal grain boundaries extending along the scanning direction of the linear laser light are formed in the semiconductor film irradiated with the laser light. The width of the crystalline region obtained by one scanning is approximately equal to the width of the long side of the laser beam shaped into a linear shape. Therefore, in order to crystallize the entire semiconductor film formed on the entire surface of the substrate, the position where the linear laser beam is scanned is set to the long side by the width of the crystal region obtained by one scanning of the linear laser beam. Irradiate laser light with the direction shifted.

  On the other hand, at the same time as the formation of the crystal region, a poorly crystalline region due to energy attenuation may be formed at both ends of the linear laser beam in the long side direction. FIG. 6 shows an image of the surface of the semiconductor film after the semiconductor film formed on the substrate is crystallized by irradiation with a linear laser beam. From FIG. 6, in the semiconductor film irradiated with the laser light, regions (crystallization failure regions) that are not sufficiently crystallized due to energy attenuation were observed at both ends of the crystal region. Further, it was confirmed that the surface of the semiconductor film in the defective crystallization region was uneven.

  As described above, when the semiconductor film is crystallized by scanning the linear laser beam a plurality of times, the crystal region is continuously formed in the scanning direction of the laser beam, but the semiconductor is formed in the direction orthogonal to the scanning direction. A poor crystallinity region is generated between the crystal regions formed in the film. In the poorly crystalline region, the surface of the semiconductor film is uneven, and the flatness is not sufficient. Therefore, when a thin film transistor, a capacitor element, or the like is manufactured using the semiconductor film in the poorly crystalline region, variation in electrical characteristics or operation It causes a defect.

  Therefore, in the semiconductor device described in this embodiment, a thin film transistor, a capacitor, or the like is formed using a portion of the semiconductor film that avoids the poor crystallinity region. That is, a circuit or a capacitor portion is formed so that a transistor constituting a circuit or a capacitor element constituting a capacitor portion can be formed using a semiconductor film in a region where a large grain size crystal grain obtained by laser annealing is formed. Determine the layout. Usually, since the scanning direction of the laser light and the width of the region where the large grain crystal grains are formed are determined, the circuit is arranged so as to provide the thin film transistor corresponding to the width. Specifically, the width of the region where the large grain crystal grains are formed depends on the energy of the laser beam to be irradiated, but is about 200 μm or more and 1500 μm or less. A thin film is provided. On the other hand, in the case where the region where the large grain size crystal grains are formed is formed by scanning the laser beam a plurality of times, the region where the large grain size crystal grains are formed by the scan of the nth laser beam and the (n + 1) th time are formed. Since a crystallinity defect region having a width of about 3 μm to 10 μm is formed between regions where large grain crystals obtained by scanning with laser light are formed, a semiconductor thin film is formed in a portion avoiding the crystallinity defect region. Is provided.

  Further, as the semiconductor device is downsized, the capacitor portion needs to be provided so that a large amount of capacitor can be formed within a limited range. On the other hand, since the semiconductor film constituting the capacitor element also needs to be flat, it is necessary to provide it in a portion that avoids the poor crystallinity region. In the case of providing a capacitor element, a larger capacity can be formed by forming a thin insulating film provided between the electrodes. However, when a thin insulating film is formed on an electrode (for example, a semiconductor film) with poor flatness. The risk of a short circuit is very high.

  Therefore, in the capacitor portion included in the semiconductor device described in this embodiment, a semiconductor film included in the capacitor is provided so as to avoid a poor crystallinity region. In addition, in order to form a larger capacity within a limited range, other than the semiconductor film such as the lead wiring is arranged in the poorly crystalline region, and the capacitor element has a high density in the region where the large grain crystal grains are formed. The capacitive element is divided into a plurality of blocks and is provided. Here, a plurality of blocks each including a plurality of capacitor elements are provided. The block refers to a group (a group) in which a plurality of capacitive elements are provided together.

  Next, an example of the capacitor portion of the present invention will be described with reference to the drawings. 5A shows a cross-sectional view taken along a line AB in FIG. 4, and FIG. 5B shows a cross-sectional view taken along a line C-D in FIG.

  The capacitor portion described in this embodiment includes a first wiring 301, a second wiring 302, and a plurality of capacitor elements 303. The plurality of capacitive elements 303 are divided into a plurality of blocks 300a to 300i. That is, a plurality of capacitive elements 303 are formed for each of the blocks 300a to 300i (see FIG. 3). Here, in each block, a plurality of capacitor elements are provided by forming a plurality of semiconductor films in an island shape. This is because when the area of the semiconductor film is increased in the capacitor, if the resistance of the semiconductor film is high, a sufficient capacity cannot be formed for the area of the semiconductor.

  A plurality of capacitor elements 303 provided for each block includes a semiconductor film 231 including a first impurity region 231a and a second impurity region 231b provided to be spaced apart from each other with the first impurity region 231a interposed therebetween. And at least a conductive film 233 provided over the semiconductor film 231 with an insulating film 203 interposed therebetween. In the capacitor 303, a capacitor is formed by the semiconductor film 231, the insulating film 203, and the conductive film 233 (see FIGS. 4 and 5).

  The conductive film 233 in the capacitor 303 is electrically connected to the first wiring 301, and the second impurity region 231 b of the semiconductor film 231 is electrically connected to the second wiring 302. In addition, the conductive films 233 provided in each of the plurality of capacitor elements are electrically connected to each other. Here, the conductive films 233 are electrically connected to each other through the first wiring 301. That is, the conductive films 233 of the plurality of capacitor elements are provided independently and are electrically connected to each other through the first wiring. In addition, the plurality of second impurity regions 231 b provided in each of the plurality of capacitor elements are electrically connected to each other through the second wiring 302. The plurality of capacitive elements are provided so as to be connected in parallel to each other.

Further, the capacitor portion described in this embodiment is provided in an interval r ₁ between semiconductor films provided in adjacent capacitor elements in _one block and in a capacitor element provided in a different adjacent block. The shortest distance r ₂ between the semiconductor films is provided so as to satisfy r ₁ <r ₂ . Here, the interval between adjacent blocks refers to the shortest distance between semiconductor films included in each block.

Note that the interval between the semiconductor films here refers to the interval between the semiconductor films in a direction orthogonal to the scanning direction of the laser light. This is because the poorly crystalline region formed between the regions where the large grain crystal grains are formed is formed along the scanning direction of the laser light. Therefore, in the present embodiment, it is preferable that the interval r ₂ be larger than the width of the poorly crystalline region formed by laser light irradiation. This is because the surface of the semiconductor film in the poorly crystalline region is not sufficiently flat, and a short circuit or the like may occur when a capacitor element is formed using the semiconductor film in the poorly crystalline region. Further, 20 [mu] m or more 200μm or less apart _{r 2,} preferably it is preferred to 50μm or 100μm or less. This is because, poorly crystalline region, since it is formed at a width of about 3Myuemu～10myuemu, it is preferable to provide slightly greater than the width of the interval r ₂ are poorly crystalline region in consideration of the margin in the process, and the distance r ₂ This is because if the area is too large, the area for providing the capacitor element decreases, and sufficient capacity cannot be secured.

  Here, in consideration of the wiring resistance and the like, the capacitive element is also provided in each block in the scanning direction of the laser beam, and a lead wiring or the like is provided between the blocks. However, in the case where there is almost no influence of wiring resistance or the like, in the scanning direction of the laser light, a region where large grain crystals are formed is continuously formed, and therefore, a configuration that is not provided separately for each block It is also possible to do.

  The capacitor 303 is preferably provided in the same process as other thin film transistors included in the circuit in order to simplify the manufacturing process. For example, as the insulating film 203 of the capacitor 303, a gate insulating film of a thin film transistor is preferably used. In particular, when the gate insulating film is formed thin, the capacitance of the capacitor 303 can be increased.

  The second impurity region 231b of the semiconductor film 231 is preferably formed by introducing a high-concentration impurity element simultaneously with the impurity region functioning as a source region or a drain region of the thin film transistor. The first impurity region 231a of the semiconductor film 231 may be provided by introducing a high-concentration impurity element similarly to the second impurity region 231b. However, when the high-concentration impurity element is introduced, the insulating film 203 is formed. Risk of damage. Therefore, the impurity element is preferably formed by introducing an impurity element having a lower concentration than the impurity element introduced into the second impurity region. In other words, in this embodiment, the concentration of the impurity element contained in the first impurity region 231a is set lower than the concentration of the impurity element contained in the second impurity region 231b. In this embodiment, considering the provision of a plurality of capacitor elements in parallel and the use of the thin insulating film 203, damage applied to the insulating film 203 when the first impurity region 231a is formed. It is very effective to reduce this.

  In this embodiment, a plurality of capacitive elements 303 provided for each of the blocks 300a to 300i are connected in parallel. Thus, a larger capacity can be formed by connecting a plurality of capacitive elements in parallel. Note that in the case where a plurality of capacitor elements are connected in parallel as described above, there is a concern about reliability. However, in this embodiment mode, the semiconductor film 231 of the capacitor element 303 has flatness by avoiding a crystallinity defect region where unevenness occurs. When the first impurity region 231a is formed in the semiconductor film 231, the insulating film 203 is introduced with an impurity element having a concentration lower than that of the impurity element added to the second impurity region. Reliability is improved by minimizing the damage to the machine.

  The conductive film 233 of the capacitor 303 is preferably formed at the same time as the gate electrode of another thin film transistor included in the circuit, so that the manufacturing process can be simplified. In this case, the conductive films 233 of the adjacent capacitive elements may be provided in common in the plurality of capacitive elements 303, but as described above, the first formed using a material having lower resistance than the conductive film 233. By connecting the conductive film 233 provided to each of the plurality of capacitors through the wiring 301, the wiring resistance can be reduced and the power consumption can be reduced.

  The semiconductor device described in this embodiment can have a structure in which wirings are provided so as to surround an analog circuit and a digital circuit which are separately provided. Thus, by providing the wiring so as to surround the analog circuit and the digital circuit, the wiring resistance in the circuit of the semiconductor device can be reduced and the influence of noise can be suppressed. Here, a wiring 150a for supplying a high power supply potential (VDD) and a wiring 150b for supplying a low power supply potential (VSS) are provided so as to surround the digital circuit portion 100b (see FIG. 11). On the other hand, a wiring 150a that supplies a low power supply potential (VSS) is provided around the analog circuit portion 100a, and a wiring 150b that can function as a ground wiring is not provided so as to surround the analog circuit portion 100a. Note that the low power supply potential (hereinafter, VSS) can be GND.

  In addition, when a high-frequency signal received via an antenna is input to a circuit through a wiring, the wiring becomes longer or bent, causing reflection of the signal or leakage into the space, resulting in loss of the high-frequency signal. growing. Therefore, in the semiconductor device described in this embodiment, the rectifier circuit 103 that receives a high-frequency signal is arranged in the vicinity of the antenna connection portion 160 so that the length of the wiring through which the high-frequency signal is transmitted is shortened to be a straight line. Thus, by providing, it becomes possible to reduce the high frequency signal lost when propagating through the wiring.

  In this manner, a thin film transistor with high mobility can be manufactured by forming a circuit or a capacitor using a semiconductor film of a large grain crystal region formed by laser light irradiation, and has high reliability. Since a large-capacity capacitive element can be obtained, high-speed signal processing can be realized and a certain communication distance can be ensured.

  Note that this embodiment can be freely combined with any of the other embodiments in this specification.

(Embodiment 2)
In this embodiment, an example of a method for manufacturing a semiconductor device of the present invention will be described with reference to drawings.

  First, the semiconductor film 403 is formed over the substrate 401 with the insulating film 402 interposed therebetween. Next, the semiconductor film 403 is irradiated with laser light, so that a crystalline region 403a (a region where a large grain size crystal grain is formed) is formed in the semiconductor film 403 (FIG. 7A). Note that a poorly crystalline region 403b is formed at the end of the crystalline region 403a.

  The substrate 401 is selected from a glass substrate, a quartz substrate, a metal substrate (for example, a stainless steel substrate), a semiconductor substrate such as a ceramic substrate, and a Si substrate. In addition, a substrate such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), or acrylic can be selected as the plastic substrate.

  The insulating film 402 is formed using silicon oxide, silicon nitride, silicon oxynitride (SiOxNy) (x> y> 0), silicon nitride oxide (SiNxOy) (x> y> 0), or the like using a CVD method, a sputtering method, or the like. It is formed using an insulating material. For example, in the case where the insulating film 402 has a two-layer structure, a silicon nitride oxide film may be formed as the first insulating film and a silicon oxynitride film may be formed as the second insulating film. Alternatively, a silicon nitride film may be formed as the first insulating film, and a silicon oxide film may be formed as the second insulating film. In this manner, by forming the insulating film 402 functioning as a blocking layer, alkali metal such as Na or alkaline earth metal from the substrate 401 can be prevented from adversely affecting the element formed thereon. Note that the insulating film 402 may be omitted when quartz is used for the substrate 401.

  The semiconductor film 403 is formed using an amorphous semiconductor film such as silicon by a CVD method or the like.

When crystallization is performed by laser light irradiation, an LD-excited continuous wave (CW) laser (YVO ₄ , second harmonic (wavelength 532 nm)) can be used as a laser light source. The second harmonic is not particularly limited to the second harmonic, but the second harmonic is superior to higher harmonics in terms of energy efficiency. When the semiconductor film is irradiated with the CW laser, energy is continuously given to the semiconductor film. Therefore, once the semiconductor film is in a molten state, the molten state can be continued. Furthermore, the solid-liquid interface of the semiconductor film can be moved by scanning with a CW laser, and crystal grains that are long in one direction can be formed along the direction of this movement. The solid laser is used because the output stability is higher than that of a gas laser or the like, and stable processing is expected. Note that not only the CW laser but also a pulse laser having a repetition frequency of 10 MHz or more can be used. If a pulse laser with a high repetition frequency is used, the semiconductor film can always remain in a molten state if the laser pulse interval is shorter than the time from when the semiconductor film melts until it solidifies. A semiconductor film including crystal grains that are long in one direction can be formed. Other CW lasers and pulse lasers with a repetition frequency of 10 MHz or more can also be used. For example, examples of the gas laser include an Ar laser, a Kr laser, and a CO ₂ laser. Examples of the solid-state laser include a YAG laser, a YLF laser, a YAlO ₃ laser, a GdVO ₄ laser, a KGW laser, a KYW laser, an alexandrite laser, a Ti: sapphire laser, a Y ₂ O ₃ laser, and a YVO ₄ laser. A YAG laser, a Y ₂ O ₃ laser, a GdVO ₄ laser, a YVO ₄ laser, or the like is also called a ceramic laser. Examples of the metal vapor laser include a helium cadmium laser. In addition, it is preferable to emit laser light in TEM ₀₀ (single transverse mode) in a laser oscillator because energy uniformity of a linear beam spot obtained on the irradiated surface can be improved. In addition, a pulsed excimer laser may be used.

Note that a low concentration impurity element may be introduced into the semiconductor film 403 in advance in order to control a threshold voltage or the like. In this case, the impurity element is also introduced into a region which later becomes a channel formation region in the semiconductor film 403. As the impurity element, an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity can be used. As the impurity element exhibiting n-type, phosphorus (P), arsenic (As), or the like can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), or the like can be used. For example, boron (B) as an impurity element is introduced in advance over the entire surface of the semiconductor film 403 so as to be contained at a concentration of 5 × 10 ^{15 to} 5 × 10 ¹⁷ / cm ³ .

  Next, the semiconductor film 403 is selectively etched, so that island-shaped semiconductor films 404a to 404d and 405a to 405d are formed (FIG. 7B). Here, the crystalline defect region 403b in the semiconductor film 403 is selectively removed, and an island-shaped semiconductor film is provided using the semiconductor film 403 provided with the crystalline region 403a. Note that the semiconductor films 404a to 404d constitute a thin film transistor to be formed later, and the semiconductor films 405a to 405d constitute a capacitor element to be formed later. In addition, a gap is generated between the semiconductor films 404a and 404b and the semiconductor films 404c and 404d or between the semiconductor films 405a and 405b and the semiconductor films 405c and 405d by the amount of the poor crystallinity region. .

  Next, after an insulating film 406 is formed so as to cover the island-shaped semiconductor films 404a to 404d and the semiconductor films 405a to 405d, an impurity element is selectively introduced into the semiconductor films 405a to 405d to form an impurity region 407. (FIG. 7C). The insulating film 406 formed above the semiconductor films 404a to 404d functions as a gate insulating film in the thin film transistor, and the insulating film 406 above the semiconductor films 405a to 405d functions as a dielectric layer of the capacitor.

  As the impurity element, an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity can be used. As the impurity element exhibiting n-type, phosphorus (P), arsenic (As), or the like can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), or the like can be used.

  The semiconductor films 405a to 405d function as electrodes in the capacitor. Therefore, it is preferable to increase the conductivity of the semiconductor films 405a to 405d by introducing an impurity element, but the insulating film 406 is damaged when a high concentration of impurity element is introduced. As a result, the capacitive element may be short-circuited. Therefore, the impurity element is preferably introduced under conditions that do not damage the insulating film 406. For example, by introducing phosphorus (P) into the semiconductor films 405a to 405d, an impurity region 407 that exhibits n-type conductivity is formed. Form.

  Next, conductive films 408 a to 408 d and conductive films 409 a to 409 d are selectively formed over the semiconductor films 404 a to 404 d and the semiconductor films 405 a to 405 d with the insulating film 406 interposed therebetween. Here, conductive films 408a to 408d are formed over the semiconductor films 404a to 404d, respectively, and conductive films 409a to 409d are formed over the semiconductor films 405a to 405d, respectively. After that, an impurity element 410 is formed by introducing an impurity element into the semiconductor films 404a to 404d using the conductive films 408a to 408d as a mask. Subsequently, the semiconductor films 404b and 404d and the semiconductor films 405a to 405d are selectively covered with a resist, and an impurity element is introduced into the semiconductor films 404a and 404c using the conductive films 408a and 408c as a mask. As a result, a channel formation region 411a and an impurity region 411b functioning as a source region or a drain region are formed in the semiconductor films 404a and 404c (FIG. 7D).

  In the semiconductor films 404a and 404c, the impurity region 411b functioning as a source region or a drain region is provided with the channel formation region 411a interposed therebetween.

  The conductive films 408a to 408d and the conductive films 409a to 409d are formed of tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium ( Nb) or the like, or an alloy material or a compound material containing these elements as main components can be used. Alternatively, a metal nitride film obtained by nitriding these elements can be used. In addition, a semiconductor material typified by polycrystalline silicon doped with an impurity element such as phosphorus can be used. Here, the conductive films 408a to 408d and the conductive films 409a to 409d are provided in a stacked structure in which tantalum nitride and tungsten are sequentially stacked.

  As the impurity element, an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity can be used. As the impurity element exhibiting n-type, phosphorus (P), arsenic (As), or the like can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), or the like can be used. Here, an impurity region 410 showing n-type is formed by introducing phosphorus (P), and an impurity region 411b showing p-type is formed by introducing boron (B).

  Next, insulating films 412a to 412d and insulating films 413a to 413d are formed so as to be in contact with the side surfaces of the conductive films 408a to 408d and the conductive films 409a to 409d (FIG. 8A). Note that the insulating films 412a to 412d and the insulating films 413a to 413d are also referred to as sidewalls.

  As a method for manufacturing the insulating films 412a to 412d and the insulating films 413a to 413d, first, an inorganic material of silicon, silicon oxide, or silicon nitride is formed by plasma CVD, sputtering, or the like so as to cover the insulating film 406. And an insulating film containing an organic material such as an organic resin are formed as a single layer or a stacked layer. Next, by selectively etching these insulating films by anisotropic etching mainly in the vertical direction, insulating films in contact with the side surfaces of the conductive films 408a to 408d and the conductive films 409a to 409d are formed. Note that part of the insulating film 406 may be etched away at the same time as the formation of the insulating films 412a to 412d and the insulating films 413a to 413d (see FIG. 8A). When part of the insulating film 406 is removed, the remaining insulating film 406 is formed below the conductive films 408a to 408d, the conductive films 409a to 409d, the insulating films 412a to 412d, and the insulating films 413a to 413d.

  Next, the semiconductor films 404a and 404c are selectively covered with a resist, and the conductive films 408b and 408d, the conductive films 409a to 409d, the insulating films 412b and 412d, and the insulating film 413a are covered with the semiconductor films 404b and 404d and the semiconductor films 405a to 405d. Impurity elements are introduced using ˜413d as a mask. As a result, a channel formation region 414a, an impurity region 414b that functions as a source region or a drain region, and an impurity region 414c that functions as an LDD region are formed in the semiconductor films 404b and 404d. In addition, a first impurity region 415a and a second impurity region 415b are formed in the semiconductor films 405a to 405d (FIG. 8B).

  In the semiconductor films 404b and 404d, an impurity region 414b functioning as a source region or a drain region and an impurity region 414c functioning as an LDD region are both provided with a channel formation region 414a interposed therebetween and are separated from the channel formation region 414a and the source region. An impurity region 414c functioning as an LDD region is provided between the impurity region 414b functioning as a region or a drain region and below the insulating films 412b and 412d. In the semiconductor films 405a to 405d, the second impurity region 415b is provided to be separated from the first impurity region 415a.

  As the impurity element, an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity can be used. As the impurity element exhibiting n-type, phosphorus (P), arsenic (As), or the like can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), or the like can be used. Here, impurity regions 414b and 414c and impurity regions 415a and 415b exhibiting n-type are formed by introducing phosphorus (P). In this embodiment, the impurity regions 414b and 414c and the second impurity region 415b are introduced so that the concentration is higher than that of the impurity element contained in the first impurity region 415a.

  Next, an insulating film 416 is formed so as to cover the semiconductor films 404a to 404d, the semiconductor films 405a to 405d, the conductive films 408a to 408d, and the conductive films 409a to 409d (FIG. 8C).

  The insulating film 416 is formed of silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y), or the like by CVD or sputtering. Single layer made of an insulating layer containing oxygen or nitrogen, a film containing carbon such as DLC (Diamond Like Carbon), an organic material such as epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, acrylic, or a siloxane material such as siloxane resin Alternatively, a stacked structure can be provided. Note that the siloxane material corresponds to a material including a Si—O—Si bond. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group can also be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent.

  Next, an insulating film 417 is formed so as to cover the insulating film 416, and conductive films 418a to 425a and 418b to 425b are formed over the insulating film 417 (FIG. 8D).

  Here, the conductive films 418a and 418b are provided so as to be electrically connected to an impurity region 411b functioning as a source region or a drain region in the semiconductor film 404a. Similarly, the conductive films 419a and 419b are electrically connected to the impurity region 414b in the semiconductor film 404b, the conductive films 420a and 420b are electrically connected to the impurity region 411b in the semiconductor film 404c, and the conductive films 421a and 421b are electrically connected to the impurity region 414b in the semiconductor film 404d. It is provided to connect. The conductive films 422a and 422b are provided so as to be electrically connected to the second impurity region 415b in the semiconductor film 405a. Similarly, the conductive films 423a and 423b are the second impurity regions 415b in the semiconductor film 405b, the conductive films 424a and 424b are the second impurity regions 415b in the semiconductor film 405c, and the conductive films 425a and 425b are the first impurities in the semiconductor film 405d. The second impurity region 415b is provided so as to be electrically connected.

  The conductive films 422a and 422b are electrically connected to each other over the insulating film 417. In addition, the conductive films 422a to 425a and 422b to 425b are electrically connected to each other.

  The insulating film 417 is formed of silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y), or the like by CVD or sputtering. Single layer made of an insulating layer containing oxygen or nitrogen, a film containing carbon such as DLC (Diamond Like Carbon), an organic material such as epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, acrylic, or a siloxane material such as siloxane resin Alternatively, a stacked structure can be provided. In this embodiment, after the insulating film 416 is formed, heat treatment is performed to activate the semiconductor films 404a to 404d and the semiconductor films 405a to 405d, and then the insulating film 417 is formed.

  The conductive films 418a to 425a and 418b to 425b are formed of aluminum (Al), tungsten (W), titanium (Ti), tantalum (Ta), molybdenum (Mo), nickel (Ni), platinum by CVD or sputtering. Mainly selected from elements selected from (Pt), copper (Cu), gold (Au), silver (Ag), manganese (Mn), neodymium (Nd), carbon (C), and silicon (Si) An alloy material or a compound material as a component, which is formed as a single layer or a laminated layer. The alloy material containing aluminum as a main component corresponds to, for example, a material containing aluminum as a main component and containing nickel, or an alloy material containing aluminum as a main component and containing nickel and one or both of carbon and silicon. The conductive films 418a to 425a and 418b to 425b include, for example, a laminated structure of a barrier film, an aluminum silicon (Al—Si) film, and a barrier film, a barrier film, an aluminum silicon (Al—Si) film, a titanium nitride film, and a barrier film. A laminated structure may be employed. Note that the barrier film corresponds to a thin film formed of titanium, titanium nitride, molybdenum, or molybdenum nitride. Aluminum and aluminum silicon are optimal materials for forming the conductive films 418a to 425a and 418b to 425b because they have low resistance and are inexpensive. In addition, when an upper layer and a lower barrier layer are provided, generation of hillocks of aluminum or aluminum silicon can be prevented. In addition, when a barrier film made of titanium, which is a highly reducing element, is formed, even if a thin natural oxide film is formed on the crystalline semiconductor layer, the natural oxide film is reduced, so that the crystalline semiconductor layer is in good condition. Contact can be made.

  Through the above steps, a semiconductor device can be manufactured. In addition, the structure of the thin film transistor can take various forms. It is not limited to a specific configuration. For example, a multi-gate structure having two or more gates may be used. The multi-gate structure can reduce the off-current, improve the breakdown voltage of the transistor, and reduce the change in drain-source current even if the drain-source voltage changes when operating in the saturation region. it can. Further, an LDD region may be provided not only in an n-type thin film transistor but also in a p-type thin film transistor. By providing the LDD region, the off-current can be reduced, the breakdown voltage of the transistor can be improved, and even if the drain-source voltage changes when operating in the saturation region, the change in the drain-source current can be reduced. .

  Note that this embodiment can be freely combined with any of the other embodiments in this specification.

(Embodiment 3)
In this embodiment, an example of a semiconductor device of the present invention will be described with reference to drawings. Specifically, a semiconductor device provided with a PLL (Phase Locked Loop) circuit portion will be described with reference to the drawings.

  FIG. 9 is a block diagram illustrating a configuration example of a semiconductor device capable of transmitting and receiving commands and data using wireless signals. This semiconductor device includes an antenna portion 902, a high frequency circuit portion 903, a power supply circuit portion 905, and a logic circuit portion 907 as elements. The antenna unit 902 transmits and receives signals to and from a communication device also called a reader / writer. The frequency band of the carrier wave for transmitting signals is 1 to 135 kHz for the long wave band, 6.78 MHz for the short wave band, 13.56 MHz, 27.125 MHz, 40.68 MHz, 5.0 MHz, 2.45 GHz for the microwave band, and 5.8 GHz. 24.125 GHz or the like is applied. The antenna unit 902 takes a coil type, a monopole type, or a dipole type according to the communication frequency band.

  The carrier wave received by the antenna unit 902 is shunted to the power supply circuit unit 905 and the logic circuit unit 907 via the detection capacitor unit 904. In the power supply circuit portion 905, half-wave rectification is performed by the rectifier circuit portion 910, and the storage capacitor portion 912 is charged. The constant voltage circuit unit 914 outputs a constant voltage to supply electric power necessary for the operation of the logic circuit unit 907 and the like in this semiconductor device even when a certain amount of power is supplied to the received carrier wave power. .

  The demodulation circuit unit 908 in the high-frequency circuit unit 903 demodulates the carrier wave, generates a clock signal necessary for the operation of the logic circuit unit 907, and further corrects the PLL circuit unit 918, a code recognition and determination circuit A signal is output to the unit 916. For example, the demodulation circuit unit 908 detects amplitude fluctuation as “0” or “1” reception data from the amplitude modulation (ASK) reception signal. The demodulating circuit unit 908 includes, for example, a low-pass filter. The modulation circuit unit 906 transmits the transmission data as an amplitude modulation (ASK) transmission signal.

  The code recognition and determination circuit unit 916 recognizes and determines an instruction code. An instruction code recognized and determined by each code recognition and determination circuit unit 916 includes a frame end signal (EOF, end of frame), a frame start signal (SOF), a flag, a command code, and a mask length (mask length). , Mask value, and the like. Each code recognition and determination circuit unit 916 also includes a cyclic redundancy check (CRC) function for identifying a transmission error. The result from the code recognition and determination circuit unit 916 is output to the memory controller unit 920. The memory controller unit 920 controls reading of the memory unit 922 based on the determination result. Data read from the memory unit 922 is encoded by the encoding circuit unit 924, modulated by the modulation circuit unit 906, and a response signal is generated.

  As the configuration of the memory unit 922, a mask ROM (Read Only Memory) that stores only fixed data, an arbitrary read / write memory such as an SRAM (Static Random Access Memory), and a nonvolatile memory having a charge storage floating electrode can be applied. It is.

  As described above, the semiconductor device illustrated in FIG. 9 has a function of receiving a command from a communication device also called a reader / writer and writing data in the memory portion 922 or reading data from the memory portion 922.

  A circuit layout in the semiconductor device having the above structure and function is described below.

  In the circuit described above, the PLL circuit portion 918 is applied as a circuit that generates a clock signal having an arbitrary frequency synchronized with a supplied signal in various circuits integrated on the same substrate. The PLL circuit unit 918 includes a voltage controlled oscillation circuit (hereinafter referred to as a VCO (Voltage Controlled Oscillator) circuit), and uses the output of the VCO circuit as a feedback signal to perform phase comparison with a supplied signal. The PLL circuit unit 918 adjusts the output signal by negative feedback so that the supplied signal and the feedback signal have a constant phase.

  However, depending on manufacturing conditions such as processes, the PLL circuit unit 918 may be affected, and the frequency of the output signal may not be a desired frequency. Therefore, in the semiconductor device of this embodiment, a circuit having a correlation with the PLL circuit portion 918 is provided adjacently. Here, by providing the PLL circuit portion 918 and the constant voltage circuit portion 914 adjacent to each other, the operation of the PLL circuit portion 918 can be stabilized. Further, by disposing the semiconductor film constituting the PLL circuit portion 918 and the constant voltage circuit portion 914 in the region of the crystalline semiconductor film obtained by one scan, the influence of the process is reduced, and the PLL circuit is more effectively performed. The operation of the unit 918 can be improved.

  In view of productivity and cost, such a semiconductor device is preferably manufactured using an insulating substrate such as glass and using a thin film transistor rather than forming a MOS transistor using a single crystal silicon substrate.

That is, in order to disseminate such a semiconductor device capable of transmitting and receiving data without contact to society, it is necessary to reduce the manufacturing cost. However, in order to construct a new production line using semiconductor integrated circuit manufacturing technology, the amount of capital investment increases, so it is difficult to reduce the cost. For example, to make a production line that uses 12-inch wafers, capital investment of approximately 150 billion yen is required, and it is very difficult to reduce the unit price to 100 yen or less if additional running costs are added. Also, the area of a 12-inch wafer is about 73000 mm ² , and even if it is ignored that a processing width of about 100 μm is required when cutting with a dicing apparatus having a blade with a width of 20 to 50 μm, it is 1 mm. When cutting out corner chips, it is very difficult to secure a sufficient supply amount because only 73,000 chips can be cut out even when cutting out 0.4mm square chips. On the other hand, as described above, when a semiconductor device is manufactured using a thin film transistor using an insulating substrate such as glass, a large-area substrate can be used as compared with a single crystal silicon substrate. From this, more chips can be produced.

  Note that this embodiment can be freely combined with any of the other embodiments in this specification.

(Embodiment 4)
In this embodiment, an example of usage of a semiconductor device of the present invention will be described.

  The application of the semiconductor device of the present invention is wide-ranging, and can be applied to any product that can be used for production and management by clarifying information such as the history of an object without contact. For example, banknotes, coins, securities, certificate documents, bearer bonds, packaging containers, books, recording media, personal belongings, vehicles, foods, clothing, health supplies, daily necessities, medicines, etc. It can be provided and used in an electronic device or the like. These examples will be described with reference to FIG.

  Banknotes and coins are money that circulates in the market, and include those that are used in the same way as money in a specific area (cash vouchers), commemorative coins, and the like. Securities refer to checks, securities, promissory notes, etc. (FIG. 10A). Certificates refer to driver's licenses, resident's cards, etc. Bearer bonds refer to stamps, gift tickets, various gift certificates, and the like (FIG. 10C). Packaging containers refer to wrapping paper for lunch boxes, plastic bottles, and the like (FIG. 10D). Books refer to books, books, and the like (FIG. 10E). The recording media refer to DVD software, video tapes, and the like (FIG. 10F). The vehicles refer to vehicles such as bicycles, ships, and the like (FIG. 10G). Personal belongings refer to bags, glasses, and the like (FIG. 10H). Foods refer to food products, beverages, and the like. Clothing refers to clothing, footwear, and the like. Health supplies refer to medical equipment, health equipment, and the like. Livingware refers to furniture, lighting equipment, and the like. Chemicals refer to pharmaceuticals, agricultural chemicals, and the like. Electronic devices refer to liquid crystal display devices, EL display devices, television devices (television receivers, flat-screen television receivers), cellular phones, and the like.

  Forgery can be prevented by providing the semiconductor device 80 on bills, coins, securities, certificates, bearer bonds, and the like. In addition, by providing semiconductor devices 80 for personal items such as packaging containers, books, recording media, personal items, foods, daily necessities, electronic devices, etc., the efficiency of inspection systems and rental store systems will be improved. Can do. By providing the semiconductor device 80 in vehicles, health supplies, medicines, etc., it is possible to prevent forgery and theft, and in the case of medicines, it is possible to prevent mistakes in taking medicine. As a method of providing the semiconductor device 80, the semiconductor device 80 is provided by being attached to the surface of the article or embedded in the article. For example, a book may be embedded in paper, and a package made of an organic resin may be embedded in the organic resin.

  In this way, by providing semiconductor devices in packaging containers, recording media, personal items, foods, clothing, daily necessities, electronic devices, etc., it is possible to improve the efficiency of inspection systems and rental store systems. it can. Further, forgery or theft can be prevented by providing a semiconductor device in the vehicles. In addition, by embedding in creatures such as animals, it is possible to easily identify individual creatures. For example, by embedding a semiconductor device equipped with a sensor in a living creature such as livestock, it is possible to easily manage health conditions such as body temperature as well as the year of birth, gender or type.

  Note that this embodiment can be freely combined with any of the other embodiments in this specification.

FIG. 11 illustrates an example of a semiconductor device of the invention. FIG. 11 illustrates an example of a semiconductor device of the invention. FIG. 13 illustrates an example of a capacitor portion in a semiconductor device of the present invention. FIG. 13 illustrates an example of a capacitor portion in a semiconductor device of the present invention. FIG. 13 illustrates an example of a capacitor portion in a semiconductor device of the present invention. The figure which shows the surface image after irradiating a semiconductor film with a laser beam. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. FIG. 11 illustrates an example of a semiconductor device of the invention. FIG. 13 illustrates an example of a usage pattern of a semiconductor device of the invention. FIG. 11 illustrates an example of a semiconductor device of the invention.

Explanation of symbols

80 Semiconductor Device 100 Semiconductor Device 101 Demodulator Circuit 102 Modulator Circuit 103 Rectifier Circuit 104 Constant Voltage Circuit 105 Capacitor Unit 106 Oscillator Circuit 107 Reset Circuit 108 Logic Circuit 122 Memory Unit 201 Substrate 202 Insulating Film 203 Insulating Film 204 Insulating Film 205 Insulating Film 210 Thin Film Transistor 211 Semiconductor film 213 Gate electrode 214 Insulating film 220 Thin film transistor 221 Semiconductor film 223 Gate electrode 224 Insulating film 230 Capacitor element 231 Semiconductor film 233 Conductive film 234 Insulating film 301 Wiring 302 Wiring 303 Capacitor element 401 Substrate 402 Insulating film 403 Semiconductor film 406 Insulating film 407 Impurity region 410 Impurity region 416 Insulating film 417 Insulating film 902 Antenna portion 903 High frequency circuit portion 904 Detection capacitance portion 905 Power supply circuit portion 906 Modulation circuit portion 907 Logic Path unit 908 Demodulation circuit unit 910 Rectification circuit unit 912 Retention capacitor unit 914 Constant voltage circuit unit 916 Determination circuit unit 918 PLL circuit unit 920 Memory controller unit 922 Memory unit 924 Encoding circuit unit 100a Analog circuit unit 100b Digital circuit unit 150a Wiring 150b Wiring 211a channel formation region 211b impurity region 215a conductive film 221a channel formation region 221b impurity region 221c impurity region 225a conductive film 231a impurity region 231b impurity region 235a conductive film 235b conductive film 300a block 403a crystalline region 403b crystalline defect region 404a semiconductor film 404b Semiconductor film 404c Semiconductor film 404d Semiconductor film 405a Semiconductor film 405b Semiconductor film 405c Semiconductor film 405d Semiconductor film 408a Conductive film 408b Conductive film 40 a conductive film 411a channel formation region 411b impurity region 412a insulation film 412b insulation film 413a insulation film 414a channel formation region 414b impurity region 414c impurity region 415a impurity region 415b impurity region 418a conductive film 419a conductive film 420a conductive film 421a conductive film 422a conductive film 422b conductive film 423a conductive film 424a conductive film 425a conductive film

Claims (12)

Each having a plurality of blocks each including a plurality of capacitive elements, a first wiring, and a capacitance portion including a second wiring;
Each of the plurality of capacitive elements is
A semiconductor film having a first impurity region and a plurality of second impurity regions provided across the first impurity region;
A conductive film provided above the first impurity region via an insulating film,
A capacitor is formed by the first impurity region, the insulating film, and the conductive film,
The conductive film is electrically connected to the first wiring;
The second impurity region is electrically connected to the second wiring;
The semiconductor device, wherein the plurality of capacitive elements are connected in parallel to each other. Each having a plurality of blocks each including a plurality of capacitive elements, a first wiring, and a capacitance portion including a second wiring;
Each of the plurality of capacitive elements is
A semiconductor film having a first impurity region and a plurality of second impurity regions provided across the first impurity region;
A conductive film provided above the first impurity region via an insulating film,
A capacitor is formed by the first impurity region, the insulating film, and the conductive film,
The conductive film provided in each of the plurality of capacitive elements is electrically connected to each other via the first wiring,
The semiconductor device, wherein the second impurity region provided in each of the plurality of capacitor elements is electrically connected to each other through the second wiring. In claim 1 or claim 2,
A semiconductor device, wherein a concentration of an impurity element contained in the first impurity region is lower than a concentration of an impurity element contained in the second impurity region. In any one of Claims 1 thru | or 3,
The semiconductor device, wherein the first wiring and the second wiring are provided on the same surface. In any one of Claims 1 thru | or 4,
A semiconductor device, wherein a plurality of capacitive elements provided in the plurality of blocks are connected in parallel to each other. In any one of Claims 1 thru | or 5,
The semiconductor device is characterized in that the first wiring is provided with a material whose resistance is lower than that of the conductive film. In any one of Claims 1 thru | or 6,
In the plurality of blocks, the shortest distance between the semiconductor film provided in the first block and the semiconductor film provided in the second block adjacent to the first block is 20 μm or more and 200 μm or less. A featured semiconductor device. Forming a plurality of blocks having a plurality of semiconductor films on a substrate;
Introducing a first impurity element into the plurality of semiconductor films to form a first impurity region;
Forming a first insulating film so as to cover the plurality of semiconductor films;
A conductive film is selectively formed on each of the plurality of semiconductor films through the first insulating film so as to cover a part of the semiconductor film,
A second impurity region is formed in a region that does not overlap the conductive film by introducing a second impurity element into the plurality of semiconductor films using the conductive film as a mask;
Forming a second insulating film so as to cover the plurality of semiconductor films and the conductive film;
Forming a first wiring electrically connected to the conductive film and a second wiring electrically connected to the second impurity region on the second insulating film;
The first wiring is provided so that the conductive films respectively formed above the plurality of semiconductor films are electrically connected to each other,
The method for manufacturing a semiconductor device, wherein the second wiring is provided so that the second impurity regions formed in the plurality of semiconductor films are electrically connected to each other. Forming a semiconductor film on the substrate;
Irradiating the semiconductor film with a laser beam to form a crystalline semiconductor film,
Selectively etching the crystalline semiconductor film to provide a plurality of blocks having a plurality of crystalline semiconductor films;
Introducing a first impurity element into the plurality of crystalline semiconductor films to form a first impurity region;
Forming a first insulating film so as to cover the plurality of crystalline semiconductor films;
A conductive film is selectively formed on each of the plurality of crystalline semiconductor films via the first insulating film so as to cover a part of the crystalline semiconductor film,
Introducing a second impurity element into the plurality of crystalline semiconductor films using the conductive film as a mask to form a second impurity region in a region not overlapping the conductive film;
Forming a second insulating film so as to cover the plurality of crystalline semiconductor films and the conductive film;
Forming a first wiring electrically connected to the conductive film and a second wiring electrically connected to the second impurity region on the second insulating film;
The first wiring is provided so that the conductive films respectively formed above the plurality of crystalline semiconductor films are electrically connected to each other.
The method for manufacturing a semiconductor device, wherein the second wiring is provided so that the second impurity regions respectively formed in the plurality of crystalline semiconductor films are electrically connected to each other. In claim 8 or claim 9,
A method for manufacturing a semiconductor device, wherein the concentration of an impurity element contained in the first impurity region is made lower than the concentration of an impurity element contained in the second impurity region. In any one of Claims 8 to 10,
The method for manufacturing a semiconductor device, wherein the first wiring is formed using a material having lower resistance than the conductive film. In any one of Claims 8 thru | or 11,
In the plurality of blocks, the shortest distance between the semiconductor film provided in the first block and the semiconductor film provided in the second block adjacent to the first block is set to 20 μm or more and 200 μm or less. A method for manufacturing a semiconductor device.