JP2007281495A - 半導体基板の製造方法 - Google Patents
半導体基板の製造方法 Download PDFInfo
- Publication number
- JP2007281495A JP2007281495A JP2007131206A JP2007131206A JP2007281495A JP 2007281495 A JP2007281495 A JP 2007281495A JP 2007131206 A JP2007131206 A JP 2007131206A JP 2007131206 A JP2007131206 A JP 2007131206A JP 2007281495 A JP2007281495 A JP 2007281495A
- Authority
- JP
- Japan
- Prior art keywords
- post electrode
- alignment
- formation region
- alignment mark
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 71
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 239000000758 substrate Substances 0.000 title claims description 25
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 84
- 238000000034 method Methods 0.000 claims abstract description 26
- 229920002120 photoresistant polymer Polymers 0.000 claims description 2
- 238000007747 plating Methods 0.000 abstract description 22
- 239000010408 film Substances 0.000 description 50
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 16
- 229910052710 silicon Inorganic materials 0.000 description 16
- 239000010703 silicon Substances 0.000 description 16
- 239000010953 base metal Substances 0.000 description 15
- 230000001681 protective effect Effects 0.000 description 13
- 238000007789 sealing Methods 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 7
- 239000011521 glass Substances 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000003566 sealing material Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0231—Manufacturing methods of the redistribution layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
【解決手段】 ポスト電極を形成するためのメッキレジスト膜の露光を行なうとき、まず、ポスト電極形成用のネガ型の第1の露光マスクを用いて、半導体素子形成領域21およびアライメントマーク形成領域22に対してステップ露光を行なう。次に、アライメント用ポスト電極形成用のネガ型の第2の露光マスクを用いて、アライメントマーク形成領域22のみに対して露光を行なう。これにより、半導体素子形成領域21にポスト電極のみが形成され、アライメントマーク形成領域22にアライメント用ポスト電極のみが形成される。
【選択図】 図5
Description
請求項2に記載の発明は、請求項1に記載の発明において、前記アライメント用ポスト電極をその平面形状が前記ポスト電極の平面形状と異なるように形成することを特徴とするものである。
請求項3に記載の発明は、請求項1に記載の発明において、前記アライメント用ポスト電極をその平面形状が前記ポスト電極の平面形状と同じとなるように形成することを特徴とするものである。
請求項4に記載の発明は、請求項1に記載の発明において、前記アライメントマーク形成領域の周囲に、前記半導体素子形成領域と同じ平面サイズを有し、ポスト電極を有しない複数の非半導体素子形成領域を形成するために、さらに、前記レジスト膜に対して第3の露光マスクを用いて露光を行なうことを特徴とするものである。
6 下地金属層
7 再配線
8 ポスト電極
9 封止膜
10 半田ボール
11 アライメント用ポスト電極
21 半導体素子形成領域
22 アライメントマーク形成領域
23 メッキレジスト膜
24 第1の露光マスク
25 第2の露光マスク
41 非半導体素子形成領域
42 第3の露光マスク
Claims (4)
- 各々複数のポスト電極を有する複数の半導体素子形成領域と、該半導体素子形成領域と同じ平面サイズを有し、アライメント用ポスト電極を有するアライメントマーク形成領域とを備えた半導体基板の製造方法であって、前記ポスト電極および前記アライメント用ポスト電極を形成するためのネガ型のレジスト膜を第1および第2の露光マスクを用いて2回の露光を行なって形成することを特徴とする半導体基板の製造方法。
- 請求項1に記載の発明において、前記アライメント用ポスト電極をその平面形状が前記ポスト電極の平面形状と異なるように形成することを特徴とする半導体基板の製造方法。
- 請求項1に記載の発明において、前記アライメント用ポスト電極をその平面形状が前記ポスト電極の平面形状と同じとなるように形成することを特徴とする半導体基板の製造方法。
- 請求項1に記載の発明において、前記アライメントマーク形成領域の周囲に、前記半導体素子形成領域と同じ平面サイズを有し、ポスト電極を有しない複数の非半導体素子形成領域を形成するために、さらに、前記レジスト膜に対して第3の露光マスクを用いて露光を行なうことを特徴とする半導体基板の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007131206A JP4506780B2 (ja) | 2007-05-17 | 2007-05-17 | 半導体基板の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007131206A JP4506780B2 (ja) | 2007-05-17 | 2007-05-17 | 半導体基板の製造方法 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003147448A Division JP3988679B2 (ja) | 2003-05-26 | 2003-05-26 | 半導体基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007281495A true JP2007281495A (ja) | 2007-10-25 |
JP4506780B2 JP4506780B2 (ja) | 2010-07-21 |
Family
ID=38682555
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007131206A Expired - Fee Related JP4506780B2 (ja) | 2007-05-17 | 2007-05-17 | 半導体基板の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4506780B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015012054A (ja) * | 2013-06-27 | 2015-01-19 | 学校法人福岡大学 | シリコンウエハ及び配線形成方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03196633A (ja) * | 1989-12-26 | 1991-08-28 | Fuji Electric Co Ltd | 半導体集積回路装置及び半導体ウエハ |
JPH11260768A (ja) * | 1998-03-09 | 1999-09-24 | Casio Comput Co Ltd | 半導体装置及びその製造方法 |
JP2001144197A (ja) * | 1999-11-11 | 2001-05-25 | Fujitsu Ltd | 半導体装置、半導体装置の製造方法及び試験方法 |
-
2007
- 2007-05-17 JP JP2007131206A patent/JP4506780B2/ja not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03196633A (ja) * | 1989-12-26 | 1991-08-28 | Fuji Electric Co Ltd | 半導体集積回路装置及び半導体ウエハ |
JPH11260768A (ja) * | 1998-03-09 | 1999-09-24 | Casio Comput Co Ltd | 半導体装置及びその製造方法 |
JP2001144197A (ja) * | 1999-11-11 | 2001-05-25 | Fujitsu Ltd | 半導体装置、半導体装置の製造方法及び試験方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015012054A (ja) * | 2013-06-27 | 2015-01-19 | 学校法人福岡大学 | シリコンウエハ及び配線形成方法 |
Also Published As
Publication number | Publication date |
---|---|
JP4506780B2 (ja) | 2010-07-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3989869B2 (ja) | 半導体装置及びその製造方法 | |
US7944064B2 (en) | Semiconductor device having alignment post electrode and method of manufacturing the same | |
KR100858386B1 (ko) | 반도체소자 형성용 기판 및 반도체소자의 제조방법 | |
US7250329B2 (en) | Method of fabricating a built-in chip type substrate | |
US10957638B2 (en) | Device with pillar-shaped components | |
KR20110139087A (ko) | 반도체 장치 및 그 제조 방법 | |
JP4471213B2 (ja) | 半導体装置およびその製造方法 | |
JP3988679B2 (ja) | 半導体基板 | |
KR20130126171A (ko) | 범프 구조물 및 이의 형성 방법 | |
JP5247998B2 (ja) | 半導体装置の製造方法 | |
JP4506780B2 (ja) | 半導体基板の製造方法 | |
JP4341694B2 (ja) | 半導体素子の製造方法 | |
JP4987910B2 (ja) | 半導体素子の半田層の製造方法、半導体素子のマークの製造方法及び半導体素子のダイシング方法 | |
JP4292041B2 (ja) | 半導体基板、半導体基板の製造方法および半導体装置の製造方法 | |
JP2005012065A (ja) | 半導体装置およびその製造方法 | |
KR100610555B1 (ko) | 반도체소자 및 그 제조방법 | |
US20110001234A1 (en) | Semiconductor device and fabrication method thereof | |
JP2007116203A (ja) | 半導体装置の製造方法 | |
JP2006013205A (ja) | 半導体装置及びその製造方法 | |
JP2005294546A (ja) | メッキパターンの形成方法 | |
TW506034B (en) | Detection structure for bump alignment | |
JP2006012952A (ja) | 半導体装置およびその製造方法 | |
JP2011018750A (ja) | 半導体装置およびその製造方法 | |
JP2005322704A (ja) | 半導体装置 | |
JP2009266995A (ja) | 半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20100406 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20100419 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130514 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 Ref document number: 4506780 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130514 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130514 Year of fee payment: 3 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130514 Year of fee payment: 3 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130514 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140514 Year of fee payment: 4 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |