JP2007189607A - Mixer circuit, and semiconductor integrated circuit for communication - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a gain from being greatly changed and a Q value from greatly dropping even if the resonance frequency of an LC resonance circuit is changed in a mixer circuit using the LC resonance circuit as a load. <P>SOLUTION: In the mixer circuit using the IC resonance circuit as a load, the LC resonance circuit is provided with load inductors (L1 and L2) on a primary side, inductors (L3 and L4) on a secondary side, which are mutually inductively coupled and variable capacitances (Cv1 and Cv2) connected to the inductors in parallel, wherein control voltage to be applied to the variable capacitances is changed to thereby change an equivalent inductance value so that the resonance frequency of the LC resonance circuit can be changed. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a technique that is effective when applied to a mixer circuit having an LC resonant circuit as a load circuit, for example, a mixer circuit that constitutes a modulation circuit for a transmission signal and a demodulation circuit for a reception signal used in a wireless communication apparatus, and the same The present invention relates to a technology effective for use in a built-in communication semiconductor integrated circuit (high frequency IC).

  In a wireless communication apparatus such as a mobile phone, a Gilbert cell mixer circuit, which is a kind of differential amplifier circuit, is used for a modulation circuit for a transmission signal and a demodulation circuit for a reception signal. A resistive element is generally used for the load of the Gilbert cell type mixer circuit. However, a mixer circuit using a resistor as a load has a narrow dynamic range and a poor CN ratio (carrier-to-noise ratio). In some cases, a demodulator circuit uses a mixer circuit having an LC resonance circuit composed of an inductor and a capacitor as a load.

Further, in such a mixer circuit, when modulation of a transmission signal in a plurality of frequency bands and demodulation of a reception signal are performed, if the frequency of the transmission / reception signal and the resonance frequency of the LC resonance circuit are greatly shifted, the CN ratio is lowered. Accordingly, there has been proposed an invention relating to a mixer circuit in which the resonance frequency is changed by switching the capacitance value or inductance value of the LC resonance circuit in accordance with the frequency of the signal to be mixed (Patent Documents 1 and 2).
JP2003-152815A JP 2003-298355 A

  Among the above prior inventions, the invention of Patent Document 1 mainly changes the resonance frequency by switching the capacitance value, and the invention of Patent Document 2 changes the resonance frequency by switching the inductance value. However, in the mixer circuit using the LC resonant circuit as a load, when the resonant frequency is changed by switching the capacitance value while the inductance value of the LC resonant circuit is fixed as in the embodiment of the invention of Patent Document 1, the in-band is changed. Since the frequency characteristic is not flat, the gain is changed by switching the capacitance value.

  On the other hand, when the resonance frequency is changed by switching the inductance value of the LC resonance circuit as in the invention of Patent Document 2, a gain change can be avoided. However, in Patent Document 2, an active element having a large number of elements is used as a variable inductance circuit. Since the inductor circuit is used, there is a problem that the circuit scale increases and the power consumption increases.

  In addition, a circuit provided with a plurality of inductors and a switch element for connecting or disconnecting the inductors for switching the inductance value is also conceivable. However, when a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is used as a switch element, the value of Q (Quality-factor) of the LC resonance circuit is lowered due to the on-resistance, and the output amplitude is lowered and the CN ratio is deteriorated. There is a problem that it ends up.

  In the modulation circuit and the demodulation circuit of the wireless communication device of the WCDMA (Wideband Code Division Multiple Access) system that the present inventors intend to apply, the frequency range of the local oscillation signal used for modulation / demodulation is wider than before, When trying to cope with a mixer circuit using a conventional resonance circuit, it has been found that the gain change may exceed the allowable range.

  An object of the present invention is to incorporate a mixer circuit in which the gain does not change greatly even if the resonance frequency of an LC resonance circuit as a load circuit is changed, and the mixer circuit as a modulation circuit for a transmission signal or a demodulation circuit for a reception signal The object is to provide a semiconductor integrated circuit for communication.

  Another object of the present invention is to provide a mixer circuit in which the value of Q does not drop greatly even when the resonance frequency of the LC resonance circuit as a load circuit is changed, and the mixer circuit to modulate the transmission signal or to demodulate the reception signal. An object of the present invention is to provide a communication semiconductor integrated circuit incorporated as a circuit.

  Still another object of the present invention is to provide a relatively small circuit in a mixer circuit having an LC resonant circuit as a load and a communication semiconductor integrated circuit incorporating the mixer circuit as a transmission signal modulation circuit or a reception signal demodulation circuit. In addition, the resonance frequency can be changed by switching the inductance value of the LC resonance circuit.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Outlines of representative ones of the inventions disclosed in the present application will be described as follows.

  That is, in the mixer circuit using the LC resonant circuit as a load, the LC resonant circuit is provided with a secondary side inductor that is mutually inductively coupled to the primary side load inductor and a variable capacitor connected in parallel with the inductor. By changing the applied control voltage, the equivalent inductance value is changed, and the resonance frequency of the LC resonance circuit is changed.

  According to the above means, the resonance frequency of the LC resonance circuit is changed by changing the equivalent inductance value of the LC resonance circuit, so that the resonance of the mixer circuit without changing the gain greatly compared to the case of changing the capacitance value. The frequency can be changed. In addition, since the switching element connected to the primary load inductor is not required to switch the equivalent inductance of the LC resonance circuit, the resonance frequency can be changed without greatly reducing the value of Q. Furthermore, since it is not necessary to use an active inductor circuit to change the inductance value, the resonance frequency can be changed without increasing the occupied area or power consumption.

  Here, preferably, a variable capacitor is also provided on the primary side of the LC resonance circuit, and the resonance voltage of the LC resonance circuit can be changed by changing the control voltage applied to the variable capacitor on the primary side. To do. In addition to being able to change the equivalent inductance value of the LC resonant circuit by changing the capacitance value of the secondary-side variable capacitor, it is also possible to change the primary-side capacitance value. Therefore, the resonance frequency can be coarsely adjusted by switching the capacitance value of the secondary-side variable capacitor, and the resonance frequency can be finely adjusted by switching the capacitance value of the primary-side variable capacitor. It becomes possible to smoothly perform high-precision frequency adjustment over the frequency range.

  The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

  That is, according to the present invention, the gain does not change greatly even if the resonance frequency of the LC resonance circuit as the load circuit is changed, and the Q value does not greatly decrease even if the resonance frequency is changed. A communication semiconductor integrated circuit incorporating the circuit and the mixer circuit as a modulation circuit for a transmission signal or a demodulation circuit for a reception signal can be realized.

  Further, according to the present invention, in the mixer circuit using the LC resonance circuit as a load, the resonance frequency can be changed by switching the inductance value of the LC resonance circuit without increasing the circuit scale or power consumption. become.

  Preferred embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a case where the mixer circuit according to the present invention is applied to a quadrature modulation circuit that performs frequency conversion and modulation by mixing an in-phase component I signal and a quadrature component Q signal with a local oscillation signal φvco with respect to a carrier wave. An embodiment will be shown.

  As shown in FIG. 1, the quadrature modulation circuit of this embodiment includes two Gilbert cell type mixer circuits MIXa and MIXb, and a pair of inductors L1, L2 as a load circuit COL common to the mixer circuit. An LC resonance circuit including a variable capacitor Cv0 is used.

  The load circuit COL of this embodiment includes inductors L1 and L2 in parallel form, a variable capacitor Cv0 connected between one terminals (nodes N1 and N2) of L1 and L2, and inductors L1 and L2, respectively. Inductors L3 and L4, a variable capacitor Cv1 connected between terminals of L3, and a variable capacitor Cv2 connected between terminals of L4. The capacitance value of the variable capacitor Cv0 is controlled by the first control signal CS1 and the first control voltage Vc1, and the capacitance values of the variable capacitors Cv1 and Cv2 are controlled by the second control signal CS2 and the second control voltage Vc2. The

  The mixer circuit MIXa is connected to the transistors Q11, Q12 and Q21, Q22, whose emitters are connected in common to the oscillation signals φ0, / φ0 that are 180 ° out of phase with each other, and to the common emitter of the transistors Q11, Q12. A transistor Q13 having an I signal applied to the base terminal, a transistor Q23 connected to the common emitter of Q21 and Q22 and having a negative phase signal / I applied to the base terminal, and emitter resistors R1 and R2 of Q13 and Q23 It consists of and. The collector terminals of the transistors Q11 and Q21 are connected to the connection node N1 between the inductor L1 and the variable capacitor Cv0 of the common load circuit COL, and the collector terminals of the transistors Q12 and Q22 are connected to the connection node N2 between the inductor L2 and the variable capacitor Cv0. It is connected.

  The mixer circuit MIXb includes transistors Q31, Q32 and Q41, Q42, to which oscillation signals φ1, / φ1 whose phases are shifted by 180 ° from each other and whose phases are shifted by 90 ° are respectively applied to the bases and whose emitters are commonly connected. The transistor Q33 connected to the common emitter of the transistors Q31 and Q32 and applied with the Q signal to the base terminal, and the transistor Q43 connected to the common emitter of Q41 and Q42 and applied with the negative phase signal / Q of the Q signal to the base terminal And emitter resistors R3 and R4 of Q33 and Q43. The collector terminals of the transistors Q31 and Q41 are connected to the connection node N2 between the inductor L2 and the variable capacitor Cv0 of the common load circuit COL, and the collector terminals of the transistors Q32 and Q42 are connected to the connection node N1 between the inductor L1 and the variable capacitor Cv0. It is connected.

  With the configuration as described above, the mixer circuit of FIG. 1 has the frequency difference between the I and Q signals as input signals and the oscillation signals φ0 and φ1 from the output terminals OUT and / OUT connected to the nodes N1 and N2. A signal having a frequency corresponding to is output as a differential signal.

  FIG. 2 is a circuit diagram specifically showing the variable capacitor Cv0 constituting the quadrature modulation circuit of FIG. 1, and FIG. 3 is a circuit diagram showing more specifically the variable capacitors Cv1 and Cv2. As shown in FIGS. 2 and 3, the variable capacitors Cv0 to Cv2 of this embodiment are each composed of a parallel varactor diode and a MOS capacitor. More specifically, the variable capacitor Cv0 includes a plurality of varactor diodes D11, D12..., D21, D22... Connected in parallel between the nodes N1 and N2 with the anode terminals back to back. A plurality of MOS capacitors Mc11, Mc12,..., Mc21, Mc22,... Are connected in parallel between nodes N1 and N2 with the source / drain as a common terminal.

  Then, a continuously varying control voltage Vc1 is applied to the common anode terminals of the varactor diodes D11, D12,..., D21, D22, and so on, and the MOS capacitors Mc11, Mc12, and Mc21, Mc22,. Each bit B1, B2,... Of the control signal (binary code) CS1 is applied to the source / drain terminals. When the control signal CS1 is changed, the capacitance value of the variable capacitor Cv0 is changed stepwise, and when the control voltage Vc1 is changed, the capacitance value of the variable capacitor Cv0 is changed linearly.

  That is, the capacitance value is changed stepwise by the MOS capacitors Mc11, Mc12..., Mc21, Mc22... By the combination of the two types of capacitive elements, and the varactor diodes D11, D12. The capacitance value can be changed so as to interpolate between the steps. A plurality of varactor diodes are connected in order to obtain a desired value by arranging varactor diodes of a predetermined size, and each can be replaced with one varactor diode.

  Since the configuration and operation of the variable capacitors Cv1 and Cv2 are the same as those of the variable capacitor Cv0, detailed description thereof is omitted. When the capacitance is changed, the variable capacitance Cv0 changes the value of C of the LC resonance circuit to directly switch the resonance frequency, and when the capacitance is changed, the variable capacitances Cv1 and Cv2 change the value of L of the LC resonance circuit. Changes so that the resonance frequency is indirectly switched.

Here, when the mutual inductance of the inductors L1 and L3 is M, the total capacitance value of the varactor diode is Cvd, and the total capacitance value of the MOS capacitance is Cms, the effective inductance Leff of the inductor L1 is expressed by the following equation (1).
Leff = L1 + ω ² M × (Cvd + Cms) / {1-ω ² L3 × (Cvd + Cms)} (1)
It is represented by The same applies to the inductor L2. From this equation, it can be seen that when Cvd and Cms are changed, the value of Leff changes and the resonance frequency changes.

  The change in the resonance frequency due to the change in the capacitance value of the primary-side variable capacitor Cv0 is direct, whereas the change in the resonance frequency due to the change in the capacitance values of the secondary-side variable capacitors Cv1 and Cv2 is once caused by the equivalent inductance. It is an indirect change that changes the value. For this reason, it is desirable to perform coarse adjustment of the resonance frequency by switching the capacitance value of the secondary-side variable capacitor, and finely adjust the resonance frequency by switching the capacitance value of the primary-side variable capacitor, so that a wide frequency range is achieved. Thus, it is possible to smoothly perform high-accuracy frequency adjustment. However, contrary to the above, the resonance frequency is coarsely adjusted by switching the capacitance value of the primary side variable capacitor, and the resonance frequency is finely adjusted by switching the capacitance value of the secondary side variable capacitor. Is also possible.

  FIG. 4 shows the relationship between the capacitance value Cv of the MOS capacitor and the gate-drain-source voltage Vg. In FIG. 4, a broken line A indicates a change in capacitance value per MOSFET having a W / L ratio (ratio of gate width and gate length) of 16 μm / 2 μm, and a solid line B indicates a W / L ratio of 16 μm / 2 μm. A change in the capacitance value when the variable capacitance Cv is configured by 24 MOSFETs is shown.

  Assuming that the capacitance value per MOSFET when a voltage of 1.5 V or higher is applied between the gate, drain and source is 0.125 pF, a total capacitance of 3 pF is obtained in the case of 24 parallel connections. Therefore, the number or gate width of the MOSFETs constituting the variable capacitors Cv0 to Cv2 may be set according to the capacitance value required for the variable capacitors Cv0 to Cv2. When the gate-drain-source of the MOS capacitor is 0 V, that is, when the same voltage as the voltage applied to the gate terminal is applied to the drain-source terminal, the capacitance value is almost zero.

  FIG. 5 shows frequency characteristics of the quadrature modulation circuit of FIG. 1 when the number of MOS capacitors connected between the nodes N1 and N2 is changed by switching the control signal CS1.

  In FIG. 5, curve A shows the characteristics when the number of MOS capacitors connected between N1 and N2 is 24, and curve B shows the number when the number of MOS capacitors connected between N1 and N2 is “0”. It is a characteristic. The frequencies fo2 and fo1 at the peak of each of the curves A and B are resonance points of the common load circuit COL composed of an LC resonance circuit. By setting the number of MOS capacitors connected between the nodes N1 and N2 to an arbitrary number between “0” and “24”, there is a peak value between fo2 and fo1, which is similar to the curves A and B. Frequency characteristics can be set.

  FIG. 6 shows a configuration example of a transmission system circuit when the mixer circuit of the present invention is applied to a modulation circuit of a transmission system circuit of a WCDMA wireless communication apparatus.

  In FIG. 6, reference numeral 100 denotes a semiconductor integrated circuit for communication (hereinafter referred to as a high frequency IC) including the transmission system circuit of the embodiment, and 200 denotes a baseband circuit. The baseband circuit 200 converts transmission data into an I signal and a Q signal and supplies them to the high frequency IC 100, or generates a control signal for the high frequency IC 100, and is composed of one or several ICs (semiconductor integrated circuits). Is done. Although not particularly limited, the I and Q signals are supplied to the high frequency IC 100 as differential signals I, / I, Q, and / Q.

  6 includes a local VCO (voltage controlled oscillator) 131A that generates a local oscillation signal, variable amplification circuits 111a and 111b that convert I and Q signals from the baseband circuit 200 into signals of a predetermined level, , Low pass filters 112a and 112b for removing high frequency noise from the I and Q signals. Further, the transmission circuit divides the signal obtained by dividing the local oscillation signal φvco or φvco from the local VCO 130A by 1/2 by the frequency dividing circuit 113 into 1/2 and the oscillation signal φ0 whose phases are shifted by 90 ° from each other. , / Φ0 and φ1, / φ1, and a quadrature modulation circuit 115 that performs quadrature modulation on the oscillation signals φ0 to / φ1 using the I and Q signals.

  Here, φ0 and / φ0 are signals that are 180 ° out of phase, and φ0 and φ1 are signals that are 90 ° out of phase. The local VCO 131A can generate a local oscillation signal φvco in a frequency range such as 3.3 to 3.98 GHz, and oscillates at a frequency corresponding to a selected band by a switching signal from the baseband circuit 200.

  Further, the transmission system circuit includes three amplifier circuits 116a, 116b, and 116c that amplify the modulated transmission signal and output it to the outside, a control circuit 150 that controls the inside of the high frequency IC, and the like. Although not shown, a reception system circuit is also provided in the high frequency IC 100. The three amplifier circuits 116a, 116b, and 116c are each configured to amplify a signal of 1920 to 1980 MHz that is a frequency band of WCDMA BAND1, a circuit that amplifies a signal of 1850 to 1910 MHz that is a frequency band of BAND2, and BAND5. It is a circuit that amplifies a signal of 824 to 849 MHz that is the frequency band of.

  As the quadrature modulation circuit 115, the mixer circuit of the embodiment shown in FIG. 1 is used. The quadrature modulation circuit 115 includes a mixer MIXa that mixes the I and / I signals from the baseband circuit 200 and the oscillation signals φ0 and / φ0 from the frequency division phase shift circuit 114, and Q and / Q from the baseband circuit 200. The mixer MIXb that mixes the signal and the oscillation signals φ1 and / φ1 from the frequency division phase shift circuit 114 and a common load circuit COL of these mixers are configured.

  In this embodiment, the quadrature modulation circuit 115 is shared by each band, and the output of the quadrature modulation circuit 115 is the amplification circuit 116a of BAND1, the amplification circuit 116b of BAND2, and the amplification circuit 116c of BAND5. To be supplied. The control circuit 150 includes a register CRG inside, and based on the value set in the register CRG, the control signal CS1, which controls the capacitance values of the variable capacitors Cv0 to Cv2 of the common load circuit COL of the quadrature modulation circuit 115. CS2 and control voltages Vc1 and Vc2 are generated. Vc1 and Vc2 are generated by converting a digital binary code into an analog voltage by a DA converter circuit (not shown).

  By changing the capacitance value C and inductance L of the LC resonance circuit, which is the common load circuit COL, by the control circuit 150, the resonance frequency can be adjusted over a wide range, and the quadrature modulation circuit 115 can be adjusted to a plurality of bands. This makes it possible to reduce the area occupied by the circuit and thus the chip size. Further, by adjusting the resonance frequency of the LC resonance circuit according to the frequency of the transmission signal, the gain of the modulation circuit can be made substantially constant even if the frequency of the transmission signal changes, and the frequency is within an allowable range. A dynamic range equivalent to the center frequency can be secured even at the maximum frequency or the minimum frequency.

  FIG. 7 shows a configuration example of a reception system circuit when the mixer circuit of the present invention is applied to a demodulation circuit of a reception system circuit of a WCDMA wireless communication apparatus.

  The reception system circuit shown in FIG. 7 receives an LNA (low noise amplifier) 121A that amplifies a reception signal of 2110 to 2170 MHz that is a frequency band of BAND1 of WDMMA, and a signal of 1930 to 1990 MHz that is a frequency band of BAND2. An LNA 121B to be amplified and an LNA 121C to amplify a signal of 869 to 894 MHz, which is the frequency band of BAND5, are provided.

  The receiving system circuit divides the local oscillation signal φvco from the local VCO 130B by 1/2, and the signal φvco from the VCO 130B or the signal divided by the frequency divider 123 by 1/2. A frequency-dividing phase shift circuit 124 that generates the oscillation signals φ0, / φ0 and φ1, / φ1 whose phases are shifted from each other by 90 ° is provided.

  Further, the reception system circuit includes buffer amplifiers 122a to 122c that convert the outputs of the LNAs 121a to 121c into differential signals, outputs of the amplifiers 122a to 122c, and oscillation signals φ0 to φ1 from the frequency division phase shift circuit 124, respectively. And a quadrature demodulation circuit 125 that performs quadrature demodulation and generates I and Q signals. In the subsequent stage of the quadrature demodulation circuit 125, high gain amplification circuits (PGA) 126a and 126b that amplify the demodulated I and Q signals to a predetermined level and pass them to the baseband IC 200 are provided.

  When configuring a reception system circuit corresponding to a dual band or a triple band, generally, a mixer for mixing a reception signal and a local oscillation signal is provided for each band. However, this increases the circuit size and increases the chip size. In the present embodiment, by using the mixer circuit of the embodiment of FIG. 1 for the orthogonal demodulation circuit, as shown in FIG. 7, the LNA 121a to the LNA 121a to BAND5 provided corresponding to the three bands BAND1, BAND2, BAND5 of WDMA The quadrature demodulation circuit 125 in the subsequent stage of 121c can be shared by a plurality of bands.

  The control circuit 150 generates control signals CS1 and CS2 and control voltages Vc1 and Vc2 for controlling the capacitance values of the variable capacitors Cv0 to Cv2 of the common load circuit COL of the orthogonal demodulation circuit 125, and is shown in FIG. It can be shared with the control circuit of the transmission system circuit. By changing the capacitance value C and inductance L of the LC resonance circuit, which is the common load circuit COL, by the control circuit 150, the resonance frequency can be adjusted over a wide range, and the quadrature demodulation circuit 125 can be adjusted to a plurality of bands. This makes it possible to reduce the area occupied by the circuit and thus the chip size.

  FIG. 8 shows an overall configuration example of a high frequency IC in which the transmission system circuit of FIG. 6 and the reception system circuit of FIG. 7 are formed on one semiconductor chip and a radio communication apparatus using the same. The same circuit blocks as those shown in FIGS. 6 and 7 are denoted by the same reference numerals, and redundant description is omitted.

  As shown in FIG. 8, the wireless communication apparatus of this embodiment includes a signal wave transmission / reception antenna 400, a band switching switch 410, and a duplexer 420a for separating a transmission signal and a reception signal. To 420c and high-frequency power amplifier circuits (power modules) 430a to 430c for amplifying the transmission signal. Further, the high frequency IC 100 that demodulates the reception signal or modulates the transmission signal, the bandpass filters 440a to 440c that remove harmonics from the transmission signal, the transmission data is converted into I and Q signals, and the high frequency IC 100 is controlled. Baseband IC 200 and the like.

  In this embodiment, an LC resonant VCO as shown in FIG. 9 is used as a VCO 130A that generates a local oscillation signal necessary for modulation in a transmission system circuit and a VCO 130B that generates a local oscillation signal necessary for demodulation in a reception system circuit. Is used. As the LC resonance circuit, an LC resonance circuit having the same configuration as the LC resonance circuit which is the common load circuit COL of the mixer circuit shown in FIG. Used.

  Further, the frequency of the local oscillation signal generated by the VCOs 130A and 130B is changed by changing the resonance frequency by changing the capacitance value C and the inductance value L of the variable capacitor constituting the LC resonance circuit. Note that the capacitance value is changed by applying the voltage Vt from the loop filter of the PLL circuit as the control voltage Vc1 to the primary side variable capacitor Cv1 of the LC resonance circuits of the VCOs 130A and 130B.

  The VCO of FIG. 9 has a pair of N-channel MOSFETs Q1 and Q2 serving as negative resistors whose sources are commonly connected and whose gate and drain are cross-coupled to each other. A constant current source is connected between the common source of the MOSFETs Q1 and Q2 and the ground point GND, and a variable capacitance element Cv0 including a MOS capacitor array and a varactor diode is connected between the drains of the MOSFETs Q1 and Q2. , Q2 have inductors L1 and L2 connected between the drain terminals and the power supply voltage terminal Vcc. Inductors L3 and L4 are provided so as to face the inductors L1 and L2 and are mutually inductively coupled to L1, and variable capacitors Cv1 and Cv2 are connected between terminals of the inductors L1 and L2, respectively. .

  Furthermore, in this embodiment, a transmission PLL circuit 140A including a VCO 130A that generates a local oscillation signal, and a band selection circuit for selecting an oscillation frequency band to be used in each of the transmission PLL circuit 140B including a VCO 130B, A calibration function is provided. The control circuit 150 performs calibration of the PLL circuits 140A and 140B when switching the capacitance value C and inductance L of the LC resonance circuit, which is the common load circuit COL in the modulation circuit 115 and the demodulation circuit 125, according to the frequency. An adjustment is made based on the obtained information.

  When an on-chip element is used as the inductance element of the LC resonance circuit, the variation of the element is almost the same variation on the same chip. Therefore, it is necessary to calibrate the mixer circuit by adjusting the LC resonant circuit, which is the common load circuit COL of the mixer circuit of the modulation circuit and the demodulation circuit, based on the information obtained by the calibration of the LC resonant VCO. Disappears. In addition, it is possible to correct a shift in the resonance frequency of the common load circuit COL of the mixer circuit due to manufacturing variations.

  Since the PLL circuits 140A and 140B have the same configuration, the PLL circuit 140 will be described below.

  As shown in FIG. 10, the PLL circuit 140 includes a VCO 130, an automatic band selection circuit 132 that selects a VCO use band, a variable frequency divider 133 that divides an oscillation signal generated by the VCO 130, and a reference oscillation circuit 160. The frequency divider 134 divides the reference clock φref. The PLL circuit 130 further includes a phase comparator 135 that compares the phases of the signals divided by the frequency dividers 133 and 134, a charge pump 136 that generates a voltage corresponding to the phase difference, and a loop filter 137.

  The control circuit 150 switches the frequency of the VCO 130 in the PLL circuit 140. An oscillation frequency (frequency division ratio) is set in a register in the control circuit 150 based on a signal from the baseband IC 200, and a value set in the register is set in a register in the automatic band selection circuit 132 or a variable frequency dividing circuit 133. To be supplied. At the same time, based on a command (command code or the like) from the baseband IC 200, the band selection operation and calibration used by the automatic band selection circuit 132 are started.

  The automatic band selection circuit 132 changes the phase advance or delay of the signal divided by the frequency dividers 133 and 134 while switching the oscillation frequency switching control signal (CS1 (B1, B2,...) Or Vc1 in FIG. 2). Determination is made, for example, the optimum use band is found from 16 bands # 0 to # 15 as shown in FIG. 11, and the control signals B1, B2,.

  When the band of the VCO 130 is determined, the switch SW1 on the loop is switched so that the charge voltage Vt of the loop filter 137 is supplied to the VCO 130 as an oscillation control voltage instead of the control voltage Vc1 from the automatic band selection circuit 132, and the frequency is pulled in. Will be performed. By performing such an operation immediately before the start of transmission / reception, a memory for storing data for correcting variations becomes unnecessary, and even if the characteristics of the VCO change due to temperature fluctuation, calibration corresponding to the change is required. It becomes possible. This also has the advantage that the burden on the baseband IC is reduced.

  Here, when the target oscillation frequency of the VCO 130 is, for example, 3900 MHz, the band # 11 is selected as shown in FIG. 11, the control voltage Vt is 1.3 V, and the oscillation frequency of the VCO 130 is 3900 MHz. The LC resonance circuit is given 1.5 V, which is the center voltage of the frequency variable range, as the control voltage Vc1. FIG. 12 shows the frequency characteristics of the LC resonance circuit of the mixer circuit. Here, it is assumed that the LC resonance circuit of the mixer circuit has 16 bands # 0 to # 15 as in the VCO. However, as shown in FIG. 6, since the signal obtained by dividing the VCO oscillation signal by 1/2 is supplied to the mixer circuit MIX, the resonance frequency becomes 1/2 of the oscillation frequency of the VCO in FIG. It has become.

  When the VCO has the designed characteristics, when the target oscillation frequency is 3900 MHz, the band # 10 should be selected. However, the band # 11 has an influence of manufacturing variations of inductors and capacitive elements as shown in FIG. If it is selected, the frequency characteristic of the VCO is shifted downward in FIG. At this time, the frequency characteristic of the LC resonance circuit of the mixer circuit using the same element (inductance value and capacitance value are each twice that of the VCO) is also shifted downward. Therefore, the LC resonance circuit of the mixer circuit can also correct the frequency shift due to manufacturing variations by selecting the band # 11 similarly to the VCO.

  Moreover, the frequency difference between the frequency obtained by dividing the oscillation frequency of 3900 MHz of the VCO when the control voltage Vt is 1.3 V and the resonance frequency of the LC resonance circuit of the mixer circuit by the set voltage of 1.5 V is about 10 MHz. Therefore, the gain shift of the mixer circuit can be reduced. In addition, when the target oscillation frequency of the VCO changes, the band of the LC resonance circuit of the mixer circuit also changes accordingly, and the resonance frequency changes, so the difference between the resonance frequency and the frequency of the input signal is reduced over the entire usage range, Flattening of the frequency characteristics of the gain of the mixer circuit is realized.

  In the embodiment of FIG. 6, the inductance value and the capacitance value of the LC resonance circuit of the mixer circuit are considered as the inductance value of the LC resonance circuit of the VCO in consideration of the case where the signal divided by the frequency dividing circuit 113 is input. It is desirable to configure so that it can be switched to a value four times the capacitance value.

  Further, when the number of LC switching of the LC resonance circuit of the VCO and the mixer circuit, that is, the number of bands is increased, the oscillation frequency and resonance frequency can be controlled with higher accuracy. However, the requirement for the accuracy of the oscillation frequency of the VCO and the requirement for the accuracy of the gain of the mixer circuit are different from each other, and there may be a case where the requirement for the accuracy of the gain of the mixer circuit is gentler. In such a case, the number of bands that can be switched in the mixer circuit is designed to be smaller than the number of bands that can be switched in the VCO, whereby the circuit can be simplified and the occupied area can be reduced.

  Table 1 shows a setting example of the frequency cover range of each band when the number of bands of the oscillation frequency of the VCO and the number of bands of the resonance frequency of the mixer circuit are set to the same 16 bands. Table 2 shows an example of setting the frequency cover range of each band when the number of bands of the oscillation frequency of the VCO is 16 and the number of bands of the resonance frequency of the mixer circuit is half, that is, 8 bands.

Of these, Table 1 shows the case where the number of bands of the LC resonance circuit of the VCO and the mixer circuit is both 16, and Table 2 shows the number of bands of 32 of the VCO and 16 bands of the LC resonance circuit of the mixer circuit. Is the case. However, the present invention is not limited to these setting examples, and the number of bands of the LC resonance circuit of the mixer circuit may be set to ¼ or に 対 し て with respect to the number of bands of the VCO.

  FIG. 13 shows another example of a high-frequency IC having a mixer circuit according to the present invention as an orthogonal modulation circuit, and a configuration example of a radio communication apparatus using the same.

  The high-frequency IC 101 of this embodiment is configured to be capable of modulation / demodulation by a communication system of GSM, DCS, and PCS (Personal Communication System) in addition to the modulation / demodulation of a signal by the WCDMA system.

  In order to enable this, in this embodiment, in addition to the variable gain amplifier 116 that amplifies the transmission signal modulated by the WCDMA system, the GSM buffer BFF1 and the variable gain amplifier GCA1, A buffer BFF2 for DCS and PCS and a variable gain amplifier GCA2 are provided. The buffers BFF1 and BFF2 are amplifiers having a limiter function for limiting the amplitude of the GMSK modulated signal, and the variable gain amplifiers GCA1 and GCA2 are linear characteristics suitable for amplifying an EDGE mode signal accompanied by 8-PSK modulation. A good amp.

  A power amplifier 450 including a power amplifier 450a that amplifies the GSM transmission wave, a power amplifier 450b that amplifies the transmission wave of DCS and PCS, and a power amplifier 450c that amplifies the transmission wave of WCDMA is provided downstream of BPF1, BPF2, and BPF3. is set up.

  The designation of which one of the buffers BFF1 and BFF2, the variable gain amplifiers GCA1 and GCA2, and the power amplifiers 450a, 450b, and 450c is selected indicates a selection mode that is output from the control circuit 150 in response to a command from the baseband IC 200. This is performed by the control signal S1 and the control signal S2 indicating the selected band. Similar to the above embodiment, the control signals 1501 and CS2 and the control voltages Vc1 and Vc2 for determining the L value and C value of the resonance circuit are supplied from the control circuit 150 to the quadrature modulation circuit 115.

  In this embodiment, the GSM and WCDMA transmission system circuit 110 and the GSM reception system circuit 120 share the VCO 130 for generating a local oscillation signal, and the oscillation signal φRF generated by the VCO 130 is used for the orthogonal modulation circuit 115 and the reception system. This is supplied to the circuit 120. In addition, since transmission and reception are simultaneously performed in WCDMA, in order to achieve sufficient isolation, in this embodiment, the transmission system circuit and the WCDMA reception system circuit 300 are formed on separate semiconductor chips. However, the WCDMA reception system circuit 300 may also be formed on the same chip 101.

  Conventionally, in such a system, the quadrature modulation circuit 115 is generally provided with two quadrature modulation circuits for GSM, DCS, PCS, and WCDMA (for example, Japanese Patent Application Laid-Open No. 2004-343164). On the other hand, when the mixer circuit of the present invention is applied, all signals can be modulated by one orthogonal modulation circuit 115 as shown in FIG.

  The invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Nor. For example, in the above-described embodiment, the present invention is applied to the quadrature modulation / demodulation circuit including two Gilbert cells and a common load circuit. However, the present invention is also applicable to a single Gilbert cell circuit using an inductance element in the load circuit. Can do.

  In the above embodiment, a circuit using a combination of a MOS capacitor and a varactor diode as a variable capacitor has been described. However, for applications where the frequency variable range is not so wide or where high frequency accuracy is not required, MOS It is also possible to use a variable capacitor composed of only one of a capacitor and a varactor diode.

  Further, in the above embodiment, it has been described that the oscillation frequency of the VCO is twice or four times the resonance frequency of the LC resonance circuit of the mixer circuit. However, the oscillation frequency of the VCO is the same as the resonance frequency of the LC resonance circuit of the mixer circuit. The present invention can also be applied to the case where the oscillation frequency of the VCO is 1/2 or 1/4 of the resonance frequency of the LC resonance circuit of the mixer circuit.

  In the above description, the case where the invention made by the present inventor is applied to the modulation / demodulation circuit constituting the WCDMA wireless communication apparatus, which is the field of use behind it, has been described. The present invention is not limited to this, and can be applied to a circuit that mixes two signals having different frequencies.

It is a circuit diagram which shows one Example at the time of applying the mixer circuit which concerns on this invention to a quadrature modulation circuit. FIG. 2 is a circuit diagram showing a specific example of a variable capacitor Cv0 constituting the quadrature modulation circuit of FIG. FIG. 2 is a circuit diagram showing a specific example of variable capacitors Cv1, Cv2 constituting the quadrature modulation circuit of FIG. It is a graph which shows the relationship between the capacitance value Cv of MOS capacity | capacitance, and the gate-drain-source voltage Vg. 2 is a graph showing frequency characteristics of the quadrature modulation circuit of FIG. 1 when the number of MOS capacitors connected by changing a control signal is changed. FIG. 3 is a block diagram showing a configuration example of a transmission system circuit when the mixer circuit of the present invention is applied to a modulation circuit of a transmission system circuit of a WCDMA wireless communication apparatus. FIG. 2 is a block diagram showing a configuration example of a transmission system circuit when the mixer circuit of the present invention is applied to a demodulation circuit of a reception system circuit of a WCDMA wireless communication apparatus. FIG. 8 is a block diagram illustrating an example of the overall configuration of a high-frequency IC in which the transmission system circuit of FIG. 6 and the reception system circuit of FIG. 7 are formed on one semiconductor chip and a wireless communication apparatus using the same. It is a circuit diagram which shows the specific circuit example of LC resonance type VCO used in an Example. It is a block diagram which shows the structural example of the PLL circuit containing VCO. It is a graph which shows the relationship between the control voltage of VCO of an Example, and an oscillation frequency. It is a graph which shows the relationship between the control voltage and resonance frequency of the mixer circuit of an Example. Another embodiment of a high frequency IC having the mixer circuit according to the present invention as a quadrature modulation circuit and a configuration example of a wireless communication apparatus using the high frequency IC are shown.

Explanation of symbols

Cv0 to Cv2 Variable capacitance L1 to L4 Inductance element 100, 101 High frequency IC
115 Quadrature modulation circuit (modulation & up-conversion mixer)
121 Low Noise Amplifier 125 Quadrature Demodulator (Demodulator & Downconversion Mixer)
126 High gain amplifier circuit 130A Transmission side oscillation circuit (VCO)
130B Receiving side oscillation circuit (VCO)
150 Control circuit 200 Baseband IC
400 Transmission / reception antenna 410 Band switching switch 420 Duplexer 430,450 Power amplifier

Claims (10)

A load circuit comprising a resonance circuit having a first inductance element, a capacitive element, and a second inductance element mutually inductively coupled to the first inductance element; a first signal having a first frequency; and a second signal having a second frequency. A mixer circuit comprising a transistor circuit that drives the load circuit with a signal as an input signal,
By changing the state of the secondary side circuit including the second inductance element, the effective inductance value of the primary side circuit including the first inductance element is changed, and the resonance frequency of the load circuit is set in a desired range. A mixer circuit.   A first variable capacitor connected between terminals of the second inductance element is provided, and an effective inductance value of the primary circuit is changed by changing a capacitance value of the first variable capacitor. The mixer circuit according to claim 1.   2. A second variable capacitor connected between terminals of the first inductance element, wherein a resonance frequency of the load circuit is changed by changing a capacitance value of the second variable capacitor. 2. The mixer circuit according to 2.   The resonance frequency of the load circuit is changed by a predetermined amount by changing the capacitance value of the first variable capacitor, and the resonance frequency of the load circuit is changed by the predetermined amount by changing the capacitance value of the second variable capacitor. 4. The mixer circuit according to claim 3, wherein the mixer circuit is changed by a smaller amount.   The first variable capacitor includes a plurality of MOS capacitors using a gate capacitance between a gate terminal and a source / drain terminal of an insulated gate field effect transistor, and a voltage higher than a predetermined voltage is applied between the gate and the source / drain. 5. The mixer circuit according to claim 2, wherein the effective inductance value of the primary side circuit is changed by changing the number of MOS capacitors to be changed.   6. The first variable capacitor includes a varactor diode, and an effective inductance value of the primary circuit is changed by changing a voltage applied to the varactor diode. The mixer circuit described in 1. A mixer circuit using a LC resonant circuit having a first variable capacitor and a variable resonance frequency as a load circuit; and an LC resonance type voltage controlled oscillator circuit having a second variable capacitor and a variable oscillation frequency,
The mixer circuit receives an oscillation signal from the LC resonance type voltage control oscillation circuit or a signal derived from the signal and a transmission signal or a reception signal, and inputs the LC resonance circuit of the mixer circuit and the LC resonance type voltage control. The LC resonance circuit of the oscillation circuit has the same configuration,
When the oscillation frequency of the LC resonance type voltage controlled oscillation circuit is changed by the change of the capacitance value of the second variable capacitor, the capacitance value of the first variable capacitor is changed and the resonance frequency of the mixer circuit becomes the LC frequency. A communication semiconductor integrated circuit characterized by being configured to change in the same direction as a change in oscillation frequency of a resonance type voltage controlled oscillation circuit.   The LC resonance circuit of the mixer circuit and the LC resonance circuit of the LC resonance type voltage controlled oscillation circuit each include a first inductance element, a capacitance element, and a second inductance element mutually inductively coupled to the first inductance element. The communication semiconductor integrated circuit according to claim 7, wherein the communication semiconductor integrated circuit is a resonance circuit having the resonance circuit.   A first variable capacitor connected between terminals of the second inductance element is provided, and an effective inductance value of the primary circuit is changed by changing a capacitance value of the first variable capacitor. The semiconductor integrated circuit for communication according to claim 8. 2. A second variable capacitor connected between terminals of the first inductance element, wherein a resonance frequency of the load circuit is changed by changing a capacitance value of the second variable capacitor. 9. A semiconductor integrated circuit for communication according to 9.

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